1//===-- RISCVFixupKinds.h - RISC-V Specific Fixup Entries -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H
10#define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H
11
12#include "llvm/BinaryFormat/ELF.h"
13#include "llvm/MC/MCFixup.h"
14#include <utility>
15
16#undef RISCV
17
18namespace llvm::RISCV {
19enum Fixups {
20  // 20-bit fixup corresponding to %hi(foo) for instructions like lui
21  fixup_riscv_hi20 = FirstTargetFixupKind,
22  // 12-bit fixup corresponding to %lo(foo) for instructions like addi
23  fixup_riscv_lo12_i,
24  // 12-bit fixup corresponding to foo-bar for instructions like addi
25  fixup_riscv_12_i,
26  // 12-bit fixup corresponding to %lo(foo) for the S-type store instructions
27  fixup_riscv_lo12_s,
28  // 20-bit fixup corresponding to %pcrel_hi(foo) for instructions like auipc
29  fixup_riscv_pcrel_hi20,
30  // 12-bit fixup corresponding to %pcrel_lo(foo) for instructions like addi
31  fixup_riscv_pcrel_lo12_i,
32  // 12-bit fixup corresponding to %pcrel_lo(foo) for the S-type store
33  // instructions
34  fixup_riscv_pcrel_lo12_s,
35  // 20-bit fixup corresponding to %got_pcrel_hi(foo) for instructions like
36  // auipc
37  fixup_riscv_got_hi20,
38  // 20-bit fixup corresponding to %tprel_hi(foo) for instructions like lui
39  fixup_riscv_tprel_hi20,
40  // 12-bit fixup corresponding to %tprel_lo(foo) for instructions like addi
41  fixup_riscv_tprel_lo12_i,
42  // 12-bit fixup corresponding to %tprel_lo(foo) for the S-type store
43  // instructions
44  fixup_riscv_tprel_lo12_s,
45  // Fixup corresponding to %tprel_add(foo) for PseudoAddTPRel, used as a linker
46  // hint
47  fixup_riscv_tprel_add,
48  // 20-bit fixup corresponding to %tls_ie_pcrel_hi(foo) for instructions like
49  // auipc
50  fixup_riscv_tls_got_hi20,
51  // 20-bit fixup corresponding to %tls_gd_pcrel_hi(foo) for instructions like
52  // auipc
53  fixup_riscv_tls_gd_hi20,
54  // 20-bit fixup for symbol references in the jal instruction
55  fixup_riscv_jal,
56  // 12-bit fixup for symbol references in the branch instructions
57  fixup_riscv_branch,
58  // 11-bit fixup for symbol references in the compressed jump instruction
59  fixup_riscv_rvc_jump,
60  // 8-bit fixup for symbol references in the compressed branch instruction
61  fixup_riscv_rvc_branch,
62  // Fixup representing a legacy no-pic function call attached to the auipc
63  // instruction in a pair composed of adjacent auipc+jalr instructions.
64  fixup_riscv_call,
65  // Fixup representing a function call attached to the auipc instruction in a
66  // pair composed of adjacent auipc+jalr instructions.
67  fixup_riscv_call_plt,
68  // Used to generate an R_RISCV_RELAX relocation, which indicates the linker
69  // may relax the instruction pair.
70  fixup_riscv_relax,
71  // Used to generate an R_RISCV_ALIGN relocation, which indicates the linker
72  // should fixup the alignment after linker relaxation.
73  fixup_riscv_align,
74  // Fixups indicating a TLS descriptor code sequence, corresponding to auipc,
75  // lw/ld, addi, and jalr, respectively.
76  fixup_riscv_tlsdesc_hi20,
77  fixup_riscv_tlsdesc_load_lo12,
78  fixup_riscv_tlsdesc_add_lo12,
79  fixup_riscv_tlsdesc_call,
80
81  // Used as a sentinel, must be the last
82  fixup_riscv_invalid,
83  NumTargetFixupKinds = fixup_riscv_invalid - FirstTargetFixupKind
84};
85
86static inline std::pair<MCFixupKind, MCFixupKind>
87getRelocPairForSize(unsigned Size) {
88  switch (Size) {
89  default:
90    llvm_unreachable("unsupported fixup size");
91  case 1:
92    return std::make_pair(
93        MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_ADD8),
94        MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_SUB8));
95  case 2:
96    return std::make_pair(
97        MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_ADD16),
98        MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_SUB16));
99  case 4:
100    return std::make_pair(
101        MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_ADD32),
102        MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_SUB32));
103  case 8:
104    return std::make_pair(
105        MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_ADD64),
106        MCFixupKind(FirstLiteralRelocationKind + ELF::R_RISCV_SUB64));
107  }
108}
109
110} // end namespace llvm::RISCV
111
112#endif
113