1//===-- NVPTXTargetMachine.h - Define TargetMachine for NVPTX ---*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the NVPTX specific subclass of TargetMachine.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_NVPTX_NVPTXTARGETMACHINE_H
14#define LLVM_LIB_TARGET_NVPTX_NVPTXTARGETMACHINE_H
15
16#include "NVPTXSubtarget.h"
17#include "llvm/Target/TargetMachine.h"
18#include <optional>
19#include <utility>
20
21namespace llvm {
22
23/// NVPTXTargetMachine
24///
25class NVPTXTargetMachine : public LLVMTargetMachine {
26  bool is64bit;
27  // Use 32-bit pointers for accessing const/local/short AS.
28  bool UseShortPointers;
29  std::unique_ptr<TargetLoweringObjectFile> TLOF;
30  NVPTX::DrvInterface drvInterface;
31  NVPTXSubtarget Subtarget;
32
33  // Hold Strings that can be free'd all together with NVPTXTargetMachine
34  BumpPtrAllocator StrAlloc;
35  UniqueStringSaver StrPool;
36
37public:
38  NVPTXTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
39                     StringRef FS, const TargetOptions &Options,
40                     std::optional<Reloc::Model> RM,
41                     std::optional<CodeModel::Model> CM, CodeGenOptLevel OP,
42                     bool is64bit);
43  ~NVPTXTargetMachine() override;
44  const NVPTXSubtarget *getSubtargetImpl(const Function &) const override {
45    return &Subtarget;
46  }
47  const NVPTXSubtarget *getSubtargetImpl() const { return &Subtarget; }
48  bool is64Bit() const { return is64bit; }
49  bool useShortPointers() const { return UseShortPointers; }
50  NVPTX::DrvInterface getDrvInterface() const { return drvInterface; }
51  UniqueStringSaver &getStrPool() const {
52    return const_cast<UniqueStringSaver &>(StrPool);
53  }
54
55  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
56
57  // Emission of machine code through MCJIT is not supported.
58  bool addPassesToEmitMC(PassManagerBase &, MCContext *&, raw_pwrite_stream &,
59                         bool = true) override {
60    return true;
61  }
62  TargetLoweringObjectFile *getObjFileLowering() const override {
63    return TLOF.get();
64  }
65
66  MachineFunctionInfo *
67  createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F,
68                            const TargetSubtargetInfo *STI) const override;
69
70  void registerDefaultAliasAnalyses(AAManager &AAM) override;
71
72  void registerPassBuilderCallbacks(PassBuilder &PB,
73                                    bool PopulateClassToPassNames) override;
74
75  TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
76
77  bool isMachineVerifierClean() const override {
78    return false;
79  }
80
81  std::pair<const Value *, unsigned>
82  getPredicatedAddrSpace(const Value *V) const override;
83}; // NVPTXTargetMachine.
84
85class NVPTXTargetMachine32 : public NVPTXTargetMachine {
86  virtual void anchor();
87
88public:
89  NVPTXTargetMachine32(const Target &T, const Triple &TT, StringRef CPU,
90                       StringRef FS, const TargetOptions &Options,
91                       std::optional<Reloc::Model> RM,
92                       std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
93                       bool JIT);
94};
95
96class NVPTXTargetMachine64 : public NVPTXTargetMachine {
97  virtual void anchor();
98
99public:
100  NVPTXTargetMachine64(const Target &T, const Triple &TT, StringRef CPU,
101                       StringRef FS, const TargetOptions &Options,
102                       std::optional<Reloc::Model> RM,
103                       std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
104                       bool JIT);
105};
106
107} // end namespace llvm
108
109#endif
110