1189251Ssam//===-- RegisterContextPOSIXCore_arm.cpp ----------------------------------===// 2189251Ssam// 3189251Ssam// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4189251Ssam// See https://llvm.org/LICENSE.txt for license information. 5252726Srpaulo// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6252726Srpaulo// 7189251Ssam//===----------------------------------------------------------------------===// 8189251Ssam 9189251Ssam#include "RegisterContextPOSIXCore_arm.h" 10189251Ssam 11189251Ssam#include "lldb/Target/Thread.h" 12189251Ssam#include "lldb/Utility/RegisterValue.h" 13189251Ssam 14189251Ssam#include <memory> 15189251Ssam 16189251Ssamusing namespace lldb_private; 17189251Ssam 18189251SsamRegisterContextCorePOSIX_arm::RegisterContextCorePOSIX_arm( 19189251Ssam Thread &thread, std::unique_ptr<RegisterInfoPOSIX_arm> register_info, 20189251Ssam const DataExtractor &gpregset, llvm::ArrayRef<CoreNote> notes) 21189251Ssam : RegisterContextPOSIX_arm(thread, std::move(register_info)) { 22189251Ssam m_gpr_buffer = std::make_shared<DataBufferHeap>(gpregset.GetDataStart(), 23189251Ssam gpregset.GetByteSize()); 24189251Ssam m_gpr.SetData(m_gpr_buffer); 25214734Srpaulo m_gpr.SetByteOrder(gpregset.GetByteOrder()); 26189251Ssam} 27189251Ssam 28189251SsamRegisterContextCorePOSIX_arm::~RegisterContextCorePOSIX_arm() = default; 29189251Ssam 30189251Ssambool RegisterContextCorePOSIX_arm::ReadGPR() { return true; } 31189251Ssam 32189251Ssambool RegisterContextCorePOSIX_arm::ReadFPR() { return false; } 33189251Ssam 34214734Srpaulobool RegisterContextCorePOSIX_arm::WriteGPR() { 35189251Ssam assert(0); 36189251Ssam return false; 37189251Ssam} 38189251Ssam 39189251Ssambool RegisterContextCorePOSIX_arm::WriteFPR() { 40189251Ssam assert(0); 41189251Ssam return false; 42189251Ssam} 43189251Ssam 44189251Ssambool RegisterContextCorePOSIX_arm::ReadRegister(const RegisterInfo *reg_info, 45189251Ssam RegisterValue &value) { 46189251Ssam lldb::offset_t offset = reg_info->byte_offset; 47189251Ssam if (offset + reg_info->byte_size <= GetGPRSize()) { 48189251Ssam uint64_t v = m_gpr.GetMaxU64(&offset, reg_info->byte_size); 49189251Ssam if (offset == reg_info->byte_offset + reg_info->byte_size) { 50189251Ssam value = v; 51189251Ssam return true; 52189251Ssam } 53189251Ssam } 54189251Ssam return false; 55189251Ssam} 56189251Ssam 57189251Ssambool RegisterContextCorePOSIX_arm::ReadAllRegisterValues( 58189251Ssam lldb::WritableDataBufferSP &data_sp) { 59214734Srpaulo return false; 60189251Ssam} 61189251Ssam 62189251Ssambool RegisterContextCorePOSIX_arm::WriteRegister(const RegisterInfo *reg_info, 63189251Ssam const RegisterValue &value) { 64189251Ssam return false; 65189251Ssam} 66189251Ssam 67189251Ssambool RegisterContextCorePOSIX_arm::WriteAllRegisterValues( 68214734Srpaulo const lldb::DataBufferSP &data_sp) { 69189251Ssam return false; 70189251Ssam} 71189251Ssam 72214734Srpaulobool RegisterContextCorePOSIX_arm::HardwareSingleStep(bool enable) { 73189251Ssam return false; 74189251Ssam} 75189251Ssam