1/*
2 * Double-precision vector asin(x) function.
3 *
4 * Copyright (c) 2023, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6 */
7
8#include "v_math.h"
9#include "poly_advsimd_f64.h"
10#include "pl_sig.h"
11#include "pl_test.h"
12
13static const struct data
14{
15  float64x2_t poly[12];
16  float64x2_t pi_over_2;
17  uint64x2_t abs_mask;
18} data = {
19  /* Polynomial approximation of  (asin(sqrt(x)) - sqrt(x)) / (x * sqrt(x))
20     on [ 0x1p-106, 0x1p-2 ], relative error: 0x1.c3d8e169p-57.  */
21  .poly = { V2 (0x1.555555555554ep-3), V2 (0x1.3333333337233p-4),
22	    V2 (0x1.6db6db67f6d9fp-5), V2 (0x1.f1c71fbd29fbbp-6),
23	    V2 (0x1.6e8b264d467d6p-6), V2 (0x1.1c5997c357e9dp-6),
24	    V2 (0x1.c86a22cd9389dp-7), V2 (0x1.856073c22ebbep-7),
25	    V2 (0x1.fd1151acb6bedp-8), V2 (0x1.087182f799c1dp-6),
26	    V2 (-0x1.6602748120927p-7), V2 (0x1.cfa0dd1f9478p-6), },
27  .pi_over_2 = V2 (0x1.921fb54442d18p+0),
28  .abs_mask = V2 (0x7fffffffffffffff),
29};
30
31#define AllMask v_u64 (0xffffffffffffffff)
32#define One (0x3ff0000000000000)
33#define Small (0x3e50000000000000) /* 2^-12.  */
34
35#if WANT_SIMD_EXCEPT
36static float64x2_t VPCS_ATTR NOINLINE
37special_case (float64x2_t x, float64x2_t y, uint64x2_t special)
38{
39  return v_call_f64 (asin, x, y, special);
40}
41#endif
42
43/* Double-precision implementation of vector asin(x).
44
45   For |x| < Small, approximate asin(x) by x. Small = 2^-12 for correct
46   rounding. If WANT_SIMD_EXCEPT = 0, Small = 0 and we proceed with the
47   following approximation.
48
49   For |x| in [Small, 0.5], use an order 11 polynomial P such that the final
50   approximation is an odd polynomial: asin(x) ~ x + x^3 P(x^2).
51
52   The largest observed error in this region is 1.01 ulps,
53   _ZGVnN2v_asin (0x1.da9735b5a9277p-2) got 0x1.ed78525a927efp-2
54				       want 0x1.ed78525a927eep-2.
55
56   For |x| in [0.5, 1.0], use same approximation with a change of variable
57
58     asin(x) = pi/2 - (y + y * z * P(z)), with  z = (1-x)/2 and y = sqrt(z).
59
60   The largest observed error in this region is 2.69 ulps,
61   _ZGVnN2v_asin (0x1.044ac9819f573p-1) got 0x1.110d7e85fdd5p-1
62				       want 0x1.110d7e85fdd53p-1.  */
63float64x2_t VPCS_ATTR V_NAME_D1 (asin) (float64x2_t x)
64{
65  const struct data *d = ptr_barrier (&data);
66
67  float64x2_t ax = vabsq_f64 (x);
68
69#if WANT_SIMD_EXCEPT
70  /* Special values need to be computed with scalar fallbacks so
71     that appropriate exceptions are raised.  */
72  uint64x2_t special
73      = vcgtq_u64 (vsubq_u64 (vreinterpretq_u64_f64 (ax), v_u64 (Small)),
74		   v_u64 (One - Small));
75  if (unlikely (v_any_u64 (special)))
76    return special_case (x, x, AllMask);
77#endif
78
79  uint64x2_t a_lt_half = vcltq_f64 (ax, v_f64 (0.5));
80
81  /* Evaluate polynomial Q(x) = y + y * z * P(z) with
82     z = x ^ 2 and y = |x|            , if |x| < 0.5
83     z = (1 - |x|) / 2 and y = sqrt(z), if |x| >= 0.5.  */
84  float64x2_t z2 = vbslq_f64 (a_lt_half, vmulq_f64 (x, x),
85			      vfmsq_n_f64 (v_f64 (0.5), ax, 0.5));
86  float64x2_t z = vbslq_f64 (a_lt_half, ax, vsqrtq_f64 (z2));
87
88  /* Use a single polynomial approximation P for both intervals.  */
89  float64x2_t z4 = vmulq_f64 (z2, z2);
90  float64x2_t z8 = vmulq_f64 (z4, z4);
91  float64x2_t z16 = vmulq_f64 (z8, z8);
92  float64x2_t p = v_estrin_11_f64 (z2, z4, z8, z16, d->poly);
93
94  /* Finalize polynomial: z + z * z2 * P(z2).  */
95  p = vfmaq_f64 (z, vmulq_f64 (z, z2), p);
96
97  /* asin(|x|) = Q(|x|)         , for |x| < 0.5
98	       = pi/2 - 2 Q(|x|), for |x| >= 0.5.  */
99  float64x2_t y = vbslq_f64 (a_lt_half, p, vfmsq_n_f64 (d->pi_over_2, p, 2.0));
100
101  /* Copy sign.  */
102  return vbslq_f64 (d->abs_mask, y, x);
103}
104
105PL_SIG (V, D, 1, asin, -1.0, 1.0)
106PL_TEST_ULP (V_NAME_D1 (asin), 2.19)
107PL_TEST_EXPECT_FENV (V_NAME_D1 (asin), WANT_SIMD_EXCEPT)
108PL_TEST_INTERVAL (V_NAME_D1 (asin), 0, Small, 5000)
109PL_TEST_INTERVAL (V_NAME_D1 (asin), Small, 0.5, 50000)
110PL_TEST_INTERVAL (V_NAME_D1 (asin), 0.5, 1.0, 50000)
111PL_TEST_INTERVAL (V_NAME_D1 (asin), 1.0, 0x1p11, 50000)
112PL_TEST_INTERVAL (V_NAME_D1 (asin), 0x1p11, inf, 20000)
113PL_TEST_INTERVAL (V_NAME_D1 (asin), -0, -inf, 20000)
114