1181624Skmacy/* 2181624Skmacy * Permission is hereby granted, free of charge, to any person obtaining a copy 3181624Skmacy * of this software and associated documentation files (the "Software"), to 4181624Skmacy * deal in the Software without restriction, including without limitation the 5181624Skmacy * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 6181624Skmacy * sell copies of the Software, and to permit persons to whom the Software is 7181624Skmacy * furnished to do so, subject to the following conditions: 8181624Skmacy * 9181624Skmacy * The above copyright notice and this permission notice shall be included in 10181624Skmacy * all copies or substantial portions of the Software. 11181624Skmacy * 12181624Skmacy * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13181624Skmacy * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14181624Skmacy * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 15181624Skmacy * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 16181624Skmacy * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 17181624Skmacy * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 18181624Skmacy * DEALINGS IN THE SOFTWARE. 19181624Skmacy * 20181624Skmacy * Copyright (C) IBM Corp. 2005, 2006 21181624Skmacy * 22181624Skmacy * Authors: Hollis Blanchard <hollisb@us.ibm.com> 23181624Skmacy */ 24181624Skmacy 25183375Skmacy#include "xen.h" 26183375Skmacy 27181624Skmacy#ifndef __XEN_PUBLIC_ARCH_PPC_64_H__ 28181624Skmacy#define __XEN_PUBLIC_ARCH_PPC_64_H__ 29181624Skmacy 30183375Skmacy#define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ 31181624Skmacy typedef struct { \ 32181624Skmacy int __pad[(sizeof (long long) - sizeof (void *)) / sizeof (int)]; \ 33181624Skmacy type *p; \ 34181624Skmacy } __attribute__((__aligned__(8))) __guest_handle_ ## name 35181624Skmacy 36183375Skmacy#define __DEFINE_XEN_GUEST_HANDLE(name, type) \ 37183375Skmacy ___DEFINE_XEN_GUEST_HANDLE(name, type); \ 38183375Skmacy ___DEFINE_XEN_GUEST_HANDLE(const_##name, const type) 39181624Skmacy#define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name) 40181624Skmacy#define XEN_GUEST_HANDLE(name) __guest_handle_ ## name 41181624Skmacy#define set_xen_guest_handle(hnd, val) \ 42181624Skmacy do { \ 43181624Skmacy if (sizeof ((hnd).__pad)) \ 44181624Skmacy (hnd).__pad[0] = 0; \ 45181624Skmacy (hnd).p = val; \ 46181624Skmacy } while (0) 47181624Skmacy 48181624Skmacy#ifdef __XEN_TOOLS__ 49181624Skmacy#define get_xen_guest_handle(val, hnd) do { val = (hnd).p; } while (0) 50181624Skmacy#endif 51181624Skmacy 52181624Skmacy#ifndef __ASSEMBLY__ 53181624Skmacytypedef unsigned long long xen_pfn_t; 54181624Skmacy#define PRI_xen_pfn "llx" 55181624Skmacy#endif 56181624Skmacy 57181624Skmacy/* 58181624Skmacy * Pointers and other address fields inside interface structures are padded to 59181624Skmacy * 64 bits. This means that field alignments aren't different between 32- and 60181624Skmacy * 64-bit architectures. 61181624Skmacy */ 62181624Skmacy/* NB. Multi-level macro ensures __LINE__ is expanded before concatenation. */ 63181624Skmacy#define __MEMORY_PADDING(_X) 64181624Skmacy#define _MEMORY_PADDING(_X) __MEMORY_PADDING(_X) 65181624Skmacy#define MEMORY_PADDING _MEMORY_PADDING(__LINE__) 66181624Skmacy 67181624Skmacy/* And the trap vector is... */ 68181624Skmacy#define TRAP_INSTR "li 0,-1; sc" /* XXX just "sc"? */ 69181624Skmacy 70181624Skmacy#ifndef __ASSEMBLY__ 71181624Skmacy 72181624Skmacy#define XENCOMM_INLINE_FLAG (1UL << 63) 73181624Skmacy 74181624Skmacytypedef uint64_t xen_ulong_t; 75181624Skmacy 76181624Skmacy/* User-accessible registers: nost of these need to be saved/restored 77181624Skmacy * for every nested Xen invocation. */ 78181624Skmacystruct cpu_user_regs 79181624Skmacy{ 80181624Skmacy uint64_t gprs[32]; 81181624Skmacy uint64_t lr; 82181624Skmacy uint64_t ctr; 83181624Skmacy uint64_t srr0; 84181624Skmacy uint64_t srr1; 85181624Skmacy uint64_t pc; 86181624Skmacy uint64_t msr; 87181624Skmacy uint64_t fpscr; /* XXX Is this necessary */ 88181624Skmacy uint64_t xer; 89181624Skmacy uint64_t hid4; /* debug only */ 90181624Skmacy uint64_t dar; /* debug only */ 91181624Skmacy uint32_t dsisr; /* debug only */ 92181624Skmacy uint32_t cr; 93181624Skmacy uint32_t __pad; /* good spot for another 32bit reg */ 94181624Skmacy uint32_t entry_vector; 95181624Skmacy}; 96181624Skmacytypedef struct cpu_user_regs cpu_user_regs_t; 97181624Skmacy 98181624Skmacytypedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */ /* XXX timebase */ 99181624Skmacy 100181624Skmacy/* ONLY used to communicate with dom0! See also struct exec_domain. */ 101181624Skmacystruct vcpu_guest_context { 102181624Skmacy cpu_user_regs_t user_regs; /* User-level CPU registers */ 103181624Skmacy uint64_t sdr1; /* Pagetable base */ 104181624Skmacy /* XXX etc */ 105181624Skmacy}; 106181624Skmacytypedef struct vcpu_guest_context vcpu_guest_context_t; 107181624SkmacyDEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); 108181624Skmacy 109181624Skmacystruct arch_shared_info { 110181624Skmacy uint64_t boot_timebase; 111181624Skmacy}; 112181624Skmacy 113181624Skmacystruct arch_vcpu_info { 114181624Skmacy}; 115181624Skmacy 116181624Skmacy/* Support for multi-processor guests. */ 117181624Skmacy#define MAX_VIRT_CPUS 32 118181624Skmacy#endif 119181624Skmacy 120181624Skmacy#endif 121