1211820Sjhb/*- 2211820Sjhb * Copyright (c) 2010 Advanced Computing Technologies LLC 3211820Sjhb * Written by: John H. Baldwin <jhb@FreeBSD.org> 4211820Sjhb * All rights reserved. 5211820Sjhb * 6211820Sjhb * Redistribution and use in source and binary forms, with or without 7211820Sjhb * modification, are permitted provided that the following conditions 8211820Sjhb * are met: 9211820Sjhb * 1. Redistributions of source code must retain the above copyright 10211820Sjhb * notice, this list of conditions and the following disclaimer. 11211820Sjhb * 2. Redistributions in binary form must reproduce the above copyright 12211820Sjhb * notice, this list of conditions and the following disclaimer in the 13211820Sjhb * documentation and/or other materials provided with the distribution. 14211820Sjhb * 15211820Sjhb * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16211820Sjhb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17211820Sjhb * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18211820Sjhb * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19211820Sjhb * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20211820Sjhb * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21211820Sjhb * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22211820Sjhb * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23211820Sjhb * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24211820Sjhb * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25211820Sjhb * SUCH DAMAGE. 26211820Sjhb */ 27211820Sjhb 28211820Sjhb/* 29211820Sjhb * This driver provides a psuedo-bus to enumerate the PCI buses 30211820Sjhb * present on a sytem using a QPI chipset. It creates a qpi0 bus that 31211820Sjhb * is a child of nexus0 and then creates two Host-PCI bridges as a 32211820Sjhb * child of that. 33211820Sjhb */ 34211820Sjhb 35211820Sjhb#include <sys/cdefs.h> 36211820Sjhb__FBSDID("$FreeBSD$"); 37211820Sjhb 38211820Sjhb#include <sys/param.h> 39211820Sjhb#include <sys/bus.h> 40211820Sjhb#include <sys/kernel.h> 41211820Sjhb#include <sys/malloc.h> 42211820Sjhb#include <sys/module.h> 43221393Sjhb#include <sys/rman.h> 44211820Sjhb#include <sys/systm.h> 45211820Sjhb 46211820Sjhb#include <machine/cputypes.h> 47211820Sjhb#include <machine/md_var.h> 48211820Sjhb#include <machine/pci_cfgreg.h> 49211820Sjhb#include <machine/specialreg.h> 50211820Sjhb 51212292Sjhb#include <dev/pci/pcireg.h> 52211820Sjhb#include <dev/pci/pcivar.h> 53211820Sjhb#include <dev/pci/pcib_private.h> 54211820Sjhb#include "pcib_if.h" 55211820Sjhb 56211820Sjhbstruct qpi_device { 57211820Sjhb int qd_pcibus; 58211820Sjhb}; 59211820Sjhb 60211820Sjhbstatic MALLOC_DEFINE(M_QPI, "qpidrv", "qpi system device"); 61211820Sjhb 62211820Sjhbstatic void 63211820Sjhbqpi_identify(driver_t *driver, device_t parent) 64211820Sjhb{ 65211820Sjhb 66211820Sjhb /* Check CPUID to ensure this is an i7 CPU of some sort. */ 67211821Sjhb if (!(cpu_vendor_id == CPU_VENDOR_INTEL && 68211821Sjhb CPUID_TO_FAMILY(cpu_id) == 0x6 && 69211820Sjhb (CPUID_TO_MODEL(cpu_id) == 0x1a || CPUID_TO_MODEL(cpu_id) == 0x2c))) 70211820Sjhb return; 71211820Sjhb 72211820Sjhb /* PCI config register access is required. */ 73211820Sjhb if (pci_cfgregopen() == 0) 74211820Sjhb return; 75211820Sjhb 76211820Sjhb /* Add a qpi bus device. */ 77211820Sjhb if (BUS_ADD_CHILD(parent, 20, "qpi", -1) == NULL) 78211820Sjhb panic("Failed to add qpi bus"); 79211820Sjhb} 80211820Sjhb 81211820Sjhbstatic int 82211820Sjhbqpi_probe(device_t dev) 83211820Sjhb{ 84211820Sjhb 85211820Sjhb device_set_desc(dev, "QPI system bus"); 86211820Sjhb return (BUS_PROBE_SPECIFIC); 87211820Sjhb} 88211820Sjhb 89212292Sjhb/* 90212292Sjhb * Look for a PCI bus with the specified bus address. If one is found, 91212292Sjhb * add a pcib device and return 0. Otherwise, return an error code. 92212292Sjhb */ 93211820Sjhbstatic int 94212292Sjhbqpi_probe_pcib(device_t dev, int bus) 95211820Sjhb{ 96211820Sjhb struct qpi_device *qdev; 97211820Sjhb device_t child; 98212292Sjhb uint32_t devid; 99211820Sjhb 100211820Sjhb /* 101212292Sjhb * If a PCI bus already exists for this bus number, then 102212292Sjhb * fail. 103211820Sjhb */ 104212292Sjhb if (pci_find_bsf(bus, 0, 0) != NULL) 105212292Sjhb return (EEXIST); 106211820Sjhb 107212292Sjhb /* 108212292Sjhb * Attempt to read the device id for device 0, function 0 on 109212292Sjhb * the bus. A value of 0xffffffff means that the bus is not 110212292Sjhb * present. 111212292Sjhb */ 112212292Sjhb devid = pci_cfgregread(bus, 0, 0, PCIR_DEVVENDOR, 4); 113212292Sjhb if (devid == 0xffffffff) 114212292Sjhb return (ENOENT); 115212292Sjhb 116212292Sjhb if ((devid & 0xffff) != 0x8086) { 117212292Sjhb device_printf(dev, 118212292Sjhb "Device at pci%d.0.0 has non-Intel vendor 0x%x\n", bus, 119212292Sjhb devid & 0xffff); 120212292Sjhb return (ENXIO); 121212292Sjhb } 122212292Sjhb 123211820Sjhb child = BUS_ADD_CHILD(dev, 0, "pcib", -1); 124211820Sjhb if (child == NULL) 125212292Sjhb panic("%s: failed to add pci bus %d", device_get_nameunit(dev), 126212292Sjhb bus); 127211820Sjhb qdev = malloc(sizeof(struct qpi_device), M_QPI, M_WAITOK); 128212292Sjhb qdev->qd_pcibus = bus; 129211820Sjhb device_set_ivars(child, qdev); 130212292Sjhb return (0); 131212292Sjhb} 132211820Sjhb 133212292Sjhbstatic int 134212292Sjhbqpi_attach(device_t dev) 135212292Sjhb{ 136212292Sjhb int bus; 137212292Sjhb 138212292Sjhb /* 139212292Sjhb * Each processor socket has a dedicated PCI bus counting down from 140212292Sjhb * 255. We keep probing buses until one fails. 141212292Sjhb */ 142212292Sjhb for (bus = 255;; bus--) 143212292Sjhb if (qpi_probe_pcib(dev, bus) != 0) 144212292Sjhb break; 145212292Sjhb 146211820Sjhb return (bus_generic_attach(dev)); 147211820Sjhb} 148211820Sjhb 149211820Sjhbstatic int 150211820Sjhbqpi_print_child(device_t bus, device_t child) 151211820Sjhb{ 152211820Sjhb struct qpi_device *qdev; 153211820Sjhb int retval = 0; 154211820Sjhb 155211820Sjhb qdev = device_get_ivars(child); 156211820Sjhb retval += bus_print_child_header(bus, child); 157211820Sjhb if (qdev->qd_pcibus != -1) 158211820Sjhb retval += printf(" pcibus %d", qdev->qd_pcibus); 159211820Sjhb retval += bus_print_child_footer(bus, child); 160211820Sjhb 161211820Sjhb return (retval); 162211820Sjhb} 163211820Sjhb 164211820Sjhbstatic int 165211820Sjhbqpi_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 166211820Sjhb{ 167211820Sjhb struct qpi_device *qdev; 168211820Sjhb 169211820Sjhb qdev = device_get_ivars(child); 170211820Sjhb switch (which) { 171211820Sjhb case PCIB_IVAR_BUS: 172211820Sjhb *result = qdev->qd_pcibus; 173211820Sjhb break; 174211820Sjhb default: 175211820Sjhb return (ENOENT); 176211820Sjhb } 177211820Sjhb return (0); 178211820Sjhb} 179211820Sjhb 180211820Sjhbstatic device_method_t qpi_methods[] = { 181211820Sjhb /* Device interface */ 182211820Sjhb DEVMETHOD(device_identify, qpi_identify), 183211820Sjhb DEVMETHOD(device_probe, qpi_probe), 184211820Sjhb DEVMETHOD(device_attach, qpi_attach), 185211820Sjhb DEVMETHOD(device_shutdown, bus_generic_shutdown), 186211820Sjhb DEVMETHOD(device_suspend, bus_generic_suspend), 187211820Sjhb DEVMETHOD(device_resume, bus_generic_resume), 188211820Sjhb 189211820Sjhb /* Bus interface */ 190211820Sjhb DEVMETHOD(bus_print_child, qpi_print_child), 191211820Sjhb DEVMETHOD(bus_add_child, bus_generic_add_child), 192211820Sjhb DEVMETHOD(bus_read_ivar, qpi_read_ivar), 193211820Sjhb DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), 194211820Sjhb DEVMETHOD(bus_release_resource, bus_generic_release_resource), 195211820Sjhb DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 196211820Sjhb DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 197211820Sjhb DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 198211820Sjhb DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 199211820Sjhb 200211820Sjhb { 0, 0 } 201211820Sjhb}; 202211820Sjhb 203211820Sjhbstatic devclass_t qpi_devclass; 204211820Sjhb 205211820SjhbDEFINE_CLASS_0(qpi, qpi_driver, qpi_methods, 0); 206211820SjhbDRIVER_MODULE(qpi, nexus, qpi_driver, qpi_devclass, 0, 0); 207211820Sjhb 208211820Sjhbstatic int 209211820Sjhbqpi_pcib_probe(device_t dev) 210211820Sjhb{ 211211820Sjhb 212211820Sjhb device_set_desc(dev, "QPI Host-PCI bridge"); 213211820Sjhb return (BUS_PROBE_SPECIFIC); 214211820Sjhb} 215211820Sjhb 216211820Sjhbstatic int 217211820Sjhbqpi_pcib_attach(device_t dev) 218211820Sjhb{ 219211820Sjhb 220211820Sjhb device_add_child(dev, "pci", pcib_get_bus(dev)); 221211820Sjhb return (bus_generic_attach(dev)); 222211820Sjhb} 223211820Sjhb 224211820Sjhbstatic int 225211820Sjhbqpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 226211820Sjhb{ 227211820Sjhb 228211820Sjhb switch (which) { 229211820Sjhb case PCIB_IVAR_DOMAIN: 230211820Sjhb *result = 0; 231211820Sjhb return (0); 232211820Sjhb case PCIB_IVAR_BUS: 233211820Sjhb *result = pcib_get_bus(dev); 234211820Sjhb return (0); 235211820Sjhb default: 236211820Sjhb return (ENOENT); 237211820Sjhb } 238211820Sjhb} 239211820Sjhb 240211820Sjhbstatic uint32_t 241211820Sjhbqpi_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func, 242211820Sjhb u_int reg, int bytes) 243211820Sjhb{ 244211820Sjhb 245211820Sjhb return (pci_cfgregread(bus, slot, func, reg, bytes)); 246211820Sjhb} 247211820Sjhb 248211820Sjhbstatic void 249211820Sjhbqpi_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func, 250211820Sjhb u_int reg, uint32_t data, int bytes) 251211820Sjhb{ 252211820Sjhb 253211820Sjhb pci_cfgregwrite(bus, slot, func, reg, data, bytes); 254211820Sjhb} 255211820Sjhb 256211820Sjhbstatic int 257211820Sjhbqpi_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, 258211820Sjhb int *irqs) 259211820Sjhb{ 260211820Sjhb device_t bus; 261211820Sjhb 262211820Sjhb bus = device_get_parent(pcib); 263211820Sjhb return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount, 264211820Sjhb irqs)); 265211820Sjhb} 266211820Sjhb 267211820Sjhbstatic int 268211820Sjhbqpi_pcib_alloc_msix(device_t pcib, device_t dev, int *irq) 269211820Sjhb{ 270211820Sjhb device_t bus; 271211820Sjhb 272211820Sjhb bus = device_get_parent(pcib); 273211820Sjhb return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq)); 274211820Sjhb} 275211820Sjhb 276211820Sjhbstatic int 277211820Sjhbqpi_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr, 278211820Sjhb uint32_t *data) 279211820Sjhb{ 280211820Sjhb device_t bus; 281211820Sjhb 282211820Sjhb bus = device_get_parent(pcib); 283211820Sjhb return (PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data)); 284211820Sjhb} 285211820Sjhb 286211820Sjhbstatic device_method_t qpi_pcib_methods[] = { 287211820Sjhb /* Device interface */ 288211820Sjhb DEVMETHOD(device_probe, qpi_pcib_probe), 289211820Sjhb DEVMETHOD(device_attach, qpi_pcib_attach), 290211820Sjhb DEVMETHOD(device_shutdown, bus_generic_shutdown), 291211820Sjhb DEVMETHOD(device_suspend, bus_generic_suspend), 292211820Sjhb DEVMETHOD(device_resume, bus_generic_resume), 293211820Sjhb 294211820Sjhb /* Bus interface */ 295211820Sjhb DEVMETHOD(bus_read_ivar, qpi_pcib_read_ivar), 296211820Sjhb DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), 297211820Sjhb DEVMETHOD(bus_release_resource, bus_generic_release_resource), 298211820Sjhb DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 299211820Sjhb DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 300211820Sjhb DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 301211820Sjhb DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 302211820Sjhb 303211820Sjhb /* pcib interface */ 304211820Sjhb DEVMETHOD(pcib_maxslots, pcib_maxslots), 305211820Sjhb DEVMETHOD(pcib_read_config, qpi_pcib_read_config), 306211820Sjhb DEVMETHOD(pcib_write_config, qpi_pcib_write_config), 307211820Sjhb DEVMETHOD(pcib_alloc_msi, qpi_pcib_alloc_msi), 308211820Sjhb DEVMETHOD(pcib_release_msi, pcib_release_msi), 309211820Sjhb DEVMETHOD(pcib_alloc_msix, qpi_pcib_alloc_msix), 310211820Sjhb DEVMETHOD(pcib_release_msix, pcib_release_msix), 311211820Sjhb DEVMETHOD(pcib_map_msi, qpi_pcib_map_msi), 312211820Sjhb 313229093Shselasky DEVMETHOD_END 314211820Sjhb}; 315211820Sjhb 316211820Sjhbstatic devclass_t qpi_pcib_devclass; 317211820Sjhb 318211820SjhbDEFINE_CLASS_0(pcib, qpi_pcib_driver, qpi_pcib_methods, 0); 319211820SjhbDRIVER_MODULE(pcib, qpi, qpi_pcib_driver, qpi_pcib_devclass, 0, 0); 320