sbus.c revision 90618
190618Stmm/*- 290618Stmm * Copyright (c) 1998 The NetBSD Foundation, Inc. 390618Stmm * All rights reserved. 490618Stmm * 590618Stmm * This code is derived from software contributed to The NetBSD Foundation 690618Stmm * by Paul Kranenburg. 790618Stmm * 890618Stmm * Redistribution and use in source and binary forms, with or without 990618Stmm * modification, are permitted provided that the following conditions 1090618Stmm * are met: 1190618Stmm * 1. Redistributions of source code must retain the above copyright 1290618Stmm * notice, this list of conditions and the following disclaimer. 1390618Stmm * 2. Redistributions in binary form must reproduce the above copyright 1490618Stmm * notice, this list of conditions and the following disclaimer in the 1590618Stmm * documentation and/or other materials provided with the distribution. 1690618Stmm * 3. All advertising materials mentioning features or use of this software 1790618Stmm * must display the following acknowledgement: 1890618Stmm * This product includes software developed by the NetBSD 1990618Stmm * Foundation, Inc. and its contributors. 2090618Stmm * 4. Neither the name of The NetBSD Foundation nor the names of its 2190618Stmm * contributors may be used to endorse or promote products derived 2290618Stmm * from this software without specific prior written permission. 2390618Stmm * 2490618Stmm * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 2590618Stmm * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 2690618Stmm * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 2790618Stmm * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 2890618Stmm * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2990618Stmm * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 3090618Stmm * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 3190618Stmm * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 3290618Stmm * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3390618Stmm * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 3490618Stmm * POSSIBILITY OF SUCH DAMAGE. 3590618Stmm */ 3690618Stmm/* 3790618Stmm * Copyright (c) 1992, 1993 3890618Stmm * The Regents of the University of California. All rights reserved. 3990618Stmm * 4090618Stmm * This software was developed by the Computer Systems Engineering group 4190618Stmm * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 4290618Stmm * contributed to Berkeley. 4390618Stmm * 4490618Stmm * All advertising materials mentioning features or use of this software 4590618Stmm * must display the following acknowledgement: 4690618Stmm * This product includes software developed by the University of 4790618Stmm * California, Lawrence Berkeley Laboratory. 4890618Stmm * 4990618Stmm * Redistribution and use in source and binary forms, with or without 5090618Stmm * modification, are permitted provided that the following conditions 5190618Stmm * are met: 5290618Stmm * 1. Redistributions of source code must retain the above copyright 5390618Stmm * notice, this list of conditions and the following disclaimer. 5490618Stmm * 2. Redistributions in binary form must reproduce the above copyright 5590618Stmm * notice, this list of conditions and the following disclaimer in the 5690618Stmm * documentation and/or other materials provided with the distribution. 5790618Stmm * 3. All advertising materials mentioning features or use of this software 5890618Stmm * must display the following acknowledgement: 5990618Stmm * This product includes software developed by the University of 6090618Stmm * California, Berkeley and its contributors. 6190618Stmm * 4. Neither the name of the University nor the names of its contributors 6290618Stmm * may be used to endorse or promote products derived from this software 6390618Stmm * without specific prior written permission. 6490618Stmm * 6590618Stmm * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 6690618Stmm * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 6790618Stmm * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 6890618Stmm * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 6990618Stmm * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 7090618Stmm * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 7190618Stmm * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 7290618Stmm * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 7390618Stmm * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 7490618Stmm * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 7590618Stmm * SUCH DAMAGE. 7690618Stmm */ 7790618Stmm/* 7890618Stmm * Copyright (c) 1999 Eduardo Horvath 7990618Stmm * Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>. 8090618Stmm * All rights reserved. 8190618Stmm * 8290618Stmm * Redistribution and use in source and binary forms, with or without 8390618Stmm * modification, are permitted provided that the following conditions 8490618Stmm * are met: 8590618Stmm * 1. Redistributions of source code must retain the above copyright 8690618Stmm * notice, this list of conditions and the following disclaimer. 8790618Stmm * 8890618Stmm * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 8990618Stmm * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 9090618Stmm * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 9190618Stmm * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 9290618Stmm * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 9390618Stmm * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 9490618Stmm * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 9590618Stmm * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 9690618Stmm * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 9790618Stmm * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 9890618Stmm * SUCH DAMAGE. 9990618Stmm * 10090618Stmm * from: @(#)sbus.c 8.1 (Berkeley) 6/11/93 10190618Stmm * from: NetBSD: sbus.c,v 1.46 2001/10/07 20:30:41 eeh Exp 10290618Stmm * 10390618Stmm * $FreeBSD: head/sys/sparc64/sbus/sbus.c 90618 2002-02-13 16:11:36Z tmm $ 10490618Stmm */ 10590618Stmm 10690618Stmm/* 10790618Stmm * Sbus support. 10890618Stmm */ 10990618Stmm#include <sys/param.h> 11090618Stmm#include <sys/systm.h> 11190618Stmm#include <sys/bus.h> 11290618Stmm#include <sys/kernel.h> 11390618Stmm#include <sys/malloc.h> 11490618Stmm#include <sys/reboot.h> 11590618Stmm 11690618Stmm#include <ofw/openfirm.h> 11790618Stmm 11890618Stmm#include <machine/bus.h> 11990618Stmm#include <machine/iommureg.h> 12090618Stmm#include <machine/bus_common.h> 12190618Stmm#include <machine/frame.h> 12290618Stmm#include <machine/intr_machdep.h> 12390618Stmm#include <machine/nexusvar.h> 12490618Stmm#include <machine/ofw_upa.h> 12590618Stmm#include <machine/resource.h> 12690618Stmm 12790618Stmm#include <sys/rman.h> 12890618Stmm 12990618Stmm#include <machine/iommuvar.h> 13090618Stmm 13190618Stmm#include <sparc64/sbus/ofw_sbus.h> 13290618Stmm#include <sparc64/sbus/sbusreg.h> 13390618Stmm#include <sparc64/sbus/sbusvar.h> 13490618Stmm 13590618Stmm 13690618Stmm#ifdef DEBUG 13790618Stmm#define SDB_DVMA 0x1 13890618Stmm#define SDB_INTR 0x2 13990618Stmmint sbus_debug = 0; 14090618Stmm#define DPRINTF(l, s) do { if (sbus_debug & l) printf s; } while (0) 14190618Stmm#else 14290618Stmm#define DPRINTF(l, s) 14390618Stmm#endif 14490618Stmm 14590618Stmmstruct sbus_devinfo { 14690618Stmm int sdi_burstsz; 14790618Stmm char *sdi_compat; 14890618Stmm char *sdi_name; /* PROM name */ 14990618Stmm phandle_t sdi_node; /* PROM node */ 15090618Stmm int sdi_slot; 15190618Stmm char *sdi_type; /* PROM name */ 15290618Stmm 15390618Stmm struct resource_list sdi_rl; 15490618Stmm}; 15590618Stmm 15690618Stmm/* Range descriptor, allocated for each sc_range. */ 15790618Stmmstruct sbus_rd { 15890618Stmm bus_addr_t rd_poffset; 15990618Stmm bus_addr_t rd_pend; 16090618Stmm int rd_slot; 16190618Stmm bus_addr_t rd_coffset; 16290618Stmm bus_addr_t rd_cend; 16390618Stmm struct rman rd_rman; 16490618Stmm bus_space_handle_t rd_bushandle; 16590618Stmm struct resource *rd_res; 16690618Stmm}; 16790618Stmm 16890618Stmmstruct sbus_softc { 16990618Stmm bus_space_tag_t sc_bustag; 17090618Stmm bus_space_handle_t sc_bushandle; 17190618Stmm bus_dma_tag_t sc_dmatag; 17290618Stmm bus_dma_tag_t sc_cdmatag; 17390618Stmm bus_space_tag_t sc_cbustag; 17490618Stmm int sc_clockfreq; /* clock frequency (in Hz) */ 17590618Stmm struct upa_regs *sc_reg; 17690618Stmm int sc_nreg; 17790618Stmm int sc_nrange; 17890618Stmm struct sbus_rd *sc_rd; 17990618Stmm int sc_burst; /* burst transfer sizes supported */ 18090618Stmm int *sc_intr_compat;/* `intr' property to sbus compat */ 18190618Stmm 18290618Stmm struct resource *sc_sysio_res; 18390618Stmm int sc_ign; /* Interrupt group number for this sysio */ 18490618Stmm struct iommu_state sc_is; /* IOMMU state, see iommureg.h */ 18590618Stmm 18690618Stmm struct resource *sc_ot_ires; 18790618Stmm void *sc_ot_ihand; 18890618Stmm struct resource *sc_pf_ires; 18990618Stmm void *sc_pf_ihand; 19090618Stmm}; 19190618Stmm 19290618Stmmstruct sbus_clr { 19390618Stmm struct sbus_softc *scl_sc; 19490618Stmm bus_addr_t scl_clr; /* clear register */ 19590618Stmm driver_intr_t *scl_handler; /* handler to call */ 19690618Stmm void *scl_arg; /* argument for the handler */ 19790618Stmm void *scl_cookie; /* interrupt cookie of parent bus */ 19890618Stmm}; 19990618Stmm 20090618Stmm#define SYSIO_READ8(sc, off) \ 20190618Stmm bus_space_read_8((sc)->sc_bustag, (sc)->sc_bushandle, (off)) 20290618Stmm#define SYSIO_WRITE8(sc, off, v) \ 20390618Stmm bus_space_write_8((sc)->sc_bustag, (sc)->sc_bushandle, (off), (v)) 20490618Stmm 20590618Stmmstatic int sbus_probe(device_t dev); 20690618Stmmstatic int sbus_print_child(device_t dev, device_t child); 20790618Stmmstatic void sbus_probe_nomatch(device_t dev, device_t child); 20890618Stmmstatic int sbus_read_ivar(device_t, device_t, int, u_long *); 20990618Stmmstatic struct resource_list *sbus_get_resource_list(device_t dev, 21090618Stmm device_t child); 21190618Stmmstatic int sbus_setup_intr(device_t, device_t, struct resource *, int, 21290618Stmm driver_intr_t *, void *, void **); 21390618Stmmstatic int sbus_teardown_intr(device_t, device_t, struct resource *, void *); 21490618Stmmstatic struct resource *sbus_alloc_resource(device_t, device_t, int, int *, 21590618Stmm u_long, u_long, u_long, u_int); 21690618Stmmstatic int sbus_activate_resource(device_t, device_t, int, int, 21790618Stmm struct resource *); 21890618Stmmstatic int sbus_deactivate_resource(device_t, device_t, int, int, 21990618Stmm struct resource *); 22090618Stmmstatic int sbus_release_resource(device_t, device_t, int, int, 22190618Stmm struct resource *); 22290618Stmm 22390618Stmmstatic struct sbus_devinfo * sbus_setup_dinfo(struct sbus_softc *sc, 22490618Stmm phandle_t node, char *name); 22590618Stmmstatic void sbus_destroy_dinfo(struct sbus_devinfo *dinfo); 22690618Stmmstatic void sbus_intr_stub(void *); 22790618Stmmstatic bus_space_tag_t sbus_alloc_bustag(struct sbus_softc *); 22890618Stmmstatic void sbus_overtemp(void *); 22990618Stmmstatic void sbus_pwrfail(void *); 23090618Stmm 23190618Stmm/* 23290618Stmm * DVMA routines 23390618Stmm */ 23490618Stmmstatic int sbus_dmamap_create(bus_dma_tag_t, int, bus_dmamap_t *); 23590618Stmmstatic int sbus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 23690618Stmmstatic int sbus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, bus_size_t, 23790618Stmm bus_dmamap_callback_t *, void *, int); 23890618Stmmstatic void sbus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 23990618Stmmstatic void sbus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_dmasync_op_t); 24090618Stmmstatic int sbus_dmamem_alloc(bus_dma_tag_t, void **, int, bus_dmamap_t *); 24190618Stmmstatic void sbus_dmamem_free(bus_dma_tag_t, void *, bus_dmamap_t); 24290618Stmm 24390618Stmmstatic device_method_t sbus_methods[] = { 24490618Stmm /* Device interface */ 24590618Stmm DEVMETHOD(device_probe, sbus_probe), 24690618Stmm DEVMETHOD(device_attach, bus_generic_attach), 24790618Stmm 24890618Stmm /* Bus interface */ 24990618Stmm DEVMETHOD(bus_print_child, sbus_print_child), 25090618Stmm DEVMETHOD(bus_probe_nomatch, sbus_probe_nomatch), 25190618Stmm DEVMETHOD(bus_read_ivar, sbus_read_ivar), 25290618Stmm DEVMETHOD(bus_setup_intr, sbus_setup_intr), 25390618Stmm DEVMETHOD(bus_teardown_intr, sbus_teardown_intr), 25490618Stmm DEVMETHOD(bus_alloc_resource, sbus_alloc_resource), 25590618Stmm DEVMETHOD(bus_activate_resource, sbus_activate_resource), 25690618Stmm DEVMETHOD(bus_deactivate_resource, sbus_deactivate_resource), 25790618Stmm DEVMETHOD(bus_release_resource, sbus_release_resource), 25890618Stmm DEVMETHOD(bus_get_resource_list, sbus_get_resource_list), 25990618Stmm DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 26090618Stmm 26190618Stmm { 0, 0 } 26290618Stmm}; 26390618Stmm 26490618Stmmstatic driver_t sbus_driver = { 26590618Stmm "sbus", 26690618Stmm sbus_methods, 26790618Stmm sizeof(struct sbus_softc), 26890618Stmm}; 26990618Stmm 27090618Stmmstatic devclass_t sbus_devclass; 27190618Stmm 27290618StmmDRIVER_MODULE(sbus, nexus, sbus_driver, sbus_devclass, 0, 0); 27390618Stmm 27490618Stmm/* 27590618Stmm * This value is or'ed into the attach args' interrupt level cookie 27690618Stmm * if the interrupt level comes from an `intr' property, i.e. it is 27790618Stmm * not an Sbus interrupt level. 27890618Stmm */ 27990618Stmm#define SBUS_INTR_COMPAT 0x80000000 28090618Stmm#define SBUS_MEM_SIZE 0x100000000 28190618Stmm#define OFW_SBUS_TYPE "sbus" 28290618Stmm#define OFW_SBUS_NAME "sbus" 28390618Stmm 28490618Stmmstatic int 28590618Stmmsbus_probe(device_t dev) 28690618Stmm{ 28790618Stmm struct sbus_softc *sc = device_get_softc(dev); 28890618Stmm struct sbus_devinfo *sdi; 28990618Stmm struct sbus_ranges *range; 29090618Stmm struct resource *res; 29190618Stmm device_t cdev; 29290618Stmm bus_addr_t phys; 29390618Stmm bus_size_t size; 29490618Stmm char *name, *cname, *t; 29590618Stmm phandle_t child, node = nexus_get_node(dev); 29690618Stmm u_long da; 29790618Stmm u_int64_t mr; 29890618Stmm int intr, clock, rid, vec, i; 29990618Stmm 30090618Stmm t = nexus_get_device_type(dev); 30190618Stmm if (((t == NULL || strcmp(t, OFW_SBUS_TYPE) != 0)) && 30290618Stmm strcmp(nexus_get_name(dev), OFW_SBUS_NAME) != 0) 30390618Stmm return (ENXIO); 30490618Stmm device_set_desc(dev, "U2S UPA-SBus bridge"); 30590618Stmm 30690618Stmm if ((sc->sc_nreg = OF_getprop_alloc(node, "reg", sizeof(*sc->sc_reg), 30790618Stmm (void **)&sc->sc_reg)) == -1) { 30890618Stmm panic("sbus_probe: error getting reg property"); 30990618Stmm } 31090618Stmm if (sc->sc_nreg < 1) 31190618Stmm panic("sbus_probe: bogus properties"); 31290618Stmm phys = UPA_REG_PHYS(&sc->sc_reg[0]); 31390618Stmm size = UPA_REG_SIZE(&sc->sc_reg[0]); 31490618Stmm rid = 0; 31590618Stmm sc->sc_sysio_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, phys, 31690618Stmm phys + size - 1, size, RF_ACTIVE); 31790618Stmm if (sc->sc_sysio_res == NULL || 31890618Stmm rman_get_start(sc->sc_sysio_res) != phys) 31990618Stmm panic("sbus_probe: can't allocate device memory"); 32090618Stmm sc->sc_bustag = rman_get_bustag(sc->sc_sysio_res); 32190618Stmm sc->sc_bushandle = rman_get_bushandle(sc->sc_sysio_res); 32290618Stmm 32390618Stmm if (OF_getprop(node, "interrupts", &intr, sizeof(intr)) == -1) 32490618Stmm panic("sbus_probe: cannot get IGN"); 32590618Stmm sc->sc_ign = intr & INTMAP_IGN; /* Find interrupt group no */ 32690618Stmm sc->sc_cbustag = sbus_alloc_bustag(sc); 32790618Stmm 32890618Stmm /* 32990618Stmm * Record clock frequency for synchronous SCSI. 33090618Stmm * IS THIS THE CORRECT DEFAULT?? 33190618Stmm */ 33290618Stmm if (OF_getprop(node, "clock-frequency", &clock, sizeof(clock)) == -1) 33390618Stmm clock = 25000000; 33490618Stmm sc->sc_clockfreq = clock; 33590618Stmm clock /= 1000; 33690618Stmm device_printf(dev, "clock %d.%03d MHz\n", clock / 1000, clock % 1000); 33790618Stmm 33890618Stmm sc->sc_dmatag = nexus_get_dmatag(dev); 33990618Stmm if (bus_dma_tag_create(sc->sc_dmatag, 8, 1, 0, 0x3ffffffff, NULL, NULL, 34090618Stmm 0x3ffffffff, 0xff, 0xffffffff, 0, &sc->sc_cdmatag) != 0) 34190618Stmm panic("bus_dma_tag_create failed"); 34290618Stmm /* Customize the tag */ 34390618Stmm sc->sc_cdmatag->cookie = sc; 34490618Stmm sc->sc_cdmatag->dmamap_create = sbus_dmamap_create; 34590618Stmm sc->sc_cdmatag->dmamap_destroy = sbus_dmamap_destroy; 34690618Stmm sc->sc_cdmatag->dmamap_load = sbus_dmamap_load; 34790618Stmm sc->sc_cdmatag->dmamap_unload = sbus_dmamap_unload; 34890618Stmm sc->sc_cdmatag->dmamap_sync = sbus_dmamap_sync; 34990618Stmm sc->sc_cdmatag->dmamem_alloc = sbus_dmamem_alloc; 35090618Stmm sc->sc_cdmatag->dmamem_free = sbus_dmamem_free; 35190618Stmm /* XXX: register as root dma tag (kluge). */ 35290618Stmm sparc64_root_dma_tag = sc->sc_cdmatag; 35390618Stmm 35490618Stmm /* 35590618Stmm * Collect address translations from the OBP. 35690618Stmm */ 35790618Stmm if ((sc->sc_nrange = OF_getprop_alloc(node, "ranges", 35890618Stmm sizeof(*range), (void **)&range)) == -1) { 35990618Stmm panic("%s: error getting ranges property", 36090618Stmm device_get_name(dev)); 36190618Stmm } 36290618Stmm sc->sc_rd = (struct sbus_rd *)malloc(sizeof(*sc->sc_rd) * sc->sc_nrange, 36390618Stmm M_DEVBUF, M_NOWAIT); 36490618Stmm if (sc->sc_rd == NULL) 36590618Stmm panic("sbus_probe: could not allocate rmans"); 36690618Stmm /* 36790618Stmm * Preallocate all space that the SBus bridge decodes, so that nothing 36890618Stmm * else gets in the way; set up rmans etc. 36990618Stmm */ 37090618Stmm for (i = 0; i < sc->sc_nrange; i++) { 37190618Stmm phys = range[i].poffset | ((bus_addr_t)range[i].pspace << 32); 37290618Stmm size = range[i].size; 37390618Stmm sc->sc_rd[i].rd_slot = range[i].cspace; 37490618Stmm sc->sc_rd[i].rd_coffset = range[i].coffset; 37590618Stmm sc->sc_rd[i].rd_cend = sc->sc_rd[i].rd_coffset + size; 37690618Stmm rid = 0; 37790618Stmm if ((res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, phys, 37890618Stmm phys + size - 1, size, RF_ACTIVE)) == NULL) 37990618Stmm panic("sbus_probe: could not allocate decoded range"); 38090618Stmm sc->sc_rd[i].rd_bushandle = rman_get_bushandle(res); 38190618Stmm sc->sc_rd[i].rd_rman.rm_type = RMAN_ARRAY; 38290618Stmm sc->sc_rd[i].rd_rman.rm_descr = "SBus Device Memory"; 38390618Stmm if (rman_init(&sc->sc_rd[i].rd_rman) != 0 || 38490618Stmm rman_manage_region(&sc->sc_rd[i].rd_rman, 0, size) != 0) 38590618Stmm panic("psycho_probe: failed to set up memory rman"); 38690618Stmm sc->sc_rd[i].rd_poffset = phys; 38790618Stmm sc->sc_rd[i].rd_pend = phys + size; 38890618Stmm sc->sc_rd[i].rd_res = res; 38990618Stmm } 39090618Stmm free(range, M_OFWPROP); 39190618Stmm 39290618Stmm /* 39390618Stmm * Get the SBus burst transfer size if burst transfers are supported. 39490618Stmm * XXX: is the default correct? 39590618Stmm */ 39690618Stmm if (OF_getprop(node, "burst-sizes", &sc->sc_burst, 39790618Stmm sizeof(sc->sc_burst)) == -1 || sc->sc_burst == 0) 39890618Stmm sc->sc_burst = SBUS_BURST_DEF; 39990618Stmm 40090618Stmm /* initalise the IOMMU */ 40190618Stmm 40290618Stmm /* punch in our copies */ 40390618Stmm sc->sc_is.is_bustag = sc->sc_bustag; 40490618Stmm sc->sc_is.is_bushandle = sc->sc_bushandle; 40590618Stmm sc->sc_is.is_iommu = SBR_IOMMU; 40690618Stmm sc->sc_is.is_dtag = SBR_IOMMU_TLB_TAG_DIAG; 40790618Stmm sc->sc_is.is_ddram = SBR_IOMMU_TLB_DATA_DIAG; 40890618Stmm sc->sc_is.is_dqueue = SBR_IOMMU_QUEUE_DIAG; 40990618Stmm sc->sc_is.is_dva = SBR_IOMMU_SVADIAG; 41090618Stmm sc->sc_is.is_dtcmp = 0; 41190618Stmm sc->sc_is.is_sb[0] = SBR_STRBUF; 41290618Stmm sc->sc_is.is_sb[1] = NULL; 41390618Stmm 41490618Stmm /* give us a nice name.. */ 41590618Stmm name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 41690618Stmm if (name == 0) 41790618Stmm panic("sbus_probe: couldn't malloc iommu name"); 41890618Stmm snprintf(name, 32, "%s dvma", device_get_name(dev)); 41990618Stmm 42090618Stmm iommu_init(name, &sc->sc_is, 0, -1); 42190618Stmm 42290618Stmm /* Enable the over-temperature and power-fail intrrupts. */ 42390618Stmm rid = 0; 42490618Stmm mr = SYSIO_READ8(sc, SBR_THERM_INT_MAP); 42590618Stmm vec = INTVEC(mr); 42690618Stmm if ((sc->sc_ot_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, vec, 42790618Stmm vec, 1, RF_ACTIVE)) == NULL) 42890618Stmm panic("sbus_probe: failed to get temperature interrupt"); 42990618Stmm bus_setup_intr(dev, sc->sc_ot_ires, INTR_TYPE_MISC | INTR_FAST, 43090618Stmm sbus_overtemp, sc, &sc->sc_ot_ihand); 43190618Stmm SYSIO_WRITE8(sc, SBR_THERM_INT_MAP, mr | INTMAP_V); 43290618Stmm rid = 0; 43390618Stmm mr = SYSIO_READ8(sc, SBR_POWER_INT_MAP); 43490618Stmm vec = INTVEC(mr); 43590618Stmm if ((sc->sc_pf_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, vec, 43690618Stmm vec, 1, RF_ACTIVE)) == NULL) 43790618Stmm panic("sbus_probe: failed to get power fail interrupt"); 43890618Stmm bus_setup_intr(dev, sc->sc_pf_ires, INTR_TYPE_MISC | INTR_FAST, 43990618Stmm sbus_pwrfail, sc, &sc->sc_pf_ihand); 44090618Stmm SYSIO_WRITE8(sc, SBR_POWER_INT_MAP, mr | INTMAP_V); 44190618Stmm 44290618Stmm /* Initialize the counter-timer. */ 44390618Stmm sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle, SBR_TC0); 44490618Stmm 44590618Stmm#ifdef INVARIANTS 44690618Stmm da = sc->sc_is.is_dvmabase / IO_PAGE_SIZE; 44790618Stmm /* 44890618Stmm * Note: the SBUS IOMMU ignores the high bits of an address, so a NULL 44990618Stmm * DMA pointer will be translated by the first page of the IOTSB. 45090618Stmm * To detect bugs we'll allocate and ignore the first entry. 45190618Stmm */ 45290618Stmm if (rman_reserve_resource(&sc->sc_is.is_dvma_rman, da, da, 1, 0, 45390618Stmm NULL) == NULL) 45490618Stmm panic("sbus_probe: can't toss first dvma page"); 45590618Stmm#endif /* INVARIANTS */ 45690618Stmm 45790618Stmm /* 45890618Stmm * Loop through ROM children, fixing any relative addresses 45990618Stmm * and then configuring each device. 46090618Stmm * `specials' is an array of device names that are treated 46190618Stmm * specially: 46290618Stmm */ 46390618Stmm for (child = OF_child(node); child != 0; child = OF_peer(child)) { 46490618Stmm if ((OF_getprop_alloc(child, "name", 1, (void **)&cname)) == -1) 46590618Stmm continue; 46690618Stmm 46790618Stmm if ((sdi = sbus_setup_dinfo(sc, child, cname)) == NULL) { 46890618Stmm device_printf(dev, "<%s>: incomplete\n", cname); 46990618Stmm free(cname, M_OFWPROP); 47090618Stmm continue; 47190618Stmm } 47290618Stmm if ((cdev = device_add_child(dev, NULL, -1)) == NULL) 47390618Stmm panic("sbus_probe: device_add_child failed"); 47490618Stmm device_set_ivars(cdev, sdi); 47590618Stmm } 47690618Stmm return (0); 47790618Stmm} 47890618Stmm 47990618Stmmstatic struct sbus_devinfo * 48090618Stmmsbus_setup_dinfo(struct sbus_softc *sc, phandle_t node, char *name) 48190618Stmm{ 48290618Stmm struct sbus_devinfo *sdi; 48390618Stmm struct sbus_regs *reg; 48490618Stmm u_int32_t base, iv, *intr; 48590618Stmm int i, nreg, nintr, slot, rslot; 48690618Stmm 48790618Stmm sdi = malloc(sizeof(*sdi), M_DEVBUF, M_ZERO | M_WAITOK); 48890618Stmm if (sdi == NULL) 48990618Stmm return (NULL); 49090618Stmm resource_list_init(&sdi->sdi_rl); 49190618Stmm sdi->sdi_name = name; 49290618Stmm sdi->sdi_node = node; 49390618Stmm OF_getprop_alloc(node, "compat", 1, (void **)&sdi->sdi_compat); 49490618Stmm OF_getprop_alloc(node, "device_type", 1, (void **)&sdi->sdi_type); 49590618Stmm slot = -1; 49690618Stmm nreg = OF_getprop_alloc(node, "reg", sizeof(*reg), (void **)®); 49790618Stmm if (nreg == -1) { 49890618Stmm if (sdi->sdi_type == NULL || 49990618Stmm strcmp(sdi->sdi_type, "hierarchical") != 0) { 50090618Stmm sbus_destroy_dinfo(sdi); 50190618Stmm return (NULL); 50290618Stmm } 50390618Stmm } else { 50490618Stmm for (i = 0; i < nreg; i++) { 50590618Stmm base = reg[i].sbr_offset; 50690618Stmm if (SBUS_ABS(base)) { 50790618Stmm rslot = SBUS_ABS_TO_SLOT(base); 50890618Stmm base = SBUS_ABS_TO_OFFSET(base); 50990618Stmm } else 51090618Stmm rslot = reg[i].sbr_slot; 51190618Stmm if (slot != -1 && slot != rslot) 51290618Stmm panic("sbus_setup_dinfo: multiple slots"); 51390618Stmm slot = rslot; 51490618Stmm 51590618Stmm resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY, i, 51690618Stmm base, base + reg[i].sbr_size, reg[i].sbr_size); 51790618Stmm } 51890618Stmm free(reg, M_OFWPROP); 51990618Stmm } 52090618Stmm sdi->sdi_slot = slot; 52190618Stmm 52290618Stmm /* 52390618Stmm * The `interrupts' property contains the Sbus interrupt level. 52490618Stmm */ 52590618Stmm nintr = OF_getprop_alloc(node, "interrupts", sizeof(*intr), (void **)&intr); 52690618Stmm if (nintr != -1) { 52790618Stmm for (i = 0; i < nintr; i++) { 52890618Stmm iv = intr[i]; 52990618Stmm /* 53090618Stmm * Sbus card devices need the slot number encoded into 53190618Stmm * the vector as this is generally not done. 53290618Stmm */ 53390618Stmm if ((iv & INTMAP_OBIO) == 0) 53490618Stmm iv |= slot << 3; 53590618Stmm /* Set the ign as appropriate. */ 53690618Stmm iv |= sc->sc_ign; 53790618Stmm resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ, i, 53890618Stmm iv, iv, 1); 53990618Stmm } 54090618Stmm free(intr, M_OFWPROP); 54190618Stmm } 54290618Stmm if (OF_getprop(node, "burst-sizes", &sdi->sdi_burstsz, 54390618Stmm sizeof(sdi->sdi_burstsz)) == -1) 54490618Stmm sdi->sdi_burstsz = sc->sc_burst; 54590618Stmm else 54690618Stmm sdi->sdi_burstsz &= sc->sc_burst; 54790618Stmm 54890618Stmm return (sdi); 54990618Stmm} 55090618Stmm 55190618Stmm/* Free everything except sdi_name, which is handled separately. */ 55290618Stmmstatic void 55390618Stmmsbus_destroy_dinfo(struct sbus_devinfo *dinfo) 55490618Stmm{ 55590618Stmm 55690618Stmm resource_list_free(&dinfo->sdi_rl); 55790618Stmm if (dinfo->sdi_compat != NULL) 55890618Stmm free(dinfo->sdi_compat, M_OFWPROP); 55990618Stmm if (dinfo->sdi_type != NULL) 56090618Stmm free(dinfo->sdi_type, M_OFWPROP); 56190618Stmm free(dinfo, M_DEVBUF); 56290618Stmm} 56390618Stmm 56490618Stmmstatic int 56590618Stmmsbus_print_child(device_t dev, device_t child) 56690618Stmm{ 56790618Stmm struct sbus_devinfo *dinfo; 56890618Stmm struct resource_list *rl; 56990618Stmm int rv; 57090618Stmm 57190618Stmm dinfo = device_get_ivars(child); 57290618Stmm rl = &dinfo->sdi_rl; 57390618Stmm rv = bus_print_child_header(dev, child); 57490618Stmm rv += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); 57590618Stmm rv += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); 57690618Stmm rv += bus_print_child_footer(dev, child); 57790618Stmm return (rv); 57890618Stmm} 57990618Stmm 58090618Stmmstatic void 58190618Stmmsbus_probe_nomatch(device_t dev, device_t child) 58290618Stmm{ 58390618Stmm char *name; 58490618Stmm char *type; 58590618Stmm 58690618Stmm if (BUS_READ_IVAR(dev, child, SBUS_IVAR_NAME, 58790618Stmm (uintptr_t *)&name) != 0 || 58890618Stmm BUS_READ_IVAR(dev, child, SBUS_IVAR_DEVICE_TYPE, 58990618Stmm (uintptr_t *)&type) != 0) 59090618Stmm return; 59190618Stmm 59290618Stmm if (type == NULL) 59390618Stmm type = "(unknown)"; 59490618Stmm device_printf(dev, "<%s>, type %s (no driver attached)\n", 59590618Stmm name, type); 59690618Stmm} 59790618Stmm 59890618Stmmstatic int 59990618Stmmsbus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 60090618Stmm{ 60190618Stmm struct sbus_softc *sc = device_get_softc(dev); 60290618Stmm struct sbus_devinfo *dinfo; 60390618Stmm 60490618Stmm if ((dinfo = device_get_ivars(child)) == NULL) 60590618Stmm return (ENOENT); 60690618Stmm switch (which) { 60790618Stmm case SBUS_IVAR_BURSTSZ: 60890618Stmm *result = dinfo->sdi_burstsz; 60990618Stmm break; 61090618Stmm case SBUS_IVAR_CLOCKFREQ: 61190618Stmm *result = sc->sc_clockfreq; 61290618Stmm break; 61390618Stmm case SBUS_IVAR_COMPAT: 61490618Stmm *result = (uintptr_t)dinfo->sdi_compat; 61590618Stmm break; 61690618Stmm case SBUS_IVAR_NAME: 61790618Stmm *result = (uintptr_t)dinfo->sdi_name; 61890618Stmm break; 61990618Stmm case SBUS_IVAR_NODE: 62090618Stmm *result = dinfo->sdi_node; 62190618Stmm break; 62290618Stmm case SBUS_IVAR_SLOT: 62390618Stmm *result = dinfo->sdi_slot; 62490618Stmm break; 62590618Stmm case SBUS_IVAR_DEVICE_TYPE: 62690618Stmm *result = (uintptr_t)dinfo->sdi_type; 62790618Stmm break; 62890618Stmm default: 62990618Stmm return (ENOENT); 63090618Stmm } 63190618Stmm return 0; 63290618Stmm} 63390618Stmm 63490618Stmmstatic struct resource_list * 63590618Stmmsbus_get_resource_list(device_t dev, device_t child) 63690618Stmm{ 63790618Stmm struct sbus_devinfo *sdi; 63890618Stmm 63990618Stmm sdi = device_get_ivars(child); 64090618Stmm return (&sdi->sdi_rl); 64190618Stmm} 64290618Stmm 64390618Stmm/* Write to the correct clr register, and call the actual handler. */ 64490618Stmmstatic void 64590618Stmmsbus_intr_stub(void *arg) 64690618Stmm{ 64790618Stmm struct sbus_clr *scl; 64890618Stmm 64990618Stmm scl = (struct sbus_clr *)arg; 65090618Stmm scl->scl_handler(scl->scl_arg); 65190618Stmm SYSIO_WRITE8(scl->scl_sc, scl->scl_clr, 0); 65290618Stmm} 65390618Stmm 65490618Stmmstatic int 65590618Stmmsbus_setup_intr(device_t dev, device_t child, 65690618Stmm struct resource *ires, int flags, driver_intr_t *intr, void *arg, 65790618Stmm void **cookiep) 65890618Stmm{ 65990618Stmm struct sbus_softc *sc; 66090618Stmm struct sbus_clr *scl; 66190618Stmm bus_addr_t intrmapptr, intrclrptr, intrptr; 66290618Stmm u_int64_t intrmap; 66390618Stmm u_int32_t inr, slot; 66490618Stmm int error, i; 66590618Stmm long vec = rman_get_start(ires); 66690618Stmm 66790618Stmm sc = (struct sbus_softc *)device_get_softc(dev); 66890618Stmm scl = (struct sbus_clr *)malloc(sizeof(*scl), M_DEVBUF, M_NOWAIT); 66990618Stmm if (scl == NULL) 67090618Stmm return (NULL); 67190618Stmm intrptr = intrmapptr = intrclrptr = 0; 67290618Stmm intrmap = 0; 67390618Stmm if ((vec & SBUS_INTR_COMPAT) == 0) { 67490618Stmm inr = INTVEC(vec); 67590618Stmm if ((inr & INTMAP_OBIO) == 0) { 67690618Stmm /* 67790618Stmm * We're in an SBUS slot, register the map and clear 67890618Stmm * intr registers. 67990618Stmm */ 68090618Stmm slot = INTSLOT(vec); 68190618Stmm 68290618Stmm intrmapptr = SBR_SLOT0_INT_MAP + slot * 8; 68390618Stmm intrclrptr = SBR_SLOT0_INT_CLR + inr * 8; 68490618Stmm /* Enable the interrupt, insert IGN. */ 68590618Stmm intrmap = inr | sc->sc_ign; 68690618Stmm } else { 68790618Stmm intrptr = SBR_SCSI_INT_MAP; 68890618Stmm /* Insert IGN */ 68990618Stmm inr |= sc->sc_ign; 69090618Stmm for (i = 0; intrptr <= SBR_RESERVED_INT_MAP && 69190618Stmm INTVEC(intrmap = SYSIO_READ8(sc, intrptr)) != 69290618Stmm INTVEC(inr); intrptr += 8, i++) 69390618Stmm ; 69490618Stmm if (INTVEC(intrmap) == INTVEC(inr)) { 69590618Stmm /* Register the map and clear intr registers */ 69690618Stmm intrmapptr = intrptr; 69790618Stmm intrclrptr = SBR_SCSI_INT_CLR + i * 8; 69890618Stmm /* Enable the interrupt */ 69990618Stmm } else 70090618Stmm panic("sbus_setup_intr: IRQ not found!"); 70190618Stmm } 70290618Stmm } else 70390618Stmm panic("sbus_setup_intr: XXX: compat"); 70490618Stmm 70590618Stmm scl->scl_sc = sc; 70690618Stmm scl->scl_arg = arg; 70790618Stmm scl->scl_handler = intr; 70890618Stmm scl->scl_clr = intrclrptr; 70990618Stmm /* Disable the interrupt while we fiddle with it */ 71090618Stmm if (intrmapptr != 0) 71190618Stmm SYSIO_WRITE8(sc, intrmapptr, intrmap); 71290618Stmm error = BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, 71390618Stmm sbus_intr_stub, scl, cookiep); 71490618Stmm if (error != 0) { 71590618Stmm free(scl, M_DEVBUF); 71690618Stmm return (error); 71790618Stmm } 71890618Stmm scl->scl_cookie = *cookiep; 71990618Stmm *cookiep = scl; 72090618Stmm 72190618Stmm /* 72290618Stmm * Clear the interrupt, it might have been triggered before it was 72390618Stmm * set up. 72490618Stmm */ 72590618Stmm if (intrclrptr != 0) 72690618Stmm SYSIO_WRITE8(sc, intrclrptr, 0); 72790618Stmm /* 72890618Stmm * Enable the interrupt now we have the handler installed. 72990618Stmm * Read the current value as we can't change it besides the 73090618Stmm * valid bit so so make sure only this bit is changed. 73190618Stmm */ 73290618Stmm if (intrmapptr != NULL) 73390618Stmm SYSIO_WRITE8(sc, intrmapptr, intrmap | INTMAP_V); 73490618Stmm return (error); 73590618Stmm} 73690618Stmm 73790618Stmmstatic int 73890618Stmmsbus_teardown_intr(device_t dev, device_t child, 73990618Stmm struct resource *vec, void *cookie) 74090618Stmm{ 74190618Stmm struct sbus_clr *scl; 74290618Stmm int error; 74390618Stmm 74490618Stmm scl = (struct sbus_clr *)cookie; 74590618Stmm error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec, 74690618Stmm scl->scl_cookie); 74790618Stmm /* 74890618Stmm * Don't disable the interrupt for now, so that stray interupts get 74990618Stmm * detected... 75090618Stmm */ 75190618Stmm if (error != 0) 75290618Stmm free(scl, M_DEVBUF); 75390618Stmm return (error); 75490618Stmm} 75590618Stmm 75690618Stmmstatic struct resource * 75790618Stmmsbus_alloc_resource(device_t bus, device_t child, int type, int *rid, 75890618Stmm u_long start, u_long end, u_long count, u_int flags) 75990618Stmm{ 76090618Stmm struct sbus_softc *sc; 76190618Stmm struct sbus_devinfo *sdi; 76290618Stmm struct rman *rm; 76390618Stmm struct resource *rv; 76490618Stmm struct resource_list *rl; 76590618Stmm struct resource_list_entry *rle; 76690618Stmm bus_space_handle_t bh; 76790618Stmm bus_addr_t toffs; 76890618Stmm bus_size_t tend; 76990618Stmm int i; 77090618Stmm int isdefault = (start == 0UL && end == ~0UL); 77190618Stmm int needactivate = flags & RF_ACTIVE; 77290618Stmm 77390618Stmm sc = (struct sbus_softc *)device_get_softc(bus); 77490618Stmm sdi = device_get_ivars(child); 77590618Stmm rl = &sdi->sdi_rl; 77690618Stmm rle = resource_list_find(rl, type, *rid); 77790618Stmm if (rle == NULL) 77890618Stmm return (NULL); 77990618Stmm if (rle->res != NULL) 78090618Stmm panic("sbus_alloc_resource: resource entry is busy"); 78190618Stmm if (isdefault) { 78290618Stmm start = rle->start; 78390618Stmm count = ulmax(count, rle->count); 78490618Stmm end = ulmax(rle->end, start + count - 1); 78590618Stmm } 78690618Stmm switch (type) { 78790618Stmm case SYS_RES_IRQ: 78890618Stmm rv = bus_alloc_resource(bus, type, rid, start, end, 78990618Stmm count, flags); 79090618Stmm if (rv == NULL) 79190618Stmm return (NULL); 79290618Stmm break; 79390618Stmm case SYS_RES_MEMORY: 79490618Stmm rm = NULL; 79590618Stmm bh = toffs = tend = 0; 79690618Stmm for (i = 0; i < sc->sc_nrange; i++) { 79790618Stmm if (sc->sc_rd[i].rd_slot != sdi->sdi_slot || 79890618Stmm start < sc->sc_rd[i].rd_coffset || 79990618Stmm start > sc->sc_rd[i].rd_cend) 80090618Stmm continue; 80190618Stmm /* Disallow cross-range allocations. */ 80290618Stmm if (end > sc->sc_rd[i].rd_cend) 80390618Stmm return (NULL); 80490618Stmm /* We've found the connection to the parent bus */ 80590618Stmm toffs = start - sc->sc_rd[i].rd_coffset; 80690618Stmm tend = end - sc->sc_rd[i].rd_coffset; 80790618Stmm rm = &sc->sc_rd[i].rd_rman; 80890618Stmm bh = sc->sc_rd[i].rd_bushandle; 80990618Stmm } 81090618Stmm if (toffs == NULL) 81190618Stmm return (NULL); 81290618Stmm flags &= ~RF_ACTIVE; 81390618Stmm rv = rman_reserve_resource(rm, toffs, tend, count, flags, 81490618Stmm child); 81590618Stmm if (rv == NULL) 81690618Stmm return (NULL); 81790618Stmm rman_set_bustag(rv, sc->sc_cbustag); 81890618Stmm rman_set_bushandle(rv, bh + rman_get_start(rv)); 81990618Stmm if (needactivate) { 82090618Stmm if (bus_activate_resource(child, type, *rid, rv)) { 82190618Stmm rman_release_resource(rv); 82290618Stmm return (NULL); 82390618Stmm } 82490618Stmm } 82590618Stmm break; 82690618Stmm default: 82790618Stmm return (NULL); 82890618Stmm } 82990618Stmm rle->res = rv; 83090618Stmm return (rv); 83190618Stmm} 83290618Stmm 83390618Stmmstatic int 83490618Stmmsbus_activate_resource(device_t bus, device_t child, int type, int rid, 83590618Stmm struct resource *r) 83690618Stmm{ 83790618Stmm 83890618Stmm if (type == SYS_RES_IRQ) 83990618Stmm return (bus_activate_resource(bus, type, rid, r)); 84090618Stmm return (rman_activate_resource(r)); 84190618Stmm} 84290618Stmm 84390618Stmmstatic int 84490618Stmmsbus_deactivate_resource(device_t bus, device_t child, int type, int rid, 84590618Stmm struct resource *r) 84690618Stmm{ 84790618Stmm 84890618Stmm if (type == SYS_RES_IRQ) 84990618Stmm return (bus_deactivate_resource(bus, type, rid, r)); 85090618Stmm return (rman_deactivate_resource(r)); 85190618Stmm} 85290618Stmm 85390618Stmmstatic int 85490618Stmmsbus_release_resource(device_t bus, device_t child, int type, int rid, 85590618Stmm struct resource *r) 85690618Stmm{ 85790618Stmm int error; 85890618Stmm 85990618Stmm if (type == SYS_RES_IRQ) 86090618Stmm return (bus_release_resource(bus, type, rid, r)); 86190618Stmm if (rman_get_flags(r) & RF_ACTIVE) { 86290618Stmm error = bus_deactivate_resource(child, type, rid, r); 86390618Stmm if (error) 86490618Stmm return error; 86590618Stmm } 86690618Stmm return (rman_release_resource(r)); 86790618Stmm} 86890618Stmm 86990618Stmm/* 87090618Stmm * Handle an overtemp situation. 87190618Stmm * 87290618Stmm * SPARCs have temperature sensors which generate interrupts 87390618Stmm * if the machine's temperature exceeds a certain threshold. 87490618Stmm * This handles the interrupt and powers off the machine. 87590618Stmm * The same needs to be done to PCI controller drivers. 87690618Stmm */ 87790618Stmmstatic void 87890618Stmmsbus_overtemp(void *arg) 87990618Stmm{ 88090618Stmm 88190618Stmm printf("DANGER: OVER TEMPERATURE detected\nShutting down NOW.\n"); 88290618Stmm shutdown_nice(RB_POWEROFF); 88390618Stmm} 88490618Stmm 88590618Stmm/* Try to shut down in time in case of power failure. */ 88690618Stmmstatic void 88790618Stmmsbus_pwrfail(void *arg) 88890618Stmm{ 88990618Stmm 89090618Stmm printf("Power failure detected\nShutting down NOW.\n"); 89190618Stmm shutdown_nice(0); 89290618Stmm} 89390618Stmm 89490618Stmmstatic bus_space_tag_t 89590618Stmmsbus_alloc_bustag(struct sbus_softc *sc) 89690618Stmm{ 89790618Stmm bus_space_tag_t sbt; 89890618Stmm 89990618Stmm sbt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF, 90090618Stmm M_NOWAIT | M_ZERO); 90190618Stmm if (sbt == NULL) 90290618Stmm panic("sbus_alloc_bustag: out of memory"); 90390618Stmm 90490618Stmm bzero(sbt, sizeof *sbt); 90590618Stmm sbt->cookie = sc; 90690618Stmm sbt->parent = sc->sc_bustag; 90790618Stmm sbt->type = SBUS_BUS_SPACE; 90890618Stmm return (sbt); 90990618Stmm} 91090618Stmm 91190618Stmmstatic int 91290618Stmmsbus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp) 91390618Stmm{ 91490618Stmm struct sbus_softc *sc = (struct sbus_softc *)dmat->cookie; 91590618Stmm 91690618Stmm return (iommu_dvmamap_create(dmat, &sc->sc_is, flags, mapp)); 91790618Stmm 91890618Stmm} 91990618Stmm 92090618Stmmstatic int 92190618Stmmsbus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map) 92290618Stmm{ 92390618Stmm struct sbus_softc *sc = (struct sbus_softc *)dmat->cookie; 92490618Stmm 92590618Stmm return (iommu_dvmamap_destroy(dmat, &sc->sc_is, map)); 92690618Stmm} 92790618Stmm 92890618Stmmstatic int 92990618Stmmsbus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf, 93090618Stmm bus_size_t buflen, bus_dmamap_callback_t *callback, void *callback_arg, 93190618Stmm int flags) 93290618Stmm{ 93390618Stmm struct sbus_softc *sc = (struct sbus_softc *)dmat->cookie; 93490618Stmm 93590618Stmm return (iommu_dvmamap_load(dmat, &sc->sc_is, map, buf, buflen, callback, 93690618Stmm callback_arg, flags)); 93790618Stmm} 93890618Stmm 93990618Stmmstatic void 94090618Stmmsbus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map) 94190618Stmm{ 94290618Stmm struct sbus_softc *sc = (struct sbus_softc *)dmat->cookie; 94390618Stmm 94490618Stmm iommu_dvmamap_unload(dmat, &sc->sc_is, map); 94590618Stmm} 94690618Stmm 94790618Stmmstatic void 94890618Stmmsbus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, 94990618Stmm bus_dmasync_op_t op) 95090618Stmm{ 95190618Stmm struct sbus_softc *sc = (struct sbus_softc *)dmat->cookie; 95290618Stmm 95390618Stmm iommu_dvmamap_sync(dmat, &sc->sc_is, map, op); 95490618Stmm} 95590618Stmm 95690618Stmmstatic int 95790618Stmmsbus_dmamem_alloc(bus_dma_tag_t dmat, void **vaddr, int flags, bus_dmamap_t *mapp) 95890618Stmm{ 95990618Stmm struct sbus_softc *sc = (struct sbus_softc *)dmat->cookie; 96090618Stmm 96190618Stmm return (iommu_dvmamem_alloc(dmat, &sc->sc_is, vaddr, flags, mapp)); 96290618Stmm} 96390618Stmm 96490618Stmmstatic void 96590618Stmmsbus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map) 96690618Stmm{ 96790618Stmm struct sbus_softc *sc = (struct sbus_softc *)dmat->cookie; 96890618Stmm 96990618Stmm iommu_dvmamem_free(dmat, &sc->sc_is, vaddr, map); 97090618Stmm} 971