sbus.c revision 107474
190618Stmm/*- 290618Stmm * Copyright (c) 1998 The NetBSD Foundation, Inc. 390618Stmm * All rights reserved. 490618Stmm * 590618Stmm * This code is derived from software contributed to The NetBSD Foundation 690618Stmm * by Paul Kranenburg. 790618Stmm * 890618Stmm * Redistribution and use in source and binary forms, with or without 990618Stmm * modification, are permitted provided that the following conditions 1090618Stmm * are met: 1190618Stmm * 1. Redistributions of source code must retain the above copyright 1290618Stmm * notice, this list of conditions and the following disclaimer. 1390618Stmm * 2. Redistributions in binary form must reproduce the above copyright 1490618Stmm * notice, this list of conditions and the following disclaimer in the 1590618Stmm * documentation and/or other materials provided with the distribution. 1690618Stmm * 3. All advertising materials mentioning features or use of this software 1790618Stmm * must display the following acknowledgement: 1890618Stmm * This product includes software developed by the NetBSD 1990618Stmm * Foundation, Inc. and its contributors. 2090618Stmm * 4. Neither the name of The NetBSD Foundation nor the names of its 2190618Stmm * contributors may be used to endorse or promote products derived 2290618Stmm * from this software without specific prior written permission. 2390618Stmm * 2490618Stmm * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 2590618Stmm * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 2690618Stmm * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 2790618Stmm * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 2890618Stmm * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2990618Stmm * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 3090618Stmm * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 3190618Stmm * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 3290618Stmm * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3390618Stmm * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 3490618Stmm * POSSIBILITY OF SUCH DAMAGE. 3590618Stmm */ 3690618Stmm/* 3790618Stmm * Copyright (c) 1992, 1993 3890618Stmm * The Regents of the University of California. All rights reserved. 3990618Stmm * 4090618Stmm * This software was developed by the Computer Systems Engineering group 4190618Stmm * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 4290618Stmm * contributed to Berkeley. 4390618Stmm * 4490618Stmm * All advertising materials mentioning features or use of this software 4590618Stmm * must display the following acknowledgement: 4690618Stmm * This product includes software developed by the University of 4790618Stmm * California, Lawrence Berkeley Laboratory. 4890618Stmm * 4990618Stmm * Redistribution and use in source and binary forms, with or without 5090618Stmm * modification, are permitted provided that the following conditions 5190618Stmm * are met: 5290618Stmm * 1. Redistributions of source code must retain the above copyright 5390618Stmm * notice, this list of conditions and the following disclaimer. 5490618Stmm * 2. Redistributions in binary form must reproduce the above copyright 5590618Stmm * notice, this list of conditions and the following disclaimer in the 5690618Stmm * documentation and/or other materials provided with the distribution. 5790618Stmm * 3. All advertising materials mentioning features or use of this software 5890618Stmm * must display the following acknowledgement: 5990618Stmm * This product includes software developed by the University of 6090618Stmm * California, Berkeley and its contributors. 6190618Stmm * 4. Neither the name of the University nor the names of its contributors 6290618Stmm * may be used to endorse or promote products derived from this software 6390618Stmm * without specific prior written permission. 6490618Stmm * 6590618Stmm * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 6690618Stmm * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 6790618Stmm * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 6890618Stmm * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 6990618Stmm * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 7090618Stmm * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 7190618Stmm * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 7290618Stmm * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 7390618Stmm * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 7490618Stmm * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 7590618Stmm * SUCH DAMAGE. 7690618Stmm */ 7790618Stmm/* 7890618Stmm * Copyright (c) 1999 Eduardo Horvath 7990618Stmm * Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>. 8090618Stmm * All rights reserved. 8190618Stmm * 8290618Stmm * Redistribution and use in source and binary forms, with or without 8390618Stmm * modification, are permitted provided that the following conditions 8490618Stmm * are met: 8590618Stmm * 1. Redistributions of source code must retain the above copyright 8690618Stmm * notice, this list of conditions and the following disclaimer. 8790618Stmm * 8890618Stmm * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 8990618Stmm * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 9090618Stmm * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 9190618Stmm * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 9290618Stmm * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 9390618Stmm * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 9490618Stmm * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 9590618Stmm * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 9690618Stmm * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 9790618Stmm * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 9890618Stmm * SUCH DAMAGE. 9990618Stmm * 10090618Stmm * from: @(#)sbus.c 8.1 (Berkeley) 6/11/93 10190618Stmm * from: NetBSD: sbus.c,v 1.46 2001/10/07 20:30:41 eeh Exp 10290618Stmm * 10390618Stmm * $FreeBSD: head/sys/sparc64/sbus/sbus.c 107474 2002-12-01 23:13:59Z tmm $ 10490618Stmm */ 10590618Stmm 10690618Stmm/* 10790618Stmm * Sbus support. 10890618Stmm */ 10990618Stmm#include <sys/param.h> 11090618Stmm#include <sys/systm.h> 11190618Stmm#include <sys/bus.h> 11290618Stmm#include <sys/kernel.h> 11390618Stmm#include <sys/malloc.h> 11490618Stmm#include <sys/reboot.h> 11590618Stmm 11690618Stmm#include <ofw/openfirm.h> 11790618Stmm 11890618Stmm#include <machine/bus.h> 11990618Stmm#include <machine/iommureg.h> 12090618Stmm#include <machine/bus_common.h> 12190618Stmm#include <machine/frame.h> 12290618Stmm#include <machine/intr_machdep.h> 12390618Stmm#include <machine/nexusvar.h> 12490618Stmm#include <machine/ofw_upa.h> 12590618Stmm#include <machine/resource.h> 12690618Stmm 12790618Stmm#include <sys/rman.h> 12890618Stmm 12990618Stmm#include <machine/iommuvar.h> 13090618Stmm 13190618Stmm#include <sparc64/sbus/ofw_sbus.h> 13290618Stmm#include <sparc64/sbus/sbusreg.h> 13390618Stmm#include <sparc64/sbus/sbusvar.h> 13490618Stmm 13590618Stmm 13690618Stmm#ifdef DEBUG 13790618Stmm#define SDB_DVMA 0x1 13890618Stmm#define SDB_INTR 0x2 13990618Stmmint sbus_debug = 0; 14090618Stmm#define DPRINTF(l, s) do { if (sbus_debug & l) printf s; } while (0) 14190618Stmm#else 14290618Stmm#define DPRINTF(l, s) 14390618Stmm#endif 14490618Stmm 14590618Stmmstruct sbus_devinfo { 14690618Stmm int sdi_burstsz; 14790618Stmm char *sdi_compat; 14890618Stmm char *sdi_name; /* PROM name */ 14990618Stmm phandle_t sdi_node; /* PROM node */ 15090618Stmm int sdi_slot; 15190618Stmm char *sdi_type; /* PROM name */ 15290618Stmm 15390618Stmm struct resource_list sdi_rl; 15490618Stmm}; 15590618Stmm 15690618Stmm/* Range descriptor, allocated for each sc_range. */ 15790618Stmmstruct sbus_rd { 15890618Stmm bus_addr_t rd_poffset; 15990618Stmm bus_addr_t rd_pend; 16090618Stmm int rd_slot; 16190618Stmm bus_addr_t rd_coffset; 16290618Stmm bus_addr_t rd_cend; 16390618Stmm struct rman rd_rman; 16490618Stmm bus_space_handle_t rd_bushandle; 16590618Stmm struct resource *rd_res; 16690618Stmm}; 16790618Stmm 16890618Stmmstruct sbus_softc { 16990618Stmm bus_space_tag_t sc_bustag; 17090618Stmm bus_space_handle_t sc_bushandle; 17190618Stmm bus_dma_tag_t sc_dmatag; 17290618Stmm bus_dma_tag_t sc_cdmatag; 17390618Stmm bus_space_tag_t sc_cbustag; 17490618Stmm int sc_clockfreq; /* clock frequency (in Hz) */ 17590618Stmm struct upa_regs *sc_reg; 17690618Stmm int sc_nreg; 17790618Stmm int sc_nrange; 17890618Stmm struct sbus_rd *sc_rd; 17990618Stmm int sc_burst; /* burst transfer sizes supported */ 18090618Stmm int *sc_intr_compat;/* `intr' property to sbus compat */ 18190618Stmm 18290618Stmm struct resource *sc_sysio_res; 18390618Stmm int sc_ign; /* Interrupt group number for this sysio */ 18490618Stmm struct iommu_state sc_is; /* IOMMU state, see iommureg.h */ 18590618Stmm 18690618Stmm struct resource *sc_ot_ires; 18790618Stmm void *sc_ot_ihand; 18890618Stmm struct resource *sc_pf_ires; 18990618Stmm void *sc_pf_ihand; 19090618Stmm}; 19190618Stmm 19290618Stmmstruct sbus_clr { 19390618Stmm struct sbus_softc *scl_sc; 19490618Stmm bus_addr_t scl_clr; /* clear register */ 19590618Stmm driver_intr_t *scl_handler; /* handler to call */ 19690618Stmm void *scl_arg; /* argument for the handler */ 19790618Stmm void *scl_cookie; /* interrupt cookie of parent bus */ 19890618Stmm}; 19990618Stmm 20090618Stmm#define SYSIO_READ8(sc, off) \ 20190618Stmm bus_space_read_8((sc)->sc_bustag, (sc)->sc_bushandle, (off)) 20290618Stmm#define SYSIO_WRITE8(sc, off, v) \ 20390618Stmm bus_space_write_8((sc)->sc_bustag, (sc)->sc_bushandle, (off), (v)) 20490618Stmm 20590618Stmmstatic int sbus_probe(device_t dev); 20690618Stmmstatic int sbus_print_child(device_t dev, device_t child); 20790618Stmmstatic void sbus_probe_nomatch(device_t dev, device_t child); 20890618Stmmstatic int sbus_read_ivar(device_t, device_t, int, u_long *); 20990618Stmmstatic struct resource_list *sbus_get_resource_list(device_t dev, 21090618Stmm device_t child); 21190618Stmmstatic int sbus_setup_intr(device_t, device_t, struct resource *, int, 21290618Stmm driver_intr_t *, void *, void **); 21390618Stmmstatic int sbus_teardown_intr(device_t, device_t, struct resource *, void *); 21490618Stmmstatic struct resource *sbus_alloc_resource(device_t, device_t, int, int *, 21590618Stmm u_long, u_long, u_long, u_int); 21690618Stmmstatic int sbus_activate_resource(device_t, device_t, int, int, 21790618Stmm struct resource *); 21890618Stmmstatic int sbus_deactivate_resource(device_t, device_t, int, int, 21990618Stmm struct resource *); 22090618Stmmstatic int sbus_release_resource(device_t, device_t, int, int, 22190618Stmm struct resource *); 22290618Stmm 22390618Stmmstatic struct sbus_devinfo * sbus_setup_dinfo(struct sbus_softc *sc, 22490618Stmm phandle_t node, char *name); 22590618Stmmstatic void sbus_destroy_dinfo(struct sbus_devinfo *dinfo); 22690618Stmmstatic void sbus_intr_stub(void *); 22790618Stmmstatic bus_space_tag_t sbus_alloc_bustag(struct sbus_softc *); 22890618Stmmstatic void sbus_overtemp(void *); 22990618Stmmstatic void sbus_pwrfail(void *); 23090618Stmm 23190618Stmm/* 23290618Stmm * DVMA routines 23390618Stmm */ 23493070Stmmstatic int sbus_dmamap_create(bus_dma_tag_t, bus_dma_tag_t, int, 23593070Stmm bus_dmamap_t *); 23693070Stmmstatic int sbus_dmamap_destroy(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 23793070Stmmstatic int sbus_dmamap_load(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, void *, 23893070Stmm bus_size_t, bus_dmamap_callback_t *, void *, int); 23993070Stmmstatic void sbus_dmamap_unload(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 24093070Stmmstatic void sbus_dmamap_sync(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 24193070Stmm bus_dmasync_op_t); 24293070Stmmstatic int sbus_dmamem_alloc(bus_dma_tag_t, bus_dma_tag_t, void **, int, 24393070Stmm bus_dmamap_t *); 24493070Stmmstatic void sbus_dmamem_free(bus_dma_tag_t, bus_dma_tag_t, void *, 24593070Stmm bus_dmamap_t); 24690618Stmm 24790618Stmmstatic device_method_t sbus_methods[] = { 24890618Stmm /* Device interface */ 24990618Stmm DEVMETHOD(device_probe, sbus_probe), 25090618Stmm DEVMETHOD(device_attach, bus_generic_attach), 25190618Stmm 25290618Stmm /* Bus interface */ 25390618Stmm DEVMETHOD(bus_print_child, sbus_print_child), 25490618Stmm DEVMETHOD(bus_probe_nomatch, sbus_probe_nomatch), 25590618Stmm DEVMETHOD(bus_read_ivar, sbus_read_ivar), 25690618Stmm DEVMETHOD(bus_setup_intr, sbus_setup_intr), 25790618Stmm DEVMETHOD(bus_teardown_intr, sbus_teardown_intr), 25890618Stmm DEVMETHOD(bus_alloc_resource, sbus_alloc_resource), 25990618Stmm DEVMETHOD(bus_activate_resource, sbus_activate_resource), 26090618Stmm DEVMETHOD(bus_deactivate_resource, sbus_deactivate_resource), 26190618Stmm DEVMETHOD(bus_release_resource, sbus_release_resource), 26290618Stmm DEVMETHOD(bus_get_resource_list, sbus_get_resource_list), 26390618Stmm DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 26490618Stmm 26590618Stmm { 0, 0 } 26690618Stmm}; 26790618Stmm 26890618Stmmstatic driver_t sbus_driver = { 26990618Stmm "sbus", 27090618Stmm sbus_methods, 27190618Stmm sizeof(struct sbus_softc), 27290618Stmm}; 27390618Stmm 27490618Stmmstatic devclass_t sbus_devclass; 27590618Stmm 27690618StmmDRIVER_MODULE(sbus, nexus, sbus_driver, sbus_devclass, 0, 0); 27790618Stmm 27890618Stmm#define OFW_SBUS_TYPE "sbus" 27990618Stmm#define OFW_SBUS_NAME "sbus" 28090618Stmm 28190618Stmmstatic int 28290618Stmmsbus_probe(device_t dev) 28390618Stmm{ 28490618Stmm struct sbus_softc *sc = device_get_softc(dev); 28590618Stmm struct sbus_devinfo *sdi; 28690618Stmm struct sbus_ranges *range; 28790618Stmm struct resource *res; 28890618Stmm device_t cdev; 28990618Stmm bus_addr_t phys; 29090618Stmm bus_size_t size; 29190618Stmm char *name, *cname, *t; 29290618Stmm phandle_t child, node = nexus_get_node(dev); 29390618Stmm u_int64_t mr; 29490618Stmm int intr, clock, rid, vec, i; 29590618Stmm 29690618Stmm t = nexus_get_device_type(dev); 29790618Stmm if (((t == NULL || strcmp(t, OFW_SBUS_TYPE) != 0)) && 29890618Stmm strcmp(nexus_get_name(dev), OFW_SBUS_NAME) != 0) 29990618Stmm return (ENXIO); 30090618Stmm device_set_desc(dev, "U2S UPA-SBus bridge"); 30190618Stmm 30290618Stmm if ((sc->sc_nreg = OF_getprop_alloc(node, "reg", sizeof(*sc->sc_reg), 30390618Stmm (void **)&sc->sc_reg)) == -1) { 30490618Stmm panic("sbus_probe: error getting reg property"); 30590618Stmm } 30690618Stmm if (sc->sc_nreg < 1) 30790618Stmm panic("sbus_probe: bogus properties"); 30890618Stmm phys = UPA_REG_PHYS(&sc->sc_reg[0]); 30990618Stmm size = UPA_REG_SIZE(&sc->sc_reg[0]); 31090618Stmm rid = 0; 31190618Stmm sc->sc_sysio_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, phys, 31290618Stmm phys + size - 1, size, RF_ACTIVE); 31390618Stmm if (sc->sc_sysio_res == NULL || 31490618Stmm rman_get_start(sc->sc_sysio_res) != phys) 31590618Stmm panic("sbus_probe: can't allocate device memory"); 31690618Stmm sc->sc_bustag = rman_get_bustag(sc->sc_sysio_res); 31790618Stmm sc->sc_bushandle = rman_get_bushandle(sc->sc_sysio_res); 31890618Stmm 31990618Stmm if (OF_getprop(node, "interrupts", &intr, sizeof(intr)) == -1) 32090618Stmm panic("sbus_probe: cannot get IGN"); 32190618Stmm sc->sc_ign = intr & INTMAP_IGN; /* Find interrupt group no */ 32290618Stmm sc->sc_cbustag = sbus_alloc_bustag(sc); 32390618Stmm 32490618Stmm /* 32590618Stmm * Record clock frequency for synchronous SCSI. 32690618Stmm * IS THIS THE CORRECT DEFAULT?? 32790618Stmm */ 32890618Stmm if (OF_getprop(node, "clock-frequency", &clock, sizeof(clock)) == -1) 32990618Stmm clock = 25000000; 33090618Stmm sc->sc_clockfreq = clock; 33190618Stmm clock /= 1000; 33290618Stmm device_printf(dev, "clock %d.%03d MHz\n", clock / 1000, clock % 1000); 33390618Stmm 33490618Stmm sc->sc_dmatag = nexus_get_dmatag(dev); 33590618Stmm if (bus_dma_tag_create(sc->sc_dmatag, 8, 1, 0, 0x3ffffffff, NULL, NULL, 33690618Stmm 0x3ffffffff, 0xff, 0xffffffff, 0, &sc->sc_cdmatag) != 0) 33790618Stmm panic("bus_dma_tag_create failed"); 33890618Stmm /* Customize the tag */ 33990618Stmm sc->sc_cdmatag->cookie = sc; 34090618Stmm sc->sc_cdmatag->dmamap_create = sbus_dmamap_create; 34190618Stmm sc->sc_cdmatag->dmamap_destroy = sbus_dmamap_destroy; 34290618Stmm sc->sc_cdmatag->dmamap_load = sbus_dmamap_load; 34390618Stmm sc->sc_cdmatag->dmamap_unload = sbus_dmamap_unload; 34490618Stmm sc->sc_cdmatag->dmamap_sync = sbus_dmamap_sync; 34590618Stmm sc->sc_cdmatag->dmamem_alloc = sbus_dmamem_alloc; 34690618Stmm sc->sc_cdmatag->dmamem_free = sbus_dmamem_free; 34790618Stmm /* XXX: register as root dma tag (kluge). */ 34890618Stmm sparc64_root_dma_tag = sc->sc_cdmatag; 34990618Stmm 35090618Stmm /* 35190618Stmm * Collect address translations from the OBP. 35290618Stmm */ 35390618Stmm if ((sc->sc_nrange = OF_getprop_alloc(node, "ranges", 35490618Stmm sizeof(*range), (void **)&range)) == -1) { 35590618Stmm panic("%s: error getting ranges property", 35690618Stmm device_get_name(dev)); 35790618Stmm } 35890618Stmm sc->sc_rd = (struct sbus_rd *)malloc(sizeof(*sc->sc_rd) * sc->sc_nrange, 35990618Stmm M_DEVBUF, M_NOWAIT); 36090618Stmm if (sc->sc_rd == NULL) 36190618Stmm panic("sbus_probe: could not allocate rmans"); 36290618Stmm /* 36390618Stmm * Preallocate all space that the SBus bridge decodes, so that nothing 36490618Stmm * else gets in the way; set up rmans etc. 36590618Stmm */ 36690618Stmm for (i = 0; i < sc->sc_nrange; i++) { 36790618Stmm phys = range[i].poffset | ((bus_addr_t)range[i].pspace << 32); 36890618Stmm size = range[i].size; 36990618Stmm sc->sc_rd[i].rd_slot = range[i].cspace; 37090618Stmm sc->sc_rd[i].rd_coffset = range[i].coffset; 37190618Stmm sc->sc_rd[i].rd_cend = sc->sc_rd[i].rd_coffset + size; 37290618Stmm rid = 0; 37390618Stmm if ((res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, phys, 37490618Stmm phys + size - 1, size, RF_ACTIVE)) == NULL) 37590618Stmm panic("sbus_probe: could not allocate decoded range"); 37690618Stmm sc->sc_rd[i].rd_bushandle = rman_get_bushandle(res); 37790618Stmm sc->sc_rd[i].rd_rman.rm_type = RMAN_ARRAY; 37890618Stmm sc->sc_rd[i].rd_rman.rm_descr = "SBus Device Memory"; 37990618Stmm if (rman_init(&sc->sc_rd[i].rd_rman) != 0 || 38090618Stmm rman_manage_region(&sc->sc_rd[i].rd_rman, 0, size) != 0) 38190618Stmm panic("psycho_probe: failed to set up memory rman"); 38290618Stmm sc->sc_rd[i].rd_poffset = phys; 38390618Stmm sc->sc_rd[i].rd_pend = phys + size; 38490618Stmm sc->sc_rd[i].rd_res = res; 38590618Stmm } 38690618Stmm free(range, M_OFWPROP); 38790618Stmm 38890618Stmm /* 38990618Stmm * Get the SBus burst transfer size if burst transfers are supported. 39090618Stmm * XXX: is the default correct? 39190618Stmm */ 39290618Stmm if (OF_getprop(node, "burst-sizes", &sc->sc_burst, 39390618Stmm sizeof(sc->sc_burst)) == -1 || sc->sc_burst == 0) 39490618Stmm sc->sc_burst = SBUS_BURST_DEF; 39590618Stmm 39690618Stmm /* initalise the IOMMU */ 39790618Stmm 39890618Stmm /* punch in our copies */ 39990618Stmm sc->sc_is.is_bustag = sc->sc_bustag; 40090618Stmm sc->sc_is.is_bushandle = sc->sc_bushandle; 40190618Stmm sc->sc_is.is_iommu = SBR_IOMMU; 40290618Stmm sc->sc_is.is_dtag = SBR_IOMMU_TLB_TAG_DIAG; 40390618Stmm sc->sc_is.is_ddram = SBR_IOMMU_TLB_DATA_DIAG; 40490618Stmm sc->sc_is.is_dqueue = SBR_IOMMU_QUEUE_DIAG; 40590618Stmm sc->sc_is.is_dva = SBR_IOMMU_SVADIAG; 40690618Stmm sc->sc_is.is_dtcmp = 0; 40790618Stmm sc->sc_is.is_sb[0] = SBR_STRBUF; 40890618Stmm sc->sc_is.is_sb[1] = NULL; 40990618Stmm 41090618Stmm /* give us a nice name.. */ 41190618Stmm name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 41290618Stmm if (name == 0) 41390618Stmm panic("sbus_probe: couldn't malloc iommu name"); 41490618Stmm snprintf(name, 32, "%s dvma", device_get_name(dev)); 41590618Stmm 416100188Stmm /* 417100188Stmm * Note: the SBus IOMMU ignores the high bits of an address, so a NULL 418100188Stmm * DMA pointer will be translated by the first page of the IOTSB. 419100188Stmm * To detect bugs we'll allocate and ignore the first entry. 420100188Stmm */ 421100188Stmm iommu_init(name, &sc->sc_is, 0, -1, 1); 42290618Stmm 42390618Stmm /* Enable the over-temperature and power-fail intrrupts. */ 42490618Stmm rid = 0; 42590618Stmm mr = SYSIO_READ8(sc, SBR_THERM_INT_MAP); 42690618Stmm vec = INTVEC(mr); 42790618Stmm if ((sc->sc_ot_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, vec, 42890618Stmm vec, 1, RF_ACTIVE)) == NULL) 42990618Stmm panic("sbus_probe: failed to get temperature interrupt"); 43090618Stmm bus_setup_intr(dev, sc->sc_ot_ires, INTR_TYPE_MISC | INTR_FAST, 43190618Stmm sbus_overtemp, sc, &sc->sc_ot_ihand); 43290618Stmm SYSIO_WRITE8(sc, SBR_THERM_INT_MAP, mr | INTMAP_V); 43390618Stmm rid = 0; 43490618Stmm mr = SYSIO_READ8(sc, SBR_POWER_INT_MAP); 43590618Stmm vec = INTVEC(mr); 43690618Stmm if ((sc->sc_pf_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, vec, 43790618Stmm vec, 1, RF_ACTIVE)) == NULL) 43890618Stmm panic("sbus_probe: failed to get power fail interrupt"); 43990618Stmm bus_setup_intr(dev, sc->sc_pf_ires, INTR_TYPE_MISC | INTR_FAST, 44090618Stmm sbus_pwrfail, sc, &sc->sc_pf_ihand); 44190618Stmm SYSIO_WRITE8(sc, SBR_POWER_INT_MAP, mr | INTMAP_V); 44290618Stmm 44390618Stmm /* Initialize the counter-timer. */ 44490618Stmm sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle, SBR_TC0); 44590618Stmm 44690618Stmm /* 44790618Stmm * Loop through ROM children, fixing any relative addresses 44890618Stmm * and then configuring each device. 44990618Stmm * `specials' is an array of device names that are treated 45090618Stmm * specially: 45190618Stmm */ 45290618Stmm for (child = OF_child(node); child != 0; child = OF_peer(child)) { 45390618Stmm if ((OF_getprop_alloc(child, "name", 1, (void **)&cname)) == -1) 45490618Stmm continue; 45590618Stmm 45690618Stmm if ((sdi = sbus_setup_dinfo(sc, child, cname)) == NULL) { 45790618Stmm device_printf(dev, "<%s>: incomplete\n", cname); 45890618Stmm free(cname, M_OFWPROP); 45990618Stmm continue; 46090618Stmm } 46190618Stmm if ((cdev = device_add_child(dev, NULL, -1)) == NULL) 46290618Stmm panic("sbus_probe: device_add_child failed"); 46390618Stmm device_set_ivars(cdev, sdi); 46490618Stmm } 46590618Stmm return (0); 46690618Stmm} 46790618Stmm 46890618Stmmstatic struct sbus_devinfo * 46990618Stmmsbus_setup_dinfo(struct sbus_softc *sc, phandle_t node, char *name) 47090618Stmm{ 47190618Stmm struct sbus_devinfo *sdi; 47290618Stmm struct sbus_regs *reg; 47390618Stmm u_int32_t base, iv, *intr; 47490618Stmm int i, nreg, nintr, slot, rslot; 47590618Stmm 47690618Stmm sdi = malloc(sizeof(*sdi), M_DEVBUF, M_ZERO | M_WAITOK); 47790618Stmm if (sdi == NULL) 47890618Stmm return (NULL); 47990618Stmm resource_list_init(&sdi->sdi_rl); 48090618Stmm sdi->sdi_name = name; 48190618Stmm sdi->sdi_node = node; 48290618Stmm OF_getprop_alloc(node, "compat", 1, (void **)&sdi->sdi_compat); 48390618Stmm OF_getprop_alloc(node, "device_type", 1, (void **)&sdi->sdi_type); 48490618Stmm slot = -1; 48590618Stmm nreg = OF_getprop_alloc(node, "reg", sizeof(*reg), (void **)®); 48690618Stmm if (nreg == -1) { 48790618Stmm if (sdi->sdi_type == NULL || 48890618Stmm strcmp(sdi->sdi_type, "hierarchical") != 0) { 48990618Stmm sbus_destroy_dinfo(sdi); 49090618Stmm return (NULL); 49190618Stmm } 49290618Stmm } else { 49390618Stmm for (i = 0; i < nreg; i++) { 49490618Stmm base = reg[i].sbr_offset; 49590618Stmm if (SBUS_ABS(base)) { 49690618Stmm rslot = SBUS_ABS_TO_SLOT(base); 49790618Stmm base = SBUS_ABS_TO_OFFSET(base); 49890618Stmm } else 49990618Stmm rslot = reg[i].sbr_slot; 50090618Stmm if (slot != -1 && slot != rslot) 50190618Stmm panic("sbus_setup_dinfo: multiple slots"); 50290618Stmm slot = rslot; 50390618Stmm 50490618Stmm resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY, i, 50590618Stmm base, base + reg[i].sbr_size, reg[i].sbr_size); 50690618Stmm } 50790618Stmm free(reg, M_OFWPROP); 50890618Stmm } 50990618Stmm sdi->sdi_slot = slot; 51090618Stmm 51190618Stmm /* 51290618Stmm * The `interrupts' property contains the Sbus interrupt level. 51390618Stmm */ 51490618Stmm nintr = OF_getprop_alloc(node, "interrupts", sizeof(*intr), (void **)&intr); 51590618Stmm if (nintr != -1) { 51690618Stmm for (i = 0; i < nintr; i++) { 51790618Stmm iv = intr[i]; 51890618Stmm /* 51990618Stmm * Sbus card devices need the slot number encoded into 52090618Stmm * the vector as this is generally not done. 52190618Stmm */ 52290618Stmm if ((iv & INTMAP_OBIO) == 0) 52390618Stmm iv |= slot << 3; 52490618Stmm /* Set the ign as appropriate. */ 52590618Stmm iv |= sc->sc_ign; 52690618Stmm resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ, i, 52790618Stmm iv, iv, 1); 52890618Stmm } 52990618Stmm free(intr, M_OFWPROP); 53090618Stmm } 53190618Stmm if (OF_getprop(node, "burst-sizes", &sdi->sdi_burstsz, 53290618Stmm sizeof(sdi->sdi_burstsz)) == -1) 53390618Stmm sdi->sdi_burstsz = sc->sc_burst; 53490618Stmm else 53590618Stmm sdi->sdi_burstsz &= sc->sc_burst; 53690618Stmm 53790618Stmm return (sdi); 53890618Stmm} 53990618Stmm 54090618Stmm/* Free everything except sdi_name, which is handled separately. */ 54190618Stmmstatic void 54290618Stmmsbus_destroy_dinfo(struct sbus_devinfo *dinfo) 54390618Stmm{ 54490618Stmm 54590618Stmm resource_list_free(&dinfo->sdi_rl); 54690618Stmm if (dinfo->sdi_compat != NULL) 54790618Stmm free(dinfo->sdi_compat, M_OFWPROP); 54890618Stmm if (dinfo->sdi_type != NULL) 54990618Stmm free(dinfo->sdi_type, M_OFWPROP); 55090618Stmm free(dinfo, M_DEVBUF); 55190618Stmm} 55290618Stmm 55390618Stmmstatic int 55490618Stmmsbus_print_child(device_t dev, device_t child) 55590618Stmm{ 55690618Stmm struct sbus_devinfo *dinfo; 55790618Stmm struct resource_list *rl; 55890618Stmm int rv; 55990618Stmm 56090618Stmm dinfo = device_get_ivars(child); 56190618Stmm rl = &dinfo->sdi_rl; 56290618Stmm rv = bus_print_child_header(dev, child); 56390618Stmm rv += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); 56490618Stmm rv += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); 56590618Stmm rv += bus_print_child_footer(dev, child); 56690618Stmm return (rv); 56790618Stmm} 56890618Stmm 56990618Stmmstatic void 57090618Stmmsbus_probe_nomatch(device_t dev, device_t child) 57190618Stmm{ 57290618Stmm char *name; 57390618Stmm char *type; 57490618Stmm 57590618Stmm if (BUS_READ_IVAR(dev, child, SBUS_IVAR_NAME, 57690618Stmm (uintptr_t *)&name) != 0 || 57790618Stmm BUS_READ_IVAR(dev, child, SBUS_IVAR_DEVICE_TYPE, 57890618Stmm (uintptr_t *)&type) != 0) 57990618Stmm return; 58090618Stmm 58190618Stmm if (type == NULL) 58290618Stmm type = "(unknown)"; 58390618Stmm device_printf(dev, "<%s>, type %s (no driver attached)\n", 58490618Stmm name, type); 58590618Stmm} 58690618Stmm 58790618Stmmstatic int 58890618Stmmsbus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 58990618Stmm{ 59090618Stmm struct sbus_softc *sc = device_get_softc(dev); 59190618Stmm struct sbus_devinfo *dinfo; 59290618Stmm 59390618Stmm if ((dinfo = device_get_ivars(child)) == NULL) 59490618Stmm return (ENOENT); 59590618Stmm switch (which) { 59690618Stmm case SBUS_IVAR_BURSTSZ: 59790618Stmm *result = dinfo->sdi_burstsz; 59890618Stmm break; 59990618Stmm case SBUS_IVAR_CLOCKFREQ: 60090618Stmm *result = sc->sc_clockfreq; 60190618Stmm break; 60290618Stmm case SBUS_IVAR_COMPAT: 60390618Stmm *result = (uintptr_t)dinfo->sdi_compat; 60490618Stmm break; 60590618Stmm case SBUS_IVAR_NAME: 60690618Stmm *result = (uintptr_t)dinfo->sdi_name; 60790618Stmm break; 60890618Stmm case SBUS_IVAR_NODE: 60990618Stmm *result = dinfo->sdi_node; 61090618Stmm break; 61190618Stmm case SBUS_IVAR_SLOT: 61290618Stmm *result = dinfo->sdi_slot; 61390618Stmm break; 61490618Stmm case SBUS_IVAR_DEVICE_TYPE: 61590618Stmm *result = (uintptr_t)dinfo->sdi_type; 61690618Stmm break; 61790618Stmm default: 61890618Stmm return (ENOENT); 61990618Stmm } 62090618Stmm return 0; 62190618Stmm} 62290618Stmm 62390618Stmmstatic struct resource_list * 62490618Stmmsbus_get_resource_list(device_t dev, device_t child) 62590618Stmm{ 62690618Stmm struct sbus_devinfo *sdi; 62790618Stmm 62890618Stmm sdi = device_get_ivars(child); 62990618Stmm return (&sdi->sdi_rl); 63090618Stmm} 63190618Stmm 63290618Stmm/* Write to the correct clr register, and call the actual handler. */ 63390618Stmmstatic void 63490618Stmmsbus_intr_stub(void *arg) 63590618Stmm{ 63690618Stmm struct sbus_clr *scl; 63790618Stmm 63890618Stmm scl = (struct sbus_clr *)arg; 63990618Stmm scl->scl_handler(scl->scl_arg); 64090618Stmm SYSIO_WRITE8(scl->scl_sc, scl->scl_clr, 0); 64190618Stmm} 64290618Stmm 64390618Stmmstatic int 64490618Stmmsbus_setup_intr(device_t dev, device_t child, 64590618Stmm struct resource *ires, int flags, driver_intr_t *intr, void *arg, 64690618Stmm void **cookiep) 64790618Stmm{ 64890618Stmm struct sbus_softc *sc; 64990618Stmm struct sbus_clr *scl; 65090618Stmm bus_addr_t intrmapptr, intrclrptr, intrptr; 65190618Stmm u_int64_t intrmap; 65290618Stmm u_int32_t inr, slot; 65390618Stmm int error, i; 65490618Stmm long vec = rman_get_start(ires); 65590618Stmm 65690618Stmm sc = (struct sbus_softc *)device_get_softc(dev); 65790618Stmm scl = (struct sbus_clr *)malloc(sizeof(*scl), M_DEVBUF, M_NOWAIT); 65890618Stmm if (scl == NULL) 65990618Stmm return (NULL); 66090618Stmm intrptr = intrmapptr = intrclrptr = 0; 66190618Stmm intrmap = 0; 662107474Stmm inr = INTVEC(vec); 663107474Stmm if ((inr & INTMAP_OBIO) == 0) { 664107474Stmm /* 665107474Stmm * We're in an SBUS slot, register the map and clear 666107474Stmm * intr registers. 667107474Stmm */ 668107474Stmm slot = INTSLOT(vec); 669107474Stmm intrmapptr = SBR_SLOT0_INT_MAP + slot * 8; 670107474Stmm intrclrptr = SBR_SLOT0_INT_CLR + 671107474Stmm (slot * 8 * 8) + (INTPRI(vec) * 8); 672107474Stmm /* Enable the interrupt, insert IGN. */ 673107474Stmm intrmap = inr | sc->sc_ign; 674107474Stmm } else { 675107474Stmm intrptr = SBR_SCSI_INT_MAP; 676107474Stmm /* Insert IGN */ 677107474Stmm inr |= sc->sc_ign; 678107474Stmm for (i = 0; intrptr <= SBR_RESERVED_INT_MAP && 679107474Stmm INTVEC(intrmap = SYSIO_READ8(sc, intrptr)) != 680107474Stmm INTVEC(inr); intrptr += 8, i++) 681107474Stmm ; 682107474Stmm if (INTVEC(intrmap) == INTVEC(inr)) { 683107474Stmm /* Register the map and clear intr registers */ 684107474Stmm intrmapptr = intrptr; 685107474Stmm intrclrptr = SBR_SCSI_INT_CLR + i * 8; 686107474Stmm /* Enable the interrupt */ 687107474Stmm } else 688107474Stmm panic("sbus_setup_intr: IRQ not found!"); 689107474Stmm } 69090618Stmm 69190618Stmm scl->scl_sc = sc; 69290618Stmm scl->scl_arg = arg; 69390618Stmm scl->scl_handler = intr; 69490618Stmm scl->scl_clr = intrclrptr; 69590618Stmm /* Disable the interrupt while we fiddle with it */ 696107474Stmm SYSIO_WRITE8(sc, intrmapptr, intrmap); 69790618Stmm error = BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, 69890618Stmm sbus_intr_stub, scl, cookiep); 69990618Stmm if (error != 0) { 70090618Stmm free(scl, M_DEVBUF); 70190618Stmm return (error); 70290618Stmm } 70390618Stmm scl->scl_cookie = *cookiep; 70490618Stmm *cookiep = scl; 70590618Stmm 70690618Stmm /* 70790618Stmm * Clear the interrupt, it might have been triggered before it was 70890618Stmm * set up. 70990618Stmm */ 710107474Stmm SYSIO_WRITE8(sc, intrclrptr, 0); 71190618Stmm /* 71290618Stmm * Enable the interrupt now we have the handler installed. 71390618Stmm * Read the current value as we can't change it besides the 71490618Stmm * valid bit so so make sure only this bit is changed. 71590618Stmm */ 716107474Stmm SYSIO_WRITE8(sc, intrmapptr, intrmap, PCPU_GET(mid)); 71790618Stmm return (error); 71890618Stmm} 71990618Stmm 72090618Stmmstatic int 72190618Stmmsbus_teardown_intr(device_t dev, device_t child, 72290618Stmm struct resource *vec, void *cookie) 72390618Stmm{ 72490618Stmm struct sbus_clr *scl; 72590618Stmm int error; 72690618Stmm 72790618Stmm scl = (struct sbus_clr *)cookie; 72890618Stmm error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec, 72990618Stmm scl->scl_cookie); 73090618Stmm /* 73190618Stmm * Don't disable the interrupt for now, so that stray interupts get 73290618Stmm * detected... 73390618Stmm */ 73490618Stmm if (error != 0) 73590618Stmm free(scl, M_DEVBUF); 73690618Stmm return (error); 73790618Stmm} 73890618Stmm 73990618Stmmstatic struct resource * 74090618Stmmsbus_alloc_resource(device_t bus, device_t child, int type, int *rid, 74190618Stmm u_long start, u_long end, u_long count, u_int flags) 74290618Stmm{ 74390618Stmm struct sbus_softc *sc; 74490618Stmm struct sbus_devinfo *sdi; 74590618Stmm struct rman *rm; 74690618Stmm struct resource *rv; 74790618Stmm struct resource_list *rl; 74890618Stmm struct resource_list_entry *rle; 74990618Stmm bus_space_handle_t bh; 75090618Stmm bus_addr_t toffs; 75190618Stmm bus_size_t tend; 75290618Stmm int i; 75390618Stmm int isdefault = (start == 0UL && end == ~0UL); 75490618Stmm int needactivate = flags & RF_ACTIVE; 75590618Stmm 75690618Stmm sc = (struct sbus_softc *)device_get_softc(bus); 75790618Stmm sdi = device_get_ivars(child); 75890618Stmm rl = &sdi->sdi_rl; 75990618Stmm rle = resource_list_find(rl, type, *rid); 76090618Stmm if (rle == NULL) 76190618Stmm return (NULL); 76290618Stmm if (rle->res != NULL) 76390618Stmm panic("sbus_alloc_resource: resource entry is busy"); 76490618Stmm if (isdefault) { 76590618Stmm start = rle->start; 76690618Stmm count = ulmax(count, rle->count); 76790618Stmm end = ulmax(rle->end, start + count - 1); 76890618Stmm } 76990618Stmm switch (type) { 77090618Stmm case SYS_RES_IRQ: 77190618Stmm rv = bus_alloc_resource(bus, type, rid, start, end, 77290618Stmm count, flags); 77390618Stmm if (rv == NULL) 77490618Stmm return (NULL); 77590618Stmm break; 77690618Stmm case SYS_RES_MEMORY: 77790618Stmm rm = NULL; 77890618Stmm bh = toffs = tend = 0; 77990618Stmm for (i = 0; i < sc->sc_nrange; i++) { 78090618Stmm if (sc->sc_rd[i].rd_slot != sdi->sdi_slot || 78190618Stmm start < sc->sc_rd[i].rd_coffset || 78290618Stmm start > sc->sc_rd[i].rd_cend) 78390618Stmm continue; 78490618Stmm /* Disallow cross-range allocations. */ 78590618Stmm if (end > sc->sc_rd[i].rd_cend) 78690618Stmm return (NULL); 78790618Stmm /* We've found the connection to the parent bus */ 78890618Stmm toffs = start - sc->sc_rd[i].rd_coffset; 78990618Stmm tend = end - sc->sc_rd[i].rd_coffset; 79090618Stmm rm = &sc->sc_rd[i].rd_rman; 79190618Stmm bh = sc->sc_rd[i].rd_bushandle; 79290618Stmm } 79390618Stmm if (toffs == NULL) 79490618Stmm return (NULL); 79590618Stmm flags &= ~RF_ACTIVE; 79690618Stmm rv = rman_reserve_resource(rm, toffs, tend, count, flags, 79790618Stmm child); 79890618Stmm if (rv == NULL) 79990618Stmm return (NULL); 80090618Stmm rman_set_bustag(rv, sc->sc_cbustag); 80190618Stmm rman_set_bushandle(rv, bh + rman_get_start(rv)); 80290618Stmm if (needactivate) { 80390618Stmm if (bus_activate_resource(child, type, *rid, rv)) { 80490618Stmm rman_release_resource(rv); 80590618Stmm return (NULL); 80690618Stmm } 80790618Stmm } 80890618Stmm break; 80990618Stmm default: 81090618Stmm return (NULL); 81190618Stmm } 81290618Stmm rle->res = rv; 81390618Stmm return (rv); 81490618Stmm} 81590618Stmm 81690618Stmmstatic int 81790618Stmmsbus_activate_resource(device_t bus, device_t child, int type, int rid, 81890618Stmm struct resource *r) 81990618Stmm{ 82090618Stmm 82190618Stmm if (type == SYS_RES_IRQ) 82290618Stmm return (bus_activate_resource(bus, type, rid, r)); 82390618Stmm return (rman_activate_resource(r)); 82490618Stmm} 82590618Stmm 82690618Stmmstatic int 82790618Stmmsbus_deactivate_resource(device_t bus, device_t child, int type, int rid, 82890618Stmm struct resource *r) 82990618Stmm{ 83090618Stmm 83190618Stmm if (type == SYS_RES_IRQ) 83290618Stmm return (bus_deactivate_resource(bus, type, rid, r)); 83390618Stmm return (rman_deactivate_resource(r)); 83490618Stmm} 83590618Stmm 83690618Stmmstatic int 83790618Stmmsbus_release_resource(device_t bus, device_t child, int type, int rid, 83890618Stmm struct resource *r) 83990618Stmm{ 84090618Stmm int error; 84190618Stmm 84290618Stmm if (type == SYS_RES_IRQ) 84390618Stmm return (bus_release_resource(bus, type, rid, r)); 84490618Stmm if (rman_get_flags(r) & RF_ACTIVE) { 84590618Stmm error = bus_deactivate_resource(child, type, rid, r); 84690618Stmm if (error) 84790618Stmm return error; 84890618Stmm } 84990618Stmm return (rman_release_resource(r)); 85090618Stmm} 85190618Stmm 85290618Stmm/* 85390618Stmm * Handle an overtemp situation. 85490618Stmm * 85590618Stmm * SPARCs have temperature sensors which generate interrupts 85690618Stmm * if the machine's temperature exceeds a certain threshold. 85790618Stmm * This handles the interrupt and powers off the machine. 85890618Stmm * The same needs to be done to PCI controller drivers. 85990618Stmm */ 86090618Stmmstatic void 86190618Stmmsbus_overtemp(void *arg) 86290618Stmm{ 86390618Stmm 86490618Stmm printf("DANGER: OVER TEMPERATURE detected\nShutting down NOW.\n"); 86590618Stmm shutdown_nice(RB_POWEROFF); 86690618Stmm} 86790618Stmm 86890618Stmm/* Try to shut down in time in case of power failure. */ 86990618Stmmstatic void 87090618Stmmsbus_pwrfail(void *arg) 87190618Stmm{ 87290618Stmm 87390618Stmm printf("Power failure detected\nShutting down NOW.\n"); 87490618Stmm shutdown_nice(0); 87590618Stmm} 87690618Stmm 87790618Stmmstatic bus_space_tag_t 87890618Stmmsbus_alloc_bustag(struct sbus_softc *sc) 87990618Stmm{ 88090618Stmm bus_space_tag_t sbt; 88190618Stmm 88290618Stmm sbt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF, 88390618Stmm M_NOWAIT | M_ZERO); 88490618Stmm if (sbt == NULL) 88590618Stmm panic("sbus_alloc_bustag: out of memory"); 88690618Stmm 88790618Stmm bzero(sbt, sizeof *sbt); 88890618Stmm sbt->cookie = sc; 88990618Stmm sbt->parent = sc->sc_bustag; 89090618Stmm sbt->type = SBUS_BUS_SPACE; 89190618Stmm return (sbt); 89290618Stmm} 89390618Stmm 89490618Stmmstatic int 89593070Stmmsbus_dmamap_create(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, int flags, 89693070Stmm bus_dmamap_t *mapp) 89790618Stmm{ 89893070Stmm struct sbus_softc *sc = (struct sbus_softc *)pdmat->cookie; 89990618Stmm 90093070Stmm return (iommu_dvmamap_create(pdmat, ddmat, &sc->sc_is, flags, mapp)); 90190618Stmm 90290618Stmm} 90390618Stmm 90490618Stmmstatic int 90593070Stmmsbus_dmamap_destroy(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map) 90690618Stmm{ 90793070Stmm struct sbus_softc *sc = (struct sbus_softc *)pdmat->cookie; 90890618Stmm 90993070Stmm return (iommu_dvmamap_destroy(pdmat, ddmat, &sc->sc_is, map)); 91090618Stmm} 91190618Stmm 91290618Stmmstatic int 91393070Stmmsbus_dmamap_load(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map, 91493070Stmm void *buf, bus_size_t buflen, bus_dmamap_callback_t *callback, 91593070Stmm void *callback_arg, int flags) 91690618Stmm{ 91793070Stmm struct sbus_softc *sc = (struct sbus_softc *)pdmat->cookie; 91890618Stmm 91993070Stmm return (iommu_dvmamap_load(pdmat, ddmat, &sc->sc_is, map, buf, buflen, 92093070Stmm callback, callback_arg, flags)); 92190618Stmm} 92290618Stmm 92390618Stmmstatic void 92493070Stmmsbus_dmamap_unload(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map) 92590618Stmm{ 92693070Stmm struct sbus_softc *sc = (struct sbus_softc *)pdmat->cookie; 92790618Stmm 92893070Stmm iommu_dvmamap_unload(pdmat, ddmat, &sc->sc_is, map); 92990618Stmm} 93090618Stmm 93190618Stmmstatic void 93293070Stmmsbus_dmamap_sync(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, bus_dmamap_t map, 93390618Stmm bus_dmasync_op_t op) 93490618Stmm{ 93593070Stmm struct sbus_softc *sc = (struct sbus_softc *)pdmat->cookie; 93690618Stmm 93793070Stmm iommu_dvmamap_sync(pdmat, ddmat, &sc->sc_is, map, op); 93890618Stmm} 93990618Stmm 94090618Stmmstatic int 94193070Stmmsbus_dmamem_alloc(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void **vaddr, 94293070Stmm int flags, bus_dmamap_t *mapp) 94390618Stmm{ 94493070Stmm struct sbus_softc *sc = (struct sbus_softc *)pdmat->cookie; 94590618Stmm 94693070Stmm return (iommu_dvmamem_alloc(pdmat, ddmat, &sc->sc_is, vaddr, flags, 94793070Stmm mapp)); 94890618Stmm} 94990618Stmm 95090618Stmmstatic void 95193070Stmmsbus_dmamem_free(bus_dma_tag_t pdmat, bus_dma_tag_t ddmat, void *vaddr, 95293070Stmm bus_dmamap_t map) 95390618Stmm{ 95493070Stmm struct sbus_softc *sc = (struct sbus_softc *)pdmat->cookie; 95590618Stmm 95693070Stmm iommu_dvmamem_free(pdmat, ddmat, &sc->sc_is, vaddr, map); 95790618Stmm} 958