ofw_pcib_subr.c revision 153342
1/*- 2 * Copyright (c) 2003 by Thomas Moestl <tmm@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 18 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 19 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 20 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 21 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 23 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26#include <sys/cdefs.h> 27__FBSDID("$FreeBSD: head/sys/sparc64/pci/ofw_pcib_subr.c 153342 2005-12-12 16:07:11Z marius $"); 28 29#include "opt_ofw_pci.h" 30 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/bus.h> 34 35#include <dev/ofw/ofw_bus.h> 36#include <dev/ofw/ofw_pci.h> 37#include <dev/ofw/openfirm.h> 38 39#include <machine/bus.h> 40#include <machine/ofw_bus.h> 41 42#include <dev/pci/pcireg.h> 43#include <dev/pci/pcivar.h> 44#include <dev/pci/pcib_private.h> 45 46#include "pcib_if.h" 47 48#include <sparc64/pci/ofw_pci.h> 49#include <sparc64/pci/ofw_pcib_subr.h> 50 51void 52ofw_pcib_gen_setup(device_t bridge) 53{ 54 struct ofw_pcib_gen_softc *sc; 55 u_int secbus; 56 57 sc = device_get_softc(bridge); 58 sc->ops_pcib_sc.dev = bridge; 59 sc->ops_node = ofw_bus_get_node(bridge); 60 KASSERT(sc->ops_node != 0, 61 ("ofw_pcib_gen_setup: no ofw pci parent bus!")); 62 63 /* 64 * Setup the secondary bus number register, by allocating a new unique 65 * bus number for it; the firmware preset does not always seem to be 66 * correct. 67 */ 68 secbus = ofw_pci_alloc_busno(sc->ops_node); 69 pci_write_config(bridge, PCIR_PRIBUS_1, pci_get_bus(bridge), 1); 70 pci_write_config(bridge, PCIR_SECBUS_1, secbus, 1); 71 pci_write_config(bridge, PCIR_SUBBUS_1, secbus, 1); 72 sc->ops_pcib_sc.subbus = sc->ops_pcib_sc.secbus = secbus; 73 /* Notify parent bridges. */ 74 OFW_PCI_ADJUST_BUSRANGE(device_get_parent(bridge), secbus); 75 76 ofw_bus_setup_iinfo(sc->ops_node, &sc->ops_iinfo, 77 sizeof(ofw_pci_intr_t)); 78} 79 80int 81ofw_pcib_gen_route_interrupt(device_t bridge, device_t dev, int intpin) 82{ 83 struct ofw_pcib_gen_softc *sc; 84 struct ofw_bus_iinfo *ii; 85 struct ofw_pci_register reg; 86 ofw_pci_intr_t pintr, mintr; 87 uint8_t maskbuf[sizeof(reg) + sizeof(pintr)]; 88 89 sc = device_get_softc(bridge); 90 ii = &sc->ops_iinfo; 91 if (ii->opi_imapsz > 0) { 92 pintr = intpin; 93 if (ofw_bus_lookup_imap(ofw_bus_get_node(dev), ii, ®, 94 sizeof(reg), &pintr, sizeof(pintr), &mintr, sizeof(mintr), 95 maskbuf)) { 96 /* 97 * If we've found a mapping, return it and don't map 98 * it again on higher levels - that causes problems 99 * in some cases, and never seems to be required. 100 */ 101 return (mintr); 102 } 103 } else if (intpin >= 1 && intpin <= 4) { 104 /* 105 * When an interrupt map is missing, we need to do the 106 * standard PCI swizzle and continue mapping at the parent. 107 */ 108 return (pcib_route_interrupt(bridge, dev, intpin)); 109 } 110 /* Try at the parent. */ 111 return (PCIB_ROUTE_INTERRUPT(device_get_parent(device_get_parent( 112 bridge)), bridge, intpin)); 113} 114 115phandle_t 116ofw_pcib_gen_get_node(device_t bridge, device_t dev) 117{ 118 struct ofw_pcib_gen_softc *sc; 119 120 sc = device_get_softc(bridge); 121 return (sc->ops_node); 122} 123 124void 125ofw_pcib_gen_adjust_busrange(device_t bridge, u_int subbus) 126{ 127 struct ofw_pcib_gen_softc *sc; 128 129 sc = device_get_softc(bridge); 130 if (subbus > sc->ops_pcib_sc.subbus) { 131#ifdef OFW_PCI_DEBUG 132 device_printf(bridge, 133 "adjusting secondary bus number from %d to %d\n", 134 sc->ops_pcib_sc.subbus, subbus); 135#endif 136 pci_write_config(bridge, PCIR_SUBBUS_1, subbus, 1); 137 sc->ops_pcib_sc.subbus = subbus; 138 /* Notify parent bridges. */ 139 OFW_PCI_ADJUST_BUSRANGE(device_get_parent(bridge), subbus); 140 } 141} 142