cpufunc.h revision 86228 
1/*-
2 * Copyright (c) 2001 Jake Burkholder.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/sparc64/include/cpufunc.h 86228 2001-11-09 20:05:53Z tmm $
27 */
28
29#ifndef	_MACHINE_CPUFUNC_H_
30#define	_MACHINE_CPUFUNC_H_
31
32#include <machine/asi.h>
33#include <machine/pstate.h>
34
35/*
36 * membar operand macros for use in other macros when # is a special
37 * character.  Keep these in sync with what the hardware expects.
38 */
39#define	C_Lookaside	(0)
40#define	C_MemIssue	(1)
41#define	C_Sync		(2)
42#define	M_LoadLoad	(0)
43#define	M_StoreLoad	(1)
44#define	M_LoadStore	(2)
45#define	M_StoreStore	(3)
46
47#define	CMASK_SHIFT	(4)
48#define	MMASK_SHIFT	(0)
49
50#define	CMASK_GEN(bit)	((1 << (bit)) << CMASK_SHIFT)
51#define	MMASK_GEN(bit)	((1 << (bit)) << MMASK_SHIFT)
52
53#define	Lookaside	CMASK_GEN(C_Lookaside)
54#define	MemIssue	CMASK_GEN(C_MemIssue)
55#define	Sync		CMASK_GEN(C_Sync)
56#define	LoadLoad	MMASK_GEN(M_LoadLoad)
57#define	StoreLoad	MMASK_GEN(M_StoreLoad)
58#define	LoadStore	MMASK_GEN(M_LoadStore)
59#define	StoreStore	MMASK_GEN(M_StoreStore)
60
61#define	casa(rs1, rs2, rd, asi) ({					\
62	u_int __rd = (u_int32_t)(rd);					\
63	__asm __volatile("casa [%1] %2, %3, %0"				\
64	    : "+r" (__rd) : "r" (rs1), "n" (asi), "r" (rs2));		\
65	__rd;								\
66})
67
68#define	casxa(rs1, rs2, rd, asi) ({					\
69	u_long __rd = (u_int64_t)(rd);					\
70	__asm __volatile("casxa [%1] %2, %3, %0"			\
71	    : "+r" (__rd) : "r" (rs1), "n" (asi), "r" (rs2));		\
72	__rd;								\
73})
74
75#define	flush(va) do {							\
76	__asm __volatile("flush %0" : : "r" (va));			\
77} while (0)
78
79#define	flushw() do {							\
80	__asm __volatile("flushw" : :);					\
81} while (0)
82
83/* Generate ld*a/st*a functions for non-constant ASI's. */
84#define LDNC_GEN(tp, o)							\
85	static __inline tp						\
86	o ## _nc(caddr_t va, int asi)					\
87	{								\
88		tp r;							\
89		__asm __volatile("wr %2, 0, %%asi;" #o " [%1] %%asi, %0"\
90		    : "=r" (r) : "r" (va), "r" (asi));			\
91		return (r);						\
92	}
93
94LDNC_GEN(u_char, lduba);
95LDNC_GEN(u_short, lduha);
96LDNC_GEN(u_int, lduwa);
97LDNC_GEN(u_long, ldxa);
98
99#define	LD_GENERIC(va, asi, op, type) ({				\
100	type __r;							\
101	__asm __volatile(#op " [%1] %2, %0"				\
102	    : "=r" (__r) : "r" (va), "n" (asi));			\
103	__r;								\
104})
105
106#define	lduba(va, asi)	LD_GENERIC(va, asi, lduba, u_char)
107#define	lduha(va, asi)	LD_GENERIC(va, asi, lduha, u_short)
108#define	lduwa(va, asi)	LD_GENERIC(va, asi, lduwa, u_int)
109#define	ldxa(va, asi)	LD_GENERIC(va, asi, ldxa, u_long)
110
111#define STNC_GEN(tp, o)							\
112	static __inline void						\
113	o ## _nc(caddr_t va, int asi, tp val)				\
114	{								\
115		__asm __volatile("wr %2, 0, %%asi;" #o " %0, [%1] %%asi"\
116		    : : "r" (val), "r" (va), "r" (asi));		\
117	}
118
119STNC_GEN(u_char, stba);
120STNC_GEN(u_short, stha);
121STNC_GEN(u_int, stwa);
122STNC_GEN(u_long, stxa);
123
124#define	ST_GENERIC(va, asi, val, op)					\
125	__asm __volatile(#op " %0, [%1] %2"				\
126	    : : "r" (val), "r" (va), "n" (asi));			\
127
128#define	stba(va, asi, val)	ST_GENERIC(va, asi, val, stba)
129#define	stha(va, asi, val)	ST_GENERIC(va, asi, val, stha)
130#define	stwa(va, asi, val)	ST_GENERIC(va, asi, val, stwa)
131#define	stxa(va, asi, val)	ST_GENERIC(va, asi, val, stxa)
132
133#define	membar(mask) do {						\
134	__asm __volatile("membar %0" : : "n" (mask));			\
135} while (0)
136
137#define	rd(name) ({							\
138	u_int64_t __sr;							\
139	__asm __volatile("rd %%" #name ", %0" : "=r" (__sr) :);		\
140	__sr;								\
141})
142
143#define	wr(name, val, xor) do {						\
144	__asm __volatile("wr %0, %1, %%" #name				\
145	    : : "r" (val), "rI" (xor));					\
146} while (0)
147
148#define	rdpr(name) ({							\
149	u_int64_t __pr;							\
150	__asm __volatile("rdpr %%" #name", %0" : "=r" (__pr) :);	\
151	__pr;								\
152})
153
154#define	wrpr(name, val, xor) do {					\
155	__asm __volatile("wrpr %0, %1, %%" #name			\
156	    : : "r" (val), "rI" (xor));					\
157} while (0)
158
159static __inline void
160breakpoint(void)
161{
162	__asm __volatile("ta %%xcc, 1" : :);
163}
164
165static __inline critical_t
166critical_enter(void)
167{
168	critical_t pil;
169
170	pil = rdpr(pil);
171	wrpr(pil, 0, 14);
172	return (pil);
173}
174
175static __inline void
176critical_exit(critical_t pil)
177{
178	wrpr(pil, pil, 0);
179}
180
181void ascopyfrom(u_long sasi, vm_offset_t src, caddr_t dst, size_t len);
182void ascopyto(caddr_t src, u_long dasi, vm_offset_t dst, size_t len);
183
184/*
185 * Ultrasparc II doesn't implement popc in hardware.  Suck.
186 */
187#if 0
188#define	HAVE_INLINE_FFS
189/*
190 * See page 202 of the SPARC v9 Architecture Manual.
191 */
192static __inline int
193ffs(int mask)
194{
195	int result;
196	int neg;
197	int tmp;
198
199	__asm __volatile(
200	"	neg	%3, %1 ;	"
201	"	xnor	%3, %1, %2 ;	"
202	"	popc	%2, %0 ;	"
203	"	movrz	%3, %%g0, %0 ;	"
204	: "=r" (result), "=r" (neg), "=r" (tmp) : "r" (mask));
205	return (result);
206}
207#endif
208
209#undef LDNC_GEN
210#undef STNC_GEN
211
212#endif /* !_MACHINE_CPUFUNC_H_ */
213