1176770Sraj/*-
2176770Sraj * Copyright (C) 2006 Semihalf, Marian Balakowicz <m8@semihalf.com>
3176770Sraj * All rights reserved.
4176770Sraj *
5176770Sraj * Redistribution and use in source and binary forms, with or without
6176770Sraj * modification, are permitted provided that the following conditions
7176770Sraj * are met:
8176770Sraj * 1. Redistributions of source code must retain the above copyright
9176770Sraj *    notice, this list of conditions and the following disclaimer.
10176770Sraj * 2. Redistributions in binary form must reproduce the above copyright
11176770Sraj *    notice, this list of conditions and the following disclaimer in the
12176770Sraj *    documentation and/or other materials provided with the distribution.
13176770Sraj * 3. The name of the author may not be used to endorse or promote products
14176770Sraj *    derived from this software without specific prior written permission.
15176770Sraj *
16176770Sraj * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17176770Sraj * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18176770Sraj * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
19176770Sraj * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20176770Sraj * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
21176770Sraj * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
22176770Sraj * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
23176770Sraj * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
24176770Sraj * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25176770Sraj * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26176770Sraj *
27176770Sraj * $FreeBSD$
28176770Sraj */
29176770Sraj
30176770Sraj#ifndef	_MACHINE_TLB_H_
31176770Sraj#define	_MACHINE_TLB_H_
32176770Sraj
33176770Sraj/*  PowerPC E500 MAS registers */
34176770Sraj#define MAS0_TLBSEL(x)		((x << 28) & 0x10000000)
35176770Sraj#define MAS0_ESEL(x)		((x << 16) & 0x000F0000)
36176770Sraj
37176770Sraj#define MAS0_TLBSEL1		0x10000000
38176770Sraj#define MAS0_TLBSEL0		0x00000000
39176770Sraj#define MAS0_ESEL_TLB1MASK	0x000F0000
40176770Sraj#define MAS0_ESEL_TLB0MASK	0x00030000
41176770Sraj#define MAS0_ESEL_SHIFT		16
42176770Sraj#define MAS0_NV_MASK		0x00000003
43176770Sraj#define MAS0_NV_SHIFT		0
44176770Sraj
45176770Sraj#define MAS1_VALID		0x80000000
46176770Sraj#define MAS1_IPROT		0x40000000
47176770Sraj#define MAS1_TID_MASK		0x00FF0000
48176770Sraj#define MAS1_TID_SHIFT		16
49187149Sraj#define MAS1_TS_MASK		0x00001000
50187149Sraj#define MAS1_TS_SHIFT		12
51176770Sraj#define MAS1_TSIZE_MASK		0x00000F00
52176770Sraj#define MAS1_TSIZE_SHIFT	8
53176770Sraj
54176770Sraj#define	TLB_SIZE_4K		1
55176770Sraj#define	TLB_SIZE_16K		2
56176770Sraj#define	TLB_SIZE_64K		3
57176770Sraj#define	TLB_SIZE_256K		4
58176770Sraj#define	TLB_SIZE_1M		5
59176770Sraj#define	TLB_SIZE_4M		6
60176770Sraj#define	TLB_SIZE_16M		7
61176770Sraj#define	TLB_SIZE_64M		8
62176770Sraj#define	TLB_SIZE_256M		9
63176770Sraj#define	TLB_SIZE_1G		10
64176770Sraj#define	TLB_SIZE_4G		11
65176770Sraj
66187149Sraj#define	MAS2_EPN_MASK		0xFFFFF000
67176770Sraj#define	MAS2_EPN_SHIFT		12
68176770Sraj#define	MAS2_X0			0x00000040
69176770Sraj#define	MAS2_X1			0x00000020
70176770Sraj#define	MAS2_W			0x00000010
71176770Sraj#define	MAS2_I			0x00000008
72176770Sraj#define	MAS2_M			0x00000004
73176770Sraj#define	MAS2_G			0x00000002
74176770Sraj#define	MAS2_E			0x00000001
75176770Sraj
76176770Sraj#define	MAS3_RPN		0xFFFFF000
77176770Sraj#define	MAS3_RPN_SHIFT		12
78176770Sraj#define	MAS3_U0			0x00000200
79176770Sraj#define	MAS3_U1			0x00000100
80176770Sraj#define	MAS3_U2			0x00000080
81176770Sraj#define	MAS3_U3			0x00000040
82176770Sraj#define	MAS3_UX			0x00000020
83176770Sraj#define	MAS3_SX			0x00000010
84176770Sraj#define	MAS3_UW			0x00000008
85176770Sraj#define	MAS3_SW			0x00000004
86176770Sraj#define	MAS3_UR			0x00000002
87176770Sraj#define	MAS3_SR			0x00000001
88176770Sraj
89176770Sraj#define MAS4_TLBSELD1		0x10000000
90176770Sraj#define MAS4_TLBSELD0		0x00000000
91176770Sraj#define MAS4_TIDSELD_MASK	0x00030000
92176770Sraj#define MAS4_TIDSELD_SHIFT	16
93176770Sraj#define MAS4_TSIZED_MASK	0x00000F00
94176770Sraj#define MAS4_TSIZED_SHIFT	8
95176770Sraj#define MAS4_X0D		0x00000040
96176770Sraj#define MAS4_X1D		0x00000020
97176770Sraj#define MAS4_WD			0x00000010
98176770Sraj#define MAS4_ID			0x00000008
99176770Sraj#define MAS4_MD			0x00000004
100176770Sraj#define MAS4_GD			0x00000002
101176770Sraj#define MAS4_ED			0x00000001
102176770Sraj
103176770Sraj#define MAS6_SPID0_MASK		0x00FF0000
104176770Sraj#define MAS6_SPID0_SHIFT	16
105176770Sraj#define MAS6_SAS		0x00000001
106176770Sraj
107176770Sraj#define MAS1_GETTID(mas1)	(((mas1) & MAS1_TID_MASK) >> MAS1_TID_SHIFT)
108176770Sraj
109176770Sraj#define MAS2_TLB0_ENTRY_IDX_MASK	0x0007f000
110176770Sraj#define MAS2_TLB0_ENTRY_IDX_SHIFT	12
111176770Sraj
112176770Sraj/*
113187149Sraj * Maximum number of TLB1 entries used for a permanent mapping of kernel
114187149Sraj * region (kernel image plus statically allocated data).
115176770Sraj */
116176770Sraj#define KERNEL_REGION_MAX_TLB_ENTRIES   4
117176770Sraj
118176770Sraj#define _TLB_ENTRY_IO	(MAS2_I | MAS2_G)
119187149Sraj#ifdef SMP
120187149Sraj#define _TLB_ENTRY_MEM	(MAS2_M)
121187149Sraj#else
122176770Sraj#define _TLB_ENTRY_MEM	(0)
123187149Sraj#endif
124176770Sraj
125187149Sraj#define TID_KERNEL	0	/* TLB TID to use for kernel (shared) translations */
126176770Sraj#define TID_KRESERVED	1	/* Number of TIDs reserved for kernel */
127187149Sraj#define TID_URESERVED	0	/* Number of TIDs reserved for user */
128176770Sraj#define TID_MIN		(TID_KRESERVED + TID_URESERVED)
129176770Sraj#define TID_MAX		255
130187149Sraj#define TID_NONE	-1
131176770Sraj
132215119Sraj#define TLB_UNLOCKED	0
133215119Sraj
134176770Sraj#if !defined(LOCORE)
135176770Srajtypedef struct tlb_entry {
136187149Sraj	uint32_t mas1;
137187149Sraj	uint32_t mas2;
138187149Sraj	uint32_t mas3;
139176770Sraj} tlb_entry_t;
140176770Sraj
141187149Srajtypedef int tlbtid_t;
142176770Srajstruct pmap;
143176770Sraj
144187149Srajvoid tlb0_print_tlbentries(void);
145187149Sraj
146176770Srajvoid tlb1_inval_entry(unsigned int);
147176770Srajvoid tlb1_init(vm_offset_t);
148176770Srajvoid tlb1_print_entries(void);
149176770Srajvoid tlb1_print_tlbentries(void);
150176770Sraj
151215119Srajvoid tlb_lock(uint32_t *);
152215119Srajvoid tlb_unlock(uint32_t *);
153215119Sraj
154176770Sraj#endif /* !LOCORE */
155176770Sraj
156176770Sraj#endif	/* _MACHINE_TLB_H_ */
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