1139825Simp/*- 277957Sbenno * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA. 377957Sbenno * 477957Sbenno * Redistribution and use in source and binary forms, with or without 577957Sbenno * modification, are permitted provided that the following conditions 677957Sbenno * are met: 777957Sbenno * 1. Redistributions of source code must retain the above copyright 877957Sbenno * notice, this list of conditions and the following disclaimer. 977957Sbenno * 2. Redistributions in binary form must reproduce the above copyright 1077957Sbenno * notice, this list of conditions and the following disclaimer in the 1177957Sbenno * documentation and/or other materials provided with the distribution. 1277957Sbenno * 3. All advertising materials mentioning features or use of this software 1377957Sbenno * must display the following acknowledgement: 1477957Sbenno * This product includes software developed under OpenBSD by 1577957Sbenno * Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA. 1677957Sbenno * 4. The name of the author may not be used to endorse or promote products 1777957Sbenno * derived from this software without specific prior written permission. 1877957Sbenno * 1977957Sbenno * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 2077957Sbenno * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 2177957Sbenno * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2277957Sbenno * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 2377957Sbenno * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2477957Sbenno * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2577957Sbenno * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2677957Sbenno * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2777957Sbenno * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2877957Sbenno * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2977957Sbenno * SUCH DAMAGE. 3077957Sbenno * 3177957Sbenno * $NetBSD: pio.h,v 1.1 1998/05/15 10:15:54 tsubai Exp $ 3277957Sbenno * $OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $ 3377957Sbenno * $FreeBSD$ 3477957Sbenno */ 3577957Sbenno 3677957Sbenno#ifndef _MACHINE_PIO_H_ 3777957Sbenno#define _MACHINE_PIO_H_ 3877957Sbenno/* 3977957Sbenno * I/O macros. 4077957Sbenno */ 4177957Sbenno 4277957Sbennostatic __inline void 4377957Sbenno__outb(volatile u_int8_t *a, u_int8_t v) 4477957Sbenno{ 4577957Sbenno *a = v; 4677957Sbenno __asm__ volatile("eieio; sync"); 4777957Sbenno} 4877957Sbenno 4977957Sbennostatic __inline void 5077957Sbenno__outw(volatile u_int16_t *a, u_int16_t v) 5177957Sbenno{ 5277957Sbenno *a = v; 5377957Sbenno __asm__ volatile("eieio; sync"); 5477957Sbenno} 5577957Sbenno 5677957Sbennostatic __inline void 5777957Sbenno__outl(volatile u_int32_t *a, u_int32_t v) 5877957Sbenno{ 5977957Sbenno *a = v; 6077957Sbenno __asm__ volatile("eieio; sync"); 6177957Sbenno} 6277957Sbenno 6377957Sbennostatic __inline void 64193578Sraj__outll(volatile u_int64_t *a, u_int64_t v) 65193578Sraj{ 66193578Sraj *a = v; 67193578Sraj __asm__ volatile("eieio; sync"); 68193578Sraj} 69193578Sraj 70193578Srajstatic __inline void 7177957Sbenno__outwrb(volatile u_int16_t *a, u_int16_t v) 7277957Sbenno{ 7377957Sbenno __asm__ volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a)); 7477957Sbenno __asm__ volatile("eieio; sync"); 7577957Sbenno} 7677957Sbenno 7777957Sbennostatic __inline void 7877957Sbenno__outlrb(volatile u_int32_t *a, u_int32_t v) 7977957Sbenno{ 8077957Sbenno __asm__ volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a)); 8177957Sbenno __asm__ volatile("eieio; sync"); 8277957Sbenno} 8377957Sbenno 8477957Sbennostatic __inline u_int8_t 8577957Sbenno__inb(volatile u_int8_t *a) 8677957Sbenno{ 8777957Sbenno u_int8_t _v_; 8877957Sbenno 8977957Sbenno _v_ = *a; 9077957Sbenno __asm__ volatile("eieio; sync"); 9177957Sbenno return _v_; 9277957Sbenno} 9377957Sbenno 9477957Sbennostatic __inline u_int16_t 9577957Sbenno__inw(volatile u_int16_t *a) 9677957Sbenno{ 9777957Sbenno u_int16_t _v_; 9877957Sbenno 9977957Sbenno _v_ = *a; 10077957Sbenno __asm__ volatile("eieio; sync"); 10177957Sbenno return _v_; 10277957Sbenno} 10377957Sbenno 10477957Sbennostatic __inline u_int32_t 10577957Sbenno__inl(volatile u_int32_t *a) 10677957Sbenno{ 10777957Sbenno u_int32_t _v_; 10877957Sbenno 10977957Sbenno _v_ = *a; 11077957Sbenno __asm__ volatile("eieio; sync"); 11177957Sbenno return _v_; 11277957Sbenno} 11377957Sbenno 114193578Srajstatic __inline u_int64_t 115193578Sraj__inll(volatile u_int64_t *a) 116193578Sraj{ 117193578Sraj u_int64_t _v_; 118193578Sraj 119193578Sraj _v_ = *a; 120193578Sraj __asm__ volatile("eieio; sync"); 121193578Sraj return _v_; 122193578Sraj} 123193578Sraj 12477957Sbennostatic __inline u_int16_t 12577957Sbenno__inwrb(volatile u_int16_t *a) 12677957Sbenno{ 12777957Sbenno u_int16_t _v_; 12877957Sbenno 12977957Sbenno __asm__ volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a)); 13077957Sbenno __asm__ volatile("eieio; sync"); 13177957Sbenno return _v_; 13277957Sbenno} 13377957Sbenno 13477957Sbennostatic __inline u_int32_t 13577957Sbenno__inlrb(volatile u_int32_t *a) 13677957Sbenno{ 13777957Sbenno u_int32_t _v_; 13877957Sbenno 13977957Sbenno __asm__ volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a)); 14077957Sbenno __asm__ volatile("eieio; sync"); 14177957Sbenno return _v_; 14277957Sbenno} 14377957Sbenno 14477957Sbenno#define outb(a,v) (__outb((volatile u_int8_t *)(a), v)) 14577957Sbenno#define out8(a,v) outb(a,v) 14677957Sbenno#define outw(a,v) (__outw((volatile u_int16_t *)(a), v)) 14777957Sbenno#define out16(a,v) outw(a,v) 14877957Sbenno#define outl(a,v) (__outl((volatile u_int32_t *)(a), v)) 14977957Sbenno#define out32(a,v) outl(a,v) 150193578Sraj#define outll(a,v) (__outll((volatile u_int64_t *)(a), v)) 151193578Sraj#define out64(a,v) outll(a,v) 15277957Sbenno#define inb(a) (__inb((volatile u_int8_t *)(a))) 15377957Sbenno#define in8(a) inb(a) 15477957Sbenno#define inw(a) (__inw((volatile u_int16_t *)(a))) 15577957Sbenno#define in16(a) inw(a) 15677957Sbenno#define inl(a) (__inl((volatile u_int32_t *)(a))) 15777957Sbenno#define in32(a) inl(a) 158193578Sraj#define inll(a) (__inll((volatile u_int64_t *)(a))) 159193578Sraj#define in64(a) inll(a) 16077957Sbenno 16177957Sbenno#define out8rb(a,v) outb(a,v) 16277957Sbenno#define outwrb(a,v) (__outwrb((volatile u_int16_t *)(a), v)) 16377957Sbenno#define out16rb(a,v) outwrb(a,v) 16477957Sbenno#define outlrb(a,v) (__outlrb((volatile u_int32_t *)(a), v)) 16577957Sbenno#define out32rb(a,v) outlrb(a,v) 16677957Sbenno#define in8rb(a) inb(a) 16777957Sbenno#define inwrb(a) (__inwrb((volatile u_int16_t *)(a))) 16877957Sbenno#define in16rb(a) inwrb(a) 16977957Sbenno#define inlrb(a) (__inlrb((volatile u_int32_t *)(a))) 17077957Sbenno#define in32rb(a) inlrb(a) 17177957Sbenno 17277957Sbenno 17377957Sbennostatic __inline void 17477957Sbenno__outsb(volatile u_int8_t *a, const u_int8_t *s, size_t c) 17577957Sbenno{ 17677957Sbenno while (c--) 17777957Sbenno *a = *s++; 17877957Sbenno __asm__ volatile("eieio; sync"); 17977957Sbenno} 18077957Sbenno 18177957Sbennostatic __inline void 18277957Sbenno__outsw(volatile u_int16_t *a, const u_int16_t *s, size_t c) 18377957Sbenno{ 18477957Sbenno while (c--) 18577957Sbenno *a = *s++; 18677957Sbenno __asm__ volatile("eieio; sync"); 18777957Sbenno} 18877957Sbenno 18977957Sbennostatic __inline void 19077957Sbenno__outsl(volatile u_int32_t *a, const u_int32_t *s, size_t c) 19177957Sbenno{ 19277957Sbenno while (c--) 19377957Sbenno *a = *s++; 19477957Sbenno __asm__ volatile("eieio; sync"); 19577957Sbenno} 19677957Sbenno 19777957Sbennostatic __inline void 198193578Sraj__outsll(volatile u_int64_t *a, const u_int64_t *s, size_t c) 199193578Sraj{ 200193578Sraj while (c--) 201193578Sraj *a = *s++; 202193578Sraj __asm__ volatile("eieio; sync"); 203193578Sraj} 204193578Sraj 205193578Srajstatic __inline void 20677957Sbenno__outswrb(volatile u_int16_t *a, const u_int16_t *s, size_t c) 20777957Sbenno{ 20877957Sbenno while (c--) 20977957Sbenno __asm__ volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a)); 21077957Sbenno __asm__ volatile("eieio; sync"); 21177957Sbenno} 21277957Sbenno 21377957Sbennostatic __inline void 21477957Sbenno__outslrb(volatile u_int32_t *a, const u_int32_t *s, size_t c) 21577957Sbenno{ 21677957Sbenno while (c--) 21777957Sbenno __asm__ volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a)); 21877957Sbenno __asm__ volatile("eieio; sync"); 21977957Sbenno} 22077957Sbenno 22177957Sbennostatic __inline void 22277957Sbenno__insb(volatile u_int8_t *a, u_int8_t *d, size_t c) 22377957Sbenno{ 22477957Sbenno while (c--) 22577957Sbenno *d++ = *a; 22677957Sbenno __asm__ volatile("eieio; sync"); 22777957Sbenno} 22877957Sbenno 22977957Sbennostatic __inline void 23077957Sbenno__insw(volatile u_int16_t *a, u_int16_t *d, size_t c) 23177957Sbenno{ 23277957Sbenno while (c--) 23377957Sbenno *d++ = *a; 23477957Sbenno __asm__ volatile("eieio; sync"); 23577957Sbenno} 23677957Sbenno 23777957Sbennostatic __inline void 23877957Sbenno__insl(volatile u_int32_t *a, u_int32_t *d, size_t c) 23977957Sbenno{ 24077957Sbenno while (c--) 24177957Sbenno *d++ = *a; 24277957Sbenno __asm__ volatile("eieio; sync"); 24377957Sbenno} 24477957Sbenno 24577957Sbennostatic __inline void 246193578Sraj__insll(volatile u_int64_t *a, u_int64_t *d, size_t c) 247193578Sraj{ 248193578Sraj while (c--) 249193578Sraj *d++ = *a; 250193578Sraj __asm__ volatile("eieio; sync"); 251193578Sraj} 252193578Sraj 253193578Srajstatic __inline void 25477957Sbenno__inswrb(volatile u_int16_t *a, u_int16_t *d, size_t c) 25577957Sbenno{ 25677957Sbenno while (c--) 25777957Sbenno __asm__ volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a)); 25877957Sbenno __asm__ volatile("eieio; sync"); 25977957Sbenno} 26077957Sbenno 26177957Sbennostatic __inline void 26277957Sbenno__inslrb(volatile u_int32_t *a, u_int32_t *d, size_t c) 26377957Sbenno{ 26477957Sbenno while (c--) 26577957Sbenno __asm__ volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a)); 26677957Sbenno __asm__ volatile("eieio; sync"); 26777957Sbenno} 26877957Sbenno 26977957Sbenno#define outsb(a,s,c) (__outsb((volatile u_int8_t *)(a), s, c)) 27077957Sbenno#define outs8(a,s,c) outsb(a,s,c) 27177957Sbenno#define outsw(a,s,c) (__outsw((volatile u_int16_t *)(a), s, c)) 27277957Sbenno#define outs16(a,s,c) outsw(a,s,c) 27377957Sbenno#define outsl(a,s,c) (__outsl((volatile u_int32_t *)(a), s, c)) 27477957Sbenno#define outs32(a,s,c) outsl(a,s,c) 275193578Sraj#define outsll(a,s,c) (__outsll((volatile u_int64_t *)(a), s, c)) 276193578Sraj#define outs64(a,s,c) outsll(a,s,c) 27777957Sbenno#define insb(a,d,c) (__insb((volatile u_int8_t *)(a), d, c)) 27877957Sbenno#define ins8(a,d,c) insb(a,d,c) 27977957Sbenno#define insw(a,d,c) (__insw((volatile u_int16_t *)(a), d, c)) 28077957Sbenno#define ins16(a,d,c) insw(a,d,c) 28177957Sbenno#define insl(a,d,c) (__insl((volatile u_int32_t *)(a), d, c)) 28277957Sbenno#define ins32(a,d,c) insl(a,d,c) 283193578Sraj#define insll(a,d,c) (__insll((volatile u_int64_t *)(a), d, c)) 284193578Sraj#define ins64(a,d,c) insll(a,d,c) 28577957Sbenno 28677957Sbenno#define outs8rb(a,s,c) outsb(a,s,c) 28777957Sbenno#define outswrb(a,s,c) (__outswrb((volatile u_int16_t *)(a), s, c)) 28877957Sbenno#define outs16rb(a,s,c) outswrb(a,s,c) 28977957Sbenno#define outslrb(a,s,c) (__outslrb((volatile u_int32_t *)(a), s, c)) 29077957Sbenno#define outs32rb(a,s,c) outslrb(a,s,c) 29177957Sbenno#define ins8rb(a,d,c) insb(a,d,c) 29277957Sbenno#define inswrb(a,d,c) (__inswrb((volatile u_int16_t *)(a), d, c)) 29377957Sbenno#define ins16rb(a,d,c) inswrb(a,d,c) 29477957Sbenno#define inslrb(a,d,c) (__inslrb((volatile u_int32_t *)(a), d, c)) 29577957Sbenno#define ins32rb(a,d,c) inslrb(a,d,c) 29677957Sbenno 29777957Sbenno#endif /*_MACHINE_PIO_H_*/ 298