pcrtc.c revision 177628
1/*-
2 * Copyright (c) 1990 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz and Don Ahn.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 *    may be used to endorse or promote products derived from this software
18 *    without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 *	from: @(#)clock.c	7.2 (Berkeley) 5/12/91
33 */
34
35#include <sys/cdefs.h>
36__FBSDID("$FreeBSD: head/sys/pc98/cbus/pcrtc.c 177628 2008-03-26 13:25:27Z phk $");
37
38/*
39 * Routines to handle clock hardware.
40 */
41
42/*
43 * inittodr, settodr and support routines written
44 * by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
45 *
46 * reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
47 */
48
49/*
50 * modified for PC98 by Kakefuda
51 */
52
53#include "opt_apic.h"
54#include "opt_clock.h"
55#include "opt_isa.h"
56#include "opt_mca.h"
57
58#include <sys/param.h>
59#include <sys/systm.h>
60#include <sys/bus.h>
61#include <sys/clock.h>
62#include <sys/lock.h>
63#include <sys/kdb.h>
64#include <sys/mutex.h>
65#include <sys/proc.h>
66#include <sys/time.h>
67#include <sys/timetc.h>
68#include <sys/kernel.h>
69#include <sys/limits.h>
70#include <sys/module.h>
71#include <sys/sysctl.h>
72#include <sys/cons.h>
73#include <sys/power.h>
74
75#include <machine/clock.h>
76#include <machine/cpu.h>
77#include <machine/cputypes.h>
78#include <machine/frame.h>
79#include <machine/intr_machdep.h>
80#include <machine/md_var.h>
81#include <machine/psl.h>
82#ifdef DEV_APIC
83#include <machine/apicvar.h>
84#endif
85#include <machine/specialreg.h>
86#include <machine/ppireg.h>
87#include <machine/timerreg.h>
88
89#include <i386/isa/icu.h>
90#include <pc98/cbus/cbus.h>
91#include <pc98/pc98/pc98_machdep.h>
92#ifdef DEV_ISA
93#include <isa/isavar.h>
94#endif
95
96#define	TIMER_DIV(x) ((timer_freq + (x) / 2) / (x))
97
98int	clkintr_pending;
99int	statclock_disable;
100#ifndef TIMER_FREQ
101#define TIMER_FREQ   2457600
102#endif
103u_int	timer_freq = TIMER_FREQ;
104int	timer0_max_count;
105int	timer0_real_max_count;
106
107static	int	beeping = 0;
108static	struct mtx clock_lock;
109static	struct intsrc *i8254_intsrc;
110static	u_int32_t i8254_lastcount;
111static	u_int32_t i8254_offset;
112static	int	(*i8254_pending)(struct intsrc *);
113static	int	i8254_ticked;
114static	int	using_lapic_timer;
115
116/* Values for timerX_state: */
117#define	RELEASED	0
118#define	RELEASE_PENDING	1
119#define	ACQUIRED	2
120#define	ACQUIRE_PENDING	3
121
122static	u_char	timer1_state;
123static	u_char	timer2_state;
124static void rtc_serialcombit(int);
125static void rtc_serialcom(int);
126static int rtc_inb(void);
127static void rtc_outb(int);
128
129static	unsigned i8254_get_timecount(struct timecounter *tc);
130static	unsigned i8254_simple_get_timecount(struct timecounter *tc);
131static	void	set_timer_freq(u_int freq, int intr_freq);
132
133static struct timecounter i8254_timecounter = {
134	i8254_get_timecount,	/* get_timecount */
135	0,			/* no poll_pps */
136	~0u,			/* counter_mask */
137	0,			/* frequency */
138	"i8254",		/* name */
139	0			/* quality */
140};
141
142static int
143clkintr(struct trapframe *frame)
144{
145
146	if (timecounter->tc_get_timecount == i8254_get_timecount) {
147		mtx_lock_spin(&clock_lock);
148		if (i8254_ticked)
149			i8254_ticked = 0;
150		else {
151			i8254_offset += timer0_max_count;
152			i8254_lastcount = 0;
153		}
154		clkintr_pending = 0;
155		mtx_unlock_spin(&clock_lock);
156	}
157	KASSERT(!using_lapic_timer, ("clk interrupt enabled with lapic timer"));
158	hardclock(TRAPF_USERMODE(frame), TRAPF_PC(frame));
159	return (FILTER_HANDLED);
160}
161
162int
163acquire_timer1(int mode)
164{
165
166	if (timer1_state != RELEASED)
167		return (-1);
168	timer1_state = ACQUIRED;
169
170	/*
171	 * This access to the timer registers is as atomic as possible
172	 * because it is a single instruction.  We could do better if we
173	 * knew the rate.  Use of splclock() limits glitches to 10-100us,
174	 * and this is probably good enough for timer2, so we aren't as
175	 * careful with it as with timer0.
176	 */
177	outb(TIMER_MODE, TIMER_SEL1 | (mode & 0x3f));
178
179	return (0);
180}
181
182int
183acquire_timer2(int mode)
184{
185
186	if (timer2_state != RELEASED)
187		return (-1);
188	timer2_state = ACQUIRED;
189
190	/*
191	 * This access to the timer registers is as atomic as possible
192	 * because it is a single instruction.  We could do better if we
193	 * knew the rate.  Use of splclock() limits glitches to 10-100us,
194	 * and this is probably good enough for timer2, so we aren't as
195	 * careful with it as with timer0.
196	 */
197	outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
198
199	return (0);
200}
201
202int
203release_timer1()
204{
205
206	if (timer1_state != ACQUIRED)
207		return (-1);
208	timer1_state = RELEASED;
209	outb(TIMER_MODE, TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT);
210	return (0);
211}
212
213int
214release_timer2()
215{
216
217	if (timer2_state != ACQUIRED)
218		return (-1);
219	timer2_state = RELEASED;
220	outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
221	return (0);
222}
223
224
225static int
226getit(void)
227{
228	int high, low;
229
230	mtx_lock_spin(&clock_lock);
231
232	/* Select timer0 and latch counter value. */
233	outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
234
235	low = inb(TIMER_CNTR0);
236	high = inb(TIMER_CNTR0);
237
238	mtx_unlock_spin(&clock_lock);
239	return ((high << 8) | low);
240}
241
242/*
243 * Wait "n" microseconds.
244 * Relies on timer 1 counting down from (timer_freq / hz)
245 * Note: timer had better have been programmed before this is first used!
246 */
247void
248DELAY(int n)
249{
250	int delta, prev_tick, tick, ticks_left;
251
252#ifdef DELAYDEBUG
253	int getit_calls = 1;
254	int n1;
255	static int state = 0;
256
257	if (state == 0) {
258		state = 1;
259		for (n1 = 1; n1 <= 10000000; n1 *= 10)
260			DELAY(n1);
261		state = 2;
262	}
263	if (state == 1)
264		printf("DELAY(%d)...", n);
265#endif
266	/*
267	 * Read the counter first, so that the rest of the setup overhead is
268	 * counted.  Guess the initial overhead is 20 usec (on most systems it
269	 * takes about 1.5 usec for each of the i/o's in getit().  The loop
270	 * takes about 6 usec on a 486/33 and 13 usec on a 386/20.  The
271	 * multiplications and divisions to scale the count take a while).
272	 *
273	 * However, if ddb is active then use a fake counter since reading
274	 * the i8254 counter involves acquiring a lock.  ddb must not do
275	 * locking for many reasons, but it calls here for at least atkbd
276	 * input.
277	 */
278#ifdef KDB
279	if (kdb_active)
280		prev_tick = 1;
281	else
282#endif
283		prev_tick = getit();
284	n -= 0;			/* XXX actually guess no initial overhead */
285	/*
286	 * Calculate (n * (timer_freq / 1e6)) without using floating point
287	 * and without any avoidable overflows.
288	 */
289	if (n <= 0)
290		ticks_left = 0;
291	else if (n < 256)
292		/*
293		 * Use fixed point to avoid a slow division by 1000000.
294		 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest.
295		 * 2^15 is the first power of 2 that gives exact results
296		 * for n between 0 and 256.
297		 */
298		ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15;
299	else
300		/*
301		 * Don't bother using fixed point, although gcc-2.7.2
302		 * generates particularly poor code for the long long
303		 * division, since even the slow way will complete long
304		 * before the delay is up (unless we're interrupted).
305		 */
306		ticks_left = ((u_int)n * (long long)timer_freq + 999999)
307			     / 1000000;
308
309	while (ticks_left > 0) {
310#ifdef KDB
311		if (kdb_active) {
312			outb(0x5f, 0);
313			tick = prev_tick - 1;
314			if (tick <= 0)
315				tick = timer0_max_count;
316		} else
317#endif
318			tick = getit();
319#ifdef DELAYDEBUG
320		++getit_calls;
321#endif
322		delta = prev_tick - tick;
323		prev_tick = tick;
324		if (delta < 0) {
325			delta += timer0_max_count;
326			/*
327			 * Guard against timer0_max_count being wrong.
328			 * This shouldn't happen in normal operation,
329			 * but it may happen if set_timer_freq() is
330			 * traced.
331			 */
332			if (delta < 0)
333				delta = 0;
334		}
335		ticks_left -= delta;
336	}
337#ifdef DELAYDEBUG
338	if (state == 1)
339		printf(" %d calls to getit() at %d usec each\n",
340		       getit_calls, (n + 5) / getit_calls);
341#endif
342}
343
344static void
345sysbeepstop(void *chan)
346{
347	ppi_spkr_off();		/* disable counter1 output to speaker */
348	timer_spkr_release();
349	beeping = 0;
350}
351
352int
353sysbeep(int pitch, int period)
354{
355	int x = splclock();
356
357	if (timer_spkr_acquire())
358		if (!beeping) {
359			/* Something else owns it. */
360			splx(x);
361			return (-1); /* XXX Should be EBUSY, but nobody cares anyway. */
362		}
363	mtx_lock_spin(&clock_lock);
364	spkr_set_pitch(pitch);
365	mtx_unlock_spin(&clock_lock);
366	if (!beeping) {
367		/* enable counter1 output to speaker */
368		ppi_spkr_on();
369		beeping = period;
370		timeout(sysbeepstop, (void *)NULL, period);
371	}
372	splx(x);
373	return (0);
374}
375
376static u_int
377calibrate_clocks(void)
378{
379	int timeout;
380	u_int count, prev_count, tot_count;
381	u_short	sec, start_sec;
382
383	if (bootverbose)
384	        printf("Calibrating clock(s) ... ");
385	/* Check ARTIC. */
386	if (!(PC98_SYSTEM_PARAMETER(0x458) & 0x80) &&
387	    !(PC98_SYSTEM_PARAMETER(0x45b) & 0x04))
388		goto fail;
389	timeout = 100000000;
390
391	/* Read the ARTIC. */
392	sec = inw(0x5e);
393
394	/* Wait for the ARTIC to changes. */
395	start_sec = sec;
396	for (;;) {
397		sec = inw(0x5e);
398		if (sec != start_sec)
399			break;
400		if (--timeout == 0)
401			goto fail;
402	}
403
404	/* Start keeping track of the i8254 counter. */
405	prev_count = getit();
406	if (prev_count == 0 || prev_count > timer0_max_count)
407		goto fail;
408	tot_count = 0;
409
410	start_sec = sec;
411	for (;;) {
412		sec = inw(0x5e);
413		count = getit();
414		if (count == 0 || count > timer0_max_count)
415			goto fail;
416		if (count > prev_count)
417			tot_count += prev_count - (count - timer0_max_count);
418		else
419			tot_count += prev_count - count;
420		prev_count = count;
421		if ((sec == start_sec + 1200) || /* 1200 = 307.2KHz >> 8 */
422		    (sec < start_sec &&
423		        (u_int)sec + 0x10000 == (u_int)start_sec + 1200))
424			break;
425		if (--timeout == 0)
426			goto fail;
427	}
428
429	if (bootverbose) {
430	        printf("i8254 clock: %u Hz\n", tot_count);
431	}
432	return (tot_count);
433
434fail:
435	if (bootverbose)
436	        printf("failed, using default i8254 clock of %u Hz\n",
437		       timer_freq);
438	return (timer_freq);
439}
440
441static void
442set_timer_freq(u_int freq, int intr_freq)
443{
444	int new_timer0_real_max_count;
445
446	i8254_timecounter.tc_frequency = freq;
447	mtx_lock_spin(&clock_lock);
448	timer_freq = freq;
449	if (using_lapic_timer)
450		new_timer0_real_max_count = 0x10000;
451	else
452		new_timer0_real_max_count = TIMER_DIV(intr_freq);
453	if (new_timer0_real_max_count != timer0_real_max_count) {
454		timer0_real_max_count = new_timer0_real_max_count;
455		if (timer0_real_max_count == 0x10000)
456			timer0_max_count = 0xffff;
457		else
458			timer0_max_count = timer0_real_max_count;
459		outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
460		outb(TIMER_CNTR0, timer0_real_max_count & 0xff);
461		outb(TIMER_CNTR0, timer0_real_max_count >> 8);
462	}
463	mtx_unlock_spin(&clock_lock);
464}
465
466static void
467i8254_restore(void)
468{
469
470	mtx_lock_spin(&clock_lock);
471	outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
472	outb(TIMER_CNTR0, timer0_real_max_count & 0xff);
473	outb(TIMER_CNTR0, timer0_real_max_count >> 8);
474	mtx_unlock_spin(&clock_lock);
475}
476
477
478/*
479 * Restore all the timers non-atomically (XXX: should be atomically).
480 *
481 * This function is called from pmtimer_resume() to restore all the timers.
482 * This should not be necessary, but there are broken laptops that do not
483 * restore all the timers on resume.
484 */
485void
486timer_restore(void)
487{
488
489	i8254_restore();		/* restore timer_freq and hz */
490}
491
492/* This is separate from startrtclock() so that it can be called early. */
493void
494i8254_init(void)
495{
496
497	mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE);
498
499	if (pc98_machine_type & M_8M)
500		timer_freq = 1996800L; /* 1.9968 MHz */
501	else
502		timer_freq = 2457600L; /* 2.4576 MHz */
503
504	set_timer_freq(timer_freq, hz);
505}
506
507void
508startrtclock()
509{
510	u_int delta, freq;
511
512	freq = calibrate_clocks();
513#ifdef CLK_CALIBRATION_LOOP
514	if (bootverbose) {
515		printf(
516		"Press a key on the console to abort clock calibration\n");
517		while (cncheckc() == -1)
518			calibrate_clocks();
519	}
520#endif
521
522	/*
523	 * Use the calibrated i8254 frequency if it seems reasonable.
524	 * Otherwise use the default, and don't use the calibrated i586
525	 * frequency.
526	 */
527	delta = freq > timer_freq ? freq - timer_freq : timer_freq - freq;
528	if (delta < timer_freq / 100) {
529#ifndef CLK_USE_I8254_CALIBRATION
530		if (bootverbose)
531			printf(
532"CLK_USE_I8254_CALIBRATION not specified - using default frequency\n");
533		freq = timer_freq;
534#endif
535		timer_freq = freq;
536	} else {
537		if (bootverbose)
538			printf(
539		    "%d Hz differs from default of %d Hz by more than 1%%\n",
540			       freq, timer_freq);
541	}
542
543	set_timer_freq(timer_freq, hz);
544	tc_init(&i8254_timecounter);
545
546	init_TSC();
547}
548
549static void
550rtc_serialcombit(int i)
551{
552	outb(IO_RTC, ((i&0x01)<<5)|0x07);
553	DELAY(1);
554	outb(IO_RTC, ((i&0x01)<<5)|0x17);
555	DELAY(1);
556	outb(IO_RTC, ((i&0x01)<<5)|0x07);
557	DELAY(1);
558}
559
560static void
561rtc_serialcom(int i)
562{
563	rtc_serialcombit(i&0x01);
564	rtc_serialcombit((i&0x02)>>1);
565	rtc_serialcombit((i&0x04)>>2);
566	rtc_serialcombit((i&0x08)>>3);
567	outb(IO_RTC, 0x07);
568	DELAY(1);
569	outb(IO_RTC, 0x0f);
570	DELAY(1);
571	outb(IO_RTC, 0x07);
572 	DELAY(1);
573}
574
575static void
576rtc_outb(int val)
577{
578	int s;
579	int sa = 0;
580
581	for (s=0;s<8;s++) {
582	    sa = ((val >> s) & 0x01) ? 0x27 : 0x07;
583	    outb(IO_RTC, sa);		/* set DI & CLK 0 */
584	    DELAY(1);
585	    outb(IO_RTC, sa | 0x10);	/* CLK 1 */
586	    DELAY(1);
587	}
588	outb(IO_RTC, sa & 0xef);	/* CLK 0 */
589}
590
591static int
592rtc_inb(void)
593{
594	int s;
595	int sa = 0;
596
597	for (s=0;s<8;s++) {
598	    sa |= ((inb(0x33) & 0x01) << s);
599	    outb(IO_RTC, 0x17);	/* CLK 1 */
600	    DELAY(1);
601	    outb(IO_RTC, 0x07);	/* CLK 0 */
602	    DELAY(2);
603	}
604	return sa;
605}
606
607/*
608 * Initialize the time of day register, based on the time base which is, e.g.
609 * from a filesystem.
610 */
611void
612inittodr(time_t base)
613{
614	struct timespec ts;
615	struct clocktime ct;
616	int i;
617
618	if (base) {
619		ts.tv_sec = base;
620		ts.tv_nsec = 0;
621		tc_setclock(&ts);
622	}
623
624	rtc_serialcom(0x03);	/* Time Read */
625	rtc_serialcom(0x01);	/* Register shift command. */
626	DELAY(20);
627
628	ct.nsec = 0;
629	ct.sec = bcd2bin(rtc_inb() & 0xff);		/* sec */
630	ct.min = bcd2bin(rtc_inb() & 0xff);		/* min */
631	ct.hour = bcd2bin(rtc_inb() & 0xff);		/* hour */
632	ct.day = bcd2bin(rtc_inb() & 0xff);		/* date */
633	i = rtc_inb();
634	ct.dow = i & 0x0f;				/* dow */
635	ct.mon = (i >> 4) & 0x0f;			/* month */
636	ct.year = bcd2bin(rtc_inb() & 0xff) + 1900;	/* year */
637	if (ct.year < 1995)
638		ct.year += 100;
639	/* Set dow = -1 because some clocks don't set it correctly. */
640	ct.dow = -1;
641	if (clock_ct_to_ts(&ct, &ts)) {
642		printf("Invalid time in clock: check and reset the date!\n");
643		return;
644	}
645	ts.tv_sec += utc_offset();
646	tc_setclock(&ts);
647}
648
649/*
650 * Write system time back to RTC
651 */
652void
653resettodr()
654{
655	struct timespec	ts;
656	struct clocktime ct;
657
658	if (disable_rtc_set)
659		return;
660
661	getnanotime(&ts);
662	ts.tv_sec -= utc_offset();
663	clock_ts_to_ct(&ts, &ct);
664
665	rtc_serialcom(0x01);	/* Register shift command. */
666
667	rtc_outb(bin2bcd(ct.sec)); 		/* Write back Seconds */
668	rtc_outb(bin2bcd(ct.min)); 		/* Write back Minutes */
669	rtc_outb(bin2bcd(ct.hour)); 		/* Write back Hours   */
670
671	rtc_outb(bin2bcd(ct.day));		/* Write back Day     */
672	rtc_outb((ct.mon << 4) | ct.dow);	/* Write back Month and DOW */
673	rtc_outb(bin2bcd(ct.year % 100));	/* Write back Year    */
674
675	rtc_serialcom(0x02);	/* Time set & Counter hold command. */
676	rtc_serialcom(0x00);	/* Register hold command. */
677}
678
679
680/*
681 * Start both clocks running.
682 */
683void
684cpu_initclocks()
685{
686
687#ifdef DEV_APIC
688	using_lapic_timer = lapic_setup_clock();
689#endif
690	/*
691	 * If we aren't using the local APIC timer to drive the kernel
692	 * clocks, setup the interrupt handler for the 8254 timer 0 so
693	 * that it can drive hardclock().  Otherwise, change the 8254
694	 * timecounter to user a simpler algorithm.
695	 */
696	if (!using_lapic_timer) {
697		intr_add_handler("clk", 0, (driver_filter_t *)clkintr, NULL,
698		    NULL, INTR_TYPE_CLK, NULL);
699		i8254_intsrc = intr_lookup_source(0);
700		if (i8254_intsrc != NULL)
701			i8254_pending =
702			    i8254_intsrc->is_pic->pic_source_pending;
703	} else {
704		i8254_timecounter.tc_get_timecount =
705		    i8254_simple_get_timecount;
706		i8254_timecounter.tc_counter_mask = 0xffff;
707		set_timer_freq(timer_freq, hz);
708	}
709
710	init_TSC_tc();
711}
712
713void
714cpu_startprofclock(void)
715{
716}
717
718void
719cpu_stopprofclock(void)
720{
721}
722
723static int
724sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS)
725{
726	int error;
727	u_int freq;
728
729	/*
730	 * Use `i8254' instead of `timer' in external names because `timer'
731	 * is is too generic.  Should use it everywhere.
732	 */
733	freq = timer_freq;
734	error = sysctl_handle_int(oidp, &freq, 0, req);
735	if (error == 0 && req->newptr != NULL)
736		set_timer_freq(freq, hz);
737	return (error);
738}
739
740SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW,
741    0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", "");
742
743static unsigned
744i8254_simple_get_timecount(struct timecounter *tc)
745{
746
747	return (timer0_max_count - getit());
748}
749
750static unsigned
751i8254_get_timecount(struct timecounter *tc)
752{
753	u_int count;
754	u_int high, low;
755	u_int eflags;
756
757	eflags = read_eflags();
758	mtx_lock_spin(&clock_lock);
759
760	/* Select timer0 and latch counter value. */
761	outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
762
763	low = inb(TIMER_CNTR0);
764	high = inb(TIMER_CNTR0);
765	count = timer0_max_count - ((high << 8) | low);
766	if (count < i8254_lastcount ||
767	    (!i8254_ticked && (clkintr_pending ||
768	    ((count < 20 || (!(eflags & PSL_I) && count < timer0_max_count / 2u)) &&
769	    i8254_pending != NULL && i8254_pending(i8254_intsrc))))) {
770		i8254_ticked = 1;
771		i8254_offset += timer0_max_count;
772	}
773	i8254_lastcount = count;
774	count += i8254_offset;
775	mtx_unlock_spin(&clock_lock);
776	return (count);
777}
778
779#ifdef DEV_ISA
780/*
781 * Attach to the ISA PnP descriptors for the timer and realtime clock.
782 */
783static struct isa_pnp_id attimer_ids[] = {
784	{ 0x0001d041 /* PNP0100 */, "AT timer" },
785	{ 0x000bd041 /* PNP0B00 */, "AT realtime clock" },
786	{ 0 }
787};
788
789static int
790attimer_probe(device_t dev)
791{
792	int result;
793
794	if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids)) <= 0)
795		device_quiet(dev);
796	return(result);
797}
798
799static int
800attimer_attach(device_t dev)
801{
802	return(0);
803}
804
805static device_method_t attimer_methods[] = {
806	/* Device interface */
807	DEVMETHOD(device_probe,		attimer_probe),
808	DEVMETHOD(device_attach,	attimer_attach),
809	DEVMETHOD(device_detach,	bus_generic_detach),
810	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
811	DEVMETHOD(device_suspend,	bus_generic_suspend),	/* XXX stop statclock? */
812	DEVMETHOD(device_resume,	bus_generic_resume),	/* XXX restart statclock? */
813	{ 0, 0 }
814};
815
816static driver_t attimer_driver = {
817	"attimer",
818	attimer_methods,
819	1,		/* no softc */
820};
821
822static devclass_t attimer_devclass;
823
824DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0);
825#endif /* DEV_ISA */
826