1219820Sjeff/* 2219820Sjeff * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. 3219820Sjeff * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. 4219820Sjeff * 5219820Sjeff * This software is available to you under a choice of one of two 6219820Sjeff * licenses. You may choose to be licensed under the terms of the GNU 7219820Sjeff * General Public License (GPL) Version 2, available from the file 8219820Sjeff * COPYING in the main directory of this source tree, or the 9219820Sjeff * OpenIB.org BSD license below: 10219820Sjeff * 11219820Sjeff * Redistribution and use in source and binary forms, with or 12219820Sjeff * without modification, are permitted provided that the following 13219820Sjeff * conditions are met: 14219820Sjeff * 15219820Sjeff * - Redistributions of source code must retain the above 16219820Sjeff * copyright notice, this list of conditions and the following 17219820Sjeff * disclaimer. 18219820Sjeff * 19219820Sjeff * - Redistributions in binary form must reproduce the above 20219820Sjeff * copyright notice, this list of conditions and the following 21219820Sjeff * disclaimer in the documentation and/or other materials 22219820Sjeff * provided with the distribution. 23219820Sjeff * 24219820Sjeff * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25219820Sjeff * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26219820Sjeff * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27219820Sjeff * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28219820Sjeff * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29219820Sjeff * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30219820Sjeff * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31219820Sjeff * SOFTWARE. 32219820Sjeff */ 33219820Sjeff 34219820Sjeff#include <linux/init.h> 35219820Sjeff#include <linux/errno.h> 36219820Sjeff#include <linux/pci.h> 37219820Sjeff#include <linux/delay.h> 38219820Sjeff#include <linux/slab.h> 39219820Sjeff#include <linux/jiffies.h> 40219820Sjeff 41219820Sjeff#include "mlx4.h" 42219820Sjeff 43219820Sjeffint mlx4_reset(struct mlx4_dev *dev) 44219820Sjeff{ 45219820Sjeff void __iomem *reset; 46219820Sjeff u32 *hca_header = NULL; 47219820Sjeff int pcie_cap; 48219820Sjeff u16 devctl; 49219820Sjeff u16 linkctl; 50219820Sjeff u16 vendor; 51219820Sjeff unsigned long end; 52219820Sjeff u32 sem; 53219820Sjeff int i; 54219820Sjeff int err = 0; 55219820Sjeff 56219820Sjeff#define MLX4_RESET_BASE 0xf0000 57219820Sjeff#define MLX4_RESET_SIZE 0x400 58219820Sjeff#define MLX4_SEM_OFFSET 0x3fc 59219820Sjeff#define MLX4_RESET_OFFSET 0x10 60219820Sjeff#define MLX4_RESET_VALUE swab32(1) 61219820Sjeff 62219820Sjeff#define MLX4_SEM_TIMEOUT_JIFFIES (10 * HZ) 63219820Sjeff#define MLX4_RESET_TIMEOUT_JIFFIES (2 * HZ) 64219820Sjeff 65219820Sjeff /* 66219820Sjeff * Reset the chip. This is somewhat ugly because we have to 67219820Sjeff * save off the PCI header before reset and then restore it 68219820Sjeff * after the chip reboots. We skip config space offsets 22 69219820Sjeff * and 23 since those have a special meaning. 70219820Sjeff */ 71219820Sjeff 72219820Sjeff /* Do we need to save off the full 4K PCI Express header?? */ 73219820Sjeff hca_header = kmalloc(256, GFP_KERNEL); 74219820Sjeff if (!hca_header) { 75219820Sjeff err = -ENOMEM; 76219820Sjeff mlx4_err(dev, "Couldn't allocate memory to save HCA " 77219820Sjeff "PCI header, aborting.\n"); 78219820Sjeff goto out; 79219820Sjeff } 80219820Sjeff 81219820Sjeff pcie_cap = pci_find_capability(dev->pdev, PCI_CAP_ID_EXP); 82219820Sjeff 83219820Sjeff for (i = 0; i < 64; ++i) { 84219820Sjeff if (i == 22 || i == 23) 85219820Sjeff continue; 86219820Sjeff if (pci_read_config_dword(dev->pdev, i * 4, hca_header + i)) { 87219820Sjeff err = -ENODEV; 88219820Sjeff mlx4_err(dev, "Couldn't save HCA " 89219820Sjeff "PCI header, aborting.\n"); 90219820Sjeff goto out; 91219820Sjeff } 92219820Sjeff } 93219820Sjeff 94219820Sjeff reset = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_RESET_BASE, 95219820Sjeff MLX4_RESET_SIZE); 96219820Sjeff if (!reset) { 97219820Sjeff err = -ENOMEM; 98219820Sjeff mlx4_err(dev, "Couldn't map HCA reset register, aborting.\n"); 99219820Sjeff goto out; 100219820Sjeff } 101219820Sjeff 102219820Sjeff /* grab HW semaphore to lock out flash updates */ 103219820Sjeff end = jiffies + MLX4_SEM_TIMEOUT_JIFFIES; 104219820Sjeff do { 105219820Sjeff sem = readl(reset + MLX4_SEM_OFFSET); 106219820Sjeff if (!sem) 107219820Sjeff break; 108219820Sjeff 109219820Sjeff msleep(1); 110219820Sjeff } while (time_before(jiffies, end)); 111219820Sjeff 112219820Sjeff if (sem) { 113219820Sjeff mlx4_err(dev, "Failed to obtain HW semaphore, aborting\n"); 114219820Sjeff err = -EAGAIN; 115219820Sjeff iounmap(reset); 116219820Sjeff goto out; 117219820Sjeff } 118219820Sjeff 119219820Sjeff /* actually hit reset */ 120219820Sjeff writel(MLX4_RESET_VALUE, reset + MLX4_RESET_OFFSET); 121219820Sjeff iounmap(reset); 122219820Sjeff 123219820Sjeff /* Docs say to wait one second before accessing device */ 124219820Sjeff msleep(1000); 125219820Sjeff 126219820Sjeff end = jiffies + MLX4_RESET_TIMEOUT_JIFFIES; 127219820Sjeff do { 128219820Sjeff if (!pci_read_config_word(dev->pdev, PCI_VENDOR_ID, &vendor) && 129219820Sjeff vendor != 0xffff) 130219820Sjeff break; 131219820Sjeff 132219820Sjeff msleep(1); 133219820Sjeff } while (time_before(jiffies, end)); 134219820Sjeff 135219820Sjeff if (vendor == 0xffff) { 136219820Sjeff err = -ENODEV; 137219820Sjeff mlx4_err(dev, "PCI device did not come back after reset, " 138219820Sjeff "aborting.\n"); 139219820Sjeff goto out; 140219820Sjeff } 141219820Sjeff 142219820Sjeff /* Now restore the PCI headers */ 143219820Sjeff if (pcie_cap) { 144219820Sjeff devctl = hca_header[(pcie_cap + PCI_EXP_DEVCTL) / 4]; 145219820Sjeff if (pci_write_config_word(dev->pdev, pcie_cap + PCI_EXP_DEVCTL, 146219820Sjeff devctl)) { 147219820Sjeff err = -ENODEV; 148219820Sjeff mlx4_err(dev, "Couldn't restore HCA PCI Express " 149219820Sjeff "Device Control register, aborting.\n"); 150219820Sjeff goto out; 151219820Sjeff } 152219820Sjeff linkctl = hca_header[(pcie_cap + PCI_EXP_LNKCTL) / 4]; 153219820Sjeff if (pci_write_config_word(dev->pdev, pcie_cap + PCI_EXP_LNKCTL, 154219820Sjeff linkctl)) { 155219820Sjeff err = -ENODEV; 156219820Sjeff mlx4_err(dev, "Couldn't restore HCA PCI Express " 157219820Sjeff "Link control register, aborting.\n"); 158219820Sjeff goto out; 159219820Sjeff } 160219820Sjeff } 161219820Sjeff 162219820Sjeff for (i = 0; i < 16; ++i) { 163219820Sjeff if (i * 4 == PCI_COMMAND) 164219820Sjeff continue; 165219820Sjeff 166219820Sjeff if (pci_write_config_dword(dev->pdev, i * 4, hca_header[i])) { 167219820Sjeff err = -ENODEV; 168219820Sjeff mlx4_err(dev, "Couldn't restore HCA reg %x, " 169219820Sjeff "aborting.\n", i); 170219820Sjeff goto out; 171219820Sjeff } 172219820Sjeff } 173219820Sjeff 174219820Sjeff if (pci_write_config_dword(dev->pdev, PCI_COMMAND, 175219820Sjeff hca_header[PCI_COMMAND / 4])) { 176219820Sjeff err = -ENODEV; 177219820Sjeff mlx4_err(dev, "Couldn't restore HCA COMMAND, " 178219820Sjeff "aborting.\n"); 179219820Sjeff goto out; 180219820Sjeff } 181219820Sjeff 182219820Sjeffout: 183219820Sjeff kfree(hca_header); 184219820Sjeff 185219820Sjeff return err; 186219820Sjeff} 187