1219820Sjeff/* 2219820Sjeff * Copyright (c) 2007 Mellanox Technologies. All rights reserved. 3219820Sjeff * 4219820Sjeff * This software is available to you under a choice of one of two 5219820Sjeff * licenses. You may choose to be licensed under the terms of the GNU 6219820Sjeff * General Public License (GPL) Version 2, available from the file 7219820Sjeff * COPYING in the main directory of this source tree, or the 8219820Sjeff * OpenIB.org BSD license below: 9219820Sjeff * 10219820Sjeff * Redistribution and use in source and binary forms, with or 11219820Sjeff * without modification, are permitted provided that the following 12219820Sjeff * conditions are met: 13219820Sjeff * 14219820Sjeff * - Redistributions of source code must retain the above 15219820Sjeff * copyright notice, this list of conditions and the following 16219820Sjeff * disclaimer. 17219820Sjeff * 18219820Sjeff * - Redistributions in binary form must reproduce the above 19219820Sjeff * copyright notice, this list of conditions and the following 20219820Sjeff * disclaimer in the documentation and/or other materials 21219820Sjeff * provided with the distribution. 22219820Sjeff * 23219820Sjeff * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24219820Sjeff * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25219820Sjeff * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26219820Sjeff * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27219820Sjeff * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28219820Sjeff * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29219820Sjeff * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30219820Sjeff * SOFTWARE. 31219820Sjeff * 32219820Sjeff */ 33219820Sjeff 34239748Sjhb#include "opt_inet.h" 35219820Sjeff#include "mlx4_en.h" 36219820Sjeff 37219820Sjeff#include <linux/mlx4/cq.h> 38219820Sjeff#include <linux/mlx4/qp.h> 39219820Sjeff 40219820Sjeff#include <net/ethernet.h> 41219820Sjeff#include <net/if_vlan_var.h> 42219820Sjeff#include <sys/mbuf.h> 43219820Sjeff 44219820Sjeffenum { 45219820Sjeff MIN_RX_ARM = 1024, 46219820Sjeff}; 47219820Sjeff 48219820Sjeffstatic int mlx4_en_alloc_buf(struct mlx4_en_priv *priv, 49219820Sjeff struct mlx4_en_rx_desc *rx_desc, 50219820Sjeff struct mbuf **mb_list, 51219820Sjeff int i) 52219820Sjeff{ 53219820Sjeff struct mlx4_en_dev *mdev = priv->mdev; 54219820Sjeff struct mlx4_en_frag_info *frag_info = &priv->frag_info[i]; 55219820Sjeff struct mbuf *mb; 56219820Sjeff dma_addr_t dma; 57219820Sjeff 58219820Sjeff if (i == 0) 59219820Sjeff mb = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, frag_info->frag_size); 60219820Sjeff else 61219820Sjeff mb = m_getjcl(M_NOWAIT, MT_DATA, 0, frag_info->frag_size); 62219820Sjeff if (mb == NULL) { 63219820Sjeff priv->port_stats.rx_alloc_failed++; 64219820Sjeff return -ENOMEM; 65219820Sjeff } 66219820Sjeff dma = pci_map_single(mdev->pdev, mb->m_data, frag_info->frag_size, 67219820Sjeff PCI_DMA_FROMDEVICE); 68219820Sjeff rx_desc->data[i].addr = cpu_to_be64(dma); 69219820Sjeff mb_list[i] = mb; 70219820Sjeff return 0; 71219820Sjeff} 72219820Sjeff 73219820Sjeffstatic void mlx4_en_init_rx_desc(struct mlx4_en_priv *priv, 74219820Sjeff struct mlx4_en_rx_ring *ring, int index) 75219820Sjeff{ 76219820Sjeff struct mlx4_en_rx_desc *rx_desc = ring->buf + ring->stride * index; 77219820Sjeff int possible_frags; 78219820Sjeff int i; 79219820Sjeff 80219820Sjeff /* Set size and memtype fields */ 81219820Sjeff for (i = 0; i < priv->num_frags; i++) { 82219820Sjeff rx_desc->data[i].byte_count = 83219820Sjeff cpu_to_be32(priv->frag_info[i].frag_size); 84219820Sjeff rx_desc->data[i].lkey = cpu_to_be32(priv->mdev->mr.key); 85219820Sjeff } 86219820Sjeff 87219820Sjeff /* If the number of used fragments does not fill up the ring stride, 88219820Sjeff * remaining (unused) fragments must be padded with null address/size 89219820Sjeff * and a special memory key */ 90219820Sjeff possible_frags = (ring->stride - sizeof(struct mlx4_en_rx_desc)) / DS_SIZE; 91219820Sjeff for (i = priv->num_frags; i < possible_frags; i++) { 92219820Sjeff rx_desc->data[i].byte_count = 0; 93219820Sjeff rx_desc->data[i].lkey = cpu_to_be32(MLX4_EN_MEMTYPE_PAD); 94219820Sjeff rx_desc->data[i].addr = 0; 95219820Sjeff } 96219820Sjeff} 97219820Sjeff 98219820Sjeffstatic int mlx4_en_prepare_rx_desc(struct mlx4_en_priv *priv, 99219820Sjeff struct mlx4_en_rx_ring *ring, int index) 100219820Sjeff{ 101219820Sjeff struct mlx4_en_rx_desc *rx_desc = ring->buf + (index * ring->stride); 102219820Sjeff struct mbuf **mb_list = ring->rx_info + (index << priv->log_rx_info); 103219820Sjeff int i; 104219820Sjeff 105219820Sjeff for (i = 0; i < priv->num_frags; i++) 106219820Sjeff if (mlx4_en_alloc_buf(priv, rx_desc, mb_list, i)) 107219820Sjeff goto err; 108219820Sjeff 109219820Sjeff return 0; 110219820Sjeff 111219820Sjefferr: 112219820Sjeff while (i--) 113219820Sjeff m_free(mb_list[i]); 114219820Sjeff return -ENOMEM; 115219820Sjeff} 116219820Sjeff 117219820Sjeffstatic inline void mlx4_en_update_rx_prod_db(struct mlx4_en_rx_ring *ring) 118219820Sjeff{ 119219820Sjeff *ring->wqres.db.db = cpu_to_be32(ring->prod & 0xffff); 120219820Sjeff} 121219820Sjeff 122219820Sjeffstatic void mlx4_en_free_rx_desc(struct mlx4_en_priv *priv, 123219820Sjeff struct mlx4_en_rx_ring *ring, 124219820Sjeff int index) 125219820Sjeff{ 126219820Sjeff struct mlx4_en_frag_info *frag_info; 127219820Sjeff struct mlx4_en_dev *mdev = priv->mdev; 128219820Sjeff struct mbuf **mb_list; 129219820Sjeff struct mlx4_en_rx_desc *rx_desc = ring->buf + (index << ring->log_stride); 130219820Sjeff dma_addr_t dma; 131219820Sjeff int nr; 132219820Sjeff 133219859Sjeff mb_list = ring->rx_info + (index << priv->log_rx_info); 134219859Sjeff for (nr = 0; nr < priv->num_frags; nr++) { 135219859Sjeff en_dbg(DRV, priv, "Freeing fragment:%d\n", nr); 136219859Sjeff frag_info = &priv->frag_info[nr]; 137219859Sjeff dma = be64_to_cpu(rx_desc->data[nr].addr); 138219820Sjeff 139219859Sjeff en_dbg(DRV, priv, "Unmaping buffer at dma:0x%llx\n", (u64) dma); 140219859Sjeff pci_unmap_single(mdev->pdev, dma, frag_info->frag_size, 141219820Sjeff PCI_DMA_FROMDEVICE); 142219859Sjeff m_free(mb_list[nr]); 143219820Sjeff } 144219820Sjeff} 145219820Sjeff 146219820Sjeffstatic int mlx4_en_fill_rx_buffers(struct mlx4_en_priv *priv) 147219820Sjeff{ 148219820Sjeff struct mlx4_en_rx_ring *ring; 149219820Sjeff int ring_ind; 150219820Sjeff int buf_ind; 151219820Sjeff int new_size; 152219820Sjeff int err; 153219820Sjeff 154219820Sjeff for (buf_ind = 0; buf_ind < priv->prof->rx_ring_size; buf_ind++) { 155219820Sjeff for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) { 156219820Sjeff ring = &priv->rx_ring[ring_ind]; 157219820Sjeff 158219859Sjeff err = mlx4_en_prepare_rx_desc(priv, ring, 159219859Sjeff ring->actual_size); 160219820Sjeff if (err) { 161219820Sjeff if (ring->actual_size == 0) { 162219820Sjeff en_err(priv, "Failed to allocate " 163219820Sjeff "enough rx buffers\n"); 164219820Sjeff return -ENOMEM; 165219820Sjeff } else { 166219820Sjeff new_size = rounddown_pow_of_two(ring->actual_size); 167219820Sjeff en_warn(priv, "Only %d buffers allocated " 168219820Sjeff "reducing ring size to %d\n", 169219820Sjeff ring->actual_size, new_size); 170219820Sjeff goto reduce_rings; 171219820Sjeff } 172219820Sjeff } 173219820Sjeff ring->actual_size++; 174219820Sjeff ring->prod++; 175219820Sjeff } 176219820Sjeff } 177219820Sjeff return 0; 178219820Sjeff 179219820Sjeffreduce_rings: 180219820Sjeff for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) { 181219820Sjeff ring = &priv->rx_ring[ring_ind]; 182219820Sjeff while (ring->actual_size > new_size) { 183219820Sjeff ring->actual_size--; 184219820Sjeff ring->prod--; 185219820Sjeff mlx4_en_free_rx_desc(priv, ring, ring->actual_size); 186219820Sjeff } 187219820Sjeff } 188219820Sjeff 189219820Sjeff return 0; 190219820Sjeff} 191219820Sjeff 192219820Sjeffstatic void mlx4_en_free_rx_buf(struct mlx4_en_priv *priv, 193219820Sjeff struct mlx4_en_rx_ring *ring) 194219820Sjeff{ 195219820Sjeff int index; 196219820Sjeff 197219820Sjeff en_dbg(DRV, priv, "Freeing Rx buf - cons:%d prod:%d\n", 198219820Sjeff ring->cons, ring->prod); 199219820Sjeff 200219820Sjeff /* Unmap and free Rx buffers */ 201219820Sjeff BUG_ON((u32) (ring->prod - ring->cons) > ring->actual_size); 202219820Sjeff while (ring->cons != ring->prod) { 203219820Sjeff index = ring->cons & ring->size_mask; 204219820Sjeff en_dbg(DRV, priv, "Processing descriptor:%d\n", index); 205219820Sjeff mlx4_en_free_rx_desc(priv, ring, index); 206219820Sjeff ++ring->cons; 207219820Sjeff } 208219820Sjeff} 209219820Sjeff 210219820Sjeff 211219820Sjeffint mlx4_en_create_rx_ring(struct mlx4_en_priv *priv, 212219820Sjeff struct mlx4_en_rx_ring *ring, u32 size) 213219820Sjeff{ 214219820Sjeff struct mlx4_en_dev *mdev = priv->mdev; 215219820Sjeff int err; 216219820Sjeff int tmp; 217219820Sjeff 218219820Sjeff 219219820Sjeff ring->prod = 0; 220219820Sjeff ring->cons = 0; 221219820Sjeff ring->size = size; 222219820Sjeff ring->size_mask = size - 1; 223219820Sjeff ring->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + 224219859Sjeff DS_SIZE * MLX4_EN_MAX_RX_FRAGS); 225219820Sjeff ring->log_stride = ffs(ring->stride) - 1; 226219820Sjeff ring->buf_size = ring->size * ring->stride + TXBB_SIZE; 227219820Sjeff 228219859Sjeff tmp = size * roundup_pow_of_two(MLX4_EN_MAX_RX_FRAGS * 229219859Sjeff sizeof(struct mbuf *)); 230219820Sjeff 231219820Sjeff ring->rx_info = kmalloc(tmp, GFP_KERNEL); 232219820Sjeff if (!ring->rx_info) { 233219820Sjeff en_err(priv, "Failed allocating rx_info ring\n"); 234219820Sjeff return -ENOMEM; 235219820Sjeff } 236219820Sjeff en_dbg(DRV, priv, "Allocated rx_info ring at addr:%p size:%d stride:%d (%d)\n", 237219820Sjeff ring->rx_info, tmp, ring->stride, ring->log_stride); 238219820Sjeff 239219820Sjeff err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres, 240219820Sjeff ring->buf_size, 2 * PAGE_SIZE); 241219820Sjeff if (err) 242219820Sjeff goto err_ring; 243219820Sjeff 244219820Sjeff err = mlx4_en_map_buffer(&ring->wqres.buf); 245219820Sjeff if (err) { 246219820Sjeff en_err(priv, "Failed to map RX buffer\n"); 247219820Sjeff goto err_hwq; 248219820Sjeff } 249219820Sjeff ring->buf = ring->wqres.buf.direct.buf; 250219820Sjeff 251219820Sjeff return 0; 252219820Sjeff 253219820Sjeff mlx4_en_unmap_buffer(&ring->wqres.buf); 254219820Sjefferr_hwq: 255219820Sjeff mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size); 256219820Sjefferr_ring: 257219820Sjeff kfree(ring->rx_info); 258219820Sjeff ring->rx_info = NULL; 259219820Sjeff return err; 260219820Sjeff} 261219820Sjeff 262219820Sjeffint mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv) 263219820Sjeff{ 264219820Sjeff struct mlx4_en_rx_ring *ring; 265219820Sjeff int i; 266219820Sjeff int ring_ind; 267219820Sjeff int err; 268219820Sjeff int stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + 269219820Sjeff DS_SIZE * priv->num_frags); 270219820Sjeff 271219820Sjeff for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) { 272219820Sjeff ring = &priv->rx_ring[ring_ind]; 273219820Sjeff 274219820Sjeff ring->prod = 0; 275219820Sjeff ring->cons = 0; 276219820Sjeff ring->actual_size = 0; 277219820Sjeff ring->cqn = priv->rx_cq[ring_ind].mcq.cqn; 278219859Sjeff ring->stride = stride; 279219820Sjeff if (ring->stride <= TXBB_SIZE) 280219820Sjeff ring->buf += TXBB_SIZE; 281219820Sjeff 282219820Sjeff ring->log_stride = ffs(ring->stride) - 1; 283219820Sjeff ring->buf_size = ring->size * ring->stride; 284219820Sjeff 285219820Sjeff memset(ring->buf, 0, ring->buf_size); 286219820Sjeff mlx4_en_update_rx_prod_db(ring); 287219820Sjeff 288219859Sjeff /* Initailize all descriptors */ 289219859Sjeff for (i = 0; i < ring->size; i++) 290219859Sjeff mlx4_en_init_rx_desc(priv, ring, i); 291239748Sjhb#ifdef INET 292219820Sjeff /* Configure lro mngr */ 293219820Sjeff if (priv->dev->if_capenable & IFCAP_LRO) { 294219820Sjeff if (tcp_lro_init(&ring->lro)) 295219820Sjeff priv->dev->if_capenable &= ~IFCAP_LRO; 296219820Sjeff else 297219820Sjeff ring->lro.ifp = priv->dev; 298219820Sjeff } 299239748Sjhb#endif 300219820Sjeff } 301219820Sjeff err = mlx4_en_fill_rx_buffers(priv); 302219820Sjeff if (err) 303219820Sjeff goto err_buffers; 304219820Sjeff 305219820Sjeff for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) { 306219820Sjeff ring = &priv->rx_ring[ring_ind]; 307219820Sjeff 308219820Sjeff ring->size_mask = ring->actual_size - 1; 309219820Sjeff mlx4_en_update_rx_prod_db(ring); 310219820Sjeff } 311219820Sjeff 312219820Sjeff 313219820Sjeff return 0; 314219820Sjeff 315219820Sjefferr_buffers: 316219820Sjeff for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) 317219820Sjeff mlx4_en_free_rx_buf(priv, &priv->rx_ring[ring_ind]); 318219820Sjeff 319219820Sjeff return err; 320219820Sjeff} 321219820Sjeff 322219820Sjeffvoid mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv, 323219820Sjeff struct mlx4_en_rx_ring *ring) 324219820Sjeff{ 325219820Sjeff struct mlx4_en_dev *mdev = priv->mdev; 326219820Sjeff 327219820Sjeff mlx4_en_unmap_buffer(&ring->wqres.buf); 328219820Sjeff mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size + TXBB_SIZE); 329219820Sjeff kfree(ring->rx_info); 330219820Sjeff ring->rx_info = NULL; 331219820Sjeff} 332219820Sjeff 333219820Sjeffvoid mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv, 334219820Sjeff struct mlx4_en_rx_ring *ring) 335219820Sjeff{ 336239748Sjhb#ifdef INET 337219820Sjeff tcp_lro_free(&ring->lro); 338239748Sjhb#endif 339219820Sjeff mlx4_en_free_rx_buf(priv, ring); 340219820Sjeff if (ring->stride <= TXBB_SIZE) 341219820Sjeff ring->buf -= TXBB_SIZE; 342219820Sjeff} 343219820Sjeff 344219820Sjeff 345219820Sjeff/* Unmap a completed descriptor and free unused pages */ 346219820Sjeffstatic int mlx4_en_complete_rx_desc(struct mlx4_en_priv *priv, 347219820Sjeff struct mlx4_en_rx_desc *rx_desc, 348219820Sjeff struct mbuf **mb_list, 349219820Sjeff int length) 350219820Sjeff{ 351219820Sjeff struct mlx4_en_dev *mdev = priv->mdev; 352219820Sjeff struct mlx4_en_frag_info *frag_info; 353219820Sjeff dma_addr_t dma; 354219820Sjeff struct mbuf *mb; 355219820Sjeff int nr; 356219820Sjeff 357219820Sjeff mb = mb_list[0]; 358219820Sjeff mb->m_pkthdr.len = length; 359219820Sjeff /* Collect used fragments while replacing them in the HW descirptors */ 360219820Sjeff for (nr = 0; nr < priv->num_frags; nr++) { 361219820Sjeff frag_info = &priv->frag_info[nr]; 362219820Sjeff if (length <= frag_info->frag_prefix_size) 363219820Sjeff break; 364219820Sjeff if (nr) 365219820Sjeff mb->m_next = mb_list[nr]; 366219820Sjeff mb = mb_list[nr]; 367219820Sjeff mb->m_len = frag_info[nr].frag_size; 368219820Sjeff dma = be64_to_cpu(rx_desc->data[nr].addr); 369219820Sjeff 370219820Sjeff /* Allocate a replacement page */ 371219820Sjeff if (mlx4_en_alloc_buf(priv, rx_desc, mb_list, nr)) 372219820Sjeff goto fail; 373219820Sjeff 374219820Sjeff /* Unmap buffer */ 375219820Sjeff pci_unmap_single(mdev->pdev, dma, frag_info[nr].frag_size, 376219820Sjeff PCI_DMA_FROMDEVICE); 377219820Sjeff } 378219820Sjeff /* Adjust size of last fragment to match actual length */ 379219820Sjeff mb->m_len = length - priv->frag_info[nr - 1].frag_prefix_size; 380219820Sjeff mb->m_next = NULL; 381219820Sjeff return 0; 382219820Sjeff 383219820Sjefffail: 384219820Sjeff /* Drop all accumulated fragments (which have already been replaced in 385219820Sjeff * the descriptor) of this packet; remaining fragments are reused... */ 386219820Sjeff while (nr > 0) { 387219820Sjeff nr--; 388219820Sjeff m_free(mb_list[nr]); 389219820Sjeff } 390219820Sjeff return -ENOMEM; 391219820Sjeff} 392219820Sjeff 393219820Sjeff 394219820Sjeffstatic inline int invalid_cqe(struct mlx4_en_priv *priv, 395219820Sjeff struct mlx4_cqe *cqe) 396219820Sjeff{ 397219820Sjeff /* Drop packet on bad receive or bad checksum */ 398219820Sjeff if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) == 399219820Sjeff MLX4_CQE_OPCODE_ERROR)) { 400219820Sjeff en_err(priv, "CQE completed in error - vendor " 401219820Sjeff "syndrom:%d syndrom:%d\n", 402219820Sjeff ((struct mlx4_err_cqe *) cqe)->vendor_err_syndrome, 403219820Sjeff ((struct mlx4_err_cqe *) cqe)->syndrome); 404219820Sjeff return 1; 405219820Sjeff } 406219820Sjeff if (unlikely(cqe->badfcs_enc & MLX4_CQE_BAD_FCS)) { 407219820Sjeff en_dbg(RX_ERR, priv, "Accepted frame with bad FCS\n"); 408242544Seadler return 1; 409219820Sjeff } 410219820Sjeff 411219820Sjeff return 0; 412219820Sjeff} 413219820Sjeff 414219820Sjeffstatic void validate_loopback(struct mlx4_en_priv *priv, struct mbuf *mb) 415219820Sjeff{ 416219820Sjeff int i; 417219820Sjeff int offset = ETHER_HDR_LEN; 418219820Sjeff 419219820Sjeff for (i = 0; i < MLX4_LOOPBACK_TEST_PAYLOAD; i++, offset++) { 420219820Sjeff if (*(mb->m_data + offset) != (unsigned char) (i & 0xff)) 421219820Sjeff goto out_loopback; 422219820Sjeff } 423219820Sjeff /* Loopback found */ 424219820Sjeff priv->loopback_ok = 1; 425219820Sjeff 426219820Sjeffout_loopback: 427219820Sjeff m_freem(mb); 428219820Sjeff} 429219820Sjeff 430219859Sjeffstatic struct mbuf *mlx4_en_rx_mb(struct mlx4_en_priv *priv, 431219859Sjeff struct mlx4_en_rx_desc *rx_desc, 432219859Sjeff struct mbuf **mb_list, 433219859Sjeff unsigned int length) 434219820Sjeff{ 435219820Sjeff struct mbuf *mb; 436219820Sjeff 437219859Sjeff mb = mb_list[0]; 438219859Sjeff /* Move relevant fragments to mb */ 439219859Sjeff if (unlikely(mlx4_en_complete_rx_desc(priv, rx_desc, mb_list, length))) 440219859Sjeff return NULL; 441219820Sjeff 442219859Sjeff return mb; 443219859Sjeff} 444219820Sjeff 445219820Sjeff 446219820Sjeffint mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int budget) 447219820Sjeff{ 448219820Sjeff struct mlx4_en_priv *priv = netdev_priv(dev); 449219820Sjeff struct mlx4_cqe *cqe; 450219820Sjeff struct mlx4_en_rx_ring *ring = &priv->rx_ring[cq->ring]; 451219820Sjeff struct mbuf **mb_list; 452219820Sjeff struct mlx4_en_rx_desc *rx_desc; 453219820Sjeff struct mbuf *mb; 454239748Sjhb#ifdef INET 455219820Sjeff struct lro_entry *queued; 456239748Sjhb#endif 457219820Sjeff int index; 458219820Sjeff unsigned int length; 459219820Sjeff int polled = 0; 460219820Sjeff 461219820Sjeff if (!priv->port_up) 462219820Sjeff return 0; 463219820Sjeff 464219820Sjeff /* We assume a 1:1 mapping between CQEs and Rx descriptors, so Rx 465219820Sjeff * descriptor offset can be deduced from the CQE index instead of 466219820Sjeff * reading 'cqe->index' */ 467219820Sjeff index = cq->mcq.cons_index & ring->size_mask; 468219820Sjeff cqe = &cq->buf[index]; 469219820Sjeff 470219820Sjeff /* Process all completed CQEs */ 471219820Sjeff while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK, 472219820Sjeff cq->mcq.cons_index & cq->size)) { 473219820Sjeff 474219820Sjeff mb_list = ring->rx_info + (index << priv->log_rx_info); 475219820Sjeff rx_desc = ring->buf + (index << ring->log_stride); 476219820Sjeff 477219820Sjeff /* 478219820Sjeff * make sure we read the CQE after we read the ownership bit 479219820Sjeff */ 480219820Sjeff rmb(); 481219820Sjeff 482219820Sjeff if (invalid_cqe(priv, cqe)) 483219820Sjeff goto next; 484219820Sjeff 485219820Sjeff /* 486219820Sjeff * Packet is OK - process it. 487219820Sjeff */ 488219820Sjeff length = be32_to_cpu(cqe->byte_cnt); 489219820Sjeff mb = mlx4_en_rx_mb(priv, rx_desc, mb_list, length); 490219820Sjeff if (!mb) { 491219820Sjeff ring->errors++; 492219820Sjeff goto next; 493219820Sjeff } 494219820Sjeff 495219820Sjeff ring->bytes += length; 496219820Sjeff ring->packets++; 497219820Sjeff 498219820Sjeff if (unlikely(priv->validate_loopback)) { 499219820Sjeff validate_loopback(priv, mb); 500219820Sjeff goto next; 501219820Sjeff } 502219820Sjeff 503219820Sjeff mb->m_pkthdr.flowid = cq->ring; 504219820Sjeff mb->m_flags |= M_FLOWID; 505219820Sjeff mb->m_pkthdr.rcvif = dev; 506219820Sjeff if (be32_to_cpu(cqe->vlan_my_qpn) & 507219820Sjeff MLX4_CQE_VLAN_PRESENT_MASK) { 508219820Sjeff mb->m_pkthdr.ether_vtag = be16_to_cpu(cqe->sl_vid); 509219820Sjeff mb->m_flags |= M_VLANTAG; 510219820Sjeff } 511219820Sjeff if (likely(priv->rx_csum) && 512219820Sjeff (cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPOK)) && 513219820Sjeff (cqe->checksum == cpu_to_be16(0xffff))) { 514219820Sjeff priv->port_stats.rx_chksum_good++; 515219820Sjeff mb->m_pkthdr.csum_flags = 516219820Sjeff CSUM_IP_CHECKED | CSUM_IP_VALID | 517219820Sjeff CSUM_DATA_VALID | CSUM_PSEUDO_HDR; 518219820Sjeff mb->m_pkthdr.csum_data = htons(0xffff); 519219820Sjeff /* This packet is eligible for LRO if it is: 520219820Sjeff * - DIX Ethernet (type interpretation) 521219820Sjeff * - TCP/IP (v4) 522219820Sjeff * - without IP options 523219820Sjeff * - not an IP fragment 524219820Sjeff */ 525239748Sjhb#ifdef INET 526219820Sjeff if (mlx4_en_can_lro(cqe->status) && 527219820Sjeff (dev->if_capenable & IFCAP_LRO)) { 528219820Sjeff if (ring->lro.lro_cnt != 0 && 529219820Sjeff tcp_lro_rx(&ring->lro, mb, 0) == 0) 530219820Sjeff goto next; 531219820Sjeff } 532239748Sjhb#endif 533219820Sjeff 534219820Sjeff /* LRO not possible, complete processing here */ 535219820Sjeff INC_PERF_COUNTER(priv->pstats.lro_misses); 536219820Sjeff } else { 537219820Sjeff mb->m_pkthdr.csum_flags = 0; 538219820Sjeff priv->port_stats.rx_chksum_none++; 539239748Sjhb#ifdef INET 540219859Sjeff if (priv->ip_reasm && 541219859Sjeff cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPV4) && 542219859Sjeff !mlx4_en_rx_frags(priv, ring, mb, cqe)) 543219859Sjeff goto next; 544239748Sjhb#endif 545219820Sjeff } 546219820Sjeff 547219820Sjeff /* Push it up the stack */ 548219820Sjeff dev->if_input(dev, mb); 549219820Sjeff 550219820Sjeffnext: 551219820Sjeff ++cq->mcq.cons_index; 552219820Sjeff index = (cq->mcq.cons_index) & ring->size_mask; 553219820Sjeff cqe = &cq->buf[index]; 554219820Sjeff if (++polled == budget) 555219859Sjeff goto out; 556219820Sjeff } 557219859Sjeff /* Flush all pending IP reassembly sessions */ 558219859Sjeffout: 559239748Sjhb#ifdef INET 560219859Sjeff mlx4_en_flush_frags(priv, ring); 561219820Sjeff while ((queued = SLIST_FIRST(&ring->lro.lro_active)) != NULL) { 562219820Sjeff SLIST_REMOVE_HEAD(&ring->lro.lro_active, next); 563219820Sjeff tcp_lro_flush(&ring->lro, queued); 564219820Sjeff } 565239748Sjhb#endif 566219820Sjeff AVG_PERF_COUNTER(priv->pstats.rx_coal_avg, polled); 567219820Sjeff mlx4_cq_set_ci(&cq->mcq); 568219820Sjeff wmb(); /* ensure HW sees CQ consumer before we post new buffers */ 569219820Sjeff ring->cons = cq->mcq.cons_index; 570219820Sjeff ring->prod += polled; /* Polled descriptors were realocated in place */ 571219820Sjeff mlx4_en_update_rx_prod_db(ring); 572219820Sjeff return polled; 573219820Sjeff} 574219820Sjeff 575219820Sjeff 576219820Sjeff/* Rx CQ polling - called by NAPI */ 577219820Sjeffstatic int mlx4_en_poll_rx_cq(struct mlx4_en_cq *cq, int budget) 578219820Sjeff{ 579219820Sjeff struct net_device *dev = cq->dev; 580219820Sjeff int done; 581219820Sjeff 582219859Sjeff done = mlx4_en_process_rx_cq(dev, cq, budget); 583219820Sjeff cq->tot_rx += done; 584219820Sjeff 585219820Sjeff return done; 586219820Sjeff} 587219820Sjeff 588219820Sjeffvoid mlx4_en_rx_que(void *context, int pending) 589219820Sjeff{ 590219820Sjeff struct mlx4_en_cq *cq; 591219820Sjeff 592219820Sjeff cq = context; 593219820Sjeff while (mlx4_en_poll_rx_cq(cq, MLX4_EN_MAX_RX_POLL) 594219820Sjeff == MLX4_EN_MAX_RX_POLL); 595219820Sjeff mlx4_en_arm_cq(cq->dev->if_softc, cq); 596219820Sjeff} 597219820Sjeff 598219820Sjeffvoid mlx4_en_rx_irq(struct mlx4_cq *mcq) 599219820Sjeff{ 600219820Sjeff struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq); 601219820Sjeff struct mlx4_en_priv *priv = netdev_priv(cq->dev); 602219820Sjeff int done; 603219820Sjeff 604219820Sjeff done = mlx4_en_poll_rx_cq(cq, MLX4_EN_MAX_RX_POLL); 605219820Sjeff if (done == MLX4_EN_MAX_RX_POLL) 606219820Sjeff taskqueue_enqueue(cq->tq, &cq->cq_task); 607219820Sjeff else 608219820Sjeff mlx4_en_arm_cq(priv, cq); 609219820Sjeff} 610219820Sjeff 611219820Sjeff 612219820Sjeff#if MLX4_EN_MAX_RX_FRAGS == 3 613219820Sjeffstatic int frag_sizes[] = { 614219820Sjeff FRAG_SZ0, 615219820Sjeff FRAG_SZ1, 616219820Sjeff FRAG_SZ2, 617219820Sjeff}; 618219820Sjeff#elif MLX4_EN_MAX_RX_FRAGS == 2 619219820Sjeffstatic int frag_sizes[] = { 620219820Sjeff FRAG_SZ0, 621219820Sjeff FRAG_SZ1, 622219820Sjeff}; 623219820Sjeff#else 624219820Sjeff#error "Unknown MAX_RX_FRAGS" 625219820Sjeff#endif 626219820Sjeff 627219820Sjeffvoid mlx4_en_calc_rx_buf(struct net_device *dev) 628219820Sjeff{ 629219820Sjeff struct mlx4_en_priv *priv = netdev_priv(dev); 630219820Sjeff int eff_mtu = dev->if_mtu + ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN + ETH_LLC_SNAP_SIZE; 631219820Sjeff int buf_size = 0; 632219820Sjeff int i, frag; 633219820Sjeff 634219820Sjeff for (i = 0, frag = 0; buf_size < eff_mtu; frag++, i++) { 635219820Sjeff /* 636219820Sjeff * Allocate small to large but only as much as is needed for 637219820Sjeff * the tail. 638219820Sjeff */ 639219820Sjeff while (i > 0 && eff_mtu - buf_size <= frag_sizes[i - 1]) 640219820Sjeff i--; 641219820Sjeff priv->frag_info[frag].frag_size = frag_sizes[i]; 642219820Sjeff priv->frag_info[frag].frag_prefix_size = buf_size; 643219820Sjeff buf_size += priv->frag_info[frag].frag_size; 644219820Sjeff } 645219820Sjeff 646219820Sjeff priv->num_frags = frag; 647219859Sjeff priv->rx_mb_size = eff_mtu; 648219820Sjeff priv->log_rx_info = 649219820Sjeff ROUNDUP_LOG2(priv->num_frags * sizeof(struct mbuf *)); 650219820Sjeff 651219820Sjeff en_dbg(DRV, priv, "Rx buffer scatter-list (effective-mtu:%d " 652219820Sjeff "num_frags:%d):\n", eff_mtu, priv->num_frags); 653219820Sjeff for (i = 0; i < priv->num_frags; i++) { 654219820Sjeff en_dbg(DRV, priv, " frag:%d - size:%d prefix:%d\n", i, 655219820Sjeff priv->frag_info[i].frag_size, 656219820Sjeff priv->frag_info[i].frag_prefix_size) 657219820Sjeff } 658219820Sjeff} 659219820Sjeff 660219820Sjeff/* RSS related functions */ 661219820Sjeff 662219820Sjeffstatic int mlx4_en_config_rss_qp(struct mlx4_en_priv *priv, int qpn, 663219820Sjeff struct mlx4_en_rx_ring *ring, 664219820Sjeff enum mlx4_qp_state *state, 665219820Sjeff struct mlx4_qp *qp) 666219820Sjeff{ 667219820Sjeff struct mlx4_en_dev *mdev = priv->mdev; 668219820Sjeff struct mlx4_qp_context *context; 669219820Sjeff int err = 0; 670219820Sjeff 671219820Sjeff context = kmalloc(sizeof *context , GFP_KERNEL); 672219820Sjeff if (!context) { 673219820Sjeff en_err(priv, "Failed to allocate qp context\n"); 674219820Sjeff return -ENOMEM; 675219820Sjeff } 676219820Sjeff 677219820Sjeff err = mlx4_qp_alloc(mdev->dev, qpn, qp); 678219820Sjeff if (err) { 679219820Sjeff en_err(priv, "Failed to allocate qp #%x\n", qpn); 680219820Sjeff goto out; 681219820Sjeff } 682219820Sjeff qp->event = mlx4_en_sqp_event; 683219820Sjeff 684219820Sjeff memset(context, 0, sizeof *context); 685219820Sjeff mlx4_en_fill_qp_context(priv, ring->actual_size, ring->stride, 0, 0, 686219820Sjeff qpn, ring->cqn, context); 687219820Sjeff context->db_rec_addr = cpu_to_be64(ring->wqres.db.dma); 688219820Sjeff 689219820Sjeff err = mlx4_qp_to_ready(mdev->dev, &ring->wqres.mtt, context, qp, state); 690219820Sjeff if (err) { 691219820Sjeff mlx4_qp_remove(mdev->dev, qp); 692219820Sjeff mlx4_qp_free(mdev->dev, qp); 693219820Sjeff } 694219820Sjeff mlx4_en_update_rx_prod_db(ring); 695219820Sjeffout: 696219820Sjeff kfree(context); 697219820Sjeff return err; 698219820Sjeff} 699219820Sjeff 700219820Sjeff/* Allocate rx qp's and configure them according to rss map */ 701219820Sjeffint mlx4_en_config_rss_steer(struct mlx4_en_priv *priv) 702219820Sjeff{ 703219820Sjeff struct mlx4_en_dev *mdev = priv->mdev; 704219820Sjeff struct mlx4_en_rss_map *rss_map = &priv->rss_map; 705219820Sjeff struct mlx4_qp_context context; 706219820Sjeff struct mlx4_en_rss_context *rss_context; 707219820Sjeff void *ptr; 708219859Sjeff u8 rss_mask; 709219820Sjeff int i, qpn; 710219820Sjeff int err = 0; 711219820Sjeff int good_qps = 0; 712219820Sjeff 713219859Sjeff if (mdev->profile.udp_rss) 714219859Sjeff rss_mask = 0x3f; 715219859Sjeff else 716219859Sjeff rss_mask = 0x14; 717219820Sjeff en_dbg(DRV, priv, "Configuring rss steering\n"); 718219820Sjeff err = mlx4_qp_reserve_range(mdev->dev, priv->rx_ring_num, 719219820Sjeff roundup_pow_of_two(priv->rx_ring_num), 720219820Sjeff &rss_map->base_qpn); 721219820Sjeff if (err) { 722219820Sjeff en_err(priv, "Failed reserving %d qps\n", priv->rx_ring_num); 723219820Sjeff return err; 724219820Sjeff } 725219820Sjeff 726219820Sjeff for (i = 0; i < priv->rx_ring_num; i++) { 727219820Sjeff qpn = rss_map->base_qpn + i; 728219820Sjeff err = mlx4_en_config_rss_qp(priv, qpn, 729219820Sjeff &priv->rx_ring[i], 730219820Sjeff &rss_map->state[i], 731219820Sjeff &rss_map->qps[i]); 732219820Sjeff if (err) 733219820Sjeff goto rss_err; 734219820Sjeff 735219820Sjeff ++good_qps; 736219820Sjeff } 737219820Sjeff 738219820Sjeff /* Configure RSS indirection qp */ 739219820Sjeff err = mlx4_qp_reserve_range(mdev->dev, 1, 1, &priv->base_qpn); 740219820Sjeff if (err) { 741219820Sjeff en_err(priv, "Failed to reserve range for RSS " 742219820Sjeff "indirection qp\n"); 743219820Sjeff goto rss_err; 744219820Sjeff } 745219820Sjeff err = mlx4_qp_alloc(mdev->dev, priv->base_qpn, &rss_map->indir_qp); 746219820Sjeff if (err) { 747219820Sjeff en_err(priv, "Failed to allocate RSS indirection QP\n"); 748219820Sjeff goto reserve_err; 749219820Sjeff } 750219820Sjeff rss_map->indir_qp.event = mlx4_en_sqp_event; 751219820Sjeff mlx4_en_fill_qp_context(priv, 0, 0, 0, 1, priv->base_qpn, 752219820Sjeff priv->rx_ring[0].cqn, &context); 753219820Sjeff 754219820Sjeff ptr = ((void *) &context) + 0x3c; 755219820Sjeff rss_context = (struct mlx4_en_rss_context *) ptr; 756219859Sjeff rss_context->base_qpn = cpu_to_be32(ilog2(priv->rx_ring_num) << 24 | 757219820Sjeff (rss_map->base_qpn)); 758219859Sjeff rss_context->default_qpn = cpu_to_be32(rss_map->base_qpn); 759219820Sjeff rss_context->flags = rss_mask; 760219859Sjeff rss_context->base_qpn_udp = rss_context->default_qpn; 761219820Sjeff 762219820Sjeff err = mlx4_qp_to_ready(mdev->dev, &priv->res.mtt, &context, 763219820Sjeff &rss_map->indir_qp, &rss_map->indir_state); 764219820Sjeff if (err) 765219820Sjeff goto indir_err; 766219820Sjeff 767219820Sjeff return 0; 768219820Sjeff 769219820Sjeffindir_err: 770219820Sjeff mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state, 771219820Sjeff MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp); 772219820Sjeff mlx4_qp_remove(mdev->dev, &rss_map->indir_qp); 773219820Sjeff mlx4_qp_free(mdev->dev, &rss_map->indir_qp); 774219820Sjeffreserve_err: 775219820Sjeff mlx4_qp_release_range(mdev->dev, priv->base_qpn, 1); 776219820Sjeffrss_err: 777219820Sjeff for (i = 0; i < good_qps; i++) { 778219820Sjeff mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i], 779219820Sjeff MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]); 780219820Sjeff mlx4_qp_remove(mdev->dev, &rss_map->qps[i]); 781219820Sjeff mlx4_qp_free(mdev->dev, &rss_map->qps[i]); 782219820Sjeff } 783219820Sjeff mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, priv->rx_ring_num); 784219820Sjeff return err; 785219820Sjeff} 786219820Sjeff 787219820Sjeffvoid mlx4_en_release_rss_steer(struct mlx4_en_priv *priv) 788219820Sjeff{ 789219820Sjeff struct mlx4_en_dev *mdev = priv->mdev; 790219820Sjeff struct mlx4_en_rss_map *rss_map = &priv->rss_map; 791219820Sjeff int i; 792219820Sjeff 793219820Sjeff mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state, 794219820Sjeff MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp); 795219820Sjeff mlx4_qp_remove(mdev->dev, &rss_map->indir_qp); 796219820Sjeff mlx4_qp_free(mdev->dev, &rss_map->indir_qp); 797219820Sjeff mlx4_qp_release_range(mdev->dev, priv->base_qpn, 1); 798219820Sjeff 799219820Sjeff for (i = 0; i < priv->rx_ring_num; i++) { 800219820Sjeff mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i], 801219820Sjeff MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]); 802219820Sjeff mlx4_qp_remove(mdev->dev, &rss_map->qps[i]); 803219820Sjeff mlx4_qp_free(mdev->dev, &rss_map->qps[i]); 804219820Sjeff } 805219820Sjeff mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, priv->rx_ring_num); 806219820Sjeff} 807