debug.h revision 198160
1198160Srrs/*- 2198160Srrs * Copyright (c) 2003-2009 RMI Corporation 3198160Srrs * All rights reserved. 4198160Srrs * 5198160Srrs * Redistribution and use in source and binary forms, with or without 6198160Srrs * modification, are permitted provided that the following conditions 7198160Srrs * are met: 8198160Srrs * 1. Redistributions of source code must retain the above copyright 9198160Srrs * notice, this list of conditions and the following disclaimer. 10198160Srrs * 2. Redistributions in binary form must reproduce the above copyright 11198160Srrs * notice, this list of conditions and the following disclaimer in the 12198160Srrs * documentation and/or other materials provided with the distribution. 13198160Srrs * 3. Neither the name of RMI Corporation, nor the names of its contributors, 14198160Srrs * may be used to endorse or promote products derived from this software 15198160Srrs * without specific prior written permission. 16198160Srrs * 17198160Srrs * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18198160Srrs * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19198160Srrs * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20198160Srrs * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21198160Srrs * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22198160Srrs * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23198160Srrs * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24198160Srrs * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25198160Srrs * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26198160Srrs * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27198160Srrs * SUCH DAMAGE. 28198160Srrs * 29198160Srrs * RMI_BSD */ 30198160Srrs#ifndef _RMI_DEBUG_H_ 31198160Srrs#define _RMI_DEBUG_H_ 32198160Srrs 33198160Srrs#include <machine/atomic.h> 34198160Srrs 35198160Srrsenum { 36198160Srrs //cacheline 0 37198160Srrs MSGRNG_INT, 38198160Srrs MSGRNG_PIC_INT, 39198160Srrs MSGRNG_MSG, 40198160Srrs MSGRNG_EXIT_STATUS, 41198160Srrs MSGRNG_MSG_CYCLES, 42198160Srrs //cacheline 1 43198160Srrs NETIF_TX = 8, 44198160Srrs NETIF_RX, 45198160Srrs NETIF_TX_COMPLETE, 46198160Srrs NETIF_TX_COMPLETE_TX, 47198160Srrs NETIF_RX_CYCLES, 48198160Srrs NETIF_TX_COMPLETE_CYCLES, 49198160Srrs NETIF_TX_CYCLES, 50198160Srrs NETIF_TIMER_START_Q, 51198160Srrs //NETIF_REG_FRIN, 52198160Srrs //NETIF_INT_REG, 53198160Srrs //cacheline 2 54198160Srrs REPLENISH_ENTER = 16, 55198160Srrs REPLENISH_ENTER_COUNT, 56198160Srrs REPLENISH_CPU, 57198160Srrs REPLENISH_FRIN, 58198160Srrs REPLENISH_CYCLES, 59198160Srrs NETIF_STACK_TX, 60198160Srrs NETIF_START_Q, 61198160Srrs NETIF_STOP_Q, 62198160Srrs //cacheline 3 63198160Srrs USER_MAC_START = 24, 64198160Srrs USER_MAC_INT = 24, 65198160Srrs USER_MAC_TX_COMPLETE, 66198160Srrs USER_MAC_RX, 67198160Srrs USER_MAC_POLL, 68198160Srrs USER_MAC_TX, 69198160Srrs USER_MAC_TX_FAIL, 70198160Srrs USER_MAC_TX_COUNT, 71198160Srrs USER_MAC_FRIN, 72198160Srrs //cacheline 4 73198160Srrs USER_MAC_TX_FAIL_GMAC_CREDITS = 32, 74198160Srrs USER_MAC_DO_PAGE_FAULT, 75198160Srrs USER_MAC_UPDATE_TLB, 76198160Srrs USER_MAC_UPDATE_BIGTLB, 77198160Srrs USER_MAC_UPDATE_TLB_PFN0, 78198160Srrs USER_MAC_UPDATE_TLB_PFN1, 79198160Srrs 80198160Srrs XLR_MAX_COUNTERS = 40 81198160Srrs}; 82198160Srrsextern int xlr_counters[MAXCPU][XLR_MAX_COUNTERS]; 83198160Srrsextern __uint32_t msgrng_msg_cycles; 84198160Srrs 85198160Srrs#ifdef ENABLE_DEBUG 86198160Srrs#define xlr_inc_counter(x) atomic_add_int(&xlr_counters[PCPU_GET(cpuid)][(x)], 1) 87198160Srrs#define xlr_dec_counter(x) atomic_subtract_int(&xlr_counters[PCPU_GET(cpuid)][(x)], 1) 88198160Srrs#define xlr_set_counter(x, value) atomic_set_int(&xlr_counters[PCPU_GET(cpuid)][(x)], (value)) 89198160Srrs#define xlr_get_counter(x) (&xlr_counters[0][(x)]) 90198160Srrs 91198160Srrs#else /* default mode */ 92198160Srrs 93198160Srrs#define xlr_inc_counter(x) 94198160Srrs#define xlr_dec_counter(x) 95198160Srrs#define xlr_set_counter(x, value) 96198160Srrs#define xlr_get_counter(x) 97198160Srrs 98198160Srrs#endif 99198160Srrs 100198160Srrs#define dbg_msg(fmt, args...) printf(fmt, ##args) 101198160Srrs#define dbg_panic(fmt, args...) panic(fmt, ##args) 102198160Srrs 103198160Srrs#endif 104