1215989Sgonzo/*- 2215989Sgonzo * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org> 3216947Sjmallett * Copyright (c) 2010-2011, Juli Mallett <jmallett@FreeBSD.org> 4215989Sgonzo * All rights reserved. 5215989Sgonzo * 6215989Sgonzo * Redistribution and use in source and binary forms, with or without 7215989Sgonzo * modification, are permitted provided that the following conditions 8215989Sgonzo * are met: 9215989Sgonzo * 1. Redistributions of source code must retain the above copyright 10215989Sgonzo * notice unmodified, this list of conditions, and the following 11215989Sgonzo * disclaimer. 12215989Sgonzo * 2. Redistributions in binary form must reproduce the above copyright 13215989Sgonzo * notice, this list of conditions and the following disclaimer in the 14215989Sgonzo * documentation and/or other materials provided with the distribution. 15215989Sgonzo * 16215989Sgonzo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17215989Sgonzo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18215989Sgonzo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19215989Sgonzo * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20215989Sgonzo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21215989Sgonzo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22215989Sgonzo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23215989Sgonzo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24215989Sgonzo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25215989Sgonzo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26215989Sgonzo * SUCH DAMAGE. 27215989Sgonzo */ 28215989Sgonzo 29215989Sgonzo/* 30215989Sgonzo * Watchdog driver for Cavium Octeon 31215989Sgonzo */ 32215989Sgonzo 33215989Sgonzo#include <sys/cdefs.h> 34215989Sgonzo__FBSDID("$FreeBSD$"); 35215989Sgonzo 36215989Sgonzo#include <sys/param.h> 37215989Sgonzo#include <sys/systm.h> 38215989Sgonzo#include <sys/watchdog.h> 39215989Sgonzo#include <sys/bus.h> 40215989Sgonzo#include <sys/kernel.h> 41215989Sgonzo#include <sys/module.h> 42215989Sgonzo#include <sys/sysctl.h> 43215989Sgonzo#include <sys/rman.h> 44215989Sgonzo#include <sys/smp.h> 45215989Sgonzo 46215989Sgonzo#include <contrib/octeon-sdk/cvmx.h> 47215989Sgonzo#include <contrib/octeon-sdk/cvmx-interrupt.h> 48215989Sgonzo 49215989Sgonzo#define DEFAULT_TIMER_VAL 65535 50215989Sgonzo 51215989Sgonzostruct octeon_wdog_softc { 52216947Sjmallett device_t sc_dev; 53216947Sjmallett struct octeon_wdog_core_softc { 54216947Sjmallett int csc_core; 55216947Sjmallett struct resource *csc_intr; 56216947Sjmallett void *csc_intr_cookie; 57216947Sjmallett } sc_cores[MAXCPU]; 58216947Sjmallett int sc_armed; 59216947Sjmallett int sc_debug; 60215989Sgonzo}; 61215989Sgonzo 62215989Sgonzoextern void octeon_wdog_nmi_handler(void); 63215989Sgonzovoid octeon_wdog_nmi(void); 64215989Sgonzo 65216947Sjmallettstatic void octeon_watchdog_arm_core(int); 66216947Sjmallettstatic void octeon_watchdog_disarm_core(int); 67216947Sjmallettstatic int octeon_wdog_attach(device_t); 68216947Sjmallettstatic void octeon_wdog_identify(driver_t *, device_t); 69216947Sjmallettstatic int octeon_wdog_intr(void *); 70216947Sjmallettstatic int octeon_wdog_probe(device_t); 71216947Sjmallettstatic void octeon_wdog_setup(struct octeon_wdog_softc *, int); 72216947Sjmallettstatic void octeon_wdog_sysctl(device_t); 73216947Sjmallettstatic void octeon_wdog_watchdog_fn(void *, u_int, int *); 74215989Sgonzo 75215989Sgonzovoid 76216947Sjmallettocteon_wdog_nmi(void) 77215989Sgonzo{ 78216947Sjmallett int core; 79215989Sgonzo 80216947Sjmallett core = cvmx_get_core_num(); 81215989Sgonzo 82216947Sjmallett printf("cpu%u: NMI detected\n", core); 83216947Sjmallett printf("cpu%u: Exception PC: %p\n", core, (void *)mips_rd_excpc()); 84216947Sjmallett printf("cpu%u: status %#x cause %#x\n", core, mips_rd_status(), mips_rd_cause()); 85216947Sjmallett 86216947Sjmallett /* 87216947Sjmallett * This is the end 88216947Sjmallett * Beautiful friend 89215989Sgonzo * 90215989Sgonzo * Just wait for Soft Reset to come and take us 91215989Sgonzo */ 92215989Sgonzo for (;;) 93216947Sjmallett continue; 94215989Sgonzo} 95215989Sgonzo 96216947Sjmallettstatic void 97216947Sjmallettocteon_watchdog_arm_core(int core) 98215989Sgonzo{ 99215989Sgonzo cvmx_ciu_wdogx_t ciu_wdog; 100215989Sgonzo 101215989Sgonzo /* Poke it! */ 102215989Sgonzo cvmx_write_csr(CVMX_CIU_PP_POKEX(core), 1); 103215989Sgonzo 104216947Sjmallett /* 105216947Sjmallett * XXX 106216947Sjmallett * Perhaps if KDB is enabled, we should use mode=2 and drop into the 107216947Sjmallett * debugger on NMI? 108216947Sjmallett * 109216947Sjmallett * XXX 110216947Sjmallett * Timer should be calculated based on CPU frquency 111216947Sjmallett */ 112215989Sgonzo ciu_wdog.u64 = 0; 113216947Sjmallett ciu_wdog.s.len = DEFAULT_TIMER_VAL; 114215989Sgonzo ciu_wdog.s.mode = 3; 115215989Sgonzo cvmx_write_csr(CVMX_CIU_WDOGX(core), ciu_wdog.u64); 116215989Sgonzo} 117215989Sgonzo 118216947Sjmallettstatic void 119215989Sgonzoocteon_watchdog_disarm_core(int core) 120215989Sgonzo{ 121215989Sgonzo 122215989Sgonzo cvmx_write_csr(CVMX_CIU_WDOGX(core), 0); 123215989Sgonzo} 124215989Sgonzo 125215989Sgonzostatic void 126215989Sgonzoocteon_wdog_watchdog_fn(void *private, u_int cmd, int *error) 127215989Sgonzo{ 128215989Sgonzo struct octeon_wdog_softc *sc = private; 129216947Sjmallett int core; 130215989Sgonzo 131215989Sgonzo cmd &= WD_INTERVAL; 132216947Sjmallett if (sc->sc_debug) 133216947Sjmallett device_printf(sc->sc_dev, "%s: cmd: %x\n", __func__, cmd); 134215989Sgonzo if (cmd > 0) { 135216947Sjmallett CPU_FOREACH(core) 136216947Sjmallett octeon_watchdog_arm_core(core); 137216947Sjmallett sc->sc_armed = 1; 138215989Sgonzo *error = 0; 139215989Sgonzo } else { 140216947Sjmallett if (sc->sc_armed) { 141216947Sjmallett CPU_FOREACH(core) 142216947Sjmallett octeon_watchdog_disarm_core(core); 143216947Sjmallett sc->sc_armed = 0; 144215989Sgonzo } 145215989Sgonzo } 146215989Sgonzo} 147215989Sgonzo 148215989Sgonzostatic void 149215989Sgonzoocteon_wdog_sysctl(device_t dev) 150215989Sgonzo{ 151215989Sgonzo struct octeon_wdog_softc *sc = device_get_softc(dev); 152215989Sgonzo 153216947Sjmallett struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 154216947Sjmallett struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 155215989Sgonzo 156215989Sgonzo SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 157216947Sjmallett "debug", CTLFLAG_RW, &sc->sc_debug, 0, 158215989Sgonzo "enable watchdog debugging"); 159215989Sgonzo SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 160216947Sjmallett "armed", CTLFLAG_RD, &sc->sc_armed, 0, 161215989Sgonzo "whether the watchdog is armed"); 162215989Sgonzo} 163215989Sgonzo 164215989Sgonzostatic void 165216947Sjmallettocteon_wdog_setup(struct octeon_wdog_softc *sc, int core) 166215989Sgonzo{ 167216947Sjmallett struct octeon_wdog_core_softc *csc; 168216947Sjmallett int rid, error; 169215989Sgonzo 170216947Sjmallett csc = &sc->sc_cores[core]; 171215989Sgonzo 172216947Sjmallett csc->csc_core = core; 173216947Sjmallett 174215989Sgonzo /* Interrupt part */ 175215989Sgonzo rid = 0; 176216947Sjmallett csc->csc_intr = bus_alloc_resource(sc->sc_dev, SYS_RES_IRQ, &rid, 177216947Sjmallett CVMX_IRQ_WDOG0 + core, CVMX_IRQ_WDOG0 + core, 1, RF_ACTIVE); 178216947Sjmallett if (csc->csc_intr == NULL) 179216947Sjmallett panic("%s: bus_alloc_resource for core %u failed", 180216947Sjmallett __func__, core); 181215989Sgonzo 182216947Sjmallett error = bus_setup_intr(sc->sc_dev, csc->csc_intr, INTR_TYPE_MISC, 183216947Sjmallett octeon_wdog_intr, NULL, csc, &csc->csc_intr_cookie); 184216947Sjmallett if (error != 0) 185216947Sjmallett panic("%s: bus_setup_intr for core %u: %d", __func__, core, 186216947Sjmallett error); 187215989Sgonzo 188216947Sjmallett bus_bind_intr(sc->sc_dev, csc->csc_intr, core); 189216947Sjmallett bus_describe_intr(sc->sc_dev, csc->csc_intr, csc->csc_intr_cookie, 190216947Sjmallett "cpu%u", core); 191215989Sgonzo 192216947Sjmallett if (sc->sc_armed) { 193216947Sjmallett /* Armed by default. */ 194216947Sjmallett octeon_watchdog_arm_core(core); 195216947Sjmallett } else { 196216947Sjmallett /* Disarmed by default. */ 197216947Sjmallett octeon_watchdog_disarm_core(core); 198216947Sjmallett } 199215989Sgonzo} 200215989Sgonzo 201215989Sgonzostatic int 202216947Sjmallettocteon_wdog_intr(void *arg) 203215989Sgonzo{ 204216947Sjmallett struct octeon_wdog_core_softc *csc = arg; 205215989Sgonzo 206216947Sjmallett KASSERT(csc->csc_core == cvmx_get_core_num(), 207216947Sjmallett ("got watchdog interrupt for core %u on core %u.", 208216947Sjmallett csc->csc_core, cvmx_get_core_num())); 209216947Sjmallett 210216947Sjmallett (void)csc; 211216947Sjmallett 212215989Sgonzo /* Poke it! */ 213215989Sgonzo cvmx_write_csr(CVMX_CIU_PP_POKEX(cvmx_get_core_num()), 1); 214215989Sgonzo 215215989Sgonzo return (FILTER_HANDLED); 216215989Sgonzo} 217215989Sgonzo 218215989Sgonzostatic int 219215989Sgonzoocteon_wdog_probe(device_t dev) 220215989Sgonzo{ 221215989Sgonzo 222215989Sgonzo device_set_desc(dev, "Cavium Octeon watchdog timer"); 223215989Sgonzo return (0); 224215989Sgonzo} 225215989Sgonzo 226215989Sgonzostatic int 227215989Sgonzoocteon_wdog_attach(device_t dev) 228215989Sgonzo{ 229215989Sgonzo struct octeon_wdog_softc *sc = device_get_softc(dev); 230215989Sgonzo uint64_t *nmi_handler = (uint64_t*)octeon_wdog_nmi_handler; 231216947Sjmallett int core, i; 232216947Sjmallett 233215989Sgonzo /* Initialise */ 234216947Sjmallett sc->sc_armed = 0; /* XXX Ought to be a tunable / config option. */ 235216947Sjmallett sc->sc_debug = 0; 236215989Sgonzo 237216947Sjmallett sc->sc_dev = dev; 238215989Sgonzo EVENTHANDLER_REGISTER(watchdog_list, octeon_wdog_watchdog_fn, sc, 0); 239215989Sgonzo octeon_wdog_sysctl(dev); 240215989Sgonzo 241215989Sgonzo for (i = 0; i < 16; i++) { 242215989Sgonzo cvmx_write_csr(CVMX_MIO_BOOT_LOC_ADR, i * 8); 243215989Sgonzo cvmx_write_csr(CVMX_MIO_BOOT_LOC_DAT, nmi_handler[i]); 244215989Sgonzo } 245215989Sgonzo 246215989Sgonzo cvmx_write_csr(CVMX_MIO_BOOT_LOC_CFGX(0), 0x81fc0000); 247215989Sgonzo 248216947Sjmallett CPU_FOREACH(core) 249216947Sjmallett octeon_wdog_setup(sc, core); 250215989Sgonzo return (0); 251215989Sgonzo} 252215989Sgonzo 253215989Sgonzostatic void 254215989Sgonzoocteon_wdog_identify(driver_t *drv, device_t parent) 255215989Sgonzo{ 256215989Sgonzo 257217243Sjmallett BUS_ADD_CHILD(parent, 0, "owdog", 0); 258215989Sgonzo} 259215989Sgonzo 260215989Sgonzostatic device_method_t octeon_wdog_methods[] = { 261215989Sgonzo DEVMETHOD(device_identify, octeon_wdog_identify), 262215989Sgonzo 263215989Sgonzo DEVMETHOD(device_probe, octeon_wdog_probe), 264215989Sgonzo DEVMETHOD(device_attach, octeon_wdog_attach), 265215989Sgonzo {0, 0}, 266215989Sgonzo}; 267215989Sgonzo 268215989Sgonzostatic driver_t octeon_wdog_driver = { 269217243Sjmallett "owdog", 270215989Sgonzo octeon_wdog_methods, 271215989Sgonzo sizeof(struct octeon_wdog_softc), 272215989Sgonzo}; 273215989Sgonzostatic devclass_t octeon_wdog_devclass; 274215989Sgonzo 275217243SjmallettDRIVER_MODULE(owdog, ciu, octeon_wdog_driver, octeon_wdog_devclass, 0, 0); 276