uart_cpu_ar71xx.c revision 191293 
1/*-
2 * Copyright (c) 2009 Oleksandr Tymoshenko
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 */
27#include "opt_uart.h"
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD$");
31
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/bus.h>
35
36#include <machine/bus.h>
37
38#include <dev/uart/uart.h>
39#include <dev/uart/uart_cpu.h>
40
41#include <mips/atheros/ar71xxreg.h>
42#include <mips/atheros/ar71xx_bus_space_reversed.h>
43
44bus_space_tag_t uart_bus_space_io;
45bus_space_tag_t uart_bus_space_mem;
46
47int
48uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
49{
50	return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
51}
52
53int
54uart_cpu_getdev(int devtype, struct uart_devinfo *di)
55{
56	di->ops = uart_getops(&uart_ns8250_class);
57	di->bas.chan = 0;
58	di->bas.bst = ar71xx_bus_space_reversed;
59	di->bas.regshft = 2;
60	/* TODO: calculate proper AHB freq using PLL registers */
61	di->bas.rclk = 85000000;
62	di->baudrate = 115200;
63	di->databits = 8;
64	di->stopbits = 1;
65	di->parity = UART_PARITY_NONE;
66
67	/* TODO: check if uart_bus_space_io mandatory to set */
68	uart_bus_space_io = NULL;
69	uart_bus_space_mem = ar71xx_bus_space_reversed;
70	/*
71	 * FIXME:
72	 * 3 is to compensate big endian, uart operates
73	 * with bus_space_read_1/bus_space_write_1 and hence gets
74	 * highest byte instead of lowest one. Actual fix will involve
75	 * MIPS bus_space fixing.
76	 */
77	di->bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR);
78	return (0);
79}
80