166633Sdfr.file "__udivdi3.s"
266633Sdfr
366633Sdfr// $FreeBSD$
4139815Simp
5139815Simp//-
666633Sdfr// Copyright (c) 2000, Intel Corporation
766633Sdfr// All rights reserved.
866633Sdfr//
966633Sdfr// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache,
1066633Sdfr// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab,
1166633Sdfr// Intel Corporation.
1266633Sdfr//
1366633Sdfr// WARRANTY DISCLAIMER
1466633Sdfr//
1566633Sdfr// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1666633Sdfr// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
1766633Sdfr// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
1866633Sdfr// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
1966633Sdfr// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
2066633Sdfr// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
2166633Sdfr// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
2266633Sdfr// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
2366633Sdfr// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
2466633Sdfr// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
2566633Sdfr// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2666633Sdfr//
2766633Sdfr// Intel Corporation is the author of this code, and requests that all
2866633Sdfr// problem reports or change requests be submitted to it directly at
2966633Sdfr// http://developer.intel.com/opensource.
3066633Sdfr//
3166633Sdfr
3266633Sdfr.section .text
3366633Sdfr.proc __udivdi3#
3466633Sdfr.align 32
3566633Sdfr.global __udivdi3#
3666633Sdfr.align 32
3766633Sdfr
3866633Sdfr// 64-bit unsigned integer divide
3966633Sdfr
4066633Sdfr__udivdi3:
4166633Sdfr
4266633Sdfr{ .mii
4366633Sdfr  alloc r31=ar.pfs,2,0,0,0
4466633Sdfr  nop.i 0
4566633Sdfr  nop.i 0;;
4666633Sdfr}
4766633Sdfr
4866633Sdfr{ .mmi
4966633Sdfr
5066633Sdfr  // 64-BIT UNSIGNED INTEGER DIVIDE BEGINS HERE
5166633Sdfr
5266633Sdfr  setf.sig f8=r32
5366633Sdfr  setf.sig f9=r33
5466633Sdfr  nop.i 0;;
5566633Sdfr} { .mfb
5666633Sdfr  nop.m 0
5766633Sdfr  fma.s1 f6=f8,f1,f0
5866633Sdfr  nop.b 0
5966633Sdfr} { .mfb
6066633Sdfr  nop.m 0
6166633Sdfr  fma.s1 f7=f9,f1,f0
6266633Sdfr  nop.b 0;;
6366633Sdfr} { .mfi
6466633Sdfr  nop.m 0
6566633Sdfr  // Step (1)
6666633Sdfr  // y0 = 1 / b in f8
6766633Sdfr  frcpa.s1 f8,p6=f6,f7
6866633Sdfr  nop.i 0;;
6966633Sdfr} { .mfi
7066633Sdfr  nop.m 0
7166633Sdfr  // Step (2)
7266633Sdfr  // e0 = 1 - b * y0 in f9
7366633Sdfr  (p6) fnma.s1 f9=f7,f8,f1
7466633Sdfr  nop.i 0
7566633Sdfr} { .mfi
7666633Sdfr  nop.m 0
7766633Sdfr  // Step (3)
7866633Sdfr  // q0 = a * y0 in f10
7966633Sdfr  (p6) fma.s1 f10=f6,f8,f0
8066633Sdfr  nop.i 0;;
8166633Sdfr} { .mfi
8266633Sdfr  nop.m 0
8366633Sdfr  // Step (4)
8466633Sdfr  // e1 = e0 * e0 in f11
8566633Sdfr  (p6) fma.s1 f11=f9,f9,f0
8666633Sdfr  nop.i 0
8766633Sdfr} { .mfi
8866633Sdfr  nop.m 0
8966633Sdfr  // Step (5)
9066633Sdfr  // q1 = q0 + e0 * q0 in f10
9166633Sdfr  (p6) fma.s1 f10=f9,f10,f10
9266633Sdfr  nop.i 0;;
9366633Sdfr} { .mfi
9466633Sdfr  nop.m 0
9566633Sdfr  // Step (6)
9666633Sdfr  // y1 = y0 + e0 * y0 in f8
9766633Sdfr  (p6) fma.s1 f8=f9,f8,f8
9866633Sdfr  nop.i 0;;
9966633Sdfr} { .mfi
10066633Sdfr  nop.m 0
10166633Sdfr  // Step (7)
10266633Sdfr  // q2 = q1 + e1 * q1 in f9
10366633Sdfr  (p6) fma.s1 f9=f11,f10,f10
10466633Sdfr  nop.i 0;;
10566633Sdfr} { .mfi
10666633Sdfr  nop.m 0
10766633Sdfr  // Step (8)
10866633Sdfr  // y2 = y1 + e1 * y1 in f8
10966633Sdfr  (p6) fma.s1 f8=f11,f8,f8
11066633Sdfr  nop.i 0;;
11166633Sdfr} { .mfi
11266633Sdfr  nop.m 0
11366633Sdfr  // Step (9)
11466633Sdfr  // r2 = a - b * q2 in f10
11566633Sdfr  (p6) fnma.s1 f10=f7,f9,f6
11666633Sdfr  nop.i 0;;
11766633Sdfr} { .mfi
11866633Sdfr  nop.m 0
11966633Sdfr  // Step (10)
12066633Sdfr  // q3 = q2 + r2 * y2 in f8
12166633Sdfr  (p6) fma.s1 f8=f10,f8,f9
12266633Sdfr  nop.i 0;;
12366633Sdfr} { .mfb
12466633Sdfr  nop.m 0
12566633Sdfr  // (11) q = trunc(q3)
12666633Sdfr  fcvt.fxu.trunc.s1 f8=f8
12766633Sdfr  nop.b 0;;
12866633Sdfr} { .mmi
12966633Sdfr  // quotient will be in r8 (if b != 0)
13066633Sdfr  getf.sig r8=f8
13166633Sdfr  nop.m 0
13266633Sdfr  nop.i 0;;
13366633Sdfr}
13466633Sdfr
13566633Sdfr  // 64-BIT UNSIGNED INTEGER DIVIDE ENDS HERE
13666633Sdfr
13766633Sdfr{ .mmb
13866633Sdfr  nop.m 0
13966633Sdfr  nop.m 0
14066633Sdfr  br.ret.sptk b0;;
14166633Sdfr}
14266633Sdfr
14366633Sdfr.endp __udivdi3
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