disasm.h revision 121404
1121404Smarcel/* 2121404Smarcel * Copyright (c) 2000-2003 Marcel Moolenaar 3121404Smarcel * All rights reserved. 4121404Smarcel * 5121404Smarcel * Redistribution and use in source and binary forms, with or without 6121404Smarcel * modification, are permitted provided that the following conditions 7121404Smarcel * are met: 8121404Smarcel * 9121404Smarcel * 1. Redistributions of source code must retain the above copyright 10121404Smarcel * notice, this list of conditions and the following disclaimer. 11121404Smarcel * 2. Redistributions in binary form must reproduce the above copyright 12121404Smarcel * notice, this list of conditions and the following disclaimer in the 13121404Smarcel * documentation and/or other materials provided with the distribution. 14121404Smarcel * 15121404Smarcel * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16121404Smarcel * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17121404Smarcel * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18121404Smarcel * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19121404Smarcel * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20121404Smarcel * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21121404Smarcel * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22121404Smarcel * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23121404Smarcel * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24121404Smarcel * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25121404Smarcel * 26121404Smarcel * $FreeBSD: head/sys/ia64/disasm/disasm.h 121404 2003-10-23 06:01:52Z marcel $ 27121404Smarcel */ 28121404Smarcel 29121404Smarcel#ifndef _DISASM_H_ 30121404Smarcel#define _DISASM_H_ 31121404Smarcel 32121404Smarcel#ifndef _DISASM_INT_H_ 33121404Smarcel#define ASM_ADDITIONAL_OPCODES ASM_OP_NUMBER_OF_OPCODES 34121404Smarcel#endif 35121404Smarcel 36121404Smarcel/* Application registers. */ 37121404Smarcel#define AR_K0 0 38121404Smarcel#define AR_K1 1 39121404Smarcel#define AR_K2 2 40121404Smarcel#define AR_K3 3 41121404Smarcel#define AR_K4 4 42121404Smarcel#define AR_K5 5 43121404Smarcel#define AR_K6 6 44121404Smarcel#define AR_K7 7 45121404Smarcel#define AR_RSC 16 46121404Smarcel#define AR_BSP 17 47121404Smarcel#define AR_BSPSTORE 18 48121404Smarcel#define AR_RNAT 19 49121404Smarcel#define AR_FCR 21 50121404Smarcel#define AR_EFLAG 24 51121404Smarcel#define AR_CSD 25 52121404Smarcel#define AR_SSD 26 53121404Smarcel#define AR_CFLG 27 54121404Smarcel#define AR_FSR 28 55121404Smarcel#define AR_FIR 29 56121404Smarcel#define AR_FDR 30 57121404Smarcel#define AR_CCV 32 58121404Smarcel#define AR_UNAT 36 59121404Smarcel#define AR_FPSR 40 60121404Smarcel#define AR_ITC 44 61121404Smarcel#define AR_PFS 64 62121404Smarcel#define AR_LC 65 63121404Smarcel#define AR_EC 66 64121404Smarcel 65121404Smarcel/* Control registers. */ 66121404Smarcel#define CR_DCR 0 67121404Smarcel#define CR_ITM 1 68121404Smarcel#define CR_IVA 2 69121404Smarcel#define CR_PTA 8 70121404Smarcel#define CR_IPSR 16 71121404Smarcel#define CR_ISR 17 72121404Smarcel#define CR_IIP 19 73121404Smarcel#define CR_IFA 20 74121404Smarcel#define CR_ITIR 21 75121404Smarcel#define CR_IIPA 22 76121404Smarcel#define CR_IFS 23 77121404Smarcel#define CR_IIM 24 78121404Smarcel#define CR_IHA 25 79121404Smarcel#define CR_LID 64 80121404Smarcel#define CR_IVR 65 81121404Smarcel#define CR_TPR 66 82121404Smarcel#define CR_EOI 67 83121404Smarcel#define CR_IRR0 68 84121404Smarcel#define CR_IRR1 69 85121404Smarcel#define CR_IRR2 70 86121404Smarcel#define CR_IRR3 71 87121404Smarcel#define CR_ITV 72 88121404Smarcel#define CR_PMV 73 89121404Smarcel#define CR_CMCV 74 90121404Smarcel#define CR_LRR0 80 91121404Smarcel#define CR_LRR1 81 92121404Smarcel 93121404Smarcelenum asm_cmpltr_class { 94121404Smarcel ASM_CC_NONE, 95121404Smarcel ASM_CC_ACLR, 96121404Smarcel ASM_CC_BSW, ASM_CC_BTYPE, ASM_CC_BWH, 97121404Smarcel ASM_CC_CHK, ASM_CC_CLRRRB, ASM_CC_CREL, ASM_CC_CTYPE, 98121404Smarcel ASM_CC_DEP, ASM_CC_DH, 99121404Smarcel ASM_CC_FC, ASM_CC_FCREL, ASM_CC_FCTYPE, ASM_CC_FCVT, ASM_CC_FLDTYPE, 100121404Smarcel ASM_CC_FMERGE, ASM_CC_FREL, ASM_CC_FSWAP, 101121404Smarcel ASM_CC_GETF, 102121404Smarcel ASM_CC_IH, ASM_CC_INVALA, ASM_CC_IPWH, ASM_CC_ITC, ASM_CC_ITR, 103121404Smarcel ASM_CC_LDHINT, ASM_CC_LDTYPE, ASM_CC_LFETCH, ASM_CC_LFHINT, 104121404Smarcel ASM_CC_LFTYPE, ASM_CC_LR, 105121404Smarcel ASM_CC_MF, ASM_CC_MOV, ASM_CC_MWH, 106121404Smarcel ASM_CC_PAVG, ASM_CC_PC, ASM_CC_PH, ASM_CC_PREL, ASM_CC_PRTYPE, 107121404Smarcel ASM_CC_PTC, ASM_CC_PTR, ASM_CC_PVEC, 108121404Smarcel ASM_CC_SAT, ASM_CC_SEM, ASM_CC_SETF, ASM_CC_SF, ASM_CC_SRLZ, 109121404Smarcel ASM_CC_STHINT, ASM_CC_STTYPE, ASM_CC_SYNC, 110121404Smarcel ASM_CC_RW, 111121404Smarcel ASM_CC_TREL, ASM_CC_TRUNC, 112121404Smarcel ASM_CC_UNIT, ASM_CC_UNPACK, ASM_CC_UNS, 113121404Smarcel ASM_CC_XMA 114121404Smarcel}; 115121404Smarcel 116121404Smarcelenum asm_cmpltr_type { 117121404Smarcel ASM_CT_NONE, 118121404Smarcel ASM_CT_COND = ASM_CT_NONE, 119121404Smarcel 120121404Smarcel ASM_CT_0, ASM_CT_1, 121121404Smarcel ASM_CT_A, ASM_CT_ACQ, ASM_CT_AND, 122121404Smarcel ASM_CT_B, ASM_CT_BIAS, 123121404Smarcel ASM_CT_C_CLR, ASM_CT_C_CLR_ACQ, ASM_CT_C_NC, ASM_CT_CALL, 124121404Smarcel ASM_CT_CEXIT, ASM_CT_CLOOP, ASM_CT_CLR, ASM_CT_CTOP, 125121404Smarcel ASM_CT_D, ASM_CT_DC_DC, ASM_CT_DC_NT, ASM_CT_DPNT, ASM_CT_DPTK, 126121404Smarcel ASM_CT_E, ASM_CT_EQ, ASM_CT_EXCL, ASM_CT_EXIT, ASM_CT_EXP, 127121404Smarcel ASM_CT_F, ASM_CT_FAULT, ASM_CT_FEW, ASM_CT_FILL, ASM_CT_FX, ASM_CT_FXU, 128121404Smarcel ASM_CT_G, ASM_CT_GA, ASM_CT_GE, ASM_CT_GT, 129121404Smarcel ASM_CT_H, ASM_CT_HU, 130121404Smarcel ASM_CT_I, ASM_CT_IA, ASM_CT_IMP, 131121404Smarcel ASM_CT_L, ASM_CT_LE, ASM_CT_LOOP, ASM_CT_LR, ASM_CT_LT, ASM_CT_LTU, 132121404Smarcel ASM_CT_M, ASM_CT_MANY, 133121404Smarcel ASM_CT_NC, ASM_CT_NE, ASM_CT_NEQ, ASM_CT_NL, ASM_CT_NLE, ASM_CT_NLT, 134121404Smarcel ASM_CT_NM, ASM_CT_NR, ASM_CT_NS, ASM_CT_NT_DC, ASM_CT_NT_NT, 135121404Smarcel ASM_CT_NT_TK, ASM_CT_NT1, ASM_CT_NT2, ASM_CT_NTA, ASM_CT_NZ, 136121404Smarcel ASM_CT_OR, ASM_CT_OR_ANDCM, ASM_CT_ORD, 137121404Smarcel ASM_CT_PR, 138121404Smarcel ASM_CT_R, ASM_CT_RAZ, ASM_CT_REL, ASM_CT_RET, ASM_CT_RW, 139121404Smarcel ASM_CT_S, ASM_CT_S0, ASM_CT_S1, ASM_CT_S2, ASM_CT_S3, ASM_CT_SA, 140121404Smarcel ASM_CT_SE, ASM_CT_SIG, ASM_CT_SPILL, ASM_CT_SPNT, ASM_CT_SPTK, 141121404Smarcel ASM_CT_SSS, 142121404Smarcel ASM_CT_TK_DC, ASM_CT_TK_NT, ASM_CT_TK_TK, ASM_CT_TRUNC, 143121404Smarcel ASM_CT_U, ASM_CT_UNC, ASM_CT_UNORD, ASM_CT_USS, ASM_CT_UUS, ASM_CT_UUU, 144121404Smarcel ASM_CT_W, ASM_CT_WEXIT, ASM_CT_WTOP, 145121404Smarcel ASM_CT_X, ASM_CT_XF, 146121404Smarcel ASM_CT_Z, 147121404Smarcel}; 148121404Smarcel 149121404Smarcel/* Completer. */ 150121404Smarcelstruct asm_cmpltr { 151121404Smarcel enum asm_cmpltr_class c_class; 152121404Smarcel enum asm_cmpltr_type c_type; 153121404Smarcel}; 154121404Smarcel 155121404Smarcel/* Operand types. */ 156121404Smarcelenum asm_oper_type { 157121404Smarcel ASM_OPER_NONE, 158121404Smarcel ASM_OPER_AREG, /* = ar# */ 159121404Smarcel ASM_OPER_BREG, /* = b# */ 160121404Smarcel ASM_OPER_CPUID, /* = cpuid[r#] */ 161121404Smarcel ASM_OPER_CREG, /* = cr# */ 162121404Smarcel ASM_OPER_DBR, /* = dbr[r#] */ 163121404Smarcel ASM_OPER_DISP, /* IP relative displacement. */ 164121404Smarcel ASM_OPER_DTR, /* = dtr[r#] */ 165121404Smarcel ASM_OPER_FREG, /* = f# */ 166121404Smarcel ASM_OPER_GREG, /* = r# */ 167121404Smarcel ASM_OPER_IBR, /* = ibr[r#] */ 168121404Smarcel ASM_OPER_IMM, /* Immediate */ 169121404Smarcel ASM_OPER_IP, /* = ip */ 170121404Smarcel ASM_OPER_ITR, /* = itr[r#] */ 171121404Smarcel ASM_OPER_MEM, /* = [r#] */ 172121404Smarcel ASM_OPER_MSR, /* = msr[r#] */ 173121404Smarcel ASM_OPER_PKR, /* = pkr[r#] */ 174121404Smarcel ASM_OPER_PMC, /* = pmc[r#] */ 175121404Smarcel ASM_OPER_PMD, /* = pmd[r#] */ 176121404Smarcel ASM_OPER_PR, /* = pr */ 177121404Smarcel ASM_OPER_PR_ROT, /* = pr.rot */ 178121404Smarcel ASM_OPER_PREG, /* = p# */ 179121404Smarcel ASM_OPER_PSR, /* = psr */ 180121404Smarcel ASM_OPER_PSR_L, /* = psr.l */ 181121404Smarcel ASM_OPER_PSR_UM, /* = psr.um */ 182121404Smarcel ASM_OPER_RR /* = rr[r#] */ 183121404Smarcel}; 184121404Smarcel 185121404Smarcel/* Operand */ 186121404Smarcelstruct asm_oper { 187121404Smarcel enum asm_oper_type o_type; 188121404Smarcel int o_read:1; 189121404Smarcel int o_write:1; 190121404Smarcel uint64_t o_value; 191121404Smarcel}; 192121404Smarcel 193121404Smarcel/* Instruction formats. */ 194121404Smarcelenum asm_fmt { 195121404Smarcel ASM_FMT_NONE, 196121404Smarcel ASM_FMT_A = 0x0100, 197121404Smarcel ASM_FMT_A1, ASM_FMT_A2, ASM_FMT_A3, ASM_FMT_A4, 198121404Smarcel ASM_FMT_A5, ASM_FMT_A6, ASM_FMT_A7, ASM_FMT_A8, 199121404Smarcel ASM_FMT_A9, ASM_FMT_A10, 200121404Smarcel ASM_FMT_B = 0x0200, 201121404Smarcel ASM_FMT_B1, ASM_FMT_B2, ASM_FMT_B3, ASM_FMT_B4, 202121404Smarcel ASM_FMT_B5, ASM_FMT_B6, ASM_FMT_B7, ASM_FMT_B8, 203121404Smarcel ASM_FMT_B9, 204121404Smarcel ASM_FMT_F = 0x0300, 205121404Smarcel ASM_FMT_F1, ASM_FMT_F2, ASM_FMT_F3, ASM_FMT_F4, 206121404Smarcel ASM_FMT_F5, ASM_FMT_F6, ASM_FMT_F7, ASM_FMT_F8, 207121404Smarcel ASM_FMT_F9, ASM_FMT_F10, ASM_FMT_F11, ASM_FMT_F12, 208121404Smarcel ASM_FMT_F13, ASM_FMT_F14, ASM_FMT_F15, 209121404Smarcel ASM_FMT_I = 0x0400, 210121404Smarcel ASM_FMT_I1, ASM_FMT_I2, ASM_FMT_I3, ASM_FMT_I4, 211121404Smarcel ASM_FMT_I5, ASM_FMT_I6, ASM_FMT_I7, ASM_FMT_I8, 212121404Smarcel ASM_FMT_I9, ASM_FMT_I10, ASM_FMT_I11, ASM_FMT_I12, 213121404Smarcel ASM_FMT_I13, ASM_FMT_I14, ASM_FMT_I15, ASM_FMT_I16, 214121404Smarcel ASM_FMT_I17, ASM_FMT_I19, ASM_FMT_I20, ASM_FMT_I21, 215121404Smarcel ASM_FMT_I22, ASM_FMT_I23, ASM_FMT_I24, ASM_FMT_I25, 216121404Smarcel ASM_FMT_I26, ASM_FMT_I27, ASM_FMT_I28, ASM_FMT_I29, 217121404Smarcel ASM_FMT_M = 0x0500, 218121404Smarcel ASM_FMT_M1, ASM_FMT_M2, ASM_FMT_M3, ASM_FMT_M4, 219121404Smarcel ASM_FMT_M5, ASM_FMT_M6, ASM_FMT_M7, ASM_FMT_M8, 220121404Smarcel ASM_FMT_M9, ASM_FMT_M10, ASM_FMT_M11, ASM_FMT_M12, 221121404Smarcel ASM_FMT_M13, ASM_FMT_M14, ASM_FMT_M15, ASM_FMT_M16, 222121404Smarcel ASM_FMT_M17, ASM_FMT_M18, ASM_FMT_M19, ASM_FMT_M20, 223121404Smarcel ASM_FMT_M21, ASM_FMT_M22, ASM_FMT_M23, ASM_FMT_M24, 224121404Smarcel ASM_FMT_M25, ASM_FMT_M26, ASM_FMT_M27, ASM_FMT_M28, 225121404Smarcel ASM_FMT_M29, ASM_FMT_M30, ASM_FMT_M31, ASM_FMT_M32, 226121404Smarcel ASM_FMT_M33, ASM_FMT_M34, ASM_FMT_M35, ASM_FMT_M36, 227121404Smarcel ASM_FMT_M37, ASM_FMT_M38, ASM_FMT_M39, ASM_FMT_M40, 228121404Smarcel ASM_FMT_M41, ASM_FMT_M42, ASM_FMT_M43, ASM_FMT_M44, 229121404Smarcel ASM_FMT_M45, ASM_FMT_M46, 230121404Smarcel ASM_FMT_X = 0x0600, 231121404Smarcel ASM_FMT_X1, ASM_FMT_X2, ASM_FMT_X3, ASM_FMT_X4 232121404Smarcel}; 233121404Smarcel 234121404Smarcel/* Instruction opcodes. */ 235121404Smarcelenum asm_op { 236121404Smarcel ASM_OP_NONE, 237121404Smarcel ASM_OP_ADD, ASM_OP_ADDL, ASM_OP_ADDP4, ASM_OP_ADDS, ASM_OP_ALLOC, 238121404Smarcel ASM_OP_AND, ASM_OP_ANDCM, 239121404Smarcel ASM_OP_BR, ASM_OP_BREAK, ASM_OP_BRL, ASM_OP_BRP, ASM_OP_BSW, 240121404Smarcel ASM_OP_CHK, ASM_OP_CLRRRB, ASM_OP_CMP, ASM_OP_CMP4, ASM_OP_CMP8XCHG16, 241121404Smarcel ASM_OP_CMPXCHG1, ASM_OP_CMPXCHG2, ASM_OP_CMPXCHG4, ASM_OP_CMPXCHG8, 242121404Smarcel ASM_OP_COVER, ASM_OP_CZX1, ASM_OP_CZX2, 243121404Smarcel ASM_OP_DEP, 244121404Smarcel ASM_OP_EPC, ASM_OP_EXTR, 245121404Smarcel ASM_OP_FAMAX, ASM_OP_FAMIN, ASM_OP_FAND, ASM_OP_FANDCM, ASM_OP_FC, 246121404Smarcel ASM_OP_FCHKF, ASM_OP_FCLASS, ASM_OP_FCLRF, ASM_OP_FCMP, ASM_OP_FCVT, 247121404Smarcel ASM_OP_FETCHADD4, ASM_OP_FETCHADD8, ASM_OP_FLUSHRS, ASM_OP_FMA, 248121404Smarcel ASM_OP_FMAX, ASM_OP_FMERGE, ASM_OP_FMIN, ASM_OP_FMIX, ASM_OP_FMS, 249121404Smarcel ASM_OP_FNMA, ASM_OP_FOR, ASM_OP_FPACK, ASM_OP_FPAMAX, ASM_OP_FPAMIN, 250121404Smarcel ASM_OP_FPCMP, ASM_OP_FPCVT, ASM_OP_FPMA, ASM_OP_FPMAX, ASM_OP_FPMERGE, 251121404Smarcel ASM_OP_FPMIN, ASM_OP_FPMS, ASM_OP_FPNMA, ASM_OP_FPRCPA, 252121404Smarcel ASM_OP_FPRSQRTA, ASM_OP_FRCPA, ASM_OP_FRSQRTA, ASM_OP_FSELECT, 253121404Smarcel ASM_OP_FSETC, ASM_OP_FSWAP, ASM_OP_FSXT, ASM_OP_FWB, ASM_OP_FXOR, 254121404Smarcel ASM_OP_GETF, 255121404Smarcel ASM_OP_INVALA, ASM_OP_ITC, ASM_OP_ITR, 256121404Smarcel ASM_OP_LD1, ASM_OP_LD16, ASM_OP_LD2, ASM_OP_LD4, ASM_OP_LD8, 257121404Smarcel ASM_OP_LDF, ASM_OP_LDF8, ASM_OP_LDFD, ASM_OP_LDFE, ASM_OP_LDFP8, 258121404Smarcel ASM_OP_LDFPD, ASM_OP_LDFPS, ASM_OP_LDFS, ASM_OP_LFETCH, ASM_OP_LOADRS, 259121404Smarcel ASM_OP_MF, ASM_OP_MIX1, ASM_OP_MIX2, ASM_OP_MIX4, ASM_OP_MOV, 260121404Smarcel ASM_OP_MOVL, ASM_OP_MUX1, ASM_OP_MUX2, 261121404Smarcel ASM_OP_NOP, 262121404Smarcel ASM_OP_OR, 263121404Smarcel ASM_OP_PACK2, ASM_OP_PACK4, ASM_OP_PADD1, ASM_OP_PADD2, ASM_OP_PADD4, 264121404Smarcel ASM_OP_PAVG1, ASM_OP_PAVG2, ASM_OP_PAVGSUB1, ASM_OP_PAVGSUB2, 265121404Smarcel ASM_OP_PCMP1, ASM_OP_PCMP2, ASM_OP_PCMP4, ASM_OP_PMAX1, ASM_OP_PMAX2, 266121404Smarcel ASM_OP_PMIN1, ASM_OP_PMIN2, ASM_OP_PMPY2, ASM_OP_PMPYSHR2, 267121404Smarcel ASM_OP_POPCNT, ASM_OP_PROBE, ASM_OP_PSAD1, ASM_OP_PSHL2, ASM_OP_PSHL4, 268121404Smarcel ASM_OP_PSHLADD2, ASM_OP_PSHR2, ASM_OP_PSHR4, ASM_OP_PSHRADD2, 269121404Smarcel ASM_OP_PSUB1, ASM_OP_PSUB2, ASM_OP_PSUB4, ASM_OP_PTC, ASM_OP_PTR, 270121404Smarcel ASM_OP_RFI, ASM_OP_RSM, ASM_OP_RUM, 271121404Smarcel ASM_OP_SETF, ASM_OP_SHL, ASM_OP_SHLADD, ASM_OP_SHLADDP4, ASM_OP_SHR, 272121404Smarcel ASM_OP_SHRP, ASM_OP_SRLZ, ASM_OP_SSM, ASM_OP_ST1, ASM_OP_ST16, 273121404Smarcel ASM_OP_ST2, ASM_OP_ST4, ASM_OP_ST8, ASM_OP_STF, ASM_OP_STF8, 274121404Smarcel ASM_OP_STFD, ASM_OP_STFE, ASM_OP_STFS, ASM_OP_SUB, ASM_OP_SUM, 275121404Smarcel ASM_OP_SXT1, ASM_OP_SXT2, ASM_OP_SXT4, ASM_OP_SYNC, 276121404Smarcel ASM_OP_TAK, ASM_OP_TBIT, ASM_OP_THASH, ASM_OP_TNAT, ASM_OP_TPA, 277121404Smarcel ASM_OP_TTAG, 278121404Smarcel ASM_OP_UNPACK1, ASM_OP_UNPACK2, ASM_OP_UNPACK4, 279121404Smarcel ASM_OP_XCHG1, ASM_OP_XCHG2, ASM_OP_XCHG4, ASM_OP_XCHG8, ASM_OP_XMA, 280121404Smarcel ASM_OP_XOR, 281121404Smarcel ASM_OP_ZXT1, ASM_OP_ZXT2, ASM_OP_ZXT4, 282121404Smarcel /* Additional opcodes used only internally. */ 283121404Smarcel ASM_ADDITIONAL_OPCODES 284121404Smarcel}; 285121404Smarcel 286121404Smarcel/* Instruction. */ 287121404Smarcelstruct asm_inst { 288121404Smarcel uint64_t i_bits; 289121404Smarcel struct asm_oper i_oper[7]; 290121404Smarcel struct asm_cmpltr i_cmpltr[5]; 291121404Smarcel enum asm_fmt i_format; 292121404Smarcel enum asm_op i_op; 293121404Smarcel int i_ncmpltrs; 294121404Smarcel int i_srcidx; 295121404Smarcel}; 296121404Smarcel 297121404Smarcelstruct asm_bundle { 298121404Smarcel const char *b_templ; 299121404Smarcel struct asm_inst b_inst[3]; 300121404Smarcel}; 301121404Smarcel 302121404Smarcel/* Functional units. */ 303121404Smarcelenum asm_unit { 304121404Smarcel ASM_UNIT_NONE, 305121404Smarcel ASM_UNIT_A = 0x0100, /* A unit. */ 306121404Smarcel ASM_UNIT_B = 0x0200, /* B unit. */ 307121404Smarcel ASM_UNIT_F = 0x0300, /* F unit. */ 308121404Smarcel ASM_UNIT_I = 0x0400, /* I unit. */ 309121404Smarcel ASM_UNIT_M = 0x0500, /* M unit. */ 310121404Smarcel ASM_UNIT_X = 0x0600 /* X unit. */ 311121404Smarcel}; 312121404Smarcel 313121404Smarcel#ifdef _DISASM_INT_H_ 314121404Smarcelint asm_extract(enum asm_op, enum asm_fmt, uint64_t, struct asm_bundle *, int); 315121404Smarcel#endif 316121404Smarcel 317121404Smarcelint asm_decode(uint64_t, struct asm_bundle *); 318121404Smarcel 319121404Smarcelvoid asm_completer(const struct asm_cmpltr *, char *); 320121404Smarcelvoid asm_mnemonic(const enum asm_op, char *); 321121404Smarcelvoid asm_operand(const struct asm_oper *, char *, uint64_t); 322121404Smarcelvoid asm_print_bundle(const struct asm_bundle *, uint64_t); 323121404Smarcelvoid asm_print_inst(const struct asm_bundle *, int, uint64_t); 324121404Smarcel 325121404Smarcel#endif /* _DISASM_H_ */ 326