pmap.c revision 215844
1135446Strhodes/*- 2193149Sdougb * Copyright (c) 1991 Regents of the University of California. 3135446Strhodes * All rights reserved. 4135446Strhodes * Copyright (c) 1994 John S. Dyson 5193149Sdougb * All rights reserved. 6135446Strhodes * Copyright (c) 1994 David Greenman 7135446Strhodes * All rights reserved. 8135446Strhodes * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu> 9135446Strhodes * All rights reserved. 10135446Strhodes * 11135446Strhodes * This code is derived from software contributed to Berkeley by 12135446Strhodes * the Systems Programming Group of the University of Utah Computer 13135446Strhodes * Science Department and William Jolitz of UUNET Technologies Inc. 14135446Strhodes * 15135446Strhodes * Redistribution and use in source and binary forms, with or without 16135446Strhodes * modification, are permitted provided that the following conditions 17135446Strhodes * are met: 18193149Sdougb * 1. Redistributions of source code must retain the above copyright 19135446Strhodes * notice, this list of conditions and the following disclaimer. 20170222Sdougb * 2. Redistributions in binary form must reproduce the above copyright 21170222Sdougb * notice, this list of conditions and the following disclaimer in the 22135446Strhodes * documentation and/or other materials provided with the distribution. 23135446Strhodes * 3. All advertising materials mentioning features or use of this software 24135446Strhodes * must display the following acknowledgement: 25135446Strhodes * This product includes software developed by the University of 26135446Strhodes * California, Berkeley and its contributors. 27135446Strhodes * 4. Neither the name of the University nor the names of its contributors 28135446Strhodes * may be used to endorse or promote products derived from this software 29135446Strhodes * without specific prior written permission. 30135446Strhodes * 31135446Strhodes * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32135446Strhodes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33135446Strhodes * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34135446Strhodes * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35135446Strhodes * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36135446Strhodes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37135446Strhodes * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38135446Strhodes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39135446Strhodes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40135446Strhodes * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41135446Strhodes * SUCH DAMAGE. 42135446Strhodes * 43135446Strhodes * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 44135446Strhodes */ 45135446Strhodes/*- 46135446Strhodes * Copyright (c) 2003 Networks Associates Technology, Inc. 47135446Strhodes * All rights reserved. 48135446Strhodes * 49135446Strhodes * This software was developed for the FreeBSD Project by Jake Burkholder, 50135446Strhodes * Safeport Network Services, and Network Associates Laboratories, the 51135446Strhodes * Security Research Division of Network Associates, Inc. under 52135446Strhodes * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 53135446Strhodes * CHATS research program. 54135446Strhodes * 55135446Strhodes * Redistribution and use in source and binary forms, with or without 56135446Strhodes * modification, are permitted provided that the following conditions 57135446Strhodes * are met: 58135446Strhodes * 1. Redistributions of source code must retain the above copyright 59135446Strhodes * notice, this list of conditions and the following disclaimer. 60135446Strhodes * 2. Redistributions in binary form must reproduce the above copyright 61135446Strhodes * notice, this list of conditions and the following disclaimer in the 62193149Sdougb * documentation and/or other materials provided with the distribution. 63135446Strhodes * 64135446Strhodes * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 65135446Strhodes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 66135446Strhodes * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 67135446Strhodes * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 68135446Strhodes * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 69135446Strhodes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 70135446Strhodes * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 71135446Strhodes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 72135446Strhodes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 73135446Strhodes * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 74135446Strhodes * SUCH DAMAGE. 75135446Strhodes */ 76135446Strhodes 77135446Strhodes#include <sys/cdefs.h> 78135446Strhodes__FBSDID("$FreeBSD: head/sys/i386/xen/pmap.c 215844 2010-11-25 22:06:07Z cperciva $"); 79135446Strhodes 80135446Strhodes/* 81135446Strhodes * Manages physical address maps. 82135446Strhodes * 83135446Strhodes * In addition to hardware address maps, this 84135446Strhodes * module is called upon to provide software-use-only 85135446Strhodes * maps which may or may not be stored in the same 86135446Strhodes * form as hardware maps. These pseudo-maps are 87135446Strhodes * used to store intermediate results from copy 88135446Strhodes * operations to and from address spaces. 89135446Strhodes * 90135446Strhodes * Since the information managed by this module is 91135446Strhodes * also stored by the logical address mapping module, 92135446Strhodes * this module may throw away valid virtual-to-physical 93135446Strhodes * mappings at almost any time. However, invalidations 94135446Strhodes * of virtual-to-physical mappings must be done as 95135446Strhodes * requested. 96135446Strhodes * 97135446Strhodes * In order to cope with hardware architectures which 98135446Strhodes * make virtual-to-physical map invalidates expensive, 99135446Strhodes * this module may delay invalidate or reduced protection 100135446Strhodes * operations until such time as they are actually 101135446Strhodes * necessary. This module is given full information as 102135446Strhodes * to which processors are currently using which maps, 103135446Strhodes * and to when physical maps must be made correct. 104135446Strhodes */ 105135446Strhodes 106135446Strhodes#include "opt_cpu.h" 107135446Strhodes#include "opt_pmap.h" 108135446Strhodes#include "opt_msgbuf.h" 109135446Strhodes#include "opt_smp.h" 110135446Strhodes#include "opt_xbox.h" 111135446Strhodes 112135446Strhodes#include <sys/param.h> 113135446Strhodes#include <sys/systm.h> 114135446Strhodes#include <sys/kernel.h> 115135446Strhodes#include <sys/ktr.h> 116135446Strhodes#include <sys/lock.h> 117135446Strhodes#include <sys/malloc.h> 118135446Strhodes#include <sys/mman.h> 119135446Strhodes#include <sys/msgbuf.h> 120135446Strhodes#include <sys/mutex.h> 121135446Strhodes#include <sys/proc.h> 122135446Strhodes#include <sys/sf_buf.h> 123135446Strhodes#include <sys/sx.h> 124135446Strhodes#include <sys/vmmeter.h> 125135446Strhodes#include <sys/sched.h> 126135446Strhodes#include <sys/sysctl.h> 127135446Strhodes#ifdef SMP 128135446Strhodes#include <sys/smp.h> 129135446Strhodes#endif 130135446Strhodes 131135446Strhodes#include <vm/vm.h> 132135446Strhodes#include <vm/vm_param.h> 133135446Strhodes#include <vm/vm_kern.h> 134135446Strhodes#include <vm/vm_page.h> 135135446Strhodes#include <vm/vm_map.h> 136135446Strhodes#include <vm/vm_object.h> 137135446Strhodes#include <vm/vm_extern.h> 138135446Strhodes#include <vm/vm_pageout.h> 139135446Strhodes#include <vm/vm_pager.h> 140135446Strhodes#include <vm/uma.h> 141193149Sdougb 142135446Strhodes#include <machine/cpu.h> 143135446Strhodes#include <machine/cputypes.h> 144135446Strhodes#include <machine/md_var.h> 145135446Strhodes#include <machine/pcb.h> 146135446Strhodes#include <machine/specialreg.h> 147135446Strhodes#ifdef SMP 148135446Strhodes#include <machine/smp.h> 149135446Strhodes#endif 150135446Strhodes 151135446Strhodes#ifdef XBOX 152193149Sdougb#include <machine/xbox.h> 153135446Strhodes#endif 154135446Strhodes 155135446Strhodes#include <xen/interface/xen.h> 156135446Strhodes#include <xen/hypervisor.h> 157135446Strhodes#include <machine/xen/hypercall.h> 158135446Strhodes#include <machine/xen/xenvar.h> 159135446Strhodes#include <machine/xen/xenfunc.h> 160135446Strhodes 161135446Strhodes#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 162135446Strhodes#define CPU_ENABLE_SSE 163135446Strhodes#endif 164135446Strhodes 165135446Strhodes#ifndef PMAP_SHPGPERPROC 166135446Strhodes#define PMAP_SHPGPERPROC 200 167135446Strhodes#endif 168135446Strhodes 169135446Strhodes#define DIAGNOSTIC 170135446Strhodes 171135446Strhodes#if !defined(DIAGNOSTIC) 172135446Strhodes#ifdef __GNUC_GNU_INLINE__ 173135446Strhodes#define PMAP_INLINE __attribute__((__gnu_inline__)) inline 174135446Strhodes#else 175135446Strhodes#define PMAP_INLINE extern inline 176135446Strhodes#endif 177135446Strhodes#else 178135446Strhodes#define PMAP_INLINE 179135446Strhodes#endif 180170222Sdougb 181170222Sdougb#define PV_STATS 182170222Sdougb#ifdef PV_STATS 183193149Sdougb#define PV_STAT(x) do { x ; } while (0) 184193149Sdougb#else 185135446Strhodes#define PV_STAT(x) do { } while (0) 186135446Strhodes#endif 187135446Strhodes 188135446Strhodes#define pa_index(pa) ((pa) >> PDRSHIFT) 189135446Strhodes#define pa_to_pvh(pa) (&pv_table[pa_index(pa)]) 190135446Strhodes 191135446Strhodes/* 192135446Strhodes * Get PDEs and PTEs for user/kernel address space 193135446Strhodes */ 194135446Strhodes#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 195135446Strhodes#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 196135446Strhodes 197135446Strhodes#define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 198135446Strhodes#define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 199135446Strhodes#define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 200135446Strhodes#define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 201135446Strhodes#define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 202135446Strhodes 203135446Strhodes#define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 204135446Strhodes 205135446Strhodesstruct pmap kernel_pmap_store; 206135446StrhodesLIST_HEAD(pmaplist, pmap); 207135446Strhodesstatic struct pmaplist allpmaps; 208135446Strhodesstatic struct mtx allpmaps_lock; 209135446Strhodes 210135446Strhodesvm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 211135446Strhodesvm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 212135446Strhodesint pgeflag = 0; /* PG_G or-in */ 213135446Strhodesint pseflag = 0; /* PG_PS or-in */ 214135446Strhodes 215135446Strhodesint nkpt; 216135446Strhodesvm_offset_t kernel_vm_end; 217135446Strhodesextern u_int32_t KERNend; 218135446Strhodes 219135446Strhodes#ifdef PAE 220135446Strhodespt_entry_t pg_nx; 221135446Strhodes#endif 222135446Strhodes 223135446Strhodesstatic int pat_works; /* Is page attribute table sane? */ 224135446Strhodes 225135446Strhodes/* 226135446Strhodes * Data for the pv entry allocation mechanism 227135446Strhodes */ 228135446Strhodesstatic int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 229135446Strhodesstatic struct md_page *pv_table; 230135446Strhodesstatic int shpgperproc = PMAP_SHPGPERPROC; 231135446Strhodes 232135446Strhodesstruct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */ 233135446Strhodesint pv_maxchunks; /* How many chunks we have KVA for */ 234135446Strhodesvm_offset_t pv_vafree; /* freelist stored in the PTE */ 235135446Strhodes 236135446Strhodes/* 237135446Strhodes * All those kernel PT submaps that BSD is so fond of 238135446Strhodes */ 239135446Strhodesstruct sysmaps { 240135446Strhodes struct mtx lock; 241135446Strhodes pt_entry_t *CMAP1; 242135446Strhodes pt_entry_t *CMAP2; 243135446Strhodes caddr_t CADDR1; 244135446Strhodes caddr_t CADDR2; 245135446Strhodes}; 246135446Strhodesstatic struct sysmaps sysmaps_pcpu[MAXCPU]; 247135446Strhodesstatic pt_entry_t *CMAP3; 248135446Strhodescaddr_t ptvmmap = 0; 249135446Strhodesstatic caddr_t CADDR3; 250135446Strhodesstruct msgbuf *msgbufp = 0; 251135446Strhodes 252135446Strhodes/* 253135446Strhodes * Crashdump maps. 254135446Strhodes */ 255135446Strhodesstatic caddr_t crashdumpmap; 256135446Strhodes 257135446Strhodesstatic pt_entry_t *PMAP1 = 0, *PMAP2; 258135446Strhodesstatic pt_entry_t *PADDR1 = 0, *PADDR2; 259135446Strhodes#ifdef SMP 260135446Strhodesstatic int PMAP1cpu; 261135446Strhodesstatic int PMAP1changedcpu; 262135446StrhodesSYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD, 263135446Strhodes &PMAP1changedcpu, 0, 264135446Strhodes "Number of times pmap_pte_quick changed CPU with same PMAP1"); 265135446Strhodes#endif 266135446Strhodesstatic int PMAP1changed; 267135446StrhodesSYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD, 268135446Strhodes &PMAP1changed, 0, 269135446Strhodes "Number of times pmap_pte_quick changed PMAP1"); 270135446Strhodesstatic int PMAP1unchanged; 271135446StrhodesSYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD, 272135446Strhodes &PMAP1unchanged, 0, 273135446Strhodes "Number of times pmap_pte_quick didn't change PMAP1"); 274135446Strhodesstatic struct mtx PMAP2mutex; 275135446Strhodes 276135446StrhodesSYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters"); 277135446Strhodesstatic int pg_ps_enabled; 278135446StrhodesSYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RDTUN, &pg_ps_enabled, 0, 279135446Strhodes "Are large page mappings enabled?"); 280135446Strhodes 281135446StrhodesSYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0, 282135446Strhodes "Max number of PV entries"); 283135446StrhodesSYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0, 284135446Strhodes "Page share factor per proc"); 285135446StrhodesSYSCTL_NODE(_vm_pmap, OID_AUTO, pde, CTLFLAG_RD, 0, 286135446Strhodes "2/4MB page mapping counters"); 287135446Strhodes 288135446Strhodesstatic u_long pmap_pde_mappings; 289135446StrhodesSYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, mappings, CTLFLAG_RD, 290135446Strhodes &pmap_pde_mappings, 0, "2/4MB page mappings"); 291165071Sdougb 292135446Strhodesstatic void free_pv_entry(pmap_t pmap, pv_entry_t pv); 293165071Sdougbstatic pv_entry_t get_pv_entry(pmap_t locked_pmap, int try); 294135446Strhodesstatic void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va); 295135446Strhodesstatic pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, 296135446Strhodes vm_offset_t va); 297135446Strhodes 298135446Strhodesstatic vm_page_t pmap_enter_quick_locked(multicall_entry_t **mcl, int *count, pmap_t pmap, vm_offset_t va, 299135446Strhodes vm_page_t m, vm_prot_t prot, vm_page_t mpte); 300135446Strhodesstatic int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva, 301135446Strhodes vm_page_t *free); 302135446Strhodesstatic void pmap_remove_page(struct pmap *pmap, vm_offset_t va, 303135446Strhodes vm_page_t *free); 304135446Strhodesstatic void pmap_remove_entry(struct pmap *pmap, vm_page_t m, 305135446Strhodes vm_offset_t va); 306135446Strhodesstatic boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, 307135446Strhodes vm_page_t m); 308135446Strhodes 309135446Strhodesstatic vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags); 310135446Strhodes 311135446Strhodesstatic vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags); 312135446Strhodesstatic int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free); 313135446Strhodesstatic pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va); 314135446Strhodesstatic void pmap_pte_release(pt_entry_t *pte); 315135446Strhodesstatic int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *); 316135446Strhodesstatic vm_offset_t pmap_kmem_choose(vm_offset_t addr); 317135446Strhodesstatic boolean_t pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr); 318135446Strhodesstatic void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode); 319135446Strhodes 320135446Strhodesstatic __inline void pagezero(void *page); 321135446Strhodes 322135446StrhodesCTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 323135446StrhodesCTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 324135446Strhodes 325135446Strhodes/* 326135446Strhodes * If you get an error here, then you set KVA_PAGES wrong! See the 327135446Strhodes * description of KVA_PAGES in sys/i386/include/pmap.h. It must be 328135446Strhodes * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE. 329135446Strhodes */ 330135446StrhodesCTASSERT(KERNBASE % (1 << 24) == 0); 331135446Strhodes 332135446Strhodes 333135446Strhodes 334135446Strhodesvoid 335135446Strhodespd_set(struct pmap *pmap, int ptepindex, vm_paddr_t val, int type) 336135446Strhodes{ 337135446Strhodes vm_paddr_t pdir_ma = vtomach(&pmap->pm_pdir[ptepindex]); 338135446Strhodes 339135446Strhodes switch (type) { 340135446Strhodes case SH_PD_SET_VA: 341135446Strhodes#if 0 342135446Strhodes xen_queue_pt_update(shadow_pdir_ma, 343135446Strhodes xpmap_ptom(val & ~(PG_RW))); 344135446Strhodes#endif 345193149Sdougb xen_queue_pt_update(pdir_ma, 346135446Strhodes xpmap_ptom(val)); 347135446Strhodes break; 348135446Strhodes case SH_PD_SET_VA_MA: 349135446Strhodes#if 0 350135446Strhodes xen_queue_pt_update(shadow_pdir_ma, 351135446Strhodes val & ~(PG_RW)); 352135446Strhodes#endif 353135446Strhodes xen_queue_pt_update(pdir_ma, val); 354135446Strhodes break; 355135446Strhodes case SH_PD_SET_VA_CLEAR: 356135446Strhodes#if 0 357135446Strhodes xen_queue_pt_update(shadow_pdir_ma, 0); 358135446Strhodes#endif 359135446Strhodes xen_queue_pt_update(pdir_ma, 0); 360135446Strhodes break; 361135446Strhodes } 362135446Strhodes} 363135446Strhodes 364135446Strhodes/* 365135446Strhodes * Move the kernel virtual free pointer to the next 366135446Strhodes * 4MB. This is used to help improve performance 367135446Strhodes * by using a large (4MB) page for much of the kernel 368135446Strhodes * (.text, .data, .bss) 369135446Strhodes */ 370135446Strhodesstatic vm_offset_t 371135446Strhodespmap_kmem_choose(vm_offset_t addr) 372135446Strhodes{ 373135446Strhodes vm_offset_t newaddr = addr; 374135446Strhodes 375135446Strhodes#ifndef DISABLE_PSE 376135446Strhodes if (cpu_feature & CPUID_PSE) 377135446Strhodes newaddr = (addr + PDRMASK) & ~PDRMASK; 378135446Strhodes#endif 379135446Strhodes return newaddr; 380135446Strhodes} 381135446Strhodes 382135446Strhodes/* 383135446Strhodes * Bootstrap the system enough to run with virtual memory. 384135446Strhodes * 385135446Strhodes * On the i386 this is called after mapping has already been enabled 386135446Strhodes * and just syncs the pmap module with what has already been done. 387135446Strhodes * [We can't call it easily with mapping off since the kernel is not 388135446Strhodes * mapped with PA == VA, hence we would have to relocate every address 389135446Strhodes * from the linked base (virtual) address "KERNBASE" to the actual 390135446Strhodes * (physical) address starting relative to 0] 391135446Strhodes */ 392135446Strhodesvoid 393135446Strhodespmap_bootstrap(vm_paddr_t firstaddr) 394135446Strhodes{ 395135446Strhodes vm_offset_t va; 396135446Strhodes pt_entry_t *pte, *unused; 397135446Strhodes struct sysmaps *sysmaps; 398135446Strhodes int i; 399135446Strhodes 400135446Strhodes /* 401135446Strhodes * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 402135446Strhodes * large. It should instead be correctly calculated in locore.s and 403135446Strhodes * not based on 'first' (which is a physical address, not a virtual 404135446Strhodes * address, for the start of unused physical memory). The kernel 405135446Strhodes * page tables are NOT double mapped and thus should not be included 406135446Strhodes * in this calculation. 407135446Strhodes */ 408135446Strhodes virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 409135446Strhodes virtual_avail = pmap_kmem_choose(virtual_avail); 410135446Strhodes 411135446Strhodes virtual_end = VM_MAX_KERNEL_ADDRESS; 412135446Strhodes 413135446Strhodes /* 414135446Strhodes * Initialize the kernel pmap (which is statically allocated). 415135446Strhodes */ 416135446Strhodes PMAP_LOCK_INIT(kernel_pmap); 417135446Strhodes kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 418135446Strhodes#ifdef PAE 419135446Strhodes kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 420135446Strhodes#endif 421135446Strhodes kernel_pmap->pm_active = -1; /* don't allow deactivation */ 422135446Strhodes TAILQ_INIT(&kernel_pmap->pm_pvchunk); 423135446Strhodes LIST_INIT(&allpmaps); 424135446Strhodes mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 425135446Strhodes mtx_lock_spin(&allpmaps_lock); 426135446Strhodes LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 427135446Strhodes mtx_unlock_spin(&allpmaps_lock); 428135446Strhodes if (nkpt == 0) 429135446Strhodes nkpt = NKPT; 430135446Strhodes 431135446Strhodes /* 432135446Strhodes * Reserve some special page table entries/VA space for temporary 433135446Strhodes * mapping of pages. 434135446Strhodes */ 435135446Strhodes#define SYSMAP(c, p, v, n) \ 436135446Strhodes v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 437135446Strhodes 438135446Strhodes va = virtual_avail; 439135446Strhodes pte = vtopte(va); 440135446Strhodes 441135446Strhodes /* 442135446Strhodes * CMAP1/CMAP2 are used for zeroing and copying pages. 443135446Strhodes * CMAP3 is used for the idle process page zeroing. 444135446Strhodes */ 445135446Strhodes for (i = 0; i < MAXCPU; i++) { 446135446Strhodes sysmaps = &sysmaps_pcpu[i]; 447135446Strhodes mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF); 448135446Strhodes SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1) 449135446Strhodes SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1) 450135446Strhodes PT_SET_MA(sysmaps->CADDR1, 0); 451193149Sdougb PT_SET_MA(sysmaps->CADDR2, 0); 452135446Strhodes } 453135446Strhodes SYSMAP(caddr_t, CMAP3, CADDR3, 1) 454135446Strhodes PT_SET_MA(CADDR3, 0); 455135446Strhodes 456135446Strhodes /* 457135446Strhodes * Crashdump maps. 458135446Strhodes */ 459135446Strhodes SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS) 460135446Strhodes 461135446Strhodes /* 462135446Strhodes * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 463135446Strhodes */ 464135446Strhodes SYSMAP(caddr_t, unused, ptvmmap, 1) 465135446Strhodes 466135446Strhodes /* 467135446Strhodes * msgbufp is used to map the system message buffer. 468135446Strhodes */ 469135446Strhodes SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE))) 470135446Strhodes 471135446Strhodes /* 472135446Strhodes * ptemap is used for pmap_pte_quick 473135446Strhodes */ 474135446Strhodes SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 475135446Strhodes SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1); 476135446Strhodes 477135446Strhodes mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF); 478135446Strhodes 479135446Strhodes virtual_avail = va; 480135446Strhodes 481135446Strhodes /* 482135446Strhodes * Leave in place an identity mapping (virt == phys) for the low 1 MB 483135446Strhodes * physical memory region that is used by the ACPI wakeup code. This 484135446Strhodes * mapping must not have PG_G set. 485135446Strhodes */ 486135446Strhodes#ifndef XEN 487135446Strhodes /* 488135446Strhodes * leave here deliberately to show that this is not supported 489135446Strhodes */ 490135446Strhodes#ifdef XBOX 491135446Strhodes /* FIXME: This is gross, but needed for the XBOX. Since we are in such 492135446Strhodes * an early stadium, we cannot yet neatly map video memory ... :-( 493135446Strhodes * Better fixes are very welcome! */ 494135446Strhodes if (!arch_i386_is_xbox) 495135446Strhodes#endif 496135446Strhodes for (i = 1; i < NKPT; i++) 497135446Strhodes PTD[i] = 0; 498135446Strhodes 499135446Strhodes /* Initialize the PAT MSR if present. */ 500135446Strhodes pmap_init_pat(); 501135446Strhodes 502135446Strhodes /* Turn on PG_G on kernel page(s) */ 503135446Strhodes pmap_set_pg(); 504135446Strhodes#endif 505135446Strhodes} 506135446Strhodes 507135446Strhodes/* 508135446Strhodes * Setup the PAT MSR. 509135446Strhodes */ 510135446Strhodesvoid 511135446Strhodespmap_init_pat(void) 512135446Strhodes{ 513135446Strhodes uint64_t pat_msr; 514135446Strhodes 515135446Strhodes /* Bail if this CPU doesn't implement PAT. */ 516135446Strhodes if (!(cpu_feature & CPUID_PAT)) 517135446Strhodes return; 518135446Strhodes 519135446Strhodes if (cpu_vendor_id != CPU_VENDOR_INTEL || 520135446Strhodes (CPUID_TO_FAMILY(cpu_id) == 6 && CPUID_TO_MODEL(cpu_id) >= 0xe)) { 521135446Strhodes /* 522135446Strhodes * Leave the indices 0-3 at the default of WB, WT, UC, and UC-. 523135446Strhodes * Program 4 and 5 as WP and WC. 524135446Strhodes * Leave 6 and 7 as UC and UC-. 525135446Strhodes */ 526135446Strhodes pat_msr = rdmsr(MSR_PAT); 527135446Strhodes pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5)); 528135446Strhodes pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) | 529135446Strhodes PAT_VALUE(5, PAT_WRITE_COMBINING); 530135446Strhodes pat_works = 1; 531135446Strhodes } else { 532135446Strhodes /* 533135446Strhodes * Due to some Intel errata, we can only safely use the lower 4 534135446Strhodes * PAT entries. Thus, just replace PAT Index 2 with WC instead 535135446Strhodes * of UC-. 536135446Strhodes * 537135446Strhodes * Intel Pentium III Processor Specification Update 538135446Strhodes * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B 539165071Sdougb * or Mode C Paging) 540135446Strhodes * 541135446Strhodes * Intel Pentium IV Processor Specification Update 542135446Strhodes * Errata N46 (PAT Index MSB May Be Calculated Incorrectly) 543165071Sdougb */ 544135446Strhodes pat_msr = rdmsr(MSR_PAT); 545135446Strhodes pat_msr &= ~PAT_MASK(2); 546135446Strhodes pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING); 547135446Strhodes pat_works = 0; 548135446Strhodes } 549135446Strhodes wrmsr(MSR_PAT, pat_msr); 550135446Strhodes} 551135446Strhodes 552135446Strhodes/* 553135446Strhodes * Initialize a vm_page's machine-dependent fields. 554165071Sdougb */ 555135446Strhodesvoid 556135446Strhodespmap_page_init(vm_page_t m) 557135446Strhodes{ 558165071Sdougb 559135446Strhodes TAILQ_INIT(&m->md.pv_list); 560135446Strhodes m->md.pat_mode = PAT_WRITE_BACK; 561135446Strhodes} 562135446Strhodes 563135446Strhodes/* 564135446Strhodes * ABuse the pte nodes for unmapped kva to thread a kva freelist through. 565135446Strhodes * Requirements: 566135446Strhodes * - Must deal with pages in order to ensure that none of the PG_* bits 567135446Strhodes * are ever set, PG_V in particular. 568135446Strhodes * - Assumes we can write to ptes without pte_store() atomic ops, even 569135446Strhodes * on PAE systems. This should be ok. 570135446Strhodes * - Assumes nothing will ever test these addresses for 0 to indicate 571135446Strhodes * no mapping instead of correctly checking PG_V. 572135446Strhodes * - Assumes a vm_offset_t will fit in a pte (true for i386). 573135446Strhodes * Because PG_V is never set, there can be no mappings to invalidate. 574135446Strhodes */ 575135446Strhodesstatic int ptelist_count = 0; 576135446Strhodesstatic vm_offset_t 577135446Strhodespmap_ptelist_alloc(vm_offset_t *head) 578135446Strhodes{ 579135446Strhodes vm_offset_t va; 580135446Strhodes vm_offset_t *phead = (vm_offset_t *)*head; 581135446Strhodes 582135446Strhodes if (ptelist_count == 0) { 583135446Strhodes printf("out of memory!!!!!!\n"); 584135446Strhodes return (0); /* Out of memory */ 585135446Strhodes } 586135446Strhodes ptelist_count--; 587135446Strhodes va = phead[ptelist_count]; 588135446Strhodes return (va); 589135446Strhodes} 590135446Strhodes 591135446Strhodesstatic void 592135446Strhodespmap_ptelist_free(vm_offset_t *head, vm_offset_t va) 593135446Strhodes{ 594135446Strhodes vm_offset_t *phead = (vm_offset_t *)*head; 595135446Strhodes 596135446Strhodes phead[ptelist_count++] = va; 597135446Strhodes} 598135446Strhodes 599135446Strhodesstatic void 600135446Strhodespmap_ptelist_init(vm_offset_t *head, void *base, int npages) 601135446Strhodes{ 602135446Strhodes int i, nstackpages; 603135446Strhodes vm_offset_t va; 604135446Strhodes vm_page_t m; 605135446Strhodes 606135446Strhodes nstackpages = (npages + PAGE_SIZE/sizeof(vm_offset_t) - 1)/ (PAGE_SIZE/sizeof(vm_offset_t)); 607135446Strhodes for (i = 0; i < nstackpages; i++) { 608135446Strhodes va = (vm_offset_t)base + i * PAGE_SIZE; 609135446Strhodes m = vm_page_alloc(NULL, i, 610135446Strhodes VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 611135446Strhodes VM_ALLOC_ZERO); 612135446Strhodes pmap_qenter(va, &m, 1); 613135446Strhodes } 614135446Strhodes 615135446Strhodes *head = (vm_offset_t)base; 616135446Strhodes for (i = npages - 1; i >= nstackpages; i--) { 617135446Strhodes va = (vm_offset_t)base + i * PAGE_SIZE; 618135446Strhodes pmap_ptelist_free(head, va); 619135446Strhodes } 620135446Strhodes} 621135446Strhodes 622135446Strhodes 623135446Strhodes/* 624135446Strhodes * Initialize the pmap module. 625135446Strhodes * Called by vm_init, to initialize any structures that the pmap 626193149Sdougb * system needs to map virtual memory. 627135446Strhodes */ 628135446Strhodesvoid 629135446Strhodespmap_init(void) 630135446Strhodes{ 631135446Strhodes vm_page_t mpte; 632135446Strhodes vm_size_t s; 633193149Sdougb int i, pv_npg; 634135446Strhodes 635170222Sdougb /* 636193149Sdougb * Initialize the vm page array entries for the kernel pmap's 637193149Sdougb * page table pages. 638193149Sdougb */ 639193149Sdougb for (i = 0; i < nkpt; i++) { 640193149Sdougb mpte = PHYS_TO_VM_PAGE(xpmap_mtop(PTD[i + KPTDI] & PG_FRAME)); 641193149Sdougb KASSERT(mpte >= vm_page_array && 642193149Sdougb mpte < &vm_page_array[vm_page_array_size], 643193149Sdougb ("pmap_init: page table page is out of range")); 644193149Sdougb mpte->pindex = i + KPTDI; 645193149Sdougb mpte->phys_addr = xpmap_mtop(PTD[i + KPTDI] & PG_FRAME); 646193149Sdougb } 647193149Sdougb 648193149Sdougb /* 649193149Sdougb * Initialize the address space (zone) for the pv entries. Set a 650193149Sdougb * high water mark so that the system can recover from excessive 651193149Sdougb * numbers of pv entries. 652193149Sdougb */ 653193149Sdougb TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 654193149Sdougb pv_entry_max = shpgperproc * maxproc + cnt.v_page_count; 655193149Sdougb TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 656193149Sdougb pv_entry_max = roundup(pv_entry_max, _NPCPV); 657193149Sdougb pv_entry_high_water = 9 * (pv_entry_max / 10); 658170222Sdougb 659170222Sdougb /* 660170222Sdougb * Are large page mappings enabled? 661170222Sdougb */ 662170222Sdougb TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled); 663170222Sdougb 664170222Sdougb /* 665170222Sdougb * Calculate the size of the pv head table for superpages. 666170222Sdougb */ 667170222Sdougb for (i = 0; phys_avail[i + 1]; i += 2); 668170222Sdougb pv_npg = round_4mpage(phys_avail[(i - 2) + 1]) / NBPDR; 669170222Sdougb 670170222Sdougb /* 671170222Sdougb * Allocate memory for the pv head table for superpages. 672170222Sdougb */ 673170222Sdougb s = (vm_size_t)(pv_npg * sizeof(struct md_page)); 674170222Sdougb s = round_page(s); 675170222Sdougb pv_table = (struct md_page *)kmem_alloc(kernel_map, s); 676170222Sdougb for (i = 0; i < pv_npg; i++) 677170222Sdougb TAILQ_INIT(&pv_table[i].pv_list); 678170222Sdougb 679170222Sdougb pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc); 680170222Sdougb pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map, 681170222Sdougb PAGE_SIZE * pv_maxchunks); 682170222Sdougb if (pv_chunkbase == NULL) 683170222Sdougb panic("pmap_init: not enough kvm for pv chunks"); 684170222Sdougb pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks); 685170222Sdougb} 686170222Sdougb 687170222Sdougb 688170222Sdougb/*************************************************** 689170222Sdougb * Low level helper routines..... 690170222Sdougb ***************************************************/ 691170222Sdougb 692170222Sdougb/* 693170222Sdougb * Determine the appropriate bits to set in a PTE or PDE for a specified 694170222Sdougb * caching mode. 695170222Sdougb */ 696170222Sdougbint 697170222Sdougbpmap_cache_bits(int mode, boolean_t is_pde) 698170222Sdougb{ 699170222Sdougb int pat_flag, pat_index, cache_bits; 700170222Sdougb 701170222Sdougb /* The PAT bit is different for PTE's and PDE's. */ 702170222Sdougb pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT; 703170222Sdougb 704170222Sdougb /* If we don't support PAT, map extended modes to older ones. */ 705170222Sdougb if (!(cpu_feature & CPUID_PAT)) { 706170222Sdougb switch (mode) { 707170222Sdougb case PAT_UNCACHEABLE: 708170222Sdougb case PAT_WRITE_THROUGH: 709170222Sdougb case PAT_WRITE_BACK: 710170222Sdougb break; 711170222Sdougb case PAT_UNCACHED: 712170222Sdougb case PAT_WRITE_COMBINING: 713170222Sdougb case PAT_WRITE_PROTECTED: 714170222Sdougb mode = PAT_UNCACHEABLE; 715170222Sdougb break; 716170222Sdougb } 717170222Sdougb } 718170222Sdougb 719170222Sdougb /* Map the caching mode to a PAT index. */ 720170222Sdougb if (pat_works) { 721170222Sdougb switch (mode) { 722170222Sdougb case PAT_UNCACHEABLE: 723170222Sdougb pat_index = 3; 724170222Sdougb break; 725170222Sdougb case PAT_WRITE_THROUGH: 726170222Sdougb pat_index = 1; 727170222Sdougb break; 728170222Sdougb case PAT_WRITE_BACK: 729170222Sdougb pat_index = 0; 730170222Sdougb break; 731170222Sdougb case PAT_UNCACHED: 732170222Sdougb pat_index = 2; 733170222Sdougb break; 734170222Sdougb case PAT_WRITE_COMBINING: 735 pat_index = 5; 736 break; 737 case PAT_WRITE_PROTECTED: 738 pat_index = 4; 739 break; 740 default: 741 panic("Unknown caching mode %d\n", mode); 742 } 743 } else { 744 switch (mode) { 745 case PAT_UNCACHED: 746 case PAT_UNCACHEABLE: 747 case PAT_WRITE_PROTECTED: 748 pat_index = 3; 749 break; 750 case PAT_WRITE_THROUGH: 751 pat_index = 1; 752 break; 753 case PAT_WRITE_BACK: 754 pat_index = 0; 755 break; 756 case PAT_WRITE_COMBINING: 757 pat_index = 2; 758 break; 759 default: 760 panic("Unknown caching mode %d\n", mode); 761 } 762 } 763 764 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */ 765 cache_bits = 0; 766 if (pat_index & 0x4) 767 cache_bits |= pat_flag; 768 if (pat_index & 0x2) 769 cache_bits |= PG_NC_PCD; 770 if (pat_index & 0x1) 771 cache_bits |= PG_NC_PWT; 772 return (cache_bits); 773} 774#ifdef SMP 775/* 776 * For SMP, these functions have to use the IPI mechanism for coherence. 777 * 778 * N.B.: Before calling any of the following TLB invalidation functions, 779 * the calling processor must ensure that all stores updating a non- 780 * kernel page table are globally performed. Otherwise, another 781 * processor could cache an old, pre-update entry without being 782 * invalidated. This can happen one of two ways: (1) The pmap becomes 783 * active on another processor after its pm_active field is checked by 784 * one of the following functions but before a store updating the page 785 * table is globally performed. (2) The pmap becomes active on another 786 * processor before its pm_active field is checked but due to 787 * speculative loads one of the following functions stills reads the 788 * pmap as inactive on the other processor. 789 * 790 * The kernel page table is exempt because its pm_active field is 791 * immutable. The kernel page table is always active on every 792 * processor. 793 */ 794void 795pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 796{ 797 cpumask_t cpumask, other_cpus; 798 799 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x", 800 pmap, va); 801 802 sched_pin(); 803 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 804 invlpg(va); 805 smp_invlpg(va); 806 } else { 807 cpumask = PCPU_GET(cpumask); 808 other_cpus = PCPU_GET(other_cpus); 809 if (pmap->pm_active & cpumask) 810 invlpg(va); 811 if (pmap->pm_active & other_cpus) 812 smp_masked_invlpg(pmap->pm_active & other_cpus, va); 813 } 814 sched_unpin(); 815 PT_UPDATES_FLUSH(); 816} 817 818void 819pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 820{ 821 cpumask_t cpumask, other_cpus; 822 vm_offset_t addr; 823 824 CTR3(KTR_PMAP, "pmap_invalidate_page: pmap=%p eva=0x%x sva=0x%x", 825 pmap, sva, eva); 826 827 sched_pin(); 828 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 829 for (addr = sva; addr < eva; addr += PAGE_SIZE) 830 invlpg(addr); 831 smp_invlpg_range(sva, eva); 832 } else { 833 cpumask = PCPU_GET(cpumask); 834 other_cpus = PCPU_GET(other_cpus); 835 if (pmap->pm_active & cpumask) 836 for (addr = sva; addr < eva; addr += PAGE_SIZE) 837 invlpg(addr); 838 if (pmap->pm_active & other_cpus) 839 smp_masked_invlpg_range(pmap->pm_active & other_cpus, 840 sva, eva); 841 } 842 sched_unpin(); 843 PT_UPDATES_FLUSH(); 844} 845 846void 847pmap_invalidate_all(pmap_t pmap) 848{ 849 cpumask_t cpumask, other_cpus; 850 851 CTR1(KTR_PMAP, "pmap_invalidate_page: pmap=%p", pmap); 852 853 sched_pin(); 854 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 855 invltlb(); 856 smp_invltlb(); 857 } else { 858 cpumask = PCPU_GET(cpumask); 859 other_cpus = PCPU_GET(other_cpus); 860 if (pmap->pm_active & cpumask) 861 invltlb(); 862 if (pmap->pm_active & other_cpus) 863 smp_masked_invltlb(pmap->pm_active & other_cpus); 864 } 865 sched_unpin(); 866} 867 868void 869pmap_invalidate_cache(void) 870{ 871 872 sched_pin(); 873 wbinvd(); 874 smp_cache_flush(); 875 sched_unpin(); 876} 877#else /* !SMP */ 878/* 879 * Normal, non-SMP, 486+ invalidation functions. 880 * We inline these within pmap.c for speed. 881 */ 882PMAP_INLINE void 883pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 884{ 885 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x", 886 pmap, va); 887 888 if (pmap == kernel_pmap || pmap->pm_active) 889 invlpg(va); 890 PT_UPDATES_FLUSH(); 891} 892 893PMAP_INLINE void 894pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 895{ 896 vm_offset_t addr; 897 898 if (eva - sva > PAGE_SIZE) 899 CTR3(KTR_PMAP, "pmap_invalidate_range: pmap=%p sva=0x%x eva=0x%x", 900 pmap, sva, eva); 901 902 if (pmap == kernel_pmap || pmap->pm_active) 903 for (addr = sva; addr < eva; addr += PAGE_SIZE) 904 invlpg(addr); 905 PT_UPDATES_FLUSH(); 906} 907 908PMAP_INLINE void 909pmap_invalidate_all(pmap_t pmap) 910{ 911 912 CTR1(KTR_PMAP, "pmap_invalidate_all: pmap=%p", pmap); 913 914 if (pmap == kernel_pmap || pmap->pm_active) 915 invltlb(); 916} 917 918PMAP_INLINE void 919pmap_invalidate_cache(void) 920{ 921 922 wbinvd(); 923} 924#endif /* !SMP */ 925 926void 927pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva) 928{ 929 930 KASSERT((sva & PAGE_MASK) == 0, 931 ("pmap_invalidate_cache_range: sva not page-aligned")); 932 KASSERT((eva & PAGE_MASK) == 0, 933 ("pmap_invalidate_cache_range: eva not page-aligned")); 934 935 if (cpu_feature & CPUID_SS) 936 ; /* If "Self Snoop" is supported, do nothing. */ 937 else if (cpu_feature & CPUID_CLFSH) { 938 939 /* 940 * Otherwise, do per-cache line flush. Use the mfence 941 * instruction to insure that previous stores are 942 * included in the write-back. The processor 943 * propagates flush to other processors in the cache 944 * coherence domain. 945 */ 946 mfence(); 947 for (; sva < eva; sva += cpu_clflush_line_size) 948 clflush(sva); 949 mfence(); 950 } else { 951 952 /* 953 * No targeted cache flush methods are supported by CPU, 954 * globally invalidate cache as a last resort. 955 */ 956 pmap_invalidate_cache(); 957 } 958} 959 960/* 961 * Are we current address space or kernel? N.B. We return FALSE when 962 * a pmap's page table is in use because a kernel thread is borrowing 963 * it. The borrowed page table can change spontaneously, making any 964 * dependence on its continued use subject to a race condition. 965 */ 966static __inline int 967pmap_is_current(pmap_t pmap) 968{ 969 970 return (pmap == kernel_pmap || 971 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) && 972 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME))); 973} 974 975/* 976 * If the given pmap is not the current or kernel pmap, the returned pte must 977 * be released by passing it to pmap_pte_release(). 978 */ 979pt_entry_t * 980pmap_pte(pmap_t pmap, vm_offset_t va) 981{ 982 pd_entry_t newpf; 983 pd_entry_t *pde; 984 985 pde = pmap_pde(pmap, va); 986 if (*pde & PG_PS) 987 return (pde); 988 if (*pde != 0) { 989 /* are we current address space or kernel? */ 990 if (pmap_is_current(pmap)) 991 return (vtopte(va)); 992 mtx_lock(&PMAP2mutex); 993 newpf = *pde & PG_FRAME; 994 if ((*PMAP2 & PG_FRAME) != newpf) { 995 vm_page_lock_queues(); 996 PT_SET_MA(PADDR2, newpf | PG_V | PG_A | PG_M); 997 vm_page_unlock_queues(); 998 CTR3(KTR_PMAP, "pmap_pte: pmap=%p va=0x%x newpte=0x%08x", 999 pmap, va, (*PMAP2 & 0xffffffff)); 1000 } 1001 1002 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1))); 1003 } 1004 return (0); 1005} 1006 1007/* 1008 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte 1009 * being NULL. 1010 */ 1011static __inline void 1012pmap_pte_release(pt_entry_t *pte) 1013{ 1014 1015 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) { 1016 CTR1(KTR_PMAP, "pmap_pte_release: pte=0x%jx", 1017 *PMAP2); 1018 PT_SET_VA(PMAP2, 0, TRUE); 1019 mtx_unlock(&PMAP2mutex); 1020 } 1021} 1022 1023static __inline void 1024invlcaddr(void *caddr) 1025{ 1026 1027 invlpg((u_int)caddr); 1028 PT_UPDATES_FLUSH(); 1029} 1030 1031/* 1032 * Super fast pmap_pte routine best used when scanning 1033 * the pv lists. This eliminates many coarse-grained 1034 * invltlb calls. Note that many of the pv list 1035 * scans are across different pmaps. It is very wasteful 1036 * to do an entire invltlb for checking a single mapping. 1037 * 1038 * If the given pmap is not the current pmap, vm_page_queue_mtx 1039 * must be held and curthread pinned to a CPU. 1040 */ 1041static pt_entry_t * 1042pmap_pte_quick(pmap_t pmap, vm_offset_t va) 1043{ 1044 pd_entry_t newpf; 1045 pd_entry_t *pde; 1046 1047 pde = pmap_pde(pmap, va); 1048 if (*pde & PG_PS) 1049 return (pde); 1050 if (*pde != 0) { 1051 /* are we current address space or kernel? */ 1052 if (pmap_is_current(pmap)) 1053 return (vtopte(va)); 1054 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1055 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 1056 newpf = *pde & PG_FRAME; 1057 if ((*PMAP1 & PG_FRAME) != newpf) { 1058 PT_SET_MA(PADDR1, newpf | PG_V | PG_A | PG_M); 1059 CTR3(KTR_PMAP, "pmap_pte_quick: pmap=%p va=0x%x newpte=0x%08x", 1060 pmap, va, (u_long)*PMAP1); 1061 1062#ifdef SMP 1063 PMAP1cpu = PCPU_GET(cpuid); 1064#endif 1065 PMAP1changed++; 1066 } else 1067#ifdef SMP 1068 if (PMAP1cpu != PCPU_GET(cpuid)) { 1069 PMAP1cpu = PCPU_GET(cpuid); 1070 invlcaddr(PADDR1); 1071 PMAP1changedcpu++; 1072 } else 1073#endif 1074 PMAP1unchanged++; 1075 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1))); 1076 } 1077 return (0); 1078} 1079 1080/* 1081 * Routine: pmap_extract 1082 * Function: 1083 * Extract the physical page address associated 1084 * with the given map/virtual_address pair. 1085 */ 1086vm_paddr_t 1087pmap_extract(pmap_t pmap, vm_offset_t va) 1088{ 1089 vm_paddr_t rtval; 1090 pt_entry_t *pte; 1091 pd_entry_t pde; 1092 pt_entry_t pteval; 1093 1094 rtval = 0; 1095 PMAP_LOCK(pmap); 1096 pde = pmap->pm_pdir[va >> PDRSHIFT]; 1097 if (pde != 0) { 1098 if ((pde & PG_PS) != 0) { 1099 rtval = xpmap_mtop(pde & PG_PS_FRAME) | (va & PDRMASK); 1100 PMAP_UNLOCK(pmap); 1101 return rtval; 1102 } 1103 pte = pmap_pte(pmap, va); 1104 pteval = *pte ? xpmap_mtop(*pte) : 0; 1105 rtval = (pteval & PG_FRAME) | (va & PAGE_MASK); 1106 pmap_pte_release(pte); 1107 } 1108 PMAP_UNLOCK(pmap); 1109 return (rtval); 1110} 1111 1112/* 1113 * Routine: pmap_extract_ma 1114 * Function: 1115 * Like pmap_extract, but returns machine address 1116 */ 1117vm_paddr_t 1118pmap_extract_ma(pmap_t pmap, vm_offset_t va) 1119{ 1120 vm_paddr_t rtval; 1121 pt_entry_t *pte; 1122 pd_entry_t pde; 1123 1124 rtval = 0; 1125 PMAP_LOCK(pmap); 1126 pde = pmap->pm_pdir[va >> PDRSHIFT]; 1127 if (pde != 0) { 1128 if ((pde & PG_PS) != 0) { 1129 rtval = (pde & ~PDRMASK) | (va & PDRMASK); 1130 PMAP_UNLOCK(pmap); 1131 return rtval; 1132 } 1133 pte = pmap_pte(pmap, va); 1134 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK); 1135 pmap_pte_release(pte); 1136 } 1137 PMAP_UNLOCK(pmap); 1138 return (rtval); 1139} 1140 1141/* 1142 * Routine: pmap_extract_and_hold 1143 * Function: 1144 * Atomically extract and hold the physical page 1145 * with the given pmap and virtual address pair 1146 * if that mapping permits the given protection. 1147 */ 1148vm_page_t 1149pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 1150{ 1151 pd_entry_t pde; 1152 pt_entry_t pte; 1153 vm_page_t m; 1154 vm_paddr_t pa; 1155 1156 pa = 0; 1157 m = NULL; 1158 PMAP_LOCK(pmap); 1159retry: 1160 pde = PT_GET(pmap_pde(pmap, va)); 1161 if (pde != 0) { 1162 if (pde & PG_PS) { 1163 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) { 1164 if (vm_page_pa_tryrelock(pmap, (pde & PG_PS_FRAME) | 1165 (va & PDRMASK), &pa)) 1166 goto retry; 1167 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) | 1168 (va & PDRMASK)); 1169 vm_page_hold(m); 1170 } 1171 } else { 1172 sched_pin(); 1173 pte = PT_GET(pmap_pte_quick(pmap, va)); 1174 if (*PMAP1) 1175 PT_SET_MA(PADDR1, 0); 1176 if ((pte & PG_V) && 1177 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) { 1178 if (vm_page_pa_tryrelock(pmap, pte & PG_FRAME, &pa)) 1179 goto retry; 1180 m = PHYS_TO_VM_PAGE(pte & PG_FRAME); 1181 vm_page_hold(m); 1182 } 1183 sched_unpin(); 1184 } 1185 } 1186 PA_UNLOCK_COND(pa); 1187 PMAP_UNLOCK(pmap); 1188 return (m); 1189} 1190 1191/*************************************************** 1192 * Low level mapping routines..... 1193 ***************************************************/ 1194 1195/* 1196 * Add a wired page to the kva. 1197 * Note: not SMP coherent. 1198 */ 1199void 1200pmap_kenter(vm_offset_t va, vm_paddr_t pa) 1201{ 1202 PT_SET_MA(va, xpmap_ptom(pa)| PG_RW | PG_V | pgeflag); 1203} 1204 1205void 1206pmap_kenter_ma(vm_offset_t va, vm_paddr_t ma) 1207{ 1208 pt_entry_t *pte; 1209 1210 pte = vtopte(va); 1211 pte_store_ma(pte, ma | PG_RW | PG_V | pgeflag); 1212} 1213 1214 1215static __inline void 1216pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode) 1217{ 1218 PT_SET_MA(va, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0)); 1219} 1220 1221/* 1222 * Remove a page from the kernel pagetables. 1223 * Note: not SMP coherent. 1224 */ 1225PMAP_INLINE void 1226pmap_kremove(vm_offset_t va) 1227{ 1228 pt_entry_t *pte; 1229 1230 pte = vtopte(va); 1231 PT_CLEAR_VA(pte, FALSE); 1232} 1233 1234/* 1235 * Used to map a range of physical addresses into kernel 1236 * virtual address space. 1237 * 1238 * The value passed in '*virt' is a suggested virtual address for 1239 * the mapping. Architectures which can support a direct-mapped 1240 * physical to virtual region can return the appropriate address 1241 * within that region, leaving '*virt' unchanged. Other 1242 * architectures should map the pages starting at '*virt' and 1243 * update '*virt' with the first usable address after the mapped 1244 * region. 1245 */ 1246vm_offset_t 1247pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 1248{ 1249 vm_offset_t va, sva; 1250 1251 va = sva = *virt; 1252 CTR4(KTR_PMAP, "pmap_map: va=0x%x start=0x%jx end=0x%jx prot=0x%x", 1253 va, start, end, prot); 1254 while (start < end) { 1255 pmap_kenter(va, start); 1256 va += PAGE_SIZE; 1257 start += PAGE_SIZE; 1258 } 1259 pmap_invalidate_range(kernel_pmap, sva, va); 1260 *virt = va; 1261 return (sva); 1262} 1263 1264 1265/* 1266 * Add a list of wired pages to the kva 1267 * this routine is only used for temporary 1268 * kernel mappings that do not need to have 1269 * page modification or references recorded. 1270 * Note that old mappings are simply written 1271 * over. The page *must* be wired. 1272 * Note: SMP coherent. Uses a ranged shootdown IPI. 1273 */ 1274void 1275pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count) 1276{ 1277 pt_entry_t *endpte, *pte; 1278 vm_paddr_t pa; 1279 vm_offset_t va = sva; 1280 int mclcount = 0; 1281 multicall_entry_t mcl[16]; 1282 multicall_entry_t *mclp = mcl; 1283 int error; 1284 1285 CTR2(KTR_PMAP, "pmap_qenter:sva=0x%x count=%d", va, count); 1286 pte = vtopte(sva); 1287 endpte = pte + count; 1288 while (pte < endpte) { 1289 pa = VM_PAGE_TO_MACH(*ma) | pgeflag | PG_RW | PG_V | PG_M | PG_A; 1290 1291 mclp->op = __HYPERVISOR_update_va_mapping; 1292 mclp->args[0] = va; 1293 mclp->args[1] = (uint32_t)(pa & 0xffffffff); 1294 mclp->args[2] = (uint32_t)(pa >> 32); 1295 mclp->args[3] = (*pte & PG_V) ? UVMF_INVLPG|UVMF_ALL : 0; 1296 1297 va += PAGE_SIZE; 1298 pte++; 1299 ma++; 1300 mclp++; 1301 mclcount++; 1302 if (mclcount == 16) { 1303 error = HYPERVISOR_multicall(mcl, mclcount); 1304 mclp = mcl; 1305 mclcount = 0; 1306 KASSERT(error == 0, ("bad multicall %d", error)); 1307 } 1308 } 1309 if (mclcount) { 1310 error = HYPERVISOR_multicall(mcl, mclcount); 1311 KASSERT(error == 0, ("bad multicall %d", error)); 1312 } 1313 1314#ifdef INVARIANTS 1315 for (pte = vtopte(sva), mclcount = 0; mclcount < count; mclcount++, pte++) 1316 KASSERT(*pte, ("pte not set for va=0x%x", sva + mclcount*PAGE_SIZE)); 1317#endif 1318} 1319 1320 1321/* 1322 * This routine tears out page mappings from the 1323 * kernel -- it is meant only for temporary mappings. 1324 * Note: SMP coherent. Uses a ranged shootdown IPI. 1325 */ 1326void 1327pmap_qremove(vm_offset_t sva, int count) 1328{ 1329 vm_offset_t va; 1330 1331 CTR2(KTR_PMAP, "pmap_qremove: sva=0x%x count=%d", sva, count); 1332 va = sva; 1333 vm_page_lock_queues(); 1334 critical_enter(); 1335 while (count-- > 0) { 1336 pmap_kremove(va); 1337 va += PAGE_SIZE; 1338 } 1339 PT_UPDATES_FLUSH(); 1340 pmap_invalidate_range(kernel_pmap, sva, va); 1341 critical_exit(); 1342 vm_page_unlock_queues(); 1343} 1344 1345/*************************************************** 1346 * Page table page management routines..... 1347 ***************************************************/ 1348static __inline void 1349pmap_free_zero_pages(vm_page_t free) 1350{ 1351 vm_page_t m; 1352 1353 while (free != NULL) { 1354 m = free; 1355 free = m->right; 1356 vm_page_free_zero(m); 1357 } 1358} 1359 1360/* 1361 * This routine unholds page table pages, and if the hold count 1362 * drops to zero, then it decrements the wire count. 1363 */ 1364static __inline int 1365pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1366{ 1367 1368 --m->wire_count; 1369 if (m->wire_count == 0) 1370 return _pmap_unwire_pte_hold(pmap, m, free); 1371 else 1372 return 0; 1373} 1374 1375static int 1376_pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1377{ 1378 vm_offset_t pteva; 1379 1380 PT_UPDATES_FLUSH(); 1381 /* 1382 * unmap the page table page 1383 */ 1384 xen_pt_unpin(pmap->pm_pdir[m->pindex]); 1385 /* 1386 * page *might* contain residual mapping :-/ 1387 */ 1388 PD_CLEAR_VA(pmap, m->pindex, TRUE); 1389 pmap_zero_page(m); 1390 --pmap->pm_stats.resident_count; 1391 1392 /* 1393 * This is a release store so that the ordinary store unmapping 1394 * the page table page is globally performed before TLB shoot- 1395 * down is begun. 1396 */ 1397 atomic_subtract_rel_int(&cnt.v_wire_count, 1); 1398 1399 /* 1400 * Do an invltlb to make the invalidated mapping 1401 * take effect immediately. 1402 */ 1403 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1404 pmap_invalidate_page(pmap, pteva); 1405 1406 /* 1407 * Put page on a list so that it is released after 1408 * *ALL* TLB shootdown is done 1409 */ 1410 m->right = *free; 1411 *free = m; 1412 1413 return 1; 1414} 1415 1416/* 1417 * After removing a page table entry, this routine is used to 1418 * conditionally free the page, and manage the hold/wire counts. 1419 */ 1420static int 1421pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free) 1422{ 1423 pd_entry_t ptepde; 1424 vm_page_t mpte; 1425 1426 if (va >= VM_MAXUSER_ADDRESS) 1427 return 0; 1428 ptepde = PT_GET(pmap_pde(pmap, va)); 1429 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); 1430 return pmap_unwire_pte_hold(pmap, mpte, free); 1431} 1432 1433void 1434pmap_pinit0(pmap_t pmap) 1435{ 1436 1437 PMAP_LOCK_INIT(pmap); 1438 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1439#ifdef PAE 1440 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1441#endif 1442 pmap->pm_active = 0; 1443 PCPU_SET(curpmap, pmap); 1444 TAILQ_INIT(&pmap->pm_pvchunk); 1445 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1446 mtx_lock_spin(&allpmaps_lock); 1447 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1448 mtx_unlock_spin(&allpmaps_lock); 1449} 1450 1451/* 1452 * Initialize a preallocated and zeroed pmap structure, 1453 * such as one in a vmspace structure. 1454 */ 1455int 1456pmap_pinit(pmap_t pmap) 1457{ 1458 vm_page_t m, ptdpg[NPGPTD + 1]; 1459 int npgptd = NPGPTD + 1; 1460 static int color; 1461 int i; 1462 1463 PMAP_LOCK_INIT(pmap); 1464 1465 /* 1466 * No need to allocate page table space yet but we do need a valid 1467 * page directory table. 1468 */ 1469 if (pmap->pm_pdir == NULL) { 1470 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1471 NBPTD); 1472 if (pmap->pm_pdir == NULL) { 1473 PMAP_LOCK_DESTROY(pmap); 1474 return (0); 1475 } 1476#ifdef PAE 1477 pmap->pm_pdpt = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1); 1478#endif 1479 } 1480 1481 /* 1482 * allocate the page directory page(s) 1483 */ 1484 for (i = 0; i < npgptd;) { 1485 m = vm_page_alloc(NULL, color++, 1486 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1487 VM_ALLOC_ZERO); 1488 if (m == NULL) 1489 VM_WAIT; 1490 else { 1491 ptdpg[i++] = m; 1492 } 1493 } 1494 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1495 for (i = 0; i < NPGPTD; i++) { 1496 if ((ptdpg[i]->flags & PG_ZERO) == 0) 1497 pagezero(&pmap->pm_pdir[i*NPTEPG]); 1498 } 1499 1500 mtx_lock_spin(&allpmaps_lock); 1501 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1502 mtx_unlock_spin(&allpmaps_lock); 1503 /* Wire in kernel global address entries. */ 1504 1505 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1506#ifdef PAE 1507 pmap_qenter((vm_offset_t)pmap->pm_pdpt, &ptdpg[NPGPTD], 1); 1508 if ((ptdpg[NPGPTD]->flags & PG_ZERO) == 0) 1509 bzero(pmap->pm_pdpt, PAGE_SIZE); 1510 for (i = 0; i < NPGPTD; i++) { 1511 vm_paddr_t ma; 1512 1513 ma = VM_PAGE_TO_MACH(ptdpg[i]); 1514 pmap->pm_pdpt[i] = ma | PG_V; 1515 1516 } 1517#endif 1518 for (i = 0; i < NPGPTD; i++) { 1519 pt_entry_t *pd; 1520 vm_paddr_t ma; 1521 1522 ma = VM_PAGE_TO_MACH(ptdpg[i]); 1523 pd = pmap->pm_pdir + (i * NPDEPG); 1524 PT_SET_MA(pd, *vtopte((vm_offset_t)pd) & ~(PG_M|PG_A|PG_U|PG_RW)); 1525#if 0 1526 xen_pgd_pin(ma); 1527#endif 1528 } 1529 1530#ifdef PAE 1531 PT_SET_MA(pmap->pm_pdpt, *vtopte((vm_offset_t)pmap->pm_pdpt) & ~PG_RW); 1532#endif 1533 vm_page_lock_queues(); 1534 xen_flush_queue(); 1535 xen_pgdpt_pin(VM_PAGE_TO_MACH(ptdpg[NPGPTD])); 1536 for (i = 0; i < NPGPTD; i++) { 1537 vm_paddr_t ma = VM_PAGE_TO_MACH(ptdpg[i]); 1538 PT_SET_VA_MA(&pmap->pm_pdir[PTDPTDI + i], ma | PG_V | PG_A, FALSE); 1539 } 1540 xen_flush_queue(); 1541 vm_page_unlock_queues(); 1542 pmap->pm_active = 0; 1543 TAILQ_INIT(&pmap->pm_pvchunk); 1544 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1545 1546 return (1); 1547} 1548 1549/* 1550 * this routine is called if the page table page is not 1551 * mapped correctly. 1552 */ 1553static vm_page_t 1554_pmap_allocpte(pmap_t pmap, unsigned int ptepindex, int flags) 1555{ 1556 vm_paddr_t ptema; 1557 vm_page_t m; 1558 1559 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1560 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1561 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1562 1563 /* 1564 * Allocate a page table page. 1565 */ 1566 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1567 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1568 if (flags & M_WAITOK) { 1569 PMAP_UNLOCK(pmap); 1570 vm_page_unlock_queues(); 1571 VM_WAIT; 1572 vm_page_lock_queues(); 1573 PMAP_LOCK(pmap); 1574 } 1575 1576 /* 1577 * Indicate the need to retry. While waiting, the page table 1578 * page may have been allocated. 1579 */ 1580 return (NULL); 1581 } 1582 if ((m->flags & PG_ZERO) == 0) 1583 pmap_zero_page(m); 1584 1585 /* 1586 * Map the pagetable page into the process address space, if 1587 * it isn't already there. 1588 */ 1589 pmap->pm_stats.resident_count++; 1590 1591 ptema = VM_PAGE_TO_MACH(m); 1592 xen_pt_pin(ptema); 1593 PT_SET_VA_MA(&pmap->pm_pdir[ptepindex], 1594 (ptema | PG_U | PG_RW | PG_V | PG_A | PG_M), TRUE); 1595 1596 KASSERT(pmap->pm_pdir[ptepindex], 1597 ("_pmap_allocpte: ptepindex=%d did not get mapped", ptepindex)); 1598 return (m); 1599} 1600 1601static vm_page_t 1602pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags) 1603{ 1604 unsigned ptepindex; 1605 pd_entry_t ptema; 1606 vm_page_t m; 1607 1608 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1609 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1610 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1611 1612 /* 1613 * Calculate pagetable page index 1614 */ 1615 ptepindex = va >> PDRSHIFT; 1616retry: 1617 /* 1618 * Get the page directory entry 1619 */ 1620 ptema = pmap->pm_pdir[ptepindex]; 1621 1622 /* 1623 * This supports switching from a 4MB page to a 1624 * normal 4K page. 1625 */ 1626 if (ptema & PG_PS) { 1627 /* 1628 * XXX 1629 */ 1630 pmap->pm_pdir[ptepindex] = 0; 1631 ptema = 0; 1632 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1633 pmap_invalidate_all(kernel_pmap); 1634 } 1635 1636 /* 1637 * If the page table page is mapped, we just increment the 1638 * hold count, and activate it. 1639 */ 1640 if (ptema & PG_V) { 1641 m = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME); 1642 m->wire_count++; 1643 } else { 1644 /* 1645 * Here if the pte page isn't mapped, or if it has 1646 * been deallocated. 1647 */ 1648 CTR3(KTR_PMAP, "pmap_allocpte: pmap=%p va=0x%08x flags=0x%x", 1649 pmap, va, flags); 1650 m = _pmap_allocpte(pmap, ptepindex, flags); 1651 if (m == NULL && (flags & M_WAITOK)) 1652 goto retry; 1653 1654 KASSERT(pmap->pm_pdir[ptepindex], ("ptepindex=%d did not get mapped", ptepindex)); 1655 } 1656 return (m); 1657} 1658 1659 1660/*************************************************** 1661* Pmap allocation/deallocation routines. 1662 ***************************************************/ 1663 1664#ifdef SMP 1665/* 1666 * Deal with a SMP shootdown of other users of the pmap that we are 1667 * trying to dispose of. This can be a bit hairy. 1668 */ 1669static cpumask_t *lazymask; 1670static u_int lazyptd; 1671static volatile u_int lazywait; 1672 1673void pmap_lazyfix_action(void); 1674 1675void 1676pmap_lazyfix_action(void) 1677{ 1678 cpumask_t mymask = PCPU_GET(cpumask); 1679 1680#ifdef COUNT_IPIS 1681 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++; 1682#endif 1683 if (rcr3() == lazyptd) 1684 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1685 atomic_clear_int(lazymask, mymask); 1686 atomic_store_rel_int(&lazywait, 1); 1687} 1688 1689static void 1690pmap_lazyfix_self(cpumask_t mymask) 1691{ 1692 1693 if (rcr3() == lazyptd) 1694 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1695 atomic_clear_int(lazymask, mymask); 1696} 1697 1698 1699static void 1700pmap_lazyfix(pmap_t pmap) 1701{ 1702 cpumask_t mymask, mask; 1703 u_int spins; 1704 1705 while ((mask = pmap->pm_active) != 0) { 1706 spins = 50000000; 1707 mask = mask & -mask; /* Find least significant set bit */ 1708 mtx_lock_spin(&smp_ipi_mtx); 1709#ifdef PAE 1710 lazyptd = vtophys(pmap->pm_pdpt); 1711#else 1712 lazyptd = vtophys(pmap->pm_pdir); 1713#endif 1714 mymask = PCPU_GET(cpumask); 1715 if (mask == mymask) { 1716 lazymask = &pmap->pm_active; 1717 pmap_lazyfix_self(mymask); 1718 } else { 1719 atomic_store_rel_int((u_int *)&lazymask, 1720 (u_int)&pmap->pm_active); 1721 atomic_store_rel_int(&lazywait, 0); 1722 ipi_selected(mask, IPI_LAZYPMAP); 1723 while (lazywait == 0) { 1724 ia32_pause(); 1725 if (--spins == 0) 1726 break; 1727 } 1728 } 1729 mtx_unlock_spin(&smp_ipi_mtx); 1730 if (spins == 0) 1731 printf("pmap_lazyfix: spun for 50000000\n"); 1732 } 1733} 1734 1735#else /* SMP */ 1736 1737/* 1738 * Cleaning up on uniprocessor is easy. For various reasons, we're 1739 * unlikely to have to even execute this code, including the fact 1740 * that the cleanup is deferred until the parent does a wait(2), which 1741 * means that another userland process has run. 1742 */ 1743static void 1744pmap_lazyfix(pmap_t pmap) 1745{ 1746 u_int cr3; 1747 1748 cr3 = vtophys(pmap->pm_pdir); 1749 if (cr3 == rcr3()) { 1750 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1751 pmap->pm_active &= ~(PCPU_GET(cpumask)); 1752 } 1753} 1754#endif /* SMP */ 1755 1756/* 1757 * Release any resources held by the given physical map. 1758 * Called when a pmap initialized by pmap_pinit is being released. 1759 * Should only be called if the map contains no valid mappings. 1760 */ 1761void 1762pmap_release(pmap_t pmap) 1763{ 1764 vm_page_t m, ptdpg[2*NPGPTD+1]; 1765 vm_paddr_t ma; 1766 int i; 1767#ifdef PAE 1768 int npgptd = NPGPTD + 1; 1769#else 1770 int npgptd = NPGPTD; 1771#endif 1772 KASSERT(pmap->pm_stats.resident_count == 0, 1773 ("pmap_release: pmap resident count %ld != 0", 1774 pmap->pm_stats.resident_count)); 1775 PT_UPDATES_FLUSH(); 1776 1777 pmap_lazyfix(pmap); 1778 mtx_lock_spin(&allpmaps_lock); 1779 LIST_REMOVE(pmap, pm_list); 1780 mtx_unlock_spin(&allpmaps_lock); 1781 1782 for (i = 0; i < NPGPTD; i++) 1783 ptdpg[i] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdir + (i*NPDEPG)) & PG_FRAME); 1784 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1785#ifdef PAE 1786 ptdpg[NPGPTD] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdpt)); 1787#endif 1788 1789 for (i = 0; i < npgptd; i++) { 1790 m = ptdpg[i]; 1791 ma = VM_PAGE_TO_MACH(m); 1792 /* unpinning L1 and L2 treated the same */ 1793#if 0 1794 xen_pgd_unpin(ma); 1795#else 1796 if (i == NPGPTD) 1797 xen_pgd_unpin(ma); 1798#endif 1799#ifdef PAE 1800 if (i < NPGPTD) 1801 KASSERT(VM_PAGE_TO_MACH(m) == (pmap->pm_pdpt[i] & PG_FRAME), 1802 ("pmap_release: got wrong ptd page")); 1803#endif 1804 m->wire_count--; 1805 atomic_subtract_int(&cnt.v_wire_count, 1); 1806 vm_page_free(m); 1807 } 1808#ifdef PAE 1809 pmap_qremove((vm_offset_t)pmap->pm_pdpt, 1); 1810#endif 1811 PMAP_LOCK_DESTROY(pmap); 1812} 1813 1814static int 1815kvm_size(SYSCTL_HANDLER_ARGS) 1816{ 1817 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1818 1819 return sysctl_handle_long(oidp, &ksize, 0, req); 1820} 1821SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1822 0, 0, kvm_size, "IU", "Size of KVM"); 1823 1824static int 1825kvm_free(SYSCTL_HANDLER_ARGS) 1826{ 1827 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1828 1829 return sysctl_handle_long(oidp, &kfree, 0, req); 1830} 1831SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1832 0, 0, kvm_free, "IU", "Amount of KVM free"); 1833 1834/* 1835 * grow the number of kernel page table entries, if needed 1836 */ 1837void 1838pmap_growkernel(vm_offset_t addr) 1839{ 1840 struct pmap *pmap; 1841 vm_paddr_t ptppaddr; 1842 vm_page_t nkpg; 1843 pd_entry_t newpdir; 1844 1845 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1846 if (kernel_vm_end == 0) { 1847 kernel_vm_end = KERNBASE; 1848 nkpt = 0; 1849 while (pdir_pde(PTD, kernel_vm_end)) { 1850 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1851 nkpt++; 1852 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1853 kernel_vm_end = kernel_map->max_offset; 1854 break; 1855 } 1856 } 1857 } 1858 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1859 if (addr - 1 >= kernel_map->max_offset) 1860 addr = kernel_map->max_offset; 1861 while (kernel_vm_end < addr) { 1862 if (pdir_pde(PTD, kernel_vm_end)) { 1863 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1864 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1865 kernel_vm_end = kernel_map->max_offset; 1866 break; 1867 } 1868 continue; 1869 } 1870 1871 /* 1872 * This index is bogus, but out of the way 1873 */ 1874 nkpg = vm_page_alloc(NULL, nkpt, 1875 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1876 if (!nkpg) 1877 panic("pmap_growkernel: no memory to grow kernel"); 1878 1879 nkpt++; 1880 1881 pmap_zero_page(nkpg); 1882 ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1883 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1884 vm_page_lock_queues(); 1885 PD_SET_VA(kernel_pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE); 1886 mtx_lock_spin(&allpmaps_lock); 1887 LIST_FOREACH(pmap, &allpmaps, pm_list) 1888 PD_SET_VA(pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE); 1889 1890 mtx_unlock_spin(&allpmaps_lock); 1891 vm_page_unlock_queues(); 1892 1893 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1894 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1895 kernel_vm_end = kernel_map->max_offset; 1896 break; 1897 } 1898 } 1899} 1900 1901 1902/*************************************************** 1903 * page management routines. 1904 ***************************************************/ 1905 1906CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE); 1907CTASSERT(_NPCM == 11); 1908 1909static __inline struct pv_chunk * 1910pv_to_chunk(pv_entry_t pv) 1911{ 1912 1913 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK); 1914} 1915 1916#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap) 1917 1918#define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */ 1919#define PC_FREE10 0x0000fffful /* Free values for index 10 */ 1920 1921static uint32_t pc_freemask[11] = { 1922 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1923 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1924 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1925 PC_FREE0_9, PC_FREE10 1926}; 1927 1928SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0, 1929 "Current number of pv entries"); 1930 1931#ifdef PV_STATS 1932static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail; 1933 1934SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0, 1935 "Current number of pv entry chunks"); 1936SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0, 1937 "Current number of pv entry chunks allocated"); 1938SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0, 1939 "Current number of pv entry chunks frees"); 1940SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0, 1941 "Number of times tried to get a chunk page but failed."); 1942 1943static long pv_entry_frees, pv_entry_allocs; 1944static int pv_entry_spare; 1945 1946SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0, 1947 "Current number of pv entry frees"); 1948SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0, 1949 "Current number of pv entry allocs"); 1950SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0, 1951 "Current number of spare pv entries"); 1952 1953static int pmap_collect_inactive, pmap_collect_active; 1954 1955SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0, 1956 "Current number times pmap_collect called on inactive queue"); 1957SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0, 1958 "Current number times pmap_collect called on active queue"); 1959#endif 1960 1961/* 1962 * We are in a serious low memory condition. Resort to 1963 * drastic measures to free some pages so we can allocate 1964 * another pv entry chunk. This is normally called to 1965 * unmap inactive pages, and if necessary, active pages. 1966 */ 1967static void 1968pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq) 1969{ 1970 pmap_t pmap; 1971 pt_entry_t *pte, tpte; 1972 pv_entry_t next_pv, pv; 1973 vm_offset_t va; 1974 vm_page_t m, free; 1975 1976 sched_pin(); 1977 TAILQ_FOREACH(m, &vpq->pl, pageq) { 1978 if (m->hold_count || m->busy) 1979 continue; 1980 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) { 1981 va = pv->pv_va; 1982 pmap = PV_PMAP(pv); 1983 /* Avoid deadlock and lock recursion. */ 1984 if (pmap > locked_pmap) 1985 PMAP_LOCK(pmap); 1986 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) 1987 continue; 1988 pmap->pm_stats.resident_count--; 1989 pte = pmap_pte_quick(pmap, va); 1990 tpte = pte_load_clear(pte); 1991 KASSERT((tpte & PG_W) == 0, 1992 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte)); 1993 if (tpte & PG_A) 1994 vm_page_flag_set(m, PG_REFERENCED); 1995 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) 1996 vm_page_dirty(m); 1997 free = NULL; 1998 pmap_unuse_pt(pmap, va, &free); 1999 pmap_invalidate_page(pmap, va); 2000 pmap_free_zero_pages(free); 2001 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2002 free_pv_entry(pmap, pv); 2003 if (pmap != locked_pmap) 2004 PMAP_UNLOCK(pmap); 2005 } 2006 if (TAILQ_EMPTY(&m->md.pv_list)) 2007 vm_page_flag_clear(m, PG_WRITEABLE); 2008 } 2009 sched_unpin(); 2010} 2011 2012 2013/* 2014 * free the pv_entry back to the free list 2015 */ 2016static void 2017free_pv_entry(pmap_t pmap, pv_entry_t pv) 2018{ 2019 vm_page_t m; 2020 struct pv_chunk *pc; 2021 int idx, field, bit; 2022 2023 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2024 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2025 PV_STAT(pv_entry_frees++); 2026 PV_STAT(pv_entry_spare++); 2027 pv_entry_count--; 2028 pc = pv_to_chunk(pv); 2029 idx = pv - &pc->pc_pventry[0]; 2030 field = idx / 32; 2031 bit = idx % 32; 2032 pc->pc_map[field] |= 1ul << bit; 2033 /* move to head of list */ 2034 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2035 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2036 for (idx = 0; idx < _NPCM; idx++) 2037 if (pc->pc_map[idx] != pc_freemask[idx]) 2038 return; 2039 PV_STAT(pv_entry_spare -= _NPCPV); 2040 PV_STAT(pc_chunk_count--); 2041 PV_STAT(pc_chunk_frees++); 2042 /* entire chunk is free, return it */ 2043 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2044 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 2045 pmap_qremove((vm_offset_t)pc, 1); 2046 vm_page_unwire(m, 0); 2047 vm_page_free(m); 2048 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 2049} 2050 2051/* 2052 * get a new pv_entry, allocating a block from the system 2053 * when needed. 2054 */ 2055static pv_entry_t 2056get_pv_entry(pmap_t pmap, int try) 2057{ 2058 static const struct timeval printinterval = { 60, 0 }; 2059 static struct timeval lastprint; 2060 static vm_pindex_t colour; 2061 struct vpgqueues *pq; 2062 int bit, field; 2063 pv_entry_t pv; 2064 struct pv_chunk *pc; 2065 vm_page_t m; 2066 2067 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2068 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2069 PV_STAT(pv_entry_allocs++); 2070 pv_entry_count++; 2071 if (pv_entry_count > pv_entry_high_water) 2072 if (ratecheck(&lastprint, &printinterval)) 2073 printf("Approaching the limit on PV entries, consider " 2074 "increasing either the vm.pmap.shpgperproc or the " 2075 "vm.pmap.pv_entry_max tunable.\n"); 2076 pq = NULL; 2077retry: 2078 pc = TAILQ_FIRST(&pmap->pm_pvchunk); 2079 if (pc != NULL) { 2080 for (field = 0; field < _NPCM; field++) { 2081 if (pc->pc_map[field]) { 2082 bit = bsfl(pc->pc_map[field]); 2083 break; 2084 } 2085 } 2086 if (field < _NPCM) { 2087 pv = &pc->pc_pventry[field * 32 + bit]; 2088 pc->pc_map[field] &= ~(1ul << bit); 2089 /* If this was the last item, move it to tail */ 2090 for (field = 0; field < _NPCM; field++) 2091 if (pc->pc_map[field] != 0) { 2092 PV_STAT(pv_entry_spare--); 2093 return (pv); /* not full, return */ 2094 } 2095 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2096 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); 2097 PV_STAT(pv_entry_spare--); 2098 return (pv); 2099 } 2100 } 2101 /* 2102 * Access to the ptelist "pv_vafree" is synchronized by the page 2103 * queues lock. If "pv_vafree" is currently non-empty, it will 2104 * remain non-empty until pmap_ptelist_alloc() completes. 2105 */ 2106 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq == 2107 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) | 2108 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) { 2109 if (try) { 2110 pv_entry_count--; 2111 PV_STAT(pc_chunk_tryfail++); 2112 return (NULL); 2113 } 2114 /* 2115 * Reclaim pv entries: At first, destroy mappings to 2116 * inactive pages. After that, if a pv chunk entry 2117 * is still needed, destroy mappings to active pages. 2118 */ 2119 if (pq == NULL) { 2120 PV_STAT(pmap_collect_inactive++); 2121 pq = &vm_page_queues[PQ_INACTIVE]; 2122 } else if (pq == &vm_page_queues[PQ_INACTIVE]) { 2123 PV_STAT(pmap_collect_active++); 2124 pq = &vm_page_queues[PQ_ACTIVE]; 2125 } else 2126 panic("get_pv_entry: increase vm.pmap.shpgperproc"); 2127 pmap_collect(pmap, pq); 2128 goto retry; 2129 } 2130 PV_STAT(pc_chunk_count++); 2131 PV_STAT(pc_chunk_allocs++); 2132 colour++; 2133 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 2134 pmap_qenter((vm_offset_t)pc, &m, 1); 2135 if ((m->flags & PG_ZERO) == 0) 2136 pagezero(pc); 2137 pc->pc_pmap = pmap; 2138 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */ 2139 for (field = 1; field < _NPCM; field++) 2140 pc->pc_map[field] = pc_freemask[field]; 2141 pv = &pc->pc_pventry[0]; 2142 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2143 PV_STAT(pv_entry_spare += _NPCPV - 1); 2144 return (pv); 2145} 2146 2147static __inline pv_entry_t 2148pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va) 2149{ 2150 pv_entry_t pv; 2151 2152 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2153 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) { 2154 if (pmap == PV_PMAP(pv) && va == pv->pv_va) { 2155 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list); 2156 break; 2157 } 2158 } 2159 return (pv); 2160} 2161 2162static void 2163pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va) 2164{ 2165 pv_entry_t pv; 2166 2167 pv = pmap_pvh_remove(pvh, pmap, va); 2168 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found")); 2169 free_pv_entry(pmap, pv); 2170} 2171 2172static void 2173pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 2174{ 2175 2176 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2177 pmap_pvh_free(&m->md, pmap, va); 2178 if (TAILQ_EMPTY(&m->md.pv_list)) 2179 vm_page_flag_clear(m, PG_WRITEABLE); 2180} 2181 2182/* 2183 * Conditionally create a pv entry. 2184 */ 2185static boolean_t 2186pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2187{ 2188 pv_entry_t pv; 2189 2190 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2191 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2192 if (pv_entry_count < pv_entry_high_water && 2193 (pv = get_pv_entry(pmap, TRUE)) != NULL) { 2194 pv->pv_va = va; 2195 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2196 return (TRUE); 2197 } else 2198 return (FALSE); 2199} 2200 2201/* 2202 * pmap_remove_pte: do the things to unmap a page in a process 2203 */ 2204static int 2205pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free) 2206{ 2207 pt_entry_t oldpte; 2208 vm_page_t m; 2209 2210 CTR3(KTR_PMAP, "pmap_remove_pte: pmap=%p *ptq=0x%x va=0x%x", 2211 pmap, (u_long)*ptq, va); 2212 2213 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2214 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2215 oldpte = *ptq; 2216 PT_SET_VA_MA(ptq, 0, TRUE); 2217 if (oldpte & PG_W) 2218 pmap->pm_stats.wired_count -= 1; 2219 /* 2220 * Machines that don't support invlpg, also don't support 2221 * PG_G. 2222 */ 2223 if (oldpte & PG_G) 2224 pmap_invalidate_page(kernel_pmap, va); 2225 pmap->pm_stats.resident_count -= 1; 2226 /* 2227 * XXX This is not strictly correctly, but somewhere along the line 2228 * we are losing the managed bit on some pages. It is unclear to me 2229 * why, but I think the most likely explanation is that xen's writable 2230 * page table implementation doesn't respect the unused bits. 2231 */ 2232 if ((oldpte & PG_MANAGED) || ((oldpte & PG_V) && (va < VM_MAXUSER_ADDRESS)) 2233 ) { 2234 m = PHYS_TO_VM_PAGE(xpmap_mtop(oldpte) & PG_FRAME); 2235 2236 if (!(oldpte & PG_MANAGED)) 2237 printf("va=0x%x is unmanaged :-( pte=0x%llx\n", va, oldpte); 2238 2239 if ((oldpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) 2240 vm_page_dirty(m); 2241 if (oldpte & PG_A) 2242 vm_page_flag_set(m, PG_REFERENCED); 2243 pmap_remove_entry(pmap, m, va); 2244 } else if ((va < VM_MAXUSER_ADDRESS) && (oldpte & PG_V)) 2245 printf("va=0x%x is unmanaged :-( pte=0x%llx\n", va, oldpte); 2246 2247 return (pmap_unuse_pt(pmap, va, free)); 2248} 2249 2250/* 2251 * Remove a single page from a process address space 2252 */ 2253static void 2254pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free) 2255{ 2256 pt_entry_t *pte; 2257 2258 CTR2(KTR_PMAP, "pmap_remove_page: pmap=%p va=0x%x", 2259 pmap, va); 2260 2261 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2262 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 2263 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2264 if ((pte = pmap_pte_quick(pmap, va)) == NULL || (*pte & PG_V) == 0) 2265 return; 2266 pmap_remove_pte(pmap, pte, va, free); 2267 pmap_invalidate_page(pmap, va); 2268 if (*PMAP1) 2269 PT_SET_MA(PADDR1, 0); 2270 2271} 2272 2273/* 2274 * Remove the given range of addresses from the specified map. 2275 * 2276 * It is assumed that the start and end are properly 2277 * rounded to the page size. 2278 */ 2279void 2280pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 2281{ 2282 vm_offset_t pdnxt; 2283 pd_entry_t ptpaddr; 2284 pt_entry_t *pte; 2285 vm_page_t free = NULL; 2286 int anyvalid; 2287 2288 CTR3(KTR_PMAP, "pmap_remove: pmap=%p sva=0x%x eva=0x%x", 2289 pmap, sva, eva); 2290 2291 /* 2292 * Perform an unsynchronized read. This is, however, safe. 2293 */ 2294 if (pmap->pm_stats.resident_count == 0) 2295 return; 2296 2297 anyvalid = 0; 2298 2299 vm_page_lock_queues(); 2300 sched_pin(); 2301 PMAP_LOCK(pmap); 2302 2303 /* 2304 * special handling of removing one page. a very 2305 * common operation and easy to short circuit some 2306 * code. 2307 */ 2308 if ((sva + PAGE_SIZE == eva) && 2309 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 2310 pmap_remove_page(pmap, sva, &free); 2311 goto out; 2312 } 2313 2314 for (; sva < eva; sva = pdnxt) { 2315 unsigned pdirindex; 2316 2317 /* 2318 * Calculate index for next page table. 2319 */ 2320 pdnxt = (sva + NBPDR) & ~PDRMASK; 2321 if (pmap->pm_stats.resident_count == 0) 2322 break; 2323 2324 pdirindex = sva >> PDRSHIFT; 2325 ptpaddr = pmap->pm_pdir[pdirindex]; 2326 2327 /* 2328 * Weed out invalid mappings. Note: we assume that the page 2329 * directory table is always allocated, and in kernel virtual. 2330 */ 2331 if (ptpaddr == 0) 2332 continue; 2333 2334 /* 2335 * Check for large page. 2336 */ 2337 if ((ptpaddr & PG_PS) != 0) { 2338 PD_CLEAR_VA(pmap, pdirindex, TRUE); 2339 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 2340 anyvalid = 1; 2341 continue; 2342 } 2343 2344 /* 2345 * Limit our scan to either the end of the va represented 2346 * by the current page table page, or to the end of the 2347 * range being removed. 2348 */ 2349 if (pdnxt > eva) 2350 pdnxt = eva; 2351 2352 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2353 sva += PAGE_SIZE) { 2354 if ((*pte & PG_V) == 0) 2355 continue; 2356 2357 /* 2358 * The TLB entry for a PG_G mapping is invalidated 2359 * by pmap_remove_pte(). 2360 */ 2361 if ((*pte & PG_G) == 0) 2362 anyvalid = 1; 2363 if (pmap_remove_pte(pmap, pte, sva, &free)) 2364 break; 2365 } 2366 } 2367 PT_UPDATES_FLUSH(); 2368 if (*PMAP1) 2369 PT_SET_VA_MA(PMAP1, 0, TRUE); 2370out: 2371 if (anyvalid) 2372 pmap_invalidate_all(pmap); 2373 sched_unpin(); 2374 vm_page_unlock_queues(); 2375 PMAP_UNLOCK(pmap); 2376 pmap_free_zero_pages(free); 2377} 2378 2379/* 2380 * Routine: pmap_remove_all 2381 * Function: 2382 * Removes this physical page from 2383 * all physical maps in which it resides. 2384 * Reflects back modify bits to the pager. 2385 * 2386 * Notes: 2387 * Original versions of this routine were very 2388 * inefficient because they iteratively called 2389 * pmap_remove (slow...) 2390 */ 2391 2392void 2393pmap_remove_all(vm_page_t m) 2394{ 2395 pv_entry_t pv; 2396 pmap_t pmap; 2397 pt_entry_t *pte, tpte; 2398 vm_page_t free; 2399 2400 KASSERT((m->flags & PG_FICTITIOUS) == 0, 2401 ("pmap_remove_all: page %p is fictitious", m)); 2402 free = NULL; 2403 vm_page_lock_queues(); 2404 sched_pin(); 2405 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2406 pmap = PV_PMAP(pv); 2407 PMAP_LOCK(pmap); 2408 pmap->pm_stats.resident_count--; 2409 pte = pmap_pte_quick(pmap, pv->pv_va); 2410 2411 tpte = *pte; 2412 PT_SET_VA_MA(pte, 0, TRUE); 2413 if (tpte & PG_W) 2414 pmap->pm_stats.wired_count--; 2415 if (tpte & PG_A) 2416 vm_page_flag_set(m, PG_REFERENCED); 2417 2418 /* 2419 * Update the vm_page_t clean and reference bits. 2420 */ 2421 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) 2422 vm_page_dirty(m); 2423 pmap_unuse_pt(pmap, pv->pv_va, &free); 2424 pmap_invalidate_page(pmap, pv->pv_va); 2425 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2426 free_pv_entry(pmap, pv); 2427 PMAP_UNLOCK(pmap); 2428 } 2429 vm_page_flag_clear(m, PG_WRITEABLE); 2430 PT_UPDATES_FLUSH(); 2431 if (*PMAP1) 2432 PT_SET_MA(PADDR1, 0); 2433 sched_unpin(); 2434 vm_page_unlock_queues(); 2435 pmap_free_zero_pages(free); 2436} 2437 2438/* 2439 * Set the physical protection on the 2440 * specified range of this map as requested. 2441 */ 2442void 2443pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 2444{ 2445 vm_offset_t pdnxt; 2446 pd_entry_t ptpaddr; 2447 pt_entry_t *pte; 2448 int anychanged; 2449 2450 CTR4(KTR_PMAP, "pmap_protect: pmap=%p sva=0x%x eva=0x%x prot=0x%x", 2451 pmap, sva, eva, prot); 2452 2453 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 2454 pmap_remove(pmap, sva, eva); 2455 return; 2456 } 2457 2458#ifdef PAE 2459 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) == 2460 (VM_PROT_WRITE|VM_PROT_EXECUTE)) 2461 return; 2462#else 2463 if (prot & VM_PROT_WRITE) 2464 return; 2465#endif 2466 2467 anychanged = 0; 2468 2469 vm_page_lock_queues(); 2470 sched_pin(); 2471 PMAP_LOCK(pmap); 2472 for (; sva < eva; sva = pdnxt) { 2473 pt_entry_t obits, pbits; 2474 unsigned pdirindex; 2475 2476 pdnxt = (sva + NBPDR) & ~PDRMASK; 2477 2478 pdirindex = sva >> PDRSHIFT; 2479 ptpaddr = pmap->pm_pdir[pdirindex]; 2480 2481 /* 2482 * Weed out invalid mappings. Note: we assume that the page 2483 * directory table is always allocated, and in kernel virtual. 2484 */ 2485 if (ptpaddr == 0) 2486 continue; 2487 2488 /* 2489 * Check for large page. 2490 */ 2491 if ((ptpaddr & PG_PS) != 0) { 2492 if ((prot & VM_PROT_WRITE) == 0) 2493 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW); 2494#ifdef PAE 2495 if ((prot & VM_PROT_EXECUTE) == 0) 2496 pmap->pm_pdir[pdirindex] |= pg_nx; 2497#endif 2498 anychanged = 1; 2499 continue; 2500 } 2501 2502 if (pdnxt > eva) 2503 pdnxt = eva; 2504 2505 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2506 sva += PAGE_SIZE) { 2507 vm_page_t m; 2508 2509retry: 2510 /* 2511 * Regardless of whether a pte is 32 or 64 bits in 2512 * size, PG_RW, PG_A, and PG_M are among the least 2513 * significant 32 bits. 2514 */ 2515 obits = pbits = *pte; 2516 if ((pbits & PG_V) == 0) 2517 continue; 2518 2519 if ((prot & VM_PROT_WRITE) == 0) { 2520 if ((pbits & (PG_MANAGED | PG_M | PG_RW)) == 2521 (PG_MANAGED | PG_M | PG_RW)) { 2522 m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) & 2523 PG_FRAME); 2524 vm_page_dirty(m); 2525 } 2526 pbits &= ~(PG_RW | PG_M); 2527 } 2528#ifdef PAE 2529 if ((prot & VM_PROT_EXECUTE) == 0) 2530 pbits |= pg_nx; 2531#endif 2532 2533 if (pbits != obits) { 2534 obits = *pte; 2535 PT_SET_VA_MA(pte, pbits, TRUE); 2536 if (*pte != pbits) 2537 goto retry; 2538 if (obits & PG_G) 2539 pmap_invalidate_page(pmap, sva); 2540 else 2541 anychanged = 1; 2542 } 2543 } 2544 } 2545 PT_UPDATES_FLUSH(); 2546 if (*PMAP1) 2547 PT_SET_VA_MA(PMAP1, 0, TRUE); 2548 if (anychanged) 2549 pmap_invalidate_all(pmap); 2550 sched_unpin(); 2551 vm_page_unlock_queues(); 2552 PMAP_UNLOCK(pmap); 2553} 2554 2555/* 2556 * Insert the given physical page (p) at 2557 * the specified virtual address (v) in the 2558 * target physical map with the protection requested. 2559 * 2560 * If specified, the page will be wired down, meaning 2561 * that the related pte can not be reclaimed. 2562 * 2563 * NB: This is the only routine which MAY NOT lazy-evaluate 2564 * or lose information. That is, this routine must actually 2565 * insert this page into the given map NOW. 2566 */ 2567void 2568pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m, 2569 vm_prot_t prot, boolean_t wired) 2570{ 2571 pd_entry_t *pde; 2572 pt_entry_t *pte; 2573 pt_entry_t newpte, origpte; 2574 pv_entry_t pv; 2575 vm_paddr_t opa, pa; 2576 vm_page_t mpte, om; 2577 boolean_t invlva; 2578 2579 CTR6(KTR_PMAP, "pmap_enter: pmap=%08p va=0x%08x access=0x%x ma=0x%08x prot=0x%x wired=%d", 2580 pmap, va, access, VM_PAGE_TO_MACH(m), prot, wired); 2581 va = trunc_page(va); 2582 KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig")); 2583 KASSERT(va < UPT_MIN_ADDRESS || va >= UPT_MAX_ADDRESS, 2584 ("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", 2585 va)); 2586 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0 || 2587 (m->oflags & VPO_BUSY) != 0, 2588 ("pmap_enter: page %p is not busy", m)); 2589 2590 mpte = NULL; 2591 2592 vm_page_lock_queues(); 2593 PMAP_LOCK(pmap); 2594 sched_pin(); 2595 2596 /* 2597 * In the case that a page table page is not 2598 * resident, we are creating it here. 2599 */ 2600 if (va < VM_MAXUSER_ADDRESS) { 2601 mpte = pmap_allocpte(pmap, va, M_WAITOK); 2602 } 2603 2604 pde = pmap_pde(pmap, va); 2605 if ((*pde & PG_PS) != 0) 2606 panic("pmap_enter: attempted pmap_enter on 4MB page"); 2607 pte = pmap_pte_quick(pmap, va); 2608 2609 /* 2610 * Page Directory table entry not valid, we need a new PT page 2611 */ 2612 if (pte == NULL) { 2613 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x", 2614 (uintmax_t)pmap->pm_pdir[va >> PDRSHIFT], va); 2615 } 2616 2617 pa = VM_PAGE_TO_PHYS(m); 2618 om = NULL; 2619 opa = origpte = 0; 2620 2621#if 0 2622 KASSERT((*pte & PG_V) || (*pte == 0), ("address set but not valid pte=%p *pte=0x%016jx", 2623 pte, *pte)); 2624#endif 2625 origpte = *pte; 2626 if (origpte) 2627 origpte = xpmap_mtop(origpte); 2628 opa = origpte & PG_FRAME; 2629 2630 /* 2631 * Mapping has not changed, must be protection or wiring change. 2632 */ 2633 if (origpte && (opa == pa)) { 2634 /* 2635 * Wiring change, just update stats. We don't worry about 2636 * wiring PT pages as they remain resident as long as there 2637 * are valid mappings in them. Hence, if a user page is wired, 2638 * the PT page will be also. 2639 */ 2640 if (wired && ((origpte & PG_W) == 0)) 2641 pmap->pm_stats.wired_count++; 2642 else if (!wired && (origpte & PG_W)) 2643 pmap->pm_stats.wired_count--; 2644 2645 /* 2646 * Remove extra pte reference 2647 */ 2648 if (mpte) 2649 mpte->wire_count--; 2650 2651 if (origpte & PG_MANAGED) { 2652 om = m; 2653 pa |= PG_MANAGED; 2654 } 2655 goto validate; 2656 } 2657 2658 pv = NULL; 2659 2660 /* 2661 * Mapping has changed, invalidate old range and fall through to 2662 * handle validating new mapping. 2663 */ 2664 if (opa) { 2665 if (origpte & PG_W) 2666 pmap->pm_stats.wired_count--; 2667 if (origpte & PG_MANAGED) { 2668 om = PHYS_TO_VM_PAGE(opa); 2669 pv = pmap_pvh_remove(&om->md, pmap, va); 2670 } else if (va < VM_MAXUSER_ADDRESS) 2671 printf("va=0x%x is unmanaged :-( \n", va); 2672 2673 if (mpte != NULL) { 2674 mpte->wire_count--; 2675 KASSERT(mpte->wire_count > 0, 2676 ("pmap_enter: missing reference to page table page," 2677 " va: 0x%x", va)); 2678 } 2679 } else 2680 pmap->pm_stats.resident_count++; 2681 2682 /* 2683 * Enter on the PV list if part of our managed memory. 2684 */ 2685 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 2686 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva, 2687 ("pmap_enter: managed mapping within the clean submap")); 2688 if (pv == NULL) 2689 pv = get_pv_entry(pmap, FALSE); 2690 pv->pv_va = va; 2691 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2692 pa |= PG_MANAGED; 2693 } else if (pv != NULL) 2694 free_pv_entry(pmap, pv); 2695 2696 /* 2697 * Increment counters 2698 */ 2699 if (wired) 2700 pmap->pm_stats.wired_count++; 2701 2702validate: 2703 /* 2704 * Now validate mapping with desired protection/wiring. 2705 */ 2706 newpte = (pt_entry_t)(pa | PG_V); 2707 if ((prot & VM_PROT_WRITE) != 0) { 2708 newpte |= PG_RW; 2709 if ((newpte & PG_MANAGED) != 0) 2710 vm_page_flag_set(m, PG_WRITEABLE); 2711 } 2712#ifdef PAE 2713 if ((prot & VM_PROT_EXECUTE) == 0) 2714 newpte |= pg_nx; 2715#endif 2716 if (wired) 2717 newpte |= PG_W; 2718 if (va < VM_MAXUSER_ADDRESS) 2719 newpte |= PG_U; 2720 if (pmap == kernel_pmap) 2721 newpte |= pgeflag; 2722 2723 critical_enter(); 2724 /* 2725 * if the mapping or permission bits are different, we need 2726 * to update the pte. 2727 */ 2728 if ((origpte & ~(PG_M|PG_A)) != newpte) { 2729 if (origpte) { 2730 invlva = FALSE; 2731 origpte = *pte; 2732 PT_SET_VA(pte, newpte | PG_A, FALSE); 2733 if (origpte & PG_A) { 2734 if (origpte & PG_MANAGED) 2735 vm_page_flag_set(om, PG_REFERENCED); 2736 if (opa != VM_PAGE_TO_PHYS(m)) 2737 invlva = TRUE; 2738#ifdef PAE 2739 if ((origpte & PG_NX) == 0 && 2740 (newpte & PG_NX) != 0) 2741 invlva = TRUE; 2742#endif 2743 } 2744 if ((origpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) { 2745 if ((origpte & PG_MANAGED) != 0) 2746 vm_page_dirty(om); 2747 if ((prot & VM_PROT_WRITE) == 0) 2748 invlva = TRUE; 2749 } 2750 if ((origpte & PG_MANAGED) != 0 && 2751 TAILQ_EMPTY(&om->md.pv_list)) 2752 vm_page_flag_clear(om, PG_WRITEABLE); 2753 if (invlva) 2754 pmap_invalidate_page(pmap, va); 2755 } else{ 2756 PT_SET_VA(pte, newpte | PG_A, FALSE); 2757 } 2758 2759 } 2760 PT_UPDATES_FLUSH(); 2761 critical_exit(); 2762 if (*PMAP1) 2763 PT_SET_VA_MA(PMAP1, 0, TRUE); 2764 sched_unpin(); 2765 vm_page_unlock_queues(); 2766 PMAP_UNLOCK(pmap); 2767} 2768 2769/* 2770 * Maps a sequence of resident pages belonging to the same object. 2771 * The sequence begins with the given page m_start. This page is 2772 * mapped at the given virtual address start. Each subsequent page is 2773 * mapped at a virtual address that is offset from start by the same 2774 * amount as the page is offset from m_start within the object. The 2775 * last page in the sequence is the page with the largest offset from 2776 * m_start that can be mapped at a virtual address less than the given 2777 * virtual address end. Not every virtual page between start and end 2778 * is mapped; only those for which a resident page exists with the 2779 * corresponding offset from m_start are mapped. 2780 */ 2781void 2782pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, 2783 vm_page_t m_start, vm_prot_t prot) 2784{ 2785 vm_page_t m, mpte; 2786 vm_pindex_t diff, psize; 2787 multicall_entry_t mcl[16]; 2788 multicall_entry_t *mclp = mcl; 2789 int error, count = 0; 2790 2791 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED); 2792 psize = atop(end - start); 2793 2794 mpte = NULL; 2795 m = m_start; 2796 vm_page_lock_queues(); 2797 PMAP_LOCK(pmap); 2798 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { 2799 mpte = pmap_enter_quick_locked(&mclp, &count, pmap, start + ptoa(diff), m, 2800 prot, mpte); 2801 m = TAILQ_NEXT(m, listq); 2802 if (count == 16) { 2803 error = HYPERVISOR_multicall(mcl, count); 2804 KASSERT(error == 0, ("bad multicall %d", error)); 2805 mclp = mcl; 2806 count = 0; 2807 } 2808 } 2809 if (count) { 2810 error = HYPERVISOR_multicall(mcl, count); 2811 KASSERT(error == 0, ("bad multicall %d", error)); 2812 } 2813 vm_page_unlock_queues(); 2814 PMAP_UNLOCK(pmap); 2815} 2816 2817/* 2818 * this code makes some *MAJOR* assumptions: 2819 * 1. Current pmap & pmap exists. 2820 * 2. Not wired. 2821 * 3. Read access. 2822 * 4. No page table pages. 2823 * but is *MUCH* faster than pmap_enter... 2824 */ 2825 2826void 2827pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 2828{ 2829 multicall_entry_t mcl, *mclp; 2830 int count = 0; 2831 mclp = &mcl; 2832 2833 CTR4(KTR_PMAP, "pmap_enter_quick: pmap=%p va=0x%x m=%p prot=0x%x", 2834 pmap, va, m, prot); 2835 2836 vm_page_lock_queues(); 2837 PMAP_LOCK(pmap); 2838 (void)pmap_enter_quick_locked(&mclp, &count, pmap, va, m, prot, NULL); 2839 if (count) 2840 HYPERVISOR_multicall(&mcl, count); 2841 vm_page_unlock_queues(); 2842 PMAP_UNLOCK(pmap); 2843} 2844 2845#ifdef notyet 2846void 2847pmap_enter_quick_range(pmap_t pmap, vm_offset_t *addrs, vm_page_t *pages, vm_prot_t *prots, int count) 2848{ 2849 int i, error, index = 0; 2850 multicall_entry_t mcl[16]; 2851 multicall_entry_t *mclp = mcl; 2852 2853 PMAP_LOCK(pmap); 2854 for (i = 0; i < count; i++, addrs++, pages++, prots++) { 2855 if (!pmap_is_prefaultable_locked(pmap, *addrs)) 2856 continue; 2857 2858 (void) pmap_enter_quick_locked(&mclp, &index, pmap, *addrs, *pages, *prots, NULL); 2859 if (index == 16) { 2860 error = HYPERVISOR_multicall(mcl, index); 2861 mclp = mcl; 2862 index = 0; 2863 KASSERT(error == 0, ("bad multicall %d", error)); 2864 } 2865 } 2866 if (index) { 2867 error = HYPERVISOR_multicall(mcl, index); 2868 KASSERT(error == 0, ("bad multicall %d", error)); 2869 } 2870 2871 PMAP_UNLOCK(pmap); 2872} 2873#endif 2874 2875static vm_page_t 2876pmap_enter_quick_locked(multicall_entry_t **mclpp, int *count, pmap_t pmap, vm_offset_t va, vm_page_t m, 2877 vm_prot_t prot, vm_page_t mpte) 2878{ 2879 pt_entry_t *pte; 2880 vm_paddr_t pa; 2881 vm_page_t free; 2882 multicall_entry_t *mcl = *mclpp; 2883 2884 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva || 2885 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0, 2886 ("pmap_enter_quick_locked: managed mapping within the clean submap")); 2887 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2888 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2889 2890 /* 2891 * In the case that a page table page is not 2892 * resident, we are creating it here. 2893 */ 2894 if (va < VM_MAXUSER_ADDRESS) { 2895 unsigned ptepindex; 2896 pd_entry_t ptema; 2897 2898 /* 2899 * Calculate pagetable page index 2900 */ 2901 ptepindex = va >> PDRSHIFT; 2902 if (mpte && (mpte->pindex == ptepindex)) { 2903 mpte->wire_count++; 2904 } else { 2905 /* 2906 * Get the page directory entry 2907 */ 2908 ptema = pmap->pm_pdir[ptepindex]; 2909 2910 /* 2911 * If the page table page is mapped, we just increment 2912 * the hold count, and activate it. 2913 */ 2914 if (ptema & PG_V) { 2915 if (ptema & PG_PS) 2916 panic("pmap_enter_quick: unexpected mapping into 4MB page"); 2917 mpte = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME); 2918 mpte->wire_count++; 2919 } else { 2920 mpte = _pmap_allocpte(pmap, ptepindex, 2921 M_NOWAIT); 2922 if (mpte == NULL) 2923 return (mpte); 2924 } 2925 } 2926 } else { 2927 mpte = NULL; 2928 } 2929 2930 /* 2931 * This call to vtopte makes the assumption that we are 2932 * entering the page into the current pmap. In order to support 2933 * quick entry into any pmap, one would likely use pmap_pte_quick. 2934 * But that isn't as quick as vtopte. 2935 */ 2936 KASSERT(pmap_is_current(pmap), ("entering pages in non-current pmap")); 2937 pte = vtopte(va); 2938 if (*pte & PG_V) { 2939 if (mpte != NULL) { 2940 mpte->wire_count--; 2941 mpte = NULL; 2942 } 2943 return (mpte); 2944 } 2945 2946 /* 2947 * Enter on the PV list if part of our managed memory. 2948 */ 2949 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 && 2950 !pmap_try_insert_pv_entry(pmap, va, m)) { 2951 if (mpte != NULL) { 2952 free = NULL; 2953 if (pmap_unwire_pte_hold(pmap, mpte, &free)) { 2954 pmap_invalidate_page(pmap, va); 2955 pmap_free_zero_pages(free); 2956 } 2957 2958 mpte = NULL; 2959 } 2960 return (mpte); 2961 } 2962 2963 /* 2964 * Increment counters 2965 */ 2966 pmap->pm_stats.resident_count++; 2967 2968 pa = VM_PAGE_TO_PHYS(m); 2969#ifdef PAE 2970 if ((prot & VM_PROT_EXECUTE) == 0) 2971 pa |= pg_nx; 2972#endif 2973 2974#if 0 2975 /* 2976 * Now validate mapping with RO protection 2977 */ 2978 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 2979 pte_store(pte, pa | PG_V | PG_U); 2980 else 2981 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 2982#else 2983 /* 2984 * Now validate mapping with RO protection 2985 */ 2986 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 2987 pa = xpmap_ptom(pa | PG_V | PG_U); 2988 else 2989 pa = xpmap_ptom(pa | PG_V | PG_U | PG_MANAGED); 2990 2991 mcl->op = __HYPERVISOR_update_va_mapping; 2992 mcl->args[0] = va; 2993 mcl->args[1] = (uint32_t)(pa & 0xffffffff); 2994 mcl->args[2] = (uint32_t)(pa >> 32); 2995 mcl->args[3] = 0; 2996 *mclpp = mcl + 1; 2997 *count = *count + 1; 2998#endif 2999 return mpte; 3000} 3001 3002/* 3003 * Make a temporary mapping for a physical address. This is only intended 3004 * to be used for panic dumps. 3005 */ 3006void * 3007pmap_kenter_temporary(vm_paddr_t pa, int i) 3008{ 3009 vm_offset_t va; 3010 vm_paddr_t ma = xpmap_ptom(pa); 3011 3012 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 3013 PT_SET_MA(va, (ma & ~PAGE_MASK) | PG_V | pgeflag); 3014 invlpg(va); 3015 return ((void *)crashdumpmap); 3016} 3017 3018/* 3019 * This code maps large physical mmap regions into the 3020 * processor address space. Note that some shortcuts 3021 * are taken, but the code works. 3022 */ 3023void 3024pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 3025 vm_object_t object, vm_pindex_t pindex, 3026 vm_size_t size) 3027{ 3028 pd_entry_t *pde; 3029 vm_paddr_t pa, ptepa; 3030 vm_page_t p; 3031 int pat_mode; 3032 3033 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 3034 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG, 3035 ("pmap_object_init_pt: non-device object")); 3036 if (pseflag && 3037 (addr & (NBPDR - 1)) == 0 && (size & (NBPDR - 1)) == 0) { 3038 if (!vm_object_populate(object, pindex, pindex + atop(size))) 3039 return; 3040 p = vm_page_lookup(object, pindex); 3041 KASSERT(p->valid == VM_PAGE_BITS_ALL, 3042 ("pmap_object_init_pt: invalid page %p", p)); 3043 pat_mode = p->md.pat_mode; 3044 /* 3045 * Abort the mapping if the first page is not physically 3046 * aligned to a 2/4MB page boundary. 3047 */ 3048 ptepa = VM_PAGE_TO_PHYS(p); 3049 if (ptepa & (NBPDR - 1)) 3050 return; 3051 /* 3052 * Skip the first page. Abort the mapping if the rest of 3053 * the pages are not physically contiguous or have differing 3054 * memory attributes. 3055 */ 3056 p = TAILQ_NEXT(p, listq); 3057 for (pa = ptepa + PAGE_SIZE; pa < ptepa + size; 3058 pa += PAGE_SIZE) { 3059 KASSERT(p->valid == VM_PAGE_BITS_ALL, 3060 ("pmap_object_init_pt: invalid page %p", p)); 3061 if (pa != VM_PAGE_TO_PHYS(p) || 3062 pat_mode != p->md.pat_mode) 3063 return; 3064 p = TAILQ_NEXT(p, listq); 3065 } 3066 /* Map using 2/4MB pages. */ 3067 PMAP_LOCK(pmap); 3068 for (pa = ptepa | pmap_cache_bits(pat_mode, 1); pa < ptepa + 3069 size; pa += NBPDR) { 3070 pde = pmap_pde(pmap, addr); 3071 if (*pde == 0) { 3072 pde_store(pde, pa | PG_PS | PG_M | PG_A | 3073 PG_U | PG_RW | PG_V); 3074 pmap->pm_stats.resident_count += NBPDR / 3075 PAGE_SIZE; 3076 pmap_pde_mappings++; 3077 } 3078 /* Else continue on if the PDE is already valid. */ 3079 addr += NBPDR; 3080 } 3081 PMAP_UNLOCK(pmap); 3082 } 3083} 3084 3085/* 3086 * Routine: pmap_change_wiring 3087 * Function: Change the wiring attribute for a map/virtual-address 3088 * pair. 3089 * In/out conditions: 3090 * The mapping must already exist in the pmap. 3091 */ 3092void 3093pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired) 3094{ 3095 pt_entry_t *pte; 3096 3097 vm_page_lock_queues(); 3098 PMAP_LOCK(pmap); 3099 pte = pmap_pte(pmap, va); 3100 3101 if (wired && !pmap_pte_w(pte)) { 3102 PT_SET_VA_MA((pte), *(pte) | PG_W, TRUE); 3103 pmap->pm_stats.wired_count++; 3104 } else if (!wired && pmap_pte_w(pte)) { 3105 PT_SET_VA_MA((pte), *(pte) & ~PG_W, TRUE); 3106 pmap->pm_stats.wired_count--; 3107 } 3108 3109 /* 3110 * Wiring is not a hardware characteristic so there is no need to 3111 * invalidate TLB. 3112 */ 3113 pmap_pte_release(pte); 3114 PMAP_UNLOCK(pmap); 3115 vm_page_unlock_queues(); 3116} 3117 3118 3119 3120/* 3121 * Copy the range specified by src_addr/len 3122 * from the source map to the range dst_addr/len 3123 * in the destination map. 3124 * 3125 * This routine is only advisory and need not do anything. 3126 */ 3127 3128void 3129pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 3130 vm_offset_t src_addr) 3131{ 3132 vm_page_t free; 3133 vm_offset_t addr; 3134 vm_offset_t end_addr = src_addr + len; 3135 vm_offset_t pdnxt; 3136 3137 if (dst_addr != src_addr) 3138 return; 3139 3140 if (!pmap_is_current(src_pmap)) { 3141 CTR2(KTR_PMAP, 3142 "pmap_copy, skipping: pdir[PTDPTDI]=0x%jx PTDpde[0]=0x%jx", 3143 (src_pmap->pm_pdir[PTDPTDI] & PG_FRAME), (PTDpde[0] & PG_FRAME)); 3144 3145 return; 3146 } 3147 CTR5(KTR_PMAP, "pmap_copy: dst_pmap=%p src_pmap=%p dst_addr=0x%x len=%d src_addr=0x%x", 3148 dst_pmap, src_pmap, dst_addr, len, src_addr); 3149 3150 vm_page_lock_queues(); 3151 if (dst_pmap < src_pmap) { 3152 PMAP_LOCK(dst_pmap); 3153 PMAP_LOCK(src_pmap); 3154 } else { 3155 PMAP_LOCK(src_pmap); 3156 PMAP_LOCK(dst_pmap); 3157 } 3158 sched_pin(); 3159 for (addr = src_addr; addr < end_addr; addr = pdnxt) { 3160 pt_entry_t *src_pte, *dst_pte; 3161 vm_page_t dstmpte, srcmpte; 3162 pd_entry_t srcptepaddr; 3163 unsigned ptepindex; 3164 3165 KASSERT(addr < UPT_MIN_ADDRESS, 3166 ("pmap_copy: invalid to pmap_copy page tables")); 3167 3168 pdnxt = (addr + NBPDR) & ~PDRMASK; 3169 ptepindex = addr >> PDRSHIFT; 3170 3171 srcptepaddr = PT_GET(&src_pmap->pm_pdir[ptepindex]); 3172 if (srcptepaddr == 0) 3173 continue; 3174 3175 if (srcptepaddr & PG_PS) { 3176 if (dst_pmap->pm_pdir[ptepindex] == 0) { 3177 PD_SET_VA(dst_pmap, ptepindex, srcptepaddr & ~PG_W, TRUE); 3178 dst_pmap->pm_stats.resident_count += 3179 NBPDR / PAGE_SIZE; 3180 } 3181 continue; 3182 } 3183 3184 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME); 3185 KASSERT(srcmpte->wire_count > 0, 3186 ("pmap_copy: source page table page is unused")); 3187 3188 if (pdnxt > end_addr) 3189 pdnxt = end_addr; 3190 3191 src_pte = vtopte(addr); 3192 while (addr < pdnxt) { 3193 pt_entry_t ptetemp; 3194 ptetemp = *src_pte; 3195 /* 3196 * we only virtual copy managed pages 3197 */ 3198 if ((ptetemp & PG_MANAGED) != 0) { 3199 dstmpte = pmap_allocpte(dst_pmap, addr, 3200 M_NOWAIT); 3201 if (dstmpte == NULL) 3202 break; 3203 dst_pte = pmap_pte_quick(dst_pmap, addr); 3204 if (*dst_pte == 0 && 3205 pmap_try_insert_pv_entry(dst_pmap, addr, 3206 PHYS_TO_VM_PAGE(xpmap_mtop(ptetemp) & PG_FRAME))) { 3207 /* 3208 * Clear the wired, modified, and 3209 * accessed (referenced) bits 3210 * during the copy. 3211 */ 3212 KASSERT(ptetemp != 0, ("src_pte not set")); 3213 PT_SET_VA_MA(dst_pte, ptetemp & ~(PG_W | PG_M | PG_A), TRUE /* XXX debug */); 3214 KASSERT(*dst_pte == (ptetemp & ~(PG_W | PG_M | PG_A)), 3215 ("no pmap copy expected: 0x%jx saw: 0x%jx", 3216 ptetemp & ~(PG_W | PG_M | PG_A), *dst_pte)); 3217 dst_pmap->pm_stats.resident_count++; 3218 } else { 3219 free = NULL; 3220 if (pmap_unwire_pte_hold(dst_pmap, 3221 dstmpte, &free)) { 3222 pmap_invalidate_page(dst_pmap, 3223 addr); 3224 pmap_free_zero_pages(free); 3225 } 3226 } 3227 if (dstmpte->wire_count >= srcmpte->wire_count) 3228 break; 3229 } 3230 addr += PAGE_SIZE; 3231 src_pte++; 3232 } 3233 } 3234 PT_UPDATES_FLUSH(); 3235 sched_unpin(); 3236 vm_page_unlock_queues(); 3237 PMAP_UNLOCK(src_pmap); 3238 PMAP_UNLOCK(dst_pmap); 3239} 3240 3241static __inline void 3242pagezero(void *page) 3243{ 3244#if defined(I686_CPU) 3245 if (cpu_class == CPUCLASS_686) { 3246#if defined(CPU_ENABLE_SSE) 3247 if (cpu_feature & CPUID_SSE2) 3248 sse2_pagezero(page); 3249 else 3250#endif 3251 i686_pagezero(page); 3252 } else 3253#endif 3254 bzero(page, PAGE_SIZE); 3255} 3256 3257/* 3258 * pmap_zero_page zeros the specified hardware page by mapping 3259 * the page into KVM and using bzero to clear its contents. 3260 */ 3261void 3262pmap_zero_page(vm_page_t m) 3263{ 3264 struct sysmaps *sysmaps; 3265 3266 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3267 mtx_lock(&sysmaps->lock); 3268 if (*sysmaps->CMAP2) 3269 panic("pmap_zero_page: CMAP2 busy"); 3270 sched_pin(); 3271 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | VM_PAGE_TO_MACH(m) | PG_A | PG_M); 3272 pagezero(sysmaps->CADDR2); 3273 PT_SET_MA(sysmaps->CADDR2, 0); 3274 sched_unpin(); 3275 mtx_unlock(&sysmaps->lock); 3276} 3277 3278/* 3279 * pmap_zero_page_area zeros the specified hardware page by mapping 3280 * the page into KVM and using bzero to clear its contents. 3281 * 3282 * off and size may not cover an area beyond a single hardware page. 3283 */ 3284void 3285pmap_zero_page_area(vm_page_t m, int off, int size) 3286{ 3287 struct sysmaps *sysmaps; 3288 3289 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3290 mtx_lock(&sysmaps->lock); 3291 if (*sysmaps->CMAP2) 3292 panic("pmap_zero_page: CMAP2 busy"); 3293 sched_pin(); 3294 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | VM_PAGE_TO_MACH(m) | PG_A | PG_M); 3295 3296 if (off == 0 && size == PAGE_SIZE) 3297 pagezero(sysmaps->CADDR2); 3298 else 3299 bzero((char *)sysmaps->CADDR2 + off, size); 3300 PT_SET_MA(sysmaps->CADDR2, 0); 3301 sched_unpin(); 3302 mtx_unlock(&sysmaps->lock); 3303} 3304 3305/* 3306 * pmap_zero_page_idle zeros the specified hardware page by mapping 3307 * the page into KVM and using bzero to clear its contents. This 3308 * is intended to be called from the vm_pagezero process only and 3309 * outside of Giant. 3310 */ 3311void 3312pmap_zero_page_idle(vm_page_t m) 3313{ 3314 3315 if (*CMAP3) 3316 panic("pmap_zero_page: CMAP3 busy"); 3317 sched_pin(); 3318 PT_SET_MA(CADDR3, PG_V | PG_RW | VM_PAGE_TO_MACH(m) | PG_A | PG_M); 3319 pagezero(CADDR3); 3320 PT_SET_MA(CADDR3, 0); 3321 sched_unpin(); 3322} 3323 3324/* 3325 * pmap_copy_page copies the specified (machine independent) 3326 * page by mapping the page into virtual memory and using 3327 * bcopy to copy the page, one machine dependent page at a 3328 * time. 3329 */ 3330void 3331pmap_copy_page(vm_page_t src, vm_page_t dst) 3332{ 3333 struct sysmaps *sysmaps; 3334 3335 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3336 mtx_lock(&sysmaps->lock); 3337 if (*sysmaps->CMAP1) 3338 panic("pmap_copy_page: CMAP1 busy"); 3339 if (*sysmaps->CMAP2) 3340 panic("pmap_copy_page: CMAP2 busy"); 3341 sched_pin(); 3342 PT_SET_MA(sysmaps->CADDR1, PG_V | VM_PAGE_TO_MACH(src) | PG_A); 3343 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | VM_PAGE_TO_MACH(dst) | PG_A | PG_M); 3344 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); 3345 PT_SET_MA(sysmaps->CADDR1, 0); 3346 PT_SET_MA(sysmaps->CADDR2, 0); 3347 sched_unpin(); 3348 mtx_unlock(&sysmaps->lock); 3349} 3350 3351/* 3352 * Returns true if the pmap's pv is one of the first 3353 * 16 pvs linked to from this page. This count may 3354 * be changed upwards or downwards in the future; it 3355 * is only necessary that true be returned for a small 3356 * subset of pmaps for proper page aging. 3357 */ 3358boolean_t 3359pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 3360{ 3361 pv_entry_t pv; 3362 int loops = 0; 3363 boolean_t rv; 3364 3365 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0, 3366 ("pmap_page_exists_quick: page %p is not managed", m)); 3367 rv = FALSE; 3368 vm_page_lock_queues(); 3369 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3370 if (PV_PMAP(pv) == pmap) { 3371 rv = TRUE; 3372 break; 3373 } 3374 loops++; 3375 if (loops >= 16) 3376 break; 3377 } 3378 vm_page_unlock_queues(); 3379 return (rv); 3380} 3381 3382/* 3383 * pmap_page_wired_mappings: 3384 * 3385 * Return the number of managed mappings to the given physical page 3386 * that are wired. 3387 */ 3388int 3389pmap_page_wired_mappings(vm_page_t m) 3390{ 3391 pv_entry_t pv; 3392 pt_entry_t *pte; 3393 pmap_t pmap; 3394 int count; 3395 3396 count = 0; 3397 if ((m->flags & PG_FICTITIOUS) != 0) 3398 return (count); 3399 vm_page_lock_queues(); 3400 sched_pin(); 3401 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3402 pmap = PV_PMAP(pv); 3403 PMAP_LOCK(pmap); 3404 pte = pmap_pte_quick(pmap, pv->pv_va); 3405 if ((*pte & PG_W) != 0) 3406 count++; 3407 PMAP_UNLOCK(pmap); 3408 } 3409 sched_unpin(); 3410 vm_page_unlock_queues(); 3411 return (count); 3412} 3413 3414/* 3415 * Returns TRUE if the given page is mapped individually or as part of 3416 * a 4mpage. Otherwise, returns FALSE. 3417 */ 3418boolean_t 3419pmap_page_is_mapped(vm_page_t m) 3420{ 3421 boolean_t rv; 3422 3423 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 3424 return (FALSE); 3425 vm_page_lock_queues(); 3426 rv = !TAILQ_EMPTY(&m->md.pv_list) || 3427 !TAILQ_EMPTY(&pa_to_pvh(VM_PAGE_TO_PHYS(m))->pv_list); 3428 vm_page_unlock_queues(); 3429 return (rv); 3430} 3431 3432/* 3433 * Remove all pages from specified address space 3434 * this aids process exit speeds. Also, this code 3435 * is special cased for current process only, but 3436 * can have the more generic (and slightly slower) 3437 * mode enabled. This is much faster than pmap_remove 3438 * in the case of running down an entire address space. 3439 */ 3440void 3441pmap_remove_pages(pmap_t pmap) 3442{ 3443 pt_entry_t *pte, tpte; 3444 vm_page_t m, free = NULL; 3445 pv_entry_t pv; 3446 struct pv_chunk *pc, *npc; 3447 int field, idx; 3448 int32_t bit; 3449 uint32_t inuse, bitmask; 3450 int allfree; 3451 3452 CTR1(KTR_PMAP, "pmap_remove_pages: pmap=%p", pmap); 3453 3454 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { 3455 printf("warning: pmap_remove_pages called with non-current pmap\n"); 3456 return; 3457 } 3458 vm_page_lock_queues(); 3459 KASSERT(pmap_is_current(pmap), ("removing pages from non-current pmap")); 3460 PMAP_LOCK(pmap); 3461 sched_pin(); 3462 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) { 3463 allfree = 1; 3464 for (field = 0; field < _NPCM; field++) { 3465 inuse = (~(pc->pc_map[field])) & pc_freemask[field]; 3466 while (inuse != 0) { 3467 bit = bsfl(inuse); 3468 bitmask = 1UL << bit; 3469 idx = field * 32 + bit; 3470 pv = &pc->pc_pventry[idx]; 3471 inuse &= ~bitmask; 3472 3473 pte = vtopte(pv->pv_va); 3474 tpte = *pte ? xpmap_mtop(*pte) : 0; 3475 3476 if (tpte == 0) { 3477 printf( 3478 "TPTE at %p IS ZERO @ VA %08x\n", 3479 pte, pv->pv_va); 3480 panic("bad pte"); 3481 } 3482 3483/* 3484 * We cannot remove wired pages from a process' mapping at this time 3485 */ 3486 if (tpte & PG_W) { 3487 allfree = 0; 3488 continue; 3489 } 3490 3491 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME); 3492 KASSERT(m->phys_addr == (tpte & PG_FRAME), 3493 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 3494 m, (uintmax_t)m->phys_addr, 3495 (uintmax_t)tpte)); 3496 3497 KASSERT(m < &vm_page_array[vm_page_array_size], 3498 ("pmap_remove_pages: bad tpte %#jx", 3499 (uintmax_t)tpte)); 3500 3501 3502 PT_CLEAR_VA(pte, FALSE); 3503 3504 /* 3505 * Update the vm_page_t clean/reference bits. 3506 */ 3507 if (tpte & PG_M) 3508 vm_page_dirty(m); 3509 3510 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3511 if (TAILQ_EMPTY(&m->md.pv_list)) 3512 vm_page_flag_clear(m, PG_WRITEABLE); 3513 3514 pmap_unuse_pt(pmap, pv->pv_va, &free); 3515 3516 /* Mark free */ 3517 PV_STAT(pv_entry_frees++); 3518 PV_STAT(pv_entry_spare++); 3519 pv_entry_count--; 3520 pc->pc_map[field] |= bitmask; 3521 pmap->pm_stats.resident_count--; 3522 } 3523 } 3524 PT_UPDATES_FLUSH(); 3525 if (allfree) { 3526 PV_STAT(pv_entry_spare -= _NPCPV); 3527 PV_STAT(pc_chunk_count--); 3528 PV_STAT(pc_chunk_frees++); 3529 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 3530 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 3531 pmap_qremove((vm_offset_t)pc, 1); 3532 vm_page_unwire(m, 0); 3533 vm_page_free(m); 3534 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 3535 } 3536 } 3537 PT_UPDATES_FLUSH(); 3538 if (*PMAP1) 3539 PT_SET_MA(PADDR1, 0); 3540 3541 sched_unpin(); 3542 pmap_invalidate_all(pmap); 3543 vm_page_unlock_queues(); 3544 PMAP_UNLOCK(pmap); 3545 pmap_free_zero_pages(free); 3546} 3547 3548/* 3549 * pmap_is_modified: 3550 * 3551 * Return whether or not the specified physical page was modified 3552 * in any physical maps. 3553 */ 3554boolean_t 3555pmap_is_modified(vm_page_t m) 3556{ 3557 pv_entry_t pv; 3558 pt_entry_t *pte; 3559 pmap_t pmap; 3560 boolean_t rv; 3561 3562 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0, 3563 ("pmap_is_modified: page %p is not managed", m)); 3564 rv = FALSE; 3565 3566 /* 3567 * If the page is not VPO_BUSY, then PG_WRITEABLE cannot be 3568 * concurrently set while the object is locked. Thus, if PG_WRITEABLE 3569 * is clear, no PTEs can have PG_M set. 3570 */ 3571 VM_OBJECT_LOCK_ASSERT(m->object, MA_OWNED); 3572 if ((m->oflags & VPO_BUSY) == 0 && 3573 (m->flags & PG_WRITEABLE) == 0) 3574 return (rv); 3575 vm_page_lock_queues(); 3576 sched_pin(); 3577 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3578 pmap = PV_PMAP(pv); 3579 PMAP_LOCK(pmap); 3580 pte = pmap_pte_quick(pmap, pv->pv_va); 3581 rv = (*pte & PG_M) != 0; 3582 PMAP_UNLOCK(pmap); 3583 if (rv) 3584 break; 3585 } 3586 if (*PMAP1) 3587 PT_SET_MA(PADDR1, 0); 3588 sched_unpin(); 3589 vm_page_unlock_queues(); 3590 return (rv); 3591} 3592 3593/* 3594 * pmap_is_prefaultable: 3595 * 3596 * Return whether or not the specified virtual address is elgible 3597 * for prefault. 3598 */ 3599static boolean_t 3600pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr) 3601{ 3602 pt_entry_t *pte; 3603 boolean_t rv = FALSE; 3604 3605 return (rv); 3606 3607 if (pmap_is_current(pmap) && *pmap_pde(pmap, addr)) { 3608 pte = vtopte(addr); 3609 rv = (*pte == 0); 3610 } 3611 return (rv); 3612} 3613 3614boolean_t 3615pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 3616{ 3617 boolean_t rv; 3618 3619 PMAP_LOCK(pmap); 3620 rv = pmap_is_prefaultable_locked(pmap, addr); 3621 PMAP_UNLOCK(pmap); 3622 return (rv); 3623} 3624 3625boolean_t 3626pmap_is_referenced(vm_page_t m) 3627{ 3628 pv_entry_t pv; 3629 pt_entry_t *pte; 3630 pmap_t pmap; 3631 boolean_t rv; 3632 3633 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0, 3634 ("pmap_is_referenced: page %p is not managed", m)); 3635 rv = FALSE; 3636 vm_page_lock_queues(); 3637 sched_pin(); 3638 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3639 pmap = PV_PMAP(pv); 3640 PMAP_LOCK(pmap); 3641 pte = pmap_pte_quick(pmap, pv->pv_va); 3642 rv = (*pte & (PG_A | PG_V)) == (PG_A | PG_V); 3643 PMAP_UNLOCK(pmap); 3644 if (rv) 3645 break; 3646 } 3647 if (*PMAP1) 3648 PT_SET_MA(PADDR1, 0); 3649 sched_unpin(); 3650 vm_page_unlock_queues(); 3651 return (rv); 3652} 3653 3654void 3655pmap_map_readonly(pmap_t pmap, vm_offset_t va, int len) 3656{ 3657 int i, npages = round_page(len) >> PAGE_SHIFT; 3658 for (i = 0; i < npages; i++) { 3659 pt_entry_t *pte; 3660 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE)); 3661 pte_store(pte, xpmap_mtop(*pte & ~(PG_RW|PG_M))); 3662 PMAP_MARK_PRIV(xpmap_mtop(*pte)); 3663 pmap_pte_release(pte); 3664 } 3665} 3666 3667void 3668pmap_map_readwrite(pmap_t pmap, vm_offset_t va, int len) 3669{ 3670 int i, npages = round_page(len) >> PAGE_SHIFT; 3671 for (i = 0; i < npages; i++) { 3672 pt_entry_t *pte; 3673 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE)); 3674 PMAP_MARK_UNPRIV(xpmap_mtop(*pte)); 3675 pte_store(pte, xpmap_mtop(*pte) | (PG_RW|PG_M)); 3676 pmap_pte_release(pte); 3677 } 3678} 3679 3680/* 3681 * Clear the write and modified bits in each of the given page's mappings. 3682 */ 3683void 3684pmap_remove_write(vm_page_t m) 3685{ 3686 pv_entry_t pv; 3687 pmap_t pmap; 3688 pt_entry_t oldpte, *pte; 3689 3690 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0, 3691 ("pmap_remove_write: page %p is not managed", m)); 3692 3693 /* 3694 * If the page is not VPO_BUSY, then PG_WRITEABLE cannot be set by 3695 * another thread while the object is locked. Thus, if PG_WRITEABLE 3696 * is clear, no page table entries need updating. 3697 */ 3698 VM_OBJECT_LOCK_ASSERT(m->object, MA_OWNED); 3699 if ((m->oflags & VPO_BUSY) == 0 && 3700 (m->flags & PG_WRITEABLE) == 0) 3701 return; 3702 vm_page_lock_queues(); 3703 sched_pin(); 3704 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3705 pmap = PV_PMAP(pv); 3706 PMAP_LOCK(pmap); 3707 pte = pmap_pte_quick(pmap, pv->pv_va); 3708retry: 3709 oldpte = *pte; 3710 if ((oldpte & PG_RW) != 0) { 3711 vm_paddr_t newpte = oldpte & ~(PG_RW | PG_M); 3712 3713 /* 3714 * Regardless of whether a pte is 32 or 64 bits 3715 * in size, PG_RW and PG_M are among the least 3716 * significant 32 bits. 3717 */ 3718 PT_SET_VA_MA(pte, newpte, TRUE); 3719 if (*pte != newpte) 3720 goto retry; 3721 3722 if ((oldpte & PG_M) != 0) 3723 vm_page_dirty(m); 3724 pmap_invalidate_page(pmap, pv->pv_va); 3725 } 3726 PMAP_UNLOCK(pmap); 3727 } 3728 vm_page_flag_clear(m, PG_WRITEABLE); 3729 PT_UPDATES_FLUSH(); 3730 if (*PMAP1) 3731 PT_SET_MA(PADDR1, 0); 3732 sched_unpin(); 3733 vm_page_unlock_queues(); 3734} 3735 3736/* 3737 * pmap_ts_referenced: 3738 * 3739 * Return a count of reference bits for a page, clearing those bits. 3740 * It is not necessary for every reference bit to be cleared, but it 3741 * is necessary that 0 only be returned when there are truly no 3742 * reference bits set. 3743 * 3744 * XXX: The exact number of bits to check and clear is a matter that 3745 * should be tested and standardized at some point in the future for 3746 * optimal aging of shared pages. 3747 */ 3748int 3749pmap_ts_referenced(vm_page_t m) 3750{ 3751 pv_entry_t pv, pvf, pvn; 3752 pmap_t pmap; 3753 pt_entry_t *pte; 3754 int rtval = 0; 3755 3756 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0, 3757 ("pmap_ts_referenced: page %p is not managed", m)); 3758 vm_page_lock_queues(); 3759 sched_pin(); 3760 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 3761 pvf = pv; 3762 do { 3763 pvn = TAILQ_NEXT(pv, pv_list); 3764 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3765 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 3766 pmap = PV_PMAP(pv); 3767 PMAP_LOCK(pmap); 3768 pte = pmap_pte_quick(pmap, pv->pv_va); 3769 if ((*pte & PG_A) != 0) { 3770 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE); 3771 pmap_invalidate_page(pmap, pv->pv_va); 3772 rtval++; 3773 if (rtval > 4) 3774 pvn = NULL; 3775 } 3776 PMAP_UNLOCK(pmap); 3777 } while ((pv = pvn) != NULL && pv != pvf); 3778 } 3779 PT_UPDATES_FLUSH(); 3780 if (*PMAP1) 3781 PT_SET_MA(PADDR1, 0); 3782 3783 sched_unpin(); 3784 vm_page_unlock_queues(); 3785 return (rtval); 3786} 3787 3788/* 3789 * Clear the modify bits on the specified physical page. 3790 */ 3791void 3792pmap_clear_modify(vm_page_t m) 3793{ 3794 pv_entry_t pv; 3795 pmap_t pmap; 3796 pt_entry_t *pte; 3797 3798 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0, 3799 ("pmap_clear_modify: page %p is not managed", m)); 3800 VM_OBJECT_LOCK_ASSERT(m->object, MA_OWNED); 3801 KASSERT((m->oflags & VPO_BUSY) == 0, 3802 ("pmap_clear_modify: page %p is busy", m)); 3803 3804 /* 3805 * If the page is not PG_WRITEABLE, then no PTEs can have PG_M set. 3806 * If the object containing the page is locked and the page is not 3807 * VPO_BUSY, then PG_WRITEABLE cannot be concurrently set. 3808 */ 3809 if ((m->flags & PG_WRITEABLE) == 0) 3810 return; 3811 vm_page_lock_queues(); 3812 sched_pin(); 3813 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3814 pmap = PV_PMAP(pv); 3815 PMAP_LOCK(pmap); 3816 pte = pmap_pte_quick(pmap, pv->pv_va); 3817 if ((*pte & PG_M) != 0) { 3818 /* 3819 * Regardless of whether a pte is 32 or 64 bits 3820 * in size, PG_M is among the least significant 3821 * 32 bits. 3822 */ 3823 PT_SET_VA_MA(pte, *pte & ~PG_M, FALSE); 3824 pmap_invalidate_page(pmap, pv->pv_va); 3825 } 3826 PMAP_UNLOCK(pmap); 3827 } 3828 sched_unpin(); 3829 vm_page_unlock_queues(); 3830} 3831 3832/* 3833 * pmap_clear_reference: 3834 * 3835 * Clear the reference bit on the specified physical page. 3836 */ 3837void 3838pmap_clear_reference(vm_page_t m) 3839{ 3840 pv_entry_t pv; 3841 pmap_t pmap; 3842 pt_entry_t *pte; 3843 3844 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0, 3845 ("pmap_clear_reference: page %p is not managed", m)); 3846 vm_page_lock_queues(); 3847 sched_pin(); 3848 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3849 pmap = PV_PMAP(pv); 3850 PMAP_LOCK(pmap); 3851 pte = pmap_pte_quick(pmap, pv->pv_va); 3852 if ((*pte & PG_A) != 0) { 3853 /* 3854 * Regardless of whether a pte is 32 or 64 bits 3855 * in size, PG_A is among the least significant 3856 * 32 bits. 3857 */ 3858 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE); 3859 pmap_invalidate_page(pmap, pv->pv_va); 3860 } 3861 PMAP_UNLOCK(pmap); 3862 } 3863 sched_unpin(); 3864 vm_page_unlock_queues(); 3865} 3866 3867/* 3868 * Miscellaneous support routines follow 3869 */ 3870 3871/* 3872 * Map a set of physical memory pages into the kernel virtual 3873 * address space. Return a pointer to where it is mapped. This 3874 * routine is intended to be used for mapping device memory, 3875 * NOT real memory. 3876 */ 3877void * 3878pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode) 3879{ 3880 vm_offset_t va, offset; 3881 vm_size_t tmpsize; 3882 3883 offset = pa & PAGE_MASK; 3884 size = roundup(offset + size, PAGE_SIZE); 3885 pa = pa & PG_FRAME; 3886 3887 if (pa < KERNLOAD && pa + size <= KERNLOAD) 3888 va = KERNBASE + pa; 3889 else 3890 va = kmem_alloc_nofault(kernel_map, size); 3891 if (!va) 3892 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 3893 3894 for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE) 3895 pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode); 3896 pmap_invalidate_range(kernel_pmap, va, va + tmpsize); 3897 pmap_invalidate_cache_range(va, va + size); 3898 return ((void *)(va + offset)); 3899} 3900 3901void * 3902pmap_mapdev(vm_paddr_t pa, vm_size_t size) 3903{ 3904 3905 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE)); 3906} 3907 3908void * 3909pmap_mapbios(vm_paddr_t pa, vm_size_t size) 3910{ 3911 3912 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK)); 3913} 3914 3915void 3916pmap_unmapdev(vm_offset_t va, vm_size_t size) 3917{ 3918 vm_offset_t base, offset, tmpva; 3919 3920 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD) 3921 return; 3922 base = trunc_page(va); 3923 offset = va & PAGE_MASK; 3924 size = roundup(offset + size, PAGE_SIZE); 3925 critical_enter(); 3926 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 3927 pmap_kremove(tmpva); 3928 pmap_invalidate_range(kernel_pmap, va, tmpva); 3929 critical_exit(); 3930 kmem_free(kernel_map, base, size); 3931} 3932 3933/* 3934 * Sets the memory attribute for the specified page. 3935 */ 3936void 3937pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma) 3938{ 3939 struct sysmaps *sysmaps; 3940 vm_offset_t sva, eva; 3941 3942 m->md.pat_mode = ma; 3943 if ((m->flags & PG_FICTITIOUS) != 0) 3944 return; 3945 3946 /* 3947 * If "m" is a normal page, flush it from the cache. 3948 * See pmap_invalidate_cache_range(). 3949 * 3950 * First, try to find an existing mapping of the page by sf 3951 * buffer. sf_buf_invalidate_cache() modifies mapping and 3952 * flushes the cache. 3953 */ 3954 if (sf_buf_invalidate_cache(m)) 3955 return; 3956 3957 /* 3958 * If page is not mapped by sf buffer, but CPU does not 3959 * support self snoop, map the page transient and do 3960 * invalidation. In the worst case, whole cache is flushed by 3961 * pmap_invalidate_cache_range(). 3962 */ 3963 if ((cpu_feature & (CPUID_SS|CPUID_CLFSH)) == CPUID_CLFSH) { 3964 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3965 mtx_lock(&sysmaps->lock); 3966 if (*sysmaps->CMAP2) 3967 panic("pmap_page_set_memattr: CMAP2 busy"); 3968 sched_pin(); 3969 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | 3970 VM_PAGE_TO_MACH(m) | PG_A | PG_M | 3971 pmap_cache_bits(m->md.pat_mode, 0)); 3972 invlcaddr(sysmaps->CADDR2); 3973 sva = (vm_offset_t)sysmaps->CADDR2; 3974 eva = sva + PAGE_SIZE; 3975 } else 3976 sva = eva = 0; /* gcc */ 3977 pmap_invalidate_cache_range(sva, eva); 3978 if (sva != 0) { 3979 PT_SET_MA(sysmaps->CADDR2, 0); 3980 sched_unpin(); 3981 mtx_unlock(&sysmaps->lock); 3982 } 3983} 3984 3985int 3986pmap_change_attr(va, size, mode) 3987 vm_offset_t va; 3988 vm_size_t size; 3989 int mode; 3990{ 3991 vm_offset_t base, offset, tmpva; 3992 pt_entry_t *pte; 3993 u_int opte, npte; 3994 pd_entry_t *pde; 3995 boolean_t changed; 3996 3997 base = trunc_page(va); 3998 offset = va & PAGE_MASK; 3999 size = roundup(offset + size, PAGE_SIZE); 4000 4001 /* Only supported on kernel virtual addresses. */ 4002 if (base <= VM_MAXUSER_ADDRESS) 4003 return (EINVAL); 4004 4005 /* 4MB pages and pages that aren't mapped aren't supported. */ 4006 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) { 4007 pde = pmap_pde(kernel_pmap, tmpva); 4008 if (*pde & PG_PS) 4009 return (EINVAL); 4010 if ((*pde & PG_V) == 0) 4011 return (EINVAL); 4012 pte = vtopte(va); 4013 if ((*pte & PG_V) == 0) 4014 return (EINVAL); 4015 } 4016 4017 changed = FALSE; 4018 4019 /* 4020 * Ok, all the pages exist and are 4k, so run through them updating 4021 * their cache mode. 4022 */ 4023 for (tmpva = base; size > 0; ) { 4024 pte = vtopte(tmpva); 4025 4026 /* 4027 * The cache mode bits are all in the low 32-bits of the 4028 * PTE, so we can just spin on updating the low 32-bits. 4029 */ 4030 do { 4031 opte = *(u_int *)pte; 4032 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT); 4033 npte |= pmap_cache_bits(mode, 0); 4034 PT_SET_VA_MA(pte, npte, TRUE); 4035 } while (npte != opte && (*pte != npte)); 4036 if (npte != opte) 4037 changed = TRUE; 4038 tmpva += PAGE_SIZE; 4039 size -= PAGE_SIZE; 4040 } 4041 4042 /* 4043 * Flush CPU caches to make sure any data isn't cached that shouldn't 4044 * be, etc. 4045 */ 4046 if (changed) { 4047 pmap_invalidate_range(kernel_pmap, base, tmpva); 4048 pmap_invalidate_cache_range(base, tmpva); 4049 } 4050 return (0); 4051} 4052 4053/* 4054 * perform the pmap work for mincore 4055 */ 4056int 4057pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa) 4058{ 4059 pt_entry_t *ptep, pte; 4060 vm_paddr_t pa; 4061 int val; 4062 4063 PMAP_LOCK(pmap); 4064retry: 4065 ptep = pmap_pte(pmap, addr); 4066 pte = (ptep != NULL) ? PT_GET(ptep) : 0; 4067 pmap_pte_release(ptep); 4068 val = 0; 4069 if ((pte & PG_V) != 0) { 4070 val |= MINCORE_INCORE; 4071 if ((pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) 4072 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER; 4073 if ((pte & PG_A) != 0) 4074 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER; 4075 } 4076 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) != 4077 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && 4078 (pte & (PG_MANAGED | PG_V)) == (PG_MANAGED | PG_V)) { 4079 pa = pte & PG_FRAME; 4080 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */ 4081 if (vm_page_pa_tryrelock(pmap, pa, locked_pa)) 4082 goto retry; 4083 } else 4084 PA_UNLOCK_COND(*locked_pa); 4085 PMAP_UNLOCK(pmap); 4086 return (val); 4087} 4088 4089void 4090pmap_activate(struct thread *td) 4091{ 4092 pmap_t pmap, oldpmap; 4093 u_int32_t cr3; 4094 4095 critical_enter(); 4096 pmap = vmspace_pmap(td->td_proc->p_vmspace); 4097 oldpmap = PCPU_GET(curpmap); 4098#if defined(SMP) 4099 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 4100 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 4101#else 4102 oldpmap->pm_active &= ~1; 4103 pmap->pm_active |= 1; 4104#endif 4105#ifdef PAE 4106 cr3 = vtophys(pmap->pm_pdpt); 4107#else 4108 cr3 = vtophys(pmap->pm_pdir); 4109#endif 4110 /* 4111 * pmap_activate is for the current thread on the current cpu 4112 */ 4113 td->td_pcb->pcb_cr3 = cr3; 4114 PT_UPDATES_FLUSH(); 4115 load_cr3(cr3); 4116 PCPU_SET(curpmap, pmap); 4117 critical_exit(); 4118} 4119 4120void 4121pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz) 4122{ 4123} 4124 4125/* 4126 * Increase the starting virtual address of the given mapping if a 4127 * different alignment might result in more superpage mappings. 4128 */ 4129void 4130pmap_align_superpage(vm_object_t object, vm_ooffset_t offset, 4131 vm_offset_t *addr, vm_size_t size) 4132{ 4133 vm_offset_t superpage_offset; 4134 4135 if (size < NBPDR) 4136 return; 4137 if (object != NULL && (object->flags & OBJ_COLORED) != 0) 4138 offset += ptoa(object->pg_color); 4139 superpage_offset = offset & PDRMASK; 4140 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR || 4141 (*addr & PDRMASK) == superpage_offset) 4142 return; 4143 if ((*addr & PDRMASK) < superpage_offset) 4144 *addr = (*addr & ~PDRMASK) + superpage_offset; 4145 else 4146 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset; 4147} 4148 4149void 4150pmap_suspend() 4151{ 4152 pmap_t pmap; 4153 int i, pdir, offset; 4154 vm_paddr_t pdirma; 4155 mmu_update_t mu[4]; 4156 4157 /* 4158 * We need to remove the recursive mapping structure from all 4159 * our pmaps so that Xen doesn't get confused when it restores 4160 * the page tables. The recursive map lives at page directory 4161 * index PTDPTDI. We assume that the suspend code has stopped 4162 * the other vcpus (if any). 4163 */ 4164 LIST_FOREACH(pmap, &allpmaps, pm_list) { 4165 for (i = 0; i < 4; i++) { 4166 /* 4167 * Figure out which page directory (L2) page 4168 * contains this bit of the recursive map and 4169 * the offset within that page of the map 4170 * entry 4171 */ 4172 pdir = (PTDPTDI + i) / NPDEPG; 4173 offset = (PTDPTDI + i) % NPDEPG; 4174 pdirma = pmap->pm_pdpt[pdir] & PG_FRAME; 4175 mu[i].ptr = pdirma + offset * sizeof(pd_entry_t); 4176 mu[i].val = 0; 4177 } 4178 HYPERVISOR_mmu_update(mu, 4, NULL, DOMID_SELF); 4179 } 4180} 4181 4182void 4183pmap_resume() 4184{ 4185 pmap_t pmap; 4186 int i, pdir, offset; 4187 vm_paddr_t pdirma; 4188 mmu_update_t mu[4]; 4189 4190 /* 4191 * Restore the recursive map that we removed on suspend. 4192 */ 4193 LIST_FOREACH(pmap, &allpmaps, pm_list) { 4194 for (i = 0; i < 4; i++) { 4195 /* 4196 * Figure out which page directory (L2) page 4197 * contains this bit of the recursive map and 4198 * the offset within that page of the map 4199 * entry 4200 */ 4201 pdir = (PTDPTDI + i) / NPDEPG; 4202 offset = (PTDPTDI + i) % NPDEPG; 4203 pdirma = pmap->pm_pdpt[pdir] & PG_FRAME; 4204 mu[i].ptr = pdirma + offset * sizeof(pd_entry_t); 4205 mu[i].val = (pmap->pm_pdpt[i] & PG_FRAME) | PG_V; 4206 } 4207 HYPERVISOR_mmu_update(mu, 4, NULL, DOMID_SELF); 4208 } 4209} 4210 4211#if defined(PMAP_DEBUG) 4212pmap_pid_dump(int pid) 4213{ 4214 pmap_t pmap; 4215 struct proc *p; 4216 int npte = 0; 4217 int index; 4218 4219 sx_slock(&allproc_lock); 4220 FOREACH_PROC_IN_SYSTEM(p) { 4221 if (p->p_pid != pid) 4222 continue; 4223 4224 if (p->p_vmspace) { 4225 int i,j; 4226 index = 0; 4227 pmap = vmspace_pmap(p->p_vmspace); 4228 for (i = 0; i < NPDEPTD; i++) { 4229 pd_entry_t *pde; 4230 pt_entry_t *pte; 4231 vm_offset_t base = i << PDRSHIFT; 4232 4233 pde = &pmap->pm_pdir[i]; 4234 if (pde && pmap_pde_v(pde)) { 4235 for (j = 0; j < NPTEPG; j++) { 4236 vm_offset_t va = base + (j << PAGE_SHIFT); 4237 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 4238 if (index) { 4239 index = 0; 4240 printf("\n"); 4241 } 4242 sx_sunlock(&allproc_lock); 4243 return npte; 4244 } 4245 pte = pmap_pte(pmap, va); 4246 if (pte && pmap_pte_v(pte)) { 4247 pt_entry_t pa; 4248 vm_page_t m; 4249 pa = PT_GET(pte); 4250 m = PHYS_TO_VM_PAGE(pa & PG_FRAME); 4251 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 4252 va, pa, m->hold_count, m->wire_count, m->flags); 4253 npte++; 4254 index++; 4255 if (index >= 2) { 4256 index = 0; 4257 printf("\n"); 4258 } else { 4259 printf(" "); 4260 } 4261 } 4262 } 4263 } 4264 } 4265 } 4266 } 4267 sx_sunlock(&allproc_lock); 4268 return npte; 4269} 4270#endif 4271 4272#if defined(DEBUG) 4273 4274static void pads(pmap_t pm); 4275void pmap_pvdump(vm_paddr_t pa); 4276 4277/* print address space of pmap*/ 4278static void 4279pads(pmap_t pm) 4280{ 4281 int i, j; 4282 vm_paddr_t va; 4283 pt_entry_t *ptep; 4284 4285 if (pm == kernel_pmap) 4286 return; 4287 for (i = 0; i < NPDEPTD; i++) 4288 if (pm->pm_pdir[i]) 4289 for (j = 0; j < NPTEPG; j++) { 4290 va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 4291 if (pm == kernel_pmap && va < KERNBASE) 4292 continue; 4293 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 4294 continue; 4295 ptep = pmap_pte(pm, va); 4296 if (pmap_pte_v(ptep)) 4297 printf("%x:%x ", va, *ptep); 4298 }; 4299 4300} 4301 4302void 4303pmap_pvdump(vm_paddr_t pa) 4304{ 4305 pv_entry_t pv; 4306 pmap_t pmap; 4307 vm_page_t m; 4308 4309 printf("pa %x", pa); 4310 m = PHYS_TO_VM_PAGE(pa); 4311 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 4312 pmap = PV_PMAP(pv); 4313 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va); 4314 pads(pmap); 4315 } 4316 printf(" "); 4317} 4318#endif 4319