pmap.c revision 207419
1/*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * Copyright (c) 1994 John S. Dyson 5 * All rights reserved. 6 * Copyright (c) 1994 David Greenman 7 * All rights reserved. 8 * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu> 9 * All rights reserved. 10 * 11 * This code is derived from software contributed to Berkeley by 12 * the Systems Programming Group of the University of Utah Computer 13 * Science Department and William Jolitz of UUNET Technologies Inc. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the University of 26 * California, Berkeley and its contributors. 27 * 4. Neither the name of the University nor the names of its contributors 28 * may be used to endorse or promote products derived from this software 29 * without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41 * SUCH DAMAGE. 42 * 43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 44 */ 45/*- 46 * Copyright (c) 2003 Networks Associates Technology, Inc. 47 * All rights reserved. 48 * 49 * This software was developed for the FreeBSD Project by Jake Burkholder, 50 * Safeport Network Services, and Network Associates Laboratories, the 51 * Security Research Division of Network Associates, Inc. under 52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 53 * CHATS research program. 54 * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 1. Redistributions of source code must retain the above copyright 59 * notice, this list of conditions and the following disclaimer. 60 * 2. Redistributions in binary form must reproduce the above copyright 61 * notice, this list of conditions and the following disclaimer in the 62 * documentation and/or other materials provided with the distribution. 63 * 64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 74 * SUCH DAMAGE. 75 */ 76 77#include <sys/cdefs.h> 78__FBSDID("$FreeBSD: head/sys/i386/xen/pmap.c 207419 2010-04-30 03:26:12Z kmacy $"); 79 80/* 81 * Manages physical address maps. 82 * 83 * In addition to hardware address maps, this 84 * module is called upon to provide software-use-only 85 * maps which may or may not be stored in the same 86 * form as hardware maps. These pseudo-maps are 87 * used to store intermediate results from copy 88 * operations to and from address spaces. 89 * 90 * Since the information managed by this module is 91 * also stored by the logical address mapping module, 92 * this module may throw away valid virtual-to-physical 93 * mappings at almost any time. However, invalidations 94 * of virtual-to-physical mappings must be done as 95 * requested. 96 * 97 * In order to cope with hardware architectures which 98 * make virtual-to-physical map invalidates expensive, 99 * this module may delay invalidate or reduced protection 100 * operations until such time as they are actually 101 * necessary. This module is given full information as 102 * to which processors are currently using which maps, 103 * and to when physical maps must be made correct. 104 */ 105 106#define PMAP_DIAGNOSTIC 107 108#include "opt_cpu.h" 109#include "opt_pmap.h" 110#include "opt_msgbuf.h" 111#include "opt_smp.h" 112#include "opt_xbox.h" 113 114#include <sys/param.h> 115#include <sys/systm.h> 116#include <sys/kernel.h> 117#include <sys/ktr.h> 118#include <sys/lock.h> 119#include <sys/malloc.h> 120#include <sys/mman.h> 121#include <sys/msgbuf.h> 122#include <sys/mutex.h> 123#include <sys/proc.h> 124#include <sys/sf_buf.h> 125#include <sys/sx.h> 126#include <sys/vmmeter.h> 127#include <sys/sched.h> 128#include <sys/sysctl.h> 129#ifdef SMP 130#include <sys/smp.h> 131#endif 132 133#include <vm/vm.h> 134#include <vm/vm_param.h> 135#include <vm/vm_kern.h> 136#include <vm/vm_page.h> 137#include <vm/vm_map.h> 138#include <vm/vm_object.h> 139#include <vm/vm_extern.h> 140#include <vm/vm_pageout.h> 141#include <vm/vm_pager.h> 142#include <vm/uma.h> 143 144#include <machine/cpu.h> 145#include <machine/cputypes.h> 146#include <machine/md_var.h> 147#include <machine/pcb.h> 148#include <machine/specialreg.h> 149#ifdef SMP 150#include <machine/smp.h> 151#endif 152 153#ifdef XBOX 154#include <machine/xbox.h> 155#endif 156 157#include <xen/interface/xen.h> 158#include <xen/hypervisor.h> 159#include <machine/xen/hypercall.h> 160#include <machine/xen/xenvar.h> 161#include <machine/xen/xenfunc.h> 162 163#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 164#define CPU_ENABLE_SSE 165#endif 166 167#ifndef PMAP_SHPGPERPROC 168#define PMAP_SHPGPERPROC 200 169#endif 170 171#if defined(DIAGNOSTIC) 172#define PMAP_DIAGNOSTIC 173#endif 174 175#if !defined(PMAP_DIAGNOSTIC) 176#ifdef __GNUC_GNU_INLINE__ 177#define PMAP_INLINE inline 178#else 179#define PMAP_INLINE extern inline 180#endif 181#else 182#define PMAP_INLINE 183#endif 184 185#define PV_STATS 186#ifdef PV_STATS 187#define PV_STAT(x) do { x ; } while (0) 188#else 189#define PV_STAT(x) do { } while (0) 190#endif 191 192#define pa_index(pa) ((pa) >> PDRSHIFT) 193#define pa_to_pvh(pa) (&pv_table[pa_index(pa)]) 194 195/* 196 * Get PDEs and PTEs for user/kernel address space 197 */ 198#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 199#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 200 201#define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 202#define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 203#define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 204#define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 205#define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 206 207#define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 208 209struct pmap kernel_pmap_store; 210LIST_HEAD(pmaplist, pmap); 211static struct pmaplist allpmaps; 212static struct mtx allpmaps_lock; 213 214vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 215vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 216int pgeflag = 0; /* PG_G or-in */ 217int pseflag = 0; /* PG_PS or-in */ 218 219int nkpt; 220vm_offset_t kernel_vm_end; 221extern u_int32_t KERNend; 222 223#ifdef PAE 224pt_entry_t pg_nx; 225#if !defined(XEN) 226static uma_zone_t pdptzone; 227#endif 228#endif 229 230static int pat_works; /* Is page attribute table sane? */ 231 232/* 233 * Data for the pv entry allocation mechanism 234 */ 235static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 236static struct md_page *pv_table; 237static int shpgperproc = PMAP_SHPGPERPROC; 238 239struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */ 240int pv_maxchunks; /* How many chunks we have KVA for */ 241vm_offset_t pv_vafree; /* freelist stored in the PTE */ 242 243/* 244 * All those kernel PT submaps that BSD is so fond of 245 */ 246struct sysmaps { 247 struct mtx lock; 248 pt_entry_t *CMAP1; 249 pt_entry_t *CMAP2; 250 caddr_t CADDR1; 251 caddr_t CADDR2; 252}; 253static struct sysmaps sysmaps_pcpu[MAXCPU]; 254static pt_entry_t *CMAP3; 255caddr_t ptvmmap = 0; 256static caddr_t CADDR3; 257struct msgbuf *msgbufp = 0; 258 259/* 260 * Crashdump maps. 261 */ 262static caddr_t crashdumpmap; 263 264static pt_entry_t *PMAP1 = 0, *PMAP2; 265static pt_entry_t *PADDR1 = 0, *PADDR2; 266#ifdef SMP 267static int PMAP1cpu; 268static int PMAP1changedcpu; 269SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD, 270 &PMAP1changedcpu, 0, 271 "Number of times pmap_pte_quick changed CPU with same PMAP1"); 272#endif 273static int PMAP1changed; 274SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD, 275 &PMAP1changed, 0, 276 "Number of times pmap_pte_quick changed PMAP1"); 277static int PMAP1unchanged; 278SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD, 279 &PMAP1unchanged, 0, 280 "Number of times pmap_pte_quick didn't change PMAP1"); 281static struct mtx PMAP2mutex; 282 283SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters"); 284static int pg_ps_enabled; 285SYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RDTUN, &pg_ps_enabled, 0, 286 "Are large page mappings enabled?"); 287 288SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0, 289 "Max number of PV entries"); 290SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0, 291 "Page share factor per proc"); 292SYSCTL_NODE(_vm_pmap, OID_AUTO, pde, CTLFLAG_RD, 0, 293 "2/4MB page mapping counters"); 294 295static u_long pmap_pde_mappings; 296SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, mappings, CTLFLAG_RD, 297 &pmap_pde_mappings, 0, "2/4MB page mappings"); 298 299static void free_pv_entry(pmap_t pmap, pv_entry_t pv); 300static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try); 301 302static vm_page_t pmap_enter_quick_locked(multicall_entry_t **mcl, int *count, pmap_t pmap, vm_offset_t va, 303 vm_page_t m, vm_prot_t prot, vm_page_t mpte); 304static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva, 305 vm_page_t *free); 306static void pmap_remove_page(struct pmap *pmap, vm_offset_t va, 307 vm_page_t *free); 308static void pmap_remove_entry(struct pmap *pmap, vm_page_t m, 309 vm_offset_t va); 310static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m); 311static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, 312 vm_page_t m); 313 314static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags); 315 316static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags); 317static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free); 318static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va); 319static void pmap_pte_release(pt_entry_t *pte); 320static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *); 321static vm_offset_t pmap_kmem_choose(vm_offset_t addr); 322static boolean_t pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr); 323static void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode); 324 325static __inline void pagezero(void *page); 326 327#if defined(PAE) && !defined(XEN) 328static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 329#endif 330#ifndef XEN 331static void pmap_set_pg(void); 332#endif 333 334CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 335CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 336 337/* 338 * If you get an error here, then you set KVA_PAGES wrong! See the 339 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be 340 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE. 341 */ 342CTASSERT(KERNBASE % (1 << 24) == 0); 343 344 345 346void 347pd_set(struct pmap *pmap, int ptepindex, vm_paddr_t val, int type) 348{ 349 vm_paddr_t pdir_ma = vtomach(&pmap->pm_pdir[ptepindex]); 350 351 switch (type) { 352 case SH_PD_SET_VA: 353#if 0 354 xen_queue_pt_update(shadow_pdir_ma, 355 xpmap_ptom(val & ~(PG_RW))); 356#endif 357 xen_queue_pt_update(pdir_ma, 358 xpmap_ptom(val)); 359 break; 360 case SH_PD_SET_VA_MA: 361#if 0 362 xen_queue_pt_update(shadow_pdir_ma, 363 val & ~(PG_RW)); 364#endif 365 xen_queue_pt_update(pdir_ma, val); 366 break; 367 case SH_PD_SET_VA_CLEAR: 368#if 0 369 xen_queue_pt_update(shadow_pdir_ma, 0); 370#endif 371 xen_queue_pt_update(pdir_ma, 0); 372 break; 373 } 374} 375 376/* 377 * Move the kernel virtual free pointer to the next 378 * 4MB. This is used to help improve performance 379 * by using a large (4MB) page for much of the kernel 380 * (.text, .data, .bss) 381 */ 382static vm_offset_t 383pmap_kmem_choose(vm_offset_t addr) 384{ 385 vm_offset_t newaddr = addr; 386 387#ifndef DISABLE_PSE 388 if (cpu_feature & CPUID_PSE) 389 newaddr = (addr + PDRMASK) & ~PDRMASK; 390#endif 391 return newaddr; 392} 393 394/* 395 * Bootstrap the system enough to run with virtual memory. 396 * 397 * On the i386 this is called after mapping has already been enabled 398 * and just syncs the pmap module with what has already been done. 399 * [We can't call it easily with mapping off since the kernel is not 400 * mapped with PA == VA, hence we would have to relocate every address 401 * from the linked base (virtual) address "KERNBASE" to the actual 402 * (physical) address starting relative to 0] 403 */ 404void 405pmap_bootstrap(vm_paddr_t firstaddr) 406{ 407 vm_offset_t va; 408 pt_entry_t *pte, *unused; 409 struct sysmaps *sysmaps; 410 int i; 411 412 /* 413 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 414 * large. It should instead be correctly calculated in locore.s and 415 * not based on 'first' (which is a physical address, not a virtual 416 * address, for the start of unused physical memory). The kernel 417 * page tables are NOT double mapped and thus should not be included 418 * in this calculation. 419 */ 420 virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 421 virtual_avail = pmap_kmem_choose(virtual_avail); 422 423 virtual_end = VM_MAX_KERNEL_ADDRESS; 424 425 /* 426 * Initialize the kernel pmap (which is statically allocated). 427 */ 428 PMAP_LOCK_INIT(kernel_pmap); 429 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 430#ifdef PAE 431 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 432#endif 433 kernel_pmap->pm_active = -1; /* don't allow deactivation */ 434 TAILQ_INIT(&kernel_pmap->pm_pvchunk); 435 LIST_INIT(&allpmaps); 436 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 437 mtx_lock_spin(&allpmaps_lock); 438 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 439 mtx_unlock_spin(&allpmaps_lock); 440 if (nkpt == 0) 441 nkpt = NKPT; 442 443 /* 444 * Reserve some special page table entries/VA space for temporary 445 * mapping of pages. 446 */ 447#define SYSMAP(c, p, v, n) \ 448 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 449 450 va = virtual_avail; 451 pte = vtopte(va); 452 453 /* 454 * CMAP1/CMAP2 are used for zeroing and copying pages. 455 * CMAP3 is used for the idle process page zeroing. 456 */ 457 for (i = 0; i < MAXCPU; i++) { 458 sysmaps = &sysmaps_pcpu[i]; 459 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF); 460 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1) 461 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1) 462 PT_SET_MA(sysmaps->CADDR1, 0); 463 PT_SET_MA(sysmaps->CADDR2, 0); 464 } 465 SYSMAP(caddr_t, CMAP3, CADDR3, 1) 466 PT_SET_MA(CADDR3, 0); 467 468 /* 469 * Crashdump maps. 470 */ 471 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS) 472 473 /* 474 * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 475 */ 476 SYSMAP(caddr_t, unused, ptvmmap, 1) 477 478 /* 479 * msgbufp is used to map the system message buffer. 480 */ 481 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE))) 482 483 /* 484 * ptemap is used for pmap_pte_quick 485 */ 486 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 487 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1); 488 489 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF); 490 491 virtual_avail = va; 492 493 /* 494 * Leave in place an identity mapping (virt == phys) for the low 1 MB 495 * physical memory region that is used by the ACPI wakeup code. This 496 * mapping must not have PG_G set. 497 */ 498#ifndef XEN 499 /* 500 * leave here deliberately to show that this is not supported 501 */ 502#ifdef XBOX 503 /* FIXME: This is gross, but needed for the XBOX. Since we are in such 504 * an early stadium, we cannot yet neatly map video memory ... :-( 505 * Better fixes are very welcome! */ 506 if (!arch_i386_is_xbox) 507#endif 508 for (i = 1; i < NKPT; i++) 509 PTD[i] = 0; 510 511 /* Initialize the PAT MSR if present. */ 512 pmap_init_pat(); 513 514 /* Turn on PG_G on kernel page(s) */ 515 pmap_set_pg(); 516#endif 517} 518 519/* 520 * Setup the PAT MSR. 521 */ 522void 523pmap_init_pat(void) 524{ 525 uint64_t pat_msr; 526 527 /* Bail if this CPU doesn't implement PAT. */ 528 if (!(cpu_feature & CPUID_PAT)) 529 return; 530 531 if (cpu_vendor_id != CPU_VENDOR_INTEL || 532 (CPUID_TO_FAMILY(cpu_id) == 6 && CPUID_TO_MODEL(cpu_id) >= 0xe)) { 533 /* 534 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-. 535 * Program 4 and 5 as WP and WC. 536 * Leave 6 and 7 as UC and UC-. 537 */ 538 pat_msr = rdmsr(MSR_PAT); 539 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5)); 540 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) | 541 PAT_VALUE(5, PAT_WRITE_COMBINING); 542 pat_works = 1; 543 } else { 544 /* 545 * Due to some Intel errata, we can only safely use the lower 4 546 * PAT entries. Thus, just replace PAT Index 2 with WC instead 547 * of UC-. 548 * 549 * Intel Pentium III Processor Specification Update 550 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B 551 * or Mode C Paging) 552 * 553 * Intel Pentium IV Processor Specification Update 554 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly) 555 */ 556 pat_msr = rdmsr(MSR_PAT); 557 pat_msr &= ~PAT_MASK(2); 558 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING); 559 pat_works = 0; 560 } 561 wrmsr(MSR_PAT, pat_msr); 562} 563 564#ifndef XEN 565/* 566 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on. 567 */ 568static void 569pmap_set_pg(void) 570{ 571 pd_entry_t pdir; 572 pt_entry_t *pte; 573 vm_offset_t va, endva; 574 int i; 575 576 if (pgeflag == 0) 577 return; 578 579 i = KERNLOAD/NBPDR; 580 endva = KERNBASE + KERNend; 581 582 if (pseflag) { 583 va = KERNBASE + KERNLOAD; 584 while (va < endva) { 585 pdir = kernel_pmap->pm_pdir[KPTDI+i]; 586 pdir |= pgeflag; 587 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir; 588 invltlb(); /* Play it safe, invltlb() every time */ 589 i++; 590 va += NBPDR; 591 } 592 } else { 593 va = (vm_offset_t)btext; 594 while (va < endva) { 595 pte = vtopte(va); 596 if (*pte & PG_V) 597 *pte |= pgeflag; 598 invltlb(); /* Play it safe, invltlb() every time */ 599 va += PAGE_SIZE; 600 } 601 } 602} 603#endif 604 605/* 606 * Initialize a vm_page's machine-dependent fields. 607 */ 608void 609pmap_page_init(vm_page_t m) 610{ 611 612 TAILQ_INIT(&m->md.pv_list); 613 m->md.pat_mode = PAT_WRITE_BACK; 614} 615 616#if defined(PAE) && !defined(XEN) 617static void * 618pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 619{ 620 621 /* Inform UMA that this allocator uses kernel_map/object. */ 622 *flags = UMA_SLAB_KERNEL; 623 return ((void *)kmem_alloc_contig(kernel_map, bytes, wait, 0x0ULL, 624 0xffffffffULL, 1, 0, VM_MEMATTR_DEFAULT)); 625} 626#endif 627 628/* 629 * ABuse the pte nodes for unmapped kva to thread a kva freelist through. 630 * Requirements: 631 * - Must deal with pages in order to ensure that none of the PG_* bits 632 * are ever set, PG_V in particular. 633 * - Assumes we can write to ptes without pte_store() atomic ops, even 634 * on PAE systems. This should be ok. 635 * - Assumes nothing will ever test these addresses for 0 to indicate 636 * no mapping instead of correctly checking PG_V. 637 * - Assumes a vm_offset_t will fit in a pte (true for i386). 638 * Because PG_V is never set, there can be no mappings to invalidate. 639 */ 640static int ptelist_count = 0; 641static vm_offset_t 642pmap_ptelist_alloc(vm_offset_t *head) 643{ 644 vm_offset_t va; 645 vm_offset_t *phead = (vm_offset_t *)*head; 646 647 if (ptelist_count == 0) { 648 printf("out of memory!!!!!!\n"); 649 return (0); /* Out of memory */ 650 } 651 ptelist_count--; 652 va = phead[ptelist_count]; 653 return (va); 654} 655 656static void 657pmap_ptelist_free(vm_offset_t *head, vm_offset_t va) 658{ 659 vm_offset_t *phead = (vm_offset_t *)*head; 660 661 phead[ptelist_count++] = va; 662} 663 664static void 665pmap_ptelist_init(vm_offset_t *head, void *base, int npages) 666{ 667 int i, nstackpages; 668 vm_offset_t va; 669 vm_page_t m; 670 671 nstackpages = (npages + PAGE_SIZE/sizeof(vm_offset_t) - 1)/ (PAGE_SIZE/sizeof(vm_offset_t)); 672 for (i = 0; i < nstackpages; i++) { 673 va = (vm_offset_t)base + i * PAGE_SIZE; 674 m = vm_page_alloc(NULL, i, 675 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 676 VM_ALLOC_ZERO); 677 pmap_qenter(va, &m, 1); 678 } 679 680 *head = (vm_offset_t)base; 681 for (i = npages - 1; i >= nstackpages; i--) { 682 va = (vm_offset_t)base + i * PAGE_SIZE; 683 pmap_ptelist_free(head, va); 684 } 685} 686 687 688/* 689 * Initialize the pmap module. 690 * Called by vm_init, to initialize any structures that the pmap 691 * system needs to map virtual memory. 692 */ 693void 694pmap_init(void) 695{ 696 vm_page_t mpte; 697 vm_size_t s; 698 int i, pv_npg; 699 700 /* 701 * Initialize the vm page array entries for the kernel pmap's 702 * page table pages. 703 */ 704 for (i = 0; i < nkpt; i++) { 705 mpte = PHYS_TO_VM_PAGE(xpmap_mtop(PTD[i + KPTDI] & PG_FRAME)); 706 KASSERT(mpte >= vm_page_array && 707 mpte < &vm_page_array[vm_page_array_size], 708 ("pmap_init: page table page is out of range")); 709 mpte->pindex = i + KPTDI; 710 mpte->phys_addr = xpmap_mtop(PTD[i + KPTDI] & PG_FRAME); 711 } 712 713 /* 714 * Initialize the address space (zone) for the pv entries. Set a 715 * high water mark so that the system can recover from excessive 716 * numbers of pv entries. 717 */ 718 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 719 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count; 720 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 721 pv_entry_max = roundup(pv_entry_max, _NPCPV); 722 pv_entry_high_water = 9 * (pv_entry_max / 10); 723 724 /* 725 * Are large page mappings enabled? 726 */ 727 TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled); 728 729 /* 730 * Calculate the size of the pv head table for superpages. 731 */ 732 for (i = 0; phys_avail[i + 1]; i += 2); 733 pv_npg = round_4mpage(phys_avail[(i - 2) + 1]) / NBPDR; 734 735 /* 736 * Allocate memory for the pv head table for superpages. 737 */ 738 s = (vm_size_t)(pv_npg * sizeof(struct md_page)); 739 s = round_page(s); 740 pv_table = (struct md_page *)kmem_alloc(kernel_map, s); 741 for (i = 0; i < pv_npg; i++) 742 TAILQ_INIT(&pv_table[i].pv_list); 743 744 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc); 745 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map, 746 PAGE_SIZE * pv_maxchunks); 747 if (pv_chunkbase == NULL) 748 panic("pmap_init: not enough kvm for pv chunks"); 749 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks); 750#if defined(PAE) && !defined(XEN) 751 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL, 752 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1, 753 UMA_ZONE_VM | UMA_ZONE_NOFREE); 754 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf); 755#endif 756} 757 758 759/*************************************************** 760 * Low level helper routines..... 761 ***************************************************/ 762 763/* 764 * Determine the appropriate bits to set in a PTE or PDE for a specified 765 * caching mode. 766 */ 767int 768pmap_cache_bits(int mode, boolean_t is_pde) 769{ 770 int pat_flag, pat_index, cache_bits; 771 772 /* The PAT bit is different for PTE's and PDE's. */ 773 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT; 774 775 /* If we don't support PAT, map extended modes to older ones. */ 776 if (!(cpu_feature & CPUID_PAT)) { 777 switch (mode) { 778 case PAT_UNCACHEABLE: 779 case PAT_WRITE_THROUGH: 780 case PAT_WRITE_BACK: 781 break; 782 case PAT_UNCACHED: 783 case PAT_WRITE_COMBINING: 784 case PAT_WRITE_PROTECTED: 785 mode = PAT_UNCACHEABLE; 786 break; 787 } 788 } 789 790 /* Map the caching mode to a PAT index. */ 791 if (pat_works) { 792 switch (mode) { 793 case PAT_UNCACHEABLE: 794 pat_index = 3; 795 break; 796 case PAT_WRITE_THROUGH: 797 pat_index = 1; 798 break; 799 case PAT_WRITE_BACK: 800 pat_index = 0; 801 break; 802 case PAT_UNCACHED: 803 pat_index = 2; 804 break; 805 case PAT_WRITE_COMBINING: 806 pat_index = 5; 807 break; 808 case PAT_WRITE_PROTECTED: 809 pat_index = 4; 810 break; 811 default: 812 panic("Unknown caching mode %d\n", mode); 813 } 814 } else { 815 switch (mode) { 816 case PAT_UNCACHED: 817 case PAT_UNCACHEABLE: 818 case PAT_WRITE_PROTECTED: 819 pat_index = 3; 820 break; 821 case PAT_WRITE_THROUGH: 822 pat_index = 1; 823 break; 824 case PAT_WRITE_BACK: 825 pat_index = 0; 826 break; 827 case PAT_WRITE_COMBINING: 828 pat_index = 2; 829 break; 830 default: 831 panic("Unknown caching mode %d\n", mode); 832 } 833 } 834 835 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */ 836 cache_bits = 0; 837 if (pat_index & 0x4) 838 cache_bits |= pat_flag; 839 if (pat_index & 0x2) 840 cache_bits |= PG_NC_PCD; 841 if (pat_index & 0x1) 842 cache_bits |= PG_NC_PWT; 843 return (cache_bits); 844} 845#ifdef SMP 846/* 847 * For SMP, these functions have to use the IPI mechanism for coherence. 848 * 849 * N.B.: Before calling any of the following TLB invalidation functions, 850 * the calling processor must ensure that all stores updating a non- 851 * kernel page table are globally performed. Otherwise, another 852 * processor could cache an old, pre-update entry without being 853 * invalidated. This can happen one of two ways: (1) The pmap becomes 854 * active on another processor after its pm_active field is checked by 855 * one of the following functions but before a store updating the page 856 * table is globally performed. (2) The pmap becomes active on another 857 * processor before its pm_active field is checked but due to 858 * speculative loads one of the following functions stills reads the 859 * pmap as inactive on the other processor. 860 * 861 * The kernel page table is exempt because its pm_active field is 862 * immutable. The kernel page table is always active on every 863 * processor. 864 */ 865void 866pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 867{ 868 u_int cpumask; 869 u_int other_cpus; 870 871 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x", 872 pmap, va); 873 874 sched_pin(); 875 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 876 invlpg(va); 877 smp_invlpg(va); 878 } else { 879 cpumask = PCPU_GET(cpumask); 880 other_cpus = PCPU_GET(other_cpus); 881 if (pmap->pm_active & cpumask) 882 invlpg(va); 883 if (pmap->pm_active & other_cpus) 884 smp_masked_invlpg(pmap->pm_active & other_cpus, va); 885 } 886 sched_unpin(); 887 PT_UPDATES_FLUSH(); 888} 889 890void 891pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 892{ 893 u_int cpumask; 894 u_int other_cpus; 895 vm_offset_t addr; 896 897 CTR3(KTR_PMAP, "pmap_invalidate_page: pmap=%p eva=0x%x sva=0x%x", 898 pmap, sva, eva); 899 900 sched_pin(); 901 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 902 for (addr = sva; addr < eva; addr += PAGE_SIZE) 903 invlpg(addr); 904 smp_invlpg_range(sva, eva); 905 } else { 906 cpumask = PCPU_GET(cpumask); 907 other_cpus = PCPU_GET(other_cpus); 908 if (pmap->pm_active & cpumask) 909 for (addr = sva; addr < eva; addr += PAGE_SIZE) 910 invlpg(addr); 911 if (pmap->pm_active & other_cpus) 912 smp_masked_invlpg_range(pmap->pm_active & other_cpus, 913 sva, eva); 914 } 915 sched_unpin(); 916 PT_UPDATES_FLUSH(); 917} 918 919void 920pmap_invalidate_all(pmap_t pmap) 921{ 922 u_int cpumask; 923 u_int other_cpus; 924 925 CTR1(KTR_PMAP, "pmap_invalidate_page: pmap=%p", pmap); 926 927 sched_pin(); 928 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 929 invltlb(); 930 smp_invltlb(); 931 } else { 932 cpumask = PCPU_GET(cpumask); 933 other_cpus = PCPU_GET(other_cpus); 934 if (pmap->pm_active & cpumask) 935 invltlb(); 936 if (pmap->pm_active & other_cpus) 937 smp_masked_invltlb(pmap->pm_active & other_cpus); 938 } 939 sched_unpin(); 940} 941 942void 943pmap_invalidate_cache(void) 944{ 945 946 sched_pin(); 947 wbinvd(); 948 smp_cache_flush(); 949 sched_unpin(); 950} 951#else /* !SMP */ 952/* 953 * Normal, non-SMP, 486+ invalidation functions. 954 * We inline these within pmap.c for speed. 955 */ 956PMAP_INLINE void 957pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 958{ 959 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x", 960 pmap, va); 961 962 if (pmap == kernel_pmap || pmap->pm_active) 963 invlpg(va); 964 PT_UPDATES_FLUSH(); 965} 966 967PMAP_INLINE void 968pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 969{ 970 vm_offset_t addr; 971 972 if (eva - sva > PAGE_SIZE) 973 CTR3(KTR_PMAP, "pmap_invalidate_range: pmap=%p sva=0x%x eva=0x%x", 974 pmap, sva, eva); 975 976 if (pmap == kernel_pmap || pmap->pm_active) 977 for (addr = sva; addr < eva; addr += PAGE_SIZE) 978 invlpg(addr); 979 PT_UPDATES_FLUSH(); 980} 981 982PMAP_INLINE void 983pmap_invalidate_all(pmap_t pmap) 984{ 985 986 CTR1(KTR_PMAP, "pmap_invalidate_all: pmap=%p", pmap); 987 988 if (pmap == kernel_pmap || pmap->pm_active) 989 invltlb(); 990} 991 992PMAP_INLINE void 993pmap_invalidate_cache(void) 994{ 995 996 wbinvd(); 997} 998#endif /* !SMP */ 999 1000void 1001pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva) 1002{ 1003 1004 KASSERT((sva & PAGE_MASK) == 0, 1005 ("pmap_invalidate_cache_range: sva not page-aligned")); 1006 KASSERT((eva & PAGE_MASK) == 0, 1007 ("pmap_invalidate_cache_range: eva not page-aligned")); 1008 1009 if (cpu_feature & CPUID_SS) 1010 ; /* If "Self Snoop" is supported, do nothing. */ 1011 else if (cpu_feature & CPUID_CLFSH) { 1012 1013 /* 1014 * Otherwise, do per-cache line flush. Use the mfence 1015 * instruction to insure that previous stores are 1016 * included in the write-back. The processor 1017 * propagates flush to other processors in the cache 1018 * coherence domain. 1019 */ 1020 mfence(); 1021 for (; sva < eva; sva += cpu_clflush_line_size) 1022 clflush(sva); 1023 mfence(); 1024 } else { 1025 1026 /* 1027 * No targeted cache flush methods are supported by CPU, 1028 * globally invalidate cache as a last resort. 1029 */ 1030 pmap_invalidate_cache(); 1031 } 1032} 1033 1034/* 1035 * Are we current address space or kernel? N.B. We return FALSE when 1036 * a pmap's page table is in use because a kernel thread is borrowing 1037 * it. The borrowed page table can change spontaneously, making any 1038 * dependence on its continued use subject to a race condition. 1039 */ 1040static __inline int 1041pmap_is_current(pmap_t pmap) 1042{ 1043 1044 return (pmap == kernel_pmap || 1045 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) && 1046 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME))); 1047} 1048 1049/* 1050 * If the given pmap is not the current or kernel pmap, the returned pte must 1051 * be released by passing it to pmap_pte_release(). 1052 */ 1053pt_entry_t * 1054pmap_pte(pmap_t pmap, vm_offset_t va) 1055{ 1056 pd_entry_t newpf; 1057 pd_entry_t *pde; 1058 1059 pde = pmap_pde(pmap, va); 1060 if (*pde & PG_PS) 1061 return (pde); 1062 if (*pde != 0) { 1063 /* are we current address space or kernel? */ 1064 if (pmap_is_current(pmap)) 1065 return (vtopte(va)); 1066 mtx_lock(&PMAP2mutex); 1067 newpf = *pde & PG_FRAME; 1068 if ((*PMAP2 & PG_FRAME) != newpf) { 1069 vm_page_lock_queues(); 1070 PT_SET_MA(PADDR2, newpf | PG_V | PG_A | PG_M); 1071 vm_page_unlock_queues(); 1072 CTR3(KTR_PMAP, "pmap_pte: pmap=%p va=0x%x newpte=0x%08x", 1073 pmap, va, (*PMAP2 & 0xffffffff)); 1074 } 1075 1076 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1))); 1077 } 1078 return (0); 1079} 1080 1081/* 1082 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte 1083 * being NULL. 1084 */ 1085static __inline void 1086pmap_pte_release(pt_entry_t *pte) 1087{ 1088 1089 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) { 1090 CTR1(KTR_PMAP, "pmap_pte_release: pte=0x%jx", 1091 *PMAP2); 1092 PT_SET_VA(PMAP2, 0, TRUE); 1093 mtx_unlock(&PMAP2mutex); 1094 } 1095} 1096 1097static __inline void 1098invlcaddr(void *caddr) 1099{ 1100 1101 invlpg((u_int)caddr); 1102 PT_UPDATES_FLUSH(); 1103} 1104 1105/* 1106 * Super fast pmap_pte routine best used when scanning 1107 * the pv lists. This eliminates many coarse-grained 1108 * invltlb calls. Note that many of the pv list 1109 * scans are across different pmaps. It is very wasteful 1110 * to do an entire invltlb for checking a single mapping. 1111 * 1112 * If the given pmap is not the current pmap, vm_page_queue_mtx 1113 * must be held and curthread pinned to a CPU. 1114 */ 1115static pt_entry_t * 1116pmap_pte_quick(pmap_t pmap, vm_offset_t va) 1117{ 1118 pd_entry_t newpf; 1119 pd_entry_t *pde; 1120 1121 pde = pmap_pde(pmap, va); 1122 if (*pde & PG_PS) 1123 return (pde); 1124 if (*pde != 0) { 1125 /* are we current address space or kernel? */ 1126 if (pmap_is_current(pmap)) 1127 return (vtopte(va)); 1128 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1129 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 1130 newpf = *pde & PG_FRAME; 1131 if ((*PMAP1 & PG_FRAME) != newpf) { 1132 PT_SET_MA(PADDR1, newpf | PG_V | PG_A | PG_M); 1133 CTR3(KTR_PMAP, "pmap_pte_quick: pmap=%p va=0x%x newpte=0x%08x", 1134 pmap, va, (u_long)*PMAP1); 1135 1136#ifdef SMP 1137 PMAP1cpu = PCPU_GET(cpuid); 1138#endif 1139 PMAP1changed++; 1140 } else 1141#ifdef SMP 1142 if (PMAP1cpu != PCPU_GET(cpuid)) { 1143 PMAP1cpu = PCPU_GET(cpuid); 1144 invlcaddr(PADDR1); 1145 PMAP1changedcpu++; 1146 } else 1147#endif 1148 PMAP1unchanged++; 1149 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1))); 1150 } 1151 return (0); 1152} 1153 1154/* 1155 * Routine: pmap_extract 1156 * Function: 1157 * Extract the physical page address associated 1158 * with the given map/virtual_address pair. 1159 */ 1160vm_paddr_t 1161pmap_extract(pmap_t pmap, vm_offset_t va) 1162{ 1163 vm_paddr_t rtval; 1164 pt_entry_t *pte; 1165 pd_entry_t pde; 1166 pt_entry_t pteval; 1167 1168 rtval = 0; 1169 PMAP_LOCK(pmap); 1170 pde = pmap->pm_pdir[va >> PDRSHIFT]; 1171 if (pde != 0) { 1172 if ((pde & PG_PS) != 0) { 1173 rtval = xpmap_mtop(pde & PG_PS_FRAME) | (va & PDRMASK); 1174 PMAP_UNLOCK(pmap); 1175 return rtval; 1176 } 1177 pte = pmap_pte(pmap, va); 1178 pteval = *pte ? xpmap_mtop(*pte) : 0; 1179 rtval = (pteval & PG_FRAME) | (va & PAGE_MASK); 1180 pmap_pte_release(pte); 1181 } 1182 PMAP_UNLOCK(pmap); 1183 return (rtval); 1184} 1185 1186/* 1187 * Routine: pmap_extract_ma 1188 * Function: 1189 * Like pmap_extract, but returns machine address 1190 */ 1191vm_paddr_t 1192pmap_extract_ma(pmap_t pmap, vm_offset_t va) 1193{ 1194 vm_paddr_t rtval; 1195 pt_entry_t *pte; 1196 pd_entry_t pde; 1197 1198 rtval = 0; 1199 PMAP_LOCK(pmap); 1200 pde = pmap->pm_pdir[va >> PDRSHIFT]; 1201 if (pde != 0) { 1202 if ((pde & PG_PS) != 0) { 1203 rtval = (pde & ~PDRMASK) | (va & PDRMASK); 1204 PMAP_UNLOCK(pmap); 1205 return rtval; 1206 } 1207 pte = pmap_pte(pmap, va); 1208 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK); 1209 pmap_pte_release(pte); 1210 } 1211 PMAP_UNLOCK(pmap); 1212 return (rtval); 1213} 1214 1215/* 1216 * Routine: pmap_extract_and_hold 1217 * Function: 1218 * Atomically extract and hold the physical page 1219 * with the given pmap and virtual address pair 1220 * if that mapping permits the given protection. 1221 */ 1222vm_page_t 1223pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 1224{ 1225 pd_entry_t pde; 1226 pt_entry_t pte; 1227 vm_page_t m; 1228 vm_paddr_t pa; 1229 1230 pa = 0; 1231 m = NULL; 1232 PMAP_LOCK(pmap); 1233retry: 1234 pde = PT_GET(pmap_pde(pmap, va)); 1235 if (pde != 0) { 1236 if (pde & PG_PS) { 1237 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) { 1238 if (vm_page_pa_tryrelock(pmap, (pde & PG_PS_FRAME) | 1239 (va & PDRMASK), &pa)) 1240 goto retry; 1241 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) | 1242 (va & PDRMASK)); 1243 vm_page_hold(m); 1244 } 1245 } else { 1246 sched_pin(); 1247 pte = PT_GET(pmap_pte_quick(pmap, va)); 1248 if (*PMAP1) 1249 PT_SET_MA(PADDR1, 0); 1250 if ((pte & PG_V) && 1251 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) { 1252 if (vm_page_pa_tryrelock(pmap, pte & PG_FRAME, &pa)) 1253 goto retry; 1254 m = PHYS_TO_VM_PAGE(pte & PG_FRAME); 1255 vm_page_hold(m); 1256 } 1257 sched_unpin(); 1258 } 1259 } 1260 PA_UNLOCK_COND(pa); 1261 PMAP_UNLOCK(pmap); 1262 return (m); 1263} 1264 1265/*************************************************** 1266 * Low level mapping routines..... 1267 ***************************************************/ 1268 1269/* 1270 * Add a wired page to the kva. 1271 * Note: not SMP coherent. 1272 */ 1273void 1274pmap_kenter(vm_offset_t va, vm_paddr_t pa) 1275{ 1276 PT_SET_MA(va, xpmap_ptom(pa)| PG_RW | PG_V | pgeflag); 1277} 1278 1279void 1280pmap_kenter_ma(vm_offset_t va, vm_paddr_t ma) 1281{ 1282 pt_entry_t *pte; 1283 1284 pte = vtopte(va); 1285 pte_store_ma(pte, ma | PG_RW | PG_V | pgeflag); 1286} 1287 1288 1289static __inline void 1290pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode) 1291{ 1292 PT_SET_MA(va, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0)); 1293} 1294 1295/* 1296 * Remove a page from the kernel pagetables. 1297 * Note: not SMP coherent. 1298 */ 1299PMAP_INLINE void 1300pmap_kremove(vm_offset_t va) 1301{ 1302 pt_entry_t *pte; 1303 1304 pte = vtopte(va); 1305 PT_CLEAR_VA(pte, FALSE); 1306} 1307 1308/* 1309 * Used to map a range of physical addresses into kernel 1310 * virtual address space. 1311 * 1312 * The value passed in '*virt' is a suggested virtual address for 1313 * the mapping. Architectures which can support a direct-mapped 1314 * physical to virtual region can return the appropriate address 1315 * within that region, leaving '*virt' unchanged. Other 1316 * architectures should map the pages starting at '*virt' and 1317 * update '*virt' with the first usable address after the mapped 1318 * region. 1319 */ 1320vm_offset_t 1321pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 1322{ 1323 vm_offset_t va, sva; 1324 1325 va = sva = *virt; 1326 CTR4(KTR_PMAP, "pmap_map: va=0x%x start=0x%jx end=0x%jx prot=0x%x", 1327 va, start, end, prot); 1328 while (start < end) { 1329 pmap_kenter(va, start); 1330 va += PAGE_SIZE; 1331 start += PAGE_SIZE; 1332 } 1333 pmap_invalidate_range(kernel_pmap, sva, va); 1334 *virt = va; 1335 return (sva); 1336} 1337 1338 1339/* 1340 * Add a list of wired pages to the kva 1341 * this routine is only used for temporary 1342 * kernel mappings that do not need to have 1343 * page modification or references recorded. 1344 * Note that old mappings are simply written 1345 * over. The page *must* be wired. 1346 * Note: SMP coherent. Uses a ranged shootdown IPI. 1347 */ 1348void 1349pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count) 1350{ 1351 pt_entry_t *endpte, *pte; 1352 vm_paddr_t pa; 1353 vm_offset_t va = sva; 1354 int mclcount = 0; 1355 multicall_entry_t mcl[16]; 1356 multicall_entry_t *mclp = mcl; 1357 int error; 1358 1359 CTR2(KTR_PMAP, "pmap_qenter:sva=0x%x count=%d", va, count); 1360 pte = vtopte(sva); 1361 endpte = pte + count; 1362 while (pte < endpte) { 1363 pa = xpmap_ptom(VM_PAGE_TO_PHYS(*ma)) | pgeflag | PG_RW | PG_V | PG_M | PG_A; 1364 1365 mclp->op = __HYPERVISOR_update_va_mapping; 1366 mclp->args[0] = va; 1367 mclp->args[1] = (uint32_t)(pa & 0xffffffff); 1368 mclp->args[2] = (uint32_t)(pa >> 32); 1369 mclp->args[3] = (*pte & PG_V) ? UVMF_INVLPG|UVMF_ALL : 0; 1370 1371 va += PAGE_SIZE; 1372 pte++; 1373 ma++; 1374 mclp++; 1375 mclcount++; 1376 if (mclcount == 16) { 1377 error = HYPERVISOR_multicall(mcl, mclcount); 1378 mclp = mcl; 1379 mclcount = 0; 1380 KASSERT(error == 0, ("bad multicall %d", error)); 1381 } 1382 } 1383 if (mclcount) { 1384 error = HYPERVISOR_multicall(mcl, mclcount); 1385 KASSERT(error == 0, ("bad multicall %d", error)); 1386 } 1387 1388#ifdef INVARIANTS 1389 for (pte = vtopte(sva), mclcount = 0; mclcount < count; mclcount++, pte++) 1390 KASSERT(*pte, ("pte not set for va=0x%x", sva + mclcount*PAGE_SIZE)); 1391#endif 1392} 1393 1394 1395/* 1396 * This routine tears out page mappings from the 1397 * kernel -- it is meant only for temporary mappings. 1398 * Note: SMP coherent. Uses a ranged shootdown IPI. 1399 */ 1400void 1401pmap_qremove(vm_offset_t sva, int count) 1402{ 1403 vm_offset_t va; 1404 1405 CTR2(KTR_PMAP, "pmap_qremove: sva=0x%x count=%d", sva, count); 1406 va = sva; 1407 vm_page_lock_queues(); 1408 critical_enter(); 1409 while (count-- > 0) { 1410 pmap_kremove(va); 1411 va += PAGE_SIZE; 1412 } 1413 pmap_invalidate_range(kernel_pmap, sva, va); 1414 critical_exit(); 1415 vm_page_unlock_queues(); 1416} 1417 1418/*************************************************** 1419 * Page table page management routines..... 1420 ***************************************************/ 1421static __inline void 1422pmap_free_zero_pages(vm_page_t free) 1423{ 1424 vm_page_t m; 1425 1426 while (free != NULL) { 1427 m = free; 1428 free = m->right; 1429 vm_page_free_zero(m); 1430 } 1431} 1432 1433/* 1434 * This routine unholds page table pages, and if the hold count 1435 * drops to zero, then it decrements the wire count. 1436 */ 1437static __inline int 1438pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1439{ 1440 1441 --m->wire_count; 1442 if (m->wire_count == 0) 1443 return _pmap_unwire_pte_hold(pmap, m, free); 1444 else 1445 return 0; 1446} 1447 1448static int 1449_pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1450{ 1451 vm_offset_t pteva; 1452 1453 PT_UPDATES_FLUSH(); 1454 /* 1455 * unmap the page table page 1456 */ 1457 xen_pt_unpin(pmap->pm_pdir[m->pindex]); 1458 /* 1459 * page *might* contain residual mapping :-/ 1460 */ 1461 PD_CLEAR_VA(pmap, m->pindex, TRUE); 1462 pmap_zero_page(m); 1463 --pmap->pm_stats.resident_count; 1464 1465 /* 1466 * This is a release store so that the ordinary store unmapping 1467 * the page table page is globally performed before TLB shoot- 1468 * down is begun. 1469 */ 1470 atomic_subtract_rel_int(&cnt.v_wire_count, 1); 1471 1472 /* 1473 * Do an invltlb to make the invalidated mapping 1474 * take effect immediately. 1475 */ 1476 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1477 pmap_invalidate_page(pmap, pteva); 1478 1479 /* 1480 * Put page on a list so that it is released after 1481 * *ALL* TLB shootdown is done 1482 */ 1483 m->right = *free; 1484 *free = m; 1485 1486 return 1; 1487} 1488 1489/* 1490 * After removing a page table entry, this routine is used to 1491 * conditionally free the page, and manage the hold/wire counts. 1492 */ 1493static int 1494pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free) 1495{ 1496 pd_entry_t ptepde; 1497 vm_page_t mpte; 1498 1499 if (va >= VM_MAXUSER_ADDRESS) 1500 return 0; 1501 ptepde = PT_GET(pmap_pde(pmap, va)); 1502 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); 1503 return pmap_unwire_pte_hold(pmap, mpte, free); 1504} 1505 1506void 1507pmap_pinit0(pmap_t pmap) 1508{ 1509 1510 PMAP_LOCK_INIT(pmap); 1511 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1512#ifdef PAE 1513 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1514#endif 1515 pmap->pm_active = 0; 1516 PCPU_SET(curpmap, pmap); 1517 TAILQ_INIT(&pmap->pm_pvchunk); 1518 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1519 mtx_lock_spin(&allpmaps_lock); 1520 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1521 mtx_unlock_spin(&allpmaps_lock); 1522} 1523 1524/* 1525 * Initialize a preallocated and zeroed pmap structure, 1526 * such as one in a vmspace structure. 1527 */ 1528int 1529pmap_pinit(pmap_t pmap) 1530{ 1531 vm_page_t m, ptdpg[NPGPTD + 1]; 1532 int npgptd = NPGPTD + 1; 1533 static int color; 1534 int i; 1535 1536 PMAP_LOCK_INIT(pmap); 1537 1538 /* 1539 * No need to allocate page table space yet but we do need a valid 1540 * page directory table. 1541 */ 1542 if (pmap->pm_pdir == NULL) { 1543 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1544 NBPTD); 1545 if (pmap->pm_pdir == NULL) { 1546 PMAP_LOCK_DESTROY(pmap); 1547 return (0); 1548 } 1549#if defined(XEN) && defined(PAE) 1550 pmap->pm_pdpt = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1); 1551#endif 1552 1553#if defined(PAE) && !defined(XEN) 1554 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO); 1555 KASSERT(((vm_offset_t)pmap->pm_pdpt & 1556 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0, 1557 ("pmap_pinit: pdpt misaligned")); 1558 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30), 1559 ("pmap_pinit: pdpt above 4g")); 1560#endif 1561 } 1562 1563 /* 1564 * allocate the page directory page(s) 1565 */ 1566 for (i = 0; i < npgptd;) { 1567 m = vm_page_alloc(NULL, color++, 1568 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1569 VM_ALLOC_ZERO); 1570 if (m == NULL) 1571 VM_WAIT; 1572 else { 1573 ptdpg[i++] = m; 1574 } 1575 } 1576 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1577 for (i = 0; i < NPGPTD; i++) { 1578 if ((ptdpg[i]->flags & PG_ZERO) == 0) 1579 pagezero(&pmap->pm_pdir[i*NPTEPG]); 1580 } 1581 1582 mtx_lock_spin(&allpmaps_lock); 1583 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1584 mtx_unlock_spin(&allpmaps_lock); 1585 /* Wire in kernel global address entries. */ 1586 1587 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1588#ifdef PAE 1589#ifdef XEN 1590 pmap_qenter((vm_offset_t)pmap->pm_pdpt, &ptdpg[NPGPTD], 1); 1591 if ((ptdpg[NPGPTD]->flags & PG_ZERO) == 0) 1592 bzero(pmap->pm_pdpt, PAGE_SIZE); 1593#endif 1594 for (i = 0; i < NPGPTD; i++) { 1595 vm_paddr_t ma; 1596 1597 ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1598 pmap->pm_pdpt[i] = ma | PG_V; 1599 1600 } 1601#endif 1602#ifdef XEN 1603 for (i = 0; i < NPGPTD; i++) { 1604 pt_entry_t *pd; 1605 vm_paddr_t ma; 1606 1607 ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1608 pd = pmap->pm_pdir + (i * NPDEPG); 1609 PT_SET_MA(pd, *vtopte((vm_offset_t)pd) & ~(PG_M|PG_A|PG_U|PG_RW)); 1610#if 0 1611 xen_pgd_pin(ma); 1612#endif 1613 } 1614 1615#ifdef PAE 1616 PT_SET_MA(pmap->pm_pdpt, *vtopte((vm_offset_t)pmap->pm_pdpt) & ~PG_RW); 1617#endif 1618 vm_page_lock_queues(); 1619 xen_flush_queue(); 1620 xen_pgdpt_pin(xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[NPGPTD]))); 1621 for (i = 0; i < NPGPTD; i++) { 1622 vm_paddr_t ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1623 PT_SET_VA_MA(&pmap->pm_pdir[PTDPTDI + i], ma | PG_V | PG_A, FALSE); 1624 } 1625 xen_flush_queue(); 1626 vm_page_unlock_queues(); 1627#endif 1628 pmap->pm_active = 0; 1629 TAILQ_INIT(&pmap->pm_pvchunk); 1630 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1631 1632 return (1); 1633} 1634 1635/* 1636 * this routine is called if the page table page is not 1637 * mapped correctly. 1638 */ 1639static vm_page_t 1640_pmap_allocpte(pmap_t pmap, unsigned int ptepindex, int flags) 1641{ 1642 vm_paddr_t ptema; 1643 vm_page_t m; 1644 1645 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1646 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1647 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1648 1649 /* 1650 * Allocate a page table page. 1651 */ 1652 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1653 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1654 if (flags & M_WAITOK) { 1655 PMAP_UNLOCK(pmap); 1656 vm_page_unlock_queues(); 1657 VM_WAIT; 1658 vm_page_lock_queues(); 1659 PMAP_LOCK(pmap); 1660 } 1661 1662 /* 1663 * Indicate the need to retry. While waiting, the page table 1664 * page may have been allocated. 1665 */ 1666 return (NULL); 1667 } 1668 if ((m->flags & PG_ZERO) == 0) 1669 pmap_zero_page(m); 1670 1671 /* 1672 * Map the pagetable page into the process address space, if 1673 * it isn't already there. 1674 */ 1675 pmap->pm_stats.resident_count++; 1676 1677 ptema = xpmap_ptom(VM_PAGE_TO_PHYS(m)); 1678 xen_pt_pin(ptema); 1679 PT_SET_VA_MA(&pmap->pm_pdir[ptepindex], 1680 (ptema | PG_U | PG_RW | PG_V | PG_A | PG_M), TRUE); 1681 1682 KASSERT(pmap->pm_pdir[ptepindex], 1683 ("_pmap_allocpte: ptepindex=%d did not get mapped", ptepindex)); 1684 return (m); 1685} 1686 1687static vm_page_t 1688pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags) 1689{ 1690 unsigned ptepindex; 1691 pd_entry_t ptema; 1692 vm_page_t m; 1693 1694 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1695 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1696 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1697 1698 /* 1699 * Calculate pagetable page index 1700 */ 1701 ptepindex = va >> PDRSHIFT; 1702retry: 1703 /* 1704 * Get the page directory entry 1705 */ 1706 ptema = pmap->pm_pdir[ptepindex]; 1707 1708 /* 1709 * This supports switching from a 4MB page to a 1710 * normal 4K page. 1711 */ 1712 if (ptema & PG_PS) { 1713 /* 1714 * XXX 1715 */ 1716 pmap->pm_pdir[ptepindex] = 0; 1717 ptema = 0; 1718 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1719 pmap_invalidate_all(kernel_pmap); 1720 } 1721 1722 /* 1723 * If the page table page is mapped, we just increment the 1724 * hold count, and activate it. 1725 */ 1726 if (ptema & PG_V) { 1727 m = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME); 1728 m->wire_count++; 1729 } else { 1730 /* 1731 * Here if the pte page isn't mapped, or if it has 1732 * been deallocated. 1733 */ 1734 CTR3(KTR_PMAP, "pmap_allocpte: pmap=%p va=0x%08x flags=0x%x", 1735 pmap, va, flags); 1736 m = _pmap_allocpte(pmap, ptepindex, flags); 1737 if (m == NULL && (flags & M_WAITOK)) 1738 goto retry; 1739 1740 KASSERT(pmap->pm_pdir[ptepindex], ("ptepindex=%d did not get mapped", ptepindex)); 1741 } 1742 return (m); 1743} 1744 1745 1746/*************************************************** 1747* Pmap allocation/deallocation routines. 1748 ***************************************************/ 1749 1750#ifdef SMP 1751/* 1752 * Deal with a SMP shootdown of other users of the pmap that we are 1753 * trying to dispose of. This can be a bit hairy. 1754 */ 1755static cpumask_t *lazymask; 1756static u_int lazyptd; 1757static volatile u_int lazywait; 1758 1759void pmap_lazyfix_action(void); 1760 1761void 1762pmap_lazyfix_action(void) 1763{ 1764 cpumask_t mymask = PCPU_GET(cpumask); 1765 1766#ifdef COUNT_IPIS 1767 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++; 1768#endif 1769 if (rcr3() == lazyptd) 1770 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1771 atomic_clear_int(lazymask, mymask); 1772 atomic_store_rel_int(&lazywait, 1); 1773} 1774 1775static void 1776pmap_lazyfix_self(cpumask_t mymask) 1777{ 1778 1779 if (rcr3() == lazyptd) 1780 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1781 atomic_clear_int(lazymask, mymask); 1782} 1783 1784 1785static void 1786pmap_lazyfix(pmap_t pmap) 1787{ 1788 cpumask_t mymask, mask; 1789 u_int spins; 1790 1791 while ((mask = pmap->pm_active) != 0) { 1792 spins = 50000000; 1793 mask = mask & -mask; /* Find least significant set bit */ 1794 mtx_lock_spin(&smp_ipi_mtx); 1795#ifdef PAE 1796 lazyptd = vtophys(pmap->pm_pdpt); 1797#else 1798 lazyptd = vtophys(pmap->pm_pdir); 1799#endif 1800 mymask = PCPU_GET(cpumask); 1801 if (mask == mymask) { 1802 lazymask = &pmap->pm_active; 1803 pmap_lazyfix_self(mymask); 1804 } else { 1805 atomic_store_rel_int((u_int *)&lazymask, 1806 (u_int)&pmap->pm_active); 1807 atomic_store_rel_int(&lazywait, 0); 1808 ipi_selected(mask, IPI_LAZYPMAP); 1809 while (lazywait == 0) { 1810 ia32_pause(); 1811 if (--spins == 0) 1812 break; 1813 } 1814 } 1815 mtx_unlock_spin(&smp_ipi_mtx); 1816 if (spins == 0) 1817 printf("pmap_lazyfix: spun for 50000000\n"); 1818 } 1819} 1820 1821#else /* SMP */ 1822 1823/* 1824 * Cleaning up on uniprocessor is easy. For various reasons, we're 1825 * unlikely to have to even execute this code, including the fact 1826 * that the cleanup is deferred until the parent does a wait(2), which 1827 * means that another userland process has run. 1828 */ 1829static void 1830pmap_lazyfix(pmap_t pmap) 1831{ 1832 u_int cr3; 1833 1834 cr3 = vtophys(pmap->pm_pdir); 1835 if (cr3 == rcr3()) { 1836 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1837 pmap->pm_active &= ~(PCPU_GET(cpumask)); 1838 } 1839} 1840#endif /* SMP */ 1841 1842/* 1843 * Release any resources held by the given physical map. 1844 * Called when a pmap initialized by pmap_pinit is being released. 1845 * Should only be called if the map contains no valid mappings. 1846 */ 1847void 1848pmap_release(pmap_t pmap) 1849{ 1850 vm_page_t m, ptdpg[2*NPGPTD+1]; 1851 vm_paddr_t ma; 1852 int i; 1853#ifdef XEN 1854#ifdef PAE 1855 int npgptd = NPGPTD + 1; 1856#else 1857 int npgptd = NPGPTD; 1858#endif 1859#else 1860 int npgptd = NPGPTD; 1861#endif 1862 KASSERT(pmap->pm_stats.resident_count == 0, 1863 ("pmap_release: pmap resident count %ld != 0", 1864 pmap->pm_stats.resident_count)); 1865 PT_UPDATES_FLUSH(); 1866 1867 pmap_lazyfix(pmap); 1868 mtx_lock_spin(&allpmaps_lock); 1869 LIST_REMOVE(pmap, pm_list); 1870 mtx_unlock_spin(&allpmaps_lock); 1871 1872 for (i = 0; i < NPGPTD; i++) 1873 ptdpg[i] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdir + (i*NPDEPG)) & PG_FRAME); 1874 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1875#if defined(PAE) && defined(XEN) 1876 ptdpg[NPGPTD] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdpt)); 1877#endif 1878 1879 for (i = 0; i < npgptd; i++) { 1880 m = ptdpg[i]; 1881 ma = xpmap_ptom(VM_PAGE_TO_PHYS(m)); 1882 /* unpinning L1 and L2 treated the same */ 1883 xen_pgd_unpin(ma); 1884#ifdef PAE 1885 KASSERT(xpmap_ptom(VM_PAGE_TO_PHYS(m)) == (pmap->pm_pdpt[i] & PG_FRAME), 1886 ("pmap_release: got wrong ptd page")); 1887#endif 1888 m->wire_count--; 1889 atomic_subtract_int(&cnt.v_wire_count, 1); 1890 vm_page_free(m); 1891 } 1892 PMAP_LOCK_DESTROY(pmap); 1893} 1894 1895static int 1896kvm_size(SYSCTL_HANDLER_ARGS) 1897{ 1898 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1899 1900 return sysctl_handle_long(oidp, &ksize, 0, req); 1901} 1902SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1903 0, 0, kvm_size, "IU", "Size of KVM"); 1904 1905static int 1906kvm_free(SYSCTL_HANDLER_ARGS) 1907{ 1908 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1909 1910 return sysctl_handle_long(oidp, &kfree, 0, req); 1911} 1912SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1913 0, 0, kvm_free, "IU", "Amount of KVM free"); 1914 1915/* 1916 * grow the number of kernel page table entries, if needed 1917 */ 1918void 1919pmap_growkernel(vm_offset_t addr) 1920{ 1921 struct pmap *pmap; 1922 vm_paddr_t ptppaddr; 1923 vm_page_t nkpg; 1924 pd_entry_t newpdir; 1925 1926 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1927 if (kernel_vm_end == 0) { 1928 kernel_vm_end = KERNBASE; 1929 nkpt = 0; 1930 while (pdir_pde(PTD, kernel_vm_end)) { 1931 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1932 nkpt++; 1933 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1934 kernel_vm_end = kernel_map->max_offset; 1935 break; 1936 } 1937 } 1938 } 1939 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1940 if (addr - 1 >= kernel_map->max_offset) 1941 addr = kernel_map->max_offset; 1942 while (kernel_vm_end < addr) { 1943 if (pdir_pde(PTD, kernel_vm_end)) { 1944 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1945 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1946 kernel_vm_end = kernel_map->max_offset; 1947 break; 1948 } 1949 continue; 1950 } 1951 1952 /* 1953 * This index is bogus, but out of the way 1954 */ 1955 nkpg = vm_page_alloc(NULL, nkpt, 1956 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1957 if (!nkpg) 1958 panic("pmap_growkernel: no memory to grow kernel"); 1959 1960 nkpt++; 1961 1962 pmap_zero_page(nkpg); 1963 ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1964 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1965 vm_page_lock_queues(); 1966 PD_SET_VA(kernel_pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE); 1967 mtx_lock_spin(&allpmaps_lock); 1968 LIST_FOREACH(pmap, &allpmaps, pm_list) 1969 PD_SET_VA(pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE); 1970 1971 mtx_unlock_spin(&allpmaps_lock); 1972 vm_page_unlock_queues(); 1973 1974 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1975 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1976 kernel_vm_end = kernel_map->max_offset; 1977 break; 1978 } 1979 } 1980} 1981 1982 1983/*************************************************** 1984 * page management routines. 1985 ***************************************************/ 1986 1987CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE); 1988CTASSERT(_NPCM == 11); 1989 1990static __inline struct pv_chunk * 1991pv_to_chunk(pv_entry_t pv) 1992{ 1993 1994 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK); 1995} 1996 1997#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap) 1998 1999#define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */ 2000#define PC_FREE10 0x0000fffful /* Free values for index 10 */ 2001 2002static uint32_t pc_freemask[11] = { 2003 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 2004 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 2005 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 2006 PC_FREE0_9, PC_FREE10 2007}; 2008 2009SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0, 2010 "Current number of pv entries"); 2011 2012#ifdef PV_STATS 2013static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail; 2014 2015SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0, 2016 "Current number of pv entry chunks"); 2017SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0, 2018 "Current number of pv entry chunks allocated"); 2019SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0, 2020 "Current number of pv entry chunks frees"); 2021SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0, 2022 "Number of times tried to get a chunk page but failed."); 2023 2024static long pv_entry_frees, pv_entry_allocs; 2025static int pv_entry_spare; 2026 2027SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0, 2028 "Current number of pv entry frees"); 2029SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0, 2030 "Current number of pv entry allocs"); 2031SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0, 2032 "Current number of spare pv entries"); 2033 2034static int pmap_collect_inactive, pmap_collect_active; 2035 2036SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0, 2037 "Current number times pmap_collect called on inactive queue"); 2038SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0, 2039 "Current number times pmap_collect called on active queue"); 2040#endif 2041 2042/* 2043 * We are in a serious low memory condition. Resort to 2044 * drastic measures to free some pages so we can allocate 2045 * another pv entry chunk. This is normally called to 2046 * unmap inactive pages, and if necessary, active pages. 2047 */ 2048static void 2049pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq) 2050{ 2051 pmap_t pmap; 2052 pt_entry_t *pte, tpte; 2053 pv_entry_t next_pv, pv; 2054 vm_offset_t va; 2055 vm_page_t m, free; 2056 2057 sched_pin(); 2058 TAILQ_FOREACH(m, &vpq->pl, pageq) { 2059 if (m->hold_count || m->busy) 2060 continue; 2061 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) { 2062 va = pv->pv_va; 2063 pmap = PV_PMAP(pv); 2064 /* Avoid deadlock and lock recursion. */ 2065 if (pmap > locked_pmap) 2066 PMAP_LOCK(pmap); 2067 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) 2068 continue; 2069 pmap->pm_stats.resident_count--; 2070 pte = pmap_pte_quick(pmap, va); 2071 tpte = pte_load_clear(pte); 2072 KASSERT((tpte & PG_W) == 0, 2073 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte)); 2074 if (tpte & PG_A) 2075 vm_page_flag_set(m, PG_REFERENCED); 2076 if (tpte & PG_M) { 2077 KASSERT((tpte & PG_RW), 2078 ("pmap_collect: modified page not writable: va: %#x, pte: %#jx", 2079 va, (uintmax_t)tpte)); 2080 vm_page_dirty(m); 2081 } 2082 free = NULL; 2083 pmap_unuse_pt(pmap, va, &free); 2084 pmap_invalidate_page(pmap, va); 2085 pmap_free_zero_pages(free); 2086 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2087 if (TAILQ_EMPTY(&m->md.pv_list)) 2088 vm_page_flag_clear(m, PG_WRITEABLE); 2089 free_pv_entry(pmap, pv); 2090 if (pmap != locked_pmap) 2091 PMAP_UNLOCK(pmap); 2092 } 2093 } 2094 sched_unpin(); 2095} 2096 2097 2098/* 2099 * free the pv_entry back to the free list 2100 */ 2101static void 2102free_pv_entry(pmap_t pmap, pv_entry_t pv) 2103{ 2104 vm_page_t m; 2105 struct pv_chunk *pc; 2106 int idx, field, bit; 2107 2108 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2109 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2110 PV_STAT(pv_entry_frees++); 2111 PV_STAT(pv_entry_spare++); 2112 pv_entry_count--; 2113 pc = pv_to_chunk(pv); 2114 idx = pv - &pc->pc_pventry[0]; 2115 field = idx / 32; 2116 bit = idx % 32; 2117 pc->pc_map[field] |= 1ul << bit; 2118 /* move to head of list */ 2119 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2120 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2121 for (idx = 0; idx < _NPCM; idx++) 2122 if (pc->pc_map[idx] != pc_freemask[idx]) 2123 return; 2124 PV_STAT(pv_entry_spare -= _NPCPV); 2125 PV_STAT(pc_chunk_count--); 2126 PV_STAT(pc_chunk_frees++); 2127 /* entire chunk is free, return it */ 2128 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2129 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 2130 pmap_qremove((vm_offset_t)pc, 1); 2131 vm_page_unwire(m, 0); 2132 vm_page_free(m); 2133 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 2134} 2135 2136/* 2137 * get a new pv_entry, allocating a block from the system 2138 * when needed. 2139 */ 2140static pv_entry_t 2141get_pv_entry(pmap_t pmap, int try) 2142{ 2143 static const struct timeval printinterval = { 60, 0 }; 2144 static struct timeval lastprint; 2145 static vm_pindex_t colour; 2146 struct vpgqueues *pq; 2147 int bit, field; 2148 pv_entry_t pv; 2149 struct pv_chunk *pc; 2150 vm_page_t m; 2151 2152 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2153 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2154 PV_STAT(pv_entry_allocs++); 2155 pv_entry_count++; 2156 if (pv_entry_count > pv_entry_high_water) 2157 if (ratecheck(&lastprint, &printinterval)) 2158 printf("Approaching the limit on PV entries, consider " 2159 "increasing either the vm.pmap.shpgperproc or the " 2160 "vm.pmap.pv_entry_max tunable.\n"); 2161 pq = NULL; 2162retry: 2163 pc = TAILQ_FIRST(&pmap->pm_pvchunk); 2164 if (pc != NULL) { 2165 for (field = 0; field < _NPCM; field++) { 2166 if (pc->pc_map[field]) { 2167 bit = bsfl(pc->pc_map[field]); 2168 break; 2169 } 2170 } 2171 if (field < _NPCM) { 2172 pv = &pc->pc_pventry[field * 32 + bit]; 2173 pc->pc_map[field] &= ~(1ul << bit); 2174 /* If this was the last item, move it to tail */ 2175 for (field = 0; field < _NPCM; field++) 2176 if (pc->pc_map[field] != 0) { 2177 PV_STAT(pv_entry_spare--); 2178 return (pv); /* not full, return */ 2179 } 2180 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2181 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); 2182 PV_STAT(pv_entry_spare--); 2183 return (pv); 2184 } 2185 } 2186 /* 2187 * Access to the ptelist "pv_vafree" is synchronized by the page 2188 * queues lock. If "pv_vafree" is currently non-empty, it will 2189 * remain non-empty until pmap_ptelist_alloc() completes. 2190 */ 2191 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq == 2192 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) | 2193 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) { 2194 if (try) { 2195 pv_entry_count--; 2196 PV_STAT(pc_chunk_tryfail++); 2197 return (NULL); 2198 } 2199 /* 2200 * Reclaim pv entries: At first, destroy mappings to 2201 * inactive pages. After that, if a pv chunk entry 2202 * is still needed, destroy mappings to active pages. 2203 */ 2204 if (pq == NULL) { 2205 PV_STAT(pmap_collect_inactive++); 2206 pq = &vm_page_queues[PQ_INACTIVE]; 2207 } else if (pq == &vm_page_queues[PQ_INACTIVE]) { 2208 PV_STAT(pmap_collect_active++); 2209 pq = &vm_page_queues[PQ_ACTIVE]; 2210 } else 2211 panic("get_pv_entry: increase vm.pmap.shpgperproc"); 2212 pmap_collect(pmap, pq); 2213 goto retry; 2214 } 2215 PV_STAT(pc_chunk_count++); 2216 PV_STAT(pc_chunk_allocs++); 2217 colour++; 2218 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 2219 pmap_qenter((vm_offset_t)pc, &m, 1); 2220 if ((m->flags & PG_ZERO) == 0) 2221 pagezero(pc); 2222 pc->pc_pmap = pmap; 2223 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */ 2224 for (field = 1; field < _NPCM; field++) 2225 pc->pc_map[field] = pc_freemask[field]; 2226 pv = &pc->pc_pventry[0]; 2227 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2228 PV_STAT(pv_entry_spare += _NPCPV - 1); 2229 return (pv); 2230} 2231 2232static void 2233pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 2234{ 2235 pv_entry_t pv; 2236 2237 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2238 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2239 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2240 if (pmap == PV_PMAP(pv) && va == pv->pv_va) 2241 break; 2242 } 2243 KASSERT(pv != NULL, ("pmap_remove_entry: pv not found")); 2244 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2245 if (TAILQ_EMPTY(&m->md.pv_list)) 2246 vm_page_flag_clear(m, PG_WRITEABLE); 2247 free_pv_entry(pmap, pv); 2248} 2249 2250/* 2251 * Create a pv entry for page at pa for 2252 * (pmap, va). 2253 */ 2254static void 2255pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2256{ 2257 pv_entry_t pv; 2258 2259 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2260 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2261 pv = get_pv_entry(pmap, FALSE); 2262 pv->pv_va = va; 2263 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2264} 2265 2266/* 2267 * Conditionally create a pv entry. 2268 */ 2269static boolean_t 2270pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2271{ 2272 pv_entry_t pv; 2273 2274 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2275 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2276 if (pv_entry_count < pv_entry_high_water && 2277 (pv = get_pv_entry(pmap, TRUE)) != NULL) { 2278 pv->pv_va = va; 2279 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2280 return (TRUE); 2281 } else 2282 return (FALSE); 2283} 2284 2285/* 2286 * pmap_remove_pte: do the things to unmap a page in a process 2287 */ 2288static int 2289pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free) 2290{ 2291 pt_entry_t oldpte; 2292 vm_page_t m; 2293 2294 CTR3(KTR_PMAP, "pmap_remove_pte: pmap=%p *ptq=0x%x va=0x%x", 2295 pmap, (u_long)*ptq, va); 2296 2297 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2298 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2299 oldpte = *ptq; 2300 PT_SET_VA_MA(ptq, 0, TRUE); 2301 if (oldpte & PG_W) 2302 pmap->pm_stats.wired_count -= 1; 2303 /* 2304 * Machines that don't support invlpg, also don't support 2305 * PG_G. 2306 */ 2307 if (oldpte & PG_G) 2308 pmap_invalidate_page(kernel_pmap, va); 2309 pmap->pm_stats.resident_count -= 1; 2310 /* 2311 * XXX This is not strictly correctly, but somewhere along the line 2312 * we are losing the managed bit on some pages. It is unclear to me 2313 * why, but I think the most likely explanation is that xen's writable 2314 * page table implementation doesn't respect the unused bits. 2315 */ 2316 if ((oldpte & PG_MANAGED) || ((oldpte & PG_V) && (va < VM_MAXUSER_ADDRESS)) 2317 ) { 2318 m = PHYS_TO_VM_PAGE(xpmap_mtop(oldpte) & PG_FRAME); 2319 2320 if (!(oldpte & PG_MANAGED)) 2321 printf("va=0x%x is unmanaged :-( pte=0x%llx\n", va, oldpte); 2322 2323 if (oldpte & PG_M) { 2324 KASSERT((oldpte & PG_RW), 2325 ("pmap_remove_pte: modified page not writable: va: %#x, pte: %#jx", 2326 va, (uintmax_t)oldpte)); 2327 vm_page_dirty(m); 2328 } 2329 if (oldpte & PG_A) 2330 vm_page_flag_set(m, PG_REFERENCED); 2331 pmap_remove_entry(pmap, m, va); 2332 } else if ((va < VM_MAXUSER_ADDRESS) && (oldpte & PG_V)) 2333 printf("va=0x%x is unmanaged :-( pte=0x%llx\n", va, oldpte); 2334 2335 return (pmap_unuse_pt(pmap, va, free)); 2336} 2337 2338/* 2339 * Remove a single page from a process address space 2340 */ 2341static void 2342pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free) 2343{ 2344 pt_entry_t *pte; 2345 2346 CTR2(KTR_PMAP, "pmap_remove_page: pmap=%p va=0x%x", 2347 pmap, va); 2348 2349 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2350 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 2351 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2352 if ((pte = pmap_pte_quick(pmap, va)) == NULL || (*pte & PG_V) == 0) 2353 return; 2354 pmap_remove_pte(pmap, pte, va, free); 2355 pmap_invalidate_page(pmap, va); 2356 if (*PMAP1) 2357 PT_SET_MA(PADDR1, 0); 2358 2359} 2360 2361/* 2362 * Remove the given range of addresses from the specified map. 2363 * 2364 * It is assumed that the start and end are properly 2365 * rounded to the page size. 2366 */ 2367void 2368pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 2369{ 2370 vm_offset_t pdnxt; 2371 pd_entry_t ptpaddr; 2372 pt_entry_t *pte; 2373 vm_page_t free = NULL; 2374 int anyvalid; 2375 2376 CTR3(KTR_PMAP, "pmap_remove: pmap=%p sva=0x%x eva=0x%x", 2377 pmap, sva, eva); 2378 2379 /* 2380 * Perform an unsynchronized read. This is, however, safe. 2381 */ 2382 if (pmap->pm_stats.resident_count == 0) 2383 return; 2384 2385 anyvalid = 0; 2386 2387 vm_page_lock_queues(); 2388 sched_pin(); 2389 PMAP_LOCK(pmap); 2390 2391 /* 2392 * special handling of removing one page. a very 2393 * common operation and easy to short circuit some 2394 * code. 2395 */ 2396 if ((sva + PAGE_SIZE == eva) && 2397 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 2398 pmap_remove_page(pmap, sva, &free); 2399 goto out; 2400 } 2401 2402 for (; sva < eva; sva = pdnxt) { 2403 unsigned pdirindex; 2404 2405 /* 2406 * Calculate index for next page table. 2407 */ 2408 pdnxt = (sva + NBPDR) & ~PDRMASK; 2409 if (pmap->pm_stats.resident_count == 0) 2410 break; 2411 2412 pdirindex = sva >> PDRSHIFT; 2413 ptpaddr = pmap->pm_pdir[pdirindex]; 2414 2415 /* 2416 * Weed out invalid mappings. Note: we assume that the page 2417 * directory table is always allocated, and in kernel virtual. 2418 */ 2419 if (ptpaddr == 0) 2420 continue; 2421 2422 /* 2423 * Check for large page. 2424 */ 2425 if ((ptpaddr & PG_PS) != 0) { 2426 PD_CLEAR_VA(pmap, pdirindex, TRUE); 2427 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 2428 anyvalid = 1; 2429 continue; 2430 } 2431 2432 /* 2433 * Limit our scan to either the end of the va represented 2434 * by the current page table page, or to the end of the 2435 * range being removed. 2436 */ 2437 if (pdnxt > eva) 2438 pdnxt = eva; 2439 2440 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2441 sva += PAGE_SIZE) { 2442 if ((*pte & PG_V) == 0) 2443 continue; 2444 2445 /* 2446 * The TLB entry for a PG_G mapping is invalidated 2447 * by pmap_remove_pte(). 2448 */ 2449 if ((*pte & PG_G) == 0) 2450 anyvalid = 1; 2451 if (pmap_remove_pte(pmap, pte, sva, &free)) 2452 break; 2453 } 2454 } 2455 PT_UPDATES_FLUSH(); 2456 if (*PMAP1) 2457 PT_SET_VA_MA(PMAP1, 0, TRUE); 2458out: 2459 if (anyvalid) 2460 pmap_invalidate_all(pmap); 2461 sched_unpin(); 2462 vm_page_unlock_queues(); 2463 PMAP_UNLOCK(pmap); 2464 pmap_free_zero_pages(free); 2465} 2466 2467/* 2468 * Routine: pmap_remove_all 2469 * Function: 2470 * Removes this physical page from 2471 * all physical maps in which it resides. 2472 * Reflects back modify bits to the pager. 2473 * 2474 * Notes: 2475 * Original versions of this routine were very 2476 * inefficient because they iteratively called 2477 * pmap_remove (slow...) 2478 */ 2479 2480void 2481pmap_remove_all(vm_page_t m) 2482{ 2483 pv_entry_t pv; 2484 pmap_t pmap; 2485 pt_entry_t *pte, tpte; 2486 vm_page_t free; 2487 2488#if defined(PMAP_DIAGNOSTIC) 2489 /* 2490 * XXX This makes pmap_remove_all() illegal for non-managed pages! 2491 */ 2492 if (m->flags & PG_FICTITIOUS) { 2493 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%jx", 2494 VM_PAGE_TO_PHYS(m) & 0xffffffff); 2495 } 2496#endif 2497 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2498 sched_pin(); 2499 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2500 pmap = PV_PMAP(pv); 2501 PMAP_LOCK(pmap); 2502 pmap->pm_stats.resident_count--; 2503 pte = pmap_pte_quick(pmap, pv->pv_va); 2504 2505 tpte = *pte; 2506 PT_SET_VA_MA(pte, 0, TRUE); 2507 if (tpte & PG_W) 2508 pmap->pm_stats.wired_count--; 2509 if (tpte & PG_A) 2510 vm_page_flag_set(m, PG_REFERENCED); 2511 2512 /* 2513 * Update the vm_page_t clean and reference bits. 2514 */ 2515 if (tpte & PG_M) { 2516 KASSERT((tpte & PG_RW), 2517 ("pmap_remove_all: modified page not writable: va: %#x, pte: %#jx", 2518 pv->pv_va, (uintmax_t)tpte)); 2519 vm_page_dirty(m); 2520 } 2521 free = NULL; 2522 pmap_unuse_pt(pmap, pv->pv_va, &free); 2523 pmap_invalidate_page(pmap, pv->pv_va); 2524 pmap_free_zero_pages(free); 2525 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2526 free_pv_entry(pmap, pv); 2527 PMAP_UNLOCK(pmap); 2528 } 2529 vm_page_flag_clear(m, PG_WRITEABLE); 2530 PT_UPDATES_FLUSH(); 2531 if (*PMAP1) 2532 PT_SET_MA(PADDR1, 0); 2533 sched_unpin(); 2534} 2535 2536/* 2537 * Set the physical protection on the 2538 * specified range of this map as requested. 2539 */ 2540void 2541pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 2542{ 2543 vm_offset_t pdnxt; 2544 pd_entry_t ptpaddr; 2545 pt_entry_t *pte; 2546 int anychanged; 2547 2548 CTR4(KTR_PMAP, "pmap_protect: pmap=%p sva=0x%x eva=0x%x prot=0x%x", 2549 pmap, sva, eva, prot); 2550 2551 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 2552 pmap_remove(pmap, sva, eva); 2553 return; 2554 } 2555 2556#ifdef PAE 2557 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) == 2558 (VM_PROT_WRITE|VM_PROT_EXECUTE)) 2559 return; 2560#else 2561 if (prot & VM_PROT_WRITE) 2562 return; 2563#endif 2564 2565 anychanged = 0; 2566 2567 vm_page_lock_queues(); 2568 sched_pin(); 2569 PMAP_LOCK(pmap); 2570 for (; sva < eva; sva = pdnxt) { 2571 pt_entry_t obits, pbits; 2572 unsigned pdirindex; 2573 2574 pdnxt = (sva + NBPDR) & ~PDRMASK; 2575 2576 pdirindex = sva >> PDRSHIFT; 2577 ptpaddr = pmap->pm_pdir[pdirindex]; 2578 2579 /* 2580 * Weed out invalid mappings. Note: we assume that the page 2581 * directory table is always allocated, and in kernel virtual. 2582 */ 2583 if (ptpaddr == 0) 2584 continue; 2585 2586 /* 2587 * Check for large page. 2588 */ 2589 if ((ptpaddr & PG_PS) != 0) { 2590 if ((prot & VM_PROT_WRITE) == 0) 2591 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW); 2592#ifdef PAE 2593 if ((prot & VM_PROT_EXECUTE) == 0) 2594 pmap->pm_pdir[pdirindex] |= pg_nx; 2595#endif 2596 anychanged = 1; 2597 continue; 2598 } 2599 2600 if (pdnxt > eva) 2601 pdnxt = eva; 2602 2603 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2604 sva += PAGE_SIZE) { 2605 vm_page_t m; 2606 2607retry: 2608 /* 2609 * Regardless of whether a pte is 32 or 64 bits in 2610 * size, PG_RW, PG_A, and PG_M are among the least 2611 * significant 32 bits. 2612 */ 2613 obits = pbits = *pte; 2614 if ((pbits & PG_V) == 0) 2615 continue; 2616 2617 if ((prot & VM_PROT_WRITE) == 0) { 2618 if ((pbits & (PG_MANAGED | PG_M | PG_RW)) == 2619 (PG_MANAGED | PG_M | PG_RW)) { 2620 m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) & 2621 PG_FRAME); 2622 vm_page_dirty(m); 2623 } 2624 pbits &= ~(PG_RW | PG_M); 2625 } 2626#ifdef PAE 2627 if ((prot & VM_PROT_EXECUTE) == 0) 2628 pbits |= pg_nx; 2629#endif 2630 2631 if (pbits != obits) { 2632#ifdef XEN 2633 obits = *pte; 2634 PT_SET_VA_MA(pte, pbits, TRUE); 2635 if (*pte != pbits) 2636 goto retry; 2637#else 2638#ifdef PAE 2639 if (!atomic_cmpset_64(pte, obits, pbits)) 2640 goto retry; 2641#else 2642 if (!atomic_cmpset_int((u_int *)pte, obits, 2643 pbits)) 2644 goto retry; 2645#endif 2646#endif 2647 if (obits & PG_G) 2648 pmap_invalidate_page(pmap, sva); 2649 else 2650 anychanged = 1; 2651 } 2652 } 2653 } 2654 PT_UPDATES_FLUSH(); 2655 if (*PMAP1) 2656 PT_SET_VA_MA(PMAP1, 0, TRUE); 2657 if (anychanged) 2658 pmap_invalidate_all(pmap); 2659 sched_unpin(); 2660 vm_page_unlock_queues(); 2661 PMAP_UNLOCK(pmap); 2662} 2663 2664/* 2665 * Insert the given physical page (p) at 2666 * the specified virtual address (v) in the 2667 * target physical map with the protection requested. 2668 * 2669 * If specified, the page will be wired down, meaning 2670 * that the related pte can not be reclaimed. 2671 * 2672 * NB: This is the only routine which MAY NOT lazy-evaluate 2673 * or lose information. That is, this routine must actually 2674 * insert this page into the given map NOW. 2675 */ 2676void 2677pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m, 2678 vm_prot_t prot, boolean_t wired) 2679{ 2680 vm_paddr_t pa; 2681 pd_entry_t *pde; 2682 pt_entry_t *pte; 2683 vm_paddr_t opa; 2684 pt_entry_t origpte, newpte; 2685 vm_page_t mpte, om; 2686 boolean_t invlva; 2687 2688 CTR6(KTR_PMAP, "pmap_enter: pmap=%08p va=0x%08x access=0x%x ma=0x%08x prot=0x%x wired=%d", 2689 pmap, va, access, xpmap_ptom(VM_PAGE_TO_PHYS(m)), prot, wired); 2690 va = trunc_page(va); 2691#ifdef PMAP_DIAGNOSTIC 2692 if (va > VM_MAX_KERNEL_ADDRESS) 2693 panic("pmap_enter: toobig"); 2694 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS)) 2695 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va); 2696#endif 2697 2698 mpte = NULL; 2699 2700 vm_page_lock_queues(); 2701 PMAP_LOCK(pmap); 2702 sched_pin(); 2703 2704 /* 2705 * In the case that a page table page is not 2706 * resident, we are creating it here. 2707 */ 2708 if (va < VM_MAXUSER_ADDRESS) { 2709 mpte = pmap_allocpte(pmap, va, M_WAITOK); 2710 } 2711#if 0 && defined(PMAP_DIAGNOSTIC) 2712 else { 2713 pd_entry_t *pdeaddr = pmap_pde(pmap, va); 2714 origpte = *pdeaddr; 2715 if ((origpte & PG_V) == 0) { 2716 panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n", 2717 pmap->pm_pdir[PTDPTDI], origpte, va); 2718 } 2719 } 2720#endif 2721 2722 pde = pmap_pde(pmap, va); 2723 if ((*pde & PG_PS) != 0) 2724 panic("pmap_enter: attempted pmap_enter on 4MB page"); 2725 pte = pmap_pte_quick(pmap, va); 2726 2727 /* 2728 * Page Directory table entry not valid, we need a new PT page 2729 */ 2730 if (pte == NULL) { 2731 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n", 2732 (uintmax_t)pmap->pm_pdir[va >> PDRSHIFT], va); 2733 } 2734 2735 pa = VM_PAGE_TO_PHYS(m); 2736 om = NULL; 2737 opa = origpte = 0; 2738 2739#if 0 2740 KASSERT((*pte & PG_V) || (*pte == 0), ("address set but not valid pte=%p *pte=0x%016jx", 2741 pte, *pte)); 2742#endif 2743 origpte = *pte; 2744 if (origpte) 2745 origpte = xpmap_mtop(origpte); 2746 opa = origpte & PG_FRAME; 2747 2748 /* 2749 * Mapping has not changed, must be protection or wiring change. 2750 */ 2751 if (origpte && (opa == pa)) { 2752 /* 2753 * Wiring change, just update stats. We don't worry about 2754 * wiring PT pages as they remain resident as long as there 2755 * are valid mappings in them. Hence, if a user page is wired, 2756 * the PT page will be also. 2757 */ 2758 if (wired && ((origpte & PG_W) == 0)) 2759 pmap->pm_stats.wired_count++; 2760 else if (!wired && (origpte & PG_W)) 2761 pmap->pm_stats.wired_count--; 2762 2763 /* 2764 * Remove extra pte reference 2765 */ 2766 if (mpte) 2767 mpte->wire_count--; 2768 2769 /* 2770 * We might be turning off write access to the page, 2771 * so we go ahead and sense modify status. 2772 */ 2773 if (origpte & PG_MANAGED) { 2774 om = m; 2775 pa |= PG_MANAGED; 2776 } 2777 goto validate; 2778 } 2779 /* 2780 * Mapping has changed, invalidate old range and fall through to 2781 * handle validating new mapping. 2782 */ 2783 if (opa) { 2784 if (origpte & PG_W) 2785 pmap->pm_stats.wired_count--; 2786 if (origpte & PG_MANAGED) { 2787 om = PHYS_TO_VM_PAGE(opa); 2788 pmap_remove_entry(pmap, om, va); 2789 } else if (va < VM_MAXUSER_ADDRESS) 2790 printf("va=0x%x is unmanaged :-( \n", va); 2791 2792 if (mpte != NULL) { 2793 mpte->wire_count--; 2794 KASSERT(mpte->wire_count > 0, 2795 ("pmap_enter: missing reference to page table page," 2796 " va: 0x%x", va)); 2797 } 2798 } else 2799 pmap->pm_stats.resident_count++; 2800 2801 /* 2802 * Enter on the PV list if part of our managed memory. 2803 */ 2804 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 2805 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva, 2806 ("pmap_enter: managed mapping within the clean submap")); 2807 pmap_insert_entry(pmap, va, m); 2808 pa |= PG_MANAGED; 2809 } 2810 2811 /* 2812 * Increment counters 2813 */ 2814 if (wired) 2815 pmap->pm_stats.wired_count++; 2816 2817validate: 2818 /* 2819 * Now validate mapping with desired protection/wiring. 2820 */ 2821 newpte = (pt_entry_t)(pa | PG_V); 2822 if ((prot & VM_PROT_WRITE) != 0) { 2823 newpte |= PG_RW; 2824 vm_page_flag_set(m, PG_WRITEABLE); 2825 } 2826#ifdef PAE 2827 if ((prot & VM_PROT_EXECUTE) == 0) 2828 newpte |= pg_nx; 2829#endif 2830 if (wired) 2831 newpte |= PG_W; 2832 if (va < VM_MAXUSER_ADDRESS) 2833 newpte |= PG_U; 2834 if (pmap == kernel_pmap) 2835 newpte |= pgeflag; 2836 2837 critical_enter(); 2838 /* 2839 * if the mapping or permission bits are different, we need 2840 * to update the pte. 2841 */ 2842 if ((origpte & ~(PG_M|PG_A)) != newpte) { 2843 if (origpte) { 2844 invlva = FALSE; 2845 origpte = *pte; 2846 PT_SET_VA(pte, newpte | PG_A, FALSE); 2847 if (origpte & PG_A) { 2848 if (origpte & PG_MANAGED) 2849 vm_page_flag_set(om, PG_REFERENCED); 2850 if (opa != VM_PAGE_TO_PHYS(m)) 2851 invlva = TRUE; 2852#ifdef PAE 2853 if ((origpte & PG_NX) == 0 && 2854 (newpte & PG_NX) != 0) 2855 invlva = TRUE; 2856#endif 2857 } 2858 if (origpte & PG_M) { 2859 KASSERT((origpte & PG_RW), 2860 ("pmap_enter: modified page not writable: va: %#x, pte: %#jx", 2861 va, (uintmax_t)origpte)); 2862 if ((origpte & PG_MANAGED) != 0) 2863 vm_page_dirty(om); 2864 if ((prot & VM_PROT_WRITE) == 0) 2865 invlva = TRUE; 2866 } 2867 if (invlva) 2868 pmap_invalidate_page(pmap, va); 2869 } else{ 2870 PT_SET_VA(pte, newpte | PG_A, FALSE); 2871 } 2872 2873 } 2874 PT_UPDATES_FLUSH(); 2875 critical_exit(); 2876 if (*PMAP1) 2877 PT_SET_VA_MA(PMAP1, 0, TRUE); 2878 sched_unpin(); 2879 vm_page_unlock_queues(); 2880 PMAP_UNLOCK(pmap); 2881} 2882 2883/* 2884 * Maps a sequence of resident pages belonging to the same object. 2885 * The sequence begins with the given page m_start. This page is 2886 * mapped at the given virtual address start. Each subsequent page is 2887 * mapped at a virtual address that is offset from start by the same 2888 * amount as the page is offset from m_start within the object. The 2889 * last page in the sequence is the page with the largest offset from 2890 * m_start that can be mapped at a virtual address less than the given 2891 * virtual address end. Not every virtual page between start and end 2892 * is mapped; only those for which a resident page exists with the 2893 * corresponding offset from m_start are mapped. 2894 */ 2895void 2896pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, 2897 vm_page_t m_start, vm_prot_t prot) 2898{ 2899 vm_page_t m, mpte; 2900 vm_pindex_t diff, psize; 2901 multicall_entry_t mcl[16]; 2902 multicall_entry_t *mclp = mcl; 2903 int error, count = 0; 2904 2905 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED); 2906 psize = atop(end - start); 2907 2908 mpte = NULL; 2909 m = m_start; 2910 PMAP_LOCK(pmap); 2911 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { 2912 mpte = pmap_enter_quick_locked(&mclp, &count, pmap, start + ptoa(diff), m, 2913 prot, mpte); 2914 m = TAILQ_NEXT(m, listq); 2915 if (count == 16) { 2916 error = HYPERVISOR_multicall(mcl, count); 2917 KASSERT(error == 0, ("bad multicall %d", error)); 2918 mclp = mcl; 2919 count = 0; 2920 } 2921 } 2922 if (count) { 2923 error = HYPERVISOR_multicall(mcl, count); 2924 KASSERT(error == 0, ("bad multicall %d", error)); 2925 } 2926 2927 PMAP_UNLOCK(pmap); 2928} 2929 2930/* 2931 * this code makes some *MAJOR* assumptions: 2932 * 1. Current pmap & pmap exists. 2933 * 2. Not wired. 2934 * 3. Read access. 2935 * 4. No page table pages. 2936 * but is *MUCH* faster than pmap_enter... 2937 */ 2938 2939void 2940pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 2941{ 2942 multicall_entry_t mcl, *mclp; 2943 int count = 0; 2944 mclp = &mcl; 2945 2946 CTR4(KTR_PMAP, "pmap_enter_quick: pmap=%p va=0x%x m=%p prot=0x%x", 2947 pmap, va, m, prot); 2948 2949 PMAP_LOCK(pmap); 2950 (void) pmap_enter_quick_locked(&mclp, &count, pmap, va, m, prot, NULL); 2951 if (count) 2952 HYPERVISOR_multicall(&mcl, count); 2953 PMAP_UNLOCK(pmap); 2954} 2955 2956#ifdef notyet 2957void 2958pmap_enter_quick_range(pmap_t pmap, vm_offset_t *addrs, vm_page_t *pages, vm_prot_t *prots, int count) 2959{ 2960 int i, error, index = 0; 2961 multicall_entry_t mcl[16]; 2962 multicall_entry_t *mclp = mcl; 2963 2964 PMAP_LOCK(pmap); 2965 for (i = 0; i < count; i++, addrs++, pages++, prots++) { 2966 if (!pmap_is_prefaultable_locked(pmap, *addrs)) 2967 continue; 2968 2969 (void) pmap_enter_quick_locked(&mclp, &index, pmap, *addrs, *pages, *prots, NULL); 2970 if (index == 16) { 2971 error = HYPERVISOR_multicall(mcl, index); 2972 mclp = mcl; 2973 index = 0; 2974 KASSERT(error == 0, ("bad multicall %d", error)); 2975 } 2976 } 2977 if (index) { 2978 error = HYPERVISOR_multicall(mcl, index); 2979 KASSERT(error == 0, ("bad multicall %d", error)); 2980 } 2981 2982 PMAP_UNLOCK(pmap); 2983} 2984#endif 2985 2986static vm_page_t 2987pmap_enter_quick_locked(multicall_entry_t **mclpp, int *count, pmap_t pmap, vm_offset_t va, vm_page_t m, 2988 vm_prot_t prot, vm_page_t mpte) 2989{ 2990 pt_entry_t *pte; 2991 vm_paddr_t pa; 2992 vm_page_t free; 2993 multicall_entry_t *mcl = *mclpp; 2994 2995 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva || 2996 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0, 2997 ("pmap_enter_quick_locked: managed mapping within the clean submap")); 2998 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2999 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 3000 3001 /* 3002 * In the case that a page table page is not 3003 * resident, we are creating it here. 3004 */ 3005 if (va < VM_MAXUSER_ADDRESS) { 3006 unsigned ptepindex; 3007 pd_entry_t ptema; 3008 3009 /* 3010 * Calculate pagetable page index 3011 */ 3012 ptepindex = va >> PDRSHIFT; 3013 if (mpte && (mpte->pindex == ptepindex)) { 3014 mpte->wire_count++; 3015 } else { 3016 /* 3017 * Get the page directory entry 3018 */ 3019 ptema = pmap->pm_pdir[ptepindex]; 3020 3021 /* 3022 * If the page table page is mapped, we just increment 3023 * the hold count, and activate it. 3024 */ 3025 if (ptema & PG_V) { 3026 if (ptema & PG_PS) 3027 panic("pmap_enter_quick: unexpected mapping into 4MB page"); 3028 mpte = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME); 3029 mpte->wire_count++; 3030 } else { 3031 mpte = _pmap_allocpte(pmap, ptepindex, 3032 M_NOWAIT); 3033 if (mpte == NULL) 3034 return (mpte); 3035 } 3036 } 3037 } else { 3038 mpte = NULL; 3039 } 3040 3041 /* 3042 * This call to vtopte makes the assumption that we are 3043 * entering the page into the current pmap. In order to support 3044 * quick entry into any pmap, one would likely use pmap_pte_quick. 3045 * But that isn't as quick as vtopte. 3046 */ 3047 KASSERT(pmap_is_current(pmap), ("entering pages in non-current pmap")); 3048 pte = vtopte(va); 3049 if (*pte & PG_V) { 3050 if (mpte != NULL) { 3051 mpte->wire_count--; 3052 mpte = NULL; 3053 } 3054 return (mpte); 3055 } 3056 3057 /* 3058 * Enter on the PV list if part of our managed memory. 3059 */ 3060 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 && 3061 !pmap_try_insert_pv_entry(pmap, va, m)) { 3062 if (mpte != NULL) { 3063 free = NULL; 3064 if (pmap_unwire_pte_hold(pmap, mpte, &free)) { 3065 pmap_invalidate_page(pmap, va); 3066 pmap_free_zero_pages(free); 3067 } 3068 3069 mpte = NULL; 3070 } 3071 return (mpte); 3072 } 3073 3074 /* 3075 * Increment counters 3076 */ 3077 pmap->pm_stats.resident_count++; 3078 3079 pa = VM_PAGE_TO_PHYS(m); 3080#ifdef PAE 3081 if ((prot & VM_PROT_EXECUTE) == 0) 3082 pa |= pg_nx; 3083#endif 3084 3085#if 0 3086 /* 3087 * Now validate mapping with RO protection 3088 */ 3089 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 3090 pte_store(pte, pa | PG_V | PG_U); 3091 else 3092 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 3093#else 3094 /* 3095 * Now validate mapping with RO protection 3096 */ 3097 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 3098 pa = xpmap_ptom(pa | PG_V | PG_U); 3099 else 3100 pa = xpmap_ptom(pa | PG_V | PG_U | PG_MANAGED); 3101 3102 mcl->op = __HYPERVISOR_update_va_mapping; 3103 mcl->args[0] = va; 3104 mcl->args[1] = (uint32_t)(pa & 0xffffffff); 3105 mcl->args[2] = (uint32_t)(pa >> 32); 3106 mcl->args[3] = 0; 3107 *mclpp = mcl + 1; 3108 *count = *count + 1; 3109#endif 3110 return mpte; 3111} 3112 3113/* 3114 * Make a temporary mapping for a physical address. This is only intended 3115 * to be used for panic dumps. 3116 */ 3117void * 3118pmap_kenter_temporary(vm_paddr_t pa, int i) 3119{ 3120 vm_offset_t va; 3121 vm_paddr_t ma = xpmap_ptom(pa); 3122 3123 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 3124 PT_SET_MA(va, (ma & ~PAGE_MASK) | PG_V | pgeflag); 3125 invlpg(va); 3126 return ((void *)crashdumpmap); 3127} 3128 3129/* 3130 * This code maps large physical mmap regions into the 3131 * processor address space. Note that some shortcuts 3132 * are taken, but the code works. 3133 */ 3134void 3135pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 3136 vm_object_t object, vm_pindex_t pindex, 3137 vm_size_t size) 3138{ 3139 pd_entry_t *pde; 3140 vm_paddr_t pa, ptepa; 3141 vm_page_t p; 3142 int pat_mode; 3143 3144 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 3145 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG, 3146 ("pmap_object_init_pt: non-device object")); 3147 if (pseflag && 3148 (addr & (NBPDR - 1)) == 0 && (size & (NBPDR - 1)) == 0) { 3149 if (!vm_object_populate(object, pindex, pindex + atop(size))) 3150 return; 3151 p = vm_page_lookup(object, pindex); 3152 KASSERT(p->valid == VM_PAGE_BITS_ALL, 3153 ("pmap_object_init_pt: invalid page %p", p)); 3154 pat_mode = p->md.pat_mode; 3155 /* 3156 * Abort the mapping if the first page is not physically 3157 * aligned to a 2/4MB page boundary. 3158 */ 3159 ptepa = VM_PAGE_TO_PHYS(p); 3160 if (ptepa & (NBPDR - 1)) 3161 return; 3162 /* 3163 * Skip the first page. Abort the mapping if the rest of 3164 * the pages are not physically contiguous or have differing 3165 * memory attributes. 3166 */ 3167 p = TAILQ_NEXT(p, listq); 3168 for (pa = ptepa + PAGE_SIZE; pa < ptepa + size; 3169 pa += PAGE_SIZE) { 3170 KASSERT(p->valid == VM_PAGE_BITS_ALL, 3171 ("pmap_object_init_pt: invalid page %p", p)); 3172 if (pa != VM_PAGE_TO_PHYS(p) || 3173 pat_mode != p->md.pat_mode) 3174 return; 3175 p = TAILQ_NEXT(p, listq); 3176 } 3177 /* Map using 2/4MB pages. */ 3178 PMAP_LOCK(pmap); 3179 for (pa = ptepa | pmap_cache_bits(pat_mode, 1); pa < ptepa + 3180 size; pa += NBPDR) { 3181 pde = pmap_pde(pmap, addr); 3182 if (*pde == 0) { 3183 pde_store(pde, pa | PG_PS | PG_M | PG_A | 3184 PG_U | PG_RW | PG_V); 3185 pmap->pm_stats.resident_count += NBPDR / 3186 PAGE_SIZE; 3187 pmap_pde_mappings++; 3188 } 3189 /* Else continue on if the PDE is already valid. */ 3190 addr += NBPDR; 3191 } 3192 PMAP_UNLOCK(pmap); 3193 } 3194} 3195 3196/* 3197 * Routine: pmap_change_wiring 3198 * Function: Change the wiring attribute for a map/virtual-address 3199 * pair. 3200 * In/out conditions: 3201 * The mapping must already exist in the pmap. 3202 */ 3203void 3204pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired) 3205{ 3206 pt_entry_t *pte; 3207 3208 vm_page_lock_queues(); 3209 PMAP_LOCK(pmap); 3210 pte = pmap_pte(pmap, va); 3211 3212 if (wired && !pmap_pte_w(pte)) { 3213 PT_SET_VA_MA((pte), *(pte) | PG_W, TRUE); 3214 pmap->pm_stats.wired_count++; 3215 } else if (!wired && pmap_pte_w(pte)) { 3216 PT_SET_VA_MA((pte), *(pte) & ~PG_W, TRUE); 3217 pmap->pm_stats.wired_count--; 3218 } 3219 3220 /* 3221 * Wiring is not a hardware characteristic so there is no need to 3222 * invalidate TLB. 3223 */ 3224 pmap_pte_release(pte); 3225 PMAP_UNLOCK(pmap); 3226 vm_page_unlock_queues(); 3227} 3228 3229 3230 3231/* 3232 * Copy the range specified by src_addr/len 3233 * from the source map to the range dst_addr/len 3234 * in the destination map. 3235 * 3236 * This routine is only advisory and need not do anything. 3237 */ 3238 3239void 3240pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 3241 vm_offset_t src_addr) 3242{ 3243 vm_page_t free; 3244 vm_offset_t addr; 3245 vm_offset_t end_addr = src_addr + len; 3246 vm_offset_t pdnxt; 3247 3248 if (dst_addr != src_addr) 3249 return; 3250 3251 if (!pmap_is_current(src_pmap)) { 3252 CTR2(KTR_PMAP, 3253 "pmap_copy, skipping: pdir[PTDPTDI]=0x%jx PTDpde[0]=0x%jx", 3254 (src_pmap->pm_pdir[PTDPTDI] & PG_FRAME), (PTDpde[0] & PG_FRAME)); 3255 3256 return; 3257 } 3258 CTR5(KTR_PMAP, "pmap_copy: dst_pmap=%p src_pmap=%p dst_addr=0x%x len=%d src_addr=0x%x", 3259 dst_pmap, src_pmap, dst_addr, len, src_addr); 3260 3261 vm_page_lock_queues(); 3262 if (dst_pmap < src_pmap) { 3263 PMAP_LOCK(dst_pmap); 3264 PMAP_LOCK(src_pmap); 3265 } else { 3266 PMAP_LOCK(src_pmap); 3267 PMAP_LOCK(dst_pmap); 3268 } 3269 sched_pin(); 3270 for (addr = src_addr; addr < end_addr; addr = pdnxt) { 3271 pt_entry_t *src_pte, *dst_pte; 3272 vm_page_t dstmpte, srcmpte; 3273 pd_entry_t srcptepaddr; 3274 unsigned ptepindex; 3275 3276 if (addr >= UPT_MIN_ADDRESS) 3277 panic("pmap_copy: invalid to pmap_copy page tables"); 3278 3279 pdnxt = (addr + NBPDR) & ~PDRMASK; 3280 ptepindex = addr >> PDRSHIFT; 3281 3282 srcptepaddr = PT_GET(&src_pmap->pm_pdir[ptepindex]); 3283 if (srcptepaddr == 0) 3284 continue; 3285 3286 if (srcptepaddr & PG_PS) { 3287 if (dst_pmap->pm_pdir[ptepindex] == 0) { 3288 PD_SET_VA(dst_pmap, ptepindex, srcptepaddr & ~PG_W, TRUE); 3289 dst_pmap->pm_stats.resident_count += 3290 NBPDR / PAGE_SIZE; 3291 } 3292 continue; 3293 } 3294 3295 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME); 3296 if (srcmpte->wire_count == 0) 3297 panic("pmap_copy: source page table page is unused"); 3298 3299 if (pdnxt > end_addr) 3300 pdnxt = end_addr; 3301 3302 src_pte = vtopte(addr); 3303 while (addr < pdnxt) { 3304 pt_entry_t ptetemp; 3305 ptetemp = *src_pte; 3306 /* 3307 * we only virtual copy managed pages 3308 */ 3309 if ((ptetemp & PG_MANAGED) != 0) { 3310 dstmpte = pmap_allocpte(dst_pmap, addr, 3311 M_NOWAIT); 3312 if (dstmpte == NULL) 3313 break; 3314 dst_pte = pmap_pte_quick(dst_pmap, addr); 3315 if (*dst_pte == 0 && 3316 pmap_try_insert_pv_entry(dst_pmap, addr, 3317 PHYS_TO_VM_PAGE(xpmap_mtop(ptetemp) & PG_FRAME))) { 3318 /* 3319 * Clear the wired, modified, and 3320 * accessed (referenced) bits 3321 * during the copy. 3322 */ 3323 KASSERT(ptetemp != 0, ("src_pte not set")); 3324 PT_SET_VA_MA(dst_pte, ptetemp & ~(PG_W | PG_M | PG_A), TRUE /* XXX debug */); 3325 KASSERT(*dst_pte == (ptetemp & ~(PG_W | PG_M | PG_A)), 3326 ("no pmap copy expected: 0x%jx saw: 0x%jx", 3327 ptetemp & ~(PG_W | PG_M | PG_A), *dst_pte)); 3328 dst_pmap->pm_stats.resident_count++; 3329 } else { 3330 free = NULL; 3331 if (pmap_unwire_pte_hold(dst_pmap, 3332 dstmpte, &free)) { 3333 pmap_invalidate_page(dst_pmap, 3334 addr); 3335 pmap_free_zero_pages(free); 3336 } 3337 } 3338 if (dstmpte->wire_count >= srcmpte->wire_count) 3339 break; 3340 } 3341 addr += PAGE_SIZE; 3342 src_pte++; 3343 } 3344 } 3345 PT_UPDATES_FLUSH(); 3346 sched_unpin(); 3347 vm_page_unlock_queues(); 3348 PMAP_UNLOCK(src_pmap); 3349 PMAP_UNLOCK(dst_pmap); 3350} 3351 3352static __inline void 3353pagezero(void *page) 3354{ 3355#if defined(I686_CPU) 3356 if (cpu_class == CPUCLASS_686) { 3357#if defined(CPU_ENABLE_SSE) 3358 if (cpu_feature & CPUID_SSE2) 3359 sse2_pagezero(page); 3360 else 3361#endif 3362 i686_pagezero(page); 3363 } else 3364#endif 3365 bzero(page, PAGE_SIZE); 3366} 3367 3368/* 3369 * pmap_zero_page zeros the specified hardware page by mapping 3370 * the page into KVM and using bzero to clear its contents. 3371 */ 3372void 3373pmap_zero_page(vm_page_t m) 3374{ 3375 struct sysmaps *sysmaps; 3376 3377 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3378 mtx_lock(&sysmaps->lock); 3379 if (*sysmaps->CMAP2) 3380 panic("pmap_zero_page: CMAP2 busy"); 3381 sched_pin(); 3382 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3383 pagezero(sysmaps->CADDR2); 3384 PT_SET_MA(sysmaps->CADDR2, 0); 3385 sched_unpin(); 3386 mtx_unlock(&sysmaps->lock); 3387} 3388 3389/* 3390 * pmap_zero_page_area zeros the specified hardware page by mapping 3391 * the page into KVM and using bzero to clear its contents. 3392 * 3393 * off and size may not cover an area beyond a single hardware page. 3394 */ 3395void 3396pmap_zero_page_area(vm_page_t m, int off, int size) 3397{ 3398 struct sysmaps *sysmaps; 3399 3400 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3401 mtx_lock(&sysmaps->lock); 3402 if (*sysmaps->CMAP2) 3403 panic("pmap_zero_page: CMAP2 busy"); 3404 sched_pin(); 3405 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3406 3407 if (off == 0 && size == PAGE_SIZE) 3408 pagezero(sysmaps->CADDR2); 3409 else 3410 bzero((char *)sysmaps->CADDR2 + off, size); 3411 PT_SET_MA(sysmaps->CADDR2, 0); 3412 sched_unpin(); 3413 mtx_unlock(&sysmaps->lock); 3414} 3415 3416/* 3417 * pmap_zero_page_idle zeros the specified hardware page by mapping 3418 * the page into KVM and using bzero to clear its contents. This 3419 * is intended to be called from the vm_pagezero process only and 3420 * outside of Giant. 3421 */ 3422void 3423pmap_zero_page_idle(vm_page_t m) 3424{ 3425 3426 if (*CMAP3) 3427 panic("pmap_zero_page: CMAP3 busy"); 3428 sched_pin(); 3429 PT_SET_MA(CADDR3, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3430 pagezero(CADDR3); 3431 PT_SET_MA(CADDR3, 0); 3432 sched_unpin(); 3433} 3434 3435/* 3436 * pmap_copy_page copies the specified (machine independent) 3437 * page by mapping the page into virtual memory and using 3438 * bcopy to copy the page, one machine dependent page at a 3439 * time. 3440 */ 3441void 3442pmap_copy_page(vm_page_t src, vm_page_t dst) 3443{ 3444 struct sysmaps *sysmaps; 3445 3446 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3447 mtx_lock(&sysmaps->lock); 3448 if (*sysmaps->CMAP1) 3449 panic("pmap_copy_page: CMAP1 busy"); 3450 if (*sysmaps->CMAP2) 3451 panic("pmap_copy_page: CMAP2 busy"); 3452 sched_pin(); 3453 PT_SET_MA(sysmaps->CADDR1, PG_V | xpmap_ptom(VM_PAGE_TO_PHYS(src)) | PG_A); 3454 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(dst)) | PG_A | PG_M); 3455 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); 3456 PT_SET_MA(sysmaps->CADDR1, 0); 3457 PT_SET_MA(sysmaps->CADDR2, 0); 3458 sched_unpin(); 3459 mtx_unlock(&sysmaps->lock); 3460} 3461 3462/* 3463 * Returns true if the pmap's pv is one of the first 3464 * 16 pvs linked to from this page. This count may 3465 * be changed upwards or downwards in the future; it 3466 * is only necessary that true be returned for a small 3467 * subset of pmaps for proper page aging. 3468 */ 3469boolean_t 3470pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 3471{ 3472 pv_entry_t pv; 3473 int loops = 0; 3474 3475 if (m->flags & PG_FICTITIOUS) 3476 return (FALSE); 3477 3478 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3479 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3480 if (PV_PMAP(pv) == pmap) { 3481 return TRUE; 3482 } 3483 loops++; 3484 if (loops >= 16) 3485 break; 3486 } 3487 return (FALSE); 3488} 3489 3490/* 3491 * pmap_page_wired_mappings: 3492 * 3493 * Return the number of managed mappings to the given physical page 3494 * that are wired. 3495 */ 3496int 3497pmap_page_wired_mappings(vm_page_t m) 3498{ 3499 pv_entry_t pv; 3500 pt_entry_t *pte; 3501 pmap_t pmap; 3502 int count; 3503 3504 count = 0; 3505 if ((m->flags & PG_FICTITIOUS) != 0) 3506 return (count); 3507 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3508 sched_pin(); 3509 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3510 pmap = PV_PMAP(pv); 3511 PMAP_LOCK(pmap); 3512 pte = pmap_pte_quick(pmap, pv->pv_va); 3513 if ((*pte & PG_W) != 0) 3514 count++; 3515 PMAP_UNLOCK(pmap); 3516 } 3517 sched_unpin(); 3518 return (count); 3519} 3520 3521/* 3522 * Returns TRUE if the given page is mapped individually or as part of 3523 * a 4mpage. Otherwise, returns FALSE. 3524 */ 3525boolean_t 3526pmap_page_is_mapped(vm_page_t m) 3527{ 3528 struct md_page *pvh; 3529 3530 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 3531 return (FALSE); 3532 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3533 if (TAILQ_EMPTY(&m->md.pv_list)) { 3534 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 3535 return (!TAILQ_EMPTY(&pvh->pv_list)); 3536 } else 3537 return (TRUE); 3538} 3539 3540/* 3541 * Remove all pages from specified address space 3542 * this aids process exit speeds. Also, this code 3543 * is special cased for current process only, but 3544 * can have the more generic (and slightly slower) 3545 * mode enabled. This is much faster than pmap_remove 3546 * in the case of running down an entire address space. 3547 */ 3548void 3549pmap_remove_pages(pmap_t pmap) 3550{ 3551 pt_entry_t *pte, tpte; 3552 vm_page_t m, free = NULL; 3553 pv_entry_t pv; 3554 struct pv_chunk *pc, *npc; 3555 int field, idx; 3556 int32_t bit; 3557 uint32_t inuse, bitmask; 3558 int allfree; 3559 3560 CTR1(KTR_PMAP, "pmap_remove_pages: pmap=%p", pmap); 3561 3562 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { 3563 printf("warning: pmap_remove_pages called with non-current pmap\n"); 3564 return; 3565 } 3566 vm_page_lock_queues(); 3567 KASSERT(pmap_is_current(pmap), ("removing pages from non-current pmap")); 3568 PMAP_LOCK(pmap); 3569 sched_pin(); 3570 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) { 3571 allfree = 1; 3572 for (field = 0; field < _NPCM; field++) { 3573 inuse = (~(pc->pc_map[field])) & pc_freemask[field]; 3574 while (inuse != 0) { 3575 bit = bsfl(inuse); 3576 bitmask = 1UL << bit; 3577 idx = field * 32 + bit; 3578 pv = &pc->pc_pventry[idx]; 3579 inuse &= ~bitmask; 3580 3581 pte = vtopte(pv->pv_va); 3582 tpte = *pte ? xpmap_mtop(*pte) : 0; 3583 3584 if (tpte == 0) { 3585 printf( 3586 "TPTE at %p IS ZERO @ VA %08x\n", 3587 pte, pv->pv_va); 3588 panic("bad pte"); 3589 } 3590 3591/* 3592 * We cannot remove wired pages from a process' mapping at this time 3593 */ 3594 if (tpte & PG_W) { 3595 allfree = 0; 3596 continue; 3597 } 3598 3599 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME); 3600 KASSERT(m->phys_addr == (tpte & PG_FRAME), 3601 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 3602 m, (uintmax_t)m->phys_addr, 3603 (uintmax_t)tpte)); 3604 3605 KASSERT(m < &vm_page_array[vm_page_array_size], 3606 ("pmap_remove_pages: bad tpte %#jx", 3607 (uintmax_t)tpte)); 3608 3609 3610 PT_CLEAR_VA(pte, FALSE); 3611 3612 /* 3613 * Update the vm_page_t clean/reference bits. 3614 */ 3615 if (tpte & PG_M) 3616 vm_page_dirty(m); 3617 3618 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3619 if (TAILQ_EMPTY(&m->md.pv_list)) 3620 vm_page_flag_clear(m, PG_WRITEABLE); 3621 3622 pmap_unuse_pt(pmap, pv->pv_va, &free); 3623 3624 /* Mark free */ 3625 PV_STAT(pv_entry_frees++); 3626 PV_STAT(pv_entry_spare++); 3627 pv_entry_count--; 3628 pc->pc_map[field] |= bitmask; 3629 pmap->pm_stats.resident_count--; 3630 } 3631 } 3632 PT_UPDATES_FLUSH(); 3633 if (allfree) { 3634 PV_STAT(pv_entry_spare -= _NPCPV); 3635 PV_STAT(pc_chunk_count--); 3636 PV_STAT(pc_chunk_frees++); 3637 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 3638 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 3639 pmap_qremove((vm_offset_t)pc, 1); 3640 vm_page_unwire(m, 0); 3641 vm_page_free(m); 3642 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 3643 } 3644 } 3645 PT_UPDATES_FLUSH(); 3646 if (*PMAP1) 3647 PT_SET_MA(PADDR1, 0); 3648 3649 sched_unpin(); 3650 pmap_invalidate_all(pmap); 3651 vm_page_unlock_queues(); 3652 PMAP_UNLOCK(pmap); 3653 pmap_free_zero_pages(free); 3654} 3655 3656/* 3657 * pmap_is_modified: 3658 * 3659 * Return whether or not the specified physical page was modified 3660 * in any physical maps. 3661 */ 3662boolean_t 3663pmap_is_modified(vm_page_t m) 3664{ 3665 pv_entry_t pv; 3666 pt_entry_t *pte; 3667 pmap_t pmap; 3668 boolean_t rv; 3669 3670 rv = FALSE; 3671 if (m->flags & PG_FICTITIOUS) 3672 return (rv); 3673 3674 sched_pin(); 3675 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3676 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3677 pmap = PV_PMAP(pv); 3678 PMAP_LOCK(pmap); 3679 pte = pmap_pte_quick(pmap, pv->pv_va); 3680 rv = (*pte & PG_M) != 0; 3681 PMAP_UNLOCK(pmap); 3682 if (rv) 3683 break; 3684 } 3685 if (*PMAP1) 3686 PT_SET_MA(PADDR1, 0); 3687 sched_unpin(); 3688 return (rv); 3689} 3690 3691/* 3692 * pmap_is_prefaultable: 3693 * 3694 * Return whether or not the specified virtual address is elgible 3695 * for prefault. 3696 */ 3697static boolean_t 3698pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr) 3699{ 3700 pt_entry_t *pte; 3701 boolean_t rv = FALSE; 3702 3703 return (rv); 3704 3705 if (pmap_is_current(pmap) && *pmap_pde(pmap, addr)) { 3706 pte = vtopte(addr); 3707 rv = (*pte == 0); 3708 } 3709 return (rv); 3710} 3711 3712boolean_t 3713pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 3714{ 3715 boolean_t rv; 3716 3717 PMAP_LOCK(pmap); 3718 rv = pmap_is_prefaultable_locked(pmap, addr); 3719 PMAP_UNLOCK(pmap); 3720 return (rv); 3721} 3722 3723boolean_t 3724pmap_is_referenced(vm_page_t m) 3725{ 3726 pv_entry_t pv; 3727 pt_entry_t *pte; 3728 pmap_t pmap; 3729 boolean_t rv; 3730 3731 rv = FALSE; 3732 if (m->flags & PG_FICTITIOUS) 3733 return (rv); 3734 sched_pin(); 3735 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3736 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3737 pmap = PV_PMAP(pv); 3738 PMAP_LOCK(pmap); 3739 pte = pmap_pte_quick(pmap, pv->pv_va); 3740 rv = (*pte & (PG_A | PG_V)) == (PG_A | PG_V); 3741 PMAP_UNLOCK(pmap); 3742 if (rv) 3743 break; 3744 } 3745 if (*PMAP1) 3746 PT_SET_MA(PADDR1, 0); 3747 sched_unpin(); 3748 return (rv); 3749} 3750 3751void 3752pmap_map_readonly(pmap_t pmap, vm_offset_t va, int len) 3753{ 3754 int i, npages = round_page(len) >> PAGE_SHIFT; 3755 for (i = 0; i < npages; i++) { 3756 pt_entry_t *pte; 3757 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE)); 3758 pte_store(pte, xpmap_mtop(*pte & ~(PG_RW|PG_M))); 3759 PMAP_MARK_PRIV(xpmap_mtop(*pte)); 3760 pmap_pte_release(pte); 3761 } 3762} 3763 3764void 3765pmap_map_readwrite(pmap_t pmap, vm_offset_t va, int len) 3766{ 3767 int i, npages = round_page(len) >> PAGE_SHIFT; 3768 for (i = 0; i < npages; i++) { 3769 pt_entry_t *pte; 3770 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE)); 3771 PMAP_MARK_UNPRIV(xpmap_mtop(*pte)); 3772 pte_store(pte, xpmap_mtop(*pte) | (PG_RW|PG_M)); 3773 pmap_pte_release(pte); 3774 } 3775} 3776 3777/* 3778 * Clear the write and modified bits in each of the given page's mappings. 3779 */ 3780void 3781pmap_remove_write(vm_page_t m) 3782{ 3783 pv_entry_t pv; 3784 pmap_t pmap; 3785 pt_entry_t oldpte, *pte; 3786 3787 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3788 if ((m->flags & PG_FICTITIOUS) != 0 || 3789 (m->flags & PG_WRITEABLE) == 0) 3790 return; 3791 sched_pin(); 3792 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3793 pmap = PV_PMAP(pv); 3794 PMAP_LOCK(pmap); 3795 pte = pmap_pte_quick(pmap, pv->pv_va); 3796retry: 3797 oldpte = *pte; 3798 if ((oldpte & PG_RW) != 0) { 3799 vm_paddr_t newpte = oldpte & ~(PG_RW | PG_M); 3800 3801 /* 3802 * Regardless of whether a pte is 32 or 64 bits 3803 * in size, PG_RW and PG_M are among the least 3804 * significant 32 bits. 3805 */ 3806 PT_SET_VA_MA(pte, newpte, TRUE); 3807 if (*pte != newpte) 3808 goto retry; 3809 3810 if ((oldpte & PG_M) != 0) 3811 vm_page_dirty(m); 3812 pmap_invalidate_page(pmap, pv->pv_va); 3813 } 3814 PMAP_UNLOCK(pmap); 3815 } 3816 vm_page_flag_clear(m, PG_WRITEABLE); 3817 PT_UPDATES_FLUSH(); 3818 if (*PMAP1) 3819 PT_SET_MA(PADDR1, 0); 3820 sched_unpin(); 3821} 3822 3823/* 3824 * pmap_ts_referenced: 3825 * 3826 * Return a count of reference bits for a page, clearing those bits. 3827 * It is not necessary for every reference bit to be cleared, but it 3828 * is necessary that 0 only be returned when there are truly no 3829 * reference bits set. 3830 * 3831 * XXX: The exact number of bits to check and clear is a matter that 3832 * should be tested and standardized at some point in the future for 3833 * optimal aging of shared pages. 3834 */ 3835int 3836pmap_ts_referenced(vm_page_t m) 3837{ 3838 pv_entry_t pv, pvf, pvn; 3839 pmap_t pmap; 3840 pt_entry_t *pte; 3841 int rtval = 0; 3842 3843 if (m->flags & PG_FICTITIOUS) 3844 return (rtval); 3845 sched_pin(); 3846 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3847 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 3848 pvf = pv; 3849 do { 3850 pvn = TAILQ_NEXT(pv, pv_list); 3851 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3852 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 3853 pmap = PV_PMAP(pv); 3854 PMAP_LOCK(pmap); 3855 pte = pmap_pte_quick(pmap, pv->pv_va); 3856 if ((*pte & PG_A) != 0) { 3857 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE); 3858 pmap_invalidate_page(pmap, pv->pv_va); 3859 rtval++; 3860 if (rtval > 4) 3861 pvn = NULL; 3862 } 3863 PMAP_UNLOCK(pmap); 3864 } while ((pv = pvn) != NULL && pv != pvf); 3865 } 3866 PT_UPDATES_FLUSH(); 3867 if (*PMAP1) 3868 PT_SET_MA(PADDR1, 0); 3869 3870 sched_unpin(); 3871 return (rtval); 3872} 3873 3874/* 3875 * Clear the modify bits on the specified physical page. 3876 */ 3877void 3878pmap_clear_modify(vm_page_t m) 3879{ 3880 pv_entry_t pv; 3881 pmap_t pmap; 3882 pt_entry_t *pte; 3883 3884 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3885 if ((m->flags & PG_FICTITIOUS) != 0) 3886 return; 3887 sched_pin(); 3888 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3889 pmap = PV_PMAP(pv); 3890 PMAP_LOCK(pmap); 3891 pte = pmap_pte_quick(pmap, pv->pv_va); 3892 if ((*pte & PG_M) != 0) { 3893 /* 3894 * Regardless of whether a pte is 32 or 64 bits 3895 * in size, PG_M is among the least significant 3896 * 32 bits. 3897 */ 3898 PT_SET_VA_MA(pte, *pte & ~PG_M, FALSE); 3899 pmap_invalidate_page(pmap, pv->pv_va); 3900 } 3901 PMAP_UNLOCK(pmap); 3902 } 3903 sched_unpin(); 3904} 3905 3906/* 3907 * pmap_clear_reference: 3908 * 3909 * Clear the reference bit on the specified physical page. 3910 */ 3911void 3912pmap_clear_reference(vm_page_t m) 3913{ 3914 pv_entry_t pv; 3915 pmap_t pmap; 3916 pt_entry_t *pte; 3917 3918 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3919 if ((m->flags & PG_FICTITIOUS) != 0) 3920 return; 3921 sched_pin(); 3922 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3923 pmap = PV_PMAP(pv); 3924 PMAP_LOCK(pmap); 3925 pte = pmap_pte_quick(pmap, pv->pv_va); 3926 if ((*pte & PG_A) != 0) { 3927 /* 3928 * Regardless of whether a pte is 32 or 64 bits 3929 * in size, PG_A is among the least significant 3930 * 32 bits. 3931 */ 3932 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE); 3933 pmap_invalidate_page(pmap, pv->pv_va); 3934 } 3935 PMAP_UNLOCK(pmap); 3936 } 3937 sched_unpin(); 3938} 3939 3940/* 3941 * Miscellaneous support routines follow 3942 */ 3943 3944/* 3945 * Map a set of physical memory pages into the kernel virtual 3946 * address space. Return a pointer to where it is mapped. This 3947 * routine is intended to be used for mapping device memory, 3948 * NOT real memory. 3949 */ 3950void * 3951pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode) 3952{ 3953 vm_offset_t va, offset; 3954 vm_size_t tmpsize; 3955 3956 offset = pa & PAGE_MASK; 3957 size = roundup(offset + size, PAGE_SIZE); 3958 pa = pa & PG_FRAME; 3959 3960 if (pa < KERNLOAD && pa + size <= KERNLOAD) 3961 va = KERNBASE + pa; 3962 else 3963 va = kmem_alloc_nofault(kernel_map, size); 3964 if (!va) 3965 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 3966 3967 for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE) 3968 pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode); 3969 pmap_invalidate_range(kernel_pmap, va, va + tmpsize); 3970 pmap_invalidate_cache_range(va, va + size); 3971 return ((void *)(va + offset)); 3972} 3973 3974void * 3975pmap_mapdev(vm_paddr_t pa, vm_size_t size) 3976{ 3977 3978 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE)); 3979} 3980 3981void * 3982pmap_mapbios(vm_paddr_t pa, vm_size_t size) 3983{ 3984 3985 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK)); 3986} 3987 3988void 3989pmap_unmapdev(vm_offset_t va, vm_size_t size) 3990{ 3991 vm_offset_t base, offset, tmpva; 3992 3993 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD) 3994 return; 3995 base = trunc_page(va); 3996 offset = va & PAGE_MASK; 3997 size = roundup(offset + size, PAGE_SIZE); 3998 critical_enter(); 3999 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 4000 pmap_kremove(tmpva); 4001 pmap_invalidate_range(kernel_pmap, va, tmpva); 4002 critical_exit(); 4003 kmem_free(kernel_map, base, size); 4004} 4005 4006/* 4007 * Sets the memory attribute for the specified page. 4008 */ 4009void 4010pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma) 4011{ 4012 struct sysmaps *sysmaps; 4013 vm_offset_t sva, eva; 4014 4015 m->md.pat_mode = ma; 4016 if ((m->flags & PG_FICTITIOUS) != 0) 4017 return; 4018 4019 /* 4020 * If "m" is a normal page, flush it from the cache. 4021 * See pmap_invalidate_cache_range(). 4022 * 4023 * First, try to find an existing mapping of the page by sf 4024 * buffer. sf_buf_invalidate_cache() modifies mapping and 4025 * flushes the cache. 4026 */ 4027 if (sf_buf_invalidate_cache(m)) 4028 return; 4029 4030 /* 4031 * If page is not mapped by sf buffer, but CPU does not 4032 * support self snoop, map the page transient and do 4033 * invalidation. In the worst case, whole cache is flushed by 4034 * pmap_invalidate_cache_range(). 4035 */ 4036 if ((cpu_feature & (CPUID_SS|CPUID_CLFSH)) == CPUID_CLFSH) { 4037 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 4038 mtx_lock(&sysmaps->lock); 4039 if (*sysmaps->CMAP2) 4040 panic("pmap_page_set_memattr: CMAP2 busy"); 4041 sched_pin(); 4042 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | 4043 xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M | 4044 pmap_cache_bits(m->md.pat_mode, 0)); 4045 invlcaddr(sysmaps->CADDR2); 4046 sva = (vm_offset_t)sysmaps->CADDR2; 4047 eva = sva + PAGE_SIZE; 4048 } else 4049 sva = eva = 0; /* gcc */ 4050 pmap_invalidate_cache_range(sva, eva); 4051 if (sva != 0) { 4052 PT_SET_MA(sysmaps->CADDR2, 0); 4053 sched_unpin(); 4054 mtx_unlock(&sysmaps->lock); 4055 } 4056} 4057 4058int 4059pmap_change_attr(va, size, mode) 4060 vm_offset_t va; 4061 vm_size_t size; 4062 int mode; 4063{ 4064 vm_offset_t base, offset, tmpva; 4065 pt_entry_t *pte; 4066 u_int opte, npte; 4067 pd_entry_t *pde; 4068 boolean_t changed; 4069 4070 base = trunc_page(va); 4071 offset = va & PAGE_MASK; 4072 size = roundup(offset + size, PAGE_SIZE); 4073 4074 /* Only supported on kernel virtual addresses. */ 4075 if (base <= VM_MAXUSER_ADDRESS) 4076 return (EINVAL); 4077 4078 /* 4MB pages and pages that aren't mapped aren't supported. */ 4079 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) { 4080 pde = pmap_pde(kernel_pmap, tmpva); 4081 if (*pde & PG_PS) 4082 return (EINVAL); 4083 if ((*pde & PG_V) == 0) 4084 return (EINVAL); 4085 pte = vtopte(va); 4086 if ((*pte & PG_V) == 0) 4087 return (EINVAL); 4088 } 4089 4090 changed = FALSE; 4091 4092 /* 4093 * Ok, all the pages exist and are 4k, so run through them updating 4094 * their cache mode. 4095 */ 4096 for (tmpva = base; size > 0; ) { 4097 pte = vtopte(tmpva); 4098 4099 /* 4100 * The cache mode bits are all in the low 32-bits of the 4101 * PTE, so we can just spin on updating the low 32-bits. 4102 */ 4103 do { 4104 opte = *(u_int *)pte; 4105 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT); 4106 npte |= pmap_cache_bits(mode, 0); 4107 PT_SET_VA_MA(pte, npte, TRUE); 4108 } while (npte != opte && (*pte != npte)); 4109 if (npte != opte) 4110 changed = TRUE; 4111 tmpva += PAGE_SIZE; 4112 size -= PAGE_SIZE; 4113 } 4114 4115 /* 4116 * Flush CPU caches to make sure any data isn't cached that shouldn't 4117 * be, etc. 4118 */ 4119 if (changed) { 4120 pmap_invalidate_range(kernel_pmap, base, tmpva); 4121 pmap_invalidate_cache_range(base, tmpva); 4122 } 4123 return (0); 4124} 4125 4126/* 4127 * perform the pmap work for mincore 4128 */ 4129int 4130pmap_mincore(pmap_t pmap, vm_offset_t addr) 4131{ 4132 pt_entry_t *ptep, pte; 4133 vm_page_t m; 4134 int val = 0; 4135 4136 PMAP_LOCK(pmap); 4137 ptep = pmap_pte(pmap, addr); 4138 pte = (ptep != NULL) ? PT_GET(ptep) : 0; 4139 pmap_pte_release(ptep); 4140 PMAP_UNLOCK(pmap); 4141 4142 if (pte != 0) { 4143 vm_paddr_t pa; 4144 4145 val = MINCORE_INCORE; 4146 if ((pte & PG_MANAGED) == 0) 4147 return val; 4148 4149 pa = pte & PG_FRAME; 4150 4151 m = PHYS_TO_VM_PAGE(pa); 4152 4153 /* 4154 * Modified by us 4155 */ 4156 if (pte & PG_M) 4157 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 4158 else { 4159 /* 4160 * Modified by someone else 4161 */ 4162 vm_page_lock_queues(); 4163 if (m->dirty || pmap_is_modified(m)) 4164 val |= MINCORE_MODIFIED_OTHER; 4165 vm_page_unlock_queues(); 4166 } 4167 /* 4168 * Referenced by us 4169 */ 4170 if (pte & PG_A) 4171 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 4172 else { 4173 /* 4174 * Referenced by someone else 4175 */ 4176 vm_page_lock_queues(); 4177 if ((m->flags & PG_REFERENCED) || 4178 pmap_is_referenced(m)) 4179 val |= MINCORE_REFERENCED_OTHER; 4180 vm_page_unlock_queues(); 4181 } 4182 } 4183 return val; 4184} 4185 4186void 4187pmap_activate(struct thread *td) 4188{ 4189 pmap_t pmap, oldpmap; 4190 u_int32_t cr3; 4191 4192 critical_enter(); 4193 pmap = vmspace_pmap(td->td_proc->p_vmspace); 4194 oldpmap = PCPU_GET(curpmap); 4195#if defined(SMP) 4196 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 4197 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 4198#else 4199 oldpmap->pm_active &= ~1; 4200 pmap->pm_active |= 1; 4201#endif 4202#ifdef PAE 4203 cr3 = vtophys(pmap->pm_pdpt); 4204#else 4205 cr3 = vtophys(pmap->pm_pdir); 4206#endif 4207 /* 4208 * pmap_activate is for the current thread on the current cpu 4209 */ 4210 td->td_pcb->pcb_cr3 = cr3; 4211 PT_UPDATES_FLUSH(); 4212 load_cr3(cr3); 4213 PCPU_SET(curpmap, pmap); 4214 critical_exit(); 4215} 4216 4217void 4218pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz) 4219{ 4220} 4221 4222/* 4223 * Increase the starting virtual address of the given mapping if a 4224 * different alignment might result in more superpage mappings. 4225 */ 4226void 4227pmap_align_superpage(vm_object_t object, vm_ooffset_t offset, 4228 vm_offset_t *addr, vm_size_t size) 4229{ 4230 vm_offset_t superpage_offset; 4231 4232 if (size < NBPDR) 4233 return; 4234 if (object != NULL && (object->flags & OBJ_COLORED) != 0) 4235 offset += ptoa(object->pg_color); 4236 superpage_offset = offset & PDRMASK; 4237 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR || 4238 (*addr & PDRMASK) == superpage_offset) 4239 return; 4240 if ((*addr & PDRMASK) < superpage_offset) 4241 *addr = (*addr & ~PDRMASK) + superpage_offset; 4242 else 4243 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset; 4244} 4245 4246#ifdef XEN 4247 4248void 4249pmap_suspend() 4250{ 4251 pmap_t pmap; 4252 int i, pdir, offset; 4253 vm_paddr_t pdirma; 4254 mmu_update_t mu[4]; 4255 4256 /* 4257 * We need to remove the recursive mapping structure from all 4258 * our pmaps so that Xen doesn't get confused when it restores 4259 * the page tables. The recursive map lives at page directory 4260 * index PTDPTDI. We assume that the suspend code has stopped 4261 * the other vcpus (if any). 4262 */ 4263 LIST_FOREACH(pmap, &allpmaps, pm_list) { 4264 for (i = 0; i < 4; i++) { 4265 /* 4266 * Figure out which page directory (L2) page 4267 * contains this bit of the recursive map and 4268 * the offset within that page of the map 4269 * entry 4270 */ 4271 pdir = (PTDPTDI + i) / NPDEPG; 4272 offset = (PTDPTDI + i) % NPDEPG; 4273 pdirma = pmap->pm_pdpt[pdir] & PG_FRAME; 4274 mu[i].ptr = pdirma + offset * sizeof(pd_entry_t); 4275 mu[i].val = 0; 4276 } 4277 HYPERVISOR_mmu_update(mu, 4, NULL, DOMID_SELF); 4278 } 4279} 4280 4281void 4282pmap_resume() 4283{ 4284 pmap_t pmap; 4285 int i, pdir, offset; 4286 vm_paddr_t pdirma; 4287 mmu_update_t mu[4]; 4288 4289 /* 4290 * Restore the recursive map that we removed on suspend. 4291 */ 4292 LIST_FOREACH(pmap, &allpmaps, pm_list) { 4293 for (i = 0; i < 4; i++) { 4294 /* 4295 * Figure out which page directory (L2) page 4296 * contains this bit of the recursive map and 4297 * the offset within that page of the map 4298 * entry 4299 */ 4300 pdir = (PTDPTDI + i) / NPDEPG; 4301 offset = (PTDPTDI + i) % NPDEPG; 4302 pdirma = pmap->pm_pdpt[pdir] & PG_FRAME; 4303 mu[i].ptr = pdirma + offset * sizeof(pd_entry_t); 4304 mu[i].val = (pmap->pm_pdpt[i] & PG_FRAME) | PG_V; 4305 } 4306 HYPERVISOR_mmu_update(mu, 4, NULL, DOMID_SELF); 4307 } 4308} 4309 4310#endif 4311 4312#if defined(PMAP_DEBUG) 4313pmap_pid_dump(int pid) 4314{ 4315 pmap_t pmap; 4316 struct proc *p; 4317 int npte = 0; 4318 int index; 4319 4320 sx_slock(&allproc_lock); 4321 FOREACH_PROC_IN_SYSTEM(p) { 4322 if (p->p_pid != pid) 4323 continue; 4324 4325 if (p->p_vmspace) { 4326 int i,j; 4327 index = 0; 4328 pmap = vmspace_pmap(p->p_vmspace); 4329 for (i = 0; i < NPDEPTD; i++) { 4330 pd_entry_t *pde; 4331 pt_entry_t *pte; 4332 vm_offset_t base = i << PDRSHIFT; 4333 4334 pde = &pmap->pm_pdir[i]; 4335 if (pde && pmap_pde_v(pde)) { 4336 for (j = 0; j < NPTEPG; j++) { 4337 vm_offset_t va = base + (j << PAGE_SHIFT); 4338 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 4339 if (index) { 4340 index = 0; 4341 printf("\n"); 4342 } 4343 sx_sunlock(&allproc_lock); 4344 return npte; 4345 } 4346 pte = pmap_pte(pmap, va); 4347 if (pte && pmap_pte_v(pte)) { 4348 pt_entry_t pa; 4349 vm_page_t m; 4350 pa = PT_GET(pte); 4351 m = PHYS_TO_VM_PAGE(pa & PG_FRAME); 4352 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 4353 va, pa, m->hold_count, m->wire_count, m->flags); 4354 npte++; 4355 index++; 4356 if (index >= 2) { 4357 index = 0; 4358 printf("\n"); 4359 } else { 4360 printf(" "); 4361 } 4362 } 4363 } 4364 } 4365 } 4366 } 4367 } 4368 sx_sunlock(&allproc_lock); 4369 return npte; 4370} 4371#endif 4372 4373#if defined(DEBUG) 4374 4375static void pads(pmap_t pm); 4376void pmap_pvdump(vm_paddr_t pa); 4377 4378/* print address space of pmap*/ 4379static void 4380pads(pmap_t pm) 4381{ 4382 int i, j; 4383 vm_paddr_t va; 4384 pt_entry_t *ptep; 4385 4386 if (pm == kernel_pmap) 4387 return; 4388 for (i = 0; i < NPDEPTD; i++) 4389 if (pm->pm_pdir[i]) 4390 for (j = 0; j < NPTEPG; j++) { 4391 va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 4392 if (pm == kernel_pmap && va < KERNBASE) 4393 continue; 4394 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 4395 continue; 4396 ptep = pmap_pte(pm, va); 4397 if (pmap_pte_v(ptep)) 4398 printf("%x:%x ", va, *ptep); 4399 }; 4400 4401} 4402 4403void 4404pmap_pvdump(vm_paddr_t pa) 4405{ 4406 pv_entry_t pv; 4407 pmap_t pmap; 4408 vm_page_t m; 4409 4410 printf("pa %x", pa); 4411 m = PHYS_TO_VM_PAGE(pa); 4412 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 4413 pmap = PV_PMAP(pv); 4414 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va); 4415 pads(pmap); 4416 } 4417 printf(" "); 4418} 4419#endif 4420