pmap.c revision 196726
1181641Skmacy/*- 2181641Skmacy * Copyright (c) 1991 Regents of the University of California. 3181641Skmacy * All rights reserved. 4181641Skmacy * Copyright (c) 1994 John S. Dyson 5181641Skmacy * All rights reserved. 6181641Skmacy * Copyright (c) 1994 David Greenman 7181641Skmacy * All rights reserved. 8181641Skmacy * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu> 9181641Skmacy * All rights reserved. 10181641Skmacy * 11181641Skmacy * This code is derived from software contributed to Berkeley by 12181641Skmacy * the Systems Programming Group of the University of Utah Computer 13181641Skmacy * Science Department and William Jolitz of UUNET Technologies Inc. 14181641Skmacy * 15181641Skmacy * Redistribution and use in source and binary forms, with or without 16181641Skmacy * modification, are permitted provided that the following conditions 17181641Skmacy * are met: 18181641Skmacy * 1. Redistributions of source code must retain the above copyright 19181641Skmacy * notice, this list of conditions and the following disclaimer. 20181641Skmacy * 2. Redistributions in binary form must reproduce the above copyright 21181641Skmacy * notice, this list of conditions and the following disclaimer in the 22181641Skmacy * documentation and/or other materials provided with the distribution. 23181641Skmacy * 3. All advertising materials mentioning features or use of this software 24181641Skmacy * must display the following acknowledgement: 25181641Skmacy * This product includes software developed by the University of 26181641Skmacy * California, Berkeley and its contributors. 27181641Skmacy * 4. Neither the name of the University nor the names of its contributors 28181641Skmacy * may be used to endorse or promote products derived from this software 29181641Skmacy * without specific prior written permission. 30181641Skmacy * 31181641Skmacy * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32181641Skmacy * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33181641Skmacy * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34181641Skmacy * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35181641Skmacy * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36181641Skmacy * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37181641Skmacy * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38181641Skmacy * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39181641Skmacy * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40181641Skmacy * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41181641Skmacy * SUCH DAMAGE. 42181641Skmacy * 43181641Skmacy * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 44181641Skmacy */ 45181641Skmacy/*- 46181641Skmacy * Copyright (c) 2003 Networks Associates Technology, Inc. 47181641Skmacy * All rights reserved. 48181641Skmacy * 49181641Skmacy * This software was developed for the FreeBSD Project by Jake Burkholder, 50181641Skmacy * Safeport Network Services, and Network Associates Laboratories, the 51181641Skmacy * Security Research Division of Network Associates, Inc. under 52181641Skmacy * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 53181641Skmacy * CHATS research program. 54181641Skmacy * 55181641Skmacy * Redistribution and use in source and binary forms, with or without 56181641Skmacy * modification, are permitted provided that the following conditions 57181641Skmacy * are met: 58181641Skmacy * 1. Redistributions of source code must retain the above copyright 59181641Skmacy * notice, this list of conditions and the following disclaimer. 60181641Skmacy * 2. Redistributions in binary form must reproduce the above copyright 61181641Skmacy * notice, this list of conditions and the following disclaimer in the 62181641Skmacy * documentation and/or other materials provided with the distribution. 63181641Skmacy * 64181641Skmacy * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 65181641Skmacy * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 66181641Skmacy * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 67181641Skmacy * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 68181641Skmacy * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 69181641Skmacy * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 70181641Skmacy * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 71181641Skmacy * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 72181641Skmacy * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 73181641Skmacy * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 74181641Skmacy * SUCH DAMAGE. 75181641Skmacy */ 76181641Skmacy 77181641Skmacy#include <sys/cdefs.h> 78181641Skmacy__FBSDID("$FreeBSD: head/sys/i386/xen/pmap.c 196726 2009-09-01 05:15:45Z adrian $"); 79181641Skmacy 80181641Skmacy/* 81181641Skmacy * Manages physical address maps. 82181641Skmacy * 83181641Skmacy * In addition to hardware address maps, this 84181641Skmacy * module is called upon to provide software-use-only 85181641Skmacy * maps which may or may not be stored in the same 86181641Skmacy * form as hardware maps. These pseudo-maps are 87181641Skmacy * used to store intermediate results from copy 88181641Skmacy * operations to and from address spaces. 89181641Skmacy * 90181641Skmacy * Since the information managed by this module is 91181641Skmacy * also stored by the logical address mapping module, 92181641Skmacy * this module may throw away valid virtual-to-physical 93181641Skmacy * mappings at almost any time. However, invalidations 94181641Skmacy * of virtual-to-physical mappings must be done as 95181641Skmacy * requested. 96181641Skmacy * 97181641Skmacy * In order to cope with hardware architectures which 98181641Skmacy * make virtual-to-physical map invalidates expensive, 99181641Skmacy * this module may delay invalidate or reduced protection 100181641Skmacy * operations until such time as they are actually 101181641Skmacy * necessary. This module is given full information as 102181641Skmacy * to which processors are currently using which maps, 103181641Skmacy * and to when physical maps must be made correct. 104181641Skmacy */ 105181641Skmacy 106181641Skmacy#define PMAP_DIAGNOSTIC 107181641Skmacy 108181641Skmacy#include "opt_cpu.h" 109181641Skmacy#include "opt_pmap.h" 110181641Skmacy#include "opt_msgbuf.h" 111181641Skmacy#include "opt_smp.h" 112181641Skmacy#include "opt_xbox.h" 113181641Skmacy 114181641Skmacy#include <sys/param.h> 115181641Skmacy#include <sys/systm.h> 116181641Skmacy#include <sys/kernel.h> 117181641Skmacy#include <sys/ktr.h> 118181641Skmacy#include <sys/lock.h> 119181641Skmacy#include <sys/malloc.h> 120181641Skmacy#include <sys/mman.h> 121181641Skmacy#include <sys/msgbuf.h> 122181641Skmacy#include <sys/mutex.h> 123181641Skmacy#include <sys/proc.h> 124195949Skib#include <sys/sf_buf.h> 125181641Skmacy#include <sys/sx.h> 126181641Skmacy#include <sys/vmmeter.h> 127181641Skmacy#include <sys/sched.h> 128181641Skmacy#include <sys/sysctl.h> 129181641Skmacy#ifdef SMP 130181641Skmacy#include <sys/smp.h> 131181641Skmacy#endif 132181641Skmacy 133181641Skmacy#include <vm/vm.h> 134181641Skmacy#include <vm/vm_param.h> 135181641Skmacy#include <vm/vm_kern.h> 136181641Skmacy#include <vm/vm_page.h> 137181641Skmacy#include <vm/vm_map.h> 138181641Skmacy#include <vm/vm_object.h> 139181641Skmacy#include <vm/vm_extern.h> 140181641Skmacy#include <vm/vm_pageout.h> 141181641Skmacy#include <vm/vm_pager.h> 142181641Skmacy#include <vm/uma.h> 143181641Skmacy 144181641Skmacy#include <machine/cpu.h> 145181641Skmacy#include <machine/cputypes.h> 146181641Skmacy#include <machine/md_var.h> 147181641Skmacy#include <machine/pcb.h> 148181641Skmacy#include <machine/specialreg.h> 149181641Skmacy#ifdef SMP 150181641Skmacy#include <machine/smp.h> 151181641Skmacy#endif 152181641Skmacy 153181641Skmacy#ifdef XBOX 154181641Skmacy#include <machine/xbox.h> 155181641Skmacy#endif 156181641Skmacy 157181641Skmacy#include <xen/interface/xen.h> 158186557Skmacy#include <xen/hypervisor.h> 159181641Skmacy#include <machine/xen/hypercall.h> 160181641Skmacy#include <machine/xen/xenvar.h> 161181641Skmacy#include <machine/xen/xenfunc.h> 162181641Skmacy 163181641Skmacy#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 164181641Skmacy#define CPU_ENABLE_SSE 165181641Skmacy#endif 166181641Skmacy 167181641Skmacy#ifndef PMAP_SHPGPERPROC 168181641Skmacy#define PMAP_SHPGPERPROC 200 169181641Skmacy#endif 170181641Skmacy 171181641Skmacy#if defined(DIAGNOSTIC) 172181641Skmacy#define PMAP_DIAGNOSTIC 173181641Skmacy#endif 174181641Skmacy 175181641Skmacy#if !defined(PMAP_DIAGNOSTIC) 176193734Sed#define PMAP_INLINE __gnu89_inline 177181641Skmacy#else 178181641Skmacy#define PMAP_INLINE 179181641Skmacy#endif 180181641Skmacy 181181641Skmacy#define PV_STATS 182181641Skmacy#ifdef PV_STATS 183181641Skmacy#define PV_STAT(x) do { x ; } while (0) 184181641Skmacy#else 185181641Skmacy#define PV_STAT(x) do { } while (0) 186181641Skmacy#endif 187181641Skmacy 188181747Skmacy#define pa_index(pa) ((pa) >> PDRSHIFT) 189181747Skmacy#define pa_to_pvh(pa) (&pv_table[pa_index(pa)]) 190181747Skmacy 191181641Skmacy/* 192181641Skmacy * Get PDEs and PTEs for user/kernel address space 193181641Skmacy */ 194181641Skmacy#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 195181641Skmacy#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 196181641Skmacy 197181641Skmacy#define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 198181641Skmacy#define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 199181641Skmacy#define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 200181641Skmacy#define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 201181641Skmacy#define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 202181641Skmacy 203181641Skmacy#define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 204181641Skmacy 205181641Skmacystruct pmap kernel_pmap_store; 206181641SkmacyLIST_HEAD(pmaplist, pmap); 207181641Skmacystatic struct pmaplist allpmaps; 208181641Skmacystatic struct mtx allpmaps_lock; 209181641Skmacy 210181641Skmacyvm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 211181641Skmacyvm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 212181641Skmacyint pgeflag = 0; /* PG_G or-in */ 213181641Skmacyint pseflag = 0; /* PG_PS or-in */ 214181641Skmacy 215182902Skmacyint nkpt; 216181641Skmacyvm_offset_t kernel_vm_end; 217181641Skmacyextern u_int32_t KERNend; 218181641Skmacy 219181641Skmacy#ifdef PAE 220181641Skmacypt_entry_t pg_nx; 221181641Skmacy#if !defined(XEN) 222181641Skmacystatic uma_zone_t pdptzone; 223181641Skmacy#endif 224181641Skmacy#endif 225181641Skmacy 226196726Sadrianstatic int pat_works; /* Is page attribute table sane? */ 227196726Sadrian 228181641Skmacy/* 229181641Skmacy * Data for the pv entry allocation mechanism 230181641Skmacy */ 231181641Skmacystatic int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 232181747Skmacystatic struct md_page *pv_table; 233181641Skmacystatic int shpgperproc = PMAP_SHPGPERPROC; 234181641Skmacy 235181641Skmacystruct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */ 236181641Skmacyint pv_maxchunks; /* How many chunks we have KVA for */ 237181641Skmacyvm_offset_t pv_vafree; /* freelist stored in the PTE */ 238181641Skmacy 239181641Skmacy/* 240181641Skmacy * All those kernel PT submaps that BSD is so fond of 241181641Skmacy */ 242181641Skmacystruct sysmaps { 243181641Skmacy struct mtx lock; 244181641Skmacy pt_entry_t *CMAP1; 245181641Skmacy pt_entry_t *CMAP2; 246181641Skmacy caddr_t CADDR1; 247181641Skmacy caddr_t CADDR2; 248181641Skmacy}; 249181641Skmacystatic struct sysmaps sysmaps_pcpu[MAXCPU]; 250181641Skmacypt_entry_t *CMAP1 = 0; 251181641Skmacystatic pt_entry_t *CMAP3; 252181641Skmacycaddr_t CADDR1 = 0, ptvmmap = 0; 253181641Skmacystatic caddr_t CADDR3; 254181641Skmacystruct msgbuf *msgbufp = 0; 255181641Skmacy 256181641Skmacy/* 257181641Skmacy * Crashdump maps. 258181641Skmacy */ 259181641Skmacystatic caddr_t crashdumpmap; 260181641Skmacy 261181641Skmacystatic pt_entry_t *PMAP1 = 0, *PMAP2; 262181641Skmacystatic pt_entry_t *PADDR1 = 0, *PADDR2; 263181641Skmacy#ifdef SMP 264181641Skmacystatic int PMAP1cpu; 265181641Skmacystatic int PMAP1changedcpu; 266181641SkmacySYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD, 267181641Skmacy &PMAP1changedcpu, 0, 268181641Skmacy "Number of times pmap_pte_quick changed CPU with same PMAP1"); 269181641Skmacy#endif 270181641Skmacystatic int PMAP1changed; 271181641SkmacySYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD, 272181641Skmacy &PMAP1changed, 0, 273181641Skmacy "Number of times pmap_pte_quick changed PMAP1"); 274181641Skmacystatic int PMAP1unchanged; 275181641SkmacySYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD, 276181641Skmacy &PMAP1unchanged, 0, 277181641Skmacy "Number of times pmap_pte_quick didn't change PMAP1"); 278181641Skmacystatic struct mtx PMAP2mutex; 279181641Skmacy 280181747SkmacySYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters"); 281181747Skmacystatic int pg_ps_enabled; 282181747SkmacySYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RD, &pg_ps_enabled, 0, 283181747Skmacy "Are large page mappings enabled?"); 284181747Skmacy 285181747SkmacySYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0, 286181747Skmacy "Max number of PV entries"); 287181747SkmacySYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0, 288181747Skmacy "Page share factor per proc"); 289181747Skmacy 290181641Skmacystatic void free_pv_entry(pmap_t pmap, pv_entry_t pv); 291181641Skmacystatic pv_entry_t get_pv_entry(pmap_t locked_pmap, int try); 292181641Skmacy 293181641Skmacystatic vm_page_t pmap_enter_quick_locked(multicall_entry_t **mcl, int *count, pmap_t pmap, vm_offset_t va, 294181641Skmacy vm_page_t m, vm_prot_t prot, vm_page_t mpte); 295181641Skmacystatic int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva, 296181641Skmacy vm_page_t *free); 297181641Skmacystatic void pmap_remove_page(struct pmap *pmap, vm_offset_t va, 298181641Skmacy vm_page_t *free); 299181641Skmacystatic void pmap_remove_entry(struct pmap *pmap, vm_page_t m, 300181641Skmacy vm_offset_t va); 301181641Skmacystatic void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m); 302181641Skmacystatic boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, 303181641Skmacy vm_page_t m); 304181641Skmacy 305181641Skmacystatic vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags); 306181641Skmacy 307181641Skmacystatic vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags); 308181641Skmacystatic int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free); 309181641Skmacystatic pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va); 310181641Skmacystatic void pmap_pte_release(pt_entry_t *pte); 311181641Skmacystatic int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *); 312181641Skmacystatic vm_offset_t pmap_kmem_choose(vm_offset_t addr); 313181641Skmacystatic boolean_t pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr); 314181747Skmacystatic void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode); 315181641Skmacy 316196725Sadrianstatic __inline void pagezero(void *page); 317181747Skmacy 318181641Skmacy#if defined(PAE) && !defined(XEN) 319181641Skmacystatic void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 320181641Skmacy#endif 321181641Skmacy 322181641SkmacyCTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 323181641SkmacyCTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 324181641Skmacy 325181641Skmacy/* 326181641Skmacy * If you get an error here, then you set KVA_PAGES wrong! See the 327181641Skmacy * description of KVA_PAGES in sys/i386/include/pmap.h. It must be 328181641Skmacy * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE. 329181641Skmacy */ 330181641SkmacyCTASSERT(KERNBASE % (1 << 24) == 0); 331181641Skmacy 332181641Skmacy 333181641Skmacy 334181641Skmacyvoid 335181641Skmacypd_set(struct pmap *pmap, int ptepindex, vm_paddr_t val, int type) 336181641Skmacy{ 337181641Skmacy vm_paddr_t pdir_ma = vtomach(&pmap->pm_pdir[ptepindex]); 338181641Skmacy 339181641Skmacy switch (type) { 340181641Skmacy case SH_PD_SET_VA: 341181641Skmacy#if 0 342181641Skmacy xen_queue_pt_update(shadow_pdir_ma, 343181641Skmacy xpmap_ptom(val & ~(PG_RW))); 344181641Skmacy#endif 345181641Skmacy xen_queue_pt_update(pdir_ma, 346181641Skmacy xpmap_ptom(val)); 347181641Skmacy break; 348181641Skmacy case SH_PD_SET_VA_MA: 349181641Skmacy#if 0 350181641Skmacy xen_queue_pt_update(shadow_pdir_ma, 351181641Skmacy val & ~(PG_RW)); 352181641Skmacy#endif 353181641Skmacy xen_queue_pt_update(pdir_ma, val); 354181641Skmacy break; 355181641Skmacy case SH_PD_SET_VA_CLEAR: 356181641Skmacy#if 0 357181641Skmacy xen_queue_pt_update(shadow_pdir_ma, 0); 358181641Skmacy#endif 359181641Skmacy xen_queue_pt_update(pdir_ma, 0); 360181641Skmacy break; 361181641Skmacy } 362181641Skmacy} 363181641Skmacy 364181641Skmacy/* 365181641Skmacy * Move the kernel virtual free pointer to the next 366181641Skmacy * 4MB. This is used to help improve performance 367181641Skmacy * by using a large (4MB) page for much of the kernel 368181641Skmacy * (.text, .data, .bss) 369181641Skmacy */ 370181641Skmacystatic vm_offset_t 371181641Skmacypmap_kmem_choose(vm_offset_t addr) 372181641Skmacy{ 373181641Skmacy vm_offset_t newaddr = addr; 374181641Skmacy 375181641Skmacy#ifndef DISABLE_PSE 376181641Skmacy if (cpu_feature & CPUID_PSE) 377181641Skmacy newaddr = (addr + PDRMASK) & ~PDRMASK; 378181641Skmacy#endif 379181641Skmacy return newaddr; 380181641Skmacy} 381181641Skmacy 382181641Skmacy/* 383181641Skmacy * Bootstrap the system enough to run with virtual memory. 384181641Skmacy * 385181641Skmacy * On the i386 this is called after mapping has already been enabled 386181641Skmacy * and just syncs the pmap module with what has already been done. 387181641Skmacy * [We can't call it easily with mapping off since the kernel is not 388181641Skmacy * mapped with PA == VA, hence we would have to relocate every address 389181641Skmacy * from the linked base (virtual) address "KERNBASE" to the actual 390181641Skmacy * (physical) address starting relative to 0] 391181641Skmacy */ 392181641Skmacyvoid 393181641Skmacypmap_bootstrap(vm_paddr_t firstaddr) 394181641Skmacy{ 395181641Skmacy vm_offset_t va; 396181641Skmacy pt_entry_t *pte, *unused; 397181641Skmacy struct sysmaps *sysmaps; 398181641Skmacy int i; 399181641Skmacy 400181641Skmacy /* 401181641Skmacy * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 402181641Skmacy * large. It should instead be correctly calculated in locore.s and 403181641Skmacy * not based on 'first' (which is a physical address, not a virtual 404181641Skmacy * address, for the start of unused physical memory). The kernel 405181641Skmacy * page tables are NOT double mapped and thus should not be included 406181641Skmacy * in this calculation. 407181641Skmacy */ 408181641Skmacy virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 409181641Skmacy virtual_avail = pmap_kmem_choose(virtual_avail); 410181641Skmacy 411181641Skmacy virtual_end = VM_MAX_KERNEL_ADDRESS; 412181641Skmacy 413181641Skmacy /* 414181641Skmacy * Initialize the kernel pmap (which is statically allocated). 415181641Skmacy */ 416181641Skmacy PMAP_LOCK_INIT(kernel_pmap); 417181641Skmacy kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 418181641Skmacy#ifdef PAE 419181641Skmacy kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 420181641Skmacy#endif 421181641Skmacy kernel_pmap->pm_active = -1; /* don't allow deactivation */ 422181641Skmacy TAILQ_INIT(&kernel_pmap->pm_pvchunk); 423181641Skmacy LIST_INIT(&allpmaps); 424181641Skmacy mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 425181641Skmacy mtx_lock_spin(&allpmaps_lock); 426181641Skmacy LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 427181641Skmacy mtx_unlock_spin(&allpmaps_lock); 428183342Skmacy if (nkpt == 0) 429183342Skmacy nkpt = NKPT; 430181641Skmacy 431181641Skmacy /* 432181641Skmacy * Reserve some special page table entries/VA space for temporary 433181641Skmacy * mapping of pages. 434181641Skmacy */ 435181641Skmacy#define SYSMAP(c, p, v, n) \ 436181641Skmacy v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 437181641Skmacy 438181641Skmacy va = virtual_avail; 439181641Skmacy pte = vtopte(va); 440181641Skmacy 441181641Skmacy /* 442181641Skmacy * CMAP1/CMAP2 are used for zeroing and copying pages. 443181641Skmacy * CMAP3 is used for the idle process page zeroing. 444181641Skmacy */ 445181641Skmacy for (i = 0; i < MAXCPU; i++) { 446181641Skmacy sysmaps = &sysmaps_pcpu[i]; 447181641Skmacy mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF); 448181641Skmacy SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1) 449181641Skmacy SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1) 450181641Skmacy } 451181641Skmacy SYSMAP(caddr_t, CMAP1, CADDR1, 1) 452181641Skmacy SYSMAP(caddr_t, CMAP3, CADDR3, 1) 453181641Skmacy PT_SET_MA(CADDR3, 0); 454181641Skmacy 455181641Skmacy /* 456181641Skmacy * Crashdump maps. 457181641Skmacy */ 458181641Skmacy SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS) 459181641Skmacy 460181641Skmacy /* 461181641Skmacy * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 462181641Skmacy */ 463181641Skmacy SYSMAP(caddr_t, unused, ptvmmap, 1) 464181641Skmacy 465181641Skmacy /* 466181641Skmacy * msgbufp is used to map the system message buffer. 467181641Skmacy */ 468181641Skmacy SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE))) 469181641Skmacy 470181641Skmacy /* 471181641Skmacy * ptemap is used for pmap_pte_quick 472181641Skmacy */ 473181641Skmacy SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 474181641Skmacy SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1); 475181641Skmacy 476181641Skmacy mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF); 477181641Skmacy 478181641Skmacy virtual_avail = va; 479181641Skmacy PT_SET_MA(CADDR1, 0); 480181641Skmacy 481181641Skmacy /* 482181641Skmacy * Leave in place an identity mapping (virt == phys) for the low 1 MB 483181641Skmacy * physical memory region that is used by the ACPI wakeup code. This 484181641Skmacy * mapping must not have PG_G set. 485181641Skmacy */ 486181641Skmacy#ifndef XEN 487181641Skmacy /* 488181641Skmacy * leave here deliberately to show that this is not supported 489181641Skmacy */ 490181641Skmacy#ifdef XBOX 491181641Skmacy /* FIXME: This is gross, but needed for the XBOX. Since we are in such 492181641Skmacy * an early stadium, we cannot yet neatly map video memory ... :-( 493181641Skmacy * Better fixes are very welcome! */ 494181641Skmacy if (!arch_i386_is_xbox) 495181641Skmacy#endif 496181641Skmacy for (i = 1; i < NKPT; i++) 497181641Skmacy PTD[i] = 0; 498181641Skmacy 499181641Skmacy /* Initialize the PAT MSR if present. */ 500181641Skmacy pmap_init_pat(); 501181641Skmacy 502181641Skmacy /* Turn on PG_G on kernel page(s) */ 503181641Skmacy pmap_set_pg(); 504181641Skmacy#endif 505181641Skmacy} 506181641Skmacy 507181641Skmacy/* 508181641Skmacy * Setup the PAT MSR. 509181641Skmacy */ 510181641Skmacyvoid 511181641Skmacypmap_init_pat(void) 512181641Skmacy{ 513181641Skmacy uint64_t pat_msr; 514181641Skmacy 515181641Skmacy /* Bail if this CPU doesn't implement PAT. */ 516181641Skmacy if (!(cpu_feature & CPUID_PAT)) 517181641Skmacy return; 518181641Skmacy 519196726Sadrian if (cpu_vendor_id != CPU_VENDOR_INTEL || 520196726Sadrian (I386_CPU_FAMILY(cpu_id) == 6 && I386_CPU_MODEL(cpu_id) >= 0xe)) { 521196726Sadrian /* 522196726Sadrian * Leave the indices 0-3 at the default of WB, WT, UC, and UC-. 523196726Sadrian * Program 4 and 5 as WP and WC. 524196726Sadrian * Leave 6 and 7 as UC and UC-. 525196726Sadrian */ 526196726Sadrian pat_msr = rdmsr(MSR_PAT); 527196726Sadrian pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5)); 528196726Sadrian pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) | 529196726Sadrian PAT_VALUE(5, PAT_WRITE_COMBINING); 530196726Sadrian pat_works = 1; 531196726Sadrian } else { 532196726Sadrian /* 533196726Sadrian * Due to some Intel errata, we can only safely use the lower 4 534196726Sadrian * PAT entries. Thus, just replace PAT Index 2 with WC instead 535196726Sadrian * of UC-. 536196726Sadrian * 537196726Sadrian * Intel Pentium III Processor Specification Update 538196726Sadrian * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B 539196726Sadrian * or Mode C Paging) 540196726Sadrian * 541196726Sadrian * Intel Pentium IV Processor Specification Update 542196726Sadrian * Errata N46 (PAT Index MSB May Be Calculated Incorrectly) 543196726Sadrian */ 544196726Sadrian pat_msr = rdmsr(MSR_PAT); 545196726Sadrian pat_msr &= ~PAT_MASK(2); 546196726Sadrian pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING); 547196726Sadrian pat_works = 0; 548196726Sadrian } 549181641Skmacy wrmsr(MSR_PAT, pat_msr); 550181641Skmacy} 551181641Skmacy 552181641Skmacy/* 553181641Skmacy * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on. 554181641Skmacy */ 555181641Skmacyvoid 556181641Skmacypmap_set_pg(void) 557181641Skmacy{ 558181641Skmacy pd_entry_t pdir; 559181641Skmacy pt_entry_t *pte; 560181641Skmacy vm_offset_t va, endva; 561181641Skmacy int i; 562181641Skmacy 563181641Skmacy if (pgeflag == 0) 564181641Skmacy return; 565181641Skmacy 566181641Skmacy i = KERNLOAD/NBPDR; 567181641Skmacy endva = KERNBASE + KERNend; 568181641Skmacy 569181641Skmacy if (pseflag) { 570181641Skmacy va = KERNBASE + KERNLOAD; 571181641Skmacy while (va < endva) { 572181641Skmacy pdir = kernel_pmap->pm_pdir[KPTDI+i]; 573181641Skmacy pdir |= pgeflag; 574181641Skmacy kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir; 575181641Skmacy invltlb(); /* Play it safe, invltlb() every time */ 576181641Skmacy i++; 577181641Skmacy va += NBPDR; 578181641Skmacy } 579181641Skmacy } else { 580181641Skmacy va = (vm_offset_t)btext; 581181641Skmacy while (va < endva) { 582181641Skmacy pte = vtopte(va); 583181641Skmacy if (*pte & PG_V) 584181641Skmacy *pte |= pgeflag; 585181641Skmacy invltlb(); /* Play it safe, invltlb() every time */ 586181641Skmacy va += PAGE_SIZE; 587181641Skmacy } 588181641Skmacy } 589181641Skmacy} 590181641Skmacy 591181641Skmacy/* 592181641Skmacy * Initialize a vm_page's machine-dependent fields. 593181641Skmacy */ 594181641Skmacyvoid 595181641Skmacypmap_page_init(vm_page_t m) 596181641Skmacy{ 597181641Skmacy 598181641Skmacy TAILQ_INIT(&m->md.pv_list); 599195649Salc m->md.pat_mode = PAT_WRITE_BACK; 600181641Skmacy} 601181641Skmacy 602181641Skmacy#if defined(PAE) && !defined(XEN) 603181641Skmacystatic void * 604181641Skmacypmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 605181641Skmacy{ 606195385Salc 607195385Salc /* Inform UMA that this allocator uses kernel_map/object. */ 608195385Salc *flags = UMA_SLAB_KERNEL; 609195385Salc return ((void *)kmem_alloc_contig(kernel_map, bytes, wait, 0x0ULL, 610195649Salc 0xffffffffULL, 1, 0, VM_MEMATTR_DEFAULT)); 611181641Skmacy} 612181641Skmacy#endif 613181641Skmacy 614181641Skmacy/* 615181641Skmacy * ABuse the pte nodes for unmapped kva to thread a kva freelist through. 616181641Skmacy * Requirements: 617181641Skmacy * - Must deal with pages in order to ensure that none of the PG_* bits 618181641Skmacy * are ever set, PG_V in particular. 619181641Skmacy * - Assumes we can write to ptes without pte_store() atomic ops, even 620181641Skmacy * on PAE systems. This should be ok. 621181641Skmacy * - Assumes nothing will ever test these addresses for 0 to indicate 622181641Skmacy * no mapping instead of correctly checking PG_V. 623181641Skmacy * - Assumes a vm_offset_t will fit in a pte (true for i386). 624181641Skmacy * Because PG_V is never set, there can be no mappings to invalidate. 625181641Skmacy */ 626181641Skmacystatic int ptelist_count = 0; 627181641Skmacystatic vm_offset_t 628181641Skmacypmap_ptelist_alloc(vm_offset_t *head) 629181641Skmacy{ 630181641Skmacy vm_offset_t va; 631181641Skmacy vm_offset_t *phead = (vm_offset_t *)*head; 632181641Skmacy 633181641Skmacy if (ptelist_count == 0) { 634181641Skmacy printf("out of memory!!!!!!\n"); 635181641Skmacy return (0); /* Out of memory */ 636181641Skmacy } 637181641Skmacy ptelist_count--; 638181641Skmacy va = phead[ptelist_count]; 639181641Skmacy return (va); 640181641Skmacy} 641181641Skmacy 642181641Skmacystatic void 643181641Skmacypmap_ptelist_free(vm_offset_t *head, vm_offset_t va) 644181641Skmacy{ 645181641Skmacy vm_offset_t *phead = (vm_offset_t *)*head; 646181641Skmacy 647181641Skmacy phead[ptelist_count++] = va; 648181641Skmacy} 649181641Skmacy 650181641Skmacystatic void 651181641Skmacypmap_ptelist_init(vm_offset_t *head, void *base, int npages) 652181641Skmacy{ 653181641Skmacy int i, nstackpages; 654181641Skmacy vm_offset_t va; 655181641Skmacy vm_page_t m; 656181641Skmacy 657181641Skmacy nstackpages = (npages + PAGE_SIZE/sizeof(vm_offset_t) - 1)/ (PAGE_SIZE/sizeof(vm_offset_t)); 658181641Skmacy for (i = 0; i < nstackpages; i++) { 659181641Skmacy va = (vm_offset_t)base + i * PAGE_SIZE; 660181641Skmacy m = vm_page_alloc(NULL, i, 661181641Skmacy VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 662181641Skmacy VM_ALLOC_ZERO); 663181641Skmacy pmap_qenter(va, &m, 1); 664181641Skmacy } 665181641Skmacy 666181641Skmacy *head = (vm_offset_t)base; 667181641Skmacy for (i = npages - 1; i >= nstackpages; i--) { 668181641Skmacy va = (vm_offset_t)base + i * PAGE_SIZE; 669181641Skmacy pmap_ptelist_free(head, va); 670181641Skmacy } 671181641Skmacy} 672181641Skmacy 673181641Skmacy 674181641Skmacy/* 675181641Skmacy * Initialize the pmap module. 676181641Skmacy * Called by vm_init, to initialize any structures that the pmap 677181641Skmacy * system needs to map virtual memory. 678181641Skmacy */ 679181641Skmacyvoid 680181641Skmacypmap_init(void) 681181641Skmacy{ 682181747Skmacy vm_page_t mpte; 683181747Skmacy vm_size_t s; 684181747Skmacy int i, pv_npg; 685181641Skmacy 686181641Skmacy /* 687181747Skmacy * Initialize the vm page array entries for the kernel pmap's 688181747Skmacy * page table pages. 689181747Skmacy */ 690181747Skmacy for (i = 0; i < nkpt; i++) { 691181808Skmacy mpte = PHYS_TO_VM_PAGE(xpmap_mtop(PTD[i + KPTDI] & PG_FRAME)); 692181747Skmacy KASSERT(mpte >= vm_page_array && 693181747Skmacy mpte < &vm_page_array[vm_page_array_size], 694181747Skmacy ("pmap_init: page table page is out of range")); 695181747Skmacy mpte->pindex = i + KPTDI; 696181808Skmacy mpte->phys_addr = xpmap_mtop(PTD[i + KPTDI] & PG_FRAME); 697181747Skmacy } 698181747Skmacy 699181747Skmacy /* 700181641Skmacy * Initialize the address space (zone) for the pv entries. Set a 701181641Skmacy * high water mark so that the system can recover from excessive 702181641Skmacy * numbers of pv entries. 703181641Skmacy */ 704181641Skmacy TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 705181641Skmacy pv_entry_max = shpgperproc * maxproc + cnt.v_page_count; 706181641Skmacy TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 707181641Skmacy pv_entry_max = roundup(pv_entry_max, _NPCPV); 708181641Skmacy pv_entry_high_water = 9 * (pv_entry_max / 10); 709181641Skmacy 710181747Skmacy /* 711181747Skmacy * Are large page mappings enabled? 712181747Skmacy */ 713181747Skmacy TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled); 714181747Skmacy 715181747Skmacy /* 716181747Skmacy * Calculate the size of the pv head table for superpages. 717181747Skmacy */ 718181747Skmacy for (i = 0; phys_avail[i + 1]; i += 2); 719181747Skmacy pv_npg = round_4mpage(phys_avail[(i - 2) + 1]) / NBPDR; 720181747Skmacy 721181747Skmacy /* 722181747Skmacy * Allocate memory for the pv head table for superpages. 723181747Skmacy */ 724181747Skmacy s = (vm_size_t)(pv_npg * sizeof(struct md_page)); 725181747Skmacy s = round_page(s); 726181747Skmacy pv_table = (struct md_page *)kmem_alloc(kernel_map, s); 727181747Skmacy for (i = 0; i < pv_npg; i++) 728181747Skmacy TAILQ_INIT(&pv_table[i].pv_list); 729181747Skmacy 730181641Skmacy pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc); 731181641Skmacy pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map, 732181641Skmacy PAGE_SIZE * pv_maxchunks); 733181641Skmacy if (pv_chunkbase == NULL) 734181641Skmacy panic("pmap_init: not enough kvm for pv chunks"); 735181641Skmacy pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks); 736181641Skmacy#if defined(PAE) && !defined(XEN) 737181641Skmacy pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL, 738181641Skmacy NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1, 739181641Skmacy UMA_ZONE_VM | UMA_ZONE_NOFREE); 740181641Skmacy uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf); 741181641Skmacy#endif 742181641Skmacy} 743181641Skmacy 744181641Skmacy 745181641Skmacy/*************************************************** 746181641Skmacy * Low level helper routines..... 747181641Skmacy ***************************************************/ 748181641Skmacy 749181641Skmacy/* 750181641Skmacy * Determine the appropriate bits to set in a PTE or PDE for a specified 751181641Skmacy * caching mode. 752181641Skmacy */ 753195949Skibint 754181641Skmacypmap_cache_bits(int mode, boolean_t is_pde) 755181641Skmacy{ 756181641Skmacy int pat_flag, pat_index, cache_bits; 757181641Skmacy 758181641Skmacy /* The PAT bit is different for PTE's and PDE's. */ 759181641Skmacy pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT; 760181641Skmacy 761181641Skmacy /* If we don't support PAT, map extended modes to older ones. */ 762181641Skmacy if (!(cpu_feature & CPUID_PAT)) { 763181641Skmacy switch (mode) { 764181641Skmacy case PAT_UNCACHEABLE: 765181641Skmacy case PAT_WRITE_THROUGH: 766181641Skmacy case PAT_WRITE_BACK: 767181641Skmacy break; 768181641Skmacy case PAT_UNCACHED: 769181641Skmacy case PAT_WRITE_COMBINING: 770181641Skmacy case PAT_WRITE_PROTECTED: 771181641Skmacy mode = PAT_UNCACHEABLE; 772181641Skmacy break; 773181641Skmacy } 774181641Skmacy } 775181641Skmacy 776181641Skmacy /* Map the caching mode to a PAT index. */ 777196726Sadrian if (pat_works) { 778196726Sadrian switch (mode) { 779196726Sadrian case PAT_UNCACHEABLE: 780196726Sadrian pat_index = 3; 781196726Sadrian break; 782196726Sadrian case PAT_WRITE_THROUGH: 783196726Sadrian pat_index = 1; 784196726Sadrian break; 785196726Sadrian case PAT_WRITE_BACK: 786196726Sadrian pat_index = 0; 787196726Sadrian break; 788196726Sadrian case PAT_UNCACHED: 789196726Sadrian pat_index = 2; 790196726Sadrian break; 791196726Sadrian case PAT_WRITE_COMBINING: 792196726Sadrian pat_index = 5; 793196726Sadrian break; 794196726Sadrian case PAT_WRITE_PROTECTED: 795196726Sadrian pat_index = 4; 796196726Sadrian break; 797196726Sadrian default: 798196726Sadrian panic("Unknown caching mode %d\n", mode); 799196726Sadrian } 800196726Sadrian } else { 801196726Sadrian switch (mode) { 802196726Sadrian case PAT_UNCACHED: 803196726Sadrian case PAT_UNCACHEABLE: 804196726Sadrian case PAT_WRITE_PROTECTED: 805196726Sadrian pat_index = 3; 806196726Sadrian break; 807196726Sadrian case PAT_WRITE_THROUGH: 808196726Sadrian pat_index = 1; 809196726Sadrian break; 810196726Sadrian case PAT_WRITE_BACK: 811196726Sadrian pat_index = 0; 812196726Sadrian break; 813196726Sadrian case PAT_WRITE_COMBINING: 814196726Sadrian pat_index = 2; 815196726Sadrian break; 816196726Sadrian default: 817196726Sadrian panic("Unknown caching mode %d\n", mode); 818196726Sadrian } 819181641Skmacy } 820181641Skmacy 821181641Skmacy /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */ 822181641Skmacy cache_bits = 0; 823181641Skmacy if (pat_index & 0x4) 824181641Skmacy cache_bits |= pat_flag; 825181641Skmacy if (pat_index & 0x2) 826181641Skmacy cache_bits |= PG_NC_PCD; 827181641Skmacy if (pat_index & 0x1) 828181641Skmacy cache_bits |= PG_NC_PWT; 829181641Skmacy return (cache_bits); 830181641Skmacy} 831181641Skmacy#ifdef SMP 832181641Skmacy/* 833181641Skmacy * For SMP, these functions have to use the IPI mechanism for coherence. 834181641Skmacy * 835181641Skmacy * N.B.: Before calling any of the following TLB invalidation functions, 836181641Skmacy * the calling processor must ensure that all stores updating a non- 837181641Skmacy * kernel page table are globally performed. Otherwise, another 838181641Skmacy * processor could cache an old, pre-update entry without being 839181641Skmacy * invalidated. This can happen one of two ways: (1) The pmap becomes 840181641Skmacy * active on another processor after its pm_active field is checked by 841181641Skmacy * one of the following functions but before a store updating the page 842181641Skmacy * table is globally performed. (2) The pmap becomes active on another 843181641Skmacy * processor before its pm_active field is checked but due to 844181641Skmacy * speculative loads one of the following functions stills reads the 845181641Skmacy * pmap as inactive on the other processor. 846181641Skmacy * 847181641Skmacy * The kernel page table is exempt because its pm_active field is 848181641Skmacy * immutable. The kernel page table is always active on every 849181641Skmacy * processor. 850181641Skmacy */ 851181641Skmacyvoid 852181641Skmacypmap_invalidate_page(pmap_t pmap, vm_offset_t va) 853181641Skmacy{ 854181641Skmacy u_int cpumask; 855181641Skmacy u_int other_cpus; 856181641Skmacy 857181641Skmacy CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x", 858181641Skmacy pmap, va); 859181641Skmacy 860181641Skmacy sched_pin(); 861181641Skmacy if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 862181641Skmacy invlpg(va); 863181641Skmacy smp_invlpg(va); 864181641Skmacy } else { 865181641Skmacy cpumask = PCPU_GET(cpumask); 866181641Skmacy other_cpus = PCPU_GET(other_cpus); 867181641Skmacy if (pmap->pm_active & cpumask) 868181641Skmacy invlpg(va); 869181641Skmacy if (pmap->pm_active & other_cpus) 870181641Skmacy smp_masked_invlpg(pmap->pm_active & other_cpus, va); 871181641Skmacy } 872181641Skmacy sched_unpin(); 873181641Skmacy PT_UPDATES_FLUSH(); 874181641Skmacy} 875181641Skmacy 876181641Skmacyvoid 877181641Skmacypmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 878181641Skmacy{ 879181641Skmacy u_int cpumask; 880181641Skmacy u_int other_cpus; 881181641Skmacy vm_offset_t addr; 882181641Skmacy 883181641Skmacy CTR3(KTR_PMAP, "pmap_invalidate_page: pmap=%p eva=0x%x sva=0x%x", 884181641Skmacy pmap, sva, eva); 885181641Skmacy 886181641Skmacy sched_pin(); 887181641Skmacy if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 888181641Skmacy for (addr = sva; addr < eva; addr += PAGE_SIZE) 889181641Skmacy invlpg(addr); 890181641Skmacy smp_invlpg_range(sva, eva); 891181641Skmacy } else { 892181641Skmacy cpumask = PCPU_GET(cpumask); 893181641Skmacy other_cpus = PCPU_GET(other_cpus); 894181641Skmacy if (pmap->pm_active & cpumask) 895181641Skmacy for (addr = sva; addr < eva; addr += PAGE_SIZE) 896181641Skmacy invlpg(addr); 897181641Skmacy if (pmap->pm_active & other_cpus) 898181641Skmacy smp_masked_invlpg_range(pmap->pm_active & other_cpus, 899181641Skmacy sva, eva); 900181641Skmacy } 901181641Skmacy sched_unpin(); 902181641Skmacy PT_UPDATES_FLUSH(); 903181641Skmacy} 904181641Skmacy 905181641Skmacyvoid 906181641Skmacypmap_invalidate_all(pmap_t pmap) 907181641Skmacy{ 908181641Skmacy u_int cpumask; 909181641Skmacy u_int other_cpus; 910181641Skmacy 911181641Skmacy CTR1(KTR_PMAP, "pmap_invalidate_page: pmap=%p", pmap); 912181641Skmacy 913181641Skmacy sched_pin(); 914181641Skmacy if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 915181641Skmacy invltlb(); 916181641Skmacy smp_invltlb(); 917181641Skmacy } else { 918181641Skmacy cpumask = PCPU_GET(cpumask); 919181641Skmacy other_cpus = PCPU_GET(other_cpus); 920181641Skmacy if (pmap->pm_active & cpumask) 921181641Skmacy invltlb(); 922181641Skmacy if (pmap->pm_active & other_cpus) 923181641Skmacy smp_masked_invltlb(pmap->pm_active & other_cpus); 924181641Skmacy } 925181641Skmacy sched_unpin(); 926181641Skmacy} 927181641Skmacy 928181641Skmacyvoid 929181641Skmacypmap_invalidate_cache(void) 930181641Skmacy{ 931181641Skmacy 932181641Skmacy sched_pin(); 933181641Skmacy wbinvd(); 934181641Skmacy smp_cache_flush(); 935181641Skmacy sched_unpin(); 936181641Skmacy} 937181641Skmacy#else /* !SMP */ 938181641Skmacy/* 939181641Skmacy * Normal, non-SMP, 486+ invalidation functions. 940181641Skmacy * We inline these within pmap.c for speed. 941181641Skmacy */ 942181641SkmacyPMAP_INLINE void 943181641Skmacypmap_invalidate_page(pmap_t pmap, vm_offset_t va) 944181641Skmacy{ 945181641Skmacy CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x", 946181641Skmacy pmap, va); 947181641Skmacy 948181641Skmacy if (pmap == kernel_pmap || pmap->pm_active) 949181641Skmacy invlpg(va); 950181641Skmacy PT_UPDATES_FLUSH(); 951181641Skmacy} 952181641Skmacy 953181641SkmacyPMAP_INLINE void 954181641Skmacypmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 955181641Skmacy{ 956181641Skmacy vm_offset_t addr; 957181641Skmacy 958181641Skmacy if (eva - sva > PAGE_SIZE) 959181641Skmacy CTR3(KTR_PMAP, "pmap_invalidate_range: pmap=%p sva=0x%x eva=0x%x", 960181641Skmacy pmap, sva, eva); 961181641Skmacy 962181641Skmacy if (pmap == kernel_pmap || pmap->pm_active) 963181641Skmacy for (addr = sva; addr < eva; addr += PAGE_SIZE) 964181641Skmacy invlpg(addr); 965181641Skmacy PT_UPDATES_FLUSH(); 966181641Skmacy} 967181641Skmacy 968181641SkmacyPMAP_INLINE void 969181641Skmacypmap_invalidate_all(pmap_t pmap) 970181641Skmacy{ 971181641Skmacy 972181641Skmacy CTR1(KTR_PMAP, "pmap_invalidate_all: pmap=%p", pmap); 973181641Skmacy 974181641Skmacy if (pmap == kernel_pmap || pmap->pm_active) 975181641Skmacy invltlb(); 976181641Skmacy} 977181641Skmacy 978181641SkmacyPMAP_INLINE void 979181641Skmacypmap_invalidate_cache(void) 980181641Skmacy{ 981181641Skmacy 982181641Skmacy wbinvd(); 983181641Skmacy} 984181641Skmacy#endif /* !SMP */ 985181641Skmacy 986195949Skibvoid 987195949Skibpmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva) 988195949Skib{ 989195949Skib 990195949Skib KASSERT((sva & PAGE_MASK) == 0, 991195949Skib ("pmap_invalidate_cache_range: sva not page-aligned")); 992195949Skib KASSERT((eva & PAGE_MASK) == 0, 993195949Skib ("pmap_invalidate_cache_range: eva not page-aligned")); 994195949Skib 995195949Skib if (cpu_feature & CPUID_SS) 996195949Skib ; /* If "Self Snoop" is supported, do nothing. */ 997195949Skib else if (cpu_feature & CPUID_CLFSH) { 998195949Skib 999195949Skib /* 1000195949Skib * Otherwise, do per-cache line flush. Use the mfence 1001195949Skib * instruction to insure that previous stores are 1002195949Skib * included in the write-back. The processor 1003195949Skib * propagates flush to other processors in the cache 1004195949Skib * coherence domain. 1005195949Skib */ 1006195949Skib mfence(); 1007195949Skib for (; eva < sva; eva += cpu_clflush_line_size) 1008195949Skib clflush(eva); 1009195949Skib mfence(); 1010195949Skib } else { 1011195949Skib 1012195949Skib /* 1013195949Skib * No targeted cache flush methods are supported by CPU, 1014195949Skib * globally invalidate cache as a last resort. 1015195949Skib */ 1016195949Skib pmap_invalidate_cache(); 1017195949Skib } 1018195949Skib} 1019195949Skib 1020181641Skmacy/* 1021181641Skmacy * Are we current address space or kernel? N.B. We return FALSE when 1022181641Skmacy * a pmap's page table is in use because a kernel thread is borrowing 1023181641Skmacy * it. The borrowed page table can change spontaneously, making any 1024181641Skmacy * dependence on its continued use subject to a race condition. 1025181641Skmacy */ 1026181641Skmacystatic __inline int 1027181641Skmacypmap_is_current(pmap_t pmap) 1028181641Skmacy{ 1029181641Skmacy 1030181641Skmacy return (pmap == kernel_pmap || 1031181641Skmacy (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) && 1032181641Skmacy (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME))); 1033181641Skmacy} 1034181641Skmacy 1035181641Skmacy/* 1036181641Skmacy * If the given pmap is not the current or kernel pmap, the returned pte must 1037181641Skmacy * be released by passing it to pmap_pte_release(). 1038181641Skmacy */ 1039181641Skmacypt_entry_t * 1040181641Skmacypmap_pte(pmap_t pmap, vm_offset_t va) 1041181641Skmacy{ 1042181641Skmacy pd_entry_t newpf; 1043181641Skmacy pd_entry_t *pde; 1044181641Skmacy 1045181641Skmacy pde = pmap_pde(pmap, va); 1046181641Skmacy if (*pde & PG_PS) 1047181641Skmacy return (pde); 1048181641Skmacy if (*pde != 0) { 1049181641Skmacy /* are we current address space or kernel? */ 1050181641Skmacy if (pmap_is_current(pmap)) 1051181641Skmacy return (vtopte(va)); 1052181641Skmacy mtx_lock(&PMAP2mutex); 1053181641Skmacy newpf = *pde & PG_FRAME; 1054181641Skmacy if ((*PMAP2 & PG_FRAME) != newpf) { 1055181641Skmacy PT_SET_MA(PADDR2, newpf | PG_V | PG_A | PG_M); 1056181641Skmacy CTR3(KTR_PMAP, "pmap_pte: pmap=%p va=0x%x newpte=0x%08x", 1057181641Skmacy pmap, va, (*PMAP2 & 0xffffffff)); 1058181641Skmacy } 1059181641Skmacy 1060181641Skmacy return (PADDR2 + (i386_btop(va) & (NPTEPG - 1))); 1061181641Skmacy } 1062181641Skmacy return (0); 1063181641Skmacy} 1064181641Skmacy 1065181641Skmacy/* 1066181641Skmacy * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte 1067181641Skmacy * being NULL. 1068181641Skmacy */ 1069181641Skmacystatic __inline void 1070181641Skmacypmap_pte_release(pt_entry_t *pte) 1071181641Skmacy{ 1072181641Skmacy 1073181641Skmacy if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) { 1074181641Skmacy CTR1(KTR_PMAP, "pmap_pte_release: pte=0x%jx", 1075181641Skmacy *PMAP2); 1076181641Skmacy PT_SET_VA(PMAP2, 0, TRUE); 1077181641Skmacy mtx_unlock(&PMAP2mutex); 1078181641Skmacy } 1079181641Skmacy} 1080181641Skmacy 1081181641Skmacystatic __inline void 1082181641Skmacyinvlcaddr(void *caddr) 1083181641Skmacy{ 1084181641Skmacy 1085181641Skmacy invlpg((u_int)caddr); 1086181641Skmacy PT_UPDATES_FLUSH(); 1087181641Skmacy} 1088181641Skmacy 1089181641Skmacy/* 1090181641Skmacy * Super fast pmap_pte routine best used when scanning 1091181641Skmacy * the pv lists. This eliminates many coarse-grained 1092181641Skmacy * invltlb calls. Note that many of the pv list 1093181641Skmacy * scans are across different pmaps. It is very wasteful 1094181641Skmacy * to do an entire invltlb for checking a single mapping. 1095181641Skmacy * 1096181641Skmacy * If the given pmap is not the current pmap, vm_page_queue_mtx 1097181641Skmacy * must be held and curthread pinned to a CPU. 1098181641Skmacy */ 1099181641Skmacystatic pt_entry_t * 1100181641Skmacypmap_pte_quick(pmap_t pmap, vm_offset_t va) 1101181641Skmacy{ 1102181641Skmacy pd_entry_t newpf; 1103181641Skmacy pd_entry_t *pde; 1104181641Skmacy 1105181641Skmacy pde = pmap_pde(pmap, va); 1106181641Skmacy if (*pde & PG_PS) 1107181641Skmacy return (pde); 1108181641Skmacy if (*pde != 0) { 1109181641Skmacy /* are we current address space or kernel? */ 1110181641Skmacy if (pmap_is_current(pmap)) 1111181641Skmacy return (vtopte(va)); 1112181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1113181641Skmacy KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 1114181641Skmacy newpf = *pde & PG_FRAME; 1115181641Skmacy if ((*PMAP1 & PG_FRAME) != newpf) { 1116181641Skmacy PT_SET_MA(PADDR1, newpf | PG_V | PG_A | PG_M); 1117181641Skmacy CTR3(KTR_PMAP, "pmap_pte_quick: pmap=%p va=0x%x newpte=0x%08x", 1118181641Skmacy pmap, va, (u_long)*PMAP1); 1119181641Skmacy 1120181641Skmacy#ifdef SMP 1121181641Skmacy PMAP1cpu = PCPU_GET(cpuid); 1122181641Skmacy#endif 1123181641Skmacy PMAP1changed++; 1124181641Skmacy } else 1125181641Skmacy#ifdef SMP 1126181641Skmacy if (PMAP1cpu != PCPU_GET(cpuid)) { 1127181641Skmacy PMAP1cpu = PCPU_GET(cpuid); 1128181641Skmacy invlcaddr(PADDR1); 1129181641Skmacy PMAP1changedcpu++; 1130181641Skmacy } else 1131181641Skmacy#endif 1132181641Skmacy PMAP1unchanged++; 1133181641Skmacy return (PADDR1 + (i386_btop(va) & (NPTEPG - 1))); 1134181641Skmacy } 1135181641Skmacy return (0); 1136181641Skmacy} 1137181641Skmacy 1138181641Skmacy/* 1139181641Skmacy * Routine: pmap_extract 1140181641Skmacy * Function: 1141181641Skmacy * Extract the physical page address associated 1142181641Skmacy * with the given map/virtual_address pair. 1143181641Skmacy */ 1144181641Skmacyvm_paddr_t 1145181641Skmacypmap_extract(pmap_t pmap, vm_offset_t va) 1146181641Skmacy{ 1147181641Skmacy vm_paddr_t rtval; 1148181641Skmacy pt_entry_t *pte; 1149181641Skmacy pd_entry_t pde; 1150181641Skmacy pt_entry_t pteval; 1151181641Skmacy 1152181641Skmacy rtval = 0; 1153181641Skmacy PMAP_LOCK(pmap); 1154181641Skmacy pde = pmap->pm_pdir[va >> PDRSHIFT]; 1155181641Skmacy if (pde != 0) { 1156181641Skmacy if ((pde & PG_PS) != 0) { 1157181641Skmacy rtval = xpmap_mtop(pde & PG_PS_FRAME) | (va & PDRMASK); 1158181641Skmacy PMAP_UNLOCK(pmap); 1159181641Skmacy return rtval; 1160181641Skmacy } 1161181641Skmacy pte = pmap_pte(pmap, va); 1162181641Skmacy pteval = *pte ? xpmap_mtop(*pte) : 0; 1163181641Skmacy rtval = (pteval & PG_FRAME) | (va & PAGE_MASK); 1164181641Skmacy pmap_pte_release(pte); 1165181641Skmacy } 1166181641Skmacy PMAP_UNLOCK(pmap); 1167181641Skmacy return (rtval); 1168181641Skmacy} 1169181641Skmacy 1170181641Skmacy/* 1171181641Skmacy * Routine: pmap_extract_ma 1172181641Skmacy * Function: 1173181641Skmacy * Like pmap_extract, but returns machine address 1174181641Skmacy */ 1175181641Skmacyvm_paddr_t 1176181641Skmacypmap_extract_ma(pmap_t pmap, vm_offset_t va) 1177181641Skmacy{ 1178181641Skmacy vm_paddr_t rtval; 1179181641Skmacy pt_entry_t *pte; 1180181641Skmacy pd_entry_t pde; 1181181641Skmacy 1182181641Skmacy rtval = 0; 1183181641Skmacy PMAP_LOCK(pmap); 1184181641Skmacy pde = pmap->pm_pdir[va >> PDRSHIFT]; 1185181641Skmacy if (pde != 0) { 1186181641Skmacy if ((pde & PG_PS) != 0) { 1187181641Skmacy rtval = (pde & ~PDRMASK) | (va & PDRMASK); 1188181641Skmacy PMAP_UNLOCK(pmap); 1189181641Skmacy return rtval; 1190181641Skmacy } 1191181641Skmacy pte = pmap_pte(pmap, va); 1192181641Skmacy rtval = (*pte & PG_FRAME) | (va & PAGE_MASK); 1193181641Skmacy pmap_pte_release(pte); 1194181641Skmacy } 1195181641Skmacy PMAP_UNLOCK(pmap); 1196181641Skmacy return (rtval); 1197181641Skmacy} 1198181641Skmacy 1199181641Skmacy/* 1200181641Skmacy * Routine: pmap_extract_and_hold 1201181641Skmacy * Function: 1202181641Skmacy * Atomically extract and hold the physical page 1203181641Skmacy * with the given pmap and virtual address pair 1204181641Skmacy * if that mapping permits the given protection. 1205181641Skmacy */ 1206181641Skmacyvm_page_t 1207181641Skmacypmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 1208181641Skmacy{ 1209181641Skmacy pd_entry_t pde; 1210181641Skmacy pt_entry_t pte; 1211181641Skmacy vm_page_t m; 1212181641Skmacy 1213181641Skmacy m = NULL; 1214181641Skmacy vm_page_lock_queues(); 1215181641Skmacy PMAP_LOCK(pmap); 1216181641Skmacy pde = PT_GET(pmap_pde(pmap, va)); 1217181641Skmacy if (pde != 0) { 1218181641Skmacy if (pde & PG_PS) { 1219181641Skmacy if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) { 1220181641Skmacy m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) | 1221181641Skmacy (va & PDRMASK)); 1222181641Skmacy vm_page_hold(m); 1223181641Skmacy } 1224181641Skmacy } else { 1225181641Skmacy sched_pin(); 1226181641Skmacy pte = PT_GET(pmap_pte_quick(pmap, va)); 1227181641Skmacy if (*PMAP1) 1228181641Skmacy PT_SET_MA(PADDR1, 0); 1229181641Skmacy if ((pte & PG_V) && 1230181641Skmacy ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) { 1231181641Skmacy m = PHYS_TO_VM_PAGE(pte & PG_FRAME); 1232181641Skmacy vm_page_hold(m); 1233181641Skmacy } 1234181641Skmacy sched_unpin(); 1235181641Skmacy } 1236181641Skmacy } 1237181641Skmacy vm_page_unlock_queues(); 1238181641Skmacy PMAP_UNLOCK(pmap); 1239181641Skmacy return (m); 1240181641Skmacy} 1241181641Skmacy 1242181641Skmacy/*************************************************** 1243181641Skmacy * Low level mapping routines..... 1244181641Skmacy ***************************************************/ 1245181641Skmacy 1246181641Skmacy/* 1247181641Skmacy * Add a wired page to the kva. 1248181641Skmacy * Note: not SMP coherent. 1249181641Skmacy */ 1250181747Skmacyvoid 1251181641Skmacypmap_kenter(vm_offset_t va, vm_paddr_t pa) 1252181641Skmacy{ 1253181641Skmacy PT_SET_MA(va, xpmap_ptom(pa)| PG_RW | PG_V | pgeflag); 1254181641Skmacy} 1255181641Skmacy 1256181747Skmacyvoid 1257181641Skmacypmap_kenter_ma(vm_offset_t va, vm_paddr_t ma) 1258181641Skmacy{ 1259181641Skmacy pt_entry_t *pte; 1260181641Skmacy 1261181641Skmacy pte = vtopte(va); 1262181641Skmacy pte_store_ma(pte, ma | PG_RW | PG_V | pgeflag); 1263181641Skmacy} 1264181641Skmacy 1265181641Skmacy 1266181747Skmacystatic __inline void 1267181641Skmacypmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode) 1268181641Skmacy{ 1269181641Skmacy PT_SET_MA(va, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0)); 1270181641Skmacy} 1271181641Skmacy 1272181641Skmacy/* 1273181641Skmacy * Remove a page from the kernel pagetables. 1274181641Skmacy * Note: not SMP coherent. 1275181641Skmacy */ 1276181641SkmacyPMAP_INLINE void 1277181641Skmacypmap_kremove(vm_offset_t va) 1278181641Skmacy{ 1279181641Skmacy pt_entry_t *pte; 1280181641Skmacy 1281181641Skmacy pte = vtopte(va); 1282181641Skmacy PT_CLEAR_VA(pte, FALSE); 1283181641Skmacy} 1284181641Skmacy 1285181641Skmacy/* 1286181641Skmacy * Used to map a range of physical addresses into kernel 1287181641Skmacy * virtual address space. 1288181641Skmacy * 1289181641Skmacy * The value passed in '*virt' is a suggested virtual address for 1290181641Skmacy * the mapping. Architectures which can support a direct-mapped 1291181641Skmacy * physical to virtual region can return the appropriate address 1292181641Skmacy * within that region, leaving '*virt' unchanged. Other 1293181641Skmacy * architectures should map the pages starting at '*virt' and 1294181641Skmacy * update '*virt' with the first usable address after the mapped 1295181641Skmacy * region. 1296181641Skmacy */ 1297181641Skmacyvm_offset_t 1298181641Skmacypmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 1299181641Skmacy{ 1300181641Skmacy vm_offset_t va, sva; 1301181641Skmacy 1302181641Skmacy va = sva = *virt; 1303181641Skmacy CTR4(KTR_PMAP, "pmap_map: va=0x%x start=0x%jx end=0x%jx prot=0x%x", 1304181641Skmacy va, start, end, prot); 1305181641Skmacy while (start < end) { 1306181641Skmacy pmap_kenter(va, start); 1307181641Skmacy va += PAGE_SIZE; 1308181641Skmacy start += PAGE_SIZE; 1309181641Skmacy } 1310181641Skmacy pmap_invalidate_range(kernel_pmap, sva, va); 1311181641Skmacy *virt = va; 1312181641Skmacy return (sva); 1313181641Skmacy} 1314181641Skmacy 1315181641Skmacy 1316181641Skmacy/* 1317181641Skmacy * Add a list of wired pages to the kva 1318181641Skmacy * this routine is only used for temporary 1319181641Skmacy * kernel mappings that do not need to have 1320181641Skmacy * page modification or references recorded. 1321181641Skmacy * Note that old mappings are simply written 1322181641Skmacy * over. The page *must* be wired. 1323181641Skmacy * Note: SMP coherent. Uses a ranged shootdown IPI. 1324181641Skmacy */ 1325181641Skmacyvoid 1326181641Skmacypmap_qenter(vm_offset_t sva, vm_page_t *ma, int count) 1327181641Skmacy{ 1328181641Skmacy pt_entry_t *endpte, *pte; 1329181641Skmacy vm_paddr_t pa; 1330181641Skmacy vm_offset_t va = sva; 1331181641Skmacy int mclcount = 0; 1332181641Skmacy multicall_entry_t mcl[16]; 1333181641Skmacy multicall_entry_t *mclp = mcl; 1334181641Skmacy int error; 1335181641Skmacy 1336181641Skmacy CTR2(KTR_PMAP, "pmap_qenter:sva=0x%x count=%d", va, count); 1337181641Skmacy pte = vtopte(sva); 1338181641Skmacy endpte = pte + count; 1339181641Skmacy while (pte < endpte) { 1340181641Skmacy pa = xpmap_ptom(VM_PAGE_TO_PHYS(*ma)) | pgeflag | PG_RW | PG_V | PG_M | PG_A; 1341181641Skmacy 1342181641Skmacy mclp->op = __HYPERVISOR_update_va_mapping; 1343181641Skmacy mclp->args[0] = va; 1344181641Skmacy mclp->args[1] = (uint32_t)(pa & 0xffffffff); 1345181641Skmacy mclp->args[2] = (uint32_t)(pa >> 32); 1346181641Skmacy mclp->args[3] = (*pte & PG_V) ? UVMF_INVLPG|UVMF_ALL : 0; 1347181641Skmacy 1348181641Skmacy va += PAGE_SIZE; 1349181641Skmacy pte++; 1350181641Skmacy ma++; 1351181641Skmacy mclp++; 1352181641Skmacy mclcount++; 1353181641Skmacy if (mclcount == 16) { 1354181641Skmacy error = HYPERVISOR_multicall(mcl, mclcount); 1355181641Skmacy mclp = mcl; 1356181641Skmacy mclcount = 0; 1357181641Skmacy KASSERT(error == 0, ("bad multicall %d", error)); 1358181641Skmacy } 1359181641Skmacy } 1360181641Skmacy if (mclcount) { 1361181641Skmacy error = HYPERVISOR_multicall(mcl, mclcount); 1362181641Skmacy KASSERT(error == 0, ("bad multicall %d", error)); 1363181641Skmacy } 1364181641Skmacy 1365181641Skmacy#ifdef INVARIANTS 1366181641Skmacy for (pte = vtopte(sva), mclcount = 0; mclcount < count; mclcount++, pte++) 1367181641Skmacy KASSERT(*pte, ("pte not set for va=0x%x", sva + mclcount*PAGE_SIZE)); 1368181641Skmacy#endif 1369181641Skmacy} 1370181641Skmacy 1371181641Skmacy 1372181641Skmacy/* 1373181641Skmacy * This routine tears out page mappings from the 1374181641Skmacy * kernel -- it is meant only for temporary mappings. 1375181641Skmacy * Note: SMP coherent. Uses a ranged shootdown IPI. 1376181641Skmacy */ 1377181641Skmacyvoid 1378181641Skmacypmap_qremove(vm_offset_t sva, int count) 1379181641Skmacy{ 1380181641Skmacy vm_offset_t va; 1381181641Skmacy 1382181641Skmacy CTR2(KTR_PMAP, "pmap_qremove: sva=0x%x count=%d", sva, count); 1383181641Skmacy va = sva; 1384181641Skmacy vm_page_lock_queues(); 1385181641Skmacy critical_enter(); 1386181641Skmacy while (count-- > 0) { 1387181641Skmacy pmap_kremove(va); 1388181641Skmacy va += PAGE_SIZE; 1389181641Skmacy } 1390181641Skmacy pmap_invalidate_range(kernel_pmap, sva, va); 1391181641Skmacy critical_exit(); 1392181641Skmacy vm_page_unlock_queues(); 1393181641Skmacy} 1394181641Skmacy 1395181641Skmacy/*************************************************** 1396181641Skmacy * Page table page management routines..... 1397181641Skmacy ***************************************************/ 1398181641Skmacystatic __inline void 1399181641Skmacypmap_free_zero_pages(vm_page_t free) 1400181641Skmacy{ 1401181641Skmacy vm_page_t m; 1402181641Skmacy 1403181641Skmacy while (free != NULL) { 1404181641Skmacy m = free; 1405181641Skmacy free = m->right; 1406181641Skmacy vm_page_free_zero(m); 1407181641Skmacy } 1408181641Skmacy} 1409181641Skmacy 1410181641Skmacy/* 1411181641Skmacy * This routine unholds page table pages, and if the hold count 1412181641Skmacy * drops to zero, then it decrements the wire count. 1413181641Skmacy */ 1414181641Skmacystatic __inline int 1415181641Skmacypmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1416181641Skmacy{ 1417181641Skmacy 1418181641Skmacy --m->wire_count; 1419181641Skmacy if (m->wire_count == 0) 1420181641Skmacy return _pmap_unwire_pte_hold(pmap, m, free); 1421181641Skmacy else 1422181641Skmacy return 0; 1423181641Skmacy} 1424181641Skmacy 1425181641Skmacystatic int 1426181641Skmacy_pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1427181641Skmacy{ 1428181641Skmacy vm_offset_t pteva; 1429181641Skmacy 1430181641Skmacy PT_UPDATES_FLUSH(); 1431181641Skmacy /* 1432181641Skmacy * unmap the page table page 1433181641Skmacy */ 1434181641Skmacy xen_pt_unpin(pmap->pm_pdir[m->pindex]); 1435181641Skmacy /* 1436181641Skmacy * page *might* contain residual mapping :-/ 1437181641Skmacy */ 1438181641Skmacy PD_CLEAR_VA(pmap, m->pindex, TRUE); 1439181641Skmacy pmap_zero_page(m); 1440181641Skmacy --pmap->pm_stats.resident_count; 1441181641Skmacy 1442181641Skmacy /* 1443181641Skmacy * This is a release store so that the ordinary store unmapping 1444181641Skmacy * the page table page is globally performed before TLB shoot- 1445181641Skmacy * down is begun. 1446181641Skmacy */ 1447181641Skmacy atomic_subtract_rel_int(&cnt.v_wire_count, 1); 1448181641Skmacy 1449181641Skmacy /* 1450181641Skmacy * Do an invltlb to make the invalidated mapping 1451181641Skmacy * take effect immediately. 1452181641Skmacy */ 1453181641Skmacy pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1454181641Skmacy pmap_invalidate_page(pmap, pteva); 1455181641Skmacy 1456181641Skmacy /* 1457181641Skmacy * Put page on a list so that it is released after 1458181641Skmacy * *ALL* TLB shootdown is done 1459181641Skmacy */ 1460181641Skmacy m->right = *free; 1461181641Skmacy *free = m; 1462181641Skmacy 1463181641Skmacy return 1; 1464181641Skmacy} 1465181641Skmacy 1466181641Skmacy/* 1467181641Skmacy * After removing a page table entry, this routine is used to 1468181641Skmacy * conditionally free the page, and manage the hold/wire counts. 1469181641Skmacy */ 1470181641Skmacystatic int 1471181641Skmacypmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free) 1472181641Skmacy{ 1473181641Skmacy pd_entry_t ptepde; 1474181641Skmacy vm_page_t mpte; 1475181641Skmacy 1476181641Skmacy if (va >= VM_MAXUSER_ADDRESS) 1477181641Skmacy return 0; 1478181641Skmacy ptepde = PT_GET(pmap_pde(pmap, va)); 1479181641Skmacy mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); 1480181641Skmacy return pmap_unwire_pte_hold(pmap, mpte, free); 1481181641Skmacy} 1482181641Skmacy 1483181641Skmacyvoid 1484181641Skmacypmap_pinit0(pmap_t pmap) 1485181641Skmacy{ 1486181641Skmacy 1487181641Skmacy PMAP_LOCK_INIT(pmap); 1488181641Skmacy pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1489181641Skmacy#ifdef PAE 1490181641Skmacy pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1491181641Skmacy#endif 1492181641Skmacy pmap->pm_active = 0; 1493181641Skmacy PCPU_SET(curpmap, pmap); 1494181641Skmacy TAILQ_INIT(&pmap->pm_pvchunk); 1495181641Skmacy bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1496181641Skmacy mtx_lock_spin(&allpmaps_lock); 1497181641Skmacy LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1498181641Skmacy mtx_unlock_spin(&allpmaps_lock); 1499181641Skmacy} 1500181641Skmacy 1501181641Skmacy/* 1502181641Skmacy * Initialize a preallocated and zeroed pmap structure, 1503181641Skmacy * such as one in a vmspace structure. 1504181641Skmacy */ 1505181641Skmacyint 1506181641Skmacypmap_pinit(pmap_t pmap) 1507181641Skmacy{ 1508181641Skmacy vm_page_t m, ptdpg[NPGPTD + 1]; 1509181641Skmacy int npgptd = NPGPTD + 1; 1510181641Skmacy static int color; 1511181641Skmacy int i; 1512181641Skmacy 1513181641Skmacy PMAP_LOCK_INIT(pmap); 1514181641Skmacy 1515181641Skmacy /* 1516181641Skmacy * No need to allocate page table space yet but we do need a valid 1517181641Skmacy * page directory table. 1518181641Skmacy */ 1519181641Skmacy if (pmap->pm_pdir == NULL) { 1520181641Skmacy pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1521181641Skmacy NBPTD); 1522181641Skmacy if (pmap->pm_pdir == NULL) { 1523181641Skmacy PMAP_LOCK_DESTROY(pmap); 1524181641Skmacy return (0); 1525181641Skmacy } 1526181641Skmacy#if defined(XEN) && defined(PAE) 1527181641Skmacy pmap->pm_pdpt = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1); 1528181641Skmacy#endif 1529181641Skmacy 1530181641Skmacy#if defined(PAE) && !defined(XEN) 1531181641Skmacy pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO); 1532181641Skmacy KASSERT(((vm_offset_t)pmap->pm_pdpt & 1533181641Skmacy ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0, 1534181641Skmacy ("pmap_pinit: pdpt misaligned")); 1535181641Skmacy KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30), 1536181641Skmacy ("pmap_pinit: pdpt above 4g")); 1537181641Skmacy#endif 1538181641Skmacy } 1539181641Skmacy 1540181641Skmacy /* 1541181641Skmacy * allocate the page directory page(s) 1542181641Skmacy */ 1543181641Skmacy for (i = 0; i < npgptd;) { 1544181641Skmacy m = vm_page_alloc(NULL, color++, 1545181641Skmacy VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1546181641Skmacy VM_ALLOC_ZERO); 1547181641Skmacy if (m == NULL) 1548181641Skmacy VM_WAIT; 1549181641Skmacy else { 1550181641Skmacy ptdpg[i++] = m; 1551181641Skmacy } 1552181641Skmacy } 1553181641Skmacy pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1554181641Skmacy for (i = 0; i < NPGPTD; i++) { 1555181641Skmacy if ((ptdpg[i]->flags & PG_ZERO) == 0) 1556181641Skmacy pagezero(&pmap->pm_pdir[i*NPTEPG]); 1557181641Skmacy } 1558181641Skmacy 1559181641Skmacy mtx_lock_spin(&allpmaps_lock); 1560181641Skmacy LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1561181641Skmacy mtx_unlock_spin(&allpmaps_lock); 1562181641Skmacy /* Wire in kernel global address entries. */ 1563181641Skmacy 1564181641Skmacy bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1565181641Skmacy#ifdef PAE 1566181641Skmacy#ifdef XEN 1567181641Skmacy pmap_qenter((vm_offset_t)pmap->pm_pdpt, &ptdpg[NPGPTD], 1); 1568181641Skmacy if ((ptdpg[NPGPTD]->flags & PG_ZERO) == 0) 1569181641Skmacy bzero(pmap->pm_pdpt, PAGE_SIZE); 1570181641Skmacy#endif 1571181641Skmacy for (i = 0; i < NPGPTD; i++) { 1572181641Skmacy vm_paddr_t ma; 1573181641Skmacy 1574181641Skmacy ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1575181641Skmacy pmap->pm_pdpt[i] = ma | PG_V; 1576181641Skmacy 1577181641Skmacy } 1578181641Skmacy#endif 1579181641Skmacy#ifdef XEN 1580181641Skmacy for (i = 0; i < NPGPTD; i++) { 1581181641Skmacy pt_entry_t *pd; 1582181641Skmacy vm_paddr_t ma; 1583181641Skmacy 1584181641Skmacy ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1585181641Skmacy pd = pmap->pm_pdir + (i * NPDEPG); 1586181641Skmacy PT_SET_MA(pd, *vtopte((vm_offset_t)pd) & ~(PG_M|PG_A|PG_U|PG_RW)); 1587181641Skmacy#if 0 1588181641Skmacy xen_pgd_pin(ma); 1589181641Skmacy#endif 1590181641Skmacy } 1591181641Skmacy 1592181641Skmacy#ifdef PAE 1593181641Skmacy PT_SET_MA(pmap->pm_pdpt, *vtopte((vm_offset_t)pmap->pm_pdpt) & ~PG_RW); 1594181641Skmacy#endif 1595181641Skmacy vm_page_lock_queues(); 1596181641Skmacy xen_flush_queue(); 1597181641Skmacy xen_pgdpt_pin(xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[NPGPTD]))); 1598181641Skmacy for (i = 0; i < NPGPTD; i++) { 1599181641Skmacy vm_paddr_t ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1600181641Skmacy PT_SET_VA_MA(&pmap->pm_pdir[PTDPTDI + i], ma | PG_V | PG_A, FALSE); 1601181641Skmacy } 1602181641Skmacy xen_flush_queue(); 1603181641Skmacy vm_page_unlock_queues(); 1604181641Skmacy#endif 1605181641Skmacy pmap->pm_active = 0; 1606181641Skmacy TAILQ_INIT(&pmap->pm_pvchunk); 1607181641Skmacy bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1608181641Skmacy 1609181641Skmacy return (1); 1610181641Skmacy} 1611181641Skmacy 1612181641Skmacy/* 1613181641Skmacy * this routine is called if the page table page is not 1614181641Skmacy * mapped correctly. 1615181641Skmacy */ 1616181641Skmacystatic vm_page_t 1617181641Skmacy_pmap_allocpte(pmap_t pmap, unsigned int ptepindex, int flags) 1618181641Skmacy{ 1619181641Skmacy vm_paddr_t ptema; 1620181641Skmacy vm_page_t m; 1621181641Skmacy 1622181641Skmacy KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1623181641Skmacy (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1624181641Skmacy ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1625181641Skmacy 1626181641Skmacy /* 1627181641Skmacy * Allocate a page table page. 1628181641Skmacy */ 1629181641Skmacy if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1630181641Skmacy VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1631181641Skmacy if (flags & M_WAITOK) { 1632181641Skmacy PMAP_UNLOCK(pmap); 1633181641Skmacy vm_page_unlock_queues(); 1634181641Skmacy VM_WAIT; 1635181641Skmacy vm_page_lock_queues(); 1636181641Skmacy PMAP_LOCK(pmap); 1637181641Skmacy } 1638181641Skmacy 1639181641Skmacy /* 1640181641Skmacy * Indicate the need to retry. While waiting, the page table 1641181641Skmacy * page may have been allocated. 1642181641Skmacy */ 1643181641Skmacy return (NULL); 1644181641Skmacy } 1645181641Skmacy if ((m->flags & PG_ZERO) == 0) 1646181641Skmacy pmap_zero_page(m); 1647181641Skmacy 1648181641Skmacy /* 1649181641Skmacy * Map the pagetable page into the process address space, if 1650181641Skmacy * it isn't already there. 1651181641Skmacy */ 1652181641Skmacy pmap->pm_stats.resident_count++; 1653181641Skmacy 1654181641Skmacy ptema = xpmap_ptom(VM_PAGE_TO_PHYS(m)); 1655181641Skmacy xen_pt_pin(ptema); 1656181641Skmacy PT_SET_VA_MA(&pmap->pm_pdir[ptepindex], 1657181641Skmacy (ptema | PG_U | PG_RW | PG_V | PG_A | PG_M), TRUE); 1658181641Skmacy 1659181641Skmacy KASSERT(pmap->pm_pdir[ptepindex], 1660181641Skmacy ("_pmap_allocpte: ptepindex=%d did not get mapped", ptepindex)); 1661181641Skmacy return (m); 1662181641Skmacy} 1663181641Skmacy 1664181641Skmacystatic vm_page_t 1665181641Skmacypmap_allocpte(pmap_t pmap, vm_offset_t va, int flags) 1666181641Skmacy{ 1667181641Skmacy unsigned ptepindex; 1668181641Skmacy pd_entry_t ptema; 1669181641Skmacy vm_page_t m; 1670181641Skmacy 1671181641Skmacy KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1672181641Skmacy (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1673181641Skmacy ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1674181641Skmacy 1675181641Skmacy /* 1676181641Skmacy * Calculate pagetable page index 1677181641Skmacy */ 1678181641Skmacy ptepindex = va >> PDRSHIFT; 1679181641Skmacyretry: 1680181641Skmacy /* 1681181641Skmacy * Get the page directory entry 1682181641Skmacy */ 1683181641Skmacy ptema = pmap->pm_pdir[ptepindex]; 1684181641Skmacy 1685181641Skmacy /* 1686181641Skmacy * This supports switching from a 4MB page to a 1687181641Skmacy * normal 4K page. 1688181641Skmacy */ 1689181641Skmacy if (ptema & PG_PS) { 1690181641Skmacy /* 1691181641Skmacy * XXX 1692181641Skmacy */ 1693181641Skmacy pmap->pm_pdir[ptepindex] = 0; 1694181641Skmacy ptema = 0; 1695181641Skmacy pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1696181641Skmacy pmap_invalidate_all(kernel_pmap); 1697181641Skmacy } 1698181641Skmacy 1699181641Skmacy /* 1700181641Skmacy * If the page table page is mapped, we just increment the 1701181641Skmacy * hold count, and activate it. 1702181641Skmacy */ 1703181641Skmacy if (ptema & PG_V) { 1704181641Skmacy m = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME); 1705181641Skmacy m->wire_count++; 1706181641Skmacy } else { 1707181641Skmacy /* 1708181641Skmacy * Here if the pte page isn't mapped, or if it has 1709181641Skmacy * been deallocated. 1710181641Skmacy */ 1711181641Skmacy CTR3(KTR_PMAP, "pmap_allocpte: pmap=%p va=0x%08x flags=0x%x", 1712181641Skmacy pmap, va, flags); 1713181641Skmacy m = _pmap_allocpte(pmap, ptepindex, flags); 1714181641Skmacy if (m == NULL && (flags & M_WAITOK)) 1715181641Skmacy goto retry; 1716181641Skmacy 1717181641Skmacy KASSERT(pmap->pm_pdir[ptepindex], ("ptepindex=%d did not get mapped", ptepindex)); 1718181641Skmacy } 1719181641Skmacy return (m); 1720181641Skmacy} 1721181641Skmacy 1722181641Skmacy 1723181641Skmacy/*************************************************** 1724181641Skmacy* Pmap allocation/deallocation routines. 1725181641Skmacy ***************************************************/ 1726181641Skmacy 1727181641Skmacy#ifdef SMP 1728181641Skmacy/* 1729181641Skmacy * Deal with a SMP shootdown of other users of the pmap that we are 1730181641Skmacy * trying to dispose of. This can be a bit hairy. 1731181641Skmacy */ 1732181641Skmacystatic u_int *lazymask; 1733181641Skmacystatic u_int lazyptd; 1734181641Skmacystatic volatile u_int lazywait; 1735181641Skmacy 1736181641Skmacyvoid pmap_lazyfix_action(void); 1737181641Skmacy 1738181641Skmacyvoid 1739181641Skmacypmap_lazyfix_action(void) 1740181641Skmacy{ 1741181641Skmacy u_int mymask = PCPU_GET(cpumask); 1742181641Skmacy 1743181641Skmacy#ifdef COUNT_IPIS 1744181641Skmacy (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++; 1745181641Skmacy#endif 1746181641Skmacy if (rcr3() == lazyptd) 1747181641Skmacy load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1748181641Skmacy atomic_clear_int(lazymask, mymask); 1749181641Skmacy atomic_store_rel_int(&lazywait, 1); 1750181641Skmacy} 1751181641Skmacy 1752181641Skmacystatic void 1753181641Skmacypmap_lazyfix_self(u_int mymask) 1754181641Skmacy{ 1755181641Skmacy 1756181641Skmacy if (rcr3() == lazyptd) 1757181641Skmacy load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1758181641Skmacy atomic_clear_int(lazymask, mymask); 1759181641Skmacy} 1760181641Skmacy 1761181641Skmacy 1762181641Skmacystatic void 1763181641Skmacypmap_lazyfix(pmap_t pmap) 1764181641Skmacy{ 1765181641Skmacy u_int mymask; 1766181641Skmacy u_int mask; 1767181641Skmacy u_int spins; 1768181641Skmacy 1769181641Skmacy while ((mask = pmap->pm_active) != 0) { 1770181641Skmacy spins = 50000000; 1771181641Skmacy mask = mask & -mask; /* Find least significant set bit */ 1772181641Skmacy mtx_lock_spin(&smp_ipi_mtx); 1773181641Skmacy#ifdef PAE 1774181641Skmacy lazyptd = vtophys(pmap->pm_pdpt); 1775181641Skmacy#else 1776181641Skmacy lazyptd = vtophys(pmap->pm_pdir); 1777181641Skmacy#endif 1778181641Skmacy mymask = PCPU_GET(cpumask); 1779181641Skmacy if (mask == mymask) { 1780181641Skmacy lazymask = &pmap->pm_active; 1781181641Skmacy pmap_lazyfix_self(mymask); 1782181641Skmacy } else { 1783181641Skmacy atomic_store_rel_int((u_int *)&lazymask, 1784181641Skmacy (u_int)&pmap->pm_active); 1785181641Skmacy atomic_store_rel_int(&lazywait, 0); 1786181641Skmacy ipi_selected(mask, IPI_LAZYPMAP); 1787181641Skmacy while (lazywait == 0) { 1788181641Skmacy ia32_pause(); 1789181641Skmacy if (--spins == 0) 1790181641Skmacy break; 1791181641Skmacy } 1792181641Skmacy } 1793181641Skmacy mtx_unlock_spin(&smp_ipi_mtx); 1794181641Skmacy if (spins == 0) 1795181641Skmacy printf("pmap_lazyfix: spun for 50000000\n"); 1796181641Skmacy } 1797181641Skmacy} 1798181641Skmacy 1799181641Skmacy#else /* SMP */ 1800181641Skmacy 1801181641Skmacy/* 1802181641Skmacy * Cleaning up on uniprocessor is easy. For various reasons, we're 1803181641Skmacy * unlikely to have to even execute this code, including the fact 1804181641Skmacy * that the cleanup is deferred until the parent does a wait(2), which 1805181641Skmacy * means that another userland process has run. 1806181641Skmacy */ 1807181641Skmacystatic void 1808181641Skmacypmap_lazyfix(pmap_t pmap) 1809181641Skmacy{ 1810181641Skmacy u_int cr3; 1811181641Skmacy 1812181641Skmacy cr3 = vtophys(pmap->pm_pdir); 1813181641Skmacy if (cr3 == rcr3()) { 1814181641Skmacy load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1815181641Skmacy pmap->pm_active &= ~(PCPU_GET(cpumask)); 1816181641Skmacy } 1817181641Skmacy} 1818181641Skmacy#endif /* SMP */ 1819181641Skmacy 1820181641Skmacy/* 1821181641Skmacy * Release any resources held by the given physical map. 1822181641Skmacy * Called when a pmap initialized by pmap_pinit is being released. 1823181641Skmacy * Should only be called if the map contains no valid mappings. 1824181641Skmacy */ 1825181641Skmacyvoid 1826181641Skmacypmap_release(pmap_t pmap) 1827181641Skmacy{ 1828181641Skmacy vm_page_t m, ptdpg[2*NPGPTD+1]; 1829181641Skmacy vm_paddr_t ma; 1830181641Skmacy int i; 1831181641Skmacy#ifdef XEN 1832181641Skmacy#ifdef PAE 1833181641Skmacy int npgptd = NPGPTD + 1; 1834181641Skmacy#else 1835181641Skmacy int npgptd = NPGPTD; 1836181641Skmacy#endif 1837181641Skmacy#else 1838181641Skmacy int npgptd = NPGPTD; 1839181641Skmacy#endif 1840181641Skmacy KASSERT(pmap->pm_stats.resident_count == 0, 1841181641Skmacy ("pmap_release: pmap resident count %ld != 0", 1842181641Skmacy pmap->pm_stats.resident_count)); 1843181641Skmacy PT_UPDATES_FLUSH(); 1844181641Skmacy 1845181641Skmacy pmap_lazyfix(pmap); 1846181641Skmacy mtx_lock_spin(&allpmaps_lock); 1847181641Skmacy LIST_REMOVE(pmap, pm_list); 1848181641Skmacy mtx_unlock_spin(&allpmaps_lock); 1849181641Skmacy 1850181641Skmacy for (i = 0; i < NPGPTD; i++) 1851181641Skmacy ptdpg[i] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdir + (i*NPDEPG)) & PG_FRAME); 1852181641Skmacy pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1853181641Skmacy#if defined(PAE) && defined(XEN) 1854181641Skmacy ptdpg[NPGPTD] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdpt)); 1855181641Skmacy#endif 1856181641Skmacy 1857181641Skmacy for (i = 0; i < npgptd; i++) { 1858181641Skmacy m = ptdpg[i]; 1859181641Skmacy ma = xpmap_ptom(VM_PAGE_TO_PHYS(m)); 1860181641Skmacy /* unpinning L1 and L2 treated the same */ 1861181641Skmacy xen_pgd_unpin(ma); 1862181641Skmacy#ifdef PAE 1863181641Skmacy KASSERT(xpmap_ptom(VM_PAGE_TO_PHYS(m)) == (pmap->pm_pdpt[i] & PG_FRAME), 1864181641Skmacy ("pmap_release: got wrong ptd page")); 1865181641Skmacy#endif 1866181641Skmacy m->wire_count--; 1867181641Skmacy atomic_subtract_int(&cnt.v_wire_count, 1); 1868181641Skmacy vm_page_free(m); 1869181641Skmacy } 1870181641Skmacy PMAP_LOCK_DESTROY(pmap); 1871181641Skmacy} 1872181641Skmacy 1873181641Skmacystatic int 1874181641Skmacykvm_size(SYSCTL_HANDLER_ARGS) 1875181641Skmacy{ 1876181641Skmacy unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1877181641Skmacy 1878181641Skmacy return sysctl_handle_long(oidp, &ksize, 0, req); 1879181641Skmacy} 1880181641SkmacySYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1881181641Skmacy 0, 0, kvm_size, "IU", "Size of KVM"); 1882181641Skmacy 1883181641Skmacystatic int 1884181641Skmacykvm_free(SYSCTL_HANDLER_ARGS) 1885181641Skmacy{ 1886181641Skmacy unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1887181641Skmacy 1888181641Skmacy return sysctl_handle_long(oidp, &kfree, 0, req); 1889181641Skmacy} 1890181641SkmacySYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1891181641Skmacy 0, 0, kvm_free, "IU", "Amount of KVM free"); 1892181641Skmacy 1893181641Skmacy/* 1894181641Skmacy * grow the number of kernel page table entries, if needed 1895181641Skmacy */ 1896181641Skmacyvoid 1897181641Skmacypmap_growkernel(vm_offset_t addr) 1898181641Skmacy{ 1899181641Skmacy struct pmap *pmap; 1900181641Skmacy vm_paddr_t ptppaddr; 1901181641Skmacy vm_page_t nkpg; 1902181641Skmacy pd_entry_t newpdir; 1903181641Skmacy 1904181641Skmacy mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1905181641Skmacy if (kernel_vm_end == 0) { 1906181641Skmacy kernel_vm_end = KERNBASE; 1907181641Skmacy nkpt = 0; 1908181641Skmacy while (pdir_pde(PTD, kernel_vm_end)) { 1909181641Skmacy kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1910181641Skmacy nkpt++; 1911181641Skmacy if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1912181641Skmacy kernel_vm_end = kernel_map->max_offset; 1913181641Skmacy break; 1914181641Skmacy } 1915181641Skmacy } 1916181641Skmacy } 1917181641Skmacy addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1918181641Skmacy if (addr - 1 >= kernel_map->max_offset) 1919181641Skmacy addr = kernel_map->max_offset; 1920181641Skmacy while (kernel_vm_end < addr) { 1921181641Skmacy if (pdir_pde(PTD, kernel_vm_end)) { 1922181641Skmacy kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1923181641Skmacy if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1924181641Skmacy kernel_vm_end = kernel_map->max_offset; 1925181641Skmacy break; 1926181641Skmacy } 1927181641Skmacy continue; 1928181641Skmacy } 1929181641Skmacy 1930181641Skmacy /* 1931181641Skmacy * This index is bogus, but out of the way 1932181641Skmacy */ 1933181641Skmacy nkpg = vm_page_alloc(NULL, nkpt, 1934181641Skmacy VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1935181641Skmacy if (!nkpg) 1936181641Skmacy panic("pmap_growkernel: no memory to grow kernel"); 1937181641Skmacy 1938181641Skmacy nkpt++; 1939181641Skmacy 1940181641Skmacy pmap_zero_page(nkpg); 1941181641Skmacy ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1942181641Skmacy newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1943181946Skmacy vm_page_lock_queues(); 1944181641Skmacy PD_SET_VA(kernel_pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE); 1945181641Skmacy mtx_lock_spin(&allpmaps_lock); 1946181641Skmacy LIST_FOREACH(pmap, &allpmaps, pm_list) 1947181641Skmacy PD_SET_VA(pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE); 1948181641Skmacy 1949181641Skmacy mtx_unlock_spin(&allpmaps_lock); 1950181946Skmacy vm_page_unlock_queues(); 1951181946Skmacy 1952181641Skmacy kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1953181641Skmacy if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1954181641Skmacy kernel_vm_end = kernel_map->max_offset; 1955181641Skmacy break; 1956181641Skmacy } 1957181641Skmacy } 1958181641Skmacy} 1959181641Skmacy 1960181641Skmacy 1961181641Skmacy/*************************************************** 1962181641Skmacy * page management routines. 1963181641Skmacy ***************************************************/ 1964181641Skmacy 1965181641SkmacyCTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE); 1966181641SkmacyCTASSERT(_NPCM == 11); 1967181641Skmacy 1968181641Skmacystatic __inline struct pv_chunk * 1969181641Skmacypv_to_chunk(pv_entry_t pv) 1970181641Skmacy{ 1971181641Skmacy 1972181641Skmacy return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK); 1973181641Skmacy} 1974181641Skmacy 1975181641Skmacy#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap) 1976181641Skmacy 1977181641Skmacy#define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */ 1978181641Skmacy#define PC_FREE10 0x0000fffful /* Free values for index 10 */ 1979181641Skmacy 1980181641Skmacystatic uint32_t pc_freemask[11] = { 1981181641Skmacy PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1982181641Skmacy PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1983181641Skmacy PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1984181641Skmacy PC_FREE0_9, PC_FREE10 1985181641Skmacy}; 1986181641Skmacy 1987181641SkmacySYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0, 1988181641Skmacy "Current number of pv entries"); 1989181641Skmacy 1990181641Skmacy#ifdef PV_STATS 1991181641Skmacystatic int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail; 1992181641Skmacy 1993181641SkmacySYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0, 1994181641Skmacy "Current number of pv entry chunks"); 1995181641SkmacySYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0, 1996181641Skmacy "Current number of pv entry chunks allocated"); 1997181641SkmacySYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0, 1998181641Skmacy "Current number of pv entry chunks frees"); 1999181641SkmacySYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0, 2000181641Skmacy "Number of times tried to get a chunk page but failed."); 2001181641Skmacy 2002181641Skmacystatic long pv_entry_frees, pv_entry_allocs; 2003181641Skmacystatic int pv_entry_spare; 2004181641Skmacy 2005181641SkmacySYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0, 2006181641Skmacy "Current number of pv entry frees"); 2007181641SkmacySYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0, 2008181641Skmacy "Current number of pv entry allocs"); 2009181641SkmacySYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0, 2010181641Skmacy "Current number of spare pv entries"); 2011181641Skmacy 2012181641Skmacystatic int pmap_collect_inactive, pmap_collect_active; 2013181641Skmacy 2014181641SkmacySYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0, 2015181641Skmacy "Current number times pmap_collect called on inactive queue"); 2016181641SkmacySYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0, 2017181641Skmacy "Current number times pmap_collect called on active queue"); 2018181641Skmacy#endif 2019181641Skmacy 2020181641Skmacy/* 2021181641Skmacy * We are in a serious low memory condition. Resort to 2022181641Skmacy * drastic measures to free some pages so we can allocate 2023181641Skmacy * another pv entry chunk. This is normally called to 2024181641Skmacy * unmap inactive pages, and if necessary, active pages. 2025181641Skmacy */ 2026181641Skmacystatic void 2027181641Skmacypmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq) 2028181641Skmacy{ 2029181641Skmacy pmap_t pmap; 2030181641Skmacy pt_entry_t *pte, tpte; 2031181641Skmacy pv_entry_t next_pv, pv; 2032181641Skmacy vm_offset_t va; 2033181641Skmacy vm_page_t m, free; 2034181641Skmacy 2035181641Skmacy sched_pin(); 2036181641Skmacy TAILQ_FOREACH(m, &vpq->pl, pageq) { 2037181641Skmacy if (m->hold_count || m->busy) 2038181641Skmacy continue; 2039181641Skmacy TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) { 2040181641Skmacy va = pv->pv_va; 2041181641Skmacy pmap = PV_PMAP(pv); 2042181641Skmacy /* Avoid deadlock and lock recursion. */ 2043181641Skmacy if (pmap > locked_pmap) 2044181641Skmacy PMAP_LOCK(pmap); 2045181641Skmacy else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) 2046181641Skmacy continue; 2047181641Skmacy pmap->pm_stats.resident_count--; 2048181641Skmacy pte = pmap_pte_quick(pmap, va); 2049181641Skmacy tpte = pte_load_clear(pte); 2050181641Skmacy KASSERT((tpte & PG_W) == 0, 2051181641Skmacy ("pmap_collect: wired pte %#jx", (uintmax_t)tpte)); 2052181641Skmacy if (tpte & PG_A) 2053181641Skmacy vm_page_flag_set(m, PG_REFERENCED); 2054181641Skmacy if (tpte & PG_M) { 2055181641Skmacy KASSERT((tpte & PG_RW), 2056181641Skmacy ("pmap_collect: modified page not writable: va: %#x, pte: %#jx", 2057181641Skmacy va, (uintmax_t)tpte)); 2058181641Skmacy vm_page_dirty(m); 2059181641Skmacy } 2060181641Skmacy free = NULL; 2061181641Skmacy pmap_unuse_pt(pmap, va, &free); 2062181641Skmacy pmap_invalidate_page(pmap, va); 2063181641Skmacy pmap_free_zero_pages(free); 2064181641Skmacy TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2065181641Skmacy if (TAILQ_EMPTY(&m->md.pv_list)) 2066181641Skmacy vm_page_flag_clear(m, PG_WRITEABLE); 2067181641Skmacy free_pv_entry(pmap, pv); 2068181641Skmacy if (pmap != locked_pmap) 2069181641Skmacy PMAP_UNLOCK(pmap); 2070181641Skmacy } 2071181641Skmacy } 2072181641Skmacy sched_unpin(); 2073181641Skmacy} 2074181641Skmacy 2075181641Skmacy 2076181641Skmacy/* 2077181641Skmacy * free the pv_entry back to the free list 2078181641Skmacy */ 2079181641Skmacystatic void 2080181641Skmacyfree_pv_entry(pmap_t pmap, pv_entry_t pv) 2081181641Skmacy{ 2082181641Skmacy vm_page_t m; 2083181641Skmacy struct pv_chunk *pc; 2084181641Skmacy int idx, field, bit; 2085181641Skmacy 2086181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2087181641Skmacy PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2088181641Skmacy PV_STAT(pv_entry_frees++); 2089181641Skmacy PV_STAT(pv_entry_spare++); 2090181641Skmacy pv_entry_count--; 2091181641Skmacy pc = pv_to_chunk(pv); 2092181641Skmacy idx = pv - &pc->pc_pventry[0]; 2093181641Skmacy field = idx / 32; 2094181641Skmacy bit = idx % 32; 2095181641Skmacy pc->pc_map[field] |= 1ul << bit; 2096181641Skmacy /* move to head of list */ 2097181641Skmacy TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2098181641Skmacy TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2099181641Skmacy for (idx = 0; idx < _NPCM; idx++) 2100181641Skmacy if (pc->pc_map[idx] != pc_freemask[idx]) 2101181641Skmacy return; 2102181641Skmacy PV_STAT(pv_entry_spare -= _NPCPV); 2103181641Skmacy PV_STAT(pc_chunk_count--); 2104181641Skmacy PV_STAT(pc_chunk_frees++); 2105181641Skmacy /* entire chunk is free, return it */ 2106181641Skmacy TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2107181641Skmacy m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 2108181641Skmacy pmap_qremove((vm_offset_t)pc, 1); 2109181641Skmacy vm_page_unwire(m, 0); 2110181641Skmacy vm_page_free(m); 2111181641Skmacy pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 2112181641Skmacy} 2113181641Skmacy 2114181641Skmacy/* 2115181641Skmacy * get a new pv_entry, allocating a block from the system 2116181641Skmacy * when needed. 2117181641Skmacy */ 2118181641Skmacystatic pv_entry_t 2119181641Skmacyget_pv_entry(pmap_t pmap, int try) 2120181641Skmacy{ 2121181641Skmacy static const struct timeval printinterval = { 60, 0 }; 2122181641Skmacy static struct timeval lastprint; 2123181641Skmacy static vm_pindex_t colour; 2124181641Skmacy struct vpgqueues *pq; 2125181641Skmacy int bit, field; 2126181641Skmacy pv_entry_t pv; 2127181641Skmacy struct pv_chunk *pc; 2128181641Skmacy vm_page_t m; 2129181641Skmacy 2130181641Skmacy PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2131181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2132181641Skmacy PV_STAT(pv_entry_allocs++); 2133181641Skmacy pv_entry_count++; 2134181641Skmacy if (pv_entry_count > pv_entry_high_water) 2135181641Skmacy if (ratecheck(&lastprint, &printinterval)) 2136181641Skmacy printf("Approaching the limit on PV entries, consider " 2137181641Skmacy "increasing either the vm.pmap.shpgperproc or the " 2138181641Skmacy "vm.pmap.pv_entry_max tunable.\n"); 2139181641Skmacy pq = NULL; 2140181641Skmacyretry: 2141181641Skmacy pc = TAILQ_FIRST(&pmap->pm_pvchunk); 2142181641Skmacy if (pc != NULL) { 2143181641Skmacy for (field = 0; field < _NPCM; field++) { 2144181641Skmacy if (pc->pc_map[field]) { 2145181641Skmacy bit = bsfl(pc->pc_map[field]); 2146181641Skmacy break; 2147181641Skmacy } 2148181641Skmacy } 2149181641Skmacy if (field < _NPCM) { 2150181641Skmacy pv = &pc->pc_pventry[field * 32 + bit]; 2151181641Skmacy pc->pc_map[field] &= ~(1ul << bit); 2152181641Skmacy /* If this was the last item, move it to tail */ 2153181641Skmacy for (field = 0; field < _NPCM; field++) 2154181641Skmacy if (pc->pc_map[field] != 0) { 2155181641Skmacy PV_STAT(pv_entry_spare--); 2156181641Skmacy return (pv); /* not full, return */ 2157181641Skmacy } 2158181641Skmacy TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2159181641Skmacy TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); 2160181641Skmacy PV_STAT(pv_entry_spare--); 2161181641Skmacy return (pv); 2162181641Skmacy } 2163181641Skmacy } 2164181641Skmacy /* 2165181641Skmacy * Access to the ptelist "pv_vafree" is synchronized by the page 2166181641Skmacy * queues lock. If "pv_vafree" is currently non-empty, it will 2167181641Skmacy * remain non-empty until pmap_ptelist_alloc() completes. 2168181641Skmacy */ 2169181641Skmacy if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq == 2170181641Skmacy &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) | 2171181641Skmacy VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) { 2172181641Skmacy if (try) { 2173181641Skmacy pv_entry_count--; 2174181641Skmacy PV_STAT(pc_chunk_tryfail++); 2175181641Skmacy return (NULL); 2176181641Skmacy } 2177181641Skmacy /* 2178181641Skmacy * Reclaim pv entries: At first, destroy mappings to 2179181641Skmacy * inactive pages. After that, if a pv chunk entry 2180181641Skmacy * is still needed, destroy mappings to active pages. 2181181641Skmacy */ 2182181641Skmacy if (pq == NULL) { 2183181641Skmacy PV_STAT(pmap_collect_inactive++); 2184181641Skmacy pq = &vm_page_queues[PQ_INACTIVE]; 2185181641Skmacy } else if (pq == &vm_page_queues[PQ_INACTIVE]) { 2186181641Skmacy PV_STAT(pmap_collect_active++); 2187181641Skmacy pq = &vm_page_queues[PQ_ACTIVE]; 2188181641Skmacy } else 2189181641Skmacy panic("get_pv_entry: increase vm.pmap.shpgperproc"); 2190181641Skmacy pmap_collect(pmap, pq); 2191181641Skmacy goto retry; 2192181641Skmacy } 2193181641Skmacy PV_STAT(pc_chunk_count++); 2194181641Skmacy PV_STAT(pc_chunk_allocs++); 2195181641Skmacy colour++; 2196181641Skmacy pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 2197181641Skmacy pmap_qenter((vm_offset_t)pc, &m, 1); 2198181641Skmacy if ((m->flags & PG_ZERO) == 0) 2199181641Skmacy pagezero(pc); 2200181641Skmacy pc->pc_pmap = pmap; 2201181641Skmacy pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */ 2202181641Skmacy for (field = 1; field < _NPCM; field++) 2203181641Skmacy pc->pc_map[field] = pc_freemask[field]; 2204181641Skmacy pv = &pc->pc_pventry[0]; 2205181641Skmacy TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2206181641Skmacy PV_STAT(pv_entry_spare += _NPCPV - 1); 2207181641Skmacy return (pv); 2208181641Skmacy} 2209181641Skmacy 2210181641Skmacystatic void 2211181641Skmacypmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 2212181641Skmacy{ 2213181641Skmacy pv_entry_t pv; 2214181641Skmacy 2215181641Skmacy PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2216181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2217181641Skmacy TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2218181641Skmacy if (pmap == PV_PMAP(pv) && va == pv->pv_va) 2219181641Skmacy break; 2220181641Skmacy } 2221181641Skmacy KASSERT(pv != NULL, ("pmap_remove_entry: pv not found")); 2222181641Skmacy TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2223181641Skmacy if (TAILQ_EMPTY(&m->md.pv_list)) 2224181641Skmacy vm_page_flag_clear(m, PG_WRITEABLE); 2225181641Skmacy free_pv_entry(pmap, pv); 2226181641Skmacy} 2227181641Skmacy 2228181641Skmacy/* 2229181641Skmacy * Create a pv entry for page at pa for 2230181641Skmacy * (pmap, va). 2231181641Skmacy */ 2232181641Skmacystatic void 2233181641Skmacypmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2234181641Skmacy{ 2235181641Skmacy pv_entry_t pv; 2236181641Skmacy 2237181641Skmacy PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2238181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2239181641Skmacy pv = get_pv_entry(pmap, FALSE); 2240181641Skmacy pv->pv_va = va; 2241181641Skmacy TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2242181641Skmacy} 2243181641Skmacy 2244181641Skmacy/* 2245181641Skmacy * Conditionally create a pv entry. 2246181641Skmacy */ 2247181641Skmacystatic boolean_t 2248181641Skmacypmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2249181641Skmacy{ 2250181641Skmacy pv_entry_t pv; 2251181641Skmacy 2252181641Skmacy PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2253181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2254181641Skmacy if (pv_entry_count < pv_entry_high_water && 2255181641Skmacy (pv = get_pv_entry(pmap, TRUE)) != NULL) { 2256181641Skmacy pv->pv_va = va; 2257181641Skmacy TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2258181641Skmacy return (TRUE); 2259181641Skmacy } else 2260181641Skmacy return (FALSE); 2261181641Skmacy} 2262181641Skmacy 2263181641Skmacy/* 2264181641Skmacy * pmap_remove_pte: do the things to unmap a page in a process 2265181641Skmacy */ 2266181641Skmacystatic int 2267181641Skmacypmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free) 2268181641Skmacy{ 2269181641Skmacy pt_entry_t oldpte; 2270181641Skmacy vm_page_t m; 2271181641Skmacy 2272181641Skmacy CTR3(KTR_PMAP, "pmap_remove_pte: pmap=%p *ptq=0x%x va=0x%x", 2273181641Skmacy pmap, (u_long)*ptq, va); 2274181641Skmacy 2275181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2276181641Skmacy PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2277181641Skmacy oldpte = *ptq; 2278181641Skmacy PT_SET_VA_MA(ptq, 0, TRUE); 2279181641Skmacy if (oldpte & PG_W) 2280181641Skmacy pmap->pm_stats.wired_count -= 1; 2281181641Skmacy /* 2282181641Skmacy * Machines that don't support invlpg, also don't support 2283181641Skmacy * PG_G. 2284181641Skmacy */ 2285181641Skmacy if (oldpte & PG_G) 2286181641Skmacy pmap_invalidate_page(kernel_pmap, va); 2287181641Skmacy pmap->pm_stats.resident_count -= 1; 2288181641Skmacy /* 2289181641Skmacy * XXX This is not strictly correctly, but somewhere along the line 2290181641Skmacy * we are losing the managed bit on some pages. It is unclear to me 2291181641Skmacy * why, but I think the most likely explanation is that xen's writable 2292181641Skmacy * page table implementation doesn't respect the unused bits. 2293181641Skmacy */ 2294181641Skmacy if ((oldpte & PG_MANAGED) || ((oldpte & PG_V) && (va < VM_MAXUSER_ADDRESS)) 2295181641Skmacy ) { 2296181641Skmacy m = PHYS_TO_VM_PAGE(xpmap_mtop(oldpte) & PG_FRAME); 2297181641Skmacy 2298181641Skmacy if (!(oldpte & PG_MANAGED)) 2299181641Skmacy printf("va=0x%x is unmanaged :-( pte=0x%llx\n", va, oldpte); 2300181641Skmacy 2301181641Skmacy if (oldpte & PG_M) { 2302181641Skmacy KASSERT((oldpte & PG_RW), 2303181641Skmacy ("pmap_remove_pte: modified page not writable: va: %#x, pte: %#jx", 2304181641Skmacy va, (uintmax_t)oldpte)); 2305181641Skmacy vm_page_dirty(m); 2306181641Skmacy } 2307181641Skmacy if (oldpte & PG_A) 2308181641Skmacy vm_page_flag_set(m, PG_REFERENCED); 2309181641Skmacy pmap_remove_entry(pmap, m, va); 2310181641Skmacy } else if ((va < VM_MAXUSER_ADDRESS) && (oldpte & PG_V)) 2311181641Skmacy printf("va=0x%x is unmanaged :-( pte=0x%llx\n", va, oldpte); 2312181641Skmacy 2313181641Skmacy return (pmap_unuse_pt(pmap, va, free)); 2314181641Skmacy} 2315181641Skmacy 2316181641Skmacy/* 2317181641Skmacy * Remove a single page from a process address space 2318181641Skmacy */ 2319181641Skmacystatic void 2320181641Skmacypmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free) 2321181641Skmacy{ 2322181641Skmacy pt_entry_t *pte; 2323181641Skmacy 2324181641Skmacy CTR2(KTR_PMAP, "pmap_remove_page: pmap=%p va=0x%x", 2325181641Skmacy pmap, va); 2326181641Skmacy 2327181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2328181641Skmacy KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 2329181641Skmacy PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2330181641Skmacy if ((pte = pmap_pte_quick(pmap, va)) == NULL || (*pte & PG_V) == 0) 2331181641Skmacy return; 2332181641Skmacy pmap_remove_pte(pmap, pte, va, free); 2333181641Skmacy pmap_invalidate_page(pmap, va); 2334181641Skmacy if (*PMAP1) 2335181641Skmacy PT_SET_MA(PADDR1, 0); 2336181641Skmacy 2337181641Skmacy} 2338181641Skmacy 2339181641Skmacy/* 2340181641Skmacy * Remove the given range of addresses from the specified map. 2341181641Skmacy * 2342181641Skmacy * It is assumed that the start and end are properly 2343181641Skmacy * rounded to the page size. 2344181641Skmacy */ 2345181641Skmacyvoid 2346181641Skmacypmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 2347181641Skmacy{ 2348181641Skmacy vm_offset_t pdnxt; 2349181641Skmacy pd_entry_t ptpaddr; 2350181641Skmacy pt_entry_t *pte; 2351181641Skmacy vm_page_t free = NULL; 2352181641Skmacy int anyvalid; 2353181641Skmacy 2354181641Skmacy CTR3(KTR_PMAP, "pmap_remove: pmap=%p sva=0x%x eva=0x%x", 2355181641Skmacy pmap, sva, eva); 2356181641Skmacy 2357181641Skmacy /* 2358181641Skmacy * Perform an unsynchronized read. This is, however, safe. 2359181641Skmacy */ 2360181641Skmacy if (pmap->pm_stats.resident_count == 0) 2361181641Skmacy return; 2362181641Skmacy 2363181641Skmacy anyvalid = 0; 2364181641Skmacy 2365181641Skmacy vm_page_lock_queues(); 2366181641Skmacy sched_pin(); 2367181641Skmacy PMAP_LOCK(pmap); 2368181641Skmacy 2369181641Skmacy /* 2370181641Skmacy * special handling of removing one page. a very 2371181641Skmacy * common operation and easy to short circuit some 2372181641Skmacy * code. 2373181641Skmacy */ 2374181641Skmacy if ((sva + PAGE_SIZE == eva) && 2375181641Skmacy ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 2376181641Skmacy pmap_remove_page(pmap, sva, &free); 2377181641Skmacy goto out; 2378181641Skmacy } 2379181641Skmacy 2380181641Skmacy for (; sva < eva; sva = pdnxt) { 2381181641Skmacy unsigned pdirindex; 2382181641Skmacy 2383181641Skmacy /* 2384181641Skmacy * Calculate index for next page table. 2385181641Skmacy */ 2386181641Skmacy pdnxt = (sva + NBPDR) & ~PDRMASK; 2387181641Skmacy if (pmap->pm_stats.resident_count == 0) 2388181641Skmacy break; 2389181641Skmacy 2390181641Skmacy pdirindex = sva >> PDRSHIFT; 2391181641Skmacy ptpaddr = pmap->pm_pdir[pdirindex]; 2392181641Skmacy 2393181641Skmacy /* 2394181641Skmacy * Weed out invalid mappings. Note: we assume that the page 2395181641Skmacy * directory table is always allocated, and in kernel virtual. 2396181641Skmacy */ 2397181641Skmacy if (ptpaddr == 0) 2398181641Skmacy continue; 2399181641Skmacy 2400181641Skmacy /* 2401181641Skmacy * Check for large page. 2402181641Skmacy */ 2403181641Skmacy if ((ptpaddr & PG_PS) != 0) { 2404181641Skmacy PD_CLEAR_VA(pmap, pdirindex, TRUE); 2405181641Skmacy pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 2406181641Skmacy anyvalid = 1; 2407181641Skmacy continue; 2408181641Skmacy } 2409181641Skmacy 2410181641Skmacy /* 2411181641Skmacy * Limit our scan to either the end of the va represented 2412181641Skmacy * by the current page table page, or to the end of the 2413181641Skmacy * range being removed. 2414181641Skmacy */ 2415181641Skmacy if (pdnxt > eva) 2416181641Skmacy pdnxt = eva; 2417181641Skmacy 2418181641Skmacy for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2419181641Skmacy sva += PAGE_SIZE) { 2420181641Skmacy if ((*pte & PG_V) == 0) 2421181641Skmacy continue; 2422181641Skmacy 2423181641Skmacy /* 2424181641Skmacy * The TLB entry for a PG_G mapping is invalidated 2425181641Skmacy * by pmap_remove_pte(). 2426181641Skmacy */ 2427181641Skmacy if ((*pte & PG_G) == 0) 2428181641Skmacy anyvalid = 1; 2429181641Skmacy if (pmap_remove_pte(pmap, pte, sva, &free)) 2430181641Skmacy break; 2431181641Skmacy } 2432181641Skmacy } 2433181641Skmacy PT_UPDATES_FLUSH(); 2434181641Skmacy if (*PMAP1) 2435181641Skmacy PT_SET_VA_MA(PMAP1, 0, TRUE); 2436181641Skmacyout: 2437181641Skmacy if (anyvalid) 2438181641Skmacy pmap_invalidate_all(pmap); 2439181641Skmacy sched_unpin(); 2440181641Skmacy vm_page_unlock_queues(); 2441181641Skmacy PMAP_UNLOCK(pmap); 2442181641Skmacy pmap_free_zero_pages(free); 2443181641Skmacy} 2444181641Skmacy 2445181641Skmacy/* 2446181641Skmacy * Routine: pmap_remove_all 2447181641Skmacy * Function: 2448181641Skmacy * Removes this physical page from 2449181641Skmacy * all physical maps in which it resides. 2450181641Skmacy * Reflects back modify bits to the pager. 2451181641Skmacy * 2452181641Skmacy * Notes: 2453181641Skmacy * Original versions of this routine were very 2454181641Skmacy * inefficient because they iteratively called 2455181641Skmacy * pmap_remove (slow...) 2456181641Skmacy */ 2457181641Skmacy 2458181641Skmacyvoid 2459181641Skmacypmap_remove_all(vm_page_t m) 2460181641Skmacy{ 2461181641Skmacy pv_entry_t pv; 2462181641Skmacy pmap_t pmap; 2463181641Skmacy pt_entry_t *pte, tpte; 2464181641Skmacy vm_page_t free; 2465181641Skmacy 2466181641Skmacy#if defined(PMAP_DIAGNOSTIC) 2467181641Skmacy /* 2468181641Skmacy * XXX This makes pmap_remove_all() illegal for non-managed pages! 2469181641Skmacy */ 2470181641Skmacy if (m->flags & PG_FICTITIOUS) { 2471181641Skmacy panic("pmap_remove_all: illegal for unmanaged page, va: 0x%jx", 2472181641Skmacy VM_PAGE_TO_PHYS(m) & 0xffffffff); 2473181641Skmacy } 2474181641Skmacy#endif 2475181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2476181641Skmacy sched_pin(); 2477181641Skmacy while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2478181641Skmacy pmap = PV_PMAP(pv); 2479181641Skmacy PMAP_LOCK(pmap); 2480181641Skmacy pmap->pm_stats.resident_count--; 2481181641Skmacy pte = pmap_pte_quick(pmap, pv->pv_va); 2482181641Skmacy 2483181641Skmacy tpte = *pte; 2484181641Skmacy PT_SET_VA_MA(pte, 0, TRUE); 2485181641Skmacy if (tpte & PG_W) 2486181641Skmacy pmap->pm_stats.wired_count--; 2487181641Skmacy if (tpte & PG_A) 2488181641Skmacy vm_page_flag_set(m, PG_REFERENCED); 2489181641Skmacy 2490181641Skmacy /* 2491181641Skmacy * Update the vm_page_t clean and reference bits. 2492181641Skmacy */ 2493181641Skmacy if (tpte & PG_M) { 2494181641Skmacy KASSERT((tpte & PG_RW), 2495181641Skmacy ("pmap_remove_all: modified page not writable: va: %#x, pte: %#jx", 2496181641Skmacy pv->pv_va, (uintmax_t)tpte)); 2497181641Skmacy vm_page_dirty(m); 2498181641Skmacy } 2499181641Skmacy free = NULL; 2500181641Skmacy pmap_unuse_pt(pmap, pv->pv_va, &free); 2501181641Skmacy pmap_invalidate_page(pmap, pv->pv_va); 2502181641Skmacy pmap_free_zero_pages(free); 2503181641Skmacy TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2504181641Skmacy free_pv_entry(pmap, pv); 2505181641Skmacy PMAP_UNLOCK(pmap); 2506181641Skmacy } 2507181641Skmacy vm_page_flag_clear(m, PG_WRITEABLE); 2508181641Skmacy PT_UPDATES_FLUSH(); 2509181641Skmacy if (*PMAP1) 2510181641Skmacy PT_SET_MA(PADDR1, 0); 2511181641Skmacy sched_unpin(); 2512181641Skmacy} 2513181641Skmacy 2514181641Skmacy/* 2515181641Skmacy * Set the physical protection on the 2516181641Skmacy * specified range of this map as requested. 2517181641Skmacy */ 2518181641Skmacyvoid 2519181641Skmacypmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 2520181641Skmacy{ 2521181641Skmacy vm_offset_t pdnxt; 2522181641Skmacy pd_entry_t ptpaddr; 2523181641Skmacy pt_entry_t *pte; 2524181641Skmacy int anychanged; 2525181641Skmacy 2526181641Skmacy CTR4(KTR_PMAP, "pmap_protect: pmap=%p sva=0x%x eva=0x%x prot=0x%x", 2527181641Skmacy pmap, sva, eva, prot); 2528181641Skmacy 2529181641Skmacy if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 2530181641Skmacy pmap_remove(pmap, sva, eva); 2531181641Skmacy return; 2532181641Skmacy } 2533181641Skmacy 2534181641Skmacy#ifdef PAE 2535181641Skmacy if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) == 2536181641Skmacy (VM_PROT_WRITE|VM_PROT_EXECUTE)) 2537181641Skmacy return; 2538181641Skmacy#else 2539181641Skmacy if (prot & VM_PROT_WRITE) 2540181641Skmacy return; 2541181641Skmacy#endif 2542181641Skmacy 2543181641Skmacy anychanged = 0; 2544181641Skmacy 2545181641Skmacy vm_page_lock_queues(); 2546181641Skmacy sched_pin(); 2547181641Skmacy PMAP_LOCK(pmap); 2548181641Skmacy for (; sva < eva; sva = pdnxt) { 2549181641Skmacy pt_entry_t obits, pbits; 2550181641Skmacy unsigned pdirindex; 2551181641Skmacy 2552181641Skmacy pdnxt = (sva + NBPDR) & ~PDRMASK; 2553181641Skmacy 2554181641Skmacy pdirindex = sva >> PDRSHIFT; 2555181641Skmacy ptpaddr = pmap->pm_pdir[pdirindex]; 2556181641Skmacy 2557181641Skmacy /* 2558181641Skmacy * Weed out invalid mappings. Note: we assume that the page 2559181641Skmacy * directory table is always allocated, and in kernel virtual. 2560181641Skmacy */ 2561181641Skmacy if (ptpaddr == 0) 2562181641Skmacy continue; 2563181641Skmacy 2564181641Skmacy /* 2565181641Skmacy * Check for large page. 2566181641Skmacy */ 2567181641Skmacy if ((ptpaddr & PG_PS) != 0) { 2568181641Skmacy if ((prot & VM_PROT_WRITE) == 0) 2569181641Skmacy pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW); 2570181641Skmacy#ifdef PAE 2571181641Skmacy if ((prot & VM_PROT_EXECUTE) == 0) 2572181641Skmacy pmap->pm_pdir[pdirindex] |= pg_nx; 2573181641Skmacy#endif 2574181641Skmacy anychanged = 1; 2575181641Skmacy continue; 2576181641Skmacy } 2577181641Skmacy 2578181641Skmacy if (pdnxt > eva) 2579181641Skmacy pdnxt = eva; 2580181641Skmacy 2581181641Skmacy for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2582181641Skmacy sva += PAGE_SIZE) { 2583181641Skmacy vm_page_t m; 2584181641Skmacy 2585181641Skmacyretry: 2586181641Skmacy /* 2587181641Skmacy * Regardless of whether a pte is 32 or 64 bits in 2588181641Skmacy * size, PG_RW, PG_A, and PG_M are among the least 2589181641Skmacy * significant 32 bits. 2590181641Skmacy */ 2591181641Skmacy obits = pbits = *pte; 2592181641Skmacy if ((pbits & PG_V) == 0) 2593181641Skmacy continue; 2594181641Skmacy if (pbits & PG_MANAGED) { 2595181641Skmacy m = NULL; 2596181641Skmacy if (pbits & PG_A) { 2597181641Skmacy m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) & PG_FRAME); 2598181641Skmacy vm_page_flag_set(m, PG_REFERENCED); 2599181641Skmacy pbits &= ~PG_A; 2600181641Skmacy } 2601181641Skmacy if ((pbits & PG_M) != 0) { 2602181641Skmacy if (m == NULL) 2603181641Skmacy m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) & PG_FRAME); 2604181641Skmacy vm_page_dirty(m); 2605181641Skmacy } 2606181641Skmacy } 2607181641Skmacy 2608181641Skmacy if ((prot & VM_PROT_WRITE) == 0) 2609181641Skmacy pbits &= ~(PG_RW | PG_M); 2610181641Skmacy#ifdef PAE 2611181641Skmacy if ((prot & VM_PROT_EXECUTE) == 0) 2612181641Skmacy pbits |= pg_nx; 2613181641Skmacy#endif 2614181641Skmacy 2615181641Skmacy if (pbits != obits) { 2616181641Skmacy#ifdef XEN 2617181641Skmacy obits = *pte; 2618181641Skmacy PT_SET_VA_MA(pte, pbits, TRUE); 2619181641Skmacy if (*pte != pbits) 2620181641Skmacy goto retry; 2621181641Skmacy#else 2622181641Skmacy#ifdef PAE 2623181641Skmacy if (!atomic_cmpset_64(pte, obits, pbits)) 2624181641Skmacy goto retry; 2625181641Skmacy#else 2626181641Skmacy if (!atomic_cmpset_int((u_int *)pte, obits, 2627181641Skmacy pbits)) 2628181641Skmacy goto retry; 2629181641Skmacy#endif 2630181641Skmacy#endif 2631181641Skmacy if (obits & PG_G) 2632181641Skmacy pmap_invalidate_page(pmap, sva); 2633181641Skmacy else 2634181641Skmacy anychanged = 1; 2635181641Skmacy } 2636181641Skmacy } 2637181641Skmacy } 2638181641Skmacy PT_UPDATES_FLUSH(); 2639181641Skmacy if (*PMAP1) 2640181641Skmacy PT_SET_VA_MA(PMAP1, 0, TRUE); 2641181641Skmacy if (anychanged) 2642181641Skmacy pmap_invalidate_all(pmap); 2643181641Skmacy sched_unpin(); 2644181641Skmacy vm_page_unlock_queues(); 2645181641Skmacy PMAP_UNLOCK(pmap); 2646181641Skmacy} 2647181641Skmacy 2648181641Skmacy/* 2649181641Skmacy * Insert the given physical page (p) at 2650181641Skmacy * the specified virtual address (v) in the 2651181641Skmacy * target physical map with the protection requested. 2652181641Skmacy * 2653181641Skmacy * If specified, the page will be wired down, meaning 2654181641Skmacy * that the related pte can not be reclaimed. 2655181641Skmacy * 2656181641Skmacy * NB: This is the only routine which MAY NOT lazy-evaluate 2657181641Skmacy * or lose information. That is, this routine must actually 2658181641Skmacy * insert this page into the given map NOW. 2659181641Skmacy */ 2660181641Skmacyvoid 2661181641Skmacypmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m, 2662181641Skmacy vm_prot_t prot, boolean_t wired) 2663181641Skmacy{ 2664181641Skmacy vm_paddr_t pa; 2665181641Skmacy pd_entry_t *pde; 2666181641Skmacy pt_entry_t *pte; 2667181641Skmacy vm_paddr_t opa; 2668181641Skmacy pt_entry_t origpte, newpte; 2669181641Skmacy vm_page_t mpte, om; 2670181641Skmacy boolean_t invlva; 2671181641Skmacy 2672181641Skmacy CTR6(KTR_PMAP, "pmap_enter: pmap=%08p va=0x%08x access=0x%x ma=0x%08x prot=0x%x wired=%d", 2673181641Skmacy pmap, va, access, xpmap_ptom(VM_PAGE_TO_PHYS(m)), prot, wired); 2674181641Skmacy va = trunc_page(va); 2675181641Skmacy#ifdef PMAP_DIAGNOSTIC 2676181641Skmacy if (va > VM_MAX_KERNEL_ADDRESS) 2677181641Skmacy panic("pmap_enter: toobig"); 2678181641Skmacy if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS)) 2679181641Skmacy panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va); 2680181641Skmacy#endif 2681181641Skmacy 2682181641Skmacy mpte = NULL; 2683181641Skmacy 2684181641Skmacy vm_page_lock_queues(); 2685181641Skmacy PMAP_LOCK(pmap); 2686181641Skmacy sched_pin(); 2687181641Skmacy 2688181641Skmacy /* 2689181641Skmacy * In the case that a page table page is not 2690181641Skmacy * resident, we are creating it here. 2691181641Skmacy */ 2692181641Skmacy if (va < VM_MAXUSER_ADDRESS) { 2693181641Skmacy mpte = pmap_allocpte(pmap, va, M_WAITOK); 2694181641Skmacy } 2695181641Skmacy#if 0 && defined(PMAP_DIAGNOSTIC) 2696181641Skmacy else { 2697181641Skmacy pd_entry_t *pdeaddr = pmap_pde(pmap, va); 2698181641Skmacy origpte = *pdeaddr; 2699181641Skmacy if ((origpte & PG_V) == 0) { 2700181641Skmacy panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n", 2701181641Skmacy pmap->pm_pdir[PTDPTDI], origpte, va); 2702181641Skmacy } 2703181641Skmacy } 2704181641Skmacy#endif 2705181641Skmacy 2706181641Skmacy pde = pmap_pde(pmap, va); 2707181641Skmacy if ((*pde & PG_PS) != 0) 2708181641Skmacy panic("pmap_enter: attempted pmap_enter on 4MB page"); 2709181641Skmacy pte = pmap_pte_quick(pmap, va); 2710181641Skmacy 2711181641Skmacy /* 2712181641Skmacy * Page Directory table entry not valid, we need a new PT page 2713181641Skmacy */ 2714181641Skmacy if (pte == NULL) { 2715181641Skmacy panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n", 2716181641Skmacy (uintmax_t)pmap->pm_pdir[va >> PDRSHIFT], va); 2717181641Skmacy } 2718181641Skmacy 2719181641Skmacy pa = VM_PAGE_TO_PHYS(m); 2720181641Skmacy om = NULL; 2721181641Skmacy opa = origpte = 0; 2722181641Skmacy 2723181641Skmacy#if 0 2724181641Skmacy KASSERT((*pte & PG_V) || (*pte == 0), ("address set but not valid pte=%p *pte=0x%016jx", 2725181641Skmacy pte, *pte)); 2726181641Skmacy#endif 2727181641Skmacy origpte = *pte; 2728181641Skmacy if (origpte) 2729181641Skmacy origpte = xpmap_mtop(origpte); 2730181641Skmacy opa = origpte & PG_FRAME; 2731181641Skmacy 2732181641Skmacy /* 2733181641Skmacy * Mapping has not changed, must be protection or wiring change. 2734181641Skmacy */ 2735181641Skmacy if (origpte && (opa == pa)) { 2736181641Skmacy /* 2737181641Skmacy * Wiring change, just update stats. We don't worry about 2738181641Skmacy * wiring PT pages as they remain resident as long as there 2739181641Skmacy * are valid mappings in them. Hence, if a user page is wired, 2740181641Skmacy * the PT page will be also. 2741181641Skmacy */ 2742181641Skmacy if (wired && ((origpte & PG_W) == 0)) 2743181641Skmacy pmap->pm_stats.wired_count++; 2744181641Skmacy else if (!wired && (origpte & PG_W)) 2745181641Skmacy pmap->pm_stats.wired_count--; 2746181641Skmacy 2747181641Skmacy /* 2748181641Skmacy * Remove extra pte reference 2749181641Skmacy */ 2750181641Skmacy if (mpte) 2751181641Skmacy mpte->wire_count--; 2752181641Skmacy 2753181641Skmacy /* 2754181641Skmacy * We might be turning off write access to the page, 2755181641Skmacy * so we go ahead and sense modify status. 2756181641Skmacy */ 2757181641Skmacy if (origpte & PG_MANAGED) { 2758181641Skmacy om = m; 2759181641Skmacy pa |= PG_MANAGED; 2760181641Skmacy } 2761181641Skmacy goto validate; 2762181641Skmacy } 2763181641Skmacy /* 2764181641Skmacy * Mapping has changed, invalidate old range and fall through to 2765181641Skmacy * handle validating new mapping. 2766181641Skmacy */ 2767181641Skmacy if (opa) { 2768181641Skmacy if (origpte & PG_W) 2769181641Skmacy pmap->pm_stats.wired_count--; 2770181641Skmacy if (origpte & PG_MANAGED) { 2771181641Skmacy om = PHYS_TO_VM_PAGE(opa); 2772181641Skmacy pmap_remove_entry(pmap, om, va); 2773181641Skmacy } else if (va < VM_MAXUSER_ADDRESS) 2774181641Skmacy printf("va=0x%x is unmanaged :-( \n", va); 2775181641Skmacy 2776181641Skmacy if (mpte != NULL) { 2777181641Skmacy mpte->wire_count--; 2778181641Skmacy KASSERT(mpte->wire_count > 0, 2779181641Skmacy ("pmap_enter: missing reference to page table page," 2780181641Skmacy " va: 0x%x", va)); 2781181641Skmacy } 2782181641Skmacy } else 2783181641Skmacy pmap->pm_stats.resident_count++; 2784181641Skmacy 2785181641Skmacy /* 2786181641Skmacy * Enter on the PV list if part of our managed memory. 2787181641Skmacy */ 2788181641Skmacy if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 2789181641Skmacy KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva, 2790181641Skmacy ("pmap_enter: managed mapping within the clean submap")); 2791181641Skmacy pmap_insert_entry(pmap, va, m); 2792181641Skmacy pa |= PG_MANAGED; 2793181641Skmacy } 2794181641Skmacy 2795181641Skmacy /* 2796181641Skmacy * Increment counters 2797181641Skmacy */ 2798181641Skmacy if (wired) 2799181641Skmacy pmap->pm_stats.wired_count++; 2800181641Skmacy 2801181641Skmacyvalidate: 2802181641Skmacy /* 2803181641Skmacy * Now validate mapping with desired protection/wiring. 2804181641Skmacy */ 2805181641Skmacy newpte = (pt_entry_t)(pa | PG_V); 2806181641Skmacy if ((prot & VM_PROT_WRITE) != 0) { 2807181641Skmacy newpte |= PG_RW; 2808181641Skmacy vm_page_flag_set(m, PG_WRITEABLE); 2809181641Skmacy } 2810181641Skmacy#ifdef PAE 2811181641Skmacy if ((prot & VM_PROT_EXECUTE) == 0) 2812181641Skmacy newpte |= pg_nx; 2813181641Skmacy#endif 2814181641Skmacy if (wired) 2815181641Skmacy newpte |= PG_W; 2816181641Skmacy if (va < VM_MAXUSER_ADDRESS) 2817181641Skmacy newpte |= PG_U; 2818181641Skmacy if (pmap == kernel_pmap) 2819181641Skmacy newpte |= pgeflag; 2820181641Skmacy 2821181641Skmacy critical_enter(); 2822181641Skmacy /* 2823181641Skmacy * if the mapping or permission bits are different, we need 2824181641Skmacy * to update the pte. 2825181641Skmacy */ 2826181641Skmacy if ((origpte & ~(PG_M|PG_A)) != newpte) { 2827181641Skmacy if (origpte) { 2828181641Skmacy invlva = FALSE; 2829181641Skmacy origpte = *pte; 2830181641Skmacy PT_SET_VA(pte, newpte | PG_A, FALSE); 2831181641Skmacy if (origpte & PG_A) { 2832181641Skmacy if (origpte & PG_MANAGED) 2833181641Skmacy vm_page_flag_set(om, PG_REFERENCED); 2834181641Skmacy if (opa != VM_PAGE_TO_PHYS(m)) 2835181641Skmacy invlva = TRUE; 2836181641Skmacy#ifdef PAE 2837181641Skmacy if ((origpte & PG_NX) == 0 && 2838181641Skmacy (newpte & PG_NX) != 0) 2839181641Skmacy invlva = TRUE; 2840181641Skmacy#endif 2841181641Skmacy } 2842181641Skmacy if (origpte & PG_M) { 2843181641Skmacy KASSERT((origpte & PG_RW), 2844181641Skmacy ("pmap_enter: modified page not writable: va: %#x, pte: %#jx", 2845181641Skmacy va, (uintmax_t)origpte)); 2846181641Skmacy if ((origpte & PG_MANAGED) != 0) 2847181641Skmacy vm_page_dirty(om); 2848181641Skmacy if ((prot & VM_PROT_WRITE) == 0) 2849181641Skmacy invlva = TRUE; 2850181641Skmacy } 2851181641Skmacy if (invlva) 2852181641Skmacy pmap_invalidate_page(pmap, va); 2853181641Skmacy } else{ 2854181641Skmacy PT_SET_VA(pte, newpte | PG_A, FALSE); 2855181641Skmacy } 2856181641Skmacy 2857181641Skmacy } 2858181641Skmacy PT_UPDATES_FLUSH(); 2859181641Skmacy critical_exit(); 2860181641Skmacy if (*PMAP1) 2861181641Skmacy PT_SET_VA_MA(PMAP1, 0, TRUE); 2862181641Skmacy sched_unpin(); 2863181641Skmacy vm_page_unlock_queues(); 2864181641Skmacy PMAP_UNLOCK(pmap); 2865181641Skmacy} 2866181641Skmacy 2867181641Skmacy/* 2868181641Skmacy * Maps a sequence of resident pages belonging to the same object. 2869181641Skmacy * The sequence begins with the given page m_start. This page is 2870181641Skmacy * mapped at the given virtual address start. Each subsequent page is 2871181641Skmacy * mapped at a virtual address that is offset from start by the same 2872181641Skmacy * amount as the page is offset from m_start within the object. The 2873181641Skmacy * last page in the sequence is the page with the largest offset from 2874181641Skmacy * m_start that can be mapped at a virtual address less than the given 2875181641Skmacy * virtual address end. Not every virtual page between start and end 2876181641Skmacy * is mapped; only those for which a resident page exists with the 2877181641Skmacy * corresponding offset from m_start are mapped. 2878181641Skmacy */ 2879181641Skmacyvoid 2880181641Skmacypmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, 2881181641Skmacy vm_page_t m_start, vm_prot_t prot) 2882181641Skmacy{ 2883181641Skmacy vm_page_t m, mpte; 2884181641Skmacy vm_pindex_t diff, psize; 2885181641Skmacy multicall_entry_t mcl[16]; 2886181641Skmacy multicall_entry_t *mclp = mcl; 2887181641Skmacy int error, count = 0; 2888181641Skmacy 2889181641Skmacy VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED); 2890181641Skmacy psize = atop(end - start); 2891181641Skmacy 2892181641Skmacy mpte = NULL; 2893181641Skmacy m = m_start; 2894181641Skmacy PMAP_LOCK(pmap); 2895181641Skmacy while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { 2896181641Skmacy mpte = pmap_enter_quick_locked(&mclp, &count, pmap, start + ptoa(diff), m, 2897181641Skmacy prot, mpte); 2898181641Skmacy m = TAILQ_NEXT(m, listq); 2899181641Skmacy if (count == 16) { 2900181641Skmacy error = HYPERVISOR_multicall(mcl, count); 2901181641Skmacy KASSERT(error == 0, ("bad multicall %d", error)); 2902181641Skmacy mclp = mcl; 2903181641Skmacy count = 0; 2904181641Skmacy } 2905181641Skmacy } 2906181641Skmacy if (count) { 2907181641Skmacy error = HYPERVISOR_multicall(mcl, count); 2908181641Skmacy KASSERT(error == 0, ("bad multicall %d", error)); 2909181641Skmacy } 2910181641Skmacy 2911181641Skmacy PMAP_UNLOCK(pmap); 2912181641Skmacy} 2913181641Skmacy 2914181641Skmacy/* 2915181641Skmacy * this code makes some *MAJOR* assumptions: 2916181641Skmacy * 1. Current pmap & pmap exists. 2917181641Skmacy * 2. Not wired. 2918181641Skmacy * 3. Read access. 2919181641Skmacy * 4. No page table pages. 2920181641Skmacy * but is *MUCH* faster than pmap_enter... 2921181641Skmacy */ 2922181641Skmacy 2923181641Skmacyvoid 2924181641Skmacypmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 2925181641Skmacy{ 2926181641Skmacy multicall_entry_t mcl, *mclp; 2927181641Skmacy int count = 0; 2928181641Skmacy mclp = &mcl; 2929181641Skmacy 2930181641Skmacy CTR4(KTR_PMAP, "pmap_enter_quick: pmap=%p va=0x%x m=%p prot=0x%x", 2931181641Skmacy pmap, va, m, prot); 2932181641Skmacy 2933181641Skmacy PMAP_LOCK(pmap); 2934181641Skmacy (void) pmap_enter_quick_locked(&mclp, &count, pmap, va, m, prot, NULL); 2935181641Skmacy if (count) 2936181641Skmacy HYPERVISOR_multicall(&mcl, count); 2937181641Skmacy PMAP_UNLOCK(pmap); 2938181641Skmacy} 2939181641Skmacy 2940181747Skmacy#ifdef notyet 2941181641Skmacyvoid 2942181641Skmacypmap_enter_quick_range(pmap_t pmap, vm_offset_t *addrs, vm_page_t *pages, vm_prot_t *prots, int count) 2943181641Skmacy{ 2944181641Skmacy int i, error, index = 0; 2945181641Skmacy multicall_entry_t mcl[16]; 2946181641Skmacy multicall_entry_t *mclp = mcl; 2947181641Skmacy 2948181641Skmacy PMAP_LOCK(pmap); 2949181641Skmacy for (i = 0; i < count; i++, addrs++, pages++, prots++) { 2950181641Skmacy if (!pmap_is_prefaultable_locked(pmap, *addrs)) 2951181641Skmacy continue; 2952181641Skmacy 2953181641Skmacy (void) pmap_enter_quick_locked(&mclp, &index, pmap, *addrs, *pages, *prots, NULL); 2954181641Skmacy if (index == 16) { 2955181641Skmacy error = HYPERVISOR_multicall(mcl, index); 2956181641Skmacy mclp = mcl; 2957181641Skmacy index = 0; 2958181641Skmacy KASSERT(error == 0, ("bad multicall %d", error)); 2959181641Skmacy } 2960181641Skmacy } 2961181641Skmacy if (index) { 2962181641Skmacy error = HYPERVISOR_multicall(mcl, index); 2963181641Skmacy KASSERT(error == 0, ("bad multicall %d", error)); 2964181641Skmacy } 2965181641Skmacy 2966181641Skmacy PMAP_UNLOCK(pmap); 2967181641Skmacy} 2968181747Skmacy#endif 2969181641Skmacy 2970181641Skmacystatic vm_page_t 2971181641Skmacypmap_enter_quick_locked(multicall_entry_t **mclpp, int *count, pmap_t pmap, vm_offset_t va, vm_page_t m, 2972181641Skmacy vm_prot_t prot, vm_page_t mpte) 2973181641Skmacy{ 2974181641Skmacy pt_entry_t *pte; 2975181641Skmacy vm_paddr_t pa; 2976181641Skmacy vm_page_t free; 2977181641Skmacy multicall_entry_t *mcl = *mclpp; 2978181641Skmacy 2979181641Skmacy KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva || 2980181641Skmacy (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0, 2981181641Skmacy ("pmap_enter_quick_locked: managed mapping within the clean submap")); 2982181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2983181641Skmacy PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2984181641Skmacy 2985181641Skmacy /* 2986181641Skmacy * In the case that a page table page is not 2987181641Skmacy * resident, we are creating it here. 2988181641Skmacy */ 2989181641Skmacy if (va < VM_MAXUSER_ADDRESS) { 2990181641Skmacy unsigned ptepindex; 2991181641Skmacy pd_entry_t ptema; 2992181641Skmacy 2993181641Skmacy /* 2994181641Skmacy * Calculate pagetable page index 2995181641Skmacy */ 2996181641Skmacy ptepindex = va >> PDRSHIFT; 2997181641Skmacy if (mpte && (mpte->pindex == ptepindex)) { 2998181641Skmacy mpte->wire_count++; 2999181641Skmacy } else { 3000181641Skmacy /* 3001181641Skmacy * Get the page directory entry 3002181641Skmacy */ 3003181641Skmacy ptema = pmap->pm_pdir[ptepindex]; 3004181641Skmacy 3005181641Skmacy /* 3006181641Skmacy * If the page table page is mapped, we just increment 3007181641Skmacy * the hold count, and activate it. 3008181641Skmacy */ 3009181641Skmacy if (ptema & PG_V) { 3010181641Skmacy if (ptema & PG_PS) 3011181641Skmacy panic("pmap_enter_quick: unexpected mapping into 4MB page"); 3012181641Skmacy mpte = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME); 3013181641Skmacy mpte->wire_count++; 3014181641Skmacy } else { 3015181641Skmacy mpte = _pmap_allocpte(pmap, ptepindex, 3016181641Skmacy M_NOWAIT); 3017181641Skmacy if (mpte == NULL) 3018181641Skmacy return (mpte); 3019181641Skmacy } 3020181641Skmacy } 3021181641Skmacy } else { 3022181641Skmacy mpte = NULL; 3023181641Skmacy } 3024181641Skmacy 3025181641Skmacy /* 3026181641Skmacy * This call to vtopte makes the assumption that we are 3027181641Skmacy * entering the page into the current pmap. In order to support 3028181641Skmacy * quick entry into any pmap, one would likely use pmap_pte_quick. 3029181641Skmacy * But that isn't as quick as vtopte. 3030181641Skmacy */ 3031181641Skmacy KASSERT(pmap_is_current(pmap), ("entering pages in non-current pmap")); 3032181641Skmacy pte = vtopte(va); 3033181641Skmacy if (*pte & PG_V) { 3034181641Skmacy if (mpte != NULL) { 3035181641Skmacy mpte->wire_count--; 3036181641Skmacy mpte = NULL; 3037181641Skmacy } 3038181641Skmacy return (mpte); 3039181641Skmacy } 3040181641Skmacy 3041181641Skmacy /* 3042181641Skmacy * Enter on the PV list if part of our managed memory. 3043181641Skmacy */ 3044181641Skmacy if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 && 3045181641Skmacy !pmap_try_insert_pv_entry(pmap, va, m)) { 3046181641Skmacy if (mpte != NULL) { 3047181641Skmacy free = NULL; 3048181641Skmacy if (pmap_unwire_pte_hold(pmap, mpte, &free)) { 3049181641Skmacy pmap_invalidate_page(pmap, va); 3050181641Skmacy pmap_free_zero_pages(free); 3051181641Skmacy } 3052181641Skmacy 3053181641Skmacy mpte = NULL; 3054181641Skmacy } 3055181641Skmacy return (mpte); 3056181641Skmacy } 3057181641Skmacy 3058181641Skmacy /* 3059181641Skmacy * Increment counters 3060181641Skmacy */ 3061181641Skmacy pmap->pm_stats.resident_count++; 3062181641Skmacy 3063181641Skmacy pa = VM_PAGE_TO_PHYS(m); 3064181641Skmacy#ifdef PAE 3065181641Skmacy if ((prot & VM_PROT_EXECUTE) == 0) 3066181641Skmacy pa |= pg_nx; 3067181641Skmacy#endif 3068181641Skmacy 3069181641Skmacy#if 0 3070181641Skmacy /* 3071181641Skmacy * Now validate mapping with RO protection 3072181641Skmacy */ 3073181641Skmacy if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 3074181641Skmacy pte_store(pte, pa | PG_V | PG_U); 3075181641Skmacy else 3076181641Skmacy pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 3077181641Skmacy#else 3078181641Skmacy /* 3079181641Skmacy * Now validate mapping with RO protection 3080181641Skmacy */ 3081181641Skmacy if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 3082181641Skmacy pa = xpmap_ptom(pa | PG_V | PG_U); 3083181641Skmacy else 3084181641Skmacy pa = xpmap_ptom(pa | PG_V | PG_U | PG_MANAGED); 3085181641Skmacy 3086181641Skmacy mcl->op = __HYPERVISOR_update_va_mapping; 3087181641Skmacy mcl->args[0] = va; 3088181641Skmacy mcl->args[1] = (uint32_t)(pa & 0xffffffff); 3089181641Skmacy mcl->args[2] = (uint32_t)(pa >> 32); 3090181641Skmacy mcl->args[3] = 0; 3091181641Skmacy *mclpp = mcl + 1; 3092181641Skmacy *count = *count + 1; 3093181641Skmacy#endif 3094181641Skmacy return mpte; 3095181641Skmacy} 3096181641Skmacy 3097181641Skmacy/* 3098181641Skmacy * Make a temporary mapping for a physical address. This is only intended 3099181641Skmacy * to be used for panic dumps. 3100181641Skmacy */ 3101181641Skmacyvoid * 3102181641Skmacypmap_kenter_temporary(vm_paddr_t pa, int i) 3103181641Skmacy{ 3104181641Skmacy vm_offset_t va; 3105181641Skmacy 3106181641Skmacy va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 3107181641Skmacy pmap_kenter(va, pa); 3108181641Skmacy invlpg(va); 3109181641Skmacy return ((void *)crashdumpmap); 3110181641Skmacy} 3111181641Skmacy 3112181641Skmacy/* 3113181641Skmacy * This code maps large physical mmap regions into the 3114181641Skmacy * processor address space. Note that some shortcuts 3115181641Skmacy * are taken, but the code works. 3116181641Skmacy */ 3117181641Skmacyvoid 3118181641Skmacypmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 3119181641Skmacy vm_object_t object, vm_pindex_t pindex, 3120181641Skmacy vm_size_t size) 3121181641Skmacy{ 3122181641Skmacy vm_page_t p; 3123181641Skmacy 3124181641Skmacy VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 3125195840Sjhb KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG, 3126181641Skmacy ("pmap_object_init_pt: non-device object")); 3127181641Skmacy if (pseflag && 3128181641Skmacy ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) { 3129181641Skmacy int i; 3130181641Skmacy vm_page_t m[1]; 3131181641Skmacy unsigned int ptepindex; 3132181641Skmacy int npdes; 3133181641Skmacy pd_entry_t ptepa; 3134181641Skmacy 3135181641Skmacy PMAP_LOCK(pmap); 3136181641Skmacy if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)]) 3137181641Skmacy goto out; 3138181641Skmacy PMAP_UNLOCK(pmap); 3139181641Skmacyretry: 3140181641Skmacy p = vm_page_lookup(object, pindex); 3141181641Skmacy if (p != NULL) { 3142181641Skmacy if (vm_page_sleep_if_busy(p, FALSE, "init4p")) 3143181641Skmacy goto retry; 3144181641Skmacy } else { 3145181641Skmacy p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL); 3146181641Skmacy if (p == NULL) 3147181641Skmacy return; 3148181641Skmacy m[0] = p; 3149181641Skmacy 3150181641Skmacy if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) { 3151181641Skmacy vm_page_lock_queues(); 3152181641Skmacy vm_page_free(p); 3153181641Skmacy vm_page_unlock_queues(); 3154181641Skmacy return; 3155181641Skmacy } 3156181641Skmacy 3157181641Skmacy p = vm_page_lookup(object, pindex); 3158181641Skmacy vm_page_wakeup(p); 3159181641Skmacy } 3160181641Skmacy 3161181641Skmacy ptepa = VM_PAGE_TO_PHYS(p); 3162181641Skmacy if (ptepa & (NBPDR - 1)) 3163181641Skmacy return; 3164181641Skmacy 3165181641Skmacy p->valid = VM_PAGE_BITS_ALL; 3166181641Skmacy 3167181641Skmacy PMAP_LOCK(pmap); 3168181641Skmacy pmap->pm_stats.resident_count += size >> PAGE_SHIFT; 3169181641Skmacy npdes = size >> PDRSHIFT; 3170181641Skmacy critical_enter(); 3171181641Skmacy for(i = 0; i < npdes; i++) { 3172181641Skmacy PD_SET_VA(pmap, ptepindex, 3173181641Skmacy ptepa | PG_U | PG_M | PG_RW | PG_V | PG_PS, FALSE); 3174181641Skmacy ptepa += NBPDR; 3175181641Skmacy ptepindex += 1; 3176181641Skmacy } 3177181641Skmacy pmap_invalidate_all(pmap); 3178181641Skmacy critical_exit(); 3179181641Skmacyout: 3180181641Skmacy PMAP_UNLOCK(pmap); 3181181641Skmacy } 3182181641Skmacy} 3183181641Skmacy 3184181641Skmacy/* 3185181641Skmacy * Routine: pmap_change_wiring 3186181641Skmacy * Function: Change the wiring attribute for a map/virtual-address 3187181641Skmacy * pair. 3188181641Skmacy * In/out conditions: 3189181641Skmacy * The mapping must already exist in the pmap. 3190181641Skmacy */ 3191181641Skmacyvoid 3192181641Skmacypmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired) 3193181641Skmacy{ 3194181641Skmacy pt_entry_t *pte; 3195181641Skmacy 3196181641Skmacy vm_page_lock_queues(); 3197181641Skmacy PMAP_LOCK(pmap); 3198181641Skmacy pte = pmap_pte(pmap, va); 3199181641Skmacy 3200181641Skmacy if (wired && !pmap_pte_w(pte)) { 3201181641Skmacy PT_SET_VA_MA((pte), *(pte) | PG_W, TRUE); 3202181641Skmacy pmap->pm_stats.wired_count++; 3203181641Skmacy } else if (!wired && pmap_pte_w(pte)) { 3204181641Skmacy PT_SET_VA_MA((pte), *(pte) & ~PG_W, TRUE); 3205181641Skmacy pmap->pm_stats.wired_count--; 3206181641Skmacy } 3207181641Skmacy 3208181641Skmacy /* 3209181641Skmacy * Wiring is not a hardware characteristic so there is no need to 3210181641Skmacy * invalidate TLB. 3211181641Skmacy */ 3212181641Skmacy pmap_pte_release(pte); 3213181641Skmacy PMAP_UNLOCK(pmap); 3214181641Skmacy vm_page_unlock_queues(); 3215181641Skmacy} 3216181641Skmacy 3217181641Skmacy 3218181641Skmacy 3219181641Skmacy/* 3220181641Skmacy * Copy the range specified by src_addr/len 3221181641Skmacy * from the source map to the range dst_addr/len 3222181641Skmacy * in the destination map. 3223181641Skmacy * 3224181641Skmacy * This routine is only advisory and need not do anything. 3225181641Skmacy */ 3226181641Skmacy 3227181641Skmacyvoid 3228181641Skmacypmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 3229181641Skmacy vm_offset_t src_addr) 3230181641Skmacy{ 3231181641Skmacy vm_page_t free; 3232181641Skmacy vm_offset_t addr; 3233181641Skmacy vm_offset_t end_addr = src_addr + len; 3234181641Skmacy vm_offset_t pdnxt; 3235181641Skmacy 3236181641Skmacy if (dst_addr != src_addr) 3237181641Skmacy return; 3238181641Skmacy 3239181641Skmacy if (!pmap_is_current(src_pmap)) { 3240181641Skmacy CTR2(KTR_PMAP, 3241181641Skmacy "pmap_copy, skipping: pdir[PTDPTDI]=0x%jx PTDpde[0]=0x%jx", 3242181641Skmacy (src_pmap->pm_pdir[PTDPTDI] & PG_FRAME), (PTDpde[0] & PG_FRAME)); 3243181641Skmacy 3244181641Skmacy return; 3245181641Skmacy } 3246181641Skmacy CTR5(KTR_PMAP, "pmap_copy: dst_pmap=%p src_pmap=%p dst_addr=0x%x len=%d src_addr=0x%x", 3247181641Skmacy dst_pmap, src_pmap, dst_addr, len, src_addr); 3248181641Skmacy 3249181641Skmacy vm_page_lock_queues(); 3250181641Skmacy if (dst_pmap < src_pmap) { 3251181641Skmacy PMAP_LOCK(dst_pmap); 3252181641Skmacy PMAP_LOCK(src_pmap); 3253181641Skmacy } else { 3254181641Skmacy PMAP_LOCK(src_pmap); 3255181641Skmacy PMAP_LOCK(dst_pmap); 3256181641Skmacy } 3257181641Skmacy sched_pin(); 3258181641Skmacy for (addr = src_addr; addr < end_addr; addr = pdnxt) { 3259181641Skmacy pt_entry_t *src_pte, *dst_pte; 3260181641Skmacy vm_page_t dstmpte, srcmpte; 3261181641Skmacy pd_entry_t srcptepaddr; 3262181641Skmacy unsigned ptepindex; 3263181641Skmacy 3264181641Skmacy if (addr >= UPT_MIN_ADDRESS) 3265181641Skmacy panic("pmap_copy: invalid to pmap_copy page tables"); 3266181641Skmacy 3267181641Skmacy pdnxt = (addr + NBPDR) & ~PDRMASK; 3268181641Skmacy ptepindex = addr >> PDRSHIFT; 3269181641Skmacy 3270181641Skmacy srcptepaddr = PT_GET(&src_pmap->pm_pdir[ptepindex]); 3271181641Skmacy if (srcptepaddr == 0) 3272181641Skmacy continue; 3273181641Skmacy 3274181641Skmacy if (srcptepaddr & PG_PS) { 3275181641Skmacy if (dst_pmap->pm_pdir[ptepindex] == 0) { 3276181641Skmacy PD_SET_VA(dst_pmap, ptepindex, srcptepaddr & ~PG_W, TRUE); 3277181641Skmacy dst_pmap->pm_stats.resident_count += 3278181641Skmacy NBPDR / PAGE_SIZE; 3279181641Skmacy } 3280181641Skmacy continue; 3281181641Skmacy } 3282181641Skmacy 3283181641Skmacy srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME); 3284181641Skmacy if (srcmpte->wire_count == 0) 3285181641Skmacy panic("pmap_copy: source page table page is unused"); 3286181641Skmacy 3287181641Skmacy if (pdnxt > end_addr) 3288181641Skmacy pdnxt = end_addr; 3289181641Skmacy 3290181641Skmacy src_pte = vtopte(addr); 3291181641Skmacy while (addr < pdnxt) { 3292181641Skmacy pt_entry_t ptetemp; 3293181641Skmacy ptetemp = *src_pte; 3294181641Skmacy /* 3295181641Skmacy * we only virtual copy managed pages 3296181641Skmacy */ 3297181641Skmacy if ((ptetemp & PG_MANAGED) != 0) { 3298181641Skmacy dstmpte = pmap_allocpte(dst_pmap, addr, 3299181641Skmacy M_NOWAIT); 3300181641Skmacy if (dstmpte == NULL) 3301181641Skmacy break; 3302181641Skmacy dst_pte = pmap_pte_quick(dst_pmap, addr); 3303181641Skmacy if (*dst_pte == 0 && 3304181641Skmacy pmap_try_insert_pv_entry(dst_pmap, addr, 3305181641Skmacy PHYS_TO_VM_PAGE(xpmap_mtop(ptetemp) & PG_FRAME))) { 3306181641Skmacy /* 3307181641Skmacy * Clear the wired, modified, and 3308181641Skmacy * accessed (referenced) bits 3309181641Skmacy * during the copy. 3310181641Skmacy */ 3311181641Skmacy KASSERT(ptetemp != 0, ("src_pte not set")); 3312181641Skmacy PT_SET_VA_MA(dst_pte, ptetemp & ~(PG_W | PG_M | PG_A), TRUE /* XXX debug */); 3313181641Skmacy KASSERT(*dst_pte == (ptetemp & ~(PG_W | PG_M | PG_A)), 3314181641Skmacy ("no pmap copy expected: 0x%jx saw: 0x%jx", 3315181641Skmacy ptetemp & ~(PG_W | PG_M | PG_A), *dst_pte)); 3316181641Skmacy dst_pmap->pm_stats.resident_count++; 3317181641Skmacy } else { 3318181641Skmacy free = NULL; 3319181641Skmacy if (pmap_unwire_pte_hold(dst_pmap, 3320181641Skmacy dstmpte, &free)) { 3321181641Skmacy pmap_invalidate_page(dst_pmap, 3322181641Skmacy addr); 3323181641Skmacy pmap_free_zero_pages(free); 3324181641Skmacy } 3325181641Skmacy } 3326181641Skmacy if (dstmpte->wire_count >= srcmpte->wire_count) 3327181641Skmacy break; 3328181641Skmacy } 3329181641Skmacy addr += PAGE_SIZE; 3330181641Skmacy src_pte++; 3331181641Skmacy } 3332181641Skmacy } 3333181641Skmacy PT_UPDATES_FLUSH(); 3334181641Skmacy sched_unpin(); 3335181641Skmacy vm_page_unlock_queues(); 3336181641Skmacy PMAP_UNLOCK(src_pmap); 3337181641Skmacy PMAP_UNLOCK(dst_pmap); 3338181641Skmacy} 3339181641Skmacy 3340196723Sadrianstatic __inline void 3341196723Sadrianpagezero(void *page) 3342196723Sadrian{ 3343196723Sadrian#if defined(I686_CPU) 3344196723Sadrian if (cpu_class == CPUCLASS_686) { 3345196723Sadrian#if defined(CPU_ENABLE_SSE) 3346196723Sadrian if (cpu_feature & CPUID_SSE2) 3347196723Sadrian sse2_pagezero(page); 3348196723Sadrian else 3349196723Sadrian#endif 3350196723Sadrian i686_pagezero(page); 3351196723Sadrian } else 3352196723Sadrian#endif 3353196723Sadrian bzero(page, PAGE_SIZE); 3354196723Sadrian} 3355196723Sadrian 3356181641Skmacy/* 3357181641Skmacy * pmap_zero_page zeros the specified hardware page by mapping 3358181641Skmacy * the page into KVM and using bzero to clear its contents. 3359181641Skmacy */ 3360181641Skmacyvoid 3361181641Skmacypmap_zero_page(vm_page_t m) 3362181641Skmacy{ 3363181641Skmacy struct sysmaps *sysmaps; 3364181641Skmacy 3365181641Skmacy sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3366181641Skmacy mtx_lock(&sysmaps->lock); 3367181641Skmacy if (*sysmaps->CMAP2) 3368181641Skmacy panic("pmap_zero_page: CMAP2 busy"); 3369181641Skmacy sched_pin(); 3370181641Skmacy PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3371181641Skmacy pagezero(sysmaps->CADDR2); 3372181641Skmacy PT_SET_MA(sysmaps->CADDR2, 0); 3373181641Skmacy sched_unpin(); 3374181641Skmacy mtx_unlock(&sysmaps->lock); 3375181641Skmacy} 3376181641Skmacy 3377181641Skmacy/* 3378181641Skmacy * pmap_zero_page_area zeros the specified hardware page by mapping 3379181641Skmacy * the page into KVM and using bzero to clear its contents. 3380181641Skmacy * 3381181641Skmacy * off and size may not cover an area beyond a single hardware page. 3382181641Skmacy */ 3383181641Skmacyvoid 3384181641Skmacypmap_zero_page_area(vm_page_t m, int off, int size) 3385181641Skmacy{ 3386181641Skmacy struct sysmaps *sysmaps; 3387181641Skmacy 3388181641Skmacy sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3389181641Skmacy mtx_lock(&sysmaps->lock); 3390181641Skmacy if (*sysmaps->CMAP2) 3391181641Skmacy panic("pmap_zero_page: CMAP2 busy"); 3392181641Skmacy sched_pin(); 3393181641Skmacy PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3394181641Skmacy 3395181641Skmacy if (off == 0 && size == PAGE_SIZE) 3396181641Skmacy pagezero(sysmaps->CADDR2); 3397181641Skmacy else 3398181641Skmacy bzero((char *)sysmaps->CADDR2 + off, size); 3399181641Skmacy PT_SET_MA(sysmaps->CADDR2, 0); 3400181641Skmacy sched_unpin(); 3401181641Skmacy mtx_unlock(&sysmaps->lock); 3402181641Skmacy} 3403181641Skmacy 3404181641Skmacy/* 3405181641Skmacy * pmap_zero_page_idle zeros the specified hardware page by mapping 3406181641Skmacy * the page into KVM and using bzero to clear its contents. This 3407181641Skmacy * is intended to be called from the vm_pagezero process only and 3408181641Skmacy * outside of Giant. 3409181641Skmacy */ 3410181641Skmacyvoid 3411181641Skmacypmap_zero_page_idle(vm_page_t m) 3412181641Skmacy{ 3413181641Skmacy 3414181641Skmacy if (*CMAP3) 3415181641Skmacy panic("pmap_zero_page: CMAP3 busy"); 3416181641Skmacy sched_pin(); 3417181641Skmacy PT_SET_MA(CADDR3, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3418181641Skmacy pagezero(CADDR3); 3419181641Skmacy PT_SET_MA(CADDR3, 0); 3420181641Skmacy sched_unpin(); 3421181641Skmacy} 3422181641Skmacy 3423181641Skmacy/* 3424181641Skmacy * pmap_copy_page copies the specified (machine independent) 3425181641Skmacy * page by mapping the page into virtual memory and using 3426181641Skmacy * bcopy to copy the page, one machine dependent page at a 3427181641Skmacy * time. 3428181641Skmacy */ 3429181641Skmacyvoid 3430181641Skmacypmap_copy_page(vm_page_t src, vm_page_t dst) 3431181641Skmacy{ 3432181641Skmacy struct sysmaps *sysmaps; 3433181641Skmacy 3434181641Skmacy sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3435181641Skmacy mtx_lock(&sysmaps->lock); 3436181641Skmacy if (*sysmaps->CMAP1) 3437181641Skmacy panic("pmap_copy_page: CMAP1 busy"); 3438181641Skmacy if (*sysmaps->CMAP2) 3439181641Skmacy panic("pmap_copy_page: CMAP2 busy"); 3440181641Skmacy sched_pin(); 3441181641Skmacy PT_SET_MA(sysmaps->CADDR1, PG_V | xpmap_ptom(VM_PAGE_TO_PHYS(src)) | PG_A); 3442181641Skmacy PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(dst)) | PG_A | PG_M); 3443181641Skmacy bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); 3444181641Skmacy PT_SET_MA(sysmaps->CADDR1, 0); 3445181641Skmacy PT_SET_MA(sysmaps->CADDR2, 0); 3446181641Skmacy sched_unpin(); 3447181641Skmacy mtx_unlock(&sysmaps->lock); 3448181641Skmacy} 3449181641Skmacy 3450181641Skmacy/* 3451181641Skmacy * Returns true if the pmap's pv is one of the first 3452181641Skmacy * 16 pvs linked to from this page. This count may 3453181641Skmacy * be changed upwards or downwards in the future; it 3454181641Skmacy * is only necessary that true be returned for a small 3455181641Skmacy * subset of pmaps for proper page aging. 3456181641Skmacy */ 3457181641Skmacyboolean_t 3458181641Skmacypmap_page_exists_quick(pmap_t pmap, vm_page_t m) 3459181641Skmacy{ 3460181641Skmacy pv_entry_t pv; 3461181641Skmacy int loops = 0; 3462181641Skmacy 3463181641Skmacy if (m->flags & PG_FICTITIOUS) 3464181641Skmacy return (FALSE); 3465181641Skmacy 3466181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3467181641Skmacy TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3468181641Skmacy if (PV_PMAP(pv) == pmap) { 3469181641Skmacy return TRUE; 3470181641Skmacy } 3471181641Skmacy loops++; 3472181641Skmacy if (loops >= 16) 3473181641Skmacy break; 3474181641Skmacy } 3475181641Skmacy return (FALSE); 3476181641Skmacy} 3477181641Skmacy 3478181641Skmacy/* 3479181641Skmacy * pmap_page_wired_mappings: 3480181641Skmacy * 3481181641Skmacy * Return the number of managed mappings to the given physical page 3482181641Skmacy * that are wired. 3483181641Skmacy */ 3484181641Skmacyint 3485181641Skmacypmap_page_wired_mappings(vm_page_t m) 3486181641Skmacy{ 3487181641Skmacy pv_entry_t pv; 3488181641Skmacy pt_entry_t *pte; 3489181641Skmacy pmap_t pmap; 3490181641Skmacy int count; 3491181641Skmacy 3492181641Skmacy count = 0; 3493181641Skmacy if ((m->flags & PG_FICTITIOUS) != 0) 3494181641Skmacy return (count); 3495181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3496181641Skmacy sched_pin(); 3497181641Skmacy TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3498181641Skmacy pmap = PV_PMAP(pv); 3499181641Skmacy PMAP_LOCK(pmap); 3500181641Skmacy pte = pmap_pte_quick(pmap, pv->pv_va); 3501181641Skmacy if ((*pte & PG_W) != 0) 3502181641Skmacy count++; 3503181641Skmacy PMAP_UNLOCK(pmap); 3504181641Skmacy } 3505181641Skmacy sched_unpin(); 3506181641Skmacy return (count); 3507181641Skmacy} 3508181641Skmacy 3509181641Skmacy/* 3510181747Skmacy * Returns TRUE if the given page is mapped individually or as part of 3511181747Skmacy * a 4mpage. Otherwise, returns FALSE. 3512181747Skmacy */ 3513181747Skmacyboolean_t 3514181747Skmacypmap_page_is_mapped(vm_page_t m) 3515181747Skmacy{ 3516181747Skmacy struct md_page *pvh; 3517181747Skmacy 3518181747Skmacy if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 3519181747Skmacy return (FALSE); 3520181747Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3521181747Skmacy if (TAILQ_EMPTY(&m->md.pv_list)) { 3522181747Skmacy pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 3523181747Skmacy return (!TAILQ_EMPTY(&pvh->pv_list)); 3524181747Skmacy } else 3525181747Skmacy return (TRUE); 3526181747Skmacy} 3527181747Skmacy 3528181747Skmacy/* 3529181641Skmacy * Remove all pages from specified address space 3530181641Skmacy * this aids process exit speeds. Also, this code 3531181641Skmacy * is special cased for current process only, but 3532181641Skmacy * can have the more generic (and slightly slower) 3533181641Skmacy * mode enabled. This is much faster than pmap_remove 3534181641Skmacy * in the case of running down an entire address space. 3535181641Skmacy */ 3536181641Skmacyvoid 3537181641Skmacypmap_remove_pages(pmap_t pmap) 3538181641Skmacy{ 3539181641Skmacy pt_entry_t *pte, tpte; 3540181641Skmacy vm_page_t m, free = NULL; 3541181641Skmacy pv_entry_t pv; 3542181641Skmacy struct pv_chunk *pc, *npc; 3543181641Skmacy int field, idx; 3544181641Skmacy int32_t bit; 3545181641Skmacy uint32_t inuse, bitmask; 3546181641Skmacy int allfree; 3547181641Skmacy 3548181641Skmacy CTR1(KTR_PMAP, "pmap_remove_pages: pmap=%p", pmap); 3549181641Skmacy 3550181641Skmacy if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { 3551181641Skmacy printf("warning: pmap_remove_pages called with non-current pmap\n"); 3552181641Skmacy return; 3553181641Skmacy } 3554181641Skmacy vm_page_lock_queues(); 3555181641Skmacy KASSERT(pmap_is_current(pmap), ("removing pages from non-current pmap")); 3556181641Skmacy PMAP_LOCK(pmap); 3557181641Skmacy sched_pin(); 3558181641Skmacy TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) { 3559181641Skmacy allfree = 1; 3560181641Skmacy for (field = 0; field < _NPCM; field++) { 3561181641Skmacy inuse = (~(pc->pc_map[field])) & pc_freemask[field]; 3562181641Skmacy while (inuse != 0) { 3563181641Skmacy bit = bsfl(inuse); 3564181641Skmacy bitmask = 1UL << bit; 3565181641Skmacy idx = field * 32 + bit; 3566181641Skmacy pv = &pc->pc_pventry[idx]; 3567181641Skmacy inuse &= ~bitmask; 3568181641Skmacy 3569181641Skmacy pte = vtopte(pv->pv_va); 3570181641Skmacy tpte = *pte ? xpmap_mtop(*pte) : 0; 3571181641Skmacy 3572181641Skmacy if (tpte == 0) { 3573181641Skmacy printf( 3574181641Skmacy "TPTE at %p IS ZERO @ VA %08x\n", 3575181641Skmacy pte, pv->pv_va); 3576181641Skmacy panic("bad pte"); 3577181641Skmacy } 3578181641Skmacy 3579181641Skmacy/* 3580181641Skmacy * We cannot remove wired pages from a process' mapping at this time 3581181641Skmacy */ 3582181641Skmacy if (tpte & PG_W) { 3583181641Skmacy allfree = 0; 3584181641Skmacy continue; 3585181641Skmacy } 3586181641Skmacy 3587181641Skmacy m = PHYS_TO_VM_PAGE(tpte & PG_FRAME); 3588181641Skmacy KASSERT(m->phys_addr == (tpte & PG_FRAME), 3589181641Skmacy ("vm_page_t %p phys_addr mismatch %016jx %016jx", 3590181641Skmacy m, (uintmax_t)m->phys_addr, 3591181641Skmacy (uintmax_t)tpte)); 3592181641Skmacy 3593181641Skmacy KASSERT(m < &vm_page_array[vm_page_array_size], 3594181641Skmacy ("pmap_remove_pages: bad tpte %#jx", 3595181641Skmacy (uintmax_t)tpte)); 3596181641Skmacy 3597181641Skmacy 3598181641Skmacy PT_CLEAR_VA(pte, FALSE); 3599181641Skmacy 3600181641Skmacy /* 3601181641Skmacy * Update the vm_page_t clean/reference bits. 3602181641Skmacy */ 3603181641Skmacy if (tpte & PG_M) 3604181641Skmacy vm_page_dirty(m); 3605181641Skmacy 3606181641Skmacy TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3607181641Skmacy if (TAILQ_EMPTY(&m->md.pv_list)) 3608181641Skmacy vm_page_flag_clear(m, PG_WRITEABLE); 3609181641Skmacy 3610181641Skmacy pmap_unuse_pt(pmap, pv->pv_va, &free); 3611181641Skmacy 3612181641Skmacy /* Mark free */ 3613181641Skmacy PV_STAT(pv_entry_frees++); 3614181641Skmacy PV_STAT(pv_entry_spare++); 3615181641Skmacy pv_entry_count--; 3616181641Skmacy pc->pc_map[field] |= bitmask; 3617181641Skmacy pmap->pm_stats.resident_count--; 3618181641Skmacy } 3619181641Skmacy } 3620181641Skmacy PT_UPDATES_FLUSH(); 3621181641Skmacy if (allfree) { 3622181641Skmacy PV_STAT(pv_entry_spare -= _NPCPV); 3623181641Skmacy PV_STAT(pc_chunk_count--); 3624181641Skmacy PV_STAT(pc_chunk_frees++); 3625181641Skmacy TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 3626181641Skmacy m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 3627181641Skmacy pmap_qremove((vm_offset_t)pc, 1); 3628181641Skmacy vm_page_unwire(m, 0); 3629181641Skmacy vm_page_free(m); 3630181641Skmacy pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 3631181641Skmacy } 3632181641Skmacy } 3633181641Skmacy PT_UPDATES_FLUSH(); 3634181641Skmacy if (*PMAP1) 3635181641Skmacy PT_SET_MA(PADDR1, 0); 3636181641Skmacy 3637181641Skmacy sched_unpin(); 3638181641Skmacy pmap_invalidate_all(pmap); 3639181641Skmacy vm_page_unlock_queues(); 3640181641Skmacy PMAP_UNLOCK(pmap); 3641181641Skmacy pmap_free_zero_pages(free); 3642181641Skmacy} 3643181641Skmacy 3644181641Skmacy/* 3645181641Skmacy * pmap_is_modified: 3646181641Skmacy * 3647181641Skmacy * Return whether or not the specified physical page was modified 3648181641Skmacy * in any physical maps. 3649181641Skmacy */ 3650181641Skmacyboolean_t 3651181641Skmacypmap_is_modified(vm_page_t m) 3652181641Skmacy{ 3653181641Skmacy pv_entry_t pv; 3654181641Skmacy pt_entry_t *pte; 3655181641Skmacy pmap_t pmap; 3656181641Skmacy boolean_t rv; 3657181641Skmacy 3658181641Skmacy rv = FALSE; 3659181641Skmacy if (m->flags & PG_FICTITIOUS) 3660181641Skmacy return (rv); 3661181641Skmacy 3662181641Skmacy sched_pin(); 3663181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3664181641Skmacy TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3665181641Skmacy pmap = PV_PMAP(pv); 3666181641Skmacy PMAP_LOCK(pmap); 3667181641Skmacy pte = pmap_pte_quick(pmap, pv->pv_va); 3668181641Skmacy rv = (*pte & PG_M) != 0; 3669181641Skmacy PMAP_UNLOCK(pmap); 3670181641Skmacy if (rv) 3671181641Skmacy break; 3672181641Skmacy } 3673181641Skmacy if (*PMAP1) 3674181641Skmacy PT_SET_MA(PADDR1, 0); 3675181641Skmacy sched_unpin(); 3676181641Skmacy return (rv); 3677181641Skmacy} 3678181641Skmacy 3679181641Skmacy/* 3680181641Skmacy * pmap_is_prefaultable: 3681181641Skmacy * 3682181641Skmacy * Return whether or not the specified virtual address is elgible 3683181641Skmacy * for prefault. 3684181641Skmacy */ 3685181641Skmacystatic boolean_t 3686181641Skmacypmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr) 3687181641Skmacy{ 3688181641Skmacy pt_entry_t *pte; 3689181641Skmacy boolean_t rv = FALSE; 3690181641Skmacy 3691181641Skmacy return (rv); 3692181641Skmacy 3693181641Skmacy if (pmap_is_current(pmap) && *pmap_pde(pmap, addr)) { 3694181641Skmacy pte = vtopte(addr); 3695181641Skmacy rv = (*pte == 0); 3696181641Skmacy } 3697181641Skmacy return (rv); 3698181641Skmacy} 3699181641Skmacy 3700181641Skmacyboolean_t 3701181641Skmacypmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 3702181641Skmacy{ 3703181641Skmacy boolean_t rv; 3704181641Skmacy 3705181641Skmacy PMAP_LOCK(pmap); 3706181641Skmacy rv = pmap_is_prefaultable_locked(pmap, addr); 3707181641Skmacy PMAP_UNLOCK(pmap); 3708181641Skmacy return (rv); 3709181641Skmacy} 3710181641Skmacy 3711181641Skmacyvoid 3712181641Skmacypmap_map_readonly(pmap_t pmap, vm_offset_t va, int len) 3713181641Skmacy{ 3714181641Skmacy int i, npages = round_page(len) >> PAGE_SHIFT; 3715181641Skmacy for (i = 0; i < npages; i++) { 3716181641Skmacy pt_entry_t *pte; 3717181641Skmacy pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE)); 3718181641Skmacy pte_store(pte, xpmap_mtop(*pte & ~(PG_RW|PG_M))); 3719181641Skmacy PMAP_MARK_PRIV(xpmap_mtop(*pte)); 3720181641Skmacy pmap_pte_release(pte); 3721181641Skmacy } 3722181641Skmacy} 3723181641Skmacy 3724181641Skmacyvoid 3725181641Skmacypmap_map_readwrite(pmap_t pmap, vm_offset_t va, int len) 3726181641Skmacy{ 3727181641Skmacy int i, npages = round_page(len) >> PAGE_SHIFT; 3728181641Skmacy for (i = 0; i < npages; i++) { 3729181641Skmacy pt_entry_t *pte; 3730181641Skmacy pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE)); 3731181641Skmacy PMAP_MARK_UNPRIV(xpmap_mtop(*pte)); 3732181641Skmacy pte_store(pte, xpmap_mtop(*pte) | (PG_RW|PG_M)); 3733181641Skmacy pmap_pte_release(pte); 3734181641Skmacy } 3735181641Skmacy} 3736181641Skmacy 3737181641Skmacy/* 3738181641Skmacy * Clear the write and modified bits in each of the given page's mappings. 3739181641Skmacy */ 3740181641Skmacyvoid 3741181641Skmacypmap_remove_write(vm_page_t m) 3742181641Skmacy{ 3743181641Skmacy pv_entry_t pv; 3744181641Skmacy pmap_t pmap; 3745181641Skmacy pt_entry_t oldpte, *pte; 3746181641Skmacy 3747181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3748181641Skmacy if ((m->flags & PG_FICTITIOUS) != 0 || 3749181641Skmacy (m->flags & PG_WRITEABLE) == 0) 3750181641Skmacy return; 3751181641Skmacy sched_pin(); 3752181641Skmacy TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3753181641Skmacy pmap = PV_PMAP(pv); 3754181641Skmacy PMAP_LOCK(pmap); 3755181641Skmacy pte = pmap_pte_quick(pmap, pv->pv_va); 3756181641Skmacyretry: 3757181641Skmacy oldpte = *pte; 3758181641Skmacy if ((oldpte & PG_RW) != 0) { 3759188341Skmacy vm_paddr_t newpte = oldpte & ~(PG_RW | PG_M); 3760188341Skmacy 3761181641Skmacy /* 3762181641Skmacy * Regardless of whether a pte is 32 or 64 bits 3763181641Skmacy * in size, PG_RW and PG_M are among the least 3764181641Skmacy * significant 32 bits. 3765181641Skmacy */ 3766188341Skmacy PT_SET_VA_MA(pte, newpte, TRUE); 3767188341Skmacy if (*pte != newpte) 3768181641Skmacy goto retry; 3769188341Skmacy 3770181641Skmacy if ((oldpte & PG_M) != 0) 3771181641Skmacy vm_page_dirty(m); 3772181641Skmacy pmap_invalidate_page(pmap, pv->pv_va); 3773181641Skmacy } 3774181641Skmacy PMAP_UNLOCK(pmap); 3775181641Skmacy } 3776181641Skmacy vm_page_flag_clear(m, PG_WRITEABLE); 3777181641Skmacy PT_UPDATES_FLUSH(); 3778181641Skmacy if (*PMAP1) 3779181641Skmacy PT_SET_MA(PADDR1, 0); 3780181641Skmacy sched_unpin(); 3781181641Skmacy} 3782181641Skmacy 3783181641Skmacy/* 3784181641Skmacy * pmap_ts_referenced: 3785181641Skmacy * 3786181641Skmacy * Return a count of reference bits for a page, clearing those bits. 3787181641Skmacy * It is not necessary for every reference bit to be cleared, but it 3788181641Skmacy * is necessary that 0 only be returned when there are truly no 3789181641Skmacy * reference bits set. 3790181641Skmacy * 3791181641Skmacy * XXX: The exact number of bits to check and clear is a matter that 3792181641Skmacy * should be tested and standardized at some point in the future for 3793181641Skmacy * optimal aging of shared pages. 3794181641Skmacy */ 3795181641Skmacyint 3796181641Skmacypmap_ts_referenced(vm_page_t m) 3797181641Skmacy{ 3798181641Skmacy pv_entry_t pv, pvf, pvn; 3799181641Skmacy pmap_t pmap; 3800181641Skmacy pt_entry_t *pte; 3801181641Skmacy int rtval = 0; 3802181641Skmacy 3803181641Skmacy if (m->flags & PG_FICTITIOUS) 3804181641Skmacy return (rtval); 3805181641Skmacy sched_pin(); 3806181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3807181641Skmacy if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 3808181641Skmacy pvf = pv; 3809181641Skmacy do { 3810181641Skmacy pvn = TAILQ_NEXT(pv, pv_list); 3811181641Skmacy TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3812181641Skmacy TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 3813181641Skmacy pmap = PV_PMAP(pv); 3814181641Skmacy PMAP_LOCK(pmap); 3815181641Skmacy pte = pmap_pte_quick(pmap, pv->pv_va); 3816181641Skmacy if ((*pte & PG_A) != 0) { 3817181641Skmacy PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE); 3818181641Skmacy pmap_invalidate_page(pmap, pv->pv_va); 3819181641Skmacy rtval++; 3820181641Skmacy if (rtval > 4) 3821181641Skmacy pvn = NULL; 3822181641Skmacy } 3823181641Skmacy PMAP_UNLOCK(pmap); 3824181641Skmacy } while ((pv = pvn) != NULL && pv != pvf); 3825181641Skmacy } 3826181641Skmacy PT_UPDATES_FLUSH(); 3827181641Skmacy if (*PMAP1) 3828181641Skmacy PT_SET_MA(PADDR1, 0); 3829181641Skmacy 3830181641Skmacy sched_unpin(); 3831181641Skmacy return (rtval); 3832181641Skmacy} 3833181641Skmacy 3834181641Skmacy/* 3835181641Skmacy * Clear the modify bits on the specified physical page. 3836181641Skmacy */ 3837181641Skmacyvoid 3838181641Skmacypmap_clear_modify(vm_page_t m) 3839181641Skmacy{ 3840181641Skmacy pv_entry_t pv; 3841181641Skmacy pmap_t pmap; 3842181641Skmacy pt_entry_t *pte; 3843181641Skmacy 3844181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3845181641Skmacy if ((m->flags & PG_FICTITIOUS) != 0) 3846181641Skmacy return; 3847181641Skmacy sched_pin(); 3848181641Skmacy TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3849181641Skmacy pmap = PV_PMAP(pv); 3850181641Skmacy PMAP_LOCK(pmap); 3851181641Skmacy pte = pmap_pte_quick(pmap, pv->pv_va); 3852181641Skmacy if ((*pte & PG_M) != 0) { 3853181641Skmacy /* 3854181641Skmacy * Regardless of whether a pte is 32 or 64 bits 3855181641Skmacy * in size, PG_M is among the least significant 3856181641Skmacy * 32 bits. 3857181641Skmacy */ 3858181641Skmacy PT_SET_VA_MA(pte, *pte & ~PG_M, FALSE); 3859181641Skmacy pmap_invalidate_page(pmap, pv->pv_va); 3860181641Skmacy } 3861181641Skmacy PMAP_UNLOCK(pmap); 3862181641Skmacy } 3863181641Skmacy sched_unpin(); 3864181641Skmacy} 3865181641Skmacy 3866181641Skmacy/* 3867181641Skmacy * pmap_clear_reference: 3868181641Skmacy * 3869181641Skmacy * Clear the reference bit on the specified physical page. 3870181641Skmacy */ 3871181641Skmacyvoid 3872181641Skmacypmap_clear_reference(vm_page_t m) 3873181641Skmacy{ 3874181641Skmacy pv_entry_t pv; 3875181641Skmacy pmap_t pmap; 3876181641Skmacy pt_entry_t *pte; 3877181641Skmacy 3878181641Skmacy mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3879181641Skmacy if ((m->flags & PG_FICTITIOUS) != 0) 3880181641Skmacy return; 3881181641Skmacy sched_pin(); 3882181641Skmacy TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3883181641Skmacy pmap = PV_PMAP(pv); 3884181641Skmacy PMAP_LOCK(pmap); 3885181641Skmacy pte = pmap_pte_quick(pmap, pv->pv_va); 3886181641Skmacy if ((*pte & PG_A) != 0) { 3887181641Skmacy /* 3888181641Skmacy * Regardless of whether a pte is 32 or 64 bits 3889181641Skmacy * in size, PG_A is among the least significant 3890181641Skmacy * 32 bits. 3891181641Skmacy */ 3892181641Skmacy PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE); 3893181641Skmacy pmap_invalidate_page(pmap, pv->pv_va); 3894181641Skmacy } 3895181641Skmacy PMAP_UNLOCK(pmap); 3896181641Skmacy } 3897181641Skmacy sched_unpin(); 3898181641Skmacy} 3899181641Skmacy 3900181641Skmacy/* 3901181641Skmacy * Miscellaneous support routines follow 3902181641Skmacy */ 3903181641Skmacy 3904181641Skmacy/* 3905181641Skmacy * Map a set of physical memory pages into the kernel virtual 3906181641Skmacy * address space. Return a pointer to where it is mapped. This 3907181641Skmacy * routine is intended to be used for mapping device memory, 3908181641Skmacy * NOT real memory. 3909181641Skmacy */ 3910181641Skmacyvoid * 3911181641Skmacypmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode) 3912181641Skmacy{ 3913195949Skib vm_offset_t va, offset; 3914195949Skib vm_size_t tmpsize; 3915181641Skmacy 3916181641Skmacy offset = pa & PAGE_MASK; 3917181641Skmacy size = roundup(offset + size, PAGE_SIZE); 3918181641Skmacy pa = pa & PG_FRAME; 3919181641Skmacy 3920181641Skmacy if (pa < KERNLOAD && pa + size <= KERNLOAD) 3921181641Skmacy va = KERNBASE + pa; 3922181641Skmacy else 3923181641Skmacy va = kmem_alloc_nofault(kernel_map, size); 3924181641Skmacy if (!va) 3925181641Skmacy panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 3926181641Skmacy 3927195949Skib for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE) 3928195949Skib pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode); 3929195949Skib pmap_invalidate_range(kernel_pmap, va, va + tmpsize); 3930195949Skib pmap_invalidate_cache_range(va, va + size); 3931181641Skmacy return ((void *)(va + offset)); 3932181641Skmacy} 3933181641Skmacy 3934181641Skmacyvoid * 3935181641Skmacypmap_mapdev(vm_paddr_t pa, vm_size_t size) 3936181641Skmacy{ 3937181641Skmacy 3938181641Skmacy return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE)); 3939181641Skmacy} 3940181641Skmacy 3941181641Skmacyvoid * 3942181641Skmacypmap_mapbios(vm_paddr_t pa, vm_size_t size) 3943181641Skmacy{ 3944181641Skmacy 3945181641Skmacy return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK)); 3946181641Skmacy} 3947181641Skmacy 3948181641Skmacyvoid 3949181641Skmacypmap_unmapdev(vm_offset_t va, vm_size_t size) 3950181641Skmacy{ 3951181641Skmacy vm_offset_t base, offset, tmpva; 3952181641Skmacy 3953181641Skmacy if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD) 3954181641Skmacy return; 3955181641Skmacy base = trunc_page(va); 3956181641Skmacy offset = va & PAGE_MASK; 3957181641Skmacy size = roundup(offset + size, PAGE_SIZE); 3958181641Skmacy critical_enter(); 3959181641Skmacy for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 3960181641Skmacy pmap_kremove(tmpva); 3961181641Skmacy pmap_invalidate_range(kernel_pmap, va, tmpva); 3962181641Skmacy critical_exit(); 3963181641Skmacy kmem_free(kernel_map, base, size); 3964181641Skmacy} 3965181641Skmacy 3966195774Salc/* 3967195774Salc * Sets the memory attribute for the specified page. 3968195774Salc */ 3969195774Salcvoid 3970195774Salcpmap_page_set_memattr(vm_page_t m, vm_memattr_t ma) 3971195774Salc{ 3972195949Skib struct sysmaps *sysmaps; 3973195949Skib vm_offset_t sva, eva; 3974195774Salc 3975195774Salc m->md.pat_mode = ma; 3976195949Skib if ((m->flags & PG_FICTITIOUS) != 0) 3977195949Skib return; 3978195774Salc 3979195774Salc /* 3980195774Salc * If "m" is a normal page, flush it from the cache. 3981195949Skib * See pmap_invalidate_cache_range(). 3982195949Skib * 3983195949Skib * First, try to find an existing mapping of the page by sf 3984195949Skib * buffer. sf_buf_invalidate_cache() modifies mapping and 3985195949Skib * flushes the cache. 3986195774Salc */ 3987195949Skib if (sf_buf_invalidate_cache(m)) 3988195949Skib return; 3989195949Skib 3990195949Skib /* 3991195949Skib * If page is not mapped by sf buffer, but CPU does not 3992195949Skib * support self snoop, map the page transient and do 3993195949Skib * invalidation. In the worst case, whole cache is flushed by 3994195949Skib * pmap_invalidate_cache_range(). 3995195949Skib */ 3996195949Skib if ((cpu_feature & (CPUID_SS|CPUID_CLFSH)) == CPUID_CLFSH) { 3997195949Skib sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3998195949Skib mtx_lock(&sysmaps->lock); 3999195949Skib if (*sysmaps->CMAP2) 4000195949Skib panic("pmap_page_set_memattr: CMAP2 busy"); 4001195949Skib sched_pin(); 4002195949Skib PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | 4003195949Skib xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M | 4004195949Skib pmap_cache_bits(m->md.pat_mode, 0)); 4005195949Skib invlcaddr(sysmaps->CADDR2); 4006195949Skib sva = (vm_offset_t)sysmaps->CADDR2; 4007195949Skib eva = sva + PAGE_SIZE; 4008195949Skib } else 4009195949Skib sva = eva = 0; /* gcc */ 4010195949Skib pmap_invalidate_cache_range(sva, eva); 4011195949Skib if (sva != 0) { 4012195949Skib PT_SET_MA(sysmaps->CADDR2, 0); 4013195949Skib sched_unpin(); 4014195949Skib mtx_unlock(&sysmaps->lock); 4015195774Salc } 4016195774Salc} 4017195774Salc 4018181641Skmacyint 4019181641Skmacypmap_change_attr(va, size, mode) 4020181641Skmacy vm_offset_t va; 4021181641Skmacy vm_size_t size; 4022181641Skmacy int mode; 4023181641Skmacy{ 4024181641Skmacy vm_offset_t base, offset, tmpva; 4025181641Skmacy pt_entry_t *pte; 4026181641Skmacy u_int opte, npte; 4027181641Skmacy pd_entry_t *pde; 4028195949Skib boolean_t changed; 4029181641Skmacy 4030181641Skmacy base = trunc_page(va); 4031181641Skmacy offset = va & PAGE_MASK; 4032181641Skmacy size = roundup(offset + size, PAGE_SIZE); 4033181641Skmacy 4034181641Skmacy /* Only supported on kernel virtual addresses. */ 4035181641Skmacy if (base <= VM_MAXUSER_ADDRESS) 4036181641Skmacy return (EINVAL); 4037181641Skmacy 4038181641Skmacy /* 4MB pages and pages that aren't mapped aren't supported. */ 4039181641Skmacy for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) { 4040181641Skmacy pde = pmap_pde(kernel_pmap, tmpva); 4041181641Skmacy if (*pde & PG_PS) 4042181641Skmacy return (EINVAL); 4043181641Skmacy if ((*pde & PG_V) == 0) 4044181641Skmacy return (EINVAL); 4045181641Skmacy pte = vtopte(va); 4046181641Skmacy if ((*pte & PG_V) == 0) 4047181641Skmacy return (EINVAL); 4048181641Skmacy } 4049181641Skmacy 4050195949Skib changed = FALSE; 4051195949Skib 4052181641Skmacy /* 4053181641Skmacy * Ok, all the pages exist and are 4k, so run through them updating 4054181641Skmacy * their cache mode. 4055181641Skmacy */ 4056181641Skmacy for (tmpva = base; size > 0; ) { 4057181641Skmacy pte = vtopte(tmpva); 4058181641Skmacy 4059181641Skmacy /* 4060181641Skmacy * The cache mode bits are all in the low 32-bits of the 4061181641Skmacy * PTE, so we can just spin on updating the low 32-bits. 4062181641Skmacy */ 4063181641Skmacy do { 4064181641Skmacy opte = *(u_int *)pte; 4065181641Skmacy npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT); 4066181641Skmacy npte |= pmap_cache_bits(mode, 0); 4067181641Skmacy PT_SET_VA_MA(pte, npte, TRUE); 4068181641Skmacy } while (npte != opte && (*pte != npte)); 4069195949Skib if (npte != opte) 4070195949Skib changed = TRUE; 4071181641Skmacy tmpva += PAGE_SIZE; 4072181641Skmacy size -= PAGE_SIZE; 4073181641Skmacy } 4074181641Skmacy 4075181641Skmacy /* 4076181641Skmacy * Flush CPU caches to make sure any data isn't cached that shouldn't 4077181641Skmacy * be, etc. 4078181641Skmacy */ 4079195949Skib if (changed) { 4080195949Skib pmap_invalidate_range(kernel_pmap, base, tmpva); 4081195949Skib pmap_invalidate_cache_range(base, tmpva); 4082195949Skib } 4083181641Skmacy return (0); 4084181641Skmacy} 4085181641Skmacy 4086181641Skmacy/* 4087181641Skmacy * perform the pmap work for mincore 4088181641Skmacy */ 4089181641Skmacyint 4090181641Skmacypmap_mincore(pmap_t pmap, vm_offset_t addr) 4091181641Skmacy{ 4092181641Skmacy pt_entry_t *ptep, pte; 4093181641Skmacy vm_page_t m; 4094181641Skmacy int val = 0; 4095181641Skmacy 4096181641Skmacy PMAP_LOCK(pmap); 4097181641Skmacy ptep = pmap_pte(pmap, addr); 4098181641Skmacy pte = (ptep != NULL) ? PT_GET(ptep) : 0; 4099181641Skmacy pmap_pte_release(ptep); 4100181641Skmacy PMAP_UNLOCK(pmap); 4101181641Skmacy 4102181641Skmacy if (pte != 0) { 4103181641Skmacy vm_paddr_t pa; 4104181641Skmacy 4105181641Skmacy val = MINCORE_INCORE; 4106181641Skmacy if ((pte & PG_MANAGED) == 0) 4107181641Skmacy return val; 4108181641Skmacy 4109181641Skmacy pa = pte & PG_FRAME; 4110181641Skmacy 4111181641Skmacy m = PHYS_TO_VM_PAGE(pa); 4112181641Skmacy 4113181641Skmacy /* 4114181641Skmacy * Modified by us 4115181641Skmacy */ 4116181641Skmacy if (pte & PG_M) 4117181641Skmacy val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 4118181641Skmacy else { 4119181641Skmacy /* 4120181641Skmacy * Modified by someone else 4121181641Skmacy */ 4122181641Skmacy vm_page_lock_queues(); 4123181641Skmacy if (m->dirty || pmap_is_modified(m)) 4124181641Skmacy val |= MINCORE_MODIFIED_OTHER; 4125181641Skmacy vm_page_unlock_queues(); 4126181641Skmacy } 4127181641Skmacy /* 4128181641Skmacy * Referenced by us 4129181641Skmacy */ 4130181641Skmacy if (pte & PG_A) 4131181641Skmacy val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 4132181641Skmacy else { 4133181641Skmacy /* 4134181641Skmacy * Referenced by someone else 4135181641Skmacy */ 4136181641Skmacy vm_page_lock_queues(); 4137181641Skmacy if ((m->flags & PG_REFERENCED) || 4138181641Skmacy pmap_ts_referenced(m)) { 4139181641Skmacy val |= MINCORE_REFERENCED_OTHER; 4140181641Skmacy vm_page_flag_set(m, PG_REFERENCED); 4141181641Skmacy } 4142181641Skmacy vm_page_unlock_queues(); 4143181641Skmacy } 4144181641Skmacy } 4145181641Skmacy return val; 4146181641Skmacy} 4147181641Skmacy 4148181641Skmacyvoid 4149181641Skmacypmap_activate(struct thread *td) 4150181641Skmacy{ 4151181641Skmacy pmap_t pmap, oldpmap; 4152181641Skmacy u_int32_t cr3; 4153181641Skmacy 4154181641Skmacy critical_enter(); 4155181641Skmacy pmap = vmspace_pmap(td->td_proc->p_vmspace); 4156181641Skmacy oldpmap = PCPU_GET(curpmap); 4157181641Skmacy#if defined(SMP) 4158181641Skmacy atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 4159181641Skmacy atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 4160181641Skmacy#else 4161181641Skmacy oldpmap->pm_active &= ~1; 4162181641Skmacy pmap->pm_active |= 1; 4163181641Skmacy#endif 4164181641Skmacy#ifdef PAE 4165181641Skmacy cr3 = vtophys(pmap->pm_pdpt); 4166181641Skmacy#else 4167181641Skmacy cr3 = vtophys(pmap->pm_pdir); 4168181641Skmacy#endif 4169181641Skmacy /* 4170181641Skmacy * pmap_activate is for the current thread on the current cpu 4171181641Skmacy */ 4172181641Skmacy td->td_pcb->pcb_cr3 = cr3; 4173181641Skmacy PT_UPDATES_FLUSH(); 4174181641Skmacy load_cr3(cr3); 4175181641Skmacy 4176181641Skmacy PCPU_SET(curpmap, pmap); 4177181641Skmacy critical_exit(); 4178181641Skmacy} 4179181641Skmacy 4180181747Skmacy/* 4181181747Skmacy * Increase the starting virtual address of the given mapping if a 4182181747Skmacy * different alignment might result in more superpage mappings. 4183181747Skmacy */ 4184181747Skmacyvoid 4185181747Skmacypmap_align_superpage(vm_object_t object, vm_ooffset_t offset, 4186181747Skmacy vm_offset_t *addr, vm_size_t size) 4187181641Skmacy{ 4188181747Skmacy vm_offset_t superpage_offset; 4189181641Skmacy 4190181747Skmacy if (size < NBPDR) 4191181747Skmacy return; 4192181747Skmacy if (object != NULL && (object->flags & OBJ_COLORED) != 0) 4193181747Skmacy offset += ptoa(object->pg_color); 4194181747Skmacy superpage_offset = offset & PDRMASK; 4195181747Skmacy if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR || 4196181747Skmacy (*addr & PDRMASK) == superpage_offset) 4197181747Skmacy return; 4198181747Skmacy if ((*addr & PDRMASK) < superpage_offset) 4199181747Skmacy *addr = (*addr & ~PDRMASK) + superpage_offset; 4200181747Skmacy else 4201181747Skmacy *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset; 4202181641Skmacy} 4203181641Skmacy 4204190627Sdfr#ifdef XEN 4205190627Sdfr 4206190627Sdfrvoid 4207190627Sdfrpmap_suspend() 4208190627Sdfr{ 4209190627Sdfr pmap_t pmap; 4210190627Sdfr int i, pdir, offset; 4211190627Sdfr vm_paddr_t pdirma; 4212190627Sdfr mmu_update_t mu[4]; 4213190627Sdfr 4214190627Sdfr /* 4215190627Sdfr * We need to remove the recursive mapping structure from all 4216190627Sdfr * our pmaps so that Xen doesn't get confused when it restores 4217190627Sdfr * the page tables. The recursive map lives at page directory 4218190627Sdfr * index PTDPTDI. We assume that the suspend code has stopped 4219190627Sdfr * the other vcpus (if any). 4220190627Sdfr */ 4221190627Sdfr LIST_FOREACH(pmap, &allpmaps, pm_list) { 4222190627Sdfr for (i = 0; i < 4; i++) { 4223190627Sdfr /* 4224190627Sdfr * Figure out which page directory (L2) page 4225190627Sdfr * contains this bit of the recursive map and 4226190627Sdfr * the offset within that page of the map 4227190627Sdfr * entry 4228190627Sdfr */ 4229190627Sdfr pdir = (PTDPTDI + i) / NPDEPG; 4230190627Sdfr offset = (PTDPTDI + i) % NPDEPG; 4231190627Sdfr pdirma = pmap->pm_pdpt[pdir] & PG_FRAME; 4232190627Sdfr mu[i].ptr = pdirma + offset * sizeof(pd_entry_t); 4233190627Sdfr mu[i].val = 0; 4234190627Sdfr } 4235190627Sdfr HYPERVISOR_mmu_update(mu, 4, NULL, DOMID_SELF); 4236190627Sdfr } 4237190627Sdfr} 4238190627Sdfr 4239190627Sdfrvoid 4240190627Sdfrpmap_resume() 4241190627Sdfr{ 4242190627Sdfr pmap_t pmap; 4243190627Sdfr int i, pdir, offset; 4244190627Sdfr vm_paddr_t pdirma; 4245190627Sdfr mmu_update_t mu[4]; 4246190627Sdfr 4247190627Sdfr /* 4248190627Sdfr * Restore the recursive map that we removed on suspend. 4249190627Sdfr */ 4250190627Sdfr LIST_FOREACH(pmap, &allpmaps, pm_list) { 4251190627Sdfr for (i = 0; i < 4; i++) { 4252190627Sdfr /* 4253190627Sdfr * Figure out which page directory (L2) page 4254190627Sdfr * contains this bit of the recursive map and 4255190627Sdfr * the offset within that page of the map 4256190627Sdfr * entry 4257190627Sdfr */ 4258190627Sdfr pdir = (PTDPTDI + i) / NPDEPG; 4259190627Sdfr offset = (PTDPTDI + i) % NPDEPG; 4260190627Sdfr pdirma = pmap->pm_pdpt[pdir] & PG_FRAME; 4261190627Sdfr mu[i].ptr = pdirma + offset * sizeof(pd_entry_t); 4262190627Sdfr mu[i].val = (pmap->pm_pdpt[i] & PG_FRAME) | PG_V; 4263190627Sdfr } 4264190627Sdfr HYPERVISOR_mmu_update(mu, 4, NULL, DOMID_SELF); 4265190627Sdfr } 4266190627Sdfr} 4267190627Sdfr 4268190627Sdfr#endif 4269190627Sdfr 4270181641Skmacy#if defined(PMAP_DEBUG) 4271181641Skmacypmap_pid_dump(int pid) 4272181641Skmacy{ 4273181641Skmacy pmap_t pmap; 4274181641Skmacy struct proc *p; 4275181641Skmacy int npte = 0; 4276181641Skmacy int index; 4277181641Skmacy 4278181641Skmacy sx_slock(&allproc_lock); 4279181641Skmacy FOREACH_PROC_IN_SYSTEM(p) { 4280181641Skmacy if (p->p_pid != pid) 4281181641Skmacy continue; 4282181641Skmacy 4283181641Skmacy if (p->p_vmspace) { 4284181641Skmacy int i,j; 4285181641Skmacy index = 0; 4286181641Skmacy pmap = vmspace_pmap(p->p_vmspace); 4287181641Skmacy for (i = 0; i < NPDEPTD; i++) { 4288181641Skmacy pd_entry_t *pde; 4289181641Skmacy pt_entry_t *pte; 4290181641Skmacy vm_offset_t base = i << PDRSHIFT; 4291181641Skmacy 4292181641Skmacy pde = &pmap->pm_pdir[i]; 4293181641Skmacy if (pde && pmap_pde_v(pde)) { 4294181641Skmacy for (j = 0; j < NPTEPG; j++) { 4295181641Skmacy vm_offset_t va = base + (j << PAGE_SHIFT); 4296181641Skmacy if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 4297181641Skmacy if (index) { 4298181641Skmacy index = 0; 4299181641Skmacy printf("\n"); 4300181641Skmacy } 4301181641Skmacy sx_sunlock(&allproc_lock); 4302181641Skmacy return npte; 4303181641Skmacy } 4304181641Skmacy pte = pmap_pte(pmap, va); 4305181641Skmacy if (pte && pmap_pte_v(pte)) { 4306181641Skmacy pt_entry_t pa; 4307181641Skmacy vm_page_t m; 4308181641Skmacy pa = PT_GET(pte); 4309181641Skmacy m = PHYS_TO_VM_PAGE(pa & PG_FRAME); 4310181641Skmacy printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 4311181641Skmacy va, pa, m->hold_count, m->wire_count, m->flags); 4312181641Skmacy npte++; 4313181641Skmacy index++; 4314181641Skmacy if (index >= 2) { 4315181641Skmacy index = 0; 4316181641Skmacy printf("\n"); 4317181641Skmacy } else { 4318181641Skmacy printf(" "); 4319181641Skmacy } 4320181641Skmacy } 4321181641Skmacy } 4322181641Skmacy } 4323181641Skmacy } 4324181641Skmacy } 4325181641Skmacy } 4326181641Skmacy sx_sunlock(&allproc_lock); 4327181641Skmacy return npte; 4328181641Skmacy} 4329181641Skmacy#endif 4330181641Skmacy 4331181641Skmacy#if defined(DEBUG) 4332181641Skmacy 4333181641Skmacystatic void pads(pmap_t pm); 4334181641Skmacyvoid pmap_pvdump(vm_paddr_t pa); 4335181641Skmacy 4336181641Skmacy/* print address space of pmap*/ 4337181641Skmacystatic void 4338181641Skmacypads(pmap_t pm) 4339181641Skmacy{ 4340181641Skmacy int i, j; 4341181641Skmacy vm_paddr_t va; 4342181641Skmacy pt_entry_t *ptep; 4343181641Skmacy 4344181641Skmacy if (pm == kernel_pmap) 4345181641Skmacy return; 4346181641Skmacy for (i = 0; i < NPDEPTD; i++) 4347181641Skmacy if (pm->pm_pdir[i]) 4348181641Skmacy for (j = 0; j < NPTEPG; j++) { 4349181641Skmacy va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 4350181641Skmacy if (pm == kernel_pmap && va < KERNBASE) 4351181641Skmacy continue; 4352181641Skmacy if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 4353181641Skmacy continue; 4354181641Skmacy ptep = pmap_pte(pm, va); 4355181641Skmacy if (pmap_pte_v(ptep)) 4356181641Skmacy printf("%x:%x ", va, *ptep); 4357181641Skmacy }; 4358181641Skmacy 4359181641Skmacy} 4360181641Skmacy 4361181641Skmacyvoid 4362181641Skmacypmap_pvdump(vm_paddr_t pa) 4363181641Skmacy{ 4364181641Skmacy pv_entry_t pv; 4365181641Skmacy pmap_t pmap; 4366181641Skmacy vm_page_t m; 4367181641Skmacy 4368181641Skmacy printf("pa %x", pa); 4369181641Skmacy m = PHYS_TO_VM_PAGE(pa); 4370181641Skmacy TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 4371181641Skmacy pmap = PV_PMAP(pv); 4372181641Skmacy printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va); 4373181641Skmacy pads(pmap); 4374181641Skmacy } 4375181641Skmacy printf(" "); 4376181641Skmacy} 4377181641Skmacy#endif 4378