pmap.c revision 183342
1/*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * Copyright (c) 1994 John S. Dyson 5 * All rights reserved. 6 * Copyright (c) 1994 David Greenman 7 * All rights reserved. 8 * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu> 9 * All rights reserved. 10 * 11 * This code is derived from software contributed to Berkeley by 12 * the Systems Programming Group of the University of Utah Computer 13 * Science Department and William Jolitz of UUNET Technologies Inc. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the University of 26 * California, Berkeley and its contributors. 27 * 4. Neither the name of the University nor the names of its contributors 28 * may be used to endorse or promote products derived from this software 29 * without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41 * SUCH DAMAGE. 42 * 43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 44 */ 45/*- 46 * Copyright (c) 2003 Networks Associates Technology, Inc. 47 * All rights reserved. 48 * 49 * This software was developed for the FreeBSD Project by Jake Burkholder, 50 * Safeport Network Services, and Network Associates Laboratories, the 51 * Security Research Division of Network Associates, Inc. under 52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 53 * CHATS research program. 54 * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 1. Redistributions of source code must retain the above copyright 59 * notice, this list of conditions and the following disclaimer. 60 * 2. Redistributions in binary form must reproduce the above copyright 61 * notice, this list of conditions and the following disclaimer in the 62 * documentation and/or other materials provided with the distribution. 63 * 64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 74 * SUCH DAMAGE. 75 */ 76 77#include <sys/cdefs.h> 78__FBSDID("$FreeBSD: head/sys/i386/xen/pmap.c 183342 2008-09-25 07:03:09Z kmacy $"); 79 80/* 81 * Manages physical address maps. 82 * 83 * In addition to hardware address maps, this 84 * module is called upon to provide software-use-only 85 * maps which may or may not be stored in the same 86 * form as hardware maps. These pseudo-maps are 87 * used to store intermediate results from copy 88 * operations to and from address spaces. 89 * 90 * Since the information managed by this module is 91 * also stored by the logical address mapping module, 92 * this module may throw away valid virtual-to-physical 93 * mappings at almost any time. However, invalidations 94 * of virtual-to-physical mappings must be done as 95 * requested. 96 * 97 * In order to cope with hardware architectures which 98 * make virtual-to-physical map invalidates expensive, 99 * this module may delay invalidate or reduced protection 100 * operations until such time as they are actually 101 * necessary. This module is given full information as 102 * to which processors are currently using which maps, 103 * and to when physical maps must be made correct. 104 */ 105 106#define PMAP_DIAGNOSTIC 107 108#include "opt_cpu.h" 109#include "opt_pmap.h" 110#include "opt_msgbuf.h" 111#include "opt_smp.h" 112#include "opt_xbox.h" 113 114#include <sys/param.h> 115#include <sys/systm.h> 116#include <sys/kernel.h> 117#include <sys/ktr.h> 118#include <sys/lock.h> 119#include <sys/malloc.h> 120#include <sys/mman.h> 121#include <sys/msgbuf.h> 122#include <sys/mutex.h> 123#include <sys/proc.h> 124#include <sys/sx.h> 125#include <sys/vmmeter.h> 126#include <sys/sched.h> 127#include <sys/sysctl.h> 128#ifdef SMP 129#include <sys/smp.h> 130#endif 131 132#include <vm/vm.h> 133#include <vm/vm_param.h> 134#include <vm/vm_kern.h> 135#include <vm/vm_page.h> 136#include <vm/vm_map.h> 137#include <vm/vm_object.h> 138#include <vm/vm_extern.h> 139#include <vm/vm_pageout.h> 140#include <vm/vm_pager.h> 141#include <vm/uma.h> 142 143#include <machine/cpu.h> 144#include <machine/cputypes.h> 145#include <machine/md_var.h> 146#include <machine/pcb.h> 147#include <machine/specialreg.h> 148#ifdef SMP 149#include <machine/smp.h> 150#endif 151 152#ifdef XBOX 153#include <machine/xbox.h> 154#endif 155 156#include <xen/interface/xen.h> 157#include <machine/xen/hypervisor.h> 158#include <machine/xen/hypercall.h> 159#include <machine/xen/xenvar.h> 160#include <machine/xen/xenfunc.h> 161 162#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 163#define CPU_ENABLE_SSE 164#endif 165 166#ifndef PMAP_SHPGPERPROC 167#define PMAP_SHPGPERPROC 200 168#endif 169 170#if defined(DIAGNOSTIC) 171#define PMAP_DIAGNOSTIC 172#endif 173 174#if !defined(PMAP_DIAGNOSTIC) 175#define PMAP_INLINE __gnu89_inline 176#else 177#define PMAP_INLINE 178#endif 179 180#define PV_STATS 181#ifdef PV_STATS 182#define PV_STAT(x) do { x ; } while (0) 183#else 184#define PV_STAT(x) do { } while (0) 185#endif 186 187#define pa_index(pa) ((pa) >> PDRSHIFT) 188#define pa_to_pvh(pa) (&pv_table[pa_index(pa)]) 189 190/* 191 * Get PDEs and PTEs for user/kernel address space 192 */ 193#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 194#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 195 196#define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 197#define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 198#define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 199#define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 200#define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 201 202#define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 203 204struct pmap kernel_pmap_store; 205LIST_HEAD(pmaplist, pmap); 206static struct pmaplist allpmaps; 207static struct mtx allpmaps_lock; 208 209vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 210vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 211int pgeflag = 0; /* PG_G or-in */ 212int pseflag = 0; /* PG_PS or-in */ 213 214int nkpt; 215vm_offset_t kernel_vm_end; 216extern u_int32_t KERNend; 217 218#ifdef PAE 219pt_entry_t pg_nx; 220#if !defined(XEN) 221static uma_zone_t pdptzone; 222#endif 223#endif 224 225/* 226 * Data for the pv entry allocation mechanism 227 */ 228static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 229static struct md_page *pv_table; 230static int shpgperproc = PMAP_SHPGPERPROC; 231 232struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */ 233int pv_maxchunks; /* How many chunks we have KVA for */ 234vm_offset_t pv_vafree; /* freelist stored in the PTE */ 235 236/* 237 * All those kernel PT submaps that BSD is so fond of 238 */ 239struct sysmaps { 240 struct mtx lock; 241 pt_entry_t *CMAP1; 242 pt_entry_t *CMAP2; 243 caddr_t CADDR1; 244 caddr_t CADDR2; 245}; 246static struct sysmaps sysmaps_pcpu[MAXCPU]; 247pt_entry_t *CMAP1 = 0; 248static pt_entry_t *CMAP3; 249caddr_t CADDR1 = 0, ptvmmap = 0; 250static caddr_t CADDR3; 251struct msgbuf *msgbufp = 0; 252 253/* 254 * Crashdump maps. 255 */ 256static caddr_t crashdumpmap; 257 258static pt_entry_t *PMAP1 = 0, *PMAP2; 259static pt_entry_t *PADDR1 = 0, *PADDR2; 260#ifdef SMP 261static int PMAP1cpu; 262static int PMAP1changedcpu; 263SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD, 264 &PMAP1changedcpu, 0, 265 "Number of times pmap_pte_quick changed CPU with same PMAP1"); 266#endif 267static int PMAP1changed; 268SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD, 269 &PMAP1changed, 0, 270 "Number of times pmap_pte_quick changed PMAP1"); 271static int PMAP1unchanged; 272SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD, 273 &PMAP1unchanged, 0, 274 "Number of times pmap_pte_quick didn't change PMAP1"); 275static struct mtx PMAP2mutex; 276 277SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters"); 278static int pg_ps_enabled; 279SYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RD, &pg_ps_enabled, 0, 280 "Are large page mappings enabled?"); 281 282SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0, 283 "Max number of PV entries"); 284SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0, 285 "Page share factor per proc"); 286 287static void free_pv_entry(pmap_t pmap, pv_entry_t pv); 288static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try); 289 290static vm_page_t pmap_enter_quick_locked(multicall_entry_t **mcl, int *count, pmap_t pmap, vm_offset_t va, 291 vm_page_t m, vm_prot_t prot, vm_page_t mpte); 292static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva, 293 vm_page_t *free); 294static void pmap_remove_page(struct pmap *pmap, vm_offset_t va, 295 vm_page_t *free); 296static void pmap_remove_entry(struct pmap *pmap, vm_page_t m, 297 vm_offset_t va); 298static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m); 299static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, 300 vm_page_t m); 301 302static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags); 303 304static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags); 305static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free); 306static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va); 307static void pmap_pte_release(pt_entry_t *pte); 308static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *); 309static vm_offset_t pmap_kmem_choose(vm_offset_t addr); 310static boolean_t pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr); 311static void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode); 312 313 314#if defined(PAE) && !defined(XEN) 315static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 316#endif 317 318CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 319CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 320 321/* 322 * If you get an error here, then you set KVA_PAGES wrong! See the 323 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be 324 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE. 325 */ 326CTASSERT(KERNBASE % (1 << 24) == 0); 327 328 329 330static __inline void 331pagezero(void *page) 332{ 333#if defined(I686_CPU) 334 if (cpu_class == CPUCLASS_686) { 335#if defined(CPU_ENABLE_SSE) 336 if (cpu_feature & CPUID_SSE2) 337 sse2_pagezero(page); 338 else 339#endif 340 i686_pagezero(page); 341 } else 342#endif 343 bzero(page, PAGE_SIZE); 344} 345 346void 347pd_set(struct pmap *pmap, int ptepindex, vm_paddr_t val, int type) 348{ 349 vm_paddr_t pdir_ma = vtomach(&pmap->pm_pdir[ptepindex]); 350 351 switch (type) { 352 case SH_PD_SET_VA: 353#if 0 354 xen_queue_pt_update(shadow_pdir_ma, 355 xpmap_ptom(val & ~(PG_RW))); 356#endif 357 xen_queue_pt_update(pdir_ma, 358 xpmap_ptom(val)); 359 break; 360 case SH_PD_SET_VA_MA: 361#if 0 362 xen_queue_pt_update(shadow_pdir_ma, 363 val & ~(PG_RW)); 364#endif 365 xen_queue_pt_update(pdir_ma, val); 366 break; 367 case SH_PD_SET_VA_CLEAR: 368#if 0 369 xen_queue_pt_update(shadow_pdir_ma, 0); 370#endif 371 xen_queue_pt_update(pdir_ma, 0); 372 break; 373 } 374} 375 376/* 377 * Move the kernel virtual free pointer to the next 378 * 4MB. This is used to help improve performance 379 * by using a large (4MB) page for much of the kernel 380 * (.text, .data, .bss) 381 */ 382static vm_offset_t 383pmap_kmem_choose(vm_offset_t addr) 384{ 385 vm_offset_t newaddr = addr; 386 387#ifndef DISABLE_PSE 388 if (cpu_feature & CPUID_PSE) 389 newaddr = (addr + PDRMASK) & ~PDRMASK; 390#endif 391 return newaddr; 392} 393 394/* 395 * Bootstrap the system enough to run with virtual memory. 396 * 397 * On the i386 this is called after mapping has already been enabled 398 * and just syncs the pmap module with what has already been done. 399 * [We can't call it easily with mapping off since the kernel is not 400 * mapped with PA == VA, hence we would have to relocate every address 401 * from the linked base (virtual) address "KERNBASE" to the actual 402 * (physical) address starting relative to 0] 403 */ 404void 405pmap_bootstrap(vm_paddr_t firstaddr) 406{ 407 vm_offset_t va; 408 pt_entry_t *pte, *unused; 409 struct sysmaps *sysmaps; 410 int i; 411 412 /* 413 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 414 * large. It should instead be correctly calculated in locore.s and 415 * not based on 'first' (which is a physical address, not a virtual 416 * address, for the start of unused physical memory). The kernel 417 * page tables are NOT double mapped and thus should not be included 418 * in this calculation. 419 */ 420 virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 421 virtual_avail = pmap_kmem_choose(virtual_avail); 422 423 virtual_end = VM_MAX_KERNEL_ADDRESS; 424 425 /* 426 * Initialize the kernel pmap (which is statically allocated). 427 */ 428 PMAP_LOCK_INIT(kernel_pmap); 429 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 430#ifdef PAE 431 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 432#endif 433 kernel_pmap->pm_active = -1; /* don't allow deactivation */ 434 TAILQ_INIT(&kernel_pmap->pm_pvchunk); 435 LIST_INIT(&allpmaps); 436 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 437 mtx_lock_spin(&allpmaps_lock); 438 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 439 mtx_unlock_spin(&allpmaps_lock); 440 if (nkpt == 0) 441 nkpt = NKPT; 442 443 /* 444 * Reserve some special page table entries/VA space for temporary 445 * mapping of pages. 446 */ 447#define SYSMAP(c, p, v, n) \ 448 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 449 450 va = virtual_avail; 451 pte = vtopte(va); 452 453 /* 454 * CMAP1/CMAP2 are used for zeroing and copying pages. 455 * CMAP3 is used for the idle process page zeroing. 456 */ 457 for (i = 0; i < MAXCPU; i++) { 458 sysmaps = &sysmaps_pcpu[i]; 459 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF); 460 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1) 461 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1) 462 } 463 SYSMAP(caddr_t, CMAP1, CADDR1, 1) 464 SYSMAP(caddr_t, CMAP3, CADDR3, 1) 465 PT_SET_MA(CADDR3, 0); 466 467 /* 468 * Crashdump maps. 469 */ 470 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS) 471 472 /* 473 * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 474 */ 475 SYSMAP(caddr_t, unused, ptvmmap, 1) 476 477 /* 478 * msgbufp is used to map the system message buffer. 479 */ 480 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE))) 481 482 /* 483 * ptemap is used for pmap_pte_quick 484 */ 485 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 486 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1); 487 488 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF); 489 490 virtual_avail = va; 491 PT_SET_MA(CADDR1, 0); 492 493 /* 494 * Leave in place an identity mapping (virt == phys) for the low 1 MB 495 * physical memory region that is used by the ACPI wakeup code. This 496 * mapping must not have PG_G set. 497 */ 498#ifndef XEN 499 /* 500 * leave here deliberately to show that this is not supported 501 */ 502#ifdef XBOX 503 /* FIXME: This is gross, but needed for the XBOX. Since we are in such 504 * an early stadium, we cannot yet neatly map video memory ... :-( 505 * Better fixes are very welcome! */ 506 if (!arch_i386_is_xbox) 507#endif 508 for (i = 1; i < NKPT; i++) 509 PTD[i] = 0; 510 511 /* Initialize the PAT MSR if present. */ 512 pmap_init_pat(); 513 514 /* Turn on PG_G on kernel page(s) */ 515 pmap_set_pg(); 516#endif 517} 518 519/* 520 * Setup the PAT MSR. 521 */ 522void 523pmap_init_pat(void) 524{ 525 uint64_t pat_msr; 526 527 /* Bail if this CPU doesn't implement PAT. */ 528 if (!(cpu_feature & CPUID_PAT)) 529 return; 530 531#ifdef PAT_WORKS 532 /* 533 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-. 534 * Program 4 and 5 as WP and WC. 535 * Leave 6 and 7 as UC and UC-. 536 */ 537 pat_msr = rdmsr(MSR_PAT); 538 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5)); 539 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) | 540 PAT_VALUE(5, PAT_WRITE_COMBINING); 541#else 542 /* 543 * Due to some Intel errata, we can only safely use the lower 4 544 * PAT entries. Thus, just replace PAT Index 2 with WC instead 545 * of UC-. 546 * 547 * Intel Pentium III Processor Specification Update 548 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B 549 * or Mode C Paging) 550 * 551 * Intel Pentium IV Processor Specification Update 552 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly) 553 */ 554 pat_msr = rdmsr(MSR_PAT); 555 pat_msr &= ~PAT_MASK(2); 556 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING); 557#endif 558 wrmsr(MSR_PAT, pat_msr); 559} 560 561/* 562 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on. 563 */ 564void 565pmap_set_pg(void) 566{ 567 pd_entry_t pdir; 568 pt_entry_t *pte; 569 vm_offset_t va, endva; 570 int i; 571 572 if (pgeflag == 0) 573 return; 574 575 i = KERNLOAD/NBPDR; 576 endva = KERNBASE + KERNend; 577 578 if (pseflag) { 579 va = KERNBASE + KERNLOAD; 580 while (va < endva) { 581 pdir = kernel_pmap->pm_pdir[KPTDI+i]; 582 pdir |= pgeflag; 583 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir; 584 invltlb(); /* Play it safe, invltlb() every time */ 585 i++; 586 va += NBPDR; 587 } 588 } else { 589 va = (vm_offset_t)btext; 590 while (va < endva) { 591 pte = vtopte(va); 592 if (*pte & PG_V) 593 *pte |= pgeflag; 594 invltlb(); /* Play it safe, invltlb() every time */ 595 va += PAGE_SIZE; 596 } 597 } 598} 599 600/* 601 * Initialize a vm_page's machine-dependent fields. 602 */ 603void 604pmap_page_init(vm_page_t m) 605{ 606 607 TAILQ_INIT(&m->md.pv_list); 608} 609 610#if defined(PAE) && !defined(XEN) 611 612static MALLOC_DEFINE(M_PMAPPDPT, "pmap", "pmap pdpt"); 613 614static void * 615pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 616{ 617 *flags = UMA_SLAB_PRIV; 618 return (contigmalloc(PAGE_SIZE, M_PMAPPDPT, 0, 0x0ULL, 0xffffffffULL, 619 1, 0)); 620} 621#endif 622 623/* 624 * ABuse the pte nodes for unmapped kva to thread a kva freelist through. 625 * Requirements: 626 * - Must deal with pages in order to ensure that none of the PG_* bits 627 * are ever set, PG_V in particular. 628 * - Assumes we can write to ptes without pte_store() atomic ops, even 629 * on PAE systems. This should be ok. 630 * - Assumes nothing will ever test these addresses for 0 to indicate 631 * no mapping instead of correctly checking PG_V. 632 * - Assumes a vm_offset_t will fit in a pte (true for i386). 633 * Because PG_V is never set, there can be no mappings to invalidate. 634 */ 635static int ptelist_count = 0; 636static vm_offset_t 637pmap_ptelist_alloc(vm_offset_t *head) 638{ 639 vm_offset_t va; 640 vm_offset_t *phead = (vm_offset_t *)*head; 641 642 if (ptelist_count == 0) { 643 printf("out of memory!!!!!!\n"); 644 return (0); /* Out of memory */ 645 } 646 ptelist_count--; 647 va = phead[ptelist_count]; 648 return (va); 649} 650 651static void 652pmap_ptelist_free(vm_offset_t *head, vm_offset_t va) 653{ 654 vm_offset_t *phead = (vm_offset_t *)*head; 655 656 phead[ptelist_count++] = va; 657} 658 659static void 660pmap_ptelist_init(vm_offset_t *head, void *base, int npages) 661{ 662 int i, nstackpages; 663 vm_offset_t va; 664 vm_page_t m; 665 666 nstackpages = (npages + PAGE_SIZE/sizeof(vm_offset_t) - 1)/ (PAGE_SIZE/sizeof(vm_offset_t)); 667 for (i = 0; i < nstackpages; i++) { 668 va = (vm_offset_t)base + i * PAGE_SIZE; 669 m = vm_page_alloc(NULL, i, 670 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 671 VM_ALLOC_ZERO); 672 pmap_qenter(va, &m, 1); 673 } 674 675 *head = (vm_offset_t)base; 676 for (i = npages - 1; i >= nstackpages; i--) { 677 va = (vm_offset_t)base + i * PAGE_SIZE; 678 pmap_ptelist_free(head, va); 679 } 680} 681 682 683/* 684 * Initialize the pmap module. 685 * Called by vm_init, to initialize any structures that the pmap 686 * system needs to map virtual memory. 687 */ 688void 689pmap_init(void) 690{ 691 vm_page_t mpte; 692 vm_size_t s; 693 int i, pv_npg; 694 695 /* 696 * Initialize the vm page array entries for the kernel pmap's 697 * page table pages. 698 */ 699 for (i = 0; i < nkpt; i++) { 700 mpte = PHYS_TO_VM_PAGE(xpmap_mtop(PTD[i + KPTDI] & PG_FRAME)); 701 KASSERT(mpte >= vm_page_array && 702 mpte < &vm_page_array[vm_page_array_size], 703 ("pmap_init: page table page is out of range")); 704 mpte->pindex = i + KPTDI; 705 mpte->phys_addr = xpmap_mtop(PTD[i + KPTDI] & PG_FRAME); 706 } 707 708 /* 709 * Initialize the address space (zone) for the pv entries. Set a 710 * high water mark so that the system can recover from excessive 711 * numbers of pv entries. 712 */ 713 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 714 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count; 715 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 716 pv_entry_max = roundup(pv_entry_max, _NPCPV); 717 pv_entry_high_water = 9 * (pv_entry_max / 10); 718 719 /* 720 * Are large page mappings enabled? 721 */ 722 TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled); 723 724 /* 725 * Calculate the size of the pv head table for superpages. 726 */ 727 for (i = 0; phys_avail[i + 1]; i += 2); 728 pv_npg = round_4mpage(phys_avail[(i - 2) + 1]) / NBPDR; 729 730 /* 731 * Allocate memory for the pv head table for superpages. 732 */ 733 s = (vm_size_t)(pv_npg * sizeof(struct md_page)); 734 s = round_page(s); 735 pv_table = (struct md_page *)kmem_alloc(kernel_map, s); 736 for (i = 0; i < pv_npg; i++) 737 TAILQ_INIT(&pv_table[i].pv_list); 738 739 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc); 740 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map, 741 PAGE_SIZE * pv_maxchunks); 742 if (pv_chunkbase == NULL) 743 panic("pmap_init: not enough kvm for pv chunks"); 744 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks); 745#if defined(PAE) && !defined(XEN) 746 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL, 747 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1, 748 UMA_ZONE_VM | UMA_ZONE_NOFREE); 749 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf); 750#endif 751} 752 753 754/*************************************************** 755 * Low level helper routines..... 756 ***************************************************/ 757 758/* 759 * Determine the appropriate bits to set in a PTE or PDE for a specified 760 * caching mode. 761 */ 762static int 763pmap_cache_bits(int mode, boolean_t is_pde) 764{ 765 int pat_flag, pat_index, cache_bits; 766 767 /* The PAT bit is different for PTE's and PDE's. */ 768 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT; 769 770 /* If we don't support PAT, map extended modes to older ones. */ 771 if (!(cpu_feature & CPUID_PAT)) { 772 switch (mode) { 773 case PAT_UNCACHEABLE: 774 case PAT_WRITE_THROUGH: 775 case PAT_WRITE_BACK: 776 break; 777 case PAT_UNCACHED: 778 case PAT_WRITE_COMBINING: 779 case PAT_WRITE_PROTECTED: 780 mode = PAT_UNCACHEABLE; 781 break; 782 } 783 } 784 785 /* Map the caching mode to a PAT index. */ 786 switch (mode) { 787#ifdef PAT_WORKS 788 case PAT_UNCACHEABLE: 789 pat_index = 3; 790 break; 791 case PAT_WRITE_THROUGH: 792 pat_index = 1; 793 break; 794 case PAT_WRITE_BACK: 795 pat_index = 0; 796 break; 797 case PAT_UNCACHED: 798 pat_index = 2; 799 break; 800 case PAT_WRITE_COMBINING: 801 pat_index = 5; 802 break; 803 case PAT_WRITE_PROTECTED: 804 pat_index = 4; 805 break; 806#else 807 case PAT_UNCACHED: 808 case PAT_UNCACHEABLE: 809 case PAT_WRITE_PROTECTED: 810 pat_index = 3; 811 break; 812 case PAT_WRITE_THROUGH: 813 pat_index = 1; 814 break; 815 case PAT_WRITE_BACK: 816 pat_index = 0; 817 break; 818 case PAT_WRITE_COMBINING: 819 pat_index = 2; 820 break; 821#endif 822 default: 823 panic("Unknown caching mode %d\n", mode); 824 } 825 826 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */ 827 cache_bits = 0; 828 if (pat_index & 0x4) 829 cache_bits |= pat_flag; 830 if (pat_index & 0x2) 831 cache_bits |= PG_NC_PCD; 832 if (pat_index & 0x1) 833 cache_bits |= PG_NC_PWT; 834 return (cache_bits); 835} 836#ifdef SMP 837/* 838 * For SMP, these functions have to use the IPI mechanism for coherence. 839 * 840 * N.B.: Before calling any of the following TLB invalidation functions, 841 * the calling processor must ensure that all stores updating a non- 842 * kernel page table are globally performed. Otherwise, another 843 * processor could cache an old, pre-update entry without being 844 * invalidated. This can happen one of two ways: (1) The pmap becomes 845 * active on another processor after its pm_active field is checked by 846 * one of the following functions but before a store updating the page 847 * table is globally performed. (2) The pmap becomes active on another 848 * processor before its pm_active field is checked but due to 849 * speculative loads one of the following functions stills reads the 850 * pmap as inactive on the other processor. 851 * 852 * The kernel page table is exempt because its pm_active field is 853 * immutable. The kernel page table is always active on every 854 * processor. 855 */ 856void 857pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 858{ 859 u_int cpumask; 860 u_int other_cpus; 861 862 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x", 863 pmap, va); 864 865 sched_pin(); 866 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 867 invlpg(va); 868 smp_invlpg(va); 869 } else { 870 cpumask = PCPU_GET(cpumask); 871 other_cpus = PCPU_GET(other_cpus); 872 if (pmap->pm_active & cpumask) 873 invlpg(va); 874 if (pmap->pm_active & other_cpus) 875 smp_masked_invlpg(pmap->pm_active & other_cpus, va); 876 } 877 sched_unpin(); 878 PT_UPDATES_FLUSH(); 879} 880 881void 882pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 883{ 884 u_int cpumask; 885 u_int other_cpus; 886 vm_offset_t addr; 887 888 CTR3(KTR_PMAP, "pmap_invalidate_page: pmap=%p eva=0x%x sva=0x%x", 889 pmap, sva, eva); 890 891 sched_pin(); 892 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 893 for (addr = sva; addr < eva; addr += PAGE_SIZE) 894 invlpg(addr); 895 smp_invlpg_range(sva, eva); 896 } else { 897 cpumask = PCPU_GET(cpumask); 898 other_cpus = PCPU_GET(other_cpus); 899 if (pmap->pm_active & cpumask) 900 for (addr = sva; addr < eva; addr += PAGE_SIZE) 901 invlpg(addr); 902 if (pmap->pm_active & other_cpus) 903 smp_masked_invlpg_range(pmap->pm_active & other_cpus, 904 sva, eva); 905 } 906 sched_unpin(); 907 PT_UPDATES_FLUSH(); 908} 909 910void 911pmap_invalidate_all(pmap_t pmap) 912{ 913 u_int cpumask; 914 u_int other_cpus; 915 916 CTR1(KTR_PMAP, "pmap_invalidate_page: pmap=%p", pmap); 917 918 sched_pin(); 919 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 920 invltlb(); 921 smp_invltlb(); 922 } else { 923 cpumask = PCPU_GET(cpumask); 924 other_cpus = PCPU_GET(other_cpus); 925 if (pmap->pm_active & cpumask) 926 invltlb(); 927 if (pmap->pm_active & other_cpus) 928 smp_masked_invltlb(pmap->pm_active & other_cpus); 929 } 930 sched_unpin(); 931} 932 933void 934pmap_invalidate_cache(void) 935{ 936 937 sched_pin(); 938 wbinvd(); 939 smp_cache_flush(); 940 sched_unpin(); 941} 942#else /* !SMP */ 943/* 944 * Normal, non-SMP, 486+ invalidation functions. 945 * We inline these within pmap.c for speed. 946 */ 947PMAP_INLINE void 948pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 949{ 950 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x", 951 pmap, va); 952 953 if (pmap == kernel_pmap || pmap->pm_active) 954 invlpg(va); 955 PT_UPDATES_FLUSH(); 956} 957 958PMAP_INLINE void 959pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 960{ 961 vm_offset_t addr; 962 963 if (eva - sva > PAGE_SIZE) 964 CTR3(KTR_PMAP, "pmap_invalidate_range: pmap=%p sva=0x%x eva=0x%x", 965 pmap, sva, eva); 966 967 if (pmap == kernel_pmap || pmap->pm_active) 968 for (addr = sva; addr < eva; addr += PAGE_SIZE) 969 invlpg(addr); 970 PT_UPDATES_FLUSH(); 971} 972 973PMAP_INLINE void 974pmap_invalidate_all(pmap_t pmap) 975{ 976 977 CTR1(KTR_PMAP, "pmap_invalidate_all: pmap=%p", pmap); 978 979 if (pmap == kernel_pmap || pmap->pm_active) 980 invltlb(); 981} 982 983PMAP_INLINE void 984pmap_invalidate_cache(void) 985{ 986 987 wbinvd(); 988} 989#endif /* !SMP */ 990 991/* 992 * Are we current address space or kernel? N.B. We return FALSE when 993 * a pmap's page table is in use because a kernel thread is borrowing 994 * it. The borrowed page table can change spontaneously, making any 995 * dependence on its continued use subject to a race condition. 996 */ 997static __inline int 998pmap_is_current(pmap_t pmap) 999{ 1000 1001 return (pmap == kernel_pmap || 1002 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) && 1003 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME))); 1004} 1005 1006/* 1007 * If the given pmap is not the current or kernel pmap, the returned pte must 1008 * be released by passing it to pmap_pte_release(). 1009 */ 1010pt_entry_t * 1011pmap_pte(pmap_t pmap, vm_offset_t va) 1012{ 1013 pd_entry_t newpf; 1014 pd_entry_t *pde; 1015 1016 pde = pmap_pde(pmap, va); 1017 if (*pde & PG_PS) 1018 return (pde); 1019 if (*pde != 0) { 1020 /* are we current address space or kernel? */ 1021 if (pmap_is_current(pmap)) 1022 return (vtopte(va)); 1023 mtx_lock(&PMAP2mutex); 1024 newpf = *pde & PG_FRAME; 1025 if ((*PMAP2 & PG_FRAME) != newpf) { 1026 PT_SET_MA(PADDR2, newpf | PG_V | PG_A | PG_M); 1027 CTR3(KTR_PMAP, "pmap_pte: pmap=%p va=0x%x newpte=0x%08x", 1028 pmap, va, (*PMAP2 & 0xffffffff)); 1029 } 1030 1031 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1))); 1032 } 1033 return (0); 1034} 1035 1036/* 1037 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte 1038 * being NULL. 1039 */ 1040static __inline void 1041pmap_pte_release(pt_entry_t *pte) 1042{ 1043 1044 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) { 1045 CTR1(KTR_PMAP, "pmap_pte_release: pte=0x%jx", 1046 *PMAP2); 1047 PT_SET_VA(PMAP2, 0, TRUE); 1048 mtx_unlock(&PMAP2mutex); 1049 } 1050} 1051 1052static __inline void 1053invlcaddr(void *caddr) 1054{ 1055 1056 invlpg((u_int)caddr); 1057 PT_UPDATES_FLUSH(); 1058} 1059 1060/* 1061 * Super fast pmap_pte routine best used when scanning 1062 * the pv lists. This eliminates many coarse-grained 1063 * invltlb calls. Note that many of the pv list 1064 * scans are across different pmaps. It is very wasteful 1065 * to do an entire invltlb for checking a single mapping. 1066 * 1067 * If the given pmap is not the current pmap, vm_page_queue_mtx 1068 * must be held and curthread pinned to a CPU. 1069 */ 1070static pt_entry_t * 1071pmap_pte_quick(pmap_t pmap, vm_offset_t va) 1072{ 1073 pd_entry_t newpf; 1074 pd_entry_t *pde; 1075 1076 pde = pmap_pde(pmap, va); 1077 if (*pde & PG_PS) 1078 return (pde); 1079 if (*pde != 0) { 1080 /* are we current address space or kernel? */ 1081 if (pmap_is_current(pmap)) 1082 return (vtopte(va)); 1083 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1084 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 1085 newpf = *pde & PG_FRAME; 1086 if ((*PMAP1 & PG_FRAME) != newpf) { 1087 PT_SET_MA(PADDR1, newpf | PG_V | PG_A | PG_M); 1088 CTR3(KTR_PMAP, "pmap_pte_quick: pmap=%p va=0x%x newpte=0x%08x", 1089 pmap, va, (u_long)*PMAP1); 1090 1091#ifdef SMP 1092 PMAP1cpu = PCPU_GET(cpuid); 1093#endif 1094 PMAP1changed++; 1095 } else 1096#ifdef SMP 1097 if (PMAP1cpu != PCPU_GET(cpuid)) { 1098 PMAP1cpu = PCPU_GET(cpuid); 1099 invlcaddr(PADDR1); 1100 PMAP1changedcpu++; 1101 } else 1102#endif 1103 PMAP1unchanged++; 1104 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1))); 1105 } 1106 return (0); 1107} 1108 1109/* 1110 * Routine: pmap_extract 1111 * Function: 1112 * Extract the physical page address associated 1113 * with the given map/virtual_address pair. 1114 */ 1115vm_paddr_t 1116pmap_extract(pmap_t pmap, vm_offset_t va) 1117{ 1118 vm_paddr_t rtval; 1119 pt_entry_t *pte; 1120 pd_entry_t pde; 1121 pt_entry_t pteval; 1122 1123 rtval = 0; 1124 PMAP_LOCK(pmap); 1125 pde = pmap->pm_pdir[va >> PDRSHIFT]; 1126 if (pde != 0) { 1127 if ((pde & PG_PS) != 0) { 1128 rtval = xpmap_mtop(pde & PG_PS_FRAME) | (va & PDRMASK); 1129 PMAP_UNLOCK(pmap); 1130 return rtval; 1131 } 1132 pte = pmap_pte(pmap, va); 1133 pteval = *pte ? xpmap_mtop(*pte) : 0; 1134 rtval = (pteval & PG_FRAME) | (va & PAGE_MASK); 1135 pmap_pte_release(pte); 1136 } 1137 PMAP_UNLOCK(pmap); 1138 return (rtval); 1139} 1140 1141/* 1142 * Routine: pmap_extract_ma 1143 * Function: 1144 * Like pmap_extract, but returns machine address 1145 */ 1146vm_paddr_t 1147pmap_extract_ma(pmap_t pmap, vm_offset_t va) 1148{ 1149 vm_paddr_t rtval; 1150 pt_entry_t *pte; 1151 pd_entry_t pde; 1152 1153 rtval = 0; 1154 PMAP_LOCK(pmap); 1155 pde = pmap->pm_pdir[va >> PDRSHIFT]; 1156 if (pde != 0) { 1157 if ((pde & PG_PS) != 0) { 1158 rtval = (pde & ~PDRMASK) | (va & PDRMASK); 1159 PMAP_UNLOCK(pmap); 1160 return rtval; 1161 } 1162 pte = pmap_pte(pmap, va); 1163 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK); 1164 pmap_pte_release(pte); 1165 } 1166 PMAP_UNLOCK(pmap); 1167 return (rtval); 1168} 1169 1170/* 1171 * Routine: pmap_extract_and_hold 1172 * Function: 1173 * Atomically extract and hold the physical page 1174 * with the given pmap and virtual address pair 1175 * if that mapping permits the given protection. 1176 */ 1177vm_page_t 1178pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 1179{ 1180 pd_entry_t pde; 1181 pt_entry_t pte; 1182 vm_page_t m; 1183 1184 m = NULL; 1185 vm_page_lock_queues(); 1186 PMAP_LOCK(pmap); 1187 pde = PT_GET(pmap_pde(pmap, va)); 1188 if (pde != 0) { 1189 if (pde & PG_PS) { 1190 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) { 1191 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) | 1192 (va & PDRMASK)); 1193 vm_page_hold(m); 1194 } 1195 } else { 1196 sched_pin(); 1197 pte = PT_GET(pmap_pte_quick(pmap, va)); 1198 if (*PMAP1) 1199 PT_SET_MA(PADDR1, 0); 1200 if ((pte & PG_V) && 1201 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) { 1202 m = PHYS_TO_VM_PAGE(pte & PG_FRAME); 1203 vm_page_hold(m); 1204 } 1205 sched_unpin(); 1206 } 1207 } 1208 vm_page_unlock_queues(); 1209 PMAP_UNLOCK(pmap); 1210 return (m); 1211} 1212 1213/*************************************************** 1214 * Low level mapping routines..... 1215 ***************************************************/ 1216 1217/* 1218 * Add a wired page to the kva. 1219 * Note: not SMP coherent. 1220 */ 1221void 1222pmap_kenter(vm_offset_t va, vm_paddr_t pa) 1223{ 1224 PT_SET_MA(va, xpmap_ptom(pa)| PG_RW | PG_V | pgeflag); 1225} 1226 1227void 1228pmap_kenter_ma(vm_offset_t va, vm_paddr_t ma) 1229{ 1230 pt_entry_t *pte; 1231 1232 pte = vtopte(va); 1233 pte_store_ma(pte, ma | PG_RW | PG_V | pgeflag); 1234} 1235 1236 1237static __inline void 1238pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode) 1239{ 1240 PT_SET_MA(va, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0)); 1241} 1242 1243/* 1244 * Remove a page from the kernel pagetables. 1245 * Note: not SMP coherent. 1246 */ 1247PMAP_INLINE void 1248pmap_kremove(vm_offset_t va) 1249{ 1250 pt_entry_t *pte; 1251 1252 pte = vtopte(va); 1253 PT_CLEAR_VA(pte, FALSE); 1254} 1255 1256/* 1257 * Used to map a range of physical addresses into kernel 1258 * virtual address space. 1259 * 1260 * The value passed in '*virt' is a suggested virtual address for 1261 * the mapping. Architectures which can support a direct-mapped 1262 * physical to virtual region can return the appropriate address 1263 * within that region, leaving '*virt' unchanged. Other 1264 * architectures should map the pages starting at '*virt' and 1265 * update '*virt' with the first usable address after the mapped 1266 * region. 1267 */ 1268vm_offset_t 1269pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 1270{ 1271 vm_offset_t va, sva; 1272 1273 va = sva = *virt; 1274 CTR4(KTR_PMAP, "pmap_map: va=0x%x start=0x%jx end=0x%jx prot=0x%x", 1275 va, start, end, prot); 1276 while (start < end) { 1277 pmap_kenter(va, start); 1278 va += PAGE_SIZE; 1279 start += PAGE_SIZE; 1280 } 1281 pmap_invalidate_range(kernel_pmap, sva, va); 1282 *virt = va; 1283 return (sva); 1284} 1285 1286 1287/* 1288 * Add a list of wired pages to the kva 1289 * this routine is only used for temporary 1290 * kernel mappings that do not need to have 1291 * page modification or references recorded. 1292 * Note that old mappings are simply written 1293 * over. The page *must* be wired. 1294 * Note: SMP coherent. Uses a ranged shootdown IPI. 1295 */ 1296void 1297pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count) 1298{ 1299 pt_entry_t *endpte, *pte; 1300 vm_paddr_t pa; 1301 vm_offset_t va = sva; 1302 int mclcount = 0; 1303 multicall_entry_t mcl[16]; 1304 multicall_entry_t *mclp = mcl; 1305 int error; 1306 1307 CTR2(KTR_PMAP, "pmap_qenter:sva=0x%x count=%d", va, count); 1308 pte = vtopte(sva); 1309 endpte = pte + count; 1310 while (pte < endpte) { 1311 pa = xpmap_ptom(VM_PAGE_TO_PHYS(*ma)) | pgeflag | PG_RW | PG_V | PG_M | PG_A; 1312 1313 mclp->op = __HYPERVISOR_update_va_mapping; 1314 mclp->args[0] = va; 1315 mclp->args[1] = (uint32_t)(pa & 0xffffffff); 1316 mclp->args[2] = (uint32_t)(pa >> 32); 1317 mclp->args[3] = (*pte & PG_V) ? UVMF_INVLPG|UVMF_ALL : 0; 1318 1319 va += PAGE_SIZE; 1320 pte++; 1321 ma++; 1322 mclp++; 1323 mclcount++; 1324 if (mclcount == 16) { 1325 error = HYPERVISOR_multicall(mcl, mclcount); 1326 mclp = mcl; 1327 mclcount = 0; 1328 KASSERT(error == 0, ("bad multicall %d", error)); 1329 } 1330 } 1331 if (mclcount) { 1332 error = HYPERVISOR_multicall(mcl, mclcount); 1333 KASSERT(error == 0, ("bad multicall %d", error)); 1334 } 1335 1336#ifdef INVARIANTS 1337 for (pte = vtopte(sva), mclcount = 0; mclcount < count; mclcount++, pte++) 1338 KASSERT(*pte, ("pte not set for va=0x%x", sva + mclcount*PAGE_SIZE)); 1339#endif 1340} 1341 1342 1343/* 1344 * This routine tears out page mappings from the 1345 * kernel -- it is meant only for temporary mappings. 1346 * Note: SMP coherent. Uses a ranged shootdown IPI. 1347 */ 1348void 1349pmap_qremove(vm_offset_t sva, int count) 1350{ 1351 vm_offset_t va; 1352 1353 CTR2(KTR_PMAP, "pmap_qremove: sva=0x%x count=%d", sva, count); 1354 va = sva; 1355 vm_page_lock_queues(); 1356 critical_enter(); 1357 while (count-- > 0) { 1358 pmap_kremove(va); 1359 va += PAGE_SIZE; 1360 } 1361 pmap_invalidate_range(kernel_pmap, sva, va); 1362 critical_exit(); 1363 vm_page_unlock_queues(); 1364} 1365 1366/*************************************************** 1367 * Page table page management routines..... 1368 ***************************************************/ 1369static __inline void 1370pmap_free_zero_pages(vm_page_t free) 1371{ 1372 vm_page_t m; 1373 1374 while (free != NULL) { 1375 m = free; 1376 free = m->right; 1377 vm_page_free_zero(m); 1378 } 1379} 1380 1381/* 1382 * This routine unholds page table pages, and if the hold count 1383 * drops to zero, then it decrements the wire count. 1384 */ 1385static __inline int 1386pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1387{ 1388 1389 --m->wire_count; 1390 if (m->wire_count == 0) 1391 return _pmap_unwire_pte_hold(pmap, m, free); 1392 else 1393 return 0; 1394} 1395 1396static int 1397_pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1398{ 1399 vm_offset_t pteva; 1400 1401 PT_UPDATES_FLUSH(); 1402 /* 1403 * unmap the page table page 1404 */ 1405 xen_pt_unpin(pmap->pm_pdir[m->pindex]); 1406 /* 1407 * page *might* contain residual mapping :-/ 1408 */ 1409 PD_CLEAR_VA(pmap, m->pindex, TRUE); 1410 pmap_zero_page(m); 1411 --pmap->pm_stats.resident_count; 1412 1413 /* 1414 * This is a release store so that the ordinary store unmapping 1415 * the page table page is globally performed before TLB shoot- 1416 * down is begun. 1417 */ 1418 atomic_subtract_rel_int(&cnt.v_wire_count, 1); 1419 1420 /* 1421 * Do an invltlb to make the invalidated mapping 1422 * take effect immediately. 1423 */ 1424 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1425 pmap_invalidate_page(pmap, pteva); 1426 1427 /* 1428 * Put page on a list so that it is released after 1429 * *ALL* TLB shootdown is done 1430 */ 1431 m->right = *free; 1432 *free = m; 1433 1434 return 1; 1435} 1436 1437/* 1438 * After removing a page table entry, this routine is used to 1439 * conditionally free the page, and manage the hold/wire counts. 1440 */ 1441static int 1442pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free) 1443{ 1444 pd_entry_t ptepde; 1445 vm_page_t mpte; 1446 1447 if (va >= VM_MAXUSER_ADDRESS) 1448 return 0; 1449 ptepde = PT_GET(pmap_pde(pmap, va)); 1450 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); 1451 return pmap_unwire_pte_hold(pmap, mpte, free); 1452} 1453 1454void 1455pmap_pinit0(pmap_t pmap) 1456{ 1457 1458 PMAP_LOCK_INIT(pmap); 1459 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1460#ifdef PAE 1461 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1462#endif 1463 pmap->pm_active = 0; 1464 PCPU_SET(curpmap, pmap); 1465 TAILQ_INIT(&pmap->pm_pvchunk); 1466 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1467 mtx_lock_spin(&allpmaps_lock); 1468 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1469 mtx_unlock_spin(&allpmaps_lock); 1470} 1471 1472/* 1473 * Initialize a preallocated and zeroed pmap structure, 1474 * such as one in a vmspace structure. 1475 */ 1476int 1477pmap_pinit(pmap_t pmap) 1478{ 1479 vm_page_t m, ptdpg[NPGPTD + 1]; 1480 int npgptd = NPGPTD + 1; 1481 static int color; 1482 int i; 1483 1484 PMAP_LOCK_INIT(pmap); 1485 1486 /* 1487 * No need to allocate page table space yet but we do need a valid 1488 * page directory table. 1489 */ 1490 if (pmap->pm_pdir == NULL) { 1491 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1492 NBPTD); 1493 if (pmap->pm_pdir == NULL) { 1494 PMAP_LOCK_DESTROY(pmap); 1495 return (0); 1496 } 1497#if defined(XEN) && defined(PAE) 1498 pmap->pm_pdpt = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1); 1499#endif 1500 1501#if defined(PAE) && !defined(XEN) 1502 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO); 1503 KASSERT(((vm_offset_t)pmap->pm_pdpt & 1504 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0, 1505 ("pmap_pinit: pdpt misaligned")); 1506 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30), 1507 ("pmap_pinit: pdpt above 4g")); 1508#endif 1509 } 1510 1511 /* 1512 * allocate the page directory page(s) 1513 */ 1514 for (i = 0; i < npgptd;) { 1515 m = vm_page_alloc(NULL, color++, 1516 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1517 VM_ALLOC_ZERO); 1518 if (m == NULL) 1519 VM_WAIT; 1520 else { 1521 ptdpg[i++] = m; 1522 } 1523 } 1524 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1525 for (i = 0; i < NPGPTD; i++) { 1526 if ((ptdpg[i]->flags & PG_ZERO) == 0) 1527 pagezero(&pmap->pm_pdir[i*NPTEPG]); 1528 } 1529 1530 mtx_lock_spin(&allpmaps_lock); 1531 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1532 mtx_unlock_spin(&allpmaps_lock); 1533 /* Wire in kernel global address entries. */ 1534 1535 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1536#ifdef PAE 1537#ifdef XEN 1538 pmap_qenter((vm_offset_t)pmap->pm_pdpt, &ptdpg[NPGPTD], 1); 1539 if ((ptdpg[NPGPTD]->flags & PG_ZERO) == 0) 1540 bzero(pmap->pm_pdpt, PAGE_SIZE); 1541#endif 1542 for (i = 0; i < NPGPTD; i++) { 1543 vm_paddr_t ma; 1544 1545 ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1546 pmap->pm_pdpt[i] = ma | PG_V; 1547 1548 } 1549#endif 1550#ifdef XEN 1551 for (i = 0; i < NPGPTD; i++) { 1552 pt_entry_t *pd; 1553 vm_paddr_t ma; 1554 1555 ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1556 pd = pmap->pm_pdir + (i * NPDEPG); 1557 PT_SET_MA(pd, *vtopte((vm_offset_t)pd) & ~(PG_M|PG_A|PG_U|PG_RW)); 1558#if 0 1559 xen_pgd_pin(ma); 1560#endif 1561 } 1562 1563#ifdef PAE 1564 PT_SET_MA(pmap->pm_pdpt, *vtopte((vm_offset_t)pmap->pm_pdpt) & ~PG_RW); 1565#endif 1566 vm_page_lock_queues(); 1567 xen_flush_queue(); 1568 xen_pgdpt_pin(xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[NPGPTD]))); 1569 for (i = 0; i < NPGPTD; i++) { 1570 vm_paddr_t ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1571 PT_SET_VA_MA(&pmap->pm_pdir[PTDPTDI + i], ma | PG_V | PG_A, FALSE); 1572 } 1573 xen_flush_queue(); 1574 vm_page_unlock_queues(); 1575#endif 1576 pmap->pm_active = 0; 1577 TAILQ_INIT(&pmap->pm_pvchunk); 1578 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1579 1580 return (1); 1581} 1582 1583/* 1584 * this routine is called if the page table page is not 1585 * mapped correctly. 1586 */ 1587static vm_page_t 1588_pmap_allocpte(pmap_t pmap, unsigned int ptepindex, int flags) 1589{ 1590 vm_paddr_t ptema; 1591 vm_page_t m; 1592 1593 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1594 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1595 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1596 1597 /* 1598 * Allocate a page table page. 1599 */ 1600 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1601 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1602 if (flags & M_WAITOK) { 1603 PMAP_UNLOCK(pmap); 1604 vm_page_unlock_queues(); 1605 VM_WAIT; 1606 vm_page_lock_queues(); 1607 PMAP_LOCK(pmap); 1608 } 1609 1610 /* 1611 * Indicate the need to retry. While waiting, the page table 1612 * page may have been allocated. 1613 */ 1614 return (NULL); 1615 } 1616 if ((m->flags & PG_ZERO) == 0) 1617 pmap_zero_page(m); 1618 1619 /* 1620 * Map the pagetable page into the process address space, if 1621 * it isn't already there. 1622 */ 1623 pmap->pm_stats.resident_count++; 1624 1625 ptema = xpmap_ptom(VM_PAGE_TO_PHYS(m)); 1626 xen_pt_pin(ptema); 1627 PT_SET_VA_MA(&pmap->pm_pdir[ptepindex], 1628 (ptema | PG_U | PG_RW | PG_V | PG_A | PG_M), TRUE); 1629 1630 KASSERT(pmap->pm_pdir[ptepindex], 1631 ("_pmap_allocpte: ptepindex=%d did not get mapped", ptepindex)); 1632 return (m); 1633} 1634 1635static vm_page_t 1636pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags) 1637{ 1638 unsigned ptepindex; 1639 pd_entry_t ptema; 1640 vm_page_t m; 1641 1642 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1643 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1644 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1645 1646 /* 1647 * Calculate pagetable page index 1648 */ 1649 ptepindex = va >> PDRSHIFT; 1650retry: 1651 /* 1652 * Get the page directory entry 1653 */ 1654 ptema = pmap->pm_pdir[ptepindex]; 1655 1656 /* 1657 * This supports switching from a 4MB page to a 1658 * normal 4K page. 1659 */ 1660 if (ptema & PG_PS) { 1661 /* 1662 * XXX 1663 */ 1664 pmap->pm_pdir[ptepindex] = 0; 1665 ptema = 0; 1666 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1667 pmap_invalidate_all(kernel_pmap); 1668 } 1669 1670 /* 1671 * If the page table page is mapped, we just increment the 1672 * hold count, and activate it. 1673 */ 1674 if (ptema & PG_V) { 1675 m = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME); 1676 m->wire_count++; 1677 } else { 1678 /* 1679 * Here if the pte page isn't mapped, or if it has 1680 * been deallocated. 1681 */ 1682 CTR3(KTR_PMAP, "pmap_allocpte: pmap=%p va=0x%08x flags=0x%x", 1683 pmap, va, flags); 1684 m = _pmap_allocpte(pmap, ptepindex, flags); 1685 if (m == NULL && (flags & M_WAITOK)) 1686 goto retry; 1687 1688 KASSERT(pmap->pm_pdir[ptepindex], ("ptepindex=%d did not get mapped", ptepindex)); 1689 } 1690 return (m); 1691} 1692 1693 1694/*************************************************** 1695* Pmap allocation/deallocation routines. 1696 ***************************************************/ 1697 1698#ifdef SMP 1699/* 1700 * Deal with a SMP shootdown of other users of the pmap that we are 1701 * trying to dispose of. This can be a bit hairy. 1702 */ 1703static u_int *lazymask; 1704static u_int lazyptd; 1705static volatile u_int lazywait; 1706 1707void pmap_lazyfix_action(void); 1708 1709void 1710pmap_lazyfix_action(void) 1711{ 1712 u_int mymask = PCPU_GET(cpumask); 1713 1714#ifdef COUNT_IPIS 1715 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++; 1716#endif 1717 if (rcr3() == lazyptd) 1718 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1719 atomic_clear_int(lazymask, mymask); 1720 atomic_store_rel_int(&lazywait, 1); 1721} 1722 1723static void 1724pmap_lazyfix_self(u_int mymask) 1725{ 1726 1727 if (rcr3() == lazyptd) 1728 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1729 atomic_clear_int(lazymask, mymask); 1730} 1731 1732 1733static void 1734pmap_lazyfix(pmap_t pmap) 1735{ 1736 u_int mymask; 1737 u_int mask; 1738 u_int spins; 1739 1740 while ((mask = pmap->pm_active) != 0) { 1741 spins = 50000000; 1742 mask = mask & -mask; /* Find least significant set bit */ 1743 mtx_lock_spin(&smp_ipi_mtx); 1744#ifdef PAE 1745 lazyptd = vtophys(pmap->pm_pdpt); 1746#else 1747 lazyptd = vtophys(pmap->pm_pdir); 1748#endif 1749 mymask = PCPU_GET(cpumask); 1750 if (mask == mymask) { 1751 lazymask = &pmap->pm_active; 1752 pmap_lazyfix_self(mymask); 1753 } else { 1754 atomic_store_rel_int((u_int *)&lazymask, 1755 (u_int)&pmap->pm_active); 1756 atomic_store_rel_int(&lazywait, 0); 1757 ipi_selected(mask, IPI_LAZYPMAP); 1758 while (lazywait == 0) { 1759 ia32_pause(); 1760 if (--spins == 0) 1761 break; 1762 } 1763 } 1764 mtx_unlock_spin(&smp_ipi_mtx); 1765 if (spins == 0) 1766 printf("pmap_lazyfix: spun for 50000000\n"); 1767 } 1768} 1769 1770#else /* SMP */ 1771 1772/* 1773 * Cleaning up on uniprocessor is easy. For various reasons, we're 1774 * unlikely to have to even execute this code, including the fact 1775 * that the cleanup is deferred until the parent does a wait(2), which 1776 * means that another userland process has run. 1777 */ 1778static void 1779pmap_lazyfix(pmap_t pmap) 1780{ 1781 u_int cr3; 1782 1783 cr3 = vtophys(pmap->pm_pdir); 1784 if (cr3 == rcr3()) { 1785 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1786 pmap->pm_active &= ~(PCPU_GET(cpumask)); 1787 } 1788} 1789#endif /* SMP */ 1790 1791/* 1792 * Release any resources held by the given physical map. 1793 * Called when a pmap initialized by pmap_pinit is being released. 1794 * Should only be called if the map contains no valid mappings. 1795 */ 1796void 1797pmap_release(pmap_t pmap) 1798{ 1799 vm_page_t m, ptdpg[2*NPGPTD+1]; 1800 vm_paddr_t ma; 1801 int i; 1802#ifdef XEN 1803#ifdef PAE 1804 int npgptd = NPGPTD + 1; 1805#else 1806 int npgptd = NPGPTD; 1807#endif 1808#else 1809 int npgptd = NPGPTD; 1810#endif 1811 KASSERT(pmap->pm_stats.resident_count == 0, 1812 ("pmap_release: pmap resident count %ld != 0", 1813 pmap->pm_stats.resident_count)); 1814 PT_UPDATES_FLUSH(); 1815 1816 pmap_lazyfix(pmap); 1817 mtx_lock_spin(&allpmaps_lock); 1818 LIST_REMOVE(pmap, pm_list); 1819 mtx_unlock_spin(&allpmaps_lock); 1820 1821 for (i = 0; i < NPGPTD; i++) 1822 ptdpg[i] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdir + (i*NPDEPG)) & PG_FRAME); 1823 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1824#if defined(PAE) && defined(XEN) 1825 ptdpg[NPGPTD] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdpt)); 1826#endif 1827 1828 for (i = 0; i < npgptd; i++) { 1829 m = ptdpg[i]; 1830 ma = xpmap_ptom(VM_PAGE_TO_PHYS(m)); 1831 /* unpinning L1 and L2 treated the same */ 1832 xen_pgd_unpin(ma); 1833#ifdef PAE 1834 KASSERT(xpmap_ptom(VM_PAGE_TO_PHYS(m)) == (pmap->pm_pdpt[i] & PG_FRAME), 1835 ("pmap_release: got wrong ptd page")); 1836#endif 1837 m->wire_count--; 1838 atomic_subtract_int(&cnt.v_wire_count, 1); 1839 vm_page_free(m); 1840 } 1841 PMAP_LOCK_DESTROY(pmap); 1842} 1843 1844static int 1845kvm_size(SYSCTL_HANDLER_ARGS) 1846{ 1847 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1848 1849 return sysctl_handle_long(oidp, &ksize, 0, req); 1850} 1851SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1852 0, 0, kvm_size, "IU", "Size of KVM"); 1853 1854static int 1855kvm_free(SYSCTL_HANDLER_ARGS) 1856{ 1857 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1858 1859 return sysctl_handle_long(oidp, &kfree, 0, req); 1860} 1861SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1862 0, 0, kvm_free, "IU", "Amount of KVM free"); 1863 1864/* 1865 * grow the number of kernel page table entries, if needed 1866 */ 1867void 1868pmap_growkernel(vm_offset_t addr) 1869{ 1870 struct pmap *pmap; 1871 vm_paddr_t ptppaddr; 1872 vm_page_t nkpg; 1873 pd_entry_t newpdir; 1874 1875 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1876 if (kernel_vm_end == 0) { 1877 kernel_vm_end = KERNBASE; 1878 nkpt = 0; 1879 while (pdir_pde(PTD, kernel_vm_end)) { 1880 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1881 nkpt++; 1882 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1883 kernel_vm_end = kernel_map->max_offset; 1884 break; 1885 } 1886 } 1887 } 1888 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1889 if (addr - 1 >= kernel_map->max_offset) 1890 addr = kernel_map->max_offset; 1891 while (kernel_vm_end < addr) { 1892 if (pdir_pde(PTD, kernel_vm_end)) { 1893 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1894 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1895 kernel_vm_end = kernel_map->max_offset; 1896 break; 1897 } 1898 continue; 1899 } 1900 1901 /* 1902 * This index is bogus, but out of the way 1903 */ 1904 nkpg = vm_page_alloc(NULL, nkpt, 1905 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1906 if (!nkpg) 1907 panic("pmap_growkernel: no memory to grow kernel"); 1908 1909 nkpt++; 1910 1911 pmap_zero_page(nkpg); 1912 ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1913 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1914 vm_page_lock_queues(); 1915 PD_SET_VA(kernel_pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE); 1916 mtx_lock_spin(&allpmaps_lock); 1917 LIST_FOREACH(pmap, &allpmaps, pm_list) 1918 PD_SET_VA(pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE); 1919 1920 mtx_unlock_spin(&allpmaps_lock); 1921 vm_page_unlock_queues(); 1922 1923 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1924 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1925 kernel_vm_end = kernel_map->max_offset; 1926 break; 1927 } 1928 } 1929} 1930 1931 1932/*************************************************** 1933 * page management routines. 1934 ***************************************************/ 1935 1936CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE); 1937CTASSERT(_NPCM == 11); 1938 1939static __inline struct pv_chunk * 1940pv_to_chunk(pv_entry_t pv) 1941{ 1942 1943 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK); 1944} 1945 1946#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap) 1947 1948#define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */ 1949#define PC_FREE10 0x0000fffful /* Free values for index 10 */ 1950 1951static uint32_t pc_freemask[11] = { 1952 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1953 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1954 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1955 PC_FREE0_9, PC_FREE10 1956}; 1957 1958SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0, 1959 "Current number of pv entries"); 1960 1961#ifdef PV_STATS 1962static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail; 1963 1964SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0, 1965 "Current number of pv entry chunks"); 1966SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0, 1967 "Current number of pv entry chunks allocated"); 1968SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0, 1969 "Current number of pv entry chunks frees"); 1970SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0, 1971 "Number of times tried to get a chunk page but failed."); 1972 1973static long pv_entry_frees, pv_entry_allocs; 1974static int pv_entry_spare; 1975 1976SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0, 1977 "Current number of pv entry frees"); 1978SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0, 1979 "Current number of pv entry allocs"); 1980SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0, 1981 "Current number of spare pv entries"); 1982 1983static int pmap_collect_inactive, pmap_collect_active; 1984 1985SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0, 1986 "Current number times pmap_collect called on inactive queue"); 1987SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0, 1988 "Current number times pmap_collect called on active queue"); 1989#endif 1990 1991/* 1992 * We are in a serious low memory condition. Resort to 1993 * drastic measures to free some pages so we can allocate 1994 * another pv entry chunk. This is normally called to 1995 * unmap inactive pages, and if necessary, active pages. 1996 */ 1997static void 1998pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq) 1999{ 2000 pmap_t pmap; 2001 pt_entry_t *pte, tpte; 2002 pv_entry_t next_pv, pv; 2003 vm_offset_t va; 2004 vm_page_t m, free; 2005 2006 sched_pin(); 2007 TAILQ_FOREACH(m, &vpq->pl, pageq) { 2008 if (m->hold_count || m->busy) 2009 continue; 2010 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) { 2011 va = pv->pv_va; 2012 pmap = PV_PMAP(pv); 2013 /* Avoid deadlock and lock recursion. */ 2014 if (pmap > locked_pmap) 2015 PMAP_LOCK(pmap); 2016 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) 2017 continue; 2018 pmap->pm_stats.resident_count--; 2019 pte = pmap_pte_quick(pmap, va); 2020 tpte = pte_load_clear(pte); 2021 KASSERT((tpte & PG_W) == 0, 2022 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte)); 2023 if (tpte & PG_A) 2024 vm_page_flag_set(m, PG_REFERENCED); 2025 if (tpte & PG_M) { 2026 KASSERT((tpte & PG_RW), 2027 ("pmap_collect: modified page not writable: va: %#x, pte: %#jx", 2028 va, (uintmax_t)tpte)); 2029 vm_page_dirty(m); 2030 } 2031 free = NULL; 2032 pmap_unuse_pt(pmap, va, &free); 2033 pmap_invalidate_page(pmap, va); 2034 pmap_free_zero_pages(free); 2035 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2036 if (TAILQ_EMPTY(&m->md.pv_list)) 2037 vm_page_flag_clear(m, PG_WRITEABLE); 2038 free_pv_entry(pmap, pv); 2039 if (pmap != locked_pmap) 2040 PMAP_UNLOCK(pmap); 2041 } 2042 } 2043 sched_unpin(); 2044} 2045 2046 2047/* 2048 * free the pv_entry back to the free list 2049 */ 2050static void 2051free_pv_entry(pmap_t pmap, pv_entry_t pv) 2052{ 2053 vm_page_t m; 2054 struct pv_chunk *pc; 2055 int idx, field, bit; 2056 2057 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2058 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2059 PV_STAT(pv_entry_frees++); 2060 PV_STAT(pv_entry_spare++); 2061 pv_entry_count--; 2062 pc = pv_to_chunk(pv); 2063 idx = pv - &pc->pc_pventry[0]; 2064 field = idx / 32; 2065 bit = idx % 32; 2066 pc->pc_map[field] |= 1ul << bit; 2067 /* move to head of list */ 2068 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2069 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2070 for (idx = 0; idx < _NPCM; idx++) 2071 if (pc->pc_map[idx] != pc_freemask[idx]) 2072 return; 2073 PV_STAT(pv_entry_spare -= _NPCPV); 2074 PV_STAT(pc_chunk_count--); 2075 PV_STAT(pc_chunk_frees++); 2076 /* entire chunk is free, return it */ 2077 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2078 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 2079 pmap_qremove((vm_offset_t)pc, 1); 2080 vm_page_unwire(m, 0); 2081 vm_page_free(m); 2082 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 2083} 2084 2085/* 2086 * get a new pv_entry, allocating a block from the system 2087 * when needed. 2088 */ 2089static pv_entry_t 2090get_pv_entry(pmap_t pmap, int try) 2091{ 2092 static const struct timeval printinterval = { 60, 0 }; 2093 static struct timeval lastprint; 2094 static vm_pindex_t colour; 2095 struct vpgqueues *pq; 2096 int bit, field; 2097 pv_entry_t pv; 2098 struct pv_chunk *pc; 2099 vm_page_t m; 2100 2101 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2102 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2103 PV_STAT(pv_entry_allocs++); 2104 pv_entry_count++; 2105 if (pv_entry_count > pv_entry_high_water) 2106 if (ratecheck(&lastprint, &printinterval)) 2107 printf("Approaching the limit on PV entries, consider " 2108 "increasing either the vm.pmap.shpgperproc or the " 2109 "vm.pmap.pv_entry_max tunable.\n"); 2110 pq = NULL; 2111retry: 2112 pc = TAILQ_FIRST(&pmap->pm_pvchunk); 2113 if (pc != NULL) { 2114 for (field = 0; field < _NPCM; field++) { 2115 if (pc->pc_map[field]) { 2116 bit = bsfl(pc->pc_map[field]); 2117 break; 2118 } 2119 } 2120 if (field < _NPCM) { 2121 pv = &pc->pc_pventry[field * 32 + bit]; 2122 pc->pc_map[field] &= ~(1ul << bit); 2123 /* If this was the last item, move it to tail */ 2124 for (field = 0; field < _NPCM; field++) 2125 if (pc->pc_map[field] != 0) { 2126 PV_STAT(pv_entry_spare--); 2127 return (pv); /* not full, return */ 2128 } 2129 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2130 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); 2131 PV_STAT(pv_entry_spare--); 2132 return (pv); 2133 } 2134 } 2135 /* 2136 * Access to the ptelist "pv_vafree" is synchronized by the page 2137 * queues lock. If "pv_vafree" is currently non-empty, it will 2138 * remain non-empty until pmap_ptelist_alloc() completes. 2139 */ 2140 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq == 2141 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) | 2142 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) { 2143 if (try) { 2144 pv_entry_count--; 2145 PV_STAT(pc_chunk_tryfail++); 2146 return (NULL); 2147 } 2148 /* 2149 * Reclaim pv entries: At first, destroy mappings to 2150 * inactive pages. After that, if a pv chunk entry 2151 * is still needed, destroy mappings to active pages. 2152 */ 2153 if (pq == NULL) { 2154 PV_STAT(pmap_collect_inactive++); 2155 pq = &vm_page_queues[PQ_INACTIVE]; 2156 } else if (pq == &vm_page_queues[PQ_INACTIVE]) { 2157 PV_STAT(pmap_collect_active++); 2158 pq = &vm_page_queues[PQ_ACTIVE]; 2159 } else 2160 panic("get_pv_entry: increase vm.pmap.shpgperproc"); 2161 pmap_collect(pmap, pq); 2162 goto retry; 2163 } 2164 PV_STAT(pc_chunk_count++); 2165 PV_STAT(pc_chunk_allocs++); 2166 colour++; 2167 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 2168 pmap_qenter((vm_offset_t)pc, &m, 1); 2169 if ((m->flags & PG_ZERO) == 0) 2170 pagezero(pc); 2171 pc->pc_pmap = pmap; 2172 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */ 2173 for (field = 1; field < _NPCM; field++) 2174 pc->pc_map[field] = pc_freemask[field]; 2175 pv = &pc->pc_pventry[0]; 2176 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2177 PV_STAT(pv_entry_spare += _NPCPV - 1); 2178 return (pv); 2179} 2180 2181static void 2182pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 2183{ 2184 pv_entry_t pv; 2185 2186 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2187 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2188 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2189 if (pmap == PV_PMAP(pv) && va == pv->pv_va) 2190 break; 2191 } 2192 KASSERT(pv != NULL, ("pmap_remove_entry: pv not found")); 2193 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2194 if (TAILQ_EMPTY(&m->md.pv_list)) 2195 vm_page_flag_clear(m, PG_WRITEABLE); 2196 free_pv_entry(pmap, pv); 2197} 2198 2199/* 2200 * Create a pv entry for page at pa for 2201 * (pmap, va). 2202 */ 2203static void 2204pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2205{ 2206 pv_entry_t pv; 2207 2208 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2209 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2210 pv = get_pv_entry(pmap, FALSE); 2211 pv->pv_va = va; 2212 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2213} 2214 2215/* 2216 * Conditionally create a pv entry. 2217 */ 2218static boolean_t 2219pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2220{ 2221 pv_entry_t pv; 2222 2223 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2224 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2225 if (pv_entry_count < pv_entry_high_water && 2226 (pv = get_pv_entry(pmap, TRUE)) != NULL) { 2227 pv->pv_va = va; 2228 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2229 return (TRUE); 2230 } else 2231 return (FALSE); 2232} 2233 2234/* 2235 * pmap_remove_pte: do the things to unmap a page in a process 2236 */ 2237static int 2238pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free) 2239{ 2240 pt_entry_t oldpte; 2241 vm_page_t m; 2242 2243 CTR3(KTR_PMAP, "pmap_remove_pte: pmap=%p *ptq=0x%x va=0x%x", 2244 pmap, (u_long)*ptq, va); 2245 2246 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2247 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2248 oldpte = *ptq; 2249 PT_SET_VA_MA(ptq, 0, TRUE); 2250 if (oldpte & PG_W) 2251 pmap->pm_stats.wired_count -= 1; 2252 /* 2253 * Machines that don't support invlpg, also don't support 2254 * PG_G. 2255 */ 2256 if (oldpte & PG_G) 2257 pmap_invalidate_page(kernel_pmap, va); 2258 pmap->pm_stats.resident_count -= 1; 2259 /* 2260 * XXX This is not strictly correctly, but somewhere along the line 2261 * we are losing the managed bit on some pages. It is unclear to me 2262 * why, but I think the most likely explanation is that xen's writable 2263 * page table implementation doesn't respect the unused bits. 2264 */ 2265 if ((oldpte & PG_MANAGED) || ((oldpte & PG_V) && (va < VM_MAXUSER_ADDRESS)) 2266 ) { 2267 m = PHYS_TO_VM_PAGE(xpmap_mtop(oldpte) & PG_FRAME); 2268 2269 if (!(oldpte & PG_MANAGED)) 2270 printf("va=0x%x is unmanaged :-( pte=0x%llx\n", va, oldpte); 2271 2272 if (oldpte & PG_M) { 2273 KASSERT((oldpte & PG_RW), 2274 ("pmap_remove_pte: modified page not writable: va: %#x, pte: %#jx", 2275 va, (uintmax_t)oldpte)); 2276 vm_page_dirty(m); 2277 } 2278 if (oldpte & PG_A) 2279 vm_page_flag_set(m, PG_REFERENCED); 2280 pmap_remove_entry(pmap, m, va); 2281 } else if ((va < VM_MAXUSER_ADDRESS) && (oldpte & PG_V)) 2282 printf("va=0x%x is unmanaged :-( pte=0x%llx\n", va, oldpte); 2283 2284 return (pmap_unuse_pt(pmap, va, free)); 2285} 2286 2287/* 2288 * Remove a single page from a process address space 2289 */ 2290static void 2291pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free) 2292{ 2293 pt_entry_t *pte; 2294 2295 CTR2(KTR_PMAP, "pmap_remove_page: pmap=%p va=0x%x", 2296 pmap, va); 2297 2298 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2299 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 2300 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2301 if ((pte = pmap_pte_quick(pmap, va)) == NULL || (*pte & PG_V) == 0) 2302 return; 2303 pmap_remove_pte(pmap, pte, va, free); 2304 pmap_invalidate_page(pmap, va); 2305 if (*PMAP1) 2306 PT_SET_MA(PADDR1, 0); 2307 2308} 2309 2310/* 2311 * Remove the given range of addresses from the specified map. 2312 * 2313 * It is assumed that the start and end are properly 2314 * rounded to the page size. 2315 */ 2316void 2317pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 2318{ 2319 vm_offset_t pdnxt; 2320 pd_entry_t ptpaddr; 2321 pt_entry_t *pte; 2322 vm_page_t free = NULL; 2323 int anyvalid; 2324 2325 CTR3(KTR_PMAP, "pmap_remove: pmap=%p sva=0x%x eva=0x%x", 2326 pmap, sva, eva); 2327 2328 /* 2329 * Perform an unsynchronized read. This is, however, safe. 2330 */ 2331 if (pmap->pm_stats.resident_count == 0) 2332 return; 2333 2334 anyvalid = 0; 2335 2336 vm_page_lock_queues(); 2337 sched_pin(); 2338 PMAP_LOCK(pmap); 2339 2340 /* 2341 * special handling of removing one page. a very 2342 * common operation and easy to short circuit some 2343 * code. 2344 */ 2345 if ((sva + PAGE_SIZE == eva) && 2346 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 2347 pmap_remove_page(pmap, sva, &free); 2348 goto out; 2349 } 2350 2351 for (; sva < eva; sva = pdnxt) { 2352 unsigned pdirindex; 2353 2354 /* 2355 * Calculate index for next page table. 2356 */ 2357 pdnxt = (sva + NBPDR) & ~PDRMASK; 2358 if (pmap->pm_stats.resident_count == 0) 2359 break; 2360 2361 pdirindex = sva >> PDRSHIFT; 2362 ptpaddr = pmap->pm_pdir[pdirindex]; 2363 2364 /* 2365 * Weed out invalid mappings. Note: we assume that the page 2366 * directory table is always allocated, and in kernel virtual. 2367 */ 2368 if (ptpaddr == 0) 2369 continue; 2370 2371 /* 2372 * Check for large page. 2373 */ 2374 if ((ptpaddr & PG_PS) != 0) { 2375 PD_CLEAR_VA(pmap, pdirindex, TRUE); 2376 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 2377 anyvalid = 1; 2378 continue; 2379 } 2380 2381 /* 2382 * Limit our scan to either the end of the va represented 2383 * by the current page table page, or to the end of the 2384 * range being removed. 2385 */ 2386 if (pdnxt > eva) 2387 pdnxt = eva; 2388 2389 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2390 sva += PAGE_SIZE) { 2391 if ((*pte & PG_V) == 0) 2392 continue; 2393 2394 /* 2395 * The TLB entry for a PG_G mapping is invalidated 2396 * by pmap_remove_pte(). 2397 */ 2398 if ((*pte & PG_G) == 0) 2399 anyvalid = 1; 2400 if (pmap_remove_pte(pmap, pte, sva, &free)) 2401 break; 2402 } 2403 } 2404 PT_UPDATES_FLUSH(); 2405 if (*PMAP1) 2406 PT_SET_VA_MA(PMAP1, 0, TRUE); 2407out: 2408 if (anyvalid) 2409 pmap_invalidate_all(pmap); 2410 sched_unpin(); 2411 vm_page_unlock_queues(); 2412 PMAP_UNLOCK(pmap); 2413 pmap_free_zero_pages(free); 2414} 2415 2416/* 2417 * Routine: pmap_remove_all 2418 * Function: 2419 * Removes this physical page from 2420 * all physical maps in which it resides. 2421 * Reflects back modify bits to the pager. 2422 * 2423 * Notes: 2424 * Original versions of this routine were very 2425 * inefficient because they iteratively called 2426 * pmap_remove (slow...) 2427 */ 2428 2429void 2430pmap_remove_all(vm_page_t m) 2431{ 2432 pv_entry_t pv; 2433 pmap_t pmap; 2434 pt_entry_t *pte, tpte; 2435 vm_page_t free; 2436 2437#if defined(PMAP_DIAGNOSTIC) 2438 /* 2439 * XXX This makes pmap_remove_all() illegal for non-managed pages! 2440 */ 2441 if (m->flags & PG_FICTITIOUS) { 2442 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%jx", 2443 VM_PAGE_TO_PHYS(m) & 0xffffffff); 2444 } 2445#endif 2446 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2447 sched_pin(); 2448 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2449 pmap = PV_PMAP(pv); 2450 PMAP_LOCK(pmap); 2451 pmap->pm_stats.resident_count--; 2452 pte = pmap_pte_quick(pmap, pv->pv_va); 2453 2454 tpte = *pte; 2455 PT_SET_VA_MA(pte, 0, TRUE); 2456 if (tpte & PG_W) 2457 pmap->pm_stats.wired_count--; 2458 if (tpte & PG_A) 2459 vm_page_flag_set(m, PG_REFERENCED); 2460 2461 /* 2462 * Update the vm_page_t clean and reference bits. 2463 */ 2464 if (tpte & PG_M) { 2465 KASSERT((tpte & PG_RW), 2466 ("pmap_remove_all: modified page not writable: va: %#x, pte: %#jx", 2467 pv->pv_va, (uintmax_t)tpte)); 2468 vm_page_dirty(m); 2469 } 2470 free = NULL; 2471 pmap_unuse_pt(pmap, pv->pv_va, &free); 2472 pmap_invalidate_page(pmap, pv->pv_va); 2473 pmap_free_zero_pages(free); 2474 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2475 free_pv_entry(pmap, pv); 2476 PMAP_UNLOCK(pmap); 2477 } 2478 vm_page_flag_clear(m, PG_WRITEABLE); 2479 PT_UPDATES_FLUSH(); 2480 if (*PMAP1) 2481 PT_SET_MA(PADDR1, 0); 2482 sched_unpin(); 2483} 2484 2485/* 2486 * Set the physical protection on the 2487 * specified range of this map as requested. 2488 */ 2489void 2490pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 2491{ 2492 vm_offset_t pdnxt; 2493 pd_entry_t ptpaddr; 2494 pt_entry_t *pte; 2495 int anychanged; 2496 2497 CTR4(KTR_PMAP, "pmap_protect: pmap=%p sva=0x%x eva=0x%x prot=0x%x", 2498 pmap, sva, eva, prot); 2499 2500 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 2501 pmap_remove(pmap, sva, eva); 2502 return; 2503 } 2504 2505#ifdef PAE 2506 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) == 2507 (VM_PROT_WRITE|VM_PROT_EXECUTE)) 2508 return; 2509#else 2510 if (prot & VM_PROT_WRITE) 2511 return; 2512#endif 2513 2514 anychanged = 0; 2515 2516 vm_page_lock_queues(); 2517 sched_pin(); 2518 PMAP_LOCK(pmap); 2519 for (; sva < eva; sva = pdnxt) { 2520 pt_entry_t obits, pbits; 2521 unsigned pdirindex; 2522 2523 pdnxt = (sva + NBPDR) & ~PDRMASK; 2524 2525 pdirindex = sva >> PDRSHIFT; 2526 ptpaddr = pmap->pm_pdir[pdirindex]; 2527 2528 /* 2529 * Weed out invalid mappings. Note: we assume that the page 2530 * directory table is always allocated, and in kernel virtual. 2531 */ 2532 if (ptpaddr == 0) 2533 continue; 2534 2535 /* 2536 * Check for large page. 2537 */ 2538 if ((ptpaddr & PG_PS) != 0) { 2539 if ((prot & VM_PROT_WRITE) == 0) 2540 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW); 2541#ifdef PAE 2542 if ((prot & VM_PROT_EXECUTE) == 0) 2543 pmap->pm_pdir[pdirindex] |= pg_nx; 2544#endif 2545 anychanged = 1; 2546 continue; 2547 } 2548 2549 if (pdnxt > eva) 2550 pdnxt = eva; 2551 2552 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2553 sva += PAGE_SIZE) { 2554 vm_page_t m; 2555 2556retry: 2557 /* 2558 * Regardless of whether a pte is 32 or 64 bits in 2559 * size, PG_RW, PG_A, and PG_M are among the least 2560 * significant 32 bits. 2561 */ 2562 obits = pbits = *pte; 2563 if ((pbits & PG_V) == 0) 2564 continue; 2565 if (pbits & PG_MANAGED) { 2566 m = NULL; 2567 if (pbits & PG_A) { 2568 m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) & PG_FRAME); 2569 vm_page_flag_set(m, PG_REFERENCED); 2570 pbits &= ~PG_A; 2571 } 2572 if ((pbits & PG_M) != 0) { 2573 if (m == NULL) 2574 m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) & PG_FRAME); 2575 vm_page_dirty(m); 2576 } 2577 } 2578 2579 if ((prot & VM_PROT_WRITE) == 0) 2580 pbits &= ~(PG_RW | PG_M); 2581#ifdef PAE 2582 if ((prot & VM_PROT_EXECUTE) == 0) 2583 pbits |= pg_nx; 2584#endif 2585 2586 if (pbits != obits) { 2587#ifdef XEN 2588 obits = *pte; 2589 PT_SET_VA_MA(pte, pbits, TRUE); 2590 if (*pte != pbits) 2591 goto retry; 2592#else 2593#ifdef PAE 2594 if (!atomic_cmpset_64(pte, obits, pbits)) 2595 goto retry; 2596#else 2597 if (!atomic_cmpset_int((u_int *)pte, obits, 2598 pbits)) 2599 goto retry; 2600#endif 2601#endif 2602 if (obits & PG_G) 2603 pmap_invalidate_page(pmap, sva); 2604 else 2605 anychanged = 1; 2606 } 2607 } 2608 } 2609 PT_UPDATES_FLUSH(); 2610 if (*PMAP1) 2611 PT_SET_VA_MA(PMAP1, 0, TRUE); 2612 if (anychanged) 2613 pmap_invalidate_all(pmap); 2614 sched_unpin(); 2615 vm_page_unlock_queues(); 2616 PMAP_UNLOCK(pmap); 2617} 2618 2619/* 2620 * Insert the given physical page (p) at 2621 * the specified virtual address (v) in the 2622 * target physical map with the protection requested. 2623 * 2624 * If specified, the page will be wired down, meaning 2625 * that the related pte can not be reclaimed. 2626 * 2627 * NB: This is the only routine which MAY NOT lazy-evaluate 2628 * or lose information. That is, this routine must actually 2629 * insert this page into the given map NOW. 2630 */ 2631void 2632pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m, 2633 vm_prot_t prot, boolean_t wired) 2634{ 2635 vm_paddr_t pa; 2636 pd_entry_t *pde; 2637 pt_entry_t *pte; 2638 vm_paddr_t opa; 2639 pt_entry_t origpte, newpte; 2640 vm_page_t mpte, om; 2641 boolean_t invlva; 2642 2643 CTR6(KTR_PMAP, "pmap_enter: pmap=%08p va=0x%08x access=0x%x ma=0x%08x prot=0x%x wired=%d", 2644 pmap, va, access, xpmap_ptom(VM_PAGE_TO_PHYS(m)), prot, wired); 2645 va = trunc_page(va); 2646#ifdef PMAP_DIAGNOSTIC 2647 if (va > VM_MAX_KERNEL_ADDRESS) 2648 panic("pmap_enter: toobig"); 2649 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS)) 2650 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va); 2651#endif 2652 2653 mpte = NULL; 2654 2655 vm_page_lock_queues(); 2656 PMAP_LOCK(pmap); 2657 sched_pin(); 2658 2659 /* 2660 * In the case that a page table page is not 2661 * resident, we are creating it here. 2662 */ 2663 if (va < VM_MAXUSER_ADDRESS) { 2664 mpte = pmap_allocpte(pmap, va, M_WAITOK); 2665 } 2666#if 0 && defined(PMAP_DIAGNOSTIC) 2667 else { 2668 pd_entry_t *pdeaddr = pmap_pde(pmap, va); 2669 origpte = *pdeaddr; 2670 if ((origpte & PG_V) == 0) { 2671 panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n", 2672 pmap->pm_pdir[PTDPTDI], origpte, va); 2673 } 2674 } 2675#endif 2676 2677 pde = pmap_pde(pmap, va); 2678 if ((*pde & PG_PS) != 0) 2679 panic("pmap_enter: attempted pmap_enter on 4MB page"); 2680 pte = pmap_pte_quick(pmap, va); 2681 2682 /* 2683 * Page Directory table entry not valid, we need a new PT page 2684 */ 2685 if (pte == NULL) { 2686 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n", 2687 (uintmax_t)pmap->pm_pdir[va >> PDRSHIFT], va); 2688 } 2689 2690 pa = VM_PAGE_TO_PHYS(m); 2691 om = NULL; 2692 opa = origpte = 0; 2693 2694#if 0 2695 KASSERT((*pte & PG_V) || (*pte == 0), ("address set but not valid pte=%p *pte=0x%016jx", 2696 pte, *pte)); 2697#endif 2698 origpte = *pte; 2699 if (origpte) 2700 origpte = xpmap_mtop(origpte); 2701 opa = origpte & PG_FRAME; 2702 2703 /* 2704 * Mapping has not changed, must be protection or wiring change. 2705 */ 2706 if (origpte && (opa == pa)) { 2707 /* 2708 * Wiring change, just update stats. We don't worry about 2709 * wiring PT pages as they remain resident as long as there 2710 * are valid mappings in them. Hence, if a user page is wired, 2711 * the PT page will be also. 2712 */ 2713 if (wired && ((origpte & PG_W) == 0)) 2714 pmap->pm_stats.wired_count++; 2715 else if (!wired && (origpte & PG_W)) 2716 pmap->pm_stats.wired_count--; 2717 2718 /* 2719 * Remove extra pte reference 2720 */ 2721 if (mpte) 2722 mpte->wire_count--; 2723 2724 /* 2725 * We might be turning off write access to the page, 2726 * so we go ahead and sense modify status. 2727 */ 2728 if (origpte & PG_MANAGED) { 2729 om = m; 2730 pa |= PG_MANAGED; 2731 } 2732 goto validate; 2733 } 2734 /* 2735 * Mapping has changed, invalidate old range and fall through to 2736 * handle validating new mapping. 2737 */ 2738 if (opa) { 2739 if (origpte & PG_W) 2740 pmap->pm_stats.wired_count--; 2741 if (origpte & PG_MANAGED) { 2742 om = PHYS_TO_VM_PAGE(opa); 2743 pmap_remove_entry(pmap, om, va); 2744 } else if (va < VM_MAXUSER_ADDRESS) 2745 printf("va=0x%x is unmanaged :-( \n", va); 2746 2747 if (mpte != NULL) { 2748 mpte->wire_count--; 2749 KASSERT(mpte->wire_count > 0, 2750 ("pmap_enter: missing reference to page table page," 2751 " va: 0x%x", va)); 2752 } 2753 } else 2754 pmap->pm_stats.resident_count++; 2755 2756 /* 2757 * Enter on the PV list if part of our managed memory. 2758 */ 2759 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 2760 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva, 2761 ("pmap_enter: managed mapping within the clean submap")); 2762 pmap_insert_entry(pmap, va, m); 2763 pa |= PG_MANAGED; 2764 } 2765 2766 /* 2767 * Increment counters 2768 */ 2769 if (wired) 2770 pmap->pm_stats.wired_count++; 2771 2772validate: 2773 /* 2774 * Now validate mapping with desired protection/wiring. 2775 */ 2776 newpte = (pt_entry_t)(pa | PG_V); 2777 if ((prot & VM_PROT_WRITE) != 0) { 2778 newpte |= PG_RW; 2779 vm_page_flag_set(m, PG_WRITEABLE); 2780 } 2781#ifdef PAE 2782 if ((prot & VM_PROT_EXECUTE) == 0) 2783 newpte |= pg_nx; 2784#endif 2785 if (wired) 2786 newpte |= PG_W; 2787 if (va < VM_MAXUSER_ADDRESS) 2788 newpte |= PG_U; 2789 if (pmap == kernel_pmap) 2790 newpte |= pgeflag; 2791 2792 critical_enter(); 2793 /* 2794 * if the mapping or permission bits are different, we need 2795 * to update the pte. 2796 */ 2797 if ((origpte & ~(PG_M|PG_A)) != newpte) { 2798 if (origpte) { 2799 invlva = FALSE; 2800 origpte = *pte; 2801 PT_SET_VA(pte, newpte | PG_A, FALSE); 2802 if (origpte & PG_A) { 2803 if (origpte & PG_MANAGED) 2804 vm_page_flag_set(om, PG_REFERENCED); 2805 if (opa != VM_PAGE_TO_PHYS(m)) 2806 invlva = TRUE; 2807#ifdef PAE 2808 if ((origpte & PG_NX) == 0 && 2809 (newpte & PG_NX) != 0) 2810 invlva = TRUE; 2811#endif 2812 } 2813 if (origpte & PG_M) { 2814 KASSERT((origpte & PG_RW), 2815 ("pmap_enter: modified page not writable: va: %#x, pte: %#jx", 2816 va, (uintmax_t)origpte)); 2817 if ((origpte & PG_MANAGED) != 0) 2818 vm_page_dirty(om); 2819 if ((prot & VM_PROT_WRITE) == 0) 2820 invlva = TRUE; 2821 } 2822 if (invlva) 2823 pmap_invalidate_page(pmap, va); 2824 } else{ 2825 PT_SET_VA(pte, newpte | PG_A, FALSE); 2826 } 2827 2828 } 2829 PT_UPDATES_FLUSH(); 2830 critical_exit(); 2831 if (*PMAP1) 2832 PT_SET_VA_MA(PMAP1, 0, TRUE); 2833 sched_unpin(); 2834 vm_page_unlock_queues(); 2835 PMAP_UNLOCK(pmap); 2836} 2837 2838/* 2839 * Maps a sequence of resident pages belonging to the same object. 2840 * The sequence begins with the given page m_start. This page is 2841 * mapped at the given virtual address start. Each subsequent page is 2842 * mapped at a virtual address that is offset from start by the same 2843 * amount as the page is offset from m_start within the object. The 2844 * last page in the sequence is the page with the largest offset from 2845 * m_start that can be mapped at a virtual address less than the given 2846 * virtual address end. Not every virtual page between start and end 2847 * is mapped; only those for which a resident page exists with the 2848 * corresponding offset from m_start are mapped. 2849 */ 2850void 2851pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, 2852 vm_page_t m_start, vm_prot_t prot) 2853{ 2854 vm_page_t m, mpte; 2855 vm_pindex_t diff, psize; 2856 multicall_entry_t mcl[16]; 2857 multicall_entry_t *mclp = mcl; 2858 int error, count = 0; 2859 2860 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED); 2861 psize = atop(end - start); 2862 2863 mpte = NULL; 2864 m = m_start; 2865 PMAP_LOCK(pmap); 2866 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { 2867 mpte = pmap_enter_quick_locked(&mclp, &count, pmap, start + ptoa(diff), m, 2868 prot, mpte); 2869 m = TAILQ_NEXT(m, listq); 2870 if (count == 16) { 2871 error = HYPERVISOR_multicall(mcl, count); 2872 KASSERT(error == 0, ("bad multicall %d", error)); 2873 mclp = mcl; 2874 count = 0; 2875 } 2876 } 2877 if (count) { 2878 error = HYPERVISOR_multicall(mcl, count); 2879 KASSERT(error == 0, ("bad multicall %d", error)); 2880 } 2881 2882 PMAP_UNLOCK(pmap); 2883} 2884 2885/* 2886 * this code makes some *MAJOR* assumptions: 2887 * 1. Current pmap & pmap exists. 2888 * 2. Not wired. 2889 * 3. Read access. 2890 * 4. No page table pages. 2891 * but is *MUCH* faster than pmap_enter... 2892 */ 2893 2894void 2895pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 2896{ 2897 multicall_entry_t mcl, *mclp; 2898 int count = 0; 2899 mclp = &mcl; 2900 2901 CTR4(KTR_PMAP, "pmap_enter_quick: pmap=%p va=0x%x m=%p prot=0x%x", 2902 pmap, va, m, prot); 2903 2904 PMAP_LOCK(pmap); 2905 (void) pmap_enter_quick_locked(&mclp, &count, pmap, va, m, prot, NULL); 2906 if (count) 2907 HYPERVISOR_multicall(&mcl, count); 2908 PMAP_UNLOCK(pmap); 2909} 2910 2911#ifdef notyet 2912void 2913pmap_enter_quick_range(pmap_t pmap, vm_offset_t *addrs, vm_page_t *pages, vm_prot_t *prots, int count) 2914{ 2915 int i, error, index = 0; 2916 multicall_entry_t mcl[16]; 2917 multicall_entry_t *mclp = mcl; 2918 2919 PMAP_LOCK(pmap); 2920 for (i = 0; i < count; i++, addrs++, pages++, prots++) { 2921 if (!pmap_is_prefaultable_locked(pmap, *addrs)) 2922 continue; 2923 2924 (void) pmap_enter_quick_locked(&mclp, &index, pmap, *addrs, *pages, *prots, NULL); 2925 if (index == 16) { 2926 error = HYPERVISOR_multicall(mcl, index); 2927 mclp = mcl; 2928 index = 0; 2929 KASSERT(error == 0, ("bad multicall %d", error)); 2930 } 2931 } 2932 if (index) { 2933 error = HYPERVISOR_multicall(mcl, index); 2934 KASSERT(error == 0, ("bad multicall %d", error)); 2935 } 2936 2937 PMAP_UNLOCK(pmap); 2938} 2939#endif 2940 2941static vm_page_t 2942pmap_enter_quick_locked(multicall_entry_t **mclpp, int *count, pmap_t pmap, vm_offset_t va, vm_page_t m, 2943 vm_prot_t prot, vm_page_t mpte) 2944{ 2945 pt_entry_t *pte; 2946 vm_paddr_t pa; 2947 vm_page_t free; 2948 multicall_entry_t *mcl = *mclpp; 2949 2950 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva || 2951 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0, 2952 ("pmap_enter_quick_locked: managed mapping within the clean submap")); 2953 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2954 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2955 2956 /* 2957 * In the case that a page table page is not 2958 * resident, we are creating it here. 2959 */ 2960 if (va < VM_MAXUSER_ADDRESS) { 2961 unsigned ptepindex; 2962 pd_entry_t ptema; 2963 2964 /* 2965 * Calculate pagetable page index 2966 */ 2967 ptepindex = va >> PDRSHIFT; 2968 if (mpte && (mpte->pindex == ptepindex)) { 2969 mpte->wire_count++; 2970 } else { 2971 /* 2972 * Get the page directory entry 2973 */ 2974 ptema = pmap->pm_pdir[ptepindex]; 2975 2976 /* 2977 * If the page table page is mapped, we just increment 2978 * the hold count, and activate it. 2979 */ 2980 if (ptema & PG_V) { 2981 if (ptema & PG_PS) 2982 panic("pmap_enter_quick: unexpected mapping into 4MB page"); 2983 mpte = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME); 2984 mpte->wire_count++; 2985 } else { 2986 mpte = _pmap_allocpte(pmap, ptepindex, 2987 M_NOWAIT); 2988 if (mpte == NULL) 2989 return (mpte); 2990 } 2991 } 2992 } else { 2993 mpte = NULL; 2994 } 2995 2996 /* 2997 * This call to vtopte makes the assumption that we are 2998 * entering the page into the current pmap. In order to support 2999 * quick entry into any pmap, one would likely use pmap_pte_quick. 3000 * But that isn't as quick as vtopte. 3001 */ 3002 KASSERT(pmap_is_current(pmap), ("entering pages in non-current pmap")); 3003 pte = vtopte(va); 3004 if (*pte & PG_V) { 3005 if (mpte != NULL) { 3006 mpte->wire_count--; 3007 mpte = NULL; 3008 } 3009 return (mpte); 3010 } 3011 3012 /* 3013 * Enter on the PV list if part of our managed memory. 3014 */ 3015 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 && 3016 !pmap_try_insert_pv_entry(pmap, va, m)) { 3017 if (mpte != NULL) { 3018 free = NULL; 3019 if (pmap_unwire_pte_hold(pmap, mpte, &free)) { 3020 pmap_invalidate_page(pmap, va); 3021 pmap_free_zero_pages(free); 3022 } 3023 3024 mpte = NULL; 3025 } 3026 return (mpte); 3027 } 3028 3029 /* 3030 * Increment counters 3031 */ 3032 pmap->pm_stats.resident_count++; 3033 3034 pa = VM_PAGE_TO_PHYS(m); 3035#ifdef PAE 3036 if ((prot & VM_PROT_EXECUTE) == 0) 3037 pa |= pg_nx; 3038#endif 3039 3040#if 0 3041 /* 3042 * Now validate mapping with RO protection 3043 */ 3044 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 3045 pte_store(pte, pa | PG_V | PG_U); 3046 else 3047 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 3048#else 3049 /* 3050 * Now validate mapping with RO protection 3051 */ 3052 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 3053 pa = xpmap_ptom(pa | PG_V | PG_U); 3054 else 3055 pa = xpmap_ptom(pa | PG_V | PG_U | PG_MANAGED); 3056 3057 mcl->op = __HYPERVISOR_update_va_mapping; 3058 mcl->args[0] = va; 3059 mcl->args[1] = (uint32_t)(pa & 0xffffffff); 3060 mcl->args[2] = (uint32_t)(pa >> 32); 3061 mcl->args[3] = 0; 3062 *mclpp = mcl + 1; 3063 *count = *count + 1; 3064#endif 3065 return mpte; 3066} 3067 3068/* 3069 * Make a temporary mapping for a physical address. This is only intended 3070 * to be used for panic dumps. 3071 */ 3072void * 3073pmap_kenter_temporary(vm_paddr_t pa, int i) 3074{ 3075 vm_offset_t va; 3076 3077 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 3078 pmap_kenter(va, pa); 3079 invlpg(va); 3080 return ((void *)crashdumpmap); 3081} 3082 3083/* 3084 * This code maps large physical mmap regions into the 3085 * processor address space. Note that some shortcuts 3086 * are taken, but the code works. 3087 */ 3088void 3089pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 3090 vm_object_t object, vm_pindex_t pindex, 3091 vm_size_t size) 3092{ 3093 vm_page_t p; 3094 3095 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 3096 KASSERT(object->type == OBJT_DEVICE, 3097 ("pmap_object_init_pt: non-device object")); 3098 if (pseflag && 3099 ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) { 3100 int i; 3101 vm_page_t m[1]; 3102 unsigned int ptepindex; 3103 int npdes; 3104 pd_entry_t ptepa; 3105 3106 PMAP_LOCK(pmap); 3107 if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)]) 3108 goto out; 3109 PMAP_UNLOCK(pmap); 3110retry: 3111 p = vm_page_lookup(object, pindex); 3112 if (p != NULL) { 3113 if (vm_page_sleep_if_busy(p, FALSE, "init4p")) 3114 goto retry; 3115 } else { 3116 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL); 3117 if (p == NULL) 3118 return; 3119 m[0] = p; 3120 3121 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) { 3122 vm_page_lock_queues(); 3123 vm_page_free(p); 3124 vm_page_unlock_queues(); 3125 return; 3126 } 3127 3128 p = vm_page_lookup(object, pindex); 3129 vm_page_lock_queues(); 3130 vm_page_wakeup(p); 3131 vm_page_unlock_queues(); 3132 } 3133 3134 ptepa = VM_PAGE_TO_PHYS(p); 3135 if (ptepa & (NBPDR - 1)) 3136 return; 3137 3138 p->valid = VM_PAGE_BITS_ALL; 3139 3140 PMAP_LOCK(pmap); 3141 pmap->pm_stats.resident_count += size >> PAGE_SHIFT; 3142 npdes = size >> PDRSHIFT; 3143 critical_enter(); 3144 for(i = 0; i < npdes; i++) { 3145 PD_SET_VA(pmap, ptepindex, 3146 ptepa | PG_U | PG_M | PG_RW | PG_V | PG_PS, FALSE); 3147 ptepa += NBPDR; 3148 ptepindex += 1; 3149 } 3150 pmap_invalidate_all(pmap); 3151 critical_exit(); 3152out: 3153 PMAP_UNLOCK(pmap); 3154 } 3155} 3156 3157/* 3158 * Routine: pmap_change_wiring 3159 * Function: Change the wiring attribute for a map/virtual-address 3160 * pair. 3161 * In/out conditions: 3162 * The mapping must already exist in the pmap. 3163 */ 3164void 3165pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired) 3166{ 3167 pt_entry_t *pte; 3168 3169 vm_page_lock_queues(); 3170 PMAP_LOCK(pmap); 3171 pte = pmap_pte(pmap, va); 3172 3173 if (wired && !pmap_pte_w(pte)) { 3174 PT_SET_VA_MA((pte), *(pte) | PG_W, TRUE); 3175 pmap->pm_stats.wired_count++; 3176 } else if (!wired && pmap_pte_w(pte)) { 3177 PT_SET_VA_MA((pte), *(pte) & ~PG_W, TRUE); 3178 pmap->pm_stats.wired_count--; 3179 } 3180 3181 /* 3182 * Wiring is not a hardware characteristic so there is no need to 3183 * invalidate TLB. 3184 */ 3185 pmap_pte_release(pte); 3186 PMAP_UNLOCK(pmap); 3187 vm_page_unlock_queues(); 3188} 3189 3190 3191 3192/* 3193 * Copy the range specified by src_addr/len 3194 * from the source map to the range dst_addr/len 3195 * in the destination map. 3196 * 3197 * This routine is only advisory and need not do anything. 3198 */ 3199 3200void 3201pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 3202 vm_offset_t src_addr) 3203{ 3204 vm_page_t free; 3205 vm_offset_t addr; 3206 vm_offset_t end_addr = src_addr + len; 3207 vm_offset_t pdnxt; 3208 3209 if (dst_addr != src_addr) 3210 return; 3211 3212 if (!pmap_is_current(src_pmap)) { 3213 CTR2(KTR_PMAP, 3214 "pmap_copy, skipping: pdir[PTDPTDI]=0x%jx PTDpde[0]=0x%jx", 3215 (src_pmap->pm_pdir[PTDPTDI] & PG_FRAME), (PTDpde[0] & PG_FRAME)); 3216 3217 return; 3218 } 3219 CTR5(KTR_PMAP, "pmap_copy: dst_pmap=%p src_pmap=%p dst_addr=0x%x len=%d src_addr=0x%x", 3220 dst_pmap, src_pmap, dst_addr, len, src_addr); 3221 3222 vm_page_lock_queues(); 3223 if (dst_pmap < src_pmap) { 3224 PMAP_LOCK(dst_pmap); 3225 PMAP_LOCK(src_pmap); 3226 } else { 3227 PMAP_LOCK(src_pmap); 3228 PMAP_LOCK(dst_pmap); 3229 } 3230 sched_pin(); 3231 for (addr = src_addr; addr < end_addr; addr = pdnxt) { 3232 pt_entry_t *src_pte, *dst_pte; 3233 vm_page_t dstmpte, srcmpte; 3234 pd_entry_t srcptepaddr; 3235 unsigned ptepindex; 3236 3237 if (addr >= UPT_MIN_ADDRESS) 3238 panic("pmap_copy: invalid to pmap_copy page tables"); 3239 3240 pdnxt = (addr + NBPDR) & ~PDRMASK; 3241 ptepindex = addr >> PDRSHIFT; 3242 3243 srcptepaddr = PT_GET(&src_pmap->pm_pdir[ptepindex]); 3244 if (srcptepaddr == 0) 3245 continue; 3246 3247 if (srcptepaddr & PG_PS) { 3248 if (dst_pmap->pm_pdir[ptepindex] == 0) { 3249 PD_SET_VA(dst_pmap, ptepindex, srcptepaddr & ~PG_W, TRUE); 3250 dst_pmap->pm_stats.resident_count += 3251 NBPDR / PAGE_SIZE; 3252 } 3253 continue; 3254 } 3255 3256 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME); 3257 if (srcmpte->wire_count == 0) 3258 panic("pmap_copy: source page table page is unused"); 3259 3260 if (pdnxt > end_addr) 3261 pdnxt = end_addr; 3262 3263 src_pte = vtopte(addr); 3264 while (addr < pdnxt) { 3265 pt_entry_t ptetemp; 3266 ptetemp = *src_pte; 3267 /* 3268 * we only virtual copy managed pages 3269 */ 3270 if ((ptetemp & PG_MANAGED) != 0) { 3271 dstmpte = pmap_allocpte(dst_pmap, addr, 3272 M_NOWAIT); 3273 if (dstmpte == NULL) 3274 break; 3275 dst_pte = pmap_pte_quick(dst_pmap, addr); 3276 if (*dst_pte == 0 && 3277 pmap_try_insert_pv_entry(dst_pmap, addr, 3278 PHYS_TO_VM_PAGE(xpmap_mtop(ptetemp) & PG_FRAME))) { 3279 /* 3280 * Clear the wired, modified, and 3281 * accessed (referenced) bits 3282 * during the copy. 3283 */ 3284 KASSERT(ptetemp != 0, ("src_pte not set")); 3285 PT_SET_VA_MA(dst_pte, ptetemp & ~(PG_W | PG_M | PG_A), TRUE /* XXX debug */); 3286 KASSERT(*dst_pte == (ptetemp & ~(PG_W | PG_M | PG_A)), 3287 ("no pmap copy expected: 0x%jx saw: 0x%jx", 3288 ptetemp & ~(PG_W | PG_M | PG_A), *dst_pte)); 3289 dst_pmap->pm_stats.resident_count++; 3290 } else { 3291 free = NULL; 3292 if (pmap_unwire_pte_hold(dst_pmap, 3293 dstmpte, &free)) { 3294 pmap_invalidate_page(dst_pmap, 3295 addr); 3296 pmap_free_zero_pages(free); 3297 } 3298 } 3299 if (dstmpte->wire_count >= srcmpte->wire_count) 3300 break; 3301 } 3302 addr += PAGE_SIZE; 3303 src_pte++; 3304 } 3305 } 3306 PT_UPDATES_FLUSH(); 3307 sched_unpin(); 3308 vm_page_unlock_queues(); 3309 PMAP_UNLOCK(src_pmap); 3310 PMAP_UNLOCK(dst_pmap); 3311} 3312 3313/* 3314 * pmap_zero_page zeros the specified hardware page by mapping 3315 * the page into KVM and using bzero to clear its contents. 3316 */ 3317void 3318pmap_zero_page(vm_page_t m) 3319{ 3320 struct sysmaps *sysmaps; 3321 3322 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3323 mtx_lock(&sysmaps->lock); 3324 if (*sysmaps->CMAP2) 3325 panic("pmap_zero_page: CMAP2 busy"); 3326 sched_pin(); 3327 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3328 pagezero(sysmaps->CADDR2); 3329 PT_SET_MA(sysmaps->CADDR2, 0); 3330 sched_unpin(); 3331 mtx_unlock(&sysmaps->lock); 3332} 3333 3334/* 3335 * pmap_zero_page_area zeros the specified hardware page by mapping 3336 * the page into KVM and using bzero to clear its contents. 3337 * 3338 * off and size may not cover an area beyond a single hardware page. 3339 */ 3340void 3341pmap_zero_page_area(vm_page_t m, int off, int size) 3342{ 3343 struct sysmaps *sysmaps; 3344 3345 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3346 mtx_lock(&sysmaps->lock); 3347 if (*sysmaps->CMAP2) 3348 panic("pmap_zero_page: CMAP2 busy"); 3349 sched_pin(); 3350 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3351 3352 if (off == 0 && size == PAGE_SIZE) 3353 pagezero(sysmaps->CADDR2); 3354 else 3355 bzero((char *)sysmaps->CADDR2 + off, size); 3356 PT_SET_MA(sysmaps->CADDR2, 0); 3357 sched_unpin(); 3358 mtx_unlock(&sysmaps->lock); 3359} 3360 3361/* 3362 * pmap_zero_page_idle zeros the specified hardware page by mapping 3363 * the page into KVM and using bzero to clear its contents. This 3364 * is intended to be called from the vm_pagezero process only and 3365 * outside of Giant. 3366 */ 3367void 3368pmap_zero_page_idle(vm_page_t m) 3369{ 3370 3371 if (*CMAP3) 3372 panic("pmap_zero_page: CMAP3 busy"); 3373 sched_pin(); 3374 PT_SET_MA(CADDR3, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3375 pagezero(CADDR3); 3376 PT_SET_MA(CADDR3, 0); 3377 sched_unpin(); 3378} 3379 3380/* 3381 * pmap_copy_page copies the specified (machine independent) 3382 * page by mapping the page into virtual memory and using 3383 * bcopy to copy the page, one machine dependent page at a 3384 * time. 3385 */ 3386void 3387pmap_copy_page(vm_page_t src, vm_page_t dst) 3388{ 3389 struct sysmaps *sysmaps; 3390 3391 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3392 mtx_lock(&sysmaps->lock); 3393 if (*sysmaps->CMAP1) 3394 panic("pmap_copy_page: CMAP1 busy"); 3395 if (*sysmaps->CMAP2) 3396 panic("pmap_copy_page: CMAP2 busy"); 3397 sched_pin(); 3398 PT_SET_MA(sysmaps->CADDR1, PG_V | xpmap_ptom(VM_PAGE_TO_PHYS(src)) | PG_A); 3399 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(dst)) | PG_A | PG_M); 3400 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); 3401 PT_SET_MA(sysmaps->CADDR1, 0); 3402 PT_SET_MA(sysmaps->CADDR2, 0); 3403 sched_unpin(); 3404 mtx_unlock(&sysmaps->lock); 3405} 3406 3407/* 3408 * Returns true if the pmap's pv is one of the first 3409 * 16 pvs linked to from this page. This count may 3410 * be changed upwards or downwards in the future; it 3411 * is only necessary that true be returned for a small 3412 * subset of pmaps for proper page aging. 3413 */ 3414boolean_t 3415pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 3416{ 3417 pv_entry_t pv; 3418 int loops = 0; 3419 3420 if (m->flags & PG_FICTITIOUS) 3421 return (FALSE); 3422 3423 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3424 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3425 if (PV_PMAP(pv) == pmap) { 3426 return TRUE; 3427 } 3428 loops++; 3429 if (loops >= 16) 3430 break; 3431 } 3432 return (FALSE); 3433} 3434 3435/* 3436 * pmap_page_wired_mappings: 3437 * 3438 * Return the number of managed mappings to the given physical page 3439 * that are wired. 3440 */ 3441int 3442pmap_page_wired_mappings(vm_page_t m) 3443{ 3444 pv_entry_t pv; 3445 pt_entry_t *pte; 3446 pmap_t pmap; 3447 int count; 3448 3449 count = 0; 3450 if ((m->flags & PG_FICTITIOUS) != 0) 3451 return (count); 3452 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3453 sched_pin(); 3454 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3455 pmap = PV_PMAP(pv); 3456 PMAP_LOCK(pmap); 3457 pte = pmap_pte_quick(pmap, pv->pv_va); 3458 if ((*pte & PG_W) != 0) 3459 count++; 3460 PMAP_UNLOCK(pmap); 3461 } 3462 sched_unpin(); 3463 return (count); 3464} 3465 3466/* 3467 * Returns TRUE if the given page is mapped individually or as part of 3468 * a 4mpage. Otherwise, returns FALSE. 3469 */ 3470boolean_t 3471pmap_page_is_mapped(vm_page_t m) 3472{ 3473 struct md_page *pvh; 3474 3475 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 3476 return (FALSE); 3477 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3478 if (TAILQ_EMPTY(&m->md.pv_list)) { 3479 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 3480 return (!TAILQ_EMPTY(&pvh->pv_list)); 3481 } else 3482 return (TRUE); 3483} 3484 3485/* 3486 * Remove all pages from specified address space 3487 * this aids process exit speeds. Also, this code 3488 * is special cased for current process only, but 3489 * can have the more generic (and slightly slower) 3490 * mode enabled. This is much faster than pmap_remove 3491 * in the case of running down an entire address space. 3492 */ 3493void 3494pmap_remove_pages(pmap_t pmap) 3495{ 3496 pt_entry_t *pte, tpte; 3497 vm_page_t m, free = NULL; 3498 pv_entry_t pv; 3499 struct pv_chunk *pc, *npc; 3500 int field, idx; 3501 int32_t bit; 3502 uint32_t inuse, bitmask; 3503 int allfree; 3504 3505 CTR1(KTR_PMAP, "pmap_remove_pages: pmap=%p", pmap); 3506 3507 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { 3508 printf("warning: pmap_remove_pages called with non-current pmap\n"); 3509 return; 3510 } 3511 vm_page_lock_queues(); 3512 KASSERT(pmap_is_current(pmap), ("removing pages from non-current pmap")); 3513 PMAP_LOCK(pmap); 3514 sched_pin(); 3515 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) { 3516 allfree = 1; 3517 for (field = 0; field < _NPCM; field++) { 3518 inuse = (~(pc->pc_map[field])) & pc_freemask[field]; 3519 while (inuse != 0) { 3520 bit = bsfl(inuse); 3521 bitmask = 1UL << bit; 3522 idx = field * 32 + bit; 3523 pv = &pc->pc_pventry[idx]; 3524 inuse &= ~bitmask; 3525 3526 pte = vtopte(pv->pv_va); 3527 tpte = *pte ? xpmap_mtop(*pte) : 0; 3528 3529 if (tpte == 0) { 3530 printf( 3531 "TPTE at %p IS ZERO @ VA %08x\n", 3532 pte, pv->pv_va); 3533 panic("bad pte"); 3534 } 3535 3536/* 3537 * We cannot remove wired pages from a process' mapping at this time 3538 */ 3539 if (tpte & PG_W) { 3540 allfree = 0; 3541 continue; 3542 } 3543 3544 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME); 3545 KASSERT(m->phys_addr == (tpte & PG_FRAME), 3546 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 3547 m, (uintmax_t)m->phys_addr, 3548 (uintmax_t)tpte)); 3549 3550 KASSERT(m < &vm_page_array[vm_page_array_size], 3551 ("pmap_remove_pages: bad tpte %#jx", 3552 (uintmax_t)tpte)); 3553 3554 3555 PT_CLEAR_VA(pte, FALSE); 3556 3557 /* 3558 * Update the vm_page_t clean/reference bits. 3559 */ 3560 if (tpte & PG_M) 3561 vm_page_dirty(m); 3562 3563 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3564 if (TAILQ_EMPTY(&m->md.pv_list)) 3565 vm_page_flag_clear(m, PG_WRITEABLE); 3566 3567 pmap_unuse_pt(pmap, pv->pv_va, &free); 3568 3569 /* Mark free */ 3570 PV_STAT(pv_entry_frees++); 3571 PV_STAT(pv_entry_spare++); 3572 pv_entry_count--; 3573 pc->pc_map[field] |= bitmask; 3574 pmap->pm_stats.resident_count--; 3575 } 3576 } 3577 PT_UPDATES_FLUSH(); 3578 if (allfree) { 3579 PV_STAT(pv_entry_spare -= _NPCPV); 3580 PV_STAT(pc_chunk_count--); 3581 PV_STAT(pc_chunk_frees++); 3582 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 3583 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 3584 pmap_qremove((vm_offset_t)pc, 1); 3585 vm_page_unwire(m, 0); 3586 vm_page_free(m); 3587 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 3588 } 3589 } 3590 PT_UPDATES_FLUSH(); 3591 if (*PMAP1) 3592 PT_SET_MA(PADDR1, 0); 3593 3594 sched_unpin(); 3595 pmap_invalidate_all(pmap); 3596 vm_page_unlock_queues(); 3597 PMAP_UNLOCK(pmap); 3598 pmap_free_zero_pages(free); 3599} 3600 3601/* 3602 * pmap_is_modified: 3603 * 3604 * Return whether or not the specified physical page was modified 3605 * in any physical maps. 3606 */ 3607boolean_t 3608pmap_is_modified(vm_page_t m) 3609{ 3610 pv_entry_t pv; 3611 pt_entry_t *pte; 3612 pmap_t pmap; 3613 boolean_t rv; 3614 3615 rv = FALSE; 3616 if (m->flags & PG_FICTITIOUS) 3617 return (rv); 3618 3619 sched_pin(); 3620 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3621 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3622 pmap = PV_PMAP(pv); 3623 PMAP_LOCK(pmap); 3624 pte = pmap_pte_quick(pmap, pv->pv_va); 3625 rv = (*pte & PG_M) != 0; 3626 PMAP_UNLOCK(pmap); 3627 if (rv) 3628 break; 3629 } 3630 if (*PMAP1) 3631 PT_SET_MA(PADDR1, 0); 3632 sched_unpin(); 3633 return (rv); 3634} 3635 3636/* 3637 * pmap_is_prefaultable: 3638 * 3639 * Return whether or not the specified virtual address is elgible 3640 * for prefault. 3641 */ 3642static boolean_t 3643pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr) 3644{ 3645 pt_entry_t *pte; 3646 boolean_t rv = FALSE; 3647 3648 return (rv); 3649 3650 if (pmap_is_current(pmap) && *pmap_pde(pmap, addr)) { 3651 pte = vtopte(addr); 3652 rv = (*pte == 0); 3653 } 3654 return (rv); 3655} 3656 3657boolean_t 3658pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 3659{ 3660 boolean_t rv; 3661 3662 PMAP_LOCK(pmap); 3663 rv = pmap_is_prefaultable_locked(pmap, addr); 3664 PMAP_UNLOCK(pmap); 3665 return (rv); 3666} 3667 3668void 3669pmap_map_readonly(pmap_t pmap, vm_offset_t va, int len) 3670{ 3671 int i, npages = round_page(len) >> PAGE_SHIFT; 3672 for (i = 0; i < npages; i++) { 3673 pt_entry_t *pte; 3674 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE)); 3675 pte_store(pte, xpmap_mtop(*pte & ~(PG_RW|PG_M))); 3676 PMAP_MARK_PRIV(xpmap_mtop(*pte)); 3677 pmap_pte_release(pte); 3678 } 3679} 3680 3681void 3682pmap_map_readwrite(pmap_t pmap, vm_offset_t va, int len) 3683{ 3684 int i, npages = round_page(len) >> PAGE_SHIFT; 3685 for (i = 0; i < npages; i++) { 3686 pt_entry_t *pte; 3687 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE)); 3688 PMAP_MARK_UNPRIV(xpmap_mtop(*pte)); 3689 pte_store(pte, xpmap_mtop(*pte) | (PG_RW|PG_M)); 3690 pmap_pte_release(pte); 3691 } 3692} 3693 3694/* 3695 * Clear the write and modified bits in each of the given page's mappings. 3696 */ 3697void 3698pmap_remove_write(vm_page_t m) 3699{ 3700 pv_entry_t pv; 3701 pmap_t pmap; 3702 pt_entry_t oldpte, *pte; 3703 3704 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3705 if ((m->flags & PG_FICTITIOUS) != 0 || 3706 (m->flags & PG_WRITEABLE) == 0) 3707 return; 3708 sched_pin(); 3709 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3710 pmap = PV_PMAP(pv); 3711 PMAP_LOCK(pmap); 3712 pte = pmap_pte_quick(pmap, pv->pv_va); 3713retry: 3714 oldpte = *pte; 3715 if ((oldpte & PG_RW) != 0) { 3716 /* 3717 * Regardless of whether a pte is 32 or 64 bits 3718 * in size, PG_RW and PG_M are among the least 3719 * significant 32 bits. 3720 */ 3721 if (!atomic_cmpset_int((u_int *)pte, oldpte, 3722 oldpte & ~(PG_RW | PG_M))) 3723 goto retry; 3724 if ((oldpte & PG_M) != 0) 3725 vm_page_dirty(m); 3726 pmap_invalidate_page(pmap, pv->pv_va); 3727 } 3728 PMAP_UNLOCK(pmap); 3729 } 3730 vm_page_flag_clear(m, PG_WRITEABLE); 3731 PT_UPDATES_FLUSH(); 3732 if (*PMAP1) 3733 PT_SET_MA(PADDR1, 0); 3734 sched_unpin(); 3735} 3736 3737/* 3738 * pmap_ts_referenced: 3739 * 3740 * Return a count of reference bits for a page, clearing those bits. 3741 * It is not necessary for every reference bit to be cleared, but it 3742 * is necessary that 0 only be returned when there are truly no 3743 * reference bits set. 3744 * 3745 * XXX: The exact number of bits to check and clear is a matter that 3746 * should be tested and standardized at some point in the future for 3747 * optimal aging of shared pages. 3748 */ 3749int 3750pmap_ts_referenced(vm_page_t m) 3751{ 3752 pv_entry_t pv, pvf, pvn; 3753 pmap_t pmap; 3754 pt_entry_t *pte; 3755 int rtval = 0; 3756 3757 if (m->flags & PG_FICTITIOUS) 3758 return (rtval); 3759 sched_pin(); 3760 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3761 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 3762 pvf = pv; 3763 do { 3764 pvn = TAILQ_NEXT(pv, pv_list); 3765 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3766 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 3767 pmap = PV_PMAP(pv); 3768 PMAP_LOCK(pmap); 3769 pte = pmap_pte_quick(pmap, pv->pv_va); 3770 if ((*pte & PG_A) != 0) { 3771 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE); 3772 pmap_invalidate_page(pmap, pv->pv_va); 3773 rtval++; 3774 if (rtval > 4) 3775 pvn = NULL; 3776 } 3777 PMAP_UNLOCK(pmap); 3778 } while ((pv = pvn) != NULL && pv != pvf); 3779 } 3780 PT_UPDATES_FLUSH(); 3781 if (*PMAP1) 3782 PT_SET_MA(PADDR1, 0); 3783 3784 sched_unpin(); 3785 return (rtval); 3786} 3787 3788/* 3789 * Clear the modify bits on the specified physical page. 3790 */ 3791void 3792pmap_clear_modify(vm_page_t m) 3793{ 3794 pv_entry_t pv; 3795 pmap_t pmap; 3796 pt_entry_t *pte; 3797 3798 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3799 if ((m->flags & PG_FICTITIOUS) != 0) 3800 return; 3801 sched_pin(); 3802 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3803 pmap = PV_PMAP(pv); 3804 PMAP_LOCK(pmap); 3805 pte = pmap_pte_quick(pmap, pv->pv_va); 3806 if ((*pte & PG_M) != 0) { 3807 /* 3808 * Regardless of whether a pte is 32 or 64 bits 3809 * in size, PG_M is among the least significant 3810 * 32 bits. 3811 */ 3812 PT_SET_VA_MA(pte, *pte & ~PG_M, FALSE); 3813 pmap_invalidate_page(pmap, pv->pv_va); 3814 } 3815 PMAP_UNLOCK(pmap); 3816 } 3817 sched_unpin(); 3818} 3819 3820/* 3821 * pmap_clear_reference: 3822 * 3823 * Clear the reference bit on the specified physical page. 3824 */ 3825void 3826pmap_clear_reference(vm_page_t m) 3827{ 3828 pv_entry_t pv; 3829 pmap_t pmap; 3830 pt_entry_t *pte; 3831 3832 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3833 if ((m->flags & PG_FICTITIOUS) != 0) 3834 return; 3835 sched_pin(); 3836 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3837 pmap = PV_PMAP(pv); 3838 PMAP_LOCK(pmap); 3839 pte = pmap_pte_quick(pmap, pv->pv_va); 3840 if ((*pte & PG_A) != 0) { 3841 /* 3842 * Regardless of whether a pte is 32 or 64 bits 3843 * in size, PG_A is among the least significant 3844 * 32 bits. 3845 */ 3846 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE); 3847 pmap_invalidate_page(pmap, pv->pv_va); 3848 } 3849 PMAP_UNLOCK(pmap); 3850 } 3851 sched_unpin(); 3852} 3853 3854/* 3855 * Miscellaneous support routines follow 3856 */ 3857 3858/* 3859 * Map a set of physical memory pages into the kernel virtual 3860 * address space. Return a pointer to where it is mapped. This 3861 * routine is intended to be used for mapping device memory, 3862 * NOT real memory. 3863 */ 3864void * 3865pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode) 3866{ 3867 vm_offset_t va, tmpva, offset; 3868 3869 offset = pa & PAGE_MASK; 3870 size = roundup(offset + size, PAGE_SIZE); 3871 pa = pa & PG_FRAME; 3872 3873 if (pa < KERNLOAD && pa + size <= KERNLOAD) 3874 va = KERNBASE + pa; 3875 else 3876 va = kmem_alloc_nofault(kernel_map, size); 3877 if (!va) 3878 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 3879 3880 for (tmpva = va; size > 0; ) { 3881 pmap_kenter_attr(tmpva, pa, mode); 3882 size -= PAGE_SIZE; 3883 tmpva += PAGE_SIZE; 3884 pa += PAGE_SIZE; 3885 } 3886 pmap_invalidate_range(kernel_pmap, va, tmpva); 3887 pmap_invalidate_cache(); 3888 return ((void *)(va + offset)); 3889} 3890 3891void * 3892pmap_mapdev(vm_paddr_t pa, vm_size_t size) 3893{ 3894 3895 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE)); 3896} 3897 3898void * 3899pmap_mapbios(vm_paddr_t pa, vm_size_t size) 3900{ 3901 3902 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK)); 3903} 3904 3905void 3906pmap_unmapdev(vm_offset_t va, vm_size_t size) 3907{ 3908 vm_offset_t base, offset, tmpva; 3909 3910 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD) 3911 return; 3912 base = trunc_page(va); 3913 offset = va & PAGE_MASK; 3914 size = roundup(offset + size, PAGE_SIZE); 3915 critical_enter(); 3916 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 3917 pmap_kremove(tmpva); 3918 pmap_invalidate_range(kernel_pmap, va, tmpva); 3919 critical_exit(); 3920 kmem_free(kernel_map, base, size); 3921} 3922 3923int 3924pmap_change_attr(va, size, mode) 3925 vm_offset_t va; 3926 vm_size_t size; 3927 int mode; 3928{ 3929 vm_offset_t base, offset, tmpva; 3930 pt_entry_t *pte; 3931 u_int opte, npte; 3932 pd_entry_t *pde; 3933 3934 base = trunc_page(va); 3935 offset = va & PAGE_MASK; 3936 size = roundup(offset + size, PAGE_SIZE); 3937 3938 /* Only supported on kernel virtual addresses. */ 3939 if (base <= VM_MAXUSER_ADDRESS) 3940 return (EINVAL); 3941 3942 /* 4MB pages and pages that aren't mapped aren't supported. */ 3943 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) { 3944 pde = pmap_pde(kernel_pmap, tmpva); 3945 if (*pde & PG_PS) 3946 return (EINVAL); 3947 if ((*pde & PG_V) == 0) 3948 return (EINVAL); 3949 pte = vtopte(va); 3950 if ((*pte & PG_V) == 0) 3951 return (EINVAL); 3952 } 3953 3954 /* 3955 * Ok, all the pages exist and are 4k, so run through them updating 3956 * their cache mode. 3957 */ 3958 for (tmpva = base; size > 0; ) { 3959 pte = vtopte(tmpva); 3960 3961 /* 3962 * The cache mode bits are all in the low 32-bits of the 3963 * PTE, so we can just spin on updating the low 32-bits. 3964 */ 3965 do { 3966 opte = *(u_int *)pte; 3967 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT); 3968 npte |= pmap_cache_bits(mode, 0); 3969 PT_SET_VA_MA(pte, npte, TRUE); 3970 } while (npte != opte && (*pte != npte)); 3971 tmpva += PAGE_SIZE; 3972 size -= PAGE_SIZE; 3973 } 3974 3975 /* 3976 * Flush CPU caches to make sure any data isn't cached that shouldn't 3977 * be, etc. 3978 */ 3979 pmap_invalidate_range(kernel_pmap, base, tmpva); 3980 pmap_invalidate_cache(); 3981 return (0); 3982} 3983 3984/* 3985 * perform the pmap work for mincore 3986 */ 3987int 3988pmap_mincore(pmap_t pmap, vm_offset_t addr) 3989{ 3990 pt_entry_t *ptep, pte; 3991 vm_page_t m; 3992 int val = 0; 3993 3994 PMAP_LOCK(pmap); 3995 ptep = pmap_pte(pmap, addr); 3996 pte = (ptep != NULL) ? PT_GET(ptep) : 0; 3997 pmap_pte_release(ptep); 3998 PMAP_UNLOCK(pmap); 3999 4000 if (pte != 0) { 4001 vm_paddr_t pa; 4002 4003 val = MINCORE_INCORE; 4004 if ((pte & PG_MANAGED) == 0) 4005 return val; 4006 4007 pa = pte & PG_FRAME; 4008 4009 m = PHYS_TO_VM_PAGE(pa); 4010 4011 /* 4012 * Modified by us 4013 */ 4014 if (pte & PG_M) 4015 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 4016 else { 4017 /* 4018 * Modified by someone else 4019 */ 4020 vm_page_lock_queues(); 4021 if (m->dirty || pmap_is_modified(m)) 4022 val |= MINCORE_MODIFIED_OTHER; 4023 vm_page_unlock_queues(); 4024 } 4025 /* 4026 * Referenced by us 4027 */ 4028 if (pte & PG_A) 4029 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 4030 else { 4031 /* 4032 * Referenced by someone else 4033 */ 4034 vm_page_lock_queues(); 4035 if ((m->flags & PG_REFERENCED) || 4036 pmap_ts_referenced(m)) { 4037 val |= MINCORE_REFERENCED_OTHER; 4038 vm_page_flag_set(m, PG_REFERENCED); 4039 } 4040 vm_page_unlock_queues(); 4041 } 4042 } 4043 return val; 4044} 4045 4046void 4047pmap_activate(struct thread *td) 4048{ 4049 pmap_t pmap, oldpmap; 4050 u_int32_t cr3; 4051 4052 critical_enter(); 4053 pmap = vmspace_pmap(td->td_proc->p_vmspace); 4054 oldpmap = PCPU_GET(curpmap); 4055#if defined(SMP) 4056 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 4057 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 4058#else 4059 oldpmap->pm_active &= ~1; 4060 pmap->pm_active |= 1; 4061#endif 4062#ifdef PAE 4063 cr3 = vtophys(pmap->pm_pdpt); 4064#else 4065 cr3 = vtophys(pmap->pm_pdir); 4066#endif 4067 /* 4068 * pmap_activate is for the current thread on the current cpu 4069 */ 4070 td->td_pcb->pcb_cr3 = cr3; 4071 PT_UPDATES_FLUSH(); 4072 load_cr3(cr3); 4073 4074 PCPU_SET(curpmap, pmap); 4075 critical_exit(); 4076} 4077 4078/* 4079 * Increase the starting virtual address of the given mapping if a 4080 * different alignment might result in more superpage mappings. 4081 */ 4082void 4083pmap_align_superpage(vm_object_t object, vm_ooffset_t offset, 4084 vm_offset_t *addr, vm_size_t size) 4085{ 4086 vm_offset_t superpage_offset; 4087 4088 if (size < NBPDR) 4089 return; 4090 if (object != NULL && (object->flags & OBJ_COLORED) != 0) 4091 offset += ptoa(object->pg_color); 4092 superpage_offset = offset & PDRMASK; 4093 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR || 4094 (*addr & PDRMASK) == superpage_offset) 4095 return; 4096 if ((*addr & PDRMASK) < superpage_offset) 4097 *addr = (*addr & ~PDRMASK) + superpage_offset; 4098 else 4099 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset; 4100} 4101 4102#if defined(PMAP_DEBUG) 4103pmap_pid_dump(int pid) 4104{ 4105 pmap_t pmap; 4106 struct proc *p; 4107 int npte = 0; 4108 int index; 4109 4110 sx_slock(&allproc_lock); 4111 FOREACH_PROC_IN_SYSTEM(p) { 4112 if (p->p_pid != pid) 4113 continue; 4114 4115 if (p->p_vmspace) { 4116 int i,j; 4117 index = 0; 4118 pmap = vmspace_pmap(p->p_vmspace); 4119 for (i = 0; i < NPDEPTD; i++) { 4120 pd_entry_t *pde; 4121 pt_entry_t *pte; 4122 vm_offset_t base = i << PDRSHIFT; 4123 4124 pde = &pmap->pm_pdir[i]; 4125 if (pde && pmap_pde_v(pde)) { 4126 for (j = 0; j < NPTEPG; j++) { 4127 vm_offset_t va = base + (j << PAGE_SHIFT); 4128 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 4129 if (index) { 4130 index = 0; 4131 printf("\n"); 4132 } 4133 sx_sunlock(&allproc_lock); 4134 return npte; 4135 } 4136 pte = pmap_pte(pmap, va); 4137 if (pte && pmap_pte_v(pte)) { 4138 pt_entry_t pa; 4139 vm_page_t m; 4140 pa = PT_GET(pte); 4141 m = PHYS_TO_VM_PAGE(pa & PG_FRAME); 4142 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 4143 va, pa, m->hold_count, m->wire_count, m->flags); 4144 npte++; 4145 index++; 4146 if (index >= 2) { 4147 index = 0; 4148 printf("\n"); 4149 } else { 4150 printf(" "); 4151 } 4152 } 4153 } 4154 } 4155 } 4156 } 4157 } 4158 sx_sunlock(&allproc_lock); 4159 return npte; 4160} 4161#endif 4162 4163#if defined(DEBUG) 4164 4165static void pads(pmap_t pm); 4166void pmap_pvdump(vm_paddr_t pa); 4167 4168/* print address space of pmap*/ 4169static void 4170pads(pmap_t pm) 4171{ 4172 int i, j; 4173 vm_paddr_t va; 4174 pt_entry_t *ptep; 4175 4176 if (pm == kernel_pmap) 4177 return; 4178 for (i = 0; i < NPDEPTD; i++) 4179 if (pm->pm_pdir[i]) 4180 for (j = 0; j < NPTEPG; j++) { 4181 va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 4182 if (pm == kernel_pmap && va < KERNBASE) 4183 continue; 4184 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 4185 continue; 4186 ptep = pmap_pte(pm, va); 4187 if (pmap_pte_v(ptep)) 4188 printf("%x:%x ", va, *ptep); 4189 }; 4190 4191} 4192 4193void 4194pmap_pvdump(vm_paddr_t pa) 4195{ 4196 pv_entry_t pv; 4197 pmap_t pmap; 4198 vm_page_t m; 4199 4200 printf("pa %x", pa); 4201 m = PHYS_TO_VM_PAGE(pa); 4202 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 4203 pmap = PV_PMAP(pv); 4204 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va); 4205 pads(pmap); 4206 } 4207 printf(" "); 4208} 4209#endif 4210