pmap.c revision 182902
1/*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * Copyright (c) 1994 John S. Dyson 5 * All rights reserved. 6 * Copyright (c) 1994 David Greenman 7 * All rights reserved. 8 * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu> 9 * All rights reserved. 10 * 11 * This code is derived from software contributed to Berkeley by 12 * the Systems Programming Group of the University of Utah Computer 13 * Science Department and William Jolitz of UUNET Technologies Inc. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the University of 26 * California, Berkeley and its contributors. 27 * 4. Neither the name of the University nor the names of its contributors 28 * may be used to endorse or promote products derived from this software 29 * without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41 * SUCH DAMAGE. 42 * 43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 44 */ 45/*- 46 * Copyright (c) 2003 Networks Associates Technology, Inc. 47 * All rights reserved. 48 * 49 * This software was developed for the FreeBSD Project by Jake Burkholder, 50 * Safeport Network Services, and Network Associates Laboratories, the 51 * Security Research Division of Network Associates, Inc. under 52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 53 * CHATS research program. 54 * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 1. Redistributions of source code must retain the above copyright 59 * notice, this list of conditions and the following disclaimer. 60 * 2. Redistributions in binary form must reproduce the above copyright 61 * notice, this list of conditions and the following disclaimer in the 62 * documentation and/or other materials provided with the distribution. 63 * 64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 74 * SUCH DAMAGE. 75 */ 76 77#include <sys/cdefs.h> 78__FBSDID("$FreeBSD: head/sys/i386/xen/pmap.c 182902 2008-09-10 07:11:08Z kmacy $"); 79 80/* 81 * Manages physical address maps. 82 * 83 * In addition to hardware address maps, this 84 * module is called upon to provide software-use-only 85 * maps which may or may not be stored in the same 86 * form as hardware maps. These pseudo-maps are 87 * used to store intermediate results from copy 88 * operations to and from address spaces. 89 * 90 * Since the information managed by this module is 91 * also stored by the logical address mapping module, 92 * this module may throw away valid virtual-to-physical 93 * mappings at almost any time. However, invalidations 94 * of virtual-to-physical mappings must be done as 95 * requested. 96 * 97 * In order to cope with hardware architectures which 98 * make virtual-to-physical map invalidates expensive, 99 * this module may delay invalidate or reduced protection 100 * operations until such time as they are actually 101 * necessary. This module is given full information as 102 * to which processors are currently using which maps, 103 * and to when physical maps must be made correct. 104 */ 105 106#define PMAP_DIAGNOSTIC 107 108#include "opt_cpu.h" 109#include "opt_pmap.h" 110#include "opt_msgbuf.h" 111#include "opt_smp.h" 112#include "opt_xbox.h" 113 114#include <sys/param.h> 115#include <sys/systm.h> 116#include <sys/kernel.h> 117#include <sys/ktr.h> 118#include <sys/lock.h> 119#include <sys/malloc.h> 120#include <sys/mman.h> 121#include <sys/msgbuf.h> 122#include <sys/mutex.h> 123#include <sys/proc.h> 124#include <sys/sx.h> 125#include <sys/vmmeter.h> 126#include <sys/sched.h> 127#include <sys/sysctl.h> 128#ifdef SMP 129#include <sys/smp.h> 130#endif 131 132#include <vm/vm.h> 133#include <vm/vm_param.h> 134#include <vm/vm_kern.h> 135#include <vm/vm_page.h> 136#include <vm/vm_map.h> 137#include <vm/vm_object.h> 138#include <vm/vm_extern.h> 139#include <vm/vm_pageout.h> 140#include <vm/vm_pager.h> 141#include <vm/uma.h> 142 143#include <machine/cpu.h> 144#include <machine/cputypes.h> 145#include <machine/md_var.h> 146#include <machine/pcb.h> 147#include <machine/specialreg.h> 148#ifdef SMP 149#include <machine/smp.h> 150#endif 151 152#ifdef XBOX 153#include <machine/xbox.h> 154#endif 155 156#include <xen/interface/xen.h> 157#include <machine/xen/hypervisor.h> 158#include <machine/xen/hypercall.h> 159#include <machine/xen/xenvar.h> 160#include <machine/xen/xenfunc.h> 161 162#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 163#define CPU_ENABLE_SSE 164#endif 165 166#ifndef PMAP_SHPGPERPROC 167#define PMAP_SHPGPERPROC 200 168#endif 169 170#if defined(DIAGNOSTIC) 171#define PMAP_DIAGNOSTIC 172#endif 173 174#if !defined(PMAP_DIAGNOSTIC) 175#define PMAP_INLINE __gnu89_inline 176#else 177#define PMAP_INLINE 178#endif 179 180#define PV_STATS 181#ifdef PV_STATS 182#define PV_STAT(x) do { x ; } while (0) 183#else 184#define PV_STAT(x) do { } while (0) 185#endif 186 187#define pa_index(pa) ((pa) >> PDRSHIFT) 188#define pa_to_pvh(pa) (&pv_table[pa_index(pa)]) 189 190/* 191 * Get PDEs and PTEs for user/kernel address space 192 */ 193#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 194#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 195 196#define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 197#define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 198#define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 199#define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 200#define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 201 202#define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 203 204struct pmap kernel_pmap_store; 205LIST_HEAD(pmaplist, pmap); 206static struct pmaplist allpmaps; 207static struct mtx allpmaps_lock; 208 209vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 210vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 211int pgeflag = 0; /* PG_G or-in */ 212int pseflag = 0; /* PG_PS or-in */ 213 214int nkpt; 215vm_offset_t kernel_vm_end; 216extern u_int32_t KERNend; 217 218#ifdef PAE 219pt_entry_t pg_nx; 220#if !defined(XEN) 221static uma_zone_t pdptzone; 222#endif 223#endif 224 225/* 226 * Data for the pv entry allocation mechanism 227 */ 228static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 229static struct md_page *pv_table; 230static int shpgperproc = PMAP_SHPGPERPROC; 231 232struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */ 233int pv_maxchunks; /* How many chunks we have KVA for */ 234vm_offset_t pv_vafree; /* freelist stored in the PTE */ 235 236/* 237 * All those kernel PT submaps that BSD is so fond of 238 */ 239struct sysmaps { 240 struct mtx lock; 241 pt_entry_t *CMAP1; 242 pt_entry_t *CMAP2; 243 caddr_t CADDR1; 244 caddr_t CADDR2; 245}; 246static struct sysmaps sysmaps_pcpu[MAXCPU]; 247pt_entry_t *CMAP1 = 0; 248static pt_entry_t *CMAP3; 249caddr_t CADDR1 = 0, ptvmmap = 0; 250static caddr_t CADDR3; 251struct msgbuf *msgbufp = 0; 252 253/* 254 * Crashdump maps. 255 */ 256static caddr_t crashdumpmap; 257 258static pt_entry_t *PMAP1 = 0, *PMAP2; 259static pt_entry_t *PADDR1 = 0, *PADDR2; 260#ifdef SMP 261static int PMAP1cpu; 262static int PMAP1changedcpu; 263SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD, 264 &PMAP1changedcpu, 0, 265 "Number of times pmap_pte_quick changed CPU with same PMAP1"); 266#endif 267static int PMAP1changed; 268SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD, 269 &PMAP1changed, 0, 270 "Number of times pmap_pte_quick changed PMAP1"); 271static int PMAP1unchanged; 272SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD, 273 &PMAP1unchanged, 0, 274 "Number of times pmap_pte_quick didn't change PMAP1"); 275static struct mtx PMAP2mutex; 276 277SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters"); 278static int pg_ps_enabled; 279SYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RD, &pg_ps_enabled, 0, 280 "Are large page mappings enabled?"); 281 282SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0, 283 "Max number of PV entries"); 284SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0, 285 "Page share factor per proc"); 286 287static void free_pv_entry(pmap_t pmap, pv_entry_t pv); 288static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try); 289 290static vm_page_t pmap_enter_quick_locked(multicall_entry_t **mcl, int *count, pmap_t pmap, vm_offset_t va, 291 vm_page_t m, vm_prot_t prot, vm_page_t mpte); 292static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva, 293 vm_page_t *free); 294static void pmap_remove_page(struct pmap *pmap, vm_offset_t va, 295 vm_page_t *free); 296static void pmap_remove_entry(struct pmap *pmap, vm_page_t m, 297 vm_offset_t va); 298static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m); 299static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, 300 vm_page_t m); 301 302static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags); 303 304static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags); 305static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free); 306static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va); 307static void pmap_pte_release(pt_entry_t *pte); 308static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *); 309static vm_offset_t pmap_kmem_choose(vm_offset_t addr); 310static boolean_t pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr); 311static void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode); 312 313 314#if defined(PAE) && !defined(XEN) 315static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 316#endif 317 318CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 319CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 320 321/* 322 * If you get an error here, then you set KVA_PAGES wrong! See the 323 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be 324 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE. 325 */ 326CTASSERT(KERNBASE % (1 << 24) == 0); 327 328 329 330static __inline void 331pagezero(void *page) 332{ 333#if defined(I686_CPU) 334 if (cpu_class == CPUCLASS_686) { 335#if defined(CPU_ENABLE_SSE) 336 if (cpu_feature & CPUID_SSE2) 337 sse2_pagezero(page); 338 else 339#endif 340 i686_pagezero(page); 341 } else 342#endif 343 bzero(page, PAGE_SIZE); 344} 345 346void 347pd_set(struct pmap *pmap, int ptepindex, vm_paddr_t val, int type) 348{ 349 vm_paddr_t pdir_ma = vtomach(&pmap->pm_pdir[ptepindex]); 350 351 switch (type) { 352 case SH_PD_SET_VA: 353#if 0 354 xen_queue_pt_update(shadow_pdir_ma, 355 xpmap_ptom(val & ~(PG_RW))); 356#endif 357 xen_queue_pt_update(pdir_ma, 358 xpmap_ptom(val)); 359 break; 360 case SH_PD_SET_VA_MA: 361#if 0 362 xen_queue_pt_update(shadow_pdir_ma, 363 val & ~(PG_RW)); 364#endif 365 xen_queue_pt_update(pdir_ma, val); 366 break; 367 case SH_PD_SET_VA_CLEAR: 368#if 0 369 xen_queue_pt_update(shadow_pdir_ma, 0); 370#endif 371 xen_queue_pt_update(pdir_ma, 0); 372 break; 373 } 374} 375 376/* 377 * Move the kernel virtual free pointer to the next 378 * 4MB. This is used to help improve performance 379 * by using a large (4MB) page for much of the kernel 380 * (.text, .data, .bss) 381 */ 382static vm_offset_t 383pmap_kmem_choose(vm_offset_t addr) 384{ 385 vm_offset_t newaddr = addr; 386 387#ifndef DISABLE_PSE 388 if (cpu_feature & CPUID_PSE) 389 newaddr = (addr + PDRMASK) & ~PDRMASK; 390#endif 391 return newaddr; 392} 393 394/* 395 * Bootstrap the system enough to run with virtual memory. 396 * 397 * On the i386 this is called after mapping has already been enabled 398 * and just syncs the pmap module with what has already been done. 399 * [We can't call it easily with mapping off since the kernel is not 400 * mapped with PA == VA, hence we would have to relocate every address 401 * from the linked base (virtual) address "KERNBASE" to the actual 402 * (physical) address starting relative to 0] 403 */ 404void 405pmap_bootstrap(vm_paddr_t firstaddr) 406{ 407 vm_offset_t va; 408 pt_entry_t *pte, *unused; 409 struct sysmaps *sysmaps; 410 int i; 411 412 /* 413 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 414 * large. It should instead be correctly calculated in locore.s and 415 * not based on 'first' (which is a physical address, not a virtual 416 * address, for the start of unused physical memory). The kernel 417 * page tables are NOT double mapped and thus should not be included 418 * in this calculation. 419 */ 420 virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 421 virtual_avail = pmap_kmem_choose(virtual_avail); 422 423 virtual_end = VM_MAX_KERNEL_ADDRESS; 424 425 /* 426 * Initialize the kernel pmap (which is statically allocated). 427 */ 428 PMAP_LOCK_INIT(kernel_pmap); 429 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 430#ifdef PAE 431 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 432#endif 433 kernel_pmap->pm_active = -1; /* don't allow deactivation */ 434 TAILQ_INIT(&kernel_pmap->pm_pvchunk); 435 LIST_INIT(&allpmaps); 436 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 437 mtx_lock_spin(&allpmaps_lock); 438 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 439 mtx_unlock_spin(&allpmaps_lock); 440 nkpt = NKPT; 441 442 /* 443 * Reserve some special page table entries/VA space for temporary 444 * mapping of pages. 445 */ 446#define SYSMAP(c, p, v, n) \ 447 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 448 449 va = virtual_avail; 450 pte = vtopte(va); 451 452 /* 453 * CMAP1/CMAP2 are used for zeroing and copying pages. 454 * CMAP3 is used for the idle process page zeroing. 455 */ 456 for (i = 0; i < MAXCPU; i++) { 457 sysmaps = &sysmaps_pcpu[i]; 458 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF); 459 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1) 460 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1) 461 } 462 SYSMAP(caddr_t, CMAP1, CADDR1, 1) 463 SYSMAP(caddr_t, CMAP3, CADDR3, 1) 464 PT_SET_MA(CADDR3, 0); 465 466 /* 467 * Crashdump maps. 468 */ 469 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS) 470 471 /* 472 * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 473 */ 474 SYSMAP(caddr_t, unused, ptvmmap, 1) 475 476 /* 477 * msgbufp is used to map the system message buffer. 478 */ 479 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE))) 480 481 /* 482 * ptemap is used for pmap_pte_quick 483 */ 484 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 485 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1); 486 487 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF); 488 489 virtual_avail = va; 490 PT_SET_MA(CADDR1, 0); 491 492 /* 493 * Leave in place an identity mapping (virt == phys) for the low 1 MB 494 * physical memory region that is used by the ACPI wakeup code. This 495 * mapping must not have PG_G set. 496 */ 497#ifndef XEN 498 /* 499 * leave here deliberately to show that this is not supported 500 */ 501#ifdef XBOX 502 /* FIXME: This is gross, but needed for the XBOX. Since we are in such 503 * an early stadium, we cannot yet neatly map video memory ... :-( 504 * Better fixes are very welcome! */ 505 if (!arch_i386_is_xbox) 506#endif 507 for (i = 1; i < NKPT; i++) 508 PTD[i] = 0; 509 510 /* Initialize the PAT MSR if present. */ 511 pmap_init_pat(); 512 513 /* Turn on PG_G on kernel page(s) */ 514 pmap_set_pg(); 515#endif 516} 517 518/* 519 * Setup the PAT MSR. 520 */ 521void 522pmap_init_pat(void) 523{ 524 uint64_t pat_msr; 525 526 /* Bail if this CPU doesn't implement PAT. */ 527 if (!(cpu_feature & CPUID_PAT)) 528 return; 529 530#ifdef PAT_WORKS 531 /* 532 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-. 533 * Program 4 and 5 as WP and WC. 534 * Leave 6 and 7 as UC and UC-. 535 */ 536 pat_msr = rdmsr(MSR_PAT); 537 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5)); 538 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) | 539 PAT_VALUE(5, PAT_WRITE_COMBINING); 540#else 541 /* 542 * Due to some Intel errata, we can only safely use the lower 4 543 * PAT entries. Thus, just replace PAT Index 2 with WC instead 544 * of UC-. 545 * 546 * Intel Pentium III Processor Specification Update 547 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B 548 * or Mode C Paging) 549 * 550 * Intel Pentium IV Processor Specification Update 551 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly) 552 */ 553 pat_msr = rdmsr(MSR_PAT); 554 pat_msr &= ~PAT_MASK(2); 555 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING); 556#endif 557 wrmsr(MSR_PAT, pat_msr); 558} 559 560/* 561 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on. 562 */ 563void 564pmap_set_pg(void) 565{ 566 pd_entry_t pdir; 567 pt_entry_t *pte; 568 vm_offset_t va, endva; 569 int i; 570 571 if (pgeflag == 0) 572 return; 573 574 i = KERNLOAD/NBPDR; 575 endva = KERNBASE + KERNend; 576 577 if (pseflag) { 578 va = KERNBASE + KERNLOAD; 579 while (va < endva) { 580 pdir = kernel_pmap->pm_pdir[KPTDI+i]; 581 pdir |= pgeflag; 582 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir; 583 invltlb(); /* Play it safe, invltlb() every time */ 584 i++; 585 va += NBPDR; 586 } 587 } else { 588 va = (vm_offset_t)btext; 589 while (va < endva) { 590 pte = vtopte(va); 591 if (*pte & PG_V) 592 *pte |= pgeflag; 593 invltlb(); /* Play it safe, invltlb() every time */ 594 va += PAGE_SIZE; 595 } 596 } 597} 598 599/* 600 * Initialize a vm_page's machine-dependent fields. 601 */ 602void 603pmap_page_init(vm_page_t m) 604{ 605 606 TAILQ_INIT(&m->md.pv_list); 607} 608 609#if defined(PAE) && !defined(XEN) 610 611static MALLOC_DEFINE(M_PMAPPDPT, "pmap", "pmap pdpt"); 612 613static void * 614pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 615{ 616 *flags = UMA_SLAB_PRIV; 617 return (contigmalloc(PAGE_SIZE, M_PMAPPDPT, 0, 0x0ULL, 0xffffffffULL, 618 1, 0)); 619} 620#endif 621 622/* 623 * ABuse the pte nodes for unmapped kva to thread a kva freelist through. 624 * Requirements: 625 * - Must deal with pages in order to ensure that none of the PG_* bits 626 * are ever set, PG_V in particular. 627 * - Assumes we can write to ptes without pte_store() atomic ops, even 628 * on PAE systems. This should be ok. 629 * - Assumes nothing will ever test these addresses for 0 to indicate 630 * no mapping instead of correctly checking PG_V. 631 * - Assumes a vm_offset_t will fit in a pte (true for i386). 632 * Because PG_V is never set, there can be no mappings to invalidate. 633 */ 634static int ptelist_count = 0; 635static vm_offset_t 636pmap_ptelist_alloc(vm_offset_t *head) 637{ 638 vm_offset_t va; 639 vm_offset_t *phead = (vm_offset_t *)*head; 640 641 if (ptelist_count == 0) { 642 printf("out of memory!!!!!!\n"); 643 return (0); /* Out of memory */ 644 } 645 ptelist_count--; 646 va = phead[ptelist_count]; 647 return (va); 648} 649 650static void 651pmap_ptelist_free(vm_offset_t *head, vm_offset_t va) 652{ 653 vm_offset_t *phead = (vm_offset_t *)*head; 654 655 phead[ptelist_count++] = va; 656} 657 658static void 659pmap_ptelist_init(vm_offset_t *head, void *base, int npages) 660{ 661 int i, nstackpages; 662 vm_offset_t va; 663 vm_page_t m; 664 665 nstackpages = (npages + PAGE_SIZE/sizeof(vm_offset_t) - 1)/ (PAGE_SIZE/sizeof(vm_offset_t)); 666 for (i = 0; i < nstackpages; i++) { 667 va = (vm_offset_t)base + i * PAGE_SIZE; 668 m = vm_page_alloc(NULL, i, 669 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 670 VM_ALLOC_ZERO); 671 pmap_qenter(va, &m, 1); 672 } 673 674 *head = (vm_offset_t)base; 675 for (i = npages - 1; i >= nstackpages; i--) { 676 va = (vm_offset_t)base + i * PAGE_SIZE; 677 pmap_ptelist_free(head, va); 678 } 679} 680 681 682/* 683 * Initialize the pmap module. 684 * Called by vm_init, to initialize any structures that the pmap 685 * system needs to map virtual memory. 686 */ 687void 688pmap_init(void) 689{ 690 vm_page_t mpte; 691 vm_size_t s; 692 int i, pv_npg; 693 694 /* 695 * Initialize the vm page array entries for the kernel pmap's 696 * page table pages. 697 */ 698 for (i = 0; i < nkpt; i++) { 699 mpte = PHYS_TO_VM_PAGE(xpmap_mtop(PTD[i + KPTDI] & PG_FRAME)); 700 KASSERT(mpte >= vm_page_array && 701 mpte < &vm_page_array[vm_page_array_size], 702 ("pmap_init: page table page is out of range")); 703 mpte->pindex = i + KPTDI; 704 mpte->phys_addr = xpmap_mtop(PTD[i + KPTDI] & PG_FRAME); 705 } 706 707 /* 708 * Initialize the address space (zone) for the pv entries. Set a 709 * high water mark so that the system can recover from excessive 710 * numbers of pv entries. 711 */ 712 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 713 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count; 714 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 715 pv_entry_max = roundup(pv_entry_max, _NPCPV); 716 pv_entry_high_water = 9 * (pv_entry_max / 10); 717 718 /* 719 * Are large page mappings enabled? 720 */ 721 TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled); 722 723 /* 724 * Calculate the size of the pv head table for superpages. 725 */ 726 for (i = 0; phys_avail[i + 1]; i += 2); 727 pv_npg = round_4mpage(phys_avail[(i - 2) + 1]) / NBPDR; 728 729 /* 730 * Allocate memory for the pv head table for superpages. 731 */ 732 s = (vm_size_t)(pv_npg * sizeof(struct md_page)); 733 s = round_page(s); 734 pv_table = (struct md_page *)kmem_alloc(kernel_map, s); 735 for (i = 0; i < pv_npg; i++) 736 TAILQ_INIT(&pv_table[i].pv_list); 737 738 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc); 739 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map, 740 PAGE_SIZE * pv_maxchunks); 741 if (pv_chunkbase == NULL) 742 panic("pmap_init: not enough kvm for pv chunks"); 743 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks); 744#if defined(PAE) && !defined(XEN) 745 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL, 746 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1, 747 UMA_ZONE_VM | UMA_ZONE_NOFREE); 748 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf); 749#endif 750} 751 752 753/*************************************************** 754 * Low level helper routines..... 755 ***************************************************/ 756 757/* 758 * Determine the appropriate bits to set in a PTE or PDE for a specified 759 * caching mode. 760 */ 761static int 762pmap_cache_bits(int mode, boolean_t is_pde) 763{ 764 int pat_flag, pat_index, cache_bits; 765 766 /* The PAT bit is different for PTE's and PDE's. */ 767 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT; 768 769 /* If we don't support PAT, map extended modes to older ones. */ 770 if (!(cpu_feature & CPUID_PAT)) { 771 switch (mode) { 772 case PAT_UNCACHEABLE: 773 case PAT_WRITE_THROUGH: 774 case PAT_WRITE_BACK: 775 break; 776 case PAT_UNCACHED: 777 case PAT_WRITE_COMBINING: 778 case PAT_WRITE_PROTECTED: 779 mode = PAT_UNCACHEABLE; 780 break; 781 } 782 } 783 784 /* Map the caching mode to a PAT index. */ 785 switch (mode) { 786#ifdef PAT_WORKS 787 case PAT_UNCACHEABLE: 788 pat_index = 3; 789 break; 790 case PAT_WRITE_THROUGH: 791 pat_index = 1; 792 break; 793 case PAT_WRITE_BACK: 794 pat_index = 0; 795 break; 796 case PAT_UNCACHED: 797 pat_index = 2; 798 break; 799 case PAT_WRITE_COMBINING: 800 pat_index = 5; 801 break; 802 case PAT_WRITE_PROTECTED: 803 pat_index = 4; 804 break; 805#else 806 case PAT_UNCACHED: 807 case PAT_UNCACHEABLE: 808 case PAT_WRITE_PROTECTED: 809 pat_index = 3; 810 break; 811 case PAT_WRITE_THROUGH: 812 pat_index = 1; 813 break; 814 case PAT_WRITE_BACK: 815 pat_index = 0; 816 break; 817 case PAT_WRITE_COMBINING: 818 pat_index = 2; 819 break; 820#endif 821 default: 822 panic("Unknown caching mode %d\n", mode); 823 } 824 825 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */ 826 cache_bits = 0; 827 if (pat_index & 0x4) 828 cache_bits |= pat_flag; 829 if (pat_index & 0x2) 830 cache_bits |= PG_NC_PCD; 831 if (pat_index & 0x1) 832 cache_bits |= PG_NC_PWT; 833 return (cache_bits); 834} 835#ifdef SMP 836/* 837 * For SMP, these functions have to use the IPI mechanism for coherence. 838 * 839 * N.B.: Before calling any of the following TLB invalidation functions, 840 * the calling processor must ensure that all stores updating a non- 841 * kernel page table are globally performed. Otherwise, another 842 * processor could cache an old, pre-update entry without being 843 * invalidated. This can happen one of two ways: (1) The pmap becomes 844 * active on another processor after its pm_active field is checked by 845 * one of the following functions but before a store updating the page 846 * table is globally performed. (2) The pmap becomes active on another 847 * processor before its pm_active field is checked but due to 848 * speculative loads one of the following functions stills reads the 849 * pmap as inactive on the other processor. 850 * 851 * The kernel page table is exempt because its pm_active field is 852 * immutable. The kernel page table is always active on every 853 * processor. 854 */ 855void 856pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 857{ 858 u_int cpumask; 859 u_int other_cpus; 860 861 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x", 862 pmap, va); 863 864 sched_pin(); 865 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 866 invlpg(va); 867 smp_invlpg(va); 868 } else { 869 cpumask = PCPU_GET(cpumask); 870 other_cpus = PCPU_GET(other_cpus); 871 if (pmap->pm_active & cpumask) 872 invlpg(va); 873 if (pmap->pm_active & other_cpus) 874 smp_masked_invlpg(pmap->pm_active & other_cpus, va); 875 } 876 sched_unpin(); 877 PT_UPDATES_FLUSH(); 878} 879 880void 881pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 882{ 883 u_int cpumask; 884 u_int other_cpus; 885 vm_offset_t addr; 886 887 CTR3(KTR_PMAP, "pmap_invalidate_page: pmap=%p eva=0x%x sva=0x%x", 888 pmap, sva, eva); 889 890 sched_pin(); 891 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 892 for (addr = sva; addr < eva; addr += PAGE_SIZE) 893 invlpg(addr); 894 smp_invlpg_range(sva, eva); 895 } else { 896 cpumask = PCPU_GET(cpumask); 897 other_cpus = PCPU_GET(other_cpus); 898 if (pmap->pm_active & cpumask) 899 for (addr = sva; addr < eva; addr += PAGE_SIZE) 900 invlpg(addr); 901 if (pmap->pm_active & other_cpus) 902 smp_masked_invlpg_range(pmap->pm_active & other_cpus, 903 sva, eva); 904 } 905 sched_unpin(); 906 PT_UPDATES_FLUSH(); 907} 908 909void 910pmap_invalidate_all(pmap_t pmap) 911{ 912 u_int cpumask; 913 u_int other_cpus; 914 915 CTR1(KTR_PMAP, "pmap_invalidate_page: pmap=%p", pmap); 916 917 sched_pin(); 918 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 919 invltlb(); 920 smp_invltlb(); 921 } else { 922 cpumask = PCPU_GET(cpumask); 923 other_cpus = PCPU_GET(other_cpus); 924 if (pmap->pm_active & cpumask) 925 invltlb(); 926 if (pmap->pm_active & other_cpus) 927 smp_masked_invltlb(pmap->pm_active & other_cpus); 928 } 929 sched_unpin(); 930} 931 932void 933pmap_invalidate_cache(void) 934{ 935 936 sched_pin(); 937 wbinvd(); 938 smp_cache_flush(); 939 sched_unpin(); 940} 941#else /* !SMP */ 942/* 943 * Normal, non-SMP, 486+ invalidation functions. 944 * We inline these within pmap.c for speed. 945 */ 946PMAP_INLINE void 947pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 948{ 949 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x", 950 pmap, va); 951 952 if (pmap == kernel_pmap || pmap->pm_active) 953 invlpg(va); 954 PT_UPDATES_FLUSH(); 955} 956 957PMAP_INLINE void 958pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 959{ 960 vm_offset_t addr; 961 962 if (eva - sva > PAGE_SIZE) 963 CTR3(KTR_PMAP, "pmap_invalidate_range: pmap=%p sva=0x%x eva=0x%x", 964 pmap, sva, eva); 965 966 if (pmap == kernel_pmap || pmap->pm_active) 967 for (addr = sva; addr < eva; addr += PAGE_SIZE) 968 invlpg(addr); 969 PT_UPDATES_FLUSH(); 970} 971 972PMAP_INLINE void 973pmap_invalidate_all(pmap_t pmap) 974{ 975 976 CTR1(KTR_PMAP, "pmap_invalidate_all: pmap=%p", pmap); 977 978 if (pmap == kernel_pmap || pmap->pm_active) 979 invltlb(); 980} 981 982PMAP_INLINE void 983pmap_invalidate_cache(void) 984{ 985 986 wbinvd(); 987} 988#endif /* !SMP */ 989 990/* 991 * Are we current address space or kernel? N.B. We return FALSE when 992 * a pmap's page table is in use because a kernel thread is borrowing 993 * it. The borrowed page table can change spontaneously, making any 994 * dependence on its continued use subject to a race condition. 995 */ 996static __inline int 997pmap_is_current(pmap_t pmap) 998{ 999 1000 return (pmap == kernel_pmap || 1001 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) && 1002 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME))); 1003} 1004 1005/* 1006 * If the given pmap is not the current or kernel pmap, the returned pte must 1007 * be released by passing it to pmap_pte_release(). 1008 */ 1009pt_entry_t * 1010pmap_pte(pmap_t pmap, vm_offset_t va) 1011{ 1012 pd_entry_t newpf; 1013 pd_entry_t *pde; 1014 1015 pde = pmap_pde(pmap, va); 1016 if (*pde & PG_PS) 1017 return (pde); 1018 if (*pde != 0) { 1019 /* are we current address space or kernel? */ 1020 if (pmap_is_current(pmap)) 1021 return (vtopte(va)); 1022 mtx_lock(&PMAP2mutex); 1023 newpf = *pde & PG_FRAME; 1024 if ((*PMAP2 & PG_FRAME) != newpf) { 1025 PT_SET_MA(PADDR2, newpf | PG_V | PG_A | PG_M); 1026 CTR3(KTR_PMAP, "pmap_pte: pmap=%p va=0x%x newpte=0x%08x", 1027 pmap, va, (*PMAP2 & 0xffffffff)); 1028 } 1029 1030 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1))); 1031 } 1032 return (0); 1033} 1034 1035/* 1036 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte 1037 * being NULL. 1038 */ 1039static __inline void 1040pmap_pte_release(pt_entry_t *pte) 1041{ 1042 1043 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) { 1044 CTR1(KTR_PMAP, "pmap_pte_release: pte=0x%jx", 1045 *PMAP2); 1046 PT_SET_VA(PMAP2, 0, TRUE); 1047 mtx_unlock(&PMAP2mutex); 1048 } 1049} 1050 1051static __inline void 1052invlcaddr(void *caddr) 1053{ 1054 1055 invlpg((u_int)caddr); 1056 PT_UPDATES_FLUSH(); 1057} 1058 1059/* 1060 * Super fast pmap_pte routine best used when scanning 1061 * the pv lists. This eliminates many coarse-grained 1062 * invltlb calls. Note that many of the pv list 1063 * scans are across different pmaps. It is very wasteful 1064 * to do an entire invltlb for checking a single mapping. 1065 * 1066 * If the given pmap is not the current pmap, vm_page_queue_mtx 1067 * must be held and curthread pinned to a CPU. 1068 */ 1069static pt_entry_t * 1070pmap_pte_quick(pmap_t pmap, vm_offset_t va) 1071{ 1072 pd_entry_t newpf; 1073 pd_entry_t *pde; 1074 1075 pde = pmap_pde(pmap, va); 1076 if (*pde & PG_PS) 1077 return (pde); 1078 if (*pde != 0) { 1079 /* are we current address space or kernel? */ 1080 if (pmap_is_current(pmap)) 1081 return (vtopte(va)); 1082 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1083 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 1084 newpf = *pde & PG_FRAME; 1085 if ((*PMAP1 & PG_FRAME) != newpf) { 1086 PT_SET_MA(PADDR1, newpf | PG_V | PG_A | PG_M); 1087 CTR3(KTR_PMAP, "pmap_pte_quick: pmap=%p va=0x%x newpte=0x%08x", 1088 pmap, va, (u_long)*PMAP1); 1089 1090#ifdef SMP 1091 PMAP1cpu = PCPU_GET(cpuid); 1092#endif 1093 PMAP1changed++; 1094 } else 1095#ifdef SMP 1096 if (PMAP1cpu != PCPU_GET(cpuid)) { 1097 PMAP1cpu = PCPU_GET(cpuid); 1098 invlcaddr(PADDR1); 1099 PMAP1changedcpu++; 1100 } else 1101#endif 1102 PMAP1unchanged++; 1103 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1))); 1104 } 1105 return (0); 1106} 1107 1108/* 1109 * Routine: pmap_extract 1110 * Function: 1111 * Extract the physical page address associated 1112 * with the given map/virtual_address pair. 1113 */ 1114vm_paddr_t 1115pmap_extract(pmap_t pmap, vm_offset_t va) 1116{ 1117 vm_paddr_t rtval; 1118 pt_entry_t *pte; 1119 pd_entry_t pde; 1120 pt_entry_t pteval; 1121 1122 rtval = 0; 1123 PMAP_LOCK(pmap); 1124 pde = pmap->pm_pdir[va >> PDRSHIFT]; 1125 if (pde != 0) { 1126 if ((pde & PG_PS) != 0) { 1127 rtval = xpmap_mtop(pde & PG_PS_FRAME) | (va & PDRMASK); 1128 PMAP_UNLOCK(pmap); 1129 return rtval; 1130 } 1131 pte = pmap_pte(pmap, va); 1132 pteval = *pte ? xpmap_mtop(*pte) : 0; 1133 rtval = (pteval & PG_FRAME) | (va & PAGE_MASK); 1134 pmap_pte_release(pte); 1135 } 1136 PMAP_UNLOCK(pmap); 1137 return (rtval); 1138} 1139 1140/* 1141 * Routine: pmap_extract_ma 1142 * Function: 1143 * Like pmap_extract, but returns machine address 1144 */ 1145vm_paddr_t 1146pmap_extract_ma(pmap_t pmap, vm_offset_t va) 1147{ 1148 vm_paddr_t rtval; 1149 pt_entry_t *pte; 1150 pd_entry_t pde; 1151 1152 rtval = 0; 1153 PMAP_LOCK(pmap); 1154 pde = pmap->pm_pdir[va >> PDRSHIFT]; 1155 if (pde != 0) { 1156 if ((pde & PG_PS) != 0) { 1157 rtval = (pde & ~PDRMASK) | (va & PDRMASK); 1158 PMAP_UNLOCK(pmap); 1159 return rtval; 1160 } 1161 pte = pmap_pte(pmap, va); 1162 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK); 1163 pmap_pte_release(pte); 1164 } 1165 PMAP_UNLOCK(pmap); 1166 return (rtval); 1167} 1168 1169/* 1170 * Routine: pmap_extract_and_hold 1171 * Function: 1172 * Atomically extract and hold the physical page 1173 * with the given pmap and virtual address pair 1174 * if that mapping permits the given protection. 1175 */ 1176vm_page_t 1177pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 1178{ 1179 pd_entry_t pde; 1180 pt_entry_t pte; 1181 vm_page_t m; 1182 1183 m = NULL; 1184 vm_page_lock_queues(); 1185 PMAP_LOCK(pmap); 1186 pde = PT_GET(pmap_pde(pmap, va)); 1187 if (pde != 0) { 1188 if (pde & PG_PS) { 1189 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) { 1190 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) | 1191 (va & PDRMASK)); 1192 vm_page_hold(m); 1193 } 1194 } else { 1195 sched_pin(); 1196 pte = PT_GET(pmap_pte_quick(pmap, va)); 1197 if (*PMAP1) 1198 PT_SET_MA(PADDR1, 0); 1199 if ((pte & PG_V) && 1200 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) { 1201 m = PHYS_TO_VM_PAGE(pte & PG_FRAME); 1202 vm_page_hold(m); 1203 } 1204 sched_unpin(); 1205 } 1206 } 1207 vm_page_unlock_queues(); 1208 PMAP_UNLOCK(pmap); 1209 return (m); 1210} 1211 1212/*************************************************** 1213 * Low level mapping routines..... 1214 ***************************************************/ 1215 1216/* 1217 * Add a wired page to the kva. 1218 * Note: not SMP coherent. 1219 */ 1220void 1221pmap_kenter(vm_offset_t va, vm_paddr_t pa) 1222{ 1223 PT_SET_MA(va, xpmap_ptom(pa)| PG_RW | PG_V | pgeflag); 1224} 1225 1226void 1227pmap_kenter_ma(vm_offset_t va, vm_paddr_t ma) 1228{ 1229 pt_entry_t *pte; 1230 1231 pte = vtopte(va); 1232 pte_store_ma(pte, ma | PG_RW | PG_V | pgeflag); 1233} 1234 1235 1236static __inline void 1237pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode) 1238{ 1239 PT_SET_MA(va, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0)); 1240} 1241 1242/* 1243 * Remove a page from the kernel pagetables. 1244 * Note: not SMP coherent. 1245 */ 1246PMAP_INLINE void 1247pmap_kremove(vm_offset_t va) 1248{ 1249 pt_entry_t *pte; 1250 1251 pte = vtopte(va); 1252 PT_CLEAR_VA(pte, FALSE); 1253} 1254 1255/* 1256 * Used to map a range of physical addresses into kernel 1257 * virtual address space. 1258 * 1259 * The value passed in '*virt' is a suggested virtual address for 1260 * the mapping. Architectures which can support a direct-mapped 1261 * physical to virtual region can return the appropriate address 1262 * within that region, leaving '*virt' unchanged. Other 1263 * architectures should map the pages starting at '*virt' and 1264 * update '*virt' with the first usable address after the mapped 1265 * region. 1266 */ 1267vm_offset_t 1268pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 1269{ 1270 vm_offset_t va, sva; 1271 1272 va = sva = *virt; 1273 CTR4(KTR_PMAP, "pmap_map: va=0x%x start=0x%jx end=0x%jx prot=0x%x", 1274 va, start, end, prot); 1275 while (start < end) { 1276 pmap_kenter(va, start); 1277 va += PAGE_SIZE; 1278 start += PAGE_SIZE; 1279 } 1280 pmap_invalidate_range(kernel_pmap, sva, va); 1281 *virt = va; 1282 return (sva); 1283} 1284 1285 1286/* 1287 * Add a list of wired pages to the kva 1288 * this routine is only used for temporary 1289 * kernel mappings that do not need to have 1290 * page modification or references recorded. 1291 * Note that old mappings are simply written 1292 * over. The page *must* be wired. 1293 * Note: SMP coherent. Uses a ranged shootdown IPI. 1294 */ 1295void 1296pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count) 1297{ 1298 pt_entry_t *endpte, *pte; 1299 vm_paddr_t pa; 1300 vm_offset_t va = sva; 1301 int mclcount = 0; 1302 multicall_entry_t mcl[16]; 1303 multicall_entry_t *mclp = mcl; 1304 int error; 1305 1306 CTR2(KTR_PMAP, "pmap_qenter:sva=0x%x count=%d", va, count); 1307 pte = vtopte(sva); 1308 endpte = pte + count; 1309 while (pte < endpte) { 1310 pa = xpmap_ptom(VM_PAGE_TO_PHYS(*ma)) | pgeflag | PG_RW | PG_V | PG_M | PG_A; 1311 1312 mclp->op = __HYPERVISOR_update_va_mapping; 1313 mclp->args[0] = va; 1314 mclp->args[1] = (uint32_t)(pa & 0xffffffff); 1315 mclp->args[2] = (uint32_t)(pa >> 32); 1316 mclp->args[3] = (*pte & PG_V) ? UVMF_INVLPG|UVMF_ALL : 0; 1317 1318 va += PAGE_SIZE; 1319 pte++; 1320 ma++; 1321 mclp++; 1322 mclcount++; 1323 if (mclcount == 16) { 1324 error = HYPERVISOR_multicall(mcl, mclcount); 1325 mclp = mcl; 1326 mclcount = 0; 1327 KASSERT(error == 0, ("bad multicall %d", error)); 1328 } 1329 } 1330 if (mclcount) { 1331 error = HYPERVISOR_multicall(mcl, mclcount); 1332 KASSERT(error == 0, ("bad multicall %d", error)); 1333 } 1334 1335#ifdef INVARIANTS 1336 for (pte = vtopte(sva), mclcount = 0; mclcount < count; mclcount++, pte++) 1337 KASSERT(*pte, ("pte not set for va=0x%x", sva + mclcount*PAGE_SIZE)); 1338#endif 1339} 1340 1341 1342/* 1343 * This routine tears out page mappings from the 1344 * kernel -- it is meant only for temporary mappings. 1345 * Note: SMP coherent. Uses a ranged shootdown IPI. 1346 */ 1347void 1348pmap_qremove(vm_offset_t sva, int count) 1349{ 1350 vm_offset_t va; 1351 1352 CTR2(KTR_PMAP, "pmap_qremove: sva=0x%x count=%d", sva, count); 1353 va = sva; 1354 vm_page_lock_queues(); 1355 critical_enter(); 1356 while (count-- > 0) { 1357 pmap_kremove(va); 1358 va += PAGE_SIZE; 1359 } 1360 pmap_invalidate_range(kernel_pmap, sva, va); 1361 critical_exit(); 1362 vm_page_unlock_queues(); 1363} 1364 1365/*************************************************** 1366 * Page table page management routines..... 1367 ***************************************************/ 1368static __inline void 1369pmap_free_zero_pages(vm_page_t free) 1370{ 1371 vm_page_t m; 1372 1373 while (free != NULL) { 1374 m = free; 1375 free = m->right; 1376 vm_page_free_zero(m); 1377 } 1378} 1379 1380/* 1381 * This routine unholds page table pages, and if the hold count 1382 * drops to zero, then it decrements the wire count. 1383 */ 1384static __inline int 1385pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1386{ 1387 1388 --m->wire_count; 1389 if (m->wire_count == 0) 1390 return _pmap_unwire_pte_hold(pmap, m, free); 1391 else 1392 return 0; 1393} 1394 1395static int 1396_pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1397{ 1398 vm_offset_t pteva; 1399 1400 PT_UPDATES_FLUSH(); 1401 /* 1402 * unmap the page table page 1403 */ 1404 xen_pt_unpin(pmap->pm_pdir[m->pindex]); 1405 /* 1406 * page *might* contain residual mapping :-/ 1407 */ 1408 PD_CLEAR_VA(pmap, m->pindex, TRUE); 1409 pmap_zero_page(m); 1410 --pmap->pm_stats.resident_count; 1411 1412 /* 1413 * This is a release store so that the ordinary store unmapping 1414 * the page table page is globally performed before TLB shoot- 1415 * down is begun. 1416 */ 1417 atomic_subtract_rel_int(&cnt.v_wire_count, 1); 1418 1419 /* 1420 * Do an invltlb to make the invalidated mapping 1421 * take effect immediately. 1422 */ 1423 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1424 pmap_invalidate_page(pmap, pteva); 1425 1426 /* 1427 * Put page on a list so that it is released after 1428 * *ALL* TLB shootdown is done 1429 */ 1430 m->right = *free; 1431 *free = m; 1432 1433 return 1; 1434} 1435 1436/* 1437 * After removing a page table entry, this routine is used to 1438 * conditionally free the page, and manage the hold/wire counts. 1439 */ 1440static int 1441pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free) 1442{ 1443 pd_entry_t ptepde; 1444 vm_page_t mpte; 1445 1446 if (va >= VM_MAXUSER_ADDRESS) 1447 return 0; 1448 ptepde = PT_GET(pmap_pde(pmap, va)); 1449 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); 1450 return pmap_unwire_pte_hold(pmap, mpte, free); 1451} 1452 1453void 1454pmap_pinit0(pmap_t pmap) 1455{ 1456 1457 PMAP_LOCK_INIT(pmap); 1458 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1459#ifdef PAE 1460 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1461#endif 1462 pmap->pm_active = 0; 1463 PCPU_SET(curpmap, pmap); 1464 TAILQ_INIT(&pmap->pm_pvchunk); 1465 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1466 mtx_lock_spin(&allpmaps_lock); 1467 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1468 mtx_unlock_spin(&allpmaps_lock); 1469} 1470 1471/* 1472 * Initialize a preallocated and zeroed pmap structure, 1473 * such as one in a vmspace structure. 1474 */ 1475int 1476pmap_pinit(pmap_t pmap) 1477{ 1478 vm_page_t m, ptdpg[NPGPTD + 1]; 1479 int npgptd = NPGPTD + 1; 1480 static int color; 1481 int i; 1482 1483 PMAP_LOCK_INIT(pmap); 1484 1485 /* 1486 * No need to allocate page table space yet but we do need a valid 1487 * page directory table. 1488 */ 1489 if (pmap->pm_pdir == NULL) { 1490 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1491 NBPTD); 1492 if (pmap->pm_pdir == NULL) { 1493 PMAP_LOCK_DESTROY(pmap); 1494 return (0); 1495 } 1496#if defined(XEN) && defined(PAE) 1497 pmap->pm_pdpt = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1); 1498#endif 1499 1500#if defined(PAE) && !defined(XEN) 1501 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO); 1502 KASSERT(((vm_offset_t)pmap->pm_pdpt & 1503 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0, 1504 ("pmap_pinit: pdpt misaligned")); 1505 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30), 1506 ("pmap_pinit: pdpt above 4g")); 1507#endif 1508 } 1509 1510 /* 1511 * allocate the page directory page(s) 1512 */ 1513 for (i = 0; i < npgptd;) { 1514 m = vm_page_alloc(NULL, color++, 1515 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1516 VM_ALLOC_ZERO); 1517 if (m == NULL) 1518 VM_WAIT; 1519 else { 1520 ptdpg[i++] = m; 1521 } 1522 } 1523 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1524 for (i = 0; i < NPGPTD; i++) { 1525 if ((ptdpg[i]->flags & PG_ZERO) == 0) 1526 pagezero(&pmap->pm_pdir[i*NPTEPG]); 1527 } 1528 1529 mtx_lock_spin(&allpmaps_lock); 1530 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1531 mtx_unlock_spin(&allpmaps_lock); 1532 /* Wire in kernel global address entries. */ 1533 1534 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1535#ifdef PAE 1536#ifdef XEN 1537 pmap_qenter((vm_offset_t)pmap->pm_pdpt, &ptdpg[NPGPTD], 1); 1538 if ((ptdpg[NPGPTD]->flags & PG_ZERO) == 0) 1539 bzero(pmap->pm_pdpt, PAGE_SIZE); 1540#endif 1541 for (i = 0; i < NPGPTD; i++) { 1542 vm_paddr_t ma; 1543 1544 ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1545 pmap->pm_pdpt[i] = ma | PG_V; 1546 1547 } 1548#endif 1549#ifdef XEN 1550 for (i = 0; i < NPGPTD; i++) { 1551 pt_entry_t *pd; 1552 vm_paddr_t ma; 1553 1554 ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1555 pd = pmap->pm_pdir + (i * NPDEPG); 1556 PT_SET_MA(pd, *vtopte((vm_offset_t)pd) & ~(PG_M|PG_A|PG_U|PG_RW)); 1557#if 0 1558 xen_pgd_pin(ma); 1559#endif 1560 } 1561 1562#ifdef PAE 1563 PT_SET_MA(pmap->pm_pdpt, *vtopte((vm_offset_t)pmap->pm_pdpt) & ~PG_RW); 1564#endif 1565 vm_page_lock_queues(); 1566 xen_flush_queue(); 1567 xen_pgdpt_pin(xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[NPGPTD]))); 1568 for (i = 0; i < NPGPTD; i++) { 1569 vm_paddr_t ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1570 PT_SET_VA_MA(&pmap->pm_pdir[PTDPTDI + i], ma | PG_V | PG_A, FALSE); 1571 } 1572 xen_flush_queue(); 1573 vm_page_unlock_queues(); 1574#endif 1575 pmap->pm_active = 0; 1576 TAILQ_INIT(&pmap->pm_pvchunk); 1577 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1578 1579 return (1); 1580} 1581 1582/* 1583 * this routine is called if the page table page is not 1584 * mapped correctly. 1585 */ 1586static vm_page_t 1587_pmap_allocpte(pmap_t pmap, unsigned int ptepindex, int flags) 1588{ 1589 vm_paddr_t ptema; 1590 vm_page_t m; 1591 1592 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1593 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1594 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1595 1596 /* 1597 * Allocate a page table page. 1598 */ 1599 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1600 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1601 if (flags & M_WAITOK) { 1602 PMAP_UNLOCK(pmap); 1603 vm_page_unlock_queues(); 1604 VM_WAIT; 1605 vm_page_lock_queues(); 1606 PMAP_LOCK(pmap); 1607 } 1608 1609 /* 1610 * Indicate the need to retry. While waiting, the page table 1611 * page may have been allocated. 1612 */ 1613 return (NULL); 1614 } 1615 if ((m->flags & PG_ZERO) == 0) 1616 pmap_zero_page(m); 1617 1618 /* 1619 * Map the pagetable page into the process address space, if 1620 * it isn't already there. 1621 */ 1622 pmap->pm_stats.resident_count++; 1623 1624 ptema = xpmap_ptom(VM_PAGE_TO_PHYS(m)); 1625 xen_pt_pin(ptema); 1626 PT_SET_VA_MA(&pmap->pm_pdir[ptepindex], 1627 (ptema | PG_U | PG_RW | PG_V | PG_A | PG_M), TRUE); 1628 1629 KASSERT(pmap->pm_pdir[ptepindex], 1630 ("_pmap_allocpte: ptepindex=%d did not get mapped", ptepindex)); 1631 return (m); 1632} 1633 1634static vm_page_t 1635pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags) 1636{ 1637 unsigned ptepindex; 1638 pd_entry_t ptema; 1639 vm_page_t m; 1640 1641 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1642 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1643 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1644 1645 /* 1646 * Calculate pagetable page index 1647 */ 1648 ptepindex = va >> PDRSHIFT; 1649retry: 1650 /* 1651 * Get the page directory entry 1652 */ 1653 ptema = pmap->pm_pdir[ptepindex]; 1654 1655 /* 1656 * This supports switching from a 4MB page to a 1657 * normal 4K page. 1658 */ 1659 if (ptema & PG_PS) { 1660 /* 1661 * XXX 1662 */ 1663 pmap->pm_pdir[ptepindex] = 0; 1664 ptema = 0; 1665 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1666 pmap_invalidate_all(kernel_pmap); 1667 } 1668 1669 /* 1670 * If the page table page is mapped, we just increment the 1671 * hold count, and activate it. 1672 */ 1673 if (ptema & PG_V) { 1674 m = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME); 1675 m->wire_count++; 1676 } else { 1677 /* 1678 * Here if the pte page isn't mapped, or if it has 1679 * been deallocated. 1680 */ 1681 CTR3(KTR_PMAP, "pmap_allocpte: pmap=%p va=0x%08x flags=0x%x", 1682 pmap, va, flags); 1683 m = _pmap_allocpte(pmap, ptepindex, flags); 1684 if (m == NULL && (flags & M_WAITOK)) 1685 goto retry; 1686 1687 KASSERT(pmap->pm_pdir[ptepindex], ("ptepindex=%d did not get mapped", ptepindex)); 1688 } 1689 return (m); 1690} 1691 1692 1693/*************************************************** 1694* Pmap allocation/deallocation routines. 1695 ***************************************************/ 1696 1697#ifdef SMP 1698/* 1699 * Deal with a SMP shootdown of other users of the pmap that we are 1700 * trying to dispose of. This can be a bit hairy. 1701 */ 1702static u_int *lazymask; 1703static u_int lazyptd; 1704static volatile u_int lazywait; 1705 1706void pmap_lazyfix_action(void); 1707 1708void 1709pmap_lazyfix_action(void) 1710{ 1711 u_int mymask = PCPU_GET(cpumask); 1712 1713#ifdef COUNT_IPIS 1714 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++; 1715#endif 1716 if (rcr3() == lazyptd) 1717 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1718 atomic_clear_int(lazymask, mymask); 1719 atomic_store_rel_int(&lazywait, 1); 1720} 1721 1722static void 1723pmap_lazyfix_self(u_int mymask) 1724{ 1725 1726 if (rcr3() == lazyptd) 1727 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1728 atomic_clear_int(lazymask, mymask); 1729} 1730 1731 1732static void 1733pmap_lazyfix(pmap_t pmap) 1734{ 1735 u_int mymask; 1736 u_int mask; 1737 u_int spins; 1738 1739 while ((mask = pmap->pm_active) != 0) { 1740 spins = 50000000; 1741 mask = mask & -mask; /* Find least significant set bit */ 1742 mtx_lock_spin(&smp_ipi_mtx); 1743#ifdef PAE 1744 lazyptd = vtophys(pmap->pm_pdpt); 1745#else 1746 lazyptd = vtophys(pmap->pm_pdir); 1747#endif 1748 mymask = PCPU_GET(cpumask); 1749 if (mask == mymask) { 1750 lazymask = &pmap->pm_active; 1751 pmap_lazyfix_self(mymask); 1752 } else { 1753 atomic_store_rel_int((u_int *)&lazymask, 1754 (u_int)&pmap->pm_active); 1755 atomic_store_rel_int(&lazywait, 0); 1756 ipi_selected(mask, IPI_LAZYPMAP); 1757 while (lazywait == 0) { 1758 ia32_pause(); 1759 if (--spins == 0) 1760 break; 1761 } 1762 } 1763 mtx_unlock_spin(&smp_ipi_mtx); 1764 if (spins == 0) 1765 printf("pmap_lazyfix: spun for 50000000\n"); 1766 } 1767} 1768 1769#else /* SMP */ 1770 1771/* 1772 * Cleaning up on uniprocessor is easy. For various reasons, we're 1773 * unlikely to have to even execute this code, including the fact 1774 * that the cleanup is deferred until the parent does a wait(2), which 1775 * means that another userland process has run. 1776 */ 1777static void 1778pmap_lazyfix(pmap_t pmap) 1779{ 1780 u_int cr3; 1781 1782 cr3 = vtophys(pmap->pm_pdir); 1783 if (cr3 == rcr3()) { 1784 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1785 pmap->pm_active &= ~(PCPU_GET(cpumask)); 1786 } 1787} 1788#endif /* SMP */ 1789 1790/* 1791 * Release any resources held by the given physical map. 1792 * Called when a pmap initialized by pmap_pinit is being released. 1793 * Should only be called if the map contains no valid mappings. 1794 */ 1795void 1796pmap_release(pmap_t pmap) 1797{ 1798 vm_page_t m, ptdpg[2*NPGPTD+1]; 1799 vm_paddr_t ma; 1800 int i; 1801#ifdef XEN 1802#ifdef PAE 1803 int npgptd = NPGPTD + 1; 1804#else 1805 int npgptd = NPGPTD; 1806#endif 1807#else 1808 int npgptd = NPGPTD; 1809#endif 1810 KASSERT(pmap->pm_stats.resident_count == 0, 1811 ("pmap_release: pmap resident count %ld != 0", 1812 pmap->pm_stats.resident_count)); 1813 PT_UPDATES_FLUSH(); 1814 1815 pmap_lazyfix(pmap); 1816 mtx_lock_spin(&allpmaps_lock); 1817 LIST_REMOVE(pmap, pm_list); 1818 mtx_unlock_spin(&allpmaps_lock); 1819 1820 for (i = 0; i < NPGPTD; i++) 1821 ptdpg[i] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdir + (i*NPDEPG)) & PG_FRAME); 1822 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1823#if defined(PAE) && defined(XEN) 1824 ptdpg[NPGPTD] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdpt)); 1825#endif 1826 1827 for (i = 0; i < npgptd; i++) { 1828 m = ptdpg[i]; 1829 ma = xpmap_ptom(VM_PAGE_TO_PHYS(m)); 1830 /* unpinning L1 and L2 treated the same */ 1831 xen_pgd_unpin(ma); 1832#ifdef PAE 1833 KASSERT(xpmap_ptom(VM_PAGE_TO_PHYS(m)) == (pmap->pm_pdpt[i] & PG_FRAME), 1834 ("pmap_release: got wrong ptd page")); 1835#endif 1836 m->wire_count--; 1837 atomic_subtract_int(&cnt.v_wire_count, 1); 1838 vm_page_free(m); 1839 } 1840 PMAP_LOCK_DESTROY(pmap); 1841} 1842 1843static int 1844kvm_size(SYSCTL_HANDLER_ARGS) 1845{ 1846 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1847 1848 return sysctl_handle_long(oidp, &ksize, 0, req); 1849} 1850SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1851 0, 0, kvm_size, "IU", "Size of KVM"); 1852 1853static int 1854kvm_free(SYSCTL_HANDLER_ARGS) 1855{ 1856 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1857 1858 return sysctl_handle_long(oidp, &kfree, 0, req); 1859} 1860SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1861 0, 0, kvm_free, "IU", "Amount of KVM free"); 1862 1863/* 1864 * grow the number of kernel page table entries, if needed 1865 */ 1866void 1867pmap_growkernel(vm_offset_t addr) 1868{ 1869 struct pmap *pmap; 1870 vm_paddr_t ptppaddr; 1871 vm_page_t nkpg; 1872 pd_entry_t newpdir; 1873 1874 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1875 if (kernel_vm_end == 0) { 1876 kernel_vm_end = KERNBASE; 1877 nkpt = 0; 1878 while (pdir_pde(PTD, kernel_vm_end)) { 1879 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1880 nkpt++; 1881 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1882 kernel_vm_end = kernel_map->max_offset; 1883 break; 1884 } 1885 } 1886 } 1887 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1888 if (addr - 1 >= kernel_map->max_offset) 1889 addr = kernel_map->max_offset; 1890 while (kernel_vm_end < addr) { 1891 if (pdir_pde(PTD, kernel_vm_end)) { 1892 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1893 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1894 kernel_vm_end = kernel_map->max_offset; 1895 break; 1896 } 1897 continue; 1898 } 1899 1900 /* 1901 * This index is bogus, but out of the way 1902 */ 1903 nkpg = vm_page_alloc(NULL, nkpt, 1904 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1905 if (!nkpg) 1906 panic("pmap_growkernel: no memory to grow kernel"); 1907 1908 nkpt++; 1909 1910 pmap_zero_page(nkpg); 1911 ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1912 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1913 vm_page_lock_queues(); 1914 PD_SET_VA(kernel_pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE); 1915 mtx_lock_spin(&allpmaps_lock); 1916 LIST_FOREACH(pmap, &allpmaps, pm_list) 1917 PD_SET_VA(pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE); 1918 1919 mtx_unlock_spin(&allpmaps_lock); 1920 vm_page_unlock_queues(); 1921 1922 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1923 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1924 kernel_vm_end = kernel_map->max_offset; 1925 break; 1926 } 1927 } 1928} 1929 1930 1931/*************************************************** 1932 * page management routines. 1933 ***************************************************/ 1934 1935CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE); 1936CTASSERT(_NPCM == 11); 1937 1938static __inline struct pv_chunk * 1939pv_to_chunk(pv_entry_t pv) 1940{ 1941 1942 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK); 1943} 1944 1945#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap) 1946 1947#define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */ 1948#define PC_FREE10 0x0000fffful /* Free values for index 10 */ 1949 1950static uint32_t pc_freemask[11] = { 1951 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1952 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1953 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1954 PC_FREE0_9, PC_FREE10 1955}; 1956 1957SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0, 1958 "Current number of pv entries"); 1959 1960#ifdef PV_STATS 1961static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail; 1962 1963SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0, 1964 "Current number of pv entry chunks"); 1965SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0, 1966 "Current number of pv entry chunks allocated"); 1967SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0, 1968 "Current number of pv entry chunks frees"); 1969SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0, 1970 "Number of times tried to get a chunk page but failed."); 1971 1972static long pv_entry_frees, pv_entry_allocs; 1973static int pv_entry_spare; 1974 1975SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0, 1976 "Current number of pv entry frees"); 1977SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0, 1978 "Current number of pv entry allocs"); 1979SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0, 1980 "Current number of spare pv entries"); 1981 1982static int pmap_collect_inactive, pmap_collect_active; 1983 1984SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0, 1985 "Current number times pmap_collect called on inactive queue"); 1986SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0, 1987 "Current number times pmap_collect called on active queue"); 1988#endif 1989 1990/* 1991 * We are in a serious low memory condition. Resort to 1992 * drastic measures to free some pages so we can allocate 1993 * another pv entry chunk. This is normally called to 1994 * unmap inactive pages, and if necessary, active pages. 1995 */ 1996static void 1997pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq) 1998{ 1999 pmap_t pmap; 2000 pt_entry_t *pte, tpte; 2001 pv_entry_t next_pv, pv; 2002 vm_offset_t va; 2003 vm_page_t m, free; 2004 2005 sched_pin(); 2006 TAILQ_FOREACH(m, &vpq->pl, pageq) { 2007 if (m->hold_count || m->busy) 2008 continue; 2009 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) { 2010 va = pv->pv_va; 2011 pmap = PV_PMAP(pv); 2012 /* Avoid deadlock and lock recursion. */ 2013 if (pmap > locked_pmap) 2014 PMAP_LOCK(pmap); 2015 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) 2016 continue; 2017 pmap->pm_stats.resident_count--; 2018 pte = pmap_pte_quick(pmap, va); 2019 tpte = pte_load_clear(pte); 2020 KASSERT((tpte & PG_W) == 0, 2021 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte)); 2022 if (tpte & PG_A) 2023 vm_page_flag_set(m, PG_REFERENCED); 2024 if (tpte & PG_M) { 2025 KASSERT((tpte & PG_RW), 2026 ("pmap_collect: modified page not writable: va: %#x, pte: %#jx", 2027 va, (uintmax_t)tpte)); 2028 vm_page_dirty(m); 2029 } 2030 free = NULL; 2031 pmap_unuse_pt(pmap, va, &free); 2032 pmap_invalidate_page(pmap, va); 2033 pmap_free_zero_pages(free); 2034 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2035 if (TAILQ_EMPTY(&m->md.pv_list)) 2036 vm_page_flag_clear(m, PG_WRITEABLE); 2037 free_pv_entry(pmap, pv); 2038 if (pmap != locked_pmap) 2039 PMAP_UNLOCK(pmap); 2040 } 2041 } 2042 sched_unpin(); 2043} 2044 2045 2046/* 2047 * free the pv_entry back to the free list 2048 */ 2049static void 2050free_pv_entry(pmap_t pmap, pv_entry_t pv) 2051{ 2052 vm_page_t m; 2053 struct pv_chunk *pc; 2054 int idx, field, bit; 2055 2056 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2057 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2058 PV_STAT(pv_entry_frees++); 2059 PV_STAT(pv_entry_spare++); 2060 pv_entry_count--; 2061 pc = pv_to_chunk(pv); 2062 idx = pv - &pc->pc_pventry[0]; 2063 field = idx / 32; 2064 bit = idx % 32; 2065 pc->pc_map[field] |= 1ul << bit; 2066 /* move to head of list */ 2067 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2068 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2069 for (idx = 0; idx < _NPCM; idx++) 2070 if (pc->pc_map[idx] != pc_freemask[idx]) 2071 return; 2072 PV_STAT(pv_entry_spare -= _NPCPV); 2073 PV_STAT(pc_chunk_count--); 2074 PV_STAT(pc_chunk_frees++); 2075 /* entire chunk is free, return it */ 2076 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2077 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 2078 pmap_qremove((vm_offset_t)pc, 1); 2079 vm_page_unwire(m, 0); 2080 vm_page_free(m); 2081 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 2082} 2083 2084/* 2085 * get a new pv_entry, allocating a block from the system 2086 * when needed. 2087 */ 2088static pv_entry_t 2089get_pv_entry(pmap_t pmap, int try) 2090{ 2091 static const struct timeval printinterval = { 60, 0 }; 2092 static struct timeval lastprint; 2093 static vm_pindex_t colour; 2094 struct vpgqueues *pq; 2095 int bit, field; 2096 pv_entry_t pv; 2097 struct pv_chunk *pc; 2098 vm_page_t m; 2099 2100 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2101 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2102 PV_STAT(pv_entry_allocs++); 2103 pv_entry_count++; 2104 if (pv_entry_count > pv_entry_high_water) 2105 if (ratecheck(&lastprint, &printinterval)) 2106 printf("Approaching the limit on PV entries, consider " 2107 "increasing either the vm.pmap.shpgperproc or the " 2108 "vm.pmap.pv_entry_max tunable.\n"); 2109 pq = NULL; 2110retry: 2111 pc = TAILQ_FIRST(&pmap->pm_pvchunk); 2112 if (pc != NULL) { 2113 for (field = 0; field < _NPCM; field++) { 2114 if (pc->pc_map[field]) { 2115 bit = bsfl(pc->pc_map[field]); 2116 break; 2117 } 2118 } 2119 if (field < _NPCM) { 2120 pv = &pc->pc_pventry[field * 32 + bit]; 2121 pc->pc_map[field] &= ~(1ul << bit); 2122 /* If this was the last item, move it to tail */ 2123 for (field = 0; field < _NPCM; field++) 2124 if (pc->pc_map[field] != 0) { 2125 PV_STAT(pv_entry_spare--); 2126 return (pv); /* not full, return */ 2127 } 2128 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2129 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); 2130 PV_STAT(pv_entry_spare--); 2131 return (pv); 2132 } 2133 } 2134 /* 2135 * Access to the ptelist "pv_vafree" is synchronized by the page 2136 * queues lock. If "pv_vafree" is currently non-empty, it will 2137 * remain non-empty until pmap_ptelist_alloc() completes. 2138 */ 2139 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq == 2140 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) | 2141 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) { 2142 if (try) { 2143 pv_entry_count--; 2144 PV_STAT(pc_chunk_tryfail++); 2145 return (NULL); 2146 } 2147 /* 2148 * Reclaim pv entries: At first, destroy mappings to 2149 * inactive pages. After that, if a pv chunk entry 2150 * is still needed, destroy mappings to active pages. 2151 */ 2152 if (pq == NULL) { 2153 PV_STAT(pmap_collect_inactive++); 2154 pq = &vm_page_queues[PQ_INACTIVE]; 2155 } else if (pq == &vm_page_queues[PQ_INACTIVE]) { 2156 PV_STAT(pmap_collect_active++); 2157 pq = &vm_page_queues[PQ_ACTIVE]; 2158 } else 2159 panic("get_pv_entry: increase vm.pmap.shpgperproc"); 2160 pmap_collect(pmap, pq); 2161 goto retry; 2162 } 2163 PV_STAT(pc_chunk_count++); 2164 PV_STAT(pc_chunk_allocs++); 2165 colour++; 2166 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 2167 pmap_qenter((vm_offset_t)pc, &m, 1); 2168 if ((m->flags & PG_ZERO) == 0) 2169 pagezero(pc); 2170 pc->pc_pmap = pmap; 2171 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */ 2172 for (field = 1; field < _NPCM; field++) 2173 pc->pc_map[field] = pc_freemask[field]; 2174 pv = &pc->pc_pventry[0]; 2175 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2176 PV_STAT(pv_entry_spare += _NPCPV - 1); 2177 return (pv); 2178} 2179 2180static void 2181pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 2182{ 2183 pv_entry_t pv; 2184 2185 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2186 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2187 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2188 if (pmap == PV_PMAP(pv) && va == pv->pv_va) 2189 break; 2190 } 2191 KASSERT(pv != NULL, ("pmap_remove_entry: pv not found")); 2192 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2193 if (TAILQ_EMPTY(&m->md.pv_list)) 2194 vm_page_flag_clear(m, PG_WRITEABLE); 2195 free_pv_entry(pmap, pv); 2196} 2197 2198/* 2199 * Create a pv entry for page at pa for 2200 * (pmap, va). 2201 */ 2202static void 2203pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2204{ 2205 pv_entry_t pv; 2206 2207 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2208 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2209 pv = get_pv_entry(pmap, FALSE); 2210 pv->pv_va = va; 2211 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2212} 2213 2214/* 2215 * Conditionally create a pv entry. 2216 */ 2217static boolean_t 2218pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2219{ 2220 pv_entry_t pv; 2221 2222 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2223 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2224 if (pv_entry_count < pv_entry_high_water && 2225 (pv = get_pv_entry(pmap, TRUE)) != NULL) { 2226 pv->pv_va = va; 2227 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2228 return (TRUE); 2229 } else 2230 return (FALSE); 2231} 2232 2233/* 2234 * pmap_remove_pte: do the things to unmap a page in a process 2235 */ 2236static int 2237pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free) 2238{ 2239 pt_entry_t oldpte; 2240 vm_page_t m; 2241 2242 CTR3(KTR_PMAP, "pmap_remove_pte: pmap=%p *ptq=0x%x va=0x%x", 2243 pmap, (u_long)*ptq, va); 2244 2245 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2246 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2247 oldpte = *ptq; 2248 PT_SET_VA_MA(ptq, 0, TRUE); 2249 if (oldpte & PG_W) 2250 pmap->pm_stats.wired_count -= 1; 2251 /* 2252 * Machines that don't support invlpg, also don't support 2253 * PG_G. 2254 */ 2255 if (oldpte & PG_G) 2256 pmap_invalidate_page(kernel_pmap, va); 2257 pmap->pm_stats.resident_count -= 1; 2258 /* 2259 * XXX This is not strictly correctly, but somewhere along the line 2260 * we are losing the managed bit on some pages. It is unclear to me 2261 * why, but I think the most likely explanation is that xen's writable 2262 * page table implementation doesn't respect the unused bits. 2263 */ 2264 if ((oldpte & PG_MANAGED) || ((oldpte & PG_V) && (va < VM_MAXUSER_ADDRESS)) 2265 ) { 2266 m = PHYS_TO_VM_PAGE(xpmap_mtop(oldpte) & PG_FRAME); 2267 2268 if (!(oldpte & PG_MANAGED)) 2269 printf("va=0x%x is unmanaged :-( pte=0x%llx\n", va, oldpte); 2270 2271 if (oldpte & PG_M) { 2272 KASSERT((oldpte & PG_RW), 2273 ("pmap_remove_pte: modified page not writable: va: %#x, pte: %#jx", 2274 va, (uintmax_t)oldpte)); 2275 vm_page_dirty(m); 2276 } 2277 if (oldpte & PG_A) 2278 vm_page_flag_set(m, PG_REFERENCED); 2279 pmap_remove_entry(pmap, m, va); 2280 } else if ((va < VM_MAXUSER_ADDRESS) && (oldpte & PG_V)) 2281 printf("va=0x%x is unmanaged :-( pte=0x%llx\n", va, oldpte); 2282 2283 return (pmap_unuse_pt(pmap, va, free)); 2284} 2285 2286/* 2287 * Remove a single page from a process address space 2288 */ 2289static void 2290pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free) 2291{ 2292 pt_entry_t *pte; 2293 2294 CTR2(KTR_PMAP, "pmap_remove_page: pmap=%p va=0x%x", 2295 pmap, va); 2296 2297 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2298 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 2299 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2300 if ((pte = pmap_pte_quick(pmap, va)) == NULL || (*pte & PG_V) == 0) 2301 return; 2302 pmap_remove_pte(pmap, pte, va, free); 2303 pmap_invalidate_page(pmap, va); 2304 if (*PMAP1) 2305 PT_SET_MA(PADDR1, 0); 2306 2307} 2308 2309/* 2310 * Remove the given range of addresses from the specified map. 2311 * 2312 * It is assumed that the start and end are properly 2313 * rounded to the page size. 2314 */ 2315void 2316pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 2317{ 2318 vm_offset_t pdnxt; 2319 pd_entry_t ptpaddr; 2320 pt_entry_t *pte; 2321 vm_page_t free = NULL; 2322 int anyvalid; 2323 2324 CTR3(KTR_PMAP, "pmap_remove: pmap=%p sva=0x%x eva=0x%x", 2325 pmap, sva, eva); 2326 2327 /* 2328 * Perform an unsynchronized read. This is, however, safe. 2329 */ 2330 if (pmap->pm_stats.resident_count == 0) 2331 return; 2332 2333 anyvalid = 0; 2334 2335 vm_page_lock_queues(); 2336 sched_pin(); 2337 PMAP_LOCK(pmap); 2338 2339 /* 2340 * special handling of removing one page. a very 2341 * common operation and easy to short circuit some 2342 * code. 2343 */ 2344 if ((sva + PAGE_SIZE == eva) && 2345 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 2346 pmap_remove_page(pmap, sva, &free); 2347 goto out; 2348 } 2349 2350 for (; sva < eva; sva = pdnxt) { 2351 unsigned pdirindex; 2352 2353 /* 2354 * Calculate index for next page table. 2355 */ 2356 pdnxt = (sva + NBPDR) & ~PDRMASK; 2357 if (pmap->pm_stats.resident_count == 0) 2358 break; 2359 2360 pdirindex = sva >> PDRSHIFT; 2361 ptpaddr = pmap->pm_pdir[pdirindex]; 2362 2363 /* 2364 * Weed out invalid mappings. Note: we assume that the page 2365 * directory table is always allocated, and in kernel virtual. 2366 */ 2367 if (ptpaddr == 0) 2368 continue; 2369 2370 /* 2371 * Check for large page. 2372 */ 2373 if ((ptpaddr & PG_PS) != 0) { 2374 PD_CLEAR_VA(pmap, pdirindex, TRUE); 2375 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 2376 anyvalid = 1; 2377 continue; 2378 } 2379 2380 /* 2381 * Limit our scan to either the end of the va represented 2382 * by the current page table page, or to the end of the 2383 * range being removed. 2384 */ 2385 if (pdnxt > eva) 2386 pdnxt = eva; 2387 2388 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2389 sva += PAGE_SIZE) { 2390 if ((*pte & PG_V) == 0) 2391 continue; 2392 2393 /* 2394 * The TLB entry for a PG_G mapping is invalidated 2395 * by pmap_remove_pte(). 2396 */ 2397 if ((*pte & PG_G) == 0) 2398 anyvalid = 1; 2399 if (pmap_remove_pte(pmap, pte, sva, &free)) 2400 break; 2401 } 2402 } 2403 PT_UPDATES_FLUSH(); 2404 if (*PMAP1) 2405 PT_SET_VA_MA(PMAP1, 0, TRUE); 2406out: 2407 if (anyvalid) 2408 pmap_invalidate_all(pmap); 2409 sched_unpin(); 2410 vm_page_unlock_queues(); 2411 PMAP_UNLOCK(pmap); 2412 pmap_free_zero_pages(free); 2413} 2414 2415/* 2416 * Routine: pmap_remove_all 2417 * Function: 2418 * Removes this physical page from 2419 * all physical maps in which it resides. 2420 * Reflects back modify bits to the pager. 2421 * 2422 * Notes: 2423 * Original versions of this routine were very 2424 * inefficient because they iteratively called 2425 * pmap_remove (slow...) 2426 */ 2427 2428void 2429pmap_remove_all(vm_page_t m) 2430{ 2431 pv_entry_t pv; 2432 pmap_t pmap; 2433 pt_entry_t *pte, tpte; 2434 vm_page_t free; 2435 2436#if defined(PMAP_DIAGNOSTIC) 2437 /* 2438 * XXX This makes pmap_remove_all() illegal for non-managed pages! 2439 */ 2440 if (m->flags & PG_FICTITIOUS) { 2441 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%jx", 2442 VM_PAGE_TO_PHYS(m) & 0xffffffff); 2443 } 2444#endif 2445 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2446 sched_pin(); 2447 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2448 pmap = PV_PMAP(pv); 2449 PMAP_LOCK(pmap); 2450 pmap->pm_stats.resident_count--; 2451 pte = pmap_pte_quick(pmap, pv->pv_va); 2452 2453 tpte = *pte; 2454 PT_SET_VA_MA(pte, 0, TRUE); 2455 if (tpte & PG_W) 2456 pmap->pm_stats.wired_count--; 2457 if (tpte & PG_A) 2458 vm_page_flag_set(m, PG_REFERENCED); 2459 2460 /* 2461 * Update the vm_page_t clean and reference bits. 2462 */ 2463 if (tpte & PG_M) { 2464 KASSERT((tpte & PG_RW), 2465 ("pmap_remove_all: modified page not writable: va: %#x, pte: %#jx", 2466 pv->pv_va, (uintmax_t)tpte)); 2467 vm_page_dirty(m); 2468 } 2469 free = NULL; 2470 pmap_unuse_pt(pmap, pv->pv_va, &free); 2471 pmap_invalidate_page(pmap, pv->pv_va); 2472 pmap_free_zero_pages(free); 2473 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2474 free_pv_entry(pmap, pv); 2475 PMAP_UNLOCK(pmap); 2476 } 2477 vm_page_flag_clear(m, PG_WRITEABLE); 2478 PT_UPDATES_FLUSH(); 2479 if (*PMAP1) 2480 PT_SET_MA(PADDR1, 0); 2481 sched_unpin(); 2482} 2483 2484/* 2485 * Set the physical protection on the 2486 * specified range of this map as requested. 2487 */ 2488void 2489pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 2490{ 2491 vm_offset_t pdnxt; 2492 pd_entry_t ptpaddr; 2493 pt_entry_t *pte; 2494 int anychanged; 2495 2496 CTR4(KTR_PMAP, "pmap_protect: pmap=%p sva=0x%x eva=0x%x prot=0x%x", 2497 pmap, sva, eva, prot); 2498 2499 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 2500 pmap_remove(pmap, sva, eva); 2501 return; 2502 } 2503 2504#ifdef PAE 2505 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) == 2506 (VM_PROT_WRITE|VM_PROT_EXECUTE)) 2507 return; 2508#else 2509 if (prot & VM_PROT_WRITE) 2510 return; 2511#endif 2512 2513 anychanged = 0; 2514 2515 vm_page_lock_queues(); 2516 sched_pin(); 2517 PMAP_LOCK(pmap); 2518 for (; sva < eva; sva = pdnxt) { 2519 pt_entry_t obits, pbits; 2520 unsigned pdirindex; 2521 2522 pdnxt = (sva + NBPDR) & ~PDRMASK; 2523 2524 pdirindex = sva >> PDRSHIFT; 2525 ptpaddr = pmap->pm_pdir[pdirindex]; 2526 2527 /* 2528 * Weed out invalid mappings. Note: we assume that the page 2529 * directory table is always allocated, and in kernel virtual. 2530 */ 2531 if (ptpaddr == 0) 2532 continue; 2533 2534 /* 2535 * Check for large page. 2536 */ 2537 if ((ptpaddr & PG_PS) != 0) { 2538 if ((prot & VM_PROT_WRITE) == 0) 2539 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW); 2540#ifdef PAE 2541 if ((prot & VM_PROT_EXECUTE) == 0) 2542 pmap->pm_pdir[pdirindex] |= pg_nx; 2543#endif 2544 anychanged = 1; 2545 continue; 2546 } 2547 2548 if (pdnxt > eva) 2549 pdnxt = eva; 2550 2551 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2552 sva += PAGE_SIZE) { 2553 vm_page_t m; 2554 2555retry: 2556 /* 2557 * Regardless of whether a pte is 32 or 64 bits in 2558 * size, PG_RW, PG_A, and PG_M are among the least 2559 * significant 32 bits. 2560 */ 2561 obits = pbits = *pte; 2562 if ((pbits & PG_V) == 0) 2563 continue; 2564 if (pbits & PG_MANAGED) { 2565 m = NULL; 2566 if (pbits & PG_A) { 2567 m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) & PG_FRAME); 2568 vm_page_flag_set(m, PG_REFERENCED); 2569 pbits &= ~PG_A; 2570 } 2571 if ((pbits & PG_M) != 0) { 2572 if (m == NULL) 2573 m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) & PG_FRAME); 2574 vm_page_dirty(m); 2575 } 2576 } 2577 2578 if ((prot & VM_PROT_WRITE) == 0) 2579 pbits &= ~(PG_RW | PG_M); 2580#ifdef PAE 2581 if ((prot & VM_PROT_EXECUTE) == 0) 2582 pbits |= pg_nx; 2583#endif 2584 2585 if (pbits != obits) { 2586#ifdef XEN 2587 obits = *pte; 2588 PT_SET_VA_MA(pte, pbits, TRUE); 2589 if (*pte != pbits) 2590 goto retry; 2591#else 2592#ifdef PAE 2593 if (!atomic_cmpset_64(pte, obits, pbits)) 2594 goto retry; 2595#else 2596 if (!atomic_cmpset_int((u_int *)pte, obits, 2597 pbits)) 2598 goto retry; 2599#endif 2600#endif 2601 if (obits & PG_G) 2602 pmap_invalidate_page(pmap, sva); 2603 else 2604 anychanged = 1; 2605 } 2606 } 2607 } 2608 PT_UPDATES_FLUSH(); 2609 if (*PMAP1) 2610 PT_SET_VA_MA(PMAP1, 0, TRUE); 2611 if (anychanged) 2612 pmap_invalidate_all(pmap); 2613 sched_unpin(); 2614 vm_page_unlock_queues(); 2615 PMAP_UNLOCK(pmap); 2616} 2617 2618/* 2619 * Insert the given physical page (p) at 2620 * the specified virtual address (v) in the 2621 * target physical map with the protection requested. 2622 * 2623 * If specified, the page will be wired down, meaning 2624 * that the related pte can not be reclaimed. 2625 * 2626 * NB: This is the only routine which MAY NOT lazy-evaluate 2627 * or lose information. That is, this routine must actually 2628 * insert this page into the given map NOW. 2629 */ 2630void 2631pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m, 2632 vm_prot_t prot, boolean_t wired) 2633{ 2634 vm_paddr_t pa; 2635 pd_entry_t *pde; 2636 pt_entry_t *pte; 2637 vm_paddr_t opa; 2638 pt_entry_t origpte, newpte; 2639 vm_page_t mpte, om; 2640 boolean_t invlva; 2641 2642 CTR6(KTR_PMAP, "pmap_enter: pmap=%08p va=0x%08x access=0x%x ma=0x%08x prot=0x%x wired=%d", 2643 pmap, va, access, xpmap_ptom(VM_PAGE_TO_PHYS(m)), prot, wired); 2644 va = trunc_page(va); 2645#ifdef PMAP_DIAGNOSTIC 2646 if (va > VM_MAX_KERNEL_ADDRESS) 2647 panic("pmap_enter: toobig"); 2648 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS)) 2649 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va); 2650#endif 2651 2652 mpte = NULL; 2653 2654 vm_page_lock_queues(); 2655 PMAP_LOCK(pmap); 2656 sched_pin(); 2657 2658 /* 2659 * In the case that a page table page is not 2660 * resident, we are creating it here. 2661 */ 2662 if (va < VM_MAXUSER_ADDRESS) { 2663 mpte = pmap_allocpte(pmap, va, M_WAITOK); 2664 } 2665#if 0 && defined(PMAP_DIAGNOSTIC) 2666 else { 2667 pd_entry_t *pdeaddr = pmap_pde(pmap, va); 2668 origpte = *pdeaddr; 2669 if ((origpte & PG_V) == 0) { 2670 panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n", 2671 pmap->pm_pdir[PTDPTDI], origpte, va); 2672 } 2673 } 2674#endif 2675 2676 pde = pmap_pde(pmap, va); 2677 if ((*pde & PG_PS) != 0) 2678 panic("pmap_enter: attempted pmap_enter on 4MB page"); 2679 pte = pmap_pte_quick(pmap, va); 2680 2681 /* 2682 * Page Directory table entry not valid, we need a new PT page 2683 */ 2684 if (pte == NULL) { 2685 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n", 2686 (uintmax_t)pmap->pm_pdir[va >> PDRSHIFT], va); 2687 } 2688 2689 pa = VM_PAGE_TO_PHYS(m); 2690 om = NULL; 2691 opa = origpte = 0; 2692 2693#if 0 2694 KASSERT((*pte & PG_V) || (*pte == 0), ("address set but not valid pte=%p *pte=0x%016jx", 2695 pte, *pte)); 2696#endif 2697 origpte = *pte; 2698 if (origpte) 2699 origpte = xpmap_mtop(origpte); 2700 opa = origpte & PG_FRAME; 2701 2702 /* 2703 * Mapping has not changed, must be protection or wiring change. 2704 */ 2705 if (origpte && (opa == pa)) { 2706 /* 2707 * Wiring change, just update stats. We don't worry about 2708 * wiring PT pages as they remain resident as long as there 2709 * are valid mappings in them. Hence, if a user page is wired, 2710 * the PT page will be also. 2711 */ 2712 if (wired && ((origpte & PG_W) == 0)) 2713 pmap->pm_stats.wired_count++; 2714 else if (!wired && (origpte & PG_W)) 2715 pmap->pm_stats.wired_count--; 2716 2717 /* 2718 * Remove extra pte reference 2719 */ 2720 if (mpte) 2721 mpte->wire_count--; 2722 2723 /* 2724 * We might be turning off write access to the page, 2725 * so we go ahead and sense modify status. 2726 */ 2727 if (origpte & PG_MANAGED) { 2728 om = m; 2729 pa |= PG_MANAGED; 2730 } 2731 goto validate; 2732 } 2733 /* 2734 * Mapping has changed, invalidate old range and fall through to 2735 * handle validating new mapping. 2736 */ 2737 if (opa) { 2738 if (origpte & PG_W) 2739 pmap->pm_stats.wired_count--; 2740 if (origpte & PG_MANAGED) { 2741 om = PHYS_TO_VM_PAGE(opa); 2742 pmap_remove_entry(pmap, om, va); 2743 } else if (va < VM_MAXUSER_ADDRESS) 2744 printf("va=0x%x is unmanaged :-( \n", va); 2745 2746 if (mpte != NULL) { 2747 mpte->wire_count--; 2748 KASSERT(mpte->wire_count > 0, 2749 ("pmap_enter: missing reference to page table page," 2750 " va: 0x%x", va)); 2751 } 2752 } else 2753 pmap->pm_stats.resident_count++; 2754 2755 /* 2756 * Enter on the PV list if part of our managed memory. 2757 */ 2758 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 2759 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva, 2760 ("pmap_enter: managed mapping within the clean submap")); 2761 pmap_insert_entry(pmap, va, m); 2762 pa |= PG_MANAGED; 2763 } 2764 2765 /* 2766 * Increment counters 2767 */ 2768 if (wired) 2769 pmap->pm_stats.wired_count++; 2770 2771validate: 2772 /* 2773 * Now validate mapping with desired protection/wiring. 2774 */ 2775 newpte = (pt_entry_t)(pa | PG_V); 2776 if ((prot & VM_PROT_WRITE) != 0) { 2777 newpte |= PG_RW; 2778 vm_page_flag_set(m, PG_WRITEABLE); 2779 } 2780#ifdef PAE 2781 if ((prot & VM_PROT_EXECUTE) == 0) 2782 newpte |= pg_nx; 2783#endif 2784 if (wired) 2785 newpte |= PG_W; 2786 if (va < VM_MAXUSER_ADDRESS) 2787 newpte |= PG_U; 2788 if (pmap == kernel_pmap) 2789 newpte |= pgeflag; 2790 2791 critical_enter(); 2792 /* 2793 * if the mapping or permission bits are different, we need 2794 * to update the pte. 2795 */ 2796 if ((origpte & ~(PG_M|PG_A)) != newpte) { 2797 if (origpte) { 2798 invlva = FALSE; 2799 origpte = *pte; 2800 PT_SET_VA(pte, newpte | PG_A, FALSE); 2801 if (origpte & PG_A) { 2802 if (origpte & PG_MANAGED) 2803 vm_page_flag_set(om, PG_REFERENCED); 2804 if (opa != VM_PAGE_TO_PHYS(m)) 2805 invlva = TRUE; 2806#ifdef PAE 2807 if ((origpte & PG_NX) == 0 && 2808 (newpte & PG_NX) != 0) 2809 invlva = TRUE; 2810#endif 2811 } 2812 if (origpte & PG_M) { 2813 KASSERT((origpte & PG_RW), 2814 ("pmap_enter: modified page not writable: va: %#x, pte: %#jx", 2815 va, (uintmax_t)origpte)); 2816 if ((origpte & PG_MANAGED) != 0) 2817 vm_page_dirty(om); 2818 if ((prot & VM_PROT_WRITE) == 0) 2819 invlva = TRUE; 2820 } 2821 if (invlva) 2822 pmap_invalidate_page(pmap, va); 2823 } else{ 2824 PT_SET_VA(pte, newpte | PG_A, FALSE); 2825 } 2826 2827 } 2828 PT_UPDATES_FLUSH(); 2829 critical_exit(); 2830 if (*PMAP1) 2831 PT_SET_VA_MA(PMAP1, 0, TRUE); 2832 sched_unpin(); 2833 vm_page_unlock_queues(); 2834 PMAP_UNLOCK(pmap); 2835} 2836 2837/* 2838 * Maps a sequence of resident pages belonging to the same object. 2839 * The sequence begins with the given page m_start. This page is 2840 * mapped at the given virtual address start. Each subsequent page is 2841 * mapped at a virtual address that is offset from start by the same 2842 * amount as the page is offset from m_start within the object. The 2843 * last page in the sequence is the page with the largest offset from 2844 * m_start that can be mapped at a virtual address less than the given 2845 * virtual address end. Not every virtual page between start and end 2846 * is mapped; only those for which a resident page exists with the 2847 * corresponding offset from m_start are mapped. 2848 */ 2849void 2850pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, 2851 vm_page_t m_start, vm_prot_t prot) 2852{ 2853 vm_page_t m, mpte; 2854 vm_pindex_t diff, psize; 2855 multicall_entry_t mcl[16]; 2856 multicall_entry_t *mclp = mcl; 2857 int error, count = 0; 2858 2859 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED); 2860 psize = atop(end - start); 2861 2862 mpte = NULL; 2863 m = m_start; 2864 PMAP_LOCK(pmap); 2865 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { 2866 mpte = pmap_enter_quick_locked(&mclp, &count, pmap, start + ptoa(diff), m, 2867 prot, mpte); 2868 m = TAILQ_NEXT(m, listq); 2869 if (count == 16) { 2870 error = HYPERVISOR_multicall(mcl, count); 2871 KASSERT(error == 0, ("bad multicall %d", error)); 2872 mclp = mcl; 2873 count = 0; 2874 } 2875 } 2876 if (count) { 2877 error = HYPERVISOR_multicall(mcl, count); 2878 KASSERT(error == 0, ("bad multicall %d", error)); 2879 } 2880 2881 PMAP_UNLOCK(pmap); 2882} 2883 2884/* 2885 * this code makes some *MAJOR* assumptions: 2886 * 1. Current pmap & pmap exists. 2887 * 2. Not wired. 2888 * 3. Read access. 2889 * 4. No page table pages. 2890 * but is *MUCH* faster than pmap_enter... 2891 */ 2892 2893void 2894pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 2895{ 2896 multicall_entry_t mcl, *mclp; 2897 int count = 0; 2898 mclp = &mcl; 2899 2900 CTR4(KTR_PMAP, "pmap_enter_quick: pmap=%p va=0x%x m=%p prot=0x%x", 2901 pmap, va, m, prot); 2902 2903 PMAP_LOCK(pmap); 2904 (void) pmap_enter_quick_locked(&mclp, &count, pmap, va, m, prot, NULL); 2905 if (count) 2906 HYPERVISOR_multicall(&mcl, count); 2907 PMAP_UNLOCK(pmap); 2908} 2909 2910#ifdef notyet 2911void 2912pmap_enter_quick_range(pmap_t pmap, vm_offset_t *addrs, vm_page_t *pages, vm_prot_t *prots, int count) 2913{ 2914 int i, error, index = 0; 2915 multicall_entry_t mcl[16]; 2916 multicall_entry_t *mclp = mcl; 2917 2918 PMAP_LOCK(pmap); 2919 for (i = 0; i < count; i++, addrs++, pages++, prots++) { 2920 if (!pmap_is_prefaultable_locked(pmap, *addrs)) 2921 continue; 2922 2923 (void) pmap_enter_quick_locked(&mclp, &index, pmap, *addrs, *pages, *prots, NULL); 2924 if (index == 16) { 2925 error = HYPERVISOR_multicall(mcl, index); 2926 mclp = mcl; 2927 index = 0; 2928 KASSERT(error == 0, ("bad multicall %d", error)); 2929 } 2930 } 2931 if (index) { 2932 error = HYPERVISOR_multicall(mcl, index); 2933 KASSERT(error == 0, ("bad multicall %d", error)); 2934 } 2935 2936 PMAP_UNLOCK(pmap); 2937} 2938#endif 2939 2940static vm_page_t 2941pmap_enter_quick_locked(multicall_entry_t **mclpp, int *count, pmap_t pmap, vm_offset_t va, vm_page_t m, 2942 vm_prot_t prot, vm_page_t mpte) 2943{ 2944 pt_entry_t *pte; 2945 vm_paddr_t pa; 2946 vm_page_t free; 2947 multicall_entry_t *mcl = *mclpp; 2948 2949 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva || 2950 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0, 2951 ("pmap_enter_quick_locked: managed mapping within the clean submap")); 2952 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2953 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2954 2955 /* 2956 * In the case that a page table page is not 2957 * resident, we are creating it here. 2958 */ 2959 if (va < VM_MAXUSER_ADDRESS) { 2960 unsigned ptepindex; 2961 pd_entry_t ptema; 2962 2963 /* 2964 * Calculate pagetable page index 2965 */ 2966 ptepindex = va >> PDRSHIFT; 2967 if (mpte && (mpte->pindex == ptepindex)) { 2968 mpte->wire_count++; 2969 } else { 2970 /* 2971 * Get the page directory entry 2972 */ 2973 ptema = pmap->pm_pdir[ptepindex]; 2974 2975 /* 2976 * If the page table page is mapped, we just increment 2977 * the hold count, and activate it. 2978 */ 2979 if (ptema & PG_V) { 2980 if (ptema & PG_PS) 2981 panic("pmap_enter_quick: unexpected mapping into 4MB page"); 2982 mpte = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME); 2983 mpte->wire_count++; 2984 } else { 2985 mpte = _pmap_allocpte(pmap, ptepindex, 2986 M_NOWAIT); 2987 if (mpte == NULL) 2988 return (mpte); 2989 } 2990 } 2991 } else { 2992 mpte = NULL; 2993 } 2994 2995 /* 2996 * This call to vtopte makes the assumption that we are 2997 * entering the page into the current pmap. In order to support 2998 * quick entry into any pmap, one would likely use pmap_pte_quick. 2999 * But that isn't as quick as vtopte. 3000 */ 3001 KASSERT(pmap_is_current(pmap), ("entering pages in non-current pmap")); 3002 pte = vtopte(va); 3003 if (*pte & PG_V) { 3004 if (mpte != NULL) { 3005 mpte->wire_count--; 3006 mpte = NULL; 3007 } 3008 return (mpte); 3009 } 3010 3011 /* 3012 * Enter on the PV list if part of our managed memory. 3013 */ 3014 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 && 3015 !pmap_try_insert_pv_entry(pmap, va, m)) { 3016 if (mpte != NULL) { 3017 free = NULL; 3018 if (pmap_unwire_pte_hold(pmap, mpte, &free)) { 3019 pmap_invalidate_page(pmap, va); 3020 pmap_free_zero_pages(free); 3021 } 3022 3023 mpte = NULL; 3024 } 3025 return (mpte); 3026 } 3027 3028 /* 3029 * Increment counters 3030 */ 3031 pmap->pm_stats.resident_count++; 3032 3033 pa = VM_PAGE_TO_PHYS(m); 3034#ifdef PAE 3035 if ((prot & VM_PROT_EXECUTE) == 0) 3036 pa |= pg_nx; 3037#endif 3038 3039#if 0 3040 /* 3041 * Now validate mapping with RO protection 3042 */ 3043 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 3044 pte_store(pte, pa | PG_V | PG_U); 3045 else 3046 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 3047#else 3048 /* 3049 * Now validate mapping with RO protection 3050 */ 3051 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 3052 pa = xpmap_ptom(pa | PG_V | PG_U); 3053 else 3054 pa = xpmap_ptom(pa | PG_V | PG_U | PG_MANAGED); 3055 3056 mcl->op = __HYPERVISOR_update_va_mapping; 3057 mcl->args[0] = va; 3058 mcl->args[1] = (uint32_t)(pa & 0xffffffff); 3059 mcl->args[2] = (uint32_t)(pa >> 32); 3060 mcl->args[3] = 0; 3061 *mclpp = mcl + 1; 3062 *count = *count + 1; 3063#endif 3064 return mpte; 3065} 3066 3067/* 3068 * Make a temporary mapping for a physical address. This is only intended 3069 * to be used for panic dumps. 3070 */ 3071void * 3072pmap_kenter_temporary(vm_paddr_t pa, int i) 3073{ 3074 vm_offset_t va; 3075 3076 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 3077 pmap_kenter(va, pa); 3078 invlpg(va); 3079 return ((void *)crashdumpmap); 3080} 3081 3082/* 3083 * This code maps large physical mmap regions into the 3084 * processor address space. Note that some shortcuts 3085 * are taken, but the code works. 3086 */ 3087void 3088pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 3089 vm_object_t object, vm_pindex_t pindex, 3090 vm_size_t size) 3091{ 3092 vm_page_t p; 3093 3094 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 3095 KASSERT(object->type == OBJT_DEVICE, 3096 ("pmap_object_init_pt: non-device object")); 3097 if (pseflag && 3098 ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) { 3099 int i; 3100 vm_page_t m[1]; 3101 unsigned int ptepindex; 3102 int npdes; 3103 pd_entry_t ptepa; 3104 3105 PMAP_LOCK(pmap); 3106 if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)]) 3107 goto out; 3108 PMAP_UNLOCK(pmap); 3109retry: 3110 p = vm_page_lookup(object, pindex); 3111 if (p != NULL) { 3112 if (vm_page_sleep_if_busy(p, FALSE, "init4p")) 3113 goto retry; 3114 } else { 3115 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL); 3116 if (p == NULL) 3117 return; 3118 m[0] = p; 3119 3120 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) { 3121 vm_page_lock_queues(); 3122 vm_page_free(p); 3123 vm_page_unlock_queues(); 3124 return; 3125 } 3126 3127 p = vm_page_lookup(object, pindex); 3128 vm_page_lock_queues(); 3129 vm_page_wakeup(p); 3130 vm_page_unlock_queues(); 3131 } 3132 3133 ptepa = VM_PAGE_TO_PHYS(p); 3134 if (ptepa & (NBPDR - 1)) 3135 return; 3136 3137 p->valid = VM_PAGE_BITS_ALL; 3138 3139 PMAP_LOCK(pmap); 3140 pmap->pm_stats.resident_count += size >> PAGE_SHIFT; 3141 npdes = size >> PDRSHIFT; 3142 critical_enter(); 3143 for(i = 0; i < npdes; i++) { 3144 PD_SET_VA(pmap, ptepindex, 3145 ptepa | PG_U | PG_M | PG_RW | PG_V | PG_PS, FALSE); 3146 ptepa += NBPDR; 3147 ptepindex += 1; 3148 } 3149 pmap_invalidate_all(pmap); 3150 critical_exit(); 3151out: 3152 PMAP_UNLOCK(pmap); 3153 } 3154} 3155 3156/* 3157 * Routine: pmap_change_wiring 3158 * Function: Change the wiring attribute for a map/virtual-address 3159 * pair. 3160 * In/out conditions: 3161 * The mapping must already exist in the pmap. 3162 */ 3163void 3164pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired) 3165{ 3166 pt_entry_t *pte; 3167 3168 vm_page_lock_queues(); 3169 PMAP_LOCK(pmap); 3170 pte = pmap_pte(pmap, va); 3171 3172 if (wired && !pmap_pte_w(pte)) { 3173 PT_SET_VA_MA((pte), *(pte) | PG_W, TRUE); 3174 pmap->pm_stats.wired_count++; 3175 } else if (!wired && pmap_pte_w(pte)) { 3176 PT_SET_VA_MA((pte), *(pte) & ~PG_W, TRUE); 3177 pmap->pm_stats.wired_count--; 3178 } 3179 3180 /* 3181 * Wiring is not a hardware characteristic so there is no need to 3182 * invalidate TLB. 3183 */ 3184 pmap_pte_release(pte); 3185 PMAP_UNLOCK(pmap); 3186 vm_page_unlock_queues(); 3187} 3188 3189 3190 3191/* 3192 * Copy the range specified by src_addr/len 3193 * from the source map to the range dst_addr/len 3194 * in the destination map. 3195 * 3196 * This routine is only advisory and need not do anything. 3197 */ 3198 3199void 3200pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 3201 vm_offset_t src_addr) 3202{ 3203 vm_page_t free; 3204 vm_offset_t addr; 3205 vm_offset_t end_addr = src_addr + len; 3206 vm_offset_t pdnxt; 3207 3208 if (dst_addr != src_addr) 3209 return; 3210 3211 if (!pmap_is_current(src_pmap)) { 3212 CTR2(KTR_PMAP, 3213 "pmap_copy, skipping: pdir[PTDPTDI]=0x%jx PTDpde[0]=0x%jx", 3214 (src_pmap->pm_pdir[PTDPTDI] & PG_FRAME), (PTDpde[0] & PG_FRAME)); 3215 3216 return; 3217 } 3218 CTR5(KTR_PMAP, "pmap_copy: dst_pmap=%p src_pmap=%p dst_addr=0x%x len=%d src_addr=0x%x", 3219 dst_pmap, src_pmap, dst_addr, len, src_addr); 3220 3221 vm_page_lock_queues(); 3222 if (dst_pmap < src_pmap) { 3223 PMAP_LOCK(dst_pmap); 3224 PMAP_LOCK(src_pmap); 3225 } else { 3226 PMAP_LOCK(src_pmap); 3227 PMAP_LOCK(dst_pmap); 3228 } 3229 sched_pin(); 3230 for (addr = src_addr; addr < end_addr; addr = pdnxt) { 3231 pt_entry_t *src_pte, *dst_pte; 3232 vm_page_t dstmpte, srcmpte; 3233 pd_entry_t srcptepaddr; 3234 unsigned ptepindex; 3235 3236 if (addr >= UPT_MIN_ADDRESS) 3237 panic("pmap_copy: invalid to pmap_copy page tables"); 3238 3239 pdnxt = (addr + NBPDR) & ~PDRMASK; 3240 ptepindex = addr >> PDRSHIFT; 3241 3242 srcptepaddr = PT_GET(&src_pmap->pm_pdir[ptepindex]); 3243 if (srcptepaddr == 0) 3244 continue; 3245 3246 if (srcptepaddr & PG_PS) { 3247 if (dst_pmap->pm_pdir[ptepindex] == 0) { 3248 PD_SET_VA(dst_pmap, ptepindex, srcptepaddr & ~PG_W, TRUE); 3249 dst_pmap->pm_stats.resident_count += 3250 NBPDR / PAGE_SIZE; 3251 } 3252 continue; 3253 } 3254 3255 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME); 3256 if (srcmpte->wire_count == 0) 3257 panic("pmap_copy: source page table page is unused"); 3258 3259 if (pdnxt > end_addr) 3260 pdnxt = end_addr; 3261 3262 src_pte = vtopte(addr); 3263 while (addr < pdnxt) { 3264 pt_entry_t ptetemp; 3265 ptetemp = *src_pte; 3266 /* 3267 * we only virtual copy managed pages 3268 */ 3269 if ((ptetemp & PG_MANAGED) != 0) { 3270 dstmpte = pmap_allocpte(dst_pmap, addr, 3271 M_NOWAIT); 3272 if (dstmpte == NULL) 3273 break; 3274 dst_pte = pmap_pte_quick(dst_pmap, addr); 3275 if (*dst_pte == 0 && 3276 pmap_try_insert_pv_entry(dst_pmap, addr, 3277 PHYS_TO_VM_PAGE(xpmap_mtop(ptetemp) & PG_FRAME))) { 3278 /* 3279 * Clear the wired, modified, and 3280 * accessed (referenced) bits 3281 * during the copy. 3282 */ 3283 KASSERT(ptetemp != 0, ("src_pte not set")); 3284 PT_SET_VA_MA(dst_pte, ptetemp & ~(PG_W | PG_M | PG_A), TRUE /* XXX debug */); 3285 KASSERT(*dst_pte == (ptetemp & ~(PG_W | PG_M | PG_A)), 3286 ("no pmap copy expected: 0x%jx saw: 0x%jx", 3287 ptetemp & ~(PG_W | PG_M | PG_A), *dst_pte)); 3288 dst_pmap->pm_stats.resident_count++; 3289 } else { 3290 free = NULL; 3291 if (pmap_unwire_pte_hold(dst_pmap, 3292 dstmpte, &free)) { 3293 pmap_invalidate_page(dst_pmap, 3294 addr); 3295 pmap_free_zero_pages(free); 3296 } 3297 } 3298 if (dstmpte->wire_count >= srcmpte->wire_count) 3299 break; 3300 } 3301 addr += PAGE_SIZE; 3302 src_pte++; 3303 } 3304 } 3305 PT_UPDATES_FLUSH(); 3306 sched_unpin(); 3307 vm_page_unlock_queues(); 3308 PMAP_UNLOCK(src_pmap); 3309 PMAP_UNLOCK(dst_pmap); 3310} 3311 3312/* 3313 * pmap_zero_page zeros the specified hardware page by mapping 3314 * the page into KVM and using bzero to clear its contents. 3315 */ 3316void 3317pmap_zero_page(vm_page_t m) 3318{ 3319 struct sysmaps *sysmaps; 3320 3321 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3322 mtx_lock(&sysmaps->lock); 3323 if (*sysmaps->CMAP2) 3324 panic("pmap_zero_page: CMAP2 busy"); 3325 sched_pin(); 3326 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3327 pagezero(sysmaps->CADDR2); 3328 PT_SET_MA(sysmaps->CADDR2, 0); 3329 sched_unpin(); 3330 mtx_unlock(&sysmaps->lock); 3331} 3332 3333/* 3334 * pmap_zero_page_area zeros the specified hardware page by mapping 3335 * the page into KVM and using bzero to clear its contents. 3336 * 3337 * off and size may not cover an area beyond a single hardware page. 3338 */ 3339void 3340pmap_zero_page_area(vm_page_t m, int off, int size) 3341{ 3342 struct sysmaps *sysmaps; 3343 3344 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3345 mtx_lock(&sysmaps->lock); 3346 if (*sysmaps->CMAP2) 3347 panic("pmap_zero_page: CMAP2 busy"); 3348 sched_pin(); 3349 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3350 3351 if (off == 0 && size == PAGE_SIZE) 3352 pagezero(sysmaps->CADDR2); 3353 else 3354 bzero((char *)sysmaps->CADDR2 + off, size); 3355 PT_SET_MA(sysmaps->CADDR2, 0); 3356 sched_unpin(); 3357 mtx_unlock(&sysmaps->lock); 3358} 3359 3360/* 3361 * pmap_zero_page_idle zeros the specified hardware page by mapping 3362 * the page into KVM and using bzero to clear its contents. This 3363 * is intended to be called from the vm_pagezero process only and 3364 * outside of Giant. 3365 */ 3366void 3367pmap_zero_page_idle(vm_page_t m) 3368{ 3369 3370 if (*CMAP3) 3371 panic("pmap_zero_page: CMAP3 busy"); 3372 sched_pin(); 3373 PT_SET_MA(CADDR3, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3374 pagezero(CADDR3); 3375 PT_SET_MA(CADDR3, 0); 3376 sched_unpin(); 3377} 3378 3379/* 3380 * pmap_copy_page copies the specified (machine independent) 3381 * page by mapping the page into virtual memory and using 3382 * bcopy to copy the page, one machine dependent page at a 3383 * time. 3384 */ 3385void 3386pmap_copy_page(vm_page_t src, vm_page_t dst) 3387{ 3388 struct sysmaps *sysmaps; 3389 3390 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3391 mtx_lock(&sysmaps->lock); 3392 if (*sysmaps->CMAP1) 3393 panic("pmap_copy_page: CMAP1 busy"); 3394 if (*sysmaps->CMAP2) 3395 panic("pmap_copy_page: CMAP2 busy"); 3396 sched_pin(); 3397 PT_SET_MA(sysmaps->CADDR1, PG_V | xpmap_ptom(VM_PAGE_TO_PHYS(src)) | PG_A); 3398 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(dst)) | PG_A | PG_M); 3399 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); 3400 PT_SET_MA(sysmaps->CADDR1, 0); 3401 PT_SET_MA(sysmaps->CADDR2, 0); 3402 sched_unpin(); 3403 mtx_unlock(&sysmaps->lock); 3404} 3405 3406/* 3407 * Returns true if the pmap's pv is one of the first 3408 * 16 pvs linked to from this page. This count may 3409 * be changed upwards or downwards in the future; it 3410 * is only necessary that true be returned for a small 3411 * subset of pmaps for proper page aging. 3412 */ 3413boolean_t 3414pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 3415{ 3416 pv_entry_t pv; 3417 int loops = 0; 3418 3419 if (m->flags & PG_FICTITIOUS) 3420 return (FALSE); 3421 3422 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3423 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3424 if (PV_PMAP(pv) == pmap) { 3425 return TRUE; 3426 } 3427 loops++; 3428 if (loops >= 16) 3429 break; 3430 } 3431 return (FALSE); 3432} 3433 3434/* 3435 * pmap_page_wired_mappings: 3436 * 3437 * Return the number of managed mappings to the given physical page 3438 * that are wired. 3439 */ 3440int 3441pmap_page_wired_mappings(vm_page_t m) 3442{ 3443 pv_entry_t pv; 3444 pt_entry_t *pte; 3445 pmap_t pmap; 3446 int count; 3447 3448 count = 0; 3449 if ((m->flags & PG_FICTITIOUS) != 0) 3450 return (count); 3451 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3452 sched_pin(); 3453 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3454 pmap = PV_PMAP(pv); 3455 PMAP_LOCK(pmap); 3456 pte = pmap_pte_quick(pmap, pv->pv_va); 3457 if ((*pte & PG_W) != 0) 3458 count++; 3459 PMAP_UNLOCK(pmap); 3460 } 3461 sched_unpin(); 3462 return (count); 3463} 3464 3465/* 3466 * Returns TRUE if the given page is mapped individually or as part of 3467 * a 4mpage. Otherwise, returns FALSE. 3468 */ 3469boolean_t 3470pmap_page_is_mapped(vm_page_t m) 3471{ 3472 struct md_page *pvh; 3473 3474 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 3475 return (FALSE); 3476 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3477 if (TAILQ_EMPTY(&m->md.pv_list)) { 3478 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 3479 return (!TAILQ_EMPTY(&pvh->pv_list)); 3480 } else 3481 return (TRUE); 3482} 3483 3484/* 3485 * Remove all pages from specified address space 3486 * this aids process exit speeds. Also, this code 3487 * is special cased for current process only, but 3488 * can have the more generic (and slightly slower) 3489 * mode enabled. This is much faster than pmap_remove 3490 * in the case of running down an entire address space. 3491 */ 3492void 3493pmap_remove_pages(pmap_t pmap) 3494{ 3495 pt_entry_t *pte, tpte; 3496 vm_page_t m, free = NULL; 3497 pv_entry_t pv; 3498 struct pv_chunk *pc, *npc; 3499 int field, idx; 3500 int32_t bit; 3501 uint32_t inuse, bitmask; 3502 int allfree; 3503 3504 CTR1(KTR_PMAP, "pmap_remove_pages: pmap=%p", pmap); 3505 3506 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { 3507 printf("warning: pmap_remove_pages called with non-current pmap\n"); 3508 return; 3509 } 3510 vm_page_lock_queues(); 3511 KASSERT(pmap_is_current(pmap), ("removing pages from non-current pmap")); 3512 PMAP_LOCK(pmap); 3513 sched_pin(); 3514 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) { 3515 allfree = 1; 3516 for (field = 0; field < _NPCM; field++) { 3517 inuse = (~(pc->pc_map[field])) & pc_freemask[field]; 3518 while (inuse != 0) { 3519 bit = bsfl(inuse); 3520 bitmask = 1UL << bit; 3521 idx = field * 32 + bit; 3522 pv = &pc->pc_pventry[idx]; 3523 inuse &= ~bitmask; 3524 3525 pte = vtopte(pv->pv_va); 3526 tpte = *pte ? xpmap_mtop(*pte) : 0; 3527 3528 if (tpte == 0) { 3529 printf( 3530 "TPTE at %p IS ZERO @ VA %08x\n", 3531 pte, pv->pv_va); 3532 panic("bad pte"); 3533 } 3534 3535/* 3536 * We cannot remove wired pages from a process' mapping at this time 3537 */ 3538 if (tpte & PG_W) { 3539 allfree = 0; 3540 continue; 3541 } 3542 3543 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME); 3544 KASSERT(m->phys_addr == (tpte & PG_FRAME), 3545 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 3546 m, (uintmax_t)m->phys_addr, 3547 (uintmax_t)tpte)); 3548 3549 KASSERT(m < &vm_page_array[vm_page_array_size], 3550 ("pmap_remove_pages: bad tpte %#jx", 3551 (uintmax_t)tpte)); 3552 3553 3554 PT_CLEAR_VA(pte, FALSE); 3555 3556 /* 3557 * Update the vm_page_t clean/reference bits. 3558 */ 3559 if (tpte & PG_M) 3560 vm_page_dirty(m); 3561 3562 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3563 if (TAILQ_EMPTY(&m->md.pv_list)) 3564 vm_page_flag_clear(m, PG_WRITEABLE); 3565 3566 pmap_unuse_pt(pmap, pv->pv_va, &free); 3567 3568 /* Mark free */ 3569 PV_STAT(pv_entry_frees++); 3570 PV_STAT(pv_entry_spare++); 3571 pv_entry_count--; 3572 pc->pc_map[field] |= bitmask; 3573 pmap->pm_stats.resident_count--; 3574 } 3575 } 3576 PT_UPDATES_FLUSH(); 3577 if (allfree) { 3578 PV_STAT(pv_entry_spare -= _NPCPV); 3579 PV_STAT(pc_chunk_count--); 3580 PV_STAT(pc_chunk_frees++); 3581 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 3582 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 3583 pmap_qremove((vm_offset_t)pc, 1); 3584 vm_page_unwire(m, 0); 3585 vm_page_free(m); 3586 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 3587 } 3588 } 3589 PT_UPDATES_FLUSH(); 3590 if (*PMAP1) 3591 PT_SET_MA(PADDR1, 0); 3592 3593 sched_unpin(); 3594 pmap_invalidate_all(pmap); 3595 vm_page_unlock_queues(); 3596 PMAP_UNLOCK(pmap); 3597 pmap_free_zero_pages(free); 3598} 3599 3600/* 3601 * pmap_is_modified: 3602 * 3603 * Return whether or not the specified physical page was modified 3604 * in any physical maps. 3605 */ 3606boolean_t 3607pmap_is_modified(vm_page_t m) 3608{ 3609 pv_entry_t pv; 3610 pt_entry_t *pte; 3611 pmap_t pmap; 3612 boolean_t rv; 3613 3614 rv = FALSE; 3615 if (m->flags & PG_FICTITIOUS) 3616 return (rv); 3617 3618 sched_pin(); 3619 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3620 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3621 pmap = PV_PMAP(pv); 3622 PMAP_LOCK(pmap); 3623 pte = pmap_pte_quick(pmap, pv->pv_va); 3624 rv = (*pte & PG_M) != 0; 3625 PMAP_UNLOCK(pmap); 3626 if (rv) 3627 break; 3628 } 3629 if (*PMAP1) 3630 PT_SET_MA(PADDR1, 0); 3631 sched_unpin(); 3632 return (rv); 3633} 3634 3635/* 3636 * pmap_is_prefaultable: 3637 * 3638 * Return whether or not the specified virtual address is elgible 3639 * for prefault. 3640 */ 3641static boolean_t 3642pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr) 3643{ 3644 pt_entry_t *pte; 3645 boolean_t rv = FALSE; 3646 3647 return (rv); 3648 3649 if (pmap_is_current(pmap) && *pmap_pde(pmap, addr)) { 3650 pte = vtopte(addr); 3651 rv = (*pte == 0); 3652 } 3653 return (rv); 3654} 3655 3656boolean_t 3657pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 3658{ 3659 boolean_t rv; 3660 3661 PMAP_LOCK(pmap); 3662 rv = pmap_is_prefaultable_locked(pmap, addr); 3663 PMAP_UNLOCK(pmap); 3664 return (rv); 3665} 3666 3667void 3668pmap_map_readonly(pmap_t pmap, vm_offset_t va, int len) 3669{ 3670 int i, npages = round_page(len) >> PAGE_SHIFT; 3671 for (i = 0; i < npages; i++) { 3672 pt_entry_t *pte; 3673 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE)); 3674 pte_store(pte, xpmap_mtop(*pte & ~(PG_RW|PG_M))); 3675 PMAP_MARK_PRIV(xpmap_mtop(*pte)); 3676 pmap_pte_release(pte); 3677 } 3678} 3679 3680void 3681pmap_map_readwrite(pmap_t pmap, vm_offset_t va, int len) 3682{ 3683 int i, npages = round_page(len) >> PAGE_SHIFT; 3684 for (i = 0; i < npages; i++) { 3685 pt_entry_t *pte; 3686 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE)); 3687 PMAP_MARK_UNPRIV(xpmap_mtop(*pte)); 3688 pte_store(pte, xpmap_mtop(*pte) | (PG_RW|PG_M)); 3689 pmap_pte_release(pte); 3690 } 3691} 3692 3693/* 3694 * Clear the write and modified bits in each of the given page's mappings. 3695 */ 3696void 3697pmap_remove_write(vm_page_t m) 3698{ 3699 pv_entry_t pv; 3700 pmap_t pmap; 3701 pt_entry_t oldpte, *pte; 3702 3703 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3704 if ((m->flags & PG_FICTITIOUS) != 0 || 3705 (m->flags & PG_WRITEABLE) == 0) 3706 return; 3707 sched_pin(); 3708 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3709 pmap = PV_PMAP(pv); 3710 PMAP_LOCK(pmap); 3711 pte = pmap_pte_quick(pmap, pv->pv_va); 3712retry: 3713 oldpte = *pte; 3714 if ((oldpte & PG_RW) != 0) { 3715 /* 3716 * Regardless of whether a pte is 32 or 64 bits 3717 * in size, PG_RW and PG_M are among the least 3718 * significant 32 bits. 3719 */ 3720 if (!atomic_cmpset_int((u_int *)pte, oldpte, 3721 oldpte & ~(PG_RW | PG_M))) 3722 goto retry; 3723 if ((oldpte & PG_M) != 0) 3724 vm_page_dirty(m); 3725 pmap_invalidate_page(pmap, pv->pv_va); 3726 } 3727 PMAP_UNLOCK(pmap); 3728 } 3729 vm_page_flag_clear(m, PG_WRITEABLE); 3730 PT_UPDATES_FLUSH(); 3731 if (*PMAP1) 3732 PT_SET_MA(PADDR1, 0); 3733 sched_unpin(); 3734} 3735 3736/* 3737 * pmap_ts_referenced: 3738 * 3739 * Return a count of reference bits for a page, clearing those bits. 3740 * It is not necessary for every reference bit to be cleared, but it 3741 * is necessary that 0 only be returned when there are truly no 3742 * reference bits set. 3743 * 3744 * XXX: The exact number of bits to check and clear is a matter that 3745 * should be tested and standardized at some point in the future for 3746 * optimal aging of shared pages. 3747 */ 3748int 3749pmap_ts_referenced(vm_page_t m) 3750{ 3751 pv_entry_t pv, pvf, pvn; 3752 pmap_t pmap; 3753 pt_entry_t *pte; 3754 int rtval = 0; 3755 3756 if (m->flags & PG_FICTITIOUS) 3757 return (rtval); 3758 sched_pin(); 3759 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3760 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 3761 pvf = pv; 3762 do { 3763 pvn = TAILQ_NEXT(pv, pv_list); 3764 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3765 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 3766 pmap = PV_PMAP(pv); 3767 PMAP_LOCK(pmap); 3768 pte = pmap_pte_quick(pmap, pv->pv_va); 3769 if ((*pte & PG_A) != 0) { 3770 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE); 3771 pmap_invalidate_page(pmap, pv->pv_va); 3772 rtval++; 3773 if (rtval > 4) 3774 pvn = NULL; 3775 } 3776 PMAP_UNLOCK(pmap); 3777 } while ((pv = pvn) != NULL && pv != pvf); 3778 } 3779 PT_UPDATES_FLUSH(); 3780 if (*PMAP1) 3781 PT_SET_MA(PADDR1, 0); 3782 3783 sched_unpin(); 3784 return (rtval); 3785} 3786 3787/* 3788 * Clear the modify bits on the specified physical page. 3789 */ 3790void 3791pmap_clear_modify(vm_page_t m) 3792{ 3793 pv_entry_t pv; 3794 pmap_t pmap; 3795 pt_entry_t *pte; 3796 3797 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3798 if ((m->flags & PG_FICTITIOUS) != 0) 3799 return; 3800 sched_pin(); 3801 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3802 pmap = PV_PMAP(pv); 3803 PMAP_LOCK(pmap); 3804 pte = pmap_pte_quick(pmap, pv->pv_va); 3805 if ((*pte & PG_M) != 0) { 3806 /* 3807 * Regardless of whether a pte is 32 or 64 bits 3808 * in size, PG_M is among the least significant 3809 * 32 bits. 3810 */ 3811 PT_SET_VA_MA(pte, *pte & ~PG_M, FALSE); 3812 pmap_invalidate_page(pmap, pv->pv_va); 3813 } 3814 PMAP_UNLOCK(pmap); 3815 } 3816 sched_unpin(); 3817} 3818 3819/* 3820 * pmap_clear_reference: 3821 * 3822 * Clear the reference bit on the specified physical page. 3823 */ 3824void 3825pmap_clear_reference(vm_page_t m) 3826{ 3827 pv_entry_t pv; 3828 pmap_t pmap; 3829 pt_entry_t *pte; 3830 3831 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3832 if ((m->flags & PG_FICTITIOUS) != 0) 3833 return; 3834 sched_pin(); 3835 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3836 pmap = PV_PMAP(pv); 3837 PMAP_LOCK(pmap); 3838 pte = pmap_pte_quick(pmap, pv->pv_va); 3839 if ((*pte & PG_A) != 0) { 3840 /* 3841 * Regardless of whether a pte is 32 or 64 bits 3842 * in size, PG_A is among the least significant 3843 * 32 bits. 3844 */ 3845 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE); 3846 pmap_invalidate_page(pmap, pv->pv_va); 3847 } 3848 PMAP_UNLOCK(pmap); 3849 } 3850 sched_unpin(); 3851} 3852 3853/* 3854 * Miscellaneous support routines follow 3855 */ 3856 3857/* 3858 * Map a set of physical memory pages into the kernel virtual 3859 * address space. Return a pointer to where it is mapped. This 3860 * routine is intended to be used for mapping device memory, 3861 * NOT real memory. 3862 */ 3863void * 3864pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode) 3865{ 3866 vm_offset_t va, tmpva, offset; 3867 3868 offset = pa & PAGE_MASK; 3869 size = roundup(offset + size, PAGE_SIZE); 3870 pa = pa & PG_FRAME; 3871 3872 if (pa < KERNLOAD && pa + size <= KERNLOAD) 3873 va = KERNBASE + pa; 3874 else 3875 va = kmem_alloc_nofault(kernel_map, size); 3876 if (!va) 3877 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 3878 3879 for (tmpva = va; size > 0; ) { 3880 pmap_kenter_attr(tmpva, pa, mode); 3881 size -= PAGE_SIZE; 3882 tmpva += PAGE_SIZE; 3883 pa += PAGE_SIZE; 3884 } 3885 pmap_invalidate_range(kernel_pmap, va, tmpva); 3886 pmap_invalidate_cache(); 3887 return ((void *)(va + offset)); 3888} 3889 3890void * 3891pmap_mapdev(vm_paddr_t pa, vm_size_t size) 3892{ 3893 3894 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE)); 3895} 3896 3897void * 3898pmap_mapbios(vm_paddr_t pa, vm_size_t size) 3899{ 3900 3901 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK)); 3902} 3903 3904void 3905pmap_unmapdev(vm_offset_t va, vm_size_t size) 3906{ 3907 vm_offset_t base, offset, tmpva; 3908 3909 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD) 3910 return; 3911 base = trunc_page(va); 3912 offset = va & PAGE_MASK; 3913 size = roundup(offset + size, PAGE_SIZE); 3914 critical_enter(); 3915 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 3916 pmap_kremove(tmpva); 3917 pmap_invalidate_range(kernel_pmap, va, tmpva); 3918 critical_exit(); 3919 kmem_free(kernel_map, base, size); 3920} 3921 3922int 3923pmap_change_attr(va, size, mode) 3924 vm_offset_t va; 3925 vm_size_t size; 3926 int mode; 3927{ 3928 vm_offset_t base, offset, tmpva; 3929 pt_entry_t *pte; 3930 u_int opte, npte; 3931 pd_entry_t *pde; 3932 3933 base = trunc_page(va); 3934 offset = va & PAGE_MASK; 3935 size = roundup(offset + size, PAGE_SIZE); 3936 3937 /* Only supported on kernel virtual addresses. */ 3938 if (base <= VM_MAXUSER_ADDRESS) 3939 return (EINVAL); 3940 3941 /* 4MB pages and pages that aren't mapped aren't supported. */ 3942 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) { 3943 pde = pmap_pde(kernel_pmap, tmpva); 3944 if (*pde & PG_PS) 3945 return (EINVAL); 3946 if ((*pde & PG_V) == 0) 3947 return (EINVAL); 3948 pte = vtopte(va); 3949 if ((*pte & PG_V) == 0) 3950 return (EINVAL); 3951 } 3952 3953 /* 3954 * Ok, all the pages exist and are 4k, so run through them updating 3955 * their cache mode. 3956 */ 3957 for (tmpva = base; size > 0; ) { 3958 pte = vtopte(tmpva); 3959 3960 /* 3961 * The cache mode bits are all in the low 32-bits of the 3962 * PTE, so we can just spin on updating the low 32-bits. 3963 */ 3964 do { 3965 opte = *(u_int *)pte; 3966 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT); 3967 npte |= pmap_cache_bits(mode, 0); 3968 PT_SET_VA_MA(pte, npte, TRUE); 3969 } while (npte != opte && (*pte != npte)); 3970 tmpva += PAGE_SIZE; 3971 size -= PAGE_SIZE; 3972 } 3973 3974 /* 3975 * Flush CPU caches to make sure any data isn't cached that shouldn't 3976 * be, etc. 3977 */ 3978 pmap_invalidate_range(kernel_pmap, base, tmpva); 3979 pmap_invalidate_cache(); 3980 return (0); 3981} 3982 3983/* 3984 * perform the pmap work for mincore 3985 */ 3986int 3987pmap_mincore(pmap_t pmap, vm_offset_t addr) 3988{ 3989 pt_entry_t *ptep, pte; 3990 vm_page_t m; 3991 int val = 0; 3992 3993 PMAP_LOCK(pmap); 3994 ptep = pmap_pte(pmap, addr); 3995 pte = (ptep != NULL) ? PT_GET(ptep) : 0; 3996 pmap_pte_release(ptep); 3997 PMAP_UNLOCK(pmap); 3998 3999 if (pte != 0) { 4000 vm_paddr_t pa; 4001 4002 val = MINCORE_INCORE; 4003 if ((pte & PG_MANAGED) == 0) 4004 return val; 4005 4006 pa = pte & PG_FRAME; 4007 4008 m = PHYS_TO_VM_PAGE(pa); 4009 4010 /* 4011 * Modified by us 4012 */ 4013 if (pte & PG_M) 4014 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 4015 else { 4016 /* 4017 * Modified by someone else 4018 */ 4019 vm_page_lock_queues(); 4020 if (m->dirty || pmap_is_modified(m)) 4021 val |= MINCORE_MODIFIED_OTHER; 4022 vm_page_unlock_queues(); 4023 } 4024 /* 4025 * Referenced by us 4026 */ 4027 if (pte & PG_A) 4028 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 4029 else { 4030 /* 4031 * Referenced by someone else 4032 */ 4033 vm_page_lock_queues(); 4034 if ((m->flags & PG_REFERENCED) || 4035 pmap_ts_referenced(m)) { 4036 val |= MINCORE_REFERENCED_OTHER; 4037 vm_page_flag_set(m, PG_REFERENCED); 4038 } 4039 vm_page_unlock_queues(); 4040 } 4041 } 4042 return val; 4043} 4044 4045void 4046pmap_activate(struct thread *td) 4047{ 4048 pmap_t pmap, oldpmap; 4049 u_int32_t cr3; 4050 4051 critical_enter(); 4052 pmap = vmspace_pmap(td->td_proc->p_vmspace); 4053 oldpmap = PCPU_GET(curpmap); 4054#if defined(SMP) 4055 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 4056 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 4057#else 4058 oldpmap->pm_active &= ~1; 4059 pmap->pm_active |= 1; 4060#endif 4061#ifdef PAE 4062 cr3 = vtophys(pmap->pm_pdpt); 4063#else 4064 cr3 = vtophys(pmap->pm_pdir); 4065#endif 4066 /* 4067 * pmap_activate is for the current thread on the current cpu 4068 */ 4069 td->td_pcb->pcb_cr3 = cr3; 4070 PT_UPDATES_FLUSH(); 4071 load_cr3(cr3); 4072 4073 PCPU_SET(curpmap, pmap); 4074 critical_exit(); 4075} 4076 4077/* 4078 * Increase the starting virtual address of the given mapping if a 4079 * different alignment might result in more superpage mappings. 4080 */ 4081void 4082pmap_align_superpage(vm_object_t object, vm_ooffset_t offset, 4083 vm_offset_t *addr, vm_size_t size) 4084{ 4085 vm_offset_t superpage_offset; 4086 4087 if (size < NBPDR) 4088 return; 4089 if (object != NULL && (object->flags & OBJ_COLORED) != 0) 4090 offset += ptoa(object->pg_color); 4091 superpage_offset = offset & PDRMASK; 4092 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR || 4093 (*addr & PDRMASK) == superpage_offset) 4094 return; 4095 if ((*addr & PDRMASK) < superpage_offset) 4096 *addr = (*addr & ~PDRMASK) + superpage_offset; 4097 else 4098 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset; 4099} 4100 4101#if defined(PMAP_DEBUG) 4102pmap_pid_dump(int pid) 4103{ 4104 pmap_t pmap; 4105 struct proc *p; 4106 int npte = 0; 4107 int index; 4108 4109 sx_slock(&allproc_lock); 4110 FOREACH_PROC_IN_SYSTEM(p) { 4111 if (p->p_pid != pid) 4112 continue; 4113 4114 if (p->p_vmspace) { 4115 int i,j; 4116 index = 0; 4117 pmap = vmspace_pmap(p->p_vmspace); 4118 for (i = 0; i < NPDEPTD; i++) { 4119 pd_entry_t *pde; 4120 pt_entry_t *pte; 4121 vm_offset_t base = i << PDRSHIFT; 4122 4123 pde = &pmap->pm_pdir[i]; 4124 if (pde && pmap_pde_v(pde)) { 4125 for (j = 0; j < NPTEPG; j++) { 4126 vm_offset_t va = base + (j << PAGE_SHIFT); 4127 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 4128 if (index) { 4129 index = 0; 4130 printf("\n"); 4131 } 4132 sx_sunlock(&allproc_lock); 4133 return npte; 4134 } 4135 pte = pmap_pte(pmap, va); 4136 if (pte && pmap_pte_v(pte)) { 4137 pt_entry_t pa; 4138 vm_page_t m; 4139 pa = PT_GET(pte); 4140 m = PHYS_TO_VM_PAGE(pa & PG_FRAME); 4141 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 4142 va, pa, m->hold_count, m->wire_count, m->flags); 4143 npte++; 4144 index++; 4145 if (index >= 2) { 4146 index = 0; 4147 printf("\n"); 4148 } else { 4149 printf(" "); 4150 } 4151 } 4152 } 4153 } 4154 } 4155 } 4156 } 4157 sx_sunlock(&allproc_lock); 4158 return npte; 4159} 4160#endif 4161 4162#if defined(DEBUG) 4163 4164static void pads(pmap_t pm); 4165void pmap_pvdump(vm_paddr_t pa); 4166 4167/* print address space of pmap*/ 4168static void 4169pads(pmap_t pm) 4170{ 4171 int i, j; 4172 vm_paddr_t va; 4173 pt_entry_t *ptep; 4174 4175 if (pm == kernel_pmap) 4176 return; 4177 for (i = 0; i < NPDEPTD; i++) 4178 if (pm->pm_pdir[i]) 4179 for (j = 0; j < NPTEPG; j++) { 4180 va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 4181 if (pm == kernel_pmap && va < KERNBASE) 4182 continue; 4183 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 4184 continue; 4185 ptep = pmap_pte(pm, va); 4186 if (pmap_pte_v(ptep)) 4187 printf("%x:%x ", va, *ptep); 4188 }; 4189 4190} 4191 4192void 4193pmap_pvdump(vm_paddr_t pa) 4194{ 4195 pv_entry_t pv; 4196 pmap_t pmap; 4197 vm_page_t m; 4198 4199 printf("pa %x", pa); 4200 m = PHYS_TO_VM_PAGE(pa); 4201 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 4202 pmap = PV_PMAP(pv); 4203 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va); 4204 pads(pmap); 4205 } 4206 printf(" "); 4207} 4208#endif 4209