pmap.c revision 181641
1223637Sbz/*- 2145837Smlaier * Copyright (c) 1991 Regents of the University of California. 3145837Smlaier * All rights reserved. 4145837Smlaier * Copyright (c) 1994 John S. Dyson 5145837Smlaier * All rights reserved. 6145837Smlaier * Copyright (c) 1994 David Greenman 7145837Smlaier * All rights reserved. 8145837Smlaier * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu> 9145837Smlaier * All rights reserved. 10145837Smlaier * 11145837Smlaier * This code is derived from software contributed to Berkeley by 12145837Smlaier * the Systems Programming Group of the University of Utah Computer 13145837Smlaier * Science Department and William Jolitz of UUNET Technologies Inc. 14145837Smlaier * 15145837Smlaier * Redistribution and use in source and binary forms, with or without 16145837Smlaier * modification, are permitted provided that the following conditions 17145837Smlaier * are met: 18145837Smlaier * 1. Redistributions of source code must retain the above copyright 19145840Smlaier * notice, this list of conditions and the following disclaimer. 20145840Smlaier * 2. Redistributions in binary form must reproduce the above copyright 21145840Smlaier * notice, this list of conditions and the following disclaimer in the 22145837Smlaier * documentation and/or other materials provided with the distribution. 23145837Smlaier * 3. All advertising materials mentioning features or use of this software 24145837Smlaier * must display the following acknowledgement: 25145837Smlaier * This product includes software developed by the University of 26145837Smlaier * California, Berkeley and its contributors. 27145837Smlaier * 4. Neither the name of the University nor the names of its contributors 28145837Smlaier * may be used to endorse or promote products derived from this software 29145837Smlaier * without specific prior written permission. 30145837Smlaier * 31145837Smlaier * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32145837Smlaier * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33145837Smlaier * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34145837Smlaier * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35145837Smlaier * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36145837Smlaier * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37145837Smlaier * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38145837Smlaier * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39145837Smlaier * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40145837Smlaier * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41145837Smlaier * SUCH DAMAGE. 42145837Smlaier * 43145837Smlaier * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 44145837Smlaier */ 45145837Smlaier/*- 46145837Smlaier * Copyright (c) 2003 Networks Associates Technology, Inc. 47145837Smlaier * All rights reserved. 48145837Smlaier * 49145837Smlaier * This software was developed for the FreeBSD Project by Jake Burkholder, 50145837Smlaier * Safeport Network Services, and Network Associates Laboratories, the 51145837Smlaier * Security Research Division of Network Associates, Inc. under 52145837Smlaier * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 53145837Smlaier * CHATS research program. 54145837Smlaier * 55145837Smlaier * Redistribution and use in source and binary forms, with or without 56145837Smlaier * modification, are permitted provided that the following conditions 57145837Smlaier * are met: 58145837Smlaier * 1. Redistributions of source code must retain the above copyright 59145837Smlaier * notice, this list of conditions and the following disclaimer. 60145837Smlaier * 2. Redistributions in binary form must reproduce the above copyright 61145837Smlaier * notice, this list of conditions and the following disclaimer in the 62145837Smlaier * documentation and/or other materials provided with the distribution. 63145837Smlaier * 64145837Smlaier * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 65145837Smlaier * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 66145837Smlaier * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 67145837Smlaier * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 68145837Smlaier * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 69145837Smlaier * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 70145837Smlaier * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 71145837Smlaier * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 72145837Smlaier * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 73145837Smlaier * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 74145837Smlaier * SUCH DAMAGE. 75145837Smlaier */ 76145837Smlaier 77145837Smlaier#include <sys/cdefs.h> 78145837Smlaier__FBSDID("$FreeBSD: head/sys/i386/xen/pmap.c 181641 2008-08-12 19:48:18Z kmacy $"); 79145837Smlaier 80145837Smlaier/* 81145837Smlaier * Manages physical address maps. 82145837Smlaier * 83145837Smlaier * In addition to hardware address maps, this 84145837Smlaier * module is called upon to provide software-use-only 85145837Smlaier * maps which may or may not be stored in the same 86145837Smlaier * form as hardware maps. These pseudo-maps are 87145837Smlaier * used to store intermediate results from copy 88145837Smlaier * operations to and from address spaces. 89145837Smlaier * 90145837Smlaier * Since the information managed by this module is 91145837Smlaier * also stored by the logical address mapping module, 92145837Smlaier * this module may throw away valid virtual-to-physical 93145837Smlaier * mappings at almost any time. However, invalidations 94145837Smlaier * of virtual-to-physical mappings must be done as 95145837Smlaier * requested. 96145837Smlaier * 97145837Smlaier * In order to cope with hardware architectures which 98145837Smlaier * make virtual-to-physical map invalidates expensive, 99145837Smlaier * this module may delay invalidate or reduced protection 100145837Smlaier * operations until such time as they are actually 101145837Smlaier * necessary. This module is given full information as 102145837Smlaier * to which processors are currently using which maps, 103145837Smlaier * and to when physical maps must be made correct. 104145837Smlaier */ 105145837Smlaier 106145837Smlaier#define PMAP_DIAGNOSTIC 107145837Smlaier 108145837Smlaier#include "opt_cpu.h" 109145837Smlaier#include "opt_pmap.h" 110145837Smlaier#include "opt_msgbuf.h" 111145837Smlaier#include "opt_smp.h" 112145837Smlaier#include "opt_xbox.h" 113145837Smlaier 114145837Smlaier#include <sys/param.h> 115171172Smlaier#include <sys/systm.h> 116171172Smlaier#include <sys/kernel.h> 117171172Smlaier#include <sys/ktr.h> 118171172Smlaier#include <sys/lock.h> 119145837Smlaier#include <sys/malloc.h> 120145837Smlaier#include <sys/mman.h> 121145837Smlaier#include <sys/msgbuf.h> 122145837Smlaier#include <sys/mutex.h> 123145837Smlaier#include <sys/proc.h> 124145837Smlaier#include <sys/sx.h> 125145837Smlaier#include <sys/vmmeter.h> 126145837Smlaier#include <sys/sched.h> 127145837Smlaier#include <sys/sysctl.h> 128145837Smlaier#ifdef SMP 129145837Smlaier#include <sys/smp.h> 130171172Smlaier#endif 131145837Smlaier 132145837Smlaier#include <vm/vm.h> 133145837Smlaier#include <vm/vm_param.h> 134145837Smlaier#include <vm/vm_kern.h> 135171172Smlaier#include <vm/vm_page.h> 136171172Smlaier#include <vm/vm_map.h> 137171172Smlaier#include <vm/vm_object.h> 138171172Smlaier#include <vm/vm_extern.h> 139171172Smlaier#include <vm/vm_pageout.h> 140171172Smlaier#include <vm/vm_pager.h> 141171172Smlaier#include <vm/uma.h> 142145837Smlaier 143145837Smlaier#include <machine/cpu.h> 144145837Smlaier#include <machine/cputypes.h> 145145837Smlaier#include <machine/md_var.h> 146145837Smlaier#include <machine/pcb.h> 147145837Smlaier#include <machine/specialreg.h> 148145837Smlaier#ifdef SMP 149145837Smlaier#include <machine/smp.h> 150145837Smlaier#endif 151145837Smlaier 152145837Smlaier#ifdef XBOX 153145837Smlaier#include <machine/xbox.h> 154145837Smlaier#endif 155171172Smlaier 156145837Smlaier#include <xen/interface/xen.h> 157145837Smlaier#include <machine/xen/hypervisor.h> 158145837Smlaier#include <machine/xen/hypercall.h> 159145837Smlaier#include <machine/xen/xenvar.h> 160145837Smlaier#include <machine/xen/xenfunc.h> 161145837Smlaier 162145837Smlaier#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 163145837Smlaier#define CPU_ENABLE_SSE 164145837Smlaier#endif 165145837Smlaier 166145837Smlaier#ifndef PMAP_SHPGPERPROC 167145837Smlaier#define PMAP_SHPGPERPROC 200 168145837Smlaier#endif 169145837Smlaier 170145837Smlaier#if defined(DIAGNOSTIC) 171145837Smlaier#define PMAP_DIAGNOSTIC 172145837Smlaier#endif 173145837Smlaier 174145837Smlaier#if !defined(PMAP_DIAGNOSTIC) 175145837Smlaier#define PMAP_INLINE __gnu89_inline 176145837Smlaier#else 177145837Smlaier#define PMAP_INLINE 178145837Smlaier#endif 179145837Smlaier 180145837Smlaier#define PV_STATS 181145837Smlaier#ifdef PV_STATS 182145837Smlaier#define PV_STAT(x) do { x ; } while (0) 183145837Smlaier#else 184145837Smlaier#define PV_STAT(x) do { } while (0) 185145837Smlaier#endif 186145837Smlaier 187145837Smlaier/* 188223637Sbz * Get PDEs and PTEs for user/kernel address space 189223637Sbz */ 190145837Smlaier#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 191145837Smlaier#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 192145837Smlaier 193145837Smlaier#define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 194145837Smlaier#define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 195145837Smlaier#define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 196145837Smlaier#define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 197171172Smlaier#define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 198171172Smlaier 199171172Smlaier#define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 200145837Smlaier 201145837Smlaierstruct pmap kernel_pmap_store; 202145837SmlaierLIST_HEAD(pmaplist, pmap); 203145837Smlaierstatic struct pmaplist allpmaps; 204145837Smlaierstatic struct mtx allpmaps_lock; 205223637Sbz 206145837Smlaiervm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 207145837Smlaiervm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 208145837Smlaierint pgeflag = 0; /* PG_G or-in */ 209145837Smlaierint pseflag = 0; /* PG_PS or-in */ 210145837Smlaier 211145837Smlaierstatic int nkpt; 212145837Smlaiervm_offset_t kernel_vm_end; 213145837Smlaierextern u_int32_t KERNend; 214145837Smlaier 215145837Smlaier#ifdef PAE 216145837Smlaierpt_entry_t pg_nx; 217145837Smlaier#if !defined(XEN) 218145837Smlaierstatic uma_zone_t pdptzone; 219145837Smlaier#endif 220171172Smlaier#endif 221145837Smlaier 222145837Smlaier/* 223145837Smlaier * Data for the pv entry allocation mechanism 224145837Smlaier */ 225145837Smlaierstatic int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 226145837Smlaierstatic int shpgperproc = PMAP_SHPGPERPROC; 227145837Smlaier 228145837Smlaierstruct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */ 229145837Smlaierint pv_maxchunks; /* How many chunks we have KVA for */ 230145837Smlaiervm_offset_t pv_vafree; /* freelist stored in the PTE */ 231145837Smlaier 232145837Smlaier/* 233145837Smlaier * All those kernel PT submaps that BSD is so fond of 234145837Smlaier */ 235145837Smlaierstruct sysmaps { 236145837Smlaier struct mtx lock; 237145837Smlaier pt_entry_t *CMAP1; 238145837Smlaier pt_entry_t *CMAP2; 239145837Smlaier caddr_t CADDR1; 240145837Smlaier caddr_t CADDR2; 241145837Smlaier}; 242145837Smlaierstatic struct sysmaps sysmaps_pcpu[MAXCPU]; 243145837Smlaierpt_entry_t *CMAP1 = 0; 244145837Smlaierstatic pt_entry_t *CMAP3; 245145837Smlaiercaddr_t CADDR1 = 0, ptvmmap = 0; 246145837Smlaierstatic caddr_t CADDR3; 247145837Smlaierstruct msgbuf *msgbufp = 0; 248145837Smlaier 249145837Smlaier/* 250145837Smlaier * Crashdump maps. 251145837Smlaier */ 252145837Smlaierstatic caddr_t crashdumpmap; 253145837Smlaier 254145837Smlaierstatic pt_entry_t *PMAP1 = 0, *PMAP2; 255145837Smlaierstatic pt_entry_t *PADDR1 = 0, *PADDR2; 256145837Smlaier#ifdef SMP 257145837Smlaierstatic int PMAP1cpu; 258145837Smlaierstatic int PMAP1changedcpu; 259145837SmlaierSYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD, 260145837Smlaier &PMAP1changedcpu, 0, 261145837Smlaier "Number of times pmap_pte_quick changed CPU with same PMAP1"); 262145837Smlaier#endif 263171172Smlaierstatic int PMAP1changed; 264145837SmlaierSYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD, 265145837Smlaier &PMAP1changed, 0, 266171172Smlaier "Number of times pmap_pte_quick changed PMAP1"); 267145837Smlaierstatic int PMAP1unchanged; 268145837SmlaierSYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD, 269171172Smlaier &PMAP1unchanged, 0, 270171172Smlaier "Number of times pmap_pte_quick didn't change PMAP1"); 271145837Smlaierstatic struct mtx PMAP2mutex; 272145837Smlaier 273145837Smlaierstatic void free_pv_entry(pmap_t pmap, pv_entry_t pv); 274145837Smlaierstatic pv_entry_t get_pv_entry(pmap_t locked_pmap, int try); 275171172Smlaier 276145837Smlaierstatic vm_page_t pmap_enter_quick_locked(multicall_entry_t **mcl, int *count, pmap_t pmap, vm_offset_t va, 277171172Smlaier vm_page_t m, vm_prot_t prot, vm_page_t mpte); 278171172Smlaierstatic int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva, 279171172Smlaier vm_page_t *free); 280171172Smlaierstatic void pmap_remove_page(struct pmap *pmap, vm_offset_t va, 281145837Smlaier vm_page_t *free); 282171172Smlaierstatic void pmap_remove_entry(struct pmap *pmap, vm_page_t m, 283171172Smlaier vm_offset_t va); 284171172Smlaierstatic void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m); 285171172Smlaierstatic boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, 286171172Smlaier vm_page_t m); 287171172Smlaier 288171172Smlaierstatic vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags); 289171172Smlaier 290171172Smlaierstatic vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags); 291171172Smlaierstatic int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free); 292171172Smlaierstatic pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va); 293171172Smlaierstatic void pmap_pte_release(pt_entry_t *pte); 294171172Smlaierstatic int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *); 295171172Smlaierstatic vm_offset_t pmap_kmem_choose(vm_offset_t addr); 296171172Smlaierstatic boolean_t pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr); 297171172Smlaier 298171172Smlaier#if defined(PAE) && !defined(XEN) 299171172Smlaierstatic void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 300171172Smlaier#endif 301171172Smlaier 302171172SmlaierCTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 303171172SmlaierCTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 304145837Smlaier 305171172Smlaier/* 306145837Smlaier * If you get an error here, then you set KVA_PAGES wrong! See the 307145837Smlaier * description of KVA_PAGES in sys/i386/include/pmap.h. It must be 308171172Smlaier * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE. 309145837Smlaier */ 310145837SmlaierCTASSERT(KERNBASE % (1 << 24) == 0); 311145837Smlaier 312145837Smlaier 313145837Smlaier 314145837Smlaierstatic __inline void 315145837Smlaierpagezero(void *page) 316145837Smlaier{ 317145837Smlaier#if defined(I686_CPU) 318171172Smlaier if (cpu_class == CPUCLASS_686) { 319145837Smlaier#if defined(CPU_ENABLE_SSE) 320145837Smlaier if (cpu_feature & CPUID_SSE2) 321145837Smlaier sse2_pagezero(page); 322145837Smlaier else 323145837Smlaier#endif 324171172Smlaier i686_pagezero(page); 325171172Smlaier } else 326171172Smlaier#endif 327171172Smlaier bzero(page, PAGE_SIZE); 328171172Smlaier} 329171172Smlaier 330171172Smlaiervoid 331171172Smlaierpd_set(struct pmap *pmap, int ptepindex, vm_paddr_t val, int type) 332171172Smlaier{ 333145837Smlaier vm_paddr_t pdir_ma = vtomach(&pmap->pm_pdir[ptepindex]); 334145837Smlaier 335145837Smlaier switch (type) { 336145837Smlaier case SH_PD_SET_VA: 337145837Smlaier#if 0 338145837Smlaier xen_queue_pt_update(shadow_pdir_ma, 339145837Smlaier xpmap_ptom(val & ~(PG_RW))); 340145837Smlaier#endif 341171172Smlaier xen_queue_pt_update(pdir_ma, 342171172Smlaier xpmap_ptom(val)); 343145837Smlaier break; 344145837Smlaier case SH_PD_SET_VA_MA: 345145837Smlaier#if 0 346145837Smlaier xen_queue_pt_update(shadow_pdir_ma, 347145837Smlaier val & ~(PG_RW)); 348145837Smlaier#endif 349145837Smlaier xen_queue_pt_update(pdir_ma, val); 350145837Smlaier break; 351145837Smlaier case SH_PD_SET_VA_CLEAR: 352145837Smlaier#if 0 353145837Smlaier xen_queue_pt_update(shadow_pdir_ma, 0); 354145837Smlaier#endif 355145837Smlaier xen_queue_pt_update(pdir_ma, 0); 356145837Smlaier break; 357145837Smlaier } 358145837Smlaier} 359145837Smlaier 360145837Smlaier/* 361145837Smlaier * Move the kernel virtual free pointer to the next 362145837Smlaier * 4MB. This is used to help improve performance 363145837Smlaier * by using a large (4MB) page for much of the kernel 364145837Smlaier * (.text, .data, .bss) 365145837Smlaier */ 366145837Smlaierstatic vm_offset_t 367145837Smlaierpmap_kmem_choose(vm_offset_t addr) 368145837Smlaier{ 369145837Smlaier vm_offset_t newaddr = addr; 370145837Smlaier 371145837Smlaier#ifndef DISABLE_PSE 372145837Smlaier if (cpu_feature & CPUID_PSE) 373145837Smlaier newaddr = (addr + PDRMASK) & ~PDRMASK; 374145837Smlaier#endif 375145837Smlaier return newaddr; 376145837Smlaier} 377145837Smlaier 378145837Smlaier/* 379145837Smlaier * Bootstrap the system enough to run with virtual memory. 380145837Smlaier * 381145837Smlaier * On the i386 this is called after mapping has already been enabled 382145837Smlaier * and just syncs the pmap module with what has already been done. 383145837Smlaier * [We can't call it easily with mapping off since the kernel is not 384145837Smlaier * mapped with PA == VA, hence we would have to relocate every address 385145837Smlaier * from the linked base (virtual) address "KERNBASE" to the actual 386145837Smlaier * (physical) address starting relative to 0] 387145837Smlaier */ 388145837Smlaiervoid 389145837Smlaierpmap_bootstrap(vm_paddr_t firstaddr) 390145837Smlaier{ 391145837Smlaier vm_offset_t va; 392145837Smlaier pt_entry_t *pte, *unused; 393145837Smlaier struct sysmaps *sysmaps; 394145837Smlaier int i; 395145837Smlaier 396145837Smlaier /* 397145837Smlaier * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 398145837Smlaier * large. It should instead be correctly calculated in locore.s and 399145837Smlaier * not based on 'first' (which is a physical address, not a virtual 400145837Smlaier * address, for the start of unused physical memory). The kernel 401145837Smlaier * page tables are NOT double mapped and thus should not be included 402145837Smlaier * in this calculation. 403223637Sbz */ 404145837Smlaier virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 405145837Smlaier virtual_avail = pmap_kmem_choose(virtual_avail); 406145837Smlaier 407145837Smlaier virtual_end = VM_MAX_KERNEL_ADDRESS; 408145837Smlaier 409145837Smlaier /* 410145837Smlaier * Initialize the kernel pmap (which is statically allocated). 411171172Smlaier */ 412223057Sbz PMAP_LOCK_INIT(kernel_pmap); 413145837Smlaier kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 414145837Smlaier#ifdef PAE 415145837Smlaier kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 416145837Smlaier#endif 417145837Smlaier kernel_pmap->pm_active = -1; /* don't allow deactivation */ 418145837Smlaier TAILQ_INIT(&kernel_pmap->pm_pvchunk); 419145837Smlaier LIST_INIT(&allpmaps); 420145837Smlaier mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 421171172Smlaier mtx_lock_spin(&allpmaps_lock); 422145837Smlaier LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 423145837Smlaier mtx_unlock_spin(&allpmaps_lock); 424145837Smlaier nkpt = NKPT; 425145837Smlaier 426145837Smlaier /* 427145837Smlaier * Reserve some special page table entries/VA space for temporary 428145837Smlaier * mapping of pages. 429145837Smlaier */ 430145837Smlaier#define SYSMAP(c, p, v, n) \ 431145837Smlaier v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 432145837Smlaier 433145837Smlaier va = virtual_avail; 434145837Smlaier pte = vtopte(va); 435145837Smlaier 436145837Smlaier /* 437145837Smlaier * CMAP1/CMAP2 are used for zeroing and copying pages. 438145837Smlaier * CMAP3 is used for the idle process page zeroing. 439145837Smlaier */ 440145837Smlaier for (i = 0; i < MAXCPU; i++) { 441145837Smlaier sysmaps = &sysmaps_pcpu[i]; 442145837Smlaier mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF); 443145837Smlaier SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1) 444145837Smlaier SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1) 445145837Smlaier } 446145837Smlaier SYSMAP(caddr_t, CMAP1, CADDR1, 1) 447145837Smlaier SYSMAP(caddr_t, CMAP3, CADDR3, 1) 448145837Smlaier PT_SET_MA(CADDR3, 0); 449145837Smlaier 450145837Smlaier /* 451145837Smlaier * Crashdump maps. 452145837Smlaier */ 453145837Smlaier SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS) 454145837Smlaier 455145837Smlaier /* 456145837Smlaier * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 457145837Smlaier */ 458145837Smlaier SYSMAP(caddr_t, unused, ptvmmap, 1) 459145837Smlaier 460145837Smlaier /* 461145837Smlaier * msgbufp is used to map the system message buffer. 462145837Smlaier */ 463145837Smlaier SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE))) 464145837Smlaier 465145837Smlaier /* 466145837Smlaier * ptemap is used for pmap_pte_quick 467145837Smlaier */ 468145837Smlaier SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 469145837Smlaier SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1); 470145837Smlaier 471145837Smlaier mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF); 472145837Smlaier 473145837Smlaier virtual_avail = va; 474145837Smlaier PT_SET_MA(CADDR1, 0); 475145837Smlaier 476145837Smlaier /* 477145837Smlaier * Leave in place an identity mapping (virt == phys) for the low 1 MB 478145837Smlaier * physical memory region that is used by the ACPI wakeup code. This 479145837Smlaier * mapping must not have PG_G set. 480145837Smlaier */ 481145837Smlaier#ifndef XEN 482145837Smlaier /* 483145837Smlaier * leave here deliberately to show that this is not supported 484145837Smlaier */ 485145837Smlaier#ifdef XBOX 486145837Smlaier /* FIXME: This is gross, but needed for the XBOX. Since we are in such 487145837Smlaier * an early stadium, we cannot yet neatly map video memory ... :-( 488145837Smlaier * Better fixes are very welcome! */ 489145837Smlaier if (!arch_i386_is_xbox) 490145837Smlaier#endif 491145837Smlaier for (i = 1; i < NKPT; i++) 492145837Smlaier PTD[i] = 0; 493145837Smlaier 494145837Smlaier /* Initialize the PAT MSR if present. */ 495145837Smlaier pmap_init_pat(); 496145837Smlaier 497145837Smlaier /* Turn on PG_G on kernel page(s) */ 498145837Smlaier pmap_set_pg(); 499145837Smlaier#endif 500145837Smlaier} 501145837Smlaier 502145837Smlaier/* 503145837Smlaier * Setup the PAT MSR. 504145837Smlaier */ 505145837Smlaiervoid 506145837Smlaierpmap_init_pat(void) 507145837Smlaier{ 508145837Smlaier uint64_t pat_msr; 509145837Smlaier 510145837Smlaier /* Bail if this CPU doesn't implement PAT. */ 511145837Smlaier if (!(cpu_feature & CPUID_PAT)) 512145837Smlaier return; 513145837Smlaier 514145837Smlaier#ifdef PAT_WORKS 515145837Smlaier /* 516145837Smlaier * Leave the indices 0-3 at the default of WB, WT, UC, and UC-. 517145837Smlaier * Program 4 and 5 as WP and WC. 518145837Smlaier * Leave 6 and 7 as UC and UC-. 519145837Smlaier */ 520145837Smlaier pat_msr = rdmsr(MSR_PAT); 521145837Smlaier pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5)); 522145837Smlaier pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) | 523145837Smlaier PAT_VALUE(5, PAT_WRITE_COMBINING); 524145837Smlaier#else 525145837Smlaier /* 526145837Smlaier * Due to some Intel errata, we can only safely use the lower 4 527145837Smlaier * PAT entries. Thus, just replace PAT Index 2 with WC instead 528145837Smlaier * of UC-. 529145837Smlaier * 530145837Smlaier * Intel Pentium III Processor Specification Update 531145837Smlaier * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B 532145837Smlaier * or Mode C Paging) 533145837Smlaier * 534145837Smlaier * Intel Pentium IV Processor Specification Update 535145837Smlaier * Errata N46 (PAT Index MSB May Be Calculated Incorrectly) 536145837Smlaier */ 537145837Smlaier pat_msr = rdmsr(MSR_PAT); 538145837Smlaier pat_msr &= ~PAT_MASK(2); 539145837Smlaier pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING); 540145837Smlaier#endif 541145837Smlaier wrmsr(MSR_PAT, pat_msr); 542145837Smlaier} 543145837Smlaier 544145837Smlaier/* 545145837Smlaier * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on. 546145837Smlaier */ 547145837Smlaiervoid 548145837Smlaierpmap_set_pg(void) 549145837Smlaier{ 550145837Smlaier pd_entry_t pdir; 551145837Smlaier pt_entry_t *pte; 552145837Smlaier vm_offset_t va, endva; 553145837Smlaier int i; 554145837Smlaier 555145837Smlaier if (pgeflag == 0) 556145837Smlaier return; 557145837Smlaier 558145837Smlaier i = KERNLOAD/NBPDR; 559145837Smlaier endva = KERNBASE + KERNend; 560145837Smlaier 561145837Smlaier if (pseflag) { 562145837Smlaier va = KERNBASE + KERNLOAD; 563145837Smlaier while (va < endva) { 564145837Smlaier pdir = kernel_pmap->pm_pdir[KPTDI+i]; 565145837Smlaier pdir |= pgeflag; 566145837Smlaier kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir; 567145837Smlaier invltlb(); /* Play it safe, invltlb() every time */ 568145837Smlaier i++; 569145837Smlaier va += NBPDR; 570145837Smlaier } 571145837Smlaier } else { 572145837Smlaier va = (vm_offset_t)btext; 573145837Smlaier while (va < endva) { 574145837Smlaier pte = vtopte(va); 575145837Smlaier if (*pte & PG_V) 576145837Smlaier *pte |= pgeflag; 577145837Smlaier invltlb(); /* Play it safe, invltlb() every time */ 578145837Smlaier va += PAGE_SIZE; 579145837Smlaier } 580145837Smlaier } 581145837Smlaier} 582145837Smlaier 583145837Smlaier/* 584145837Smlaier * Initialize a vm_page's machine-dependent fields. 585145837Smlaier */ 586145837Smlaiervoid 587145837Smlaierpmap_page_init(vm_page_t m) 588145837Smlaier{ 589145837Smlaier 590145837Smlaier TAILQ_INIT(&m->md.pv_list); 591145837Smlaier} 592145837Smlaier 593145837Smlaier#if defined(PAE) && !defined(XEN) 594145837Smlaier 595145837Smlaierstatic MALLOC_DEFINE(M_PMAPPDPT, "pmap", "pmap pdpt"); 596145837Smlaier 597145837Smlaierstatic void * 598145837Smlaierpmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 599145837Smlaier{ 600145837Smlaier *flags = UMA_SLAB_PRIV; 601145837Smlaier return (contigmalloc(PAGE_SIZE, M_PMAPPDPT, 0, 0x0ULL, 0xffffffffULL, 602145837Smlaier 1, 0)); 603145837Smlaier} 604145837Smlaier#endif 605145837Smlaier 606145837Smlaier/* 607145837Smlaier * ABuse the pte nodes for unmapped kva to thread a kva freelist through. 608145837Smlaier * Requirements: 609145837Smlaier * - Must deal with pages in order to ensure that none of the PG_* bits 610145837Smlaier * are ever set, PG_V in particular. 611145837Smlaier * - Assumes we can write to ptes without pte_store() atomic ops, even 612145837Smlaier * on PAE systems. This should be ok. 613145837Smlaier * - Assumes nothing will ever test these addresses for 0 to indicate 614145837Smlaier * no mapping instead of correctly checking PG_V. 615145837Smlaier * - Assumes a vm_offset_t will fit in a pte (true for i386). 616145837Smlaier * Because PG_V is never set, there can be no mappings to invalidate. 617145837Smlaier */ 618145837Smlaierstatic int ptelist_count = 0; 619145837Smlaierstatic vm_offset_t 620145837Smlaierpmap_ptelist_alloc(vm_offset_t *head) 621145837Smlaier{ 622145837Smlaier vm_offset_t va; 623145837Smlaier vm_offset_t *phead = (vm_offset_t *)*head; 624145837Smlaier 625145837Smlaier if (ptelist_count == 0) { 626145837Smlaier printf("out of memory!!!!!!\n"); 627145837Smlaier return (0); /* Out of memory */ 628145837Smlaier } 629145837Smlaier ptelist_count--; 630145837Smlaier va = phead[ptelist_count]; 631145837Smlaier return (va); 632145837Smlaier} 633145837Smlaier 634145837Smlaierstatic void 635145837Smlaierpmap_ptelist_free(vm_offset_t *head, vm_offset_t va) 636145837Smlaier{ 637145837Smlaier vm_offset_t *phead = (vm_offset_t *)*head; 638145837Smlaier 639145837Smlaier phead[ptelist_count++] = va; 640145837Smlaier} 641145837Smlaier 642145837Smlaierstatic void 643145837Smlaierpmap_ptelist_init(vm_offset_t *head, void *base, int npages) 644145837Smlaier{ 645145837Smlaier int i, nstackpages; 646145837Smlaier vm_offset_t va; 647145837Smlaier vm_page_t m; 648145837Smlaier 649145837Smlaier nstackpages = (npages + PAGE_SIZE/sizeof(vm_offset_t) - 1)/ (PAGE_SIZE/sizeof(vm_offset_t)); 650145837Smlaier for (i = 0; i < nstackpages; i++) { 651145837Smlaier va = (vm_offset_t)base + i * PAGE_SIZE; 652145837Smlaier m = vm_page_alloc(NULL, i, 653145837Smlaier VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 654145837Smlaier VM_ALLOC_ZERO); 655145837Smlaier pmap_qenter(va, &m, 1); 656145837Smlaier } 657145837Smlaier 658145837Smlaier *head = (vm_offset_t)base; 659145837Smlaier for (i = npages - 1; i >= nstackpages; i--) { 660145837Smlaier va = (vm_offset_t)base + i * PAGE_SIZE; 661145837Smlaier pmap_ptelist_free(head, va); 662145837Smlaier } 663145837Smlaier} 664145837Smlaier 665145837Smlaier 666145837Smlaier/* 667145837Smlaier * Initialize the pmap module. 668145837Smlaier * Called by vm_init, to initialize any structures that the pmap 669145837Smlaier * system needs to map virtual memory. 670145837Smlaier */ 671145837Smlaiervoid 672145837Smlaierpmap_init(void) 673145837Smlaier{ 674145837Smlaier 675145837Smlaier /* 676145837Smlaier * Initialize the address space (zone) for the pv entries. Set a 677145837Smlaier * high water mark so that the system can recover from excessive 678145837Smlaier * numbers of pv entries. 679145837Smlaier */ 680145837Smlaier TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 681145837Smlaier pv_entry_max = shpgperproc * maxproc + cnt.v_page_count; 682145837Smlaier TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 683145837Smlaier pv_entry_max = roundup(pv_entry_max, _NPCPV); 684145837Smlaier pv_entry_high_water = 9 * (pv_entry_max / 10); 685145837Smlaier 686145837Smlaier pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc); 687145837Smlaier pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map, 688145837Smlaier PAGE_SIZE * pv_maxchunks); 689145837Smlaier if (pv_chunkbase == NULL) 690145837Smlaier panic("pmap_init: not enough kvm for pv chunks"); 691145837Smlaier pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks); 692145837Smlaier#if defined(PAE) && !defined(XEN) 693145837Smlaier pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL, 694145837Smlaier NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1, 695145837Smlaier UMA_ZONE_VM | UMA_ZONE_NOFREE); 696145837Smlaier uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf); 697145837Smlaier#endif 698145837Smlaier} 699145837Smlaier 700145837Smlaier 701145837SmlaierSYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters"); 702145837SmlaierSYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0, 703145837Smlaier "Max number of PV entries"); 704145837SmlaierSYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0, 705145837Smlaier "Page share factor per proc"); 706145837Smlaier 707145837Smlaier/*************************************************** 708145837Smlaier * Low level helper routines..... 709145837Smlaier ***************************************************/ 710145837Smlaier 711145837Smlaier/* 712145837Smlaier * Determine the appropriate bits to set in a PTE or PDE for a specified 713145837Smlaier * caching mode. 714145837Smlaier */ 715145837Smlaierstatic int 716145837Smlaierpmap_cache_bits(int mode, boolean_t is_pde) 717145837Smlaier{ 718145837Smlaier int pat_flag, pat_index, cache_bits; 719145837Smlaier 720145837Smlaier /* The PAT bit is different for PTE's and PDE's. */ 721145837Smlaier pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT; 722145837Smlaier 723145837Smlaier /* If we don't support PAT, map extended modes to older ones. */ 724145837Smlaier if (!(cpu_feature & CPUID_PAT)) { 725145837Smlaier switch (mode) { 726145837Smlaier case PAT_UNCACHEABLE: 727145837Smlaier case PAT_WRITE_THROUGH: 728145837Smlaier case PAT_WRITE_BACK: 729145837Smlaier break; 730145837Smlaier case PAT_UNCACHED: 731145837Smlaier case PAT_WRITE_COMBINING: 732145837Smlaier case PAT_WRITE_PROTECTED: 733145837Smlaier mode = PAT_UNCACHEABLE; 734145837Smlaier break; 735145837Smlaier } 736145837Smlaier } 737145837Smlaier 738145837Smlaier /* Map the caching mode to a PAT index. */ 739145837Smlaier switch (mode) { 740145837Smlaier#ifdef PAT_WORKS 741145837Smlaier case PAT_UNCACHEABLE: 742145837Smlaier pat_index = 3; 743145837Smlaier break; 744145837Smlaier case PAT_WRITE_THROUGH: 745145837Smlaier pat_index = 1; 746145837Smlaier break; 747145837Smlaier case PAT_WRITE_BACK: 748145837Smlaier pat_index = 0; 749145837Smlaier break; 750145837Smlaier case PAT_UNCACHED: 751145837Smlaier pat_index = 2; 752145837Smlaier break; 753145837Smlaier case PAT_WRITE_COMBINING: 754145837Smlaier pat_index = 5; 755145837Smlaier break; 756145837Smlaier case PAT_WRITE_PROTECTED: 757145837Smlaier pat_index = 4; 758145837Smlaier break; 759145837Smlaier#else 760145837Smlaier case PAT_UNCACHED: 761145837Smlaier case PAT_UNCACHEABLE: 762145837Smlaier case PAT_WRITE_PROTECTED: 763145837Smlaier pat_index = 3; 764145837Smlaier break; 765145837Smlaier case PAT_WRITE_THROUGH: 766145837Smlaier pat_index = 1; 767145837Smlaier break; 768145837Smlaier case PAT_WRITE_BACK: 769145837Smlaier pat_index = 0; 770145837Smlaier break; 771145837Smlaier case PAT_WRITE_COMBINING: 772145837Smlaier pat_index = 2; 773145837Smlaier break; 774145837Smlaier#endif 775145837Smlaier default: 776145837Smlaier panic("Unknown caching mode %d\n", mode); 777145837Smlaier } 778145837Smlaier 779145837Smlaier /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */ 780145837Smlaier cache_bits = 0; 781145837Smlaier if (pat_index & 0x4) 782145837Smlaier cache_bits |= pat_flag; 783145837Smlaier if (pat_index & 0x2) 784145837Smlaier cache_bits |= PG_NC_PCD; 785145837Smlaier if (pat_index & 0x1) 786145837Smlaier cache_bits |= PG_NC_PWT; 787145837Smlaier return (cache_bits); 788145837Smlaier} 789145837Smlaier#ifdef SMP 790145837Smlaier/* 791145837Smlaier * For SMP, these functions have to use the IPI mechanism for coherence. 792145837Smlaier * 793145837Smlaier * N.B.: Before calling any of the following TLB invalidation functions, 794145837Smlaier * the calling processor must ensure that all stores updating a non- 795145837Smlaier * kernel page table are globally performed. Otherwise, another 796145837Smlaier * processor could cache an old, pre-update entry without being 797145837Smlaier * invalidated. This can happen one of two ways: (1) The pmap becomes 798145837Smlaier * active on another processor after its pm_active field is checked by 799145837Smlaier * one of the following functions but before a store updating the page 800145837Smlaier * table is globally performed. (2) The pmap becomes active on another 801145837Smlaier * processor before its pm_active field is checked but due to 802145837Smlaier * speculative loads one of the following functions stills reads the 803145837Smlaier * pmap as inactive on the other processor. 804145837Smlaier * 805145837Smlaier * The kernel page table is exempt because its pm_active field is 806145837Smlaier * immutable. The kernel page table is always active on every 807145837Smlaier * processor. 808145837Smlaier */ 809145837Smlaiervoid 810145837Smlaierpmap_invalidate_page(pmap_t pmap, vm_offset_t va) 811145837Smlaier{ 812145837Smlaier u_int cpumask; 813145837Smlaier u_int other_cpus; 814145837Smlaier 815145837Smlaier CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x", 816145837Smlaier pmap, va); 817145837Smlaier 818145837Smlaier sched_pin(); 819145837Smlaier if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 820145837Smlaier invlpg(va); 821145837Smlaier smp_invlpg(va); 822145837Smlaier } else { 823145837Smlaier cpumask = PCPU_GET(cpumask); 824145837Smlaier other_cpus = PCPU_GET(other_cpus); 825145837Smlaier if (pmap->pm_active & cpumask) 826145837Smlaier invlpg(va); 827145837Smlaier if (pmap->pm_active & other_cpus) 828171172Smlaier smp_masked_invlpg(pmap->pm_active & other_cpus, va); 829171172Smlaier } 830145837Smlaier sched_unpin(); 831145837Smlaier PT_UPDATES_FLUSH(); 832145837Smlaier} 833145837Smlaier 834145837Smlaiervoid 835145837Smlaierpmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 836171172Smlaier{ 837171172Smlaier u_int cpumask; 838145837Smlaier u_int other_cpus; 839145837Smlaier vm_offset_t addr; 840145837Smlaier 841145837Smlaier CTR3(KTR_PMAP, "pmap_invalidate_page: pmap=%p eva=0x%x sva=0x%x", 842145837Smlaier pmap, sva, eva); 843145837Smlaier 844145837Smlaier sched_pin(); 845145837Smlaier if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 846145837Smlaier for (addr = sva; addr < eva; addr += PAGE_SIZE) 847145837Smlaier invlpg(addr); 848145837Smlaier smp_invlpg_range(sva, eva); 849145837Smlaier } else { 850145837Smlaier cpumask = PCPU_GET(cpumask); 851145837Smlaier other_cpus = PCPU_GET(other_cpus); 852145837Smlaier if (pmap->pm_active & cpumask) 853145837Smlaier for (addr = sva; addr < eva; addr += PAGE_SIZE) 854145837Smlaier invlpg(addr); 855145837Smlaier if (pmap->pm_active & other_cpus) 856145837Smlaier smp_masked_invlpg_range(pmap->pm_active & other_cpus, 857145837Smlaier sva, eva); 858145837Smlaier } 859145837Smlaier sched_unpin(); 860145837Smlaier PT_UPDATES_FLUSH(); 861145837Smlaier} 862145837Smlaier 863145837Smlaiervoid 864145837Smlaierpmap_invalidate_all(pmap_t pmap) 865145840Smlaier{ 866145840Smlaier u_int cpumask; 867145840Smlaier u_int other_cpus; 868145837Smlaier 869145840Smlaier CTR1(KTR_PMAP, "pmap_invalidate_page: pmap=%p", pmap); 870145837Smlaier 871145837Smlaier sched_pin(); 872145837Smlaier if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 873145837Smlaier invltlb(); 874145837Smlaier smp_invltlb(); 875145837Smlaier } else { 876145837Smlaier cpumask = PCPU_GET(cpumask); 877145837Smlaier other_cpus = PCPU_GET(other_cpus); 878145837Smlaier if (pmap->pm_active & cpumask) 879145837Smlaier invltlb(); 880145837Smlaier if (pmap->pm_active & other_cpus) 881145837Smlaier smp_masked_invltlb(pmap->pm_active & other_cpus); 882145837Smlaier } 883145837Smlaier sched_unpin(); 884145837Smlaier} 885145837Smlaier 886145837Smlaiervoid 887145837Smlaierpmap_invalidate_cache(void) 888145837Smlaier{ 889145837Smlaier 890145837Smlaier sched_pin(); 891145837Smlaier wbinvd(); 892145837Smlaier smp_cache_flush(); 893145837Smlaier sched_unpin(); 894145837Smlaier} 895145837Smlaier#else /* !SMP */ 896145837Smlaier/* 897145837Smlaier * Normal, non-SMP, 486+ invalidation functions. 898145837Smlaier * We inline these within pmap.c for speed. 899145837Smlaier */ 900145837SmlaierPMAP_INLINE void 901145837Smlaierpmap_invalidate_page(pmap_t pmap, vm_offset_t va) 902145837Smlaier{ 903145837Smlaier CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x", 904145837Smlaier pmap, va); 905171172Smlaier 906145837Smlaier if (pmap == kernel_pmap || pmap->pm_active) 907145837Smlaier invlpg(va); 908145837Smlaier PT_UPDATES_FLUSH(); 909145837Smlaier} 910145837Smlaier 911145837SmlaierPMAP_INLINE void 912145837Smlaierpmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 913145837Smlaier{ 914145837Smlaier vm_offset_t addr; 915145837Smlaier 916171172Smlaier if (eva - sva > PAGE_SIZE) 917171172Smlaier CTR3(KTR_PMAP, "pmap_invalidate_range: pmap=%p sva=0x%x eva=0x%x", 918145837Smlaier pmap, sva, eva); 919145837Smlaier 920145837Smlaier if (pmap == kernel_pmap || pmap->pm_active) 921145837Smlaier for (addr = sva; addr < eva; addr += PAGE_SIZE) 922145837Smlaier invlpg(addr); 923145837Smlaier PT_UPDATES_FLUSH(); 924145837Smlaier} 925145837Smlaier 926145837SmlaierPMAP_INLINE void 927145837Smlaierpmap_invalidate_all(pmap_t pmap) 928145837Smlaier{ 929145837Smlaier 930145837Smlaier CTR1(KTR_PMAP, "pmap_invalidate_all: pmap=%p", pmap); 931145837Smlaier 932145837Smlaier if (pmap == kernel_pmap || pmap->pm_active) 933145837Smlaier invltlb(); 934145837Smlaier} 935145837Smlaier 936145837SmlaierPMAP_INLINE void 937145837Smlaierpmap_invalidate_cache(void) 938145837Smlaier{ 939145837Smlaier 940145837Smlaier wbinvd(); 941145837Smlaier} 942145837Smlaier#endif /* !SMP */ 943145837Smlaier 944145837Smlaier/* 945145837Smlaier * Are we current address space or kernel? N.B. We return FALSE when 946145837Smlaier * a pmap's page table is in use because a kernel thread is borrowing 947145837Smlaier * it. The borrowed page table can change spontaneously, making any 948145837Smlaier * dependence on its continued use subject to a race condition. 949145837Smlaier */ 950145837Smlaierstatic __inline int 951145837Smlaierpmap_is_current(pmap_t pmap) 952145837Smlaier{ 953145837Smlaier 954145837Smlaier return (pmap == kernel_pmap || 955145837Smlaier (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) && 956145837Smlaier (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME))); 957145837Smlaier} 958145837Smlaier 959145837Smlaier/* 960145837Smlaier * If the given pmap is not the current or kernel pmap, the returned pte must 961145837Smlaier * be released by passing it to pmap_pte_release(). 962145837Smlaier */ 963145837Smlaierpt_entry_t * 964145837Smlaierpmap_pte(pmap_t pmap, vm_offset_t va) 965145837Smlaier{ 966145837Smlaier pd_entry_t newpf; 967145837Smlaier pd_entry_t *pde; 968145837Smlaier 969145837Smlaier pde = pmap_pde(pmap, va); 970145837Smlaier if (*pde & PG_PS) 971145837Smlaier return (pde); 972145837Smlaier if (*pde != 0) { 973145837Smlaier /* are we current address space or kernel? */ 974145837Smlaier if (pmap_is_current(pmap)) 975145837Smlaier return (vtopte(va)); 976145837Smlaier mtx_lock(&PMAP2mutex); 977145837Smlaier newpf = *pde & PG_FRAME; 978145837Smlaier if ((*PMAP2 & PG_FRAME) != newpf) { 979145837Smlaier PT_SET_MA(PADDR2, newpf | PG_V | PG_A | PG_M); 980145837Smlaier CTR3(KTR_PMAP, "pmap_pte: pmap=%p va=0x%x newpte=0x%08x", 981145837Smlaier pmap, va, (*PMAP2 & 0xffffffff)); 982145837Smlaier } 983145837Smlaier 984145837Smlaier return (PADDR2 + (i386_btop(va) & (NPTEPG - 1))); 985145837Smlaier } 986145837Smlaier return (0); 987145837Smlaier} 988145837Smlaier 989145837Smlaier/* 990145837Smlaier * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte 991145837Smlaier * being NULL. 992145837Smlaier */ 993145837Smlaierstatic __inline void 994145837Smlaierpmap_pte_release(pt_entry_t *pte) 995145837Smlaier{ 996145837Smlaier 997145837Smlaier if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) { 998145837Smlaier CTR1(KTR_PMAP, "pmap_pte_release: pte=0x%jx", 999145837Smlaier *PMAP2); 1000145837Smlaier PT_SET_VA(PMAP2, 0, TRUE); 1001145837Smlaier mtx_unlock(&PMAP2mutex); 1002145837Smlaier } 1003145837Smlaier} 1004145837Smlaier 1005145837Smlaierstatic __inline void 1006145837Smlaierinvlcaddr(void *caddr) 1007145837Smlaier{ 1008145837Smlaier 1009145837Smlaier invlpg((u_int)caddr); 1010145837Smlaier PT_UPDATES_FLUSH(); 1011145837Smlaier} 1012145837Smlaier 1013145837Smlaier/* 1014145837Smlaier * Super fast pmap_pte routine best used when scanning 1015145837Smlaier * the pv lists. This eliminates many coarse-grained 1016145837Smlaier * invltlb calls. Note that many of the pv list 1017145837Smlaier * scans are across different pmaps. It is very wasteful 1018145837Smlaier * to do an entire invltlb for checking a single mapping. 1019145837Smlaier * 1020145837Smlaier * If the given pmap is not the current pmap, vm_page_queue_mtx 1021145837Smlaier * must be held and curthread pinned to a CPU. 1022145837Smlaier */ 1023145837Smlaierstatic pt_entry_t * 1024145837Smlaierpmap_pte_quick(pmap_t pmap, vm_offset_t va) 1025145837Smlaier{ 1026145837Smlaier pd_entry_t newpf; 1027145837Smlaier pd_entry_t *pde; 1028145837Smlaier 1029145837Smlaier pde = pmap_pde(pmap, va); 1030145837Smlaier if (*pde & PG_PS) 1031145837Smlaier return (pde); 1032145837Smlaier if (*pde != 0) { 1033145837Smlaier /* are we current address space or kernel? */ 1034145837Smlaier if (pmap_is_current(pmap)) 1035145837Smlaier return (vtopte(va)); 1036145837Smlaier mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1037145837Smlaier KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 1038145837Smlaier newpf = *pde & PG_FRAME; 1039145837Smlaier if ((*PMAP1 & PG_FRAME) != newpf) { 1040145837Smlaier PT_SET_MA(PADDR1, newpf | PG_V | PG_A | PG_M); 1041145837Smlaier CTR3(KTR_PMAP, "pmap_pte_quick: pmap=%p va=0x%x newpte=0x%08x", 1042145837Smlaier pmap, va, (u_long)*PMAP1); 1043145837Smlaier 1044145837Smlaier#ifdef SMP 1045145837Smlaier PMAP1cpu = PCPU_GET(cpuid); 1046145837Smlaier#endif 1047145837Smlaier PMAP1changed++; 1048145837Smlaier } else 1049145837Smlaier#ifdef SMP 1050145837Smlaier if (PMAP1cpu != PCPU_GET(cpuid)) { 1051145837Smlaier PMAP1cpu = PCPU_GET(cpuid); 1052145837Smlaier invlcaddr(PADDR1); 1053145837Smlaier PMAP1changedcpu++; 1054145837Smlaier } else 1055145837Smlaier#endif 1056145837Smlaier PMAP1unchanged++; 1057145837Smlaier return (PADDR1 + (i386_btop(va) & (NPTEPG - 1))); 1058145837Smlaier } 1059145837Smlaier return (0); 1060145837Smlaier} 1061145837Smlaier 1062145837Smlaier/* 1063145837Smlaier * Routine: pmap_extract 1064145837Smlaier * Function: 1065145837Smlaier * Extract the physical page address associated 1066145837Smlaier * with the given map/virtual_address pair. 1067145837Smlaier */ 1068145837Smlaiervm_paddr_t 1069145837Smlaierpmap_extract(pmap_t pmap, vm_offset_t va) 1070145837Smlaier{ 1071145837Smlaier vm_paddr_t rtval; 1072145837Smlaier pt_entry_t *pte; 1073145837Smlaier pd_entry_t pde; 1074145837Smlaier pt_entry_t pteval; 1075145837Smlaier 1076145837Smlaier rtval = 0; 1077145837Smlaier PMAP_LOCK(pmap); 1078145837Smlaier pde = pmap->pm_pdir[va >> PDRSHIFT]; 1079145837Smlaier if (pde != 0) { 1080145837Smlaier if ((pde & PG_PS) != 0) { 1081145837Smlaier rtval = xpmap_mtop(pde & PG_PS_FRAME) | (va & PDRMASK); 1082145837Smlaier PMAP_UNLOCK(pmap); 1083145837Smlaier return rtval; 1084145837Smlaier } 1085145837Smlaier pte = pmap_pte(pmap, va); 1086145837Smlaier pteval = *pte ? xpmap_mtop(*pte) : 0; 1087145837Smlaier rtval = (pteval & PG_FRAME) | (va & PAGE_MASK); 1088145837Smlaier pmap_pte_release(pte); 1089145837Smlaier } 1090145837Smlaier PMAP_UNLOCK(pmap); 1091145837Smlaier return (rtval); 1092145837Smlaier} 1093145837Smlaier 1094145837Smlaier/* 1095145837Smlaier * Routine: pmap_extract_ma 1096145837Smlaier * Function: 1097145837Smlaier * Like pmap_extract, but returns machine address 1098145837Smlaier */ 1099145837Smlaiervm_paddr_t 1100171172Smlaierpmap_extract_ma(pmap_t pmap, vm_offset_t va) 1101145837Smlaier{ 1102145837Smlaier vm_paddr_t rtval; 1103145837Smlaier pt_entry_t *pte; 1104145837Smlaier pd_entry_t pde; 1105145837Smlaier 1106145837Smlaier rtval = 0; 1107145837Smlaier PMAP_LOCK(pmap); 1108145837Smlaier pde = pmap->pm_pdir[va >> PDRSHIFT]; 1109145837Smlaier if (pde != 0) { 1110145837Smlaier if ((pde & PG_PS) != 0) { 1111145837Smlaier rtval = (pde & ~PDRMASK) | (va & PDRMASK); 1112145837Smlaier PMAP_UNLOCK(pmap); 1113145837Smlaier return rtval; 1114145837Smlaier } 1115145837Smlaier pte = pmap_pte(pmap, va); 1116145837Smlaier rtval = (*pte & PG_FRAME) | (va & PAGE_MASK); 1117145837Smlaier pmap_pte_release(pte); 1118145837Smlaier } 1119145837Smlaier PMAP_UNLOCK(pmap); 1120145837Smlaier return (rtval); 1121145837Smlaier} 1122145837Smlaier 1123145837Smlaier/* 1124145837Smlaier * Routine: pmap_extract_and_hold 1125145837Smlaier * Function: 1126145837Smlaier * Atomically extract and hold the physical page 1127145837Smlaier * with the given pmap and virtual address pair 1128145837Smlaier * if that mapping permits the given protection. 1129145837Smlaier */ 1130145837Smlaiervm_page_t 1131145837Smlaierpmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 1132145837Smlaier{ 1133145837Smlaier pd_entry_t pde; 1134145837Smlaier pt_entry_t pte; 1135145837Smlaier vm_page_t m; 1136145837Smlaier 1137145837Smlaier m = NULL; 1138145837Smlaier vm_page_lock_queues(); 1139145837Smlaier PMAP_LOCK(pmap); 1140145837Smlaier pde = PT_GET(pmap_pde(pmap, va)); 1141145837Smlaier if (pde != 0) { 1142145837Smlaier if (pde & PG_PS) { 1143145837Smlaier if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) { 1144145837Smlaier m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) | 1145145837Smlaier (va & PDRMASK)); 1146145837Smlaier vm_page_hold(m); 1147145837Smlaier } 1148145837Smlaier } else { 1149145837Smlaier sched_pin(); 1150145837Smlaier pte = PT_GET(pmap_pte_quick(pmap, va)); 1151145837Smlaier if (*PMAP1) 1152145837Smlaier PT_SET_MA(PADDR1, 0); 1153145837Smlaier if ((pte & PG_V) && 1154145837Smlaier ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) { 1155145837Smlaier m = PHYS_TO_VM_PAGE(pte & PG_FRAME); 1156145837Smlaier vm_page_hold(m); 1157145837Smlaier } 1158145837Smlaier sched_unpin(); 1159145837Smlaier } 1160145837Smlaier } 1161145837Smlaier vm_page_unlock_queues(); 1162145837Smlaier PMAP_UNLOCK(pmap); 1163145837Smlaier return (m); 1164145837Smlaier} 1165145837Smlaier 1166145837Smlaier/*************************************************** 1167145837Smlaier * Low level mapping routines..... 1168145837Smlaier ***************************************************/ 1169145837Smlaier 1170145837Smlaier/* 1171145837Smlaier * Add a wired page to the kva. 1172171172Smlaier * Note: not SMP coherent. 1173145837Smlaier */ 1174145837SmlaierPMAP_INLINE void 1175145837Smlaierpmap_kenter(vm_offset_t va, vm_paddr_t pa) 1176145837Smlaier{ 1177145837Smlaier PT_SET_MA(va, xpmap_ptom(pa)| PG_RW | PG_V | pgeflag); 1178145837Smlaier} 1179145837Smlaier 1180145837SmlaierPMAP_INLINE void 1181145837Smlaierpmap_kenter_ma(vm_offset_t va, vm_paddr_t ma) 1182145837Smlaier{ 1183145837Smlaier pt_entry_t *pte; 1184145837Smlaier 1185145837Smlaier pte = vtopte(va); 1186145837Smlaier pte_store_ma(pte, ma | PG_RW | PG_V | pgeflag); 1187145837Smlaier} 1188145837Smlaier 1189145837Smlaier 1190145837SmlaierPMAP_INLINE void 1191145837Smlaierpmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode) 1192145837Smlaier{ 1193145837Smlaier PT_SET_MA(va, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0)); 1194145837Smlaier} 1195145837Smlaier 1196145837Smlaier/* 1197145837Smlaier * Remove a page from the kernel pagetables. 1198145837Smlaier * Note: not SMP coherent. 1199145837Smlaier */ 1200145837SmlaierPMAP_INLINE void 1201145837Smlaierpmap_kremove(vm_offset_t va) 1202145837Smlaier{ 1203145837Smlaier pt_entry_t *pte; 1204145837Smlaier 1205145837Smlaier pte = vtopte(va); 1206145837Smlaier PT_CLEAR_VA(pte, FALSE); 1207145837Smlaier} 1208145837Smlaier 1209145837Smlaier/* 1210145837Smlaier * Used to map a range of physical addresses into kernel 1211145837Smlaier * virtual address space. 1212145837Smlaier * 1213145837Smlaier * The value passed in '*virt' is a suggested virtual address for 1214145837Smlaier * the mapping. Architectures which can support a direct-mapped 1215145837Smlaier * physical to virtual region can return the appropriate address 1216145837Smlaier * within that region, leaving '*virt' unchanged. Other 1217145837Smlaier * architectures should map the pages starting at '*virt' and 1218145837Smlaier * update '*virt' with the first usable address after the mapped 1219145837Smlaier * region. 1220145837Smlaier */ 1221145837Smlaiervm_offset_t 1222145837Smlaierpmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 1223145837Smlaier{ 1224145837Smlaier vm_offset_t va, sva; 1225145837Smlaier 1226145837Smlaier va = sva = *virt; 1227145837Smlaier CTR4(KTR_PMAP, "pmap_map: va=0x%x start=0x%jx end=0x%jx prot=0x%x", 1228145837Smlaier va, start, end, prot); 1229145837Smlaier while (start < end) { 1230145837Smlaier pmap_kenter(va, start); 1231145837Smlaier va += PAGE_SIZE; 1232145837Smlaier start += PAGE_SIZE; 1233145837Smlaier } 1234145837Smlaier pmap_invalidate_range(kernel_pmap, sva, va); 1235145837Smlaier *virt = va; 1236145837Smlaier return (sva); 1237145837Smlaier} 1238145837Smlaier 1239145837Smlaier 1240145837Smlaier/* 1241145837Smlaier * Add a list of wired pages to the kva 1242145837Smlaier * this routine is only used for temporary 1243145837Smlaier * kernel mappings that do not need to have 1244145837Smlaier * page modification or references recorded. 1245145837Smlaier * Note that old mappings are simply written 1246145837Smlaier * over. The page *must* be wired. 1247145837Smlaier * Note: SMP coherent. Uses a ranged shootdown IPI. 1248145837Smlaier */ 1249145837Smlaiervoid 1250145837Smlaierpmap_qenter(vm_offset_t sva, vm_page_t *ma, int count) 1251145837Smlaier{ 1252145837Smlaier pt_entry_t *endpte, *pte; 1253145837Smlaier vm_paddr_t pa; 1254145837Smlaier vm_offset_t va = sva; 1255145837Smlaier int mclcount = 0; 1256145837Smlaier multicall_entry_t mcl[16]; 1257145837Smlaier multicall_entry_t *mclp = mcl; 1258145837Smlaier int error; 1259145837Smlaier 1260145837Smlaier CTR2(KTR_PMAP, "pmap_qenter:sva=0x%x count=%d", va, count); 1261145837Smlaier pte = vtopte(sva); 1262145837Smlaier endpte = pte + count; 1263145837Smlaier while (pte < endpte) { 1264145837Smlaier pa = xpmap_ptom(VM_PAGE_TO_PHYS(*ma)) | pgeflag | PG_RW | PG_V | PG_M | PG_A; 1265145837Smlaier 1266145837Smlaier mclp->op = __HYPERVISOR_update_va_mapping; 1267145837Smlaier mclp->args[0] = va; 1268145837Smlaier mclp->args[1] = (uint32_t)(pa & 0xffffffff); 1269145837Smlaier mclp->args[2] = (uint32_t)(pa >> 32); 1270145837Smlaier mclp->args[3] = (*pte & PG_V) ? UVMF_INVLPG|UVMF_ALL : 0; 1271145837Smlaier 1272145837Smlaier va += PAGE_SIZE; 1273145837Smlaier pte++; 1274145837Smlaier ma++; 1275145837Smlaier mclp++; 1276145837Smlaier mclcount++; 1277145837Smlaier if (mclcount == 16) { 1278145837Smlaier error = HYPERVISOR_multicall(mcl, mclcount); 1279145837Smlaier mclp = mcl; 1280145837Smlaier mclcount = 0; 1281145837Smlaier KASSERT(error == 0, ("bad multicall %d", error)); 1282145837Smlaier } 1283145837Smlaier } 1284145837Smlaier if (mclcount) { 1285145837Smlaier error = HYPERVISOR_multicall(mcl, mclcount); 1286145837Smlaier KASSERT(error == 0, ("bad multicall %d", error)); 1287145837Smlaier } 1288145837Smlaier 1289145837Smlaier#ifdef INVARIANTS 1290145837Smlaier for (pte = vtopte(sva), mclcount = 0; mclcount < count; mclcount++, pte++) 1291145837Smlaier KASSERT(*pte, ("pte not set for va=0x%x", sva + mclcount*PAGE_SIZE)); 1292145837Smlaier#endif 1293145837Smlaier} 1294145837Smlaier 1295145837Smlaier 1296145837Smlaier/* 1297145837Smlaier * This routine tears out page mappings from the 1298145837Smlaier * kernel -- it is meant only for temporary mappings. 1299145837Smlaier * Note: SMP coherent. Uses a ranged shootdown IPI. 1300145837Smlaier */ 1301145837Smlaiervoid 1302145837Smlaierpmap_qremove(vm_offset_t sva, int count) 1303145837Smlaier{ 1304145837Smlaier vm_offset_t va; 1305145837Smlaier 1306145837Smlaier CTR2(KTR_PMAP, "pmap_qremove: sva=0x%x count=%d", sva, count); 1307145837Smlaier va = sva; 1308145837Smlaier vm_page_lock_queues(); 1309145837Smlaier critical_enter(); 1310145837Smlaier while (count-- > 0) { 1311145837Smlaier pmap_kremove(va); 1312145837Smlaier va += PAGE_SIZE; 1313145837Smlaier } 1314145837Smlaier pmap_invalidate_range(kernel_pmap, sva, va); 1315145837Smlaier critical_exit(); 1316145837Smlaier vm_page_unlock_queues(); 1317145837Smlaier} 1318145837Smlaier 1319145837Smlaier/*************************************************** 1320145837Smlaier * Page table page management routines..... 1321145837Smlaier ***************************************************/ 1322145837Smlaierstatic __inline void 1323145837Smlaierpmap_free_zero_pages(vm_page_t free) 1324171172Smlaier{ 1325223637Sbz vm_page_t m; 1326223637Sbz 1327223637Sbz while (free != NULL) { 1328145837Smlaier m = free; 1329145837Smlaier free = m->right; 1330145837Smlaier vm_page_free_zero(m); 1331145837Smlaier } 1332145837Smlaier} 1333145837Smlaier 1334145837Smlaier/* 1335145837Smlaier * This routine unholds page table pages, and if the hold count 1336145837Smlaier * drops to zero, then it decrements the wire count. 1337145837Smlaier */ 1338145837Smlaierstatic __inline int 1339145837Smlaierpmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1340145837Smlaier{ 1341145837Smlaier 1342145837Smlaier --m->wire_count; 1343145837Smlaier if (m->wire_count == 0) 1344145837Smlaier return _pmap_unwire_pte_hold(pmap, m, free); 1345145837Smlaier else 1346145837Smlaier return 0; 1347145837Smlaier} 1348145837Smlaier 1349145837Smlaierstatic int 1350145837Smlaier_pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1351145837Smlaier{ 1352145837Smlaier vm_offset_t pteva; 1353145837Smlaier 1354145837Smlaier PT_UPDATES_FLUSH(); 1355145837Smlaier /* 1356145837Smlaier * unmap the page table page 1357145837Smlaier */ 1358145837Smlaier xen_pt_unpin(pmap->pm_pdir[m->pindex]); 1359145837Smlaier /* 1360145837Smlaier * page *might* contain residual mapping :-/ 1361145837Smlaier */ 1362145837Smlaier PD_CLEAR_VA(pmap, m->pindex, TRUE); 1363145837Smlaier pmap_zero_page(m); 1364145837Smlaier --pmap->pm_stats.resident_count; 1365145837Smlaier 1366145837Smlaier /* 1367145837Smlaier * This is a release store so that the ordinary store unmapping 1368145837Smlaier * the page table page is globally performed before TLB shoot- 1369145837Smlaier * down is begun. 1370145837Smlaier */ 1371145837Smlaier atomic_subtract_rel_int(&cnt.v_wire_count, 1); 1372145837Smlaier 1373145837Smlaier /* 1374145837Smlaier * Do an invltlb to make the invalidated mapping 1375145837Smlaier * take effect immediately. 1376145837Smlaier */ 1377145837Smlaier pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1378145837Smlaier pmap_invalidate_page(pmap, pteva); 1379145837Smlaier 1380145837Smlaier /* 1381145837Smlaier * Put page on a list so that it is released after 1382145837Smlaier * *ALL* TLB shootdown is done 1383145837Smlaier */ 1384145837Smlaier m->right = *free; 1385145837Smlaier *free = m; 1386145837Smlaier 1387145837Smlaier return 1; 1388145837Smlaier} 1389145837Smlaier 1390145837Smlaier/* 1391145837Smlaier * After removing a page table entry, this routine is used to 1392145837Smlaier * conditionally free the page, and manage the hold/wire counts. 1393145837Smlaier */ 1394145837Smlaierstatic int 1395145837Smlaierpmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free) 1396145837Smlaier{ 1397145837Smlaier pd_entry_t ptepde; 1398145837Smlaier vm_page_t mpte; 1399145837Smlaier 1400145837Smlaier if (va >= VM_MAXUSER_ADDRESS) 1401145837Smlaier return 0; 1402145837Smlaier ptepde = PT_GET(pmap_pde(pmap, va)); 1403145837Smlaier mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); 1404145837Smlaier return pmap_unwire_pte_hold(pmap, mpte, free); 1405145837Smlaier} 1406145837Smlaier 1407145837Smlaiervoid 1408145837Smlaierpmap_pinit0(pmap_t pmap) 1409145837Smlaier{ 1410145837Smlaier 1411145837Smlaier PMAP_LOCK_INIT(pmap); 1412145837Smlaier pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1413145837Smlaier#ifdef PAE 1414145837Smlaier pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1415145837Smlaier#endif 1416145837Smlaier pmap->pm_active = 0; 1417145837Smlaier PCPU_SET(curpmap, pmap); 1418145837Smlaier TAILQ_INIT(&pmap->pm_pvchunk); 1419145837Smlaier bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1420145837Smlaier mtx_lock_spin(&allpmaps_lock); 1421145837Smlaier LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1422145837Smlaier mtx_unlock_spin(&allpmaps_lock); 1423145837Smlaier} 1424145837Smlaier 1425171172Smlaier/* 1426171172Smlaier * Initialize a preallocated and zeroed pmap structure, 1427145837Smlaier * such as one in a vmspace structure. 1428145837Smlaier */ 1429171172Smlaierint 1430223637Sbzpmap_pinit(pmap_t pmap) 1431171172Smlaier{ 1432171172Smlaier vm_page_t m, ptdpg[NPGPTD + 1]; 1433171172Smlaier int npgptd = NPGPTD + 1; 1434171172Smlaier static int color; 1435171172Smlaier int i; 1436171172Smlaier 1437171172Smlaier PMAP_LOCK_INIT(pmap); 1438171172Smlaier 1439171172Smlaier /* 1440171172Smlaier * No need to allocate page table space yet but we do need a valid 1441171172Smlaier * page directory table. 1442171172Smlaier */ 1443171172Smlaier if (pmap->pm_pdir == NULL) { 1444171172Smlaier pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1445171172Smlaier NBPTD); 1446171172Smlaier if (pmap->pm_pdir == NULL) { 1447171172Smlaier PMAP_LOCK_DESTROY(pmap); 1448171172Smlaier return (0); 1449171172Smlaier } 1450145837Smlaier#if defined(XEN) && defined(PAE) 1451145837Smlaier pmap->pm_pdpt = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1); 1452171172Smlaier#endif 1453145837Smlaier 1454145837Smlaier#if defined(PAE) && !defined(XEN) 1455145837Smlaier pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO); 1456145837Smlaier KASSERT(((vm_offset_t)pmap->pm_pdpt & 1457145837Smlaier ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0, 1458145837Smlaier ("pmap_pinit: pdpt misaligned")); 1459145837Smlaier KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30), 1460145837Smlaier ("pmap_pinit: pdpt above 4g")); 1461145837Smlaier#endif 1462145837Smlaier } 1463145837Smlaier 1464145837Smlaier /* 1465145837Smlaier * allocate the page directory page(s) 1466145837Smlaier */ 1467145837Smlaier for (i = 0; i < npgptd;) { 1468145837Smlaier m = vm_page_alloc(NULL, color++, 1469145837Smlaier VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1470145837Smlaier VM_ALLOC_ZERO); 1471145837Smlaier if (m == NULL) 1472145837Smlaier VM_WAIT; 1473145837Smlaier else { 1474145837Smlaier ptdpg[i++] = m; 1475145837Smlaier } 1476145837Smlaier } 1477145837Smlaier pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1478145837Smlaier for (i = 0; i < NPGPTD; i++) { 1479145837Smlaier if ((ptdpg[i]->flags & PG_ZERO) == 0) 1480145837Smlaier pagezero(&pmap->pm_pdir[i*NPTEPG]); 1481145837Smlaier } 1482145837Smlaier 1483145837Smlaier mtx_lock_spin(&allpmaps_lock); 1484145837Smlaier LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1485145837Smlaier mtx_unlock_spin(&allpmaps_lock); 1486145837Smlaier /* Wire in kernel global address entries. */ 1487145837Smlaier 1488145837Smlaier bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1489145837Smlaier#ifdef PAE 1490145837Smlaier#ifdef XEN 1491145837Smlaier pmap_qenter((vm_offset_t)pmap->pm_pdpt, &ptdpg[NPGPTD], 1); 1492145837Smlaier if ((ptdpg[NPGPTD]->flags & PG_ZERO) == 0) 1493145837Smlaier bzero(pmap->pm_pdpt, PAGE_SIZE); 1494145837Smlaier#endif 1495145837Smlaier for (i = 0; i < NPGPTD; i++) { 1496171172Smlaier vm_paddr_t ma; 1497171172Smlaier 1498171172Smlaier ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1499171172Smlaier pmap->pm_pdpt[i] = ma | PG_V; 1500171172Smlaier 1501171172Smlaier } 1502171172Smlaier#endif 1503171172Smlaier#ifdef XEN 1504171172Smlaier for (i = 0; i < NPGPTD; i++) { 1505171172Smlaier pt_entry_t *pd; 1506171172Smlaier vm_paddr_t ma; 1507171172Smlaier 1508171172Smlaier ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1509171172Smlaier pd = pmap->pm_pdir + (i * NPDEPG); 1510171172Smlaier PT_SET_MA(pd, *vtopte((vm_offset_t)pd) & ~(PG_M|PG_A|PG_U|PG_RW)); 1511171172Smlaier#if 0 1512171172Smlaier xen_pgd_pin(ma); 1513171172Smlaier#endif 1514145837Smlaier } 1515145837Smlaier 1516145837Smlaier#ifdef PAE 1517145837Smlaier PT_SET_MA(pmap->pm_pdpt, *vtopte((vm_offset_t)pmap->pm_pdpt) & ~PG_RW); 1518145837Smlaier#endif 1519145837Smlaier vm_page_lock_queues(); 1520145837Smlaier xen_flush_queue(); 1521145837Smlaier xen_pgdpt_pin(xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[NPGPTD]))); 1522145837Smlaier for (i = 0; i < NPGPTD; i++) { 1523145837Smlaier vm_paddr_t ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1524145837Smlaier PT_SET_VA_MA(&pmap->pm_pdir[PTDPTDI + i], ma | PG_V | PG_A, FALSE); 1525145837Smlaier } 1526145837Smlaier xen_flush_queue(); 1527145837Smlaier vm_page_unlock_queues(); 1528145837Smlaier#endif 1529145837Smlaier pmap->pm_active = 0; 1530145837Smlaier TAILQ_INIT(&pmap->pm_pvchunk); 1531145837Smlaier bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1532145837Smlaier 1533145837Smlaier return (1); 1534145837Smlaier} 1535145837Smlaier 1536145837Smlaier/* 1537145837Smlaier * this routine is called if the page table page is not 1538145837Smlaier * mapped correctly. 1539145837Smlaier */ 1540145837Smlaierstatic vm_page_t 1541145837Smlaier_pmap_allocpte(pmap_t pmap, unsigned int ptepindex, int flags) 1542145837Smlaier{ 1543145837Smlaier vm_paddr_t ptema; 1544145837Smlaier vm_page_t m; 1545145837Smlaier 1546145837Smlaier KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1547145837Smlaier (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1548145837Smlaier ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1549145837Smlaier 1550145837Smlaier /* 1551145837Smlaier * Allocate a page table page. 1552145837Smlaier */ 1553145837Smlaier if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1554145837Smlaier VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1555145837Smlaier if (flags & M_WAITOK) { 1556145837Smlaier PMAP_UNLOCK(pmap); 1557145837Smlaier vm_page_unlock_queues(); 1558145837Smlaier VM_WAIT; 1559145837Smlaier vm_page_lock_queues(); 1560145837Smlaier PMAP_LOCK(pmap); 1561145837Smlaier } 1562145837Smlaier 1563145837Smlaier /* 1564145837Smlaier * Indicate the need to retry. While waiting, the page table 1565145837Smlaier * page may have been allocated. 1566145837Smlaier */ 1567145837Smlaier return (NULL); 1568145837Smlaier } 1569145837Smlaier if ((m->flags & PG_ZERO) == 0) 1570145837Smlaier pmap_zero_page(m); 1571145837Smlaier 1572145837Smlaier /* 1573145837Smlaier * Map the pagetable page into the process address space, if 1574145837Smlaier * it isn't already there. 1575145837Smlaier */ 1576145837Smlaier pmap->pm_stats.resident_count++; 1577145837Smlaier 1578145837Smlaier ptema = xpmap_ptom(VM_PAGE_TO_PHYS(m)); 1579145837Smlaier xen_pt_pin(ptema); 1580145837Smlaier PT_SET_VA_MA(&pmap->pm_pdir[ptepindex], 1581145837Smlaier (ptema | PG_U | PG_RW | PG_V | PG_A | PG_M), TRUE); 1582145837Smlaier 1583145837Smlaier KASSERT(pmap->pm_pdir[ptepindex], 1584145837Smlaier ("_pmap_allocpte: ptepindex=%d did not get mapped", ptepindex)); 1585145837Smlaier return (m); 1586145837Smlaier} 1587145837Smlaier 1588145837Smlaierstatic vm_page_t 1589145837Smlaierpmap_allocpte(pmap_t pmap, vm_offset_t va, int flags) 1590145837Smlaier{ 1591145837Smlaier unsigned ptepindex; 1592145837Smlaier pd_entry_t ptema; 1593145837Smlaier vm_page_t m; 1594145837Smlaier 1595145837Smlaier KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1596145837Smlaier (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1597145837Smlaier ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1598145837Smlaier 1599145837Smlaier /* 1600145837Smlaier * Calculate pagetable page index 1601145837Smlaier */ 1602145837Smlaier ptepindex = va >> PDRSHIFT; 1603145837Smlaierretry: 1604145837Smlaier /* 1605145837Smlaier * Get the page directory entry 1606145837Smlaier */ 1607145837Smlaier ptema = pmap->pm_pdir[ptepindex]; 1608145837Smlaier 1609145837Smlaier /* 1610145837Smlaier * This supports switching from a 4MB page to a 1611145837Smlaier * normal 4K page. 1612145837Smlaier */ 1613145837Smlaier if (ptema & PG_PS) { 1614145837Smlaier /* 1615145837Smlaier * XXX 1616145837Smlaier */ 1617145837Smlaier pmap->pm_pdir[ptepindex] = 0; 1618145837Smlaier ptema = 0; 1619145837Smlaier pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1620145837Smlaier pmap_invalidate_all(kernel_pmap); 1621145837Smlaier } 1622145837Smlaier 1623145837Smlaier /* 1624145837Smlaier * If the page table page is mapped, we just increment the 1625145837Smlaier * hold count, and activate it. 1626145837Smlaier */ 1627145837Smlaier if (ptema & PG_V) { 1628145837Smlaier m = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME); 1629145837Smlaier m->wire_count++; 1630145837Smlaier } else { 1631145837Smlaier /* 1632145837Smlaier * Here if the pte page isn't mapped, or if it has 1633145837Smlaier * been deallocated. 1634145837Smlaier */ 1635145837Smlaier CTR3(KTR_PMAP, "pmap_allocpte: pmap=%p va=0x%08x flags=0x%x", 1636145837Smlaier pmap, va, flags); 1637145837Smlaier m = _pmap_allocpte(pmap, ptepindex, flags); 1638145837Smlaier if (m == NULL && (flags & M_WAITOK)) 1639145837Smlaier goto retry; 1640145837Smlaier 1641145837Smlaier KASSERT(pmap->pm_pdir[ptepindex], ("ptepindex=%d did not get mapped", ptepindex)); 1642145837Smlaier } 1643145837Smlaier return (m); 1644145837Smlaier} 1645145837Smlaier 1646145837Smlaier 1647145837Smlaier/*************************************************** 1648145837Smlaier* Pmap allocation/deallocation routines. 1649145837Smlaier ***************************************************/ 1650145837Smlaier 1651145837Smlaier#ifdef SMP 1652145837Smlaier/* 1653145837Smlaier * Deal with a SMP shootdown of other users of the pmap that we are 1654145837Smlaier * trying to dispose of. This can be a bit hairy. 1655145837Smlaier */ 1656static u_int *lazymask; 1657static u_int lazyptd; 1658static volatile u_int lazywait; 1659 1660void pmap_lazyfix_action(void); 1661 1662void 1663pmap_lazyfix_action(void) 1664{ 1665 u_int mymask = PCPU_GET(cpumask); 1666 1667#ifdef COUNT_IPIS 1668 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++; 1669#endif 1670 if (rcr3() == lazyptd) 1671 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1672 atomic_clear_int(lazymask, mymask); 1673 atomic_store_rel_int(&lazywait, 1); 1674} 1675 1676static void 1677pmap_lazyfix_self(u_int mymask) 1678{ 1679 1680 if (rcr3() == lazyptd) 1681 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1682 atomic_clear_int(lazymask, mymask); 1683} 1684 1685 1686static void 1687pmap_lazyfix(pmap_t pmap) 1688{ 1689 u_int mymask; 1690 u_int mask; 1691 u_int spins; 1692 1693 while ((mask = pmap->pm_active) != 0) { 1694 spins = 50000000; 1695 mask = mask & -mask; /* Find least significant set bit */ 1696 mtx_lock_spin(&smp_ipi_mtx); 1697#ifdef PAE 1698 lazyptd = vtophys(pmap->pm_pdpt); 1699#else 1700 lazyptd = vtophys(pmap->pm_pdir); 1701#endif 1702 mymask = PCPU_GET(cpumask); 1703 if (mask == mymask) { 1704 lazymask = &pmap->pm_active; 1705 pmap_lazyfix_self(mymask); 1706 } else { 1707 atomic_store_rel_int((u_int *)&lazymask, 1708 (u_int)&pmap->pm_active); 1709 atomic_store_rel_int(&lazywait, 0); 1710 ipi_selected(mask, IPI_LAZYPMAP); 1711 while (lazywait == 0) { 1712 ia32_pause(); 1713 if (--spins == 0) 1714 break; 1715 } 1716 } 1717 mtx_unlock_spin(&smp_ipi_mtx); 1718 if (spins == 0) 1719 printf("pmap_lazyfix: spun for 50000000\n"); 1720 } 1721} 1722 1723#else /* SMP */ 1724 1725/* 1726 * Cleaning up on uniprocessor is easy. For various reasons, we're 1727 * unlikely to have to even execute this code, including the fact 1728 * that the cleanup is deferred until the parent does a wait(2), which 1729 * means that another userland process has run. 1730 */ 1731static void 1732pmap_lazyfix(pmap_t pmap) 1733{ 1734 u_int cr3; 1735 1736 cr3 = vtophys(pmap->pm_pdir); 1737 if (cr3 == rcr3()) { 1738 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1739 pmap->pm_active &= ~(PCPU_GET(cpumask)); 1740 } 1741} 1742#endif /* SMP */ 1743 1744/* 1745 * Release any resources held by the given physical map. 1746 * Called when a pmap initialized by pmap_pinit is being released. 1747 * Should only be called if the map contains no valid mappings. 1748 */ 1749void 1750pmap_release(pmap_t pmap) 1751{ 1752 vm_page_t m, ptdpg[2*NPGPTD+1]; 1753 vm_paddr_t ma; 1754 int i; 1755#ifdef XEN 1756#ifdef PAE 1757 int npgptd = NPGPTD + 1; 1758#else 1759 int npgptd = NPGPTD; 1760#endif 1761#else 1762 int npgptd = NPGPTD; 1763#endif 1764 KASSERT(pmap->pm_stats.resident_count == 0, 1765 ("pmap_release: pmap resident count %ld != 0", 1766 pmap->pm_stats.resident_count)); 1767 PT_UPDATES_FLUSH(); 1768 1769 pmap_lazyfix(pmap); 1770 mtx_lock_spin(&allpmaps_lock); 1771 LIST_REMOVE(pmap, pm_list); 1772 mtx_unlock_spin(&allpmaps_lock); 1773 1774 for (i = 0; i < NPGPTD; i++) 1775 ptdpg[i] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdir + (i*NPDEPG)) & PG_FRAME); 1776 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1777#if defined(PAE) && defined(XEN) 1778 ptdpg[NPGPTD] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdpt)); 1779#endif 1780 1781 for (i = 0; i < npgptd; i++) { 1782 m = ptdpg[i]; 1783 ma = xpmap_ptom(VM_PAGE_TO_PHYS(m)); 1784 /* unpinning L1 and L2 treated the same */ 1785 xen_pgd_unpin(ma); 1786#ifdef PAE 1787 KASSERT(xpmap_ptom(VM_PAGE_TO_PHYS(m)) == (pmap->pm_pdpt[i] & PG_FRAME), 1788 ("pmap_release: got wrong ptd page")); 1789#endif 1790 m->wire_count--; 1791 atomic_subtract_int(&cnt.v_wire_count, 1); 1792 vm_page_free(m); 1793 } 1794 PMAP_LOCK_DESTROY(pmap); 1795} 1796 1797static int 1798kvm_size(SYSCTL_HANDLER_ARGS) 1799{ 1800 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1801 1802 return sysctl_handle_long(oidp, &ksize, 0, req); 1803} 1804SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1805 0, 0, kvm_size, "IU", "Size of KVM"); 1806 1807static int 1808kvm_free(SYSCTL_HANDLER_ARGS) 1809{ 1810 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1811 1812 return sysctl_handle_long(oidp, &kfree, 0, req); 1813} 1814SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1815 0, 0, kvm_free, "IU", "Amount of KVM free"); 1816 1817/* 1818 * grow the number of kernel page table entries, if needed 1819 */ 1820void 1821pmap_growkernel(vm_offset_t addr) 1822{ 1823 struct pmap *pmap; 1824 vm_paddr_t ptppaddr; 1825 vm_page_t nkpg; 1826 pd_entry_t newpdir; 1827 1828 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1829 if (kernel_vm_end == 0) { 1830 kernel_vm_end = KERNBASE; 1831 nkpt = 0; 1832 while (pdir_pde(PTD, kernel_vm_end)) { 1833 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1834 nkpt++; 1835 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1836 kernel_vm_end = kernel_map->max_offset; 1837 break; 1838 } 1839 } 1840 } 1841 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1842 if (addr - 1 >= kernel_map->max_offset) 1843 addr = kernel_map->max_offset; 1844 while (kernel_vm_end < addr) { 1845 if (pdir_pde(PTD, kernel_vm_end)) { 1846 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1847 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1848 kernel_vm_end = kernel_map->max_offset; 1849 break; 1850 } 1851 continue; 1852 } 1853 1854 /* 1855 * This index is bogus, but out of the way 1856 */ 1857 nkpg = vm_page_alloc(NULL, nkpt, 1858 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1859 if (!nkpg) 1860 panic("pmap_growkernel: no memory to grow kernel"); 1861 1862 nkpt++; 1863 1864 pmap_zero_page(nkpg); 1865 ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1866 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1867 PD_SET_VA(kernel_pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE); 1868 1869 mtx_lock_spin(&allpmaps_lock); 1870 LIST_FOREACH(pmap, &allpmaps, pm_list) 1871 PD_SET_VA(pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE); 1872 1873 mtx_unlock_spin(&allpmaps_lock); 1874 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1875 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1876 kernel_vm_end = kernel_map->max_offset; 1877 break; 1878 } 1879 } 1880} 1881 1882 1883/*************************************************** 1884 * page management routines. 1885 ***************************************************/ 1886 1887CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE); 1888CTASSERT(_NPCM == 11); 1889 1890static __inline struct pv_chunk * 1891pv_to_chunk(pv_entry_t pv) 1892{ 1893 1894 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK); 1895} 1896 1897#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap) 1898 1899#define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */ 1900#define PC_FREE10 0x0000fffful /* Free values for index 10 */ 1901 1902static uint32_t pc_freemask[11] = { 1903 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1904 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1905 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1906 PC_FREE0_9, PC_FREE10 1907}; 1908 1909SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0, 1910 "Current number of pv entries"); 1911 1912#ifdef PV_STATS 1913static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail; 1914 1915SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0, 1916 "Current number of pv entry chunks"); 1917SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0, 1918 "Current number of pv entry chunks allocated"); 1919SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0, 1920 "Current number of pv entry chunks frees"); 1921SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0, 1922 "Number of times tried to get a chunk page but failed."); 1923 1924static long pv_entry_frees, pv_entry_allocs; 1925static int pv_entry_spare; 1926 1927SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0, 1928 "Current number of pv entry frees"); 1929SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0, 1930 "Current number of pv entry allocs"); 1931SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0, 1932 "Current number of spare pv entries"); 1933 1934static int pmap_collect_inactive, pmap_collect_active; 1935 1936SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0, 1937 "Current number times pmap_collect called on inactive queue"); 1938SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0, 1939 "Current number times pmap_collect called on active queue"); 1940#endif 1941 1942/* 1943 * We are in a serious low memory condition. Resort to 1944 * drastic measures to free some pages so we can allocate 1945 * another pv entry chunk. This is normally called to 1946 * unmap inactive pages, and if necessary, active pages. 1947 */ 1948static void 1949pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq) 1950{ 1951 pmap_t pmap; 1952 pt_entry_t *pte, tpte; 1953 pv_entry_t next_pv, pv; 1954 vm_offset_t va; 1955 vm_page_t m, free; 1956 1957 sched_pin(); 1958 TAILQ_FOREACH(m, &vpq->pl, pageq) { 1959 if (m->hold_count || m->busy) 1960 continue; 1961 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) { 1962 va = pv->pv_va; 1963 pmap = PV_PMAP(pv); 1964 /* Avoid deadlock and lock recursion. */ 1965 if (pmap > locked_pmap) 1966 PMAP_LOCK(pmap); 1967 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) 1968 continue; 1969 pmap->pm_stats.resident_count--; 1970 pte = pmap_pte_quick(pmap, va); 1971 tpte = pte_load_clear(pte); 1972 KASSERT((tpte & PG_W) == 0, 1973 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte)); 1974 if (tpte & PG_A) 1975 vm_page_flag_set(m, PG_REFERENCED); 1976 if (tpte & PG_M) { 1977 KASSERT((tpte & PG_RW), 1978 ("pmap_collect: modified page not writable: va: %#x, pte: %#jx", 1979 va, (uintmax_t)tpte)); 1980 vm_page_dirty(m); 1981 } 1982 free = NULL; 1983 pmap_unuse_pt(pmap, va, &free); 1984 pmap_invalidate_page(pmap, va); 1985 pmap_free_zero_pages(free); 1986 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1987 if (TAILQ_EMPTY(&m->md.pv_list)) 1988 vm_page_flag_clear(m, PG_WRITEABLE); 1989 free_pv_entry(pmap, pv); 1990 if (pmap != locked_pmap) 1991 PMAP_UNLOCK(pmap); 1992 } 1993 } 1994 sched_unpin(); 1995} 1996 1997 1998/* 1999 * free the pv_entry back to the free list 2000 */ 2001static void 2002free_pv_entry(pmap_t pmap, pv_entry_t pv) 2003{ 2004 vm_page_t m; 2005 struct pv_chunk *pc; 2006 int idx, field, bit; 2007 2008 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2009 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2010 PV_STAT(pv_entry_frees++); 2011 PV_STAT(pv_entry_spare++); 2012 pv_entry_count--; 2013 pc = pv_to_chunk(pv); 2014 idx = pv - &pc->pc_pventry[0]; 2015 field = idx / 32; 2016 bit = idx % 32; 2017 pc->pc_map[field] |= 1ul << bit; 2018 /* move to head of list */ 2019 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2020 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2021 for (idx = 0; idx < _NPCM; idx++) 2022 if (pc->pc_map[idx] != pc_freemask[idx]) 2023 return; 2024 PV_STAT(pv_entry_spare -= _NPCPV); 2025 PV_STAT(pc_chunk_count--); 2026 PV_STAT(pc_chunk_frees++); 2027 /* entire chunk is free, return it */ 2028 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2029 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 2030 pmap_qremove((vm_offset_t)pc, 1); 2031 vm_page_unwire(m, 0); 2032 vm_page_free(m); 2033 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 2034} 2035 2036/* 2037 * get a new pv_entry, allocating a block from the system 2038 * when needed. 2039 */ 2040static pv_entry_t 2041get_pv_entry(pmap_t pmap, int try) 2042{ 2043 static const struct timeval printinterval = { 60, 0 }; 2044 static struct timeval lastprint; 2045 static vm_pindex_t colour; 2046 struct vpgqueues *pq; 2047 int bit, field; 2048 pv_entry_t pv; 2049 struct pv_chunk *pc; 2050 vm_page_t m; 2051 2052 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2053 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2054 PV_STAT(pv_entry_allocs++); 2055 pv_entry_count++; 2056 if (pv_entry_count > pv_entry_high_water) 2057 if (ratecheck(&lastprint, &printinterval)) 2058 printf("Approaching the limit on PV entries, consider " 2059 "increasing either the vm.pmap.shpgperproc or the " 2060 "vm.pmap.pv_entry_max tunable.\n"); 2061 pq = NULL; 2062retry: 2063 pc = TAILQ_FIRST(&pmap->pm_pvchunk); 2064 if (pc != NULL) { 2065 for (field = 0; field < _NPCM; field++) { 2066 if (pc->pc_map[field]) { 2067 bit = bsfl(pc->pc_map[field]); 2068 break; 2069 } 2070 } 2071 if (field < _NPCM) { 2072 pv = &pc->pc_pventry[field * 32 + bit]; 2073 pc->pc_map[field] &= ~(1ul << bit); 2074 /* If this was the last item, move it to tail */ 2075 for (field = 0; field < _NPCM; field++) 2076 if (pc->pc_map[field] != 0) { 2077 PV_STAT(pv_entry_spare--); 2078 return (pv); /* not full, return */ 2079 } 2080 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2081 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); 2082 PV_STAT(pv_entry_spare--); 2083 return (pv); 2084 } 2085 } 2086 /* 2087 * Access to the ptelist "pv_vafree" is synchronized by the page 2088 * queues lock. If "pv_vafree" is currently non-empty, it will 2089 * remain non-empty until pmap_ptelist_alloc() completes. 2090 */ 2091 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq == 2092 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) | 2093 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) { 2094 if (try) { 2095 pv_entry_count--; 2096 PV_STAT(pc_chunk_tryfail++); 2097 return (NULL); 2098 } 2099 /* 2100 * Reclaim pv entries: At first, destroy mappings to 2101 * inactive pages. After that, if a pv chunk entry 2102 * is still needed, destroy mappings to active pages. 2103 */ 2104 if (pq == NULL) { 2105 PV_STAT(pmap_collect_inactive++); 2106 pq = &vm_page_queues[PQ_INACTIVE]; 2107 } else if (pq == &vm_page_queues[PQ_INACTIVE]) { 2108 PV_STAT(pmap_collect_active++); 2109 pq = &vm_page_queues[PQ_ACTIVE]; 2110 } else 2111 panic("get_pv_entry: increase vm.pmap.shpgperproc"); 2112 pmap_collect(pmap, pq); 2113 goto retry; 2114 } 2115 PV_STAT(pc_chunk_count++); 2116 PV_STAT(pc_chunk_allocs++); 2117 colour++; 2118 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 2119 pmap_qenter((vm_offset_t)pc, &m, 1); 2120 if ((m->flags & PG_ZERO) == 0) 2121 pagezero(pc); 2122 pc->pc_pmap = pmap; 2123 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */ 2124 for (field = 1; field < _NPCM; field++) 2125 pc->pc_map[field] = pc_freemask[field]; 2126 pv = &pc->pc_pventry[0]; 2127 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2128 PV_STAT(pv_entry_spare += _NPCPV - 1); 2129 return (pv); 2130} 2131 2132static void 2133pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 2134{ 2135 pv_entry_t pv; 2136 2137 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2138 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2139 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2140 if (pmap == PV_PMAP(pv) && va == pv->pv_va) 2141 break; 2142 } 2143 KASSERT(pv != NULL, ("pmap_remove_entry: pv not found")); 2144 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2145 if (TAILQ_EMPTY(&m->md.pv_list)) 2146 vm_page_flag_clear(m, PG_WRITEABLE); 2147 free_pv_entry(pmap, pv); 2148} 2149 2150/* 2151 * Create a pv entry for page at pa for 2152 * (pmap, va). 2153 */ 2154static void 2155pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2156{ 2157 pv_entry_t pv; 2158 2159 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2160 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2161 pv = get_pv_entry(pmap, FALSE); 2162 pv->pv_va = va; 2163 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2164} 2165 2166/* 2167 * Conditionally create a pv entry. 2168 */ 2169static boolean_t 2170pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2171{ 2172 pv_entry_t pv; 2173 2174 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2175 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2176 if (pv_entry_count < pv_entry_high_water && 2177 (pv = get_pv_entry(pmap, TRUE)) != NULL) { 2178 pv->pv_va = va; 2179 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2180 return (TRUE); 2181 } else 2182 return (FALSE); 2183} 2184 2185/* 2186 * pmap_remove_pte: do the things to unmap a page in a process 2187 */ 2188static int 2189pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free) 2190{ 2191 pt_entry_t oldpte; 2192 vm_page_t m; 2193 2194 CTR3(KTR_PMAP, "pmap_remove_pte: pmap=%p *ptq=0x%x va=0x%x", 2195 pmap, (u_long)*ptq, va); 2196 2197 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2198 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2199 oldpte = *ptq; 2200 PT_SET_VA_MA(ptq, 0, TRUE); 2201 if (oldpte & PG_W) 2202 pmap->pm_stats.wired_count -= 1; 2203 /* 2204 * Machines that don't support invlpg, also don't support 2205 * PG_G. 2206 */ 2207 if (oldpte & PG_G) 2208 pmap_invalidate_page(kernel_pmap, va); 2209 pmap->pm_stats.resident_count -= 1; 2210 /* 2211 * XXX This is not strictly correctly, but somewhere along the line 2212 * we are losing the managed bit on some pages. It is unclear to me 2213 * why, but I think the most likely explanation is that xen's writable 2214 * page table implementation doesn't respect the unused bits. 2215 */ 2216 if ((oldpte & PG_MANAGED) || ((oldpte & PG_V) && (va < VM_MAXUSER_ADDRESS)) 2217 ) { 2218 m = PHYS_TO_VM_PAGE(xpmap_mtop(oldpte) & PG_FRAME); 2219 2220 if (!(oldpte & PG_MANAGED)) 2221 printf("va=0x%x is unmanaged :-( pte=0x%llx\n", va, oldpte); 2222 2223 if (oldpte & PG_M) { 2224 KASSERT((oldpte & PG_RW), 2225 ("pmap_remove_pte: modified page not writable: va: %#x, pte: %#jx", 2226 va, (uintmax_t)oldpte)); 2227 vm_page_dirty(m); 2228 } 2229 if (oldpte & PG_A) 2230 vm_page_flag_set(m, PG_REFERENCED); 2231 pmap_remove_entry(pmap, m, va); 2232 } else if ((va < VM_MAXUSER_ADDRESS) && (oldpte & PG_V)) 2233 printf("va=0x%x is unmanaged :-( pte=0x%llx\n", va, oldpte); 2234 2235 return (pmap_unuse_pt(pmap, va, free)); 2236} 2237 2238/* 2239 * Remove a single page from a process address space 2240 */ 2241static void 2242pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free) 2243{ 2244 pt_entry_t *pte; 2245 2246 CTR2(KTR_PMAP, "pmap_remove_page: pmap=%p va=0x%x", 2247 pmap, va); 2248 2249 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2250 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 2251 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2252 if ((pte = pmap_pte_quick(pmap, va)) == NULL || (*pte & PG_V) == 0) 2253 return; 2254 pmap_remove_pte(pmap, pte, va, free); 2255 pmap_invalidate_page(pmap, va); 2256 if (*PMAP1) 2257 PT_SET_MA(PADDR1, 0); 2258 2259} 2260 2261/* 2262 * Remove the given range of addresses from the specified map. 2263 * 2264 * It is assumed that the start and end are properly 2265 * rounded to the page size. 2266 */ 2267void 2268pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 2269{ 2270 vm_offset_t pdnxt; 2271 pd_entry_t ptpaddr; 2272 pt_entry_t *pte; 2273 vm_page_t free = NULL; 2274 int anyvalid; 2275 2276 CTR3(KTR_PMAP, "pmap_remove: pmap=%p sva=0x%x eva=0x%x", 2277 pmap, sva, eva); 2278 2279 /* 2280 * Perform an unsynchronized read. This is, however, safe. 2281 */ 2282 if (pmap->pm_stats.resident_count == 0) 2283 return; 2284 2285 anyvalid = 0; 2286 2287 vm_page_lock_queues(); 2288 sched_pin(); 2289 PMAP_LOCK(pmap); 2290 2291 /* 2292 * special handling of removing one page. a very 2293 * common operation and easy to short circuit some 2294 * code. 2295 */ 2296 if ((sva + PAGE_SIZE == eva) && 2297 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 2298 pmap_remove_page(pmap, sva, &free); 2299 goto out; 2300 } 2301 2302 for (; sva < eva; sva = pdnxt) { 2303 unsigned pdirindex; 2304 2305 /* 2306 * Calculate index for next page table. 2307 */ 2308 pdnxt = (sva + NBPDR) & ~PDRMASK; 2309 if (pmap->pm_stats.resident_count == 0) 2310 break; 2311 2312 pdirindex = sva >> PDRSHIFT; 2313 ptpaddr = pmap->pm_pdir[pdirindex]; 2314 2315 /* 2316 * Weed out invalid mappings. Note: we assume that the page 2317 * directory table is always allocated, and in kernel virtual. 2318 */ 2319 if (ptpaddr == 0) 2320 continue; 2321 2322 /* 2323 * Check for large page. 2324 */ 2325 if ((ptpaddr & PG_PS) != 0) { 2326 PD_CLEAR_VA(pmap, pdirindex, TRUE); 2327 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 2328 anyvalid = 1; 2329 continue; 2330 } 2331 2332 /* 2333 * Limit our scan to either the end of the va represented 2334 * by the current page table page, or to the end of the 2335 * range being removed. 2336 */ 2337 if (pdnxt > eva) 2338 pdnxt = eva; 2339 2340 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2341 sva += PAGE_SIZE) { 2342 if ((*pte & PG_V) == 0) 2343 continue; 2344 2345 /* 2346 * The TLB entry for a PG_G mapping is invalidated 2347 * by pmap_remove_pte(). 2348 */ 2349 if ((*pte & PG_G) == 0) 2350 anyvalid = 1; 2351 if (pmap_remove_pte(pmap, pte, sva, &free)) 2352 break; 2353 } 2354 } 2355 PT_UPDATES_FLUSH(); 2356 if (*PMAP1) 2357 PT_SET_VA_MA(PMAP1, 0, TRUE); 2358out: 2359 if (anyvalid) 2360 pmap_invalidate_all(pmap); 2361 sched_unpin(); 2362 vm_page_unlock_queues(); 2363 PMAP_UNLOCK(pmap); 2364 pmap_free_zero_pages(free); 2365} 2366 2367/* 2368 * Routine: pmap_remove_all 2369 * Function: 2370 * Removes this physical page from 2371 * all physical maps in which it resides. 2372 * Reflects back modify bits to the pager. 2373 * 2374 * Notes: 2375 * Original versions of this routine were very 2376 * inefficient because they iteratively called 2377 * pmap_remove (slow...) 2378 */ 2379 2380void 2381pmap_remove_all(vm_page_t m) 2382{ 2383 pv_entry_t pv; 2384 pmap_t pmap; 2385 pt_entry_t *pte, tpte; 2386 vm_page_t free; 2387 2388#if defined(PMAP_DIAGNOSTIC) 2389 /* 2390 * XXX This makes pmap_remove_all() illegal for non-managed pages! 2391 */ 2392 if (m->flags & PG_FICTITIOUS) { 2393 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%jx", 2394 VM_PAGE_TO_PHYS(m) & 0xffffffff); 2395 } 2396#endif 2397 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2398 sched_pin(); 2399 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2400 pmap = PV_PMAP(pv); 2401 PMAP_LOCK(pmap); 2402 pmap->pm_stats.resident_count--; 2403 pte = pmap_pte_quick(pmap, pv->pv_va); 2404 2405 tpte = *pte; 2406 PT_SET_VA_MA(pte, 0, TRUE); 2407 if (tpte & PG_W) 2408 pmap->pm_stats.wired_count--; 2409 if (tpte & PG_A) 2410 vm_page_flag_set(m, PG_REFERENCED); 2411 2412 /* 2413 * Update the vm_page_t clean and reference bits. 2414 */ 2415 if (tpte & PG_M) { 2416 KASSERT((tpte & PG_RW), 2417 ("pmap_remove_all: modified page not writable: va: %#x, pte: %#jx", 2418 pv->pv_va, (uintmax_t)tpte)); 2419 vm_page_dirty(m); 2420 } 2421 free = NULL; 2422 pmap_unuse_pt(pmap, pv->pv_va, &free); 2423 pmap_invalidate_page(pmap, pv->pv_va); 2424 pmap_free_zero_pages(free); 2425 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2426 free_pv_entry(pmap, pv); 2427 PMAP_UNLOCK(pmap); 2428 } 2429 vm_page_flag_clear(m, PG_WRITEABLE); 2430 PT_UPDATES_FLUSH(); 2431 if (*PMAP1) 2432 PT_SET_MA(PADDR1, 0); 2433 sched_unpin(); 2434} 2435 2436/* 2437 * Set the physical protection on the 2438 * specified range of this map as requested. 2439 */ 2440void 2441pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 2442{ 2443 vm_offset_t pdnxt; 2444 pd_entry_t ptpaddr; 2445 pt_entry_t *pte; 2446 int anychanged; 2447 2448 CTR4(KTR_PMAP, "pmap_protect: pmap=%p sva=0x%x eva=0x%x prot=0x%x", 2449 pmap, sva, eva, prot); 2450 2451 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 2452 pmap_remove(pmap, sva, eva); 2453 return; 2454 } 2455 2456#ifdef PAE 2457 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) == 2458 (VM_PROT_WRITE|VM_PROT_EXECUTE)) 2459 return; 2460#else 2461 if (prot & VM_PROT_WRITE) 2462 return; 2463#endif 2464 2465 anychanged = 0; 2466 2467 vm_page_lock_queues(); 2468 sched_pin(); 2469 PMAP_LOCK(pmap); 2470 for (; sva < eva; sva = pdnxt) { 2471 pt_entry_t obits, pbits; 2472 unsigned pdirindex; 2473 2474 pdnxt = (sva + NBPDR) & ~PDRMASK; 2475 2476 pdirindex = sva >> PDRSHIFT; 2477 ptpaddr = pmap->pm_pdir[pdirindex]; 2478 2479 /* 2480 * Weed out invalid mappings. Note: we assume that the page 2481 * directory table is always allocated, and in kernel virtual. 2482 */ 2483 if (ptpaddr == 0) 2484 continue; 2485 2486 /* 2487 * Check for large page. 2488 */ 2489 if ((ptpaddr & PG_PS) != 0) { 2490 if ((prot & VM_PROT_WRITE) == 0) 2491 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW); 2492#ifdef PAE 2493 if ((prot & VM_PROT_EXECUTE) == 0) 2494 pmap->pm_pdir[pdirindex] |= pg_nx; 2495#endif 2496 anychanged = 1; 2497 continue; 2498 } 2499 2500 if (pdnxt > eva) 2501 pdnxt = eva; 2502 2503 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2504 sva += PAGE_SIZE) { 2505 vm_page_t m; 2506 2507retry: 2508 /* 2509 * Regardless of whether a pte is 32 or 64 bits in 2510 * size, PG_RW, PG_A, and PG_M are among the least 2511 * significant 32 bits. 2512 */ 2513 obits = pbits = *pte; 2514 if ((pbits & PG_V) == 0) 2515 continue; 2516 if (pbits & PG_MANAGED) { 2517 m = NULL; 2518 if (pbits & PG_A) { 2519 m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) & PG_FRAME); 2520 vm_page_flag_set(m, PG_REFERENCED); 2521 pbits &= ~PG_A; 2522 } 2523 if ((pbits & PG_M) != 0) { 2524 if (m == NULL) 2525 m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) & PG_FRAME); 2526 vm_page_dirty(m); 2527 } 2528 } 2529 2530 if ((prot & VM_PROT_WRITE) == 0) 2531 pbits &= ~(PG_RW | PG_M); 2532#ifdef PAE 2533 if ((prot & VM_PROT_EXECUTE) == 0) 2534 pbits |= pg_nx; 2535#endif 2536 2537 if (pbits != obits) { 2538#ifdef XEN 2539 obits = *pte; 2540 PT_SET_VA_MA(pte, pbits, TRUE); 2541 if (*pte != pbits) 2542 goto retry; 2543#else 2544#ifdef PAE 2545 if (!atomic_cmpset_64(pte, obits, pbits)) 2546 goto retry; 2547#else 2548 if (!atomic_cmpset_int((u_int *)pte, obits, 2549 pbits)) 2550 goto retry; 2551#endif 2552#endif 2553 if (obits & PG_G) 2554 pmap_invalidate_page(pmap, sva); 2555 else 2556 anychanged = 1; 2557 } 2558 } 2559 } 2560 PT_UPDATES_FLUSH(); 2561 if (*PMAP1) 2562 PT_SET_VA_MA(PMAP1, 0, TRUE); 2563 if (anychanged) 2564 pmap_invalidate_all(pmap); 2565 sched_unpin(); 2566 vm_page_unlock_queues(); 2567 PMAP_UNLOCK(pmap); 2568} 2569 2570/* 2571 * Insert the given physical page (p) at 2572 * the specified virtual address (v) in the 2573 * target physical map with the protection requested. 2574 * 2575 * If specified, the page will be wired down, meaning 2576 * that the related pte can not be reclaimed. 2577 * 2578 * NB: This is the only routine which MAY NOT lazy-evaluate 2579 * or lose information. That is, this routine must actually 2580 * insert this page into the given map NOW. 2581 */ 2582void 2583pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m, 2584 vm_prot_t prot, boolean_t wired) 2585{ 2586 vm_paddr_t pa; 2587 pd_entry_t *pde; 2588 pt_entry_t *pte; 2589 vm_paddr_t opa; 2590 pt_entry_t origpte, newpte; 2591 vm_page_t mpte, om; 2592 boolean_t invlva; 2593 2594 CTR6(KTR_PMAP, "pmap_enter: pmap=%08p va=0x%08x access=0x%x ma=0x%08x prot=0x%x wired=%d", 2595 pmap, va, access, xpmap_ptom(VM_PAGE_TO_PHYS(m)), prot, wired); 2596 va = trunc_page(va); 2597#ifdef PMAP_DIAGNOSTIC 2598 if (va > VM_MAX_KERNEL_ADDRESS) 2599 panic("pmap_enter: toobig"); 2600 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS)) 2601 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va); 2602#endif 2603 2604 mpte = NULL; 2605 2606 vm_page_lock_queues(); 2607 PMAP_LOCK(pmap); 2608 sched_pin(); 2609 2610 /* 2611 * In the case that a page table page is not 2612 * resident, we are creating it here. 2613 */ 2614 if (va < VM_MAXUSER_ADDRESS) { 2615 mpte = pmap_allocpte(pmap, va, M_WAITOK); 2616 } 2617#if 0 && defined(PMAP_DIAGNOSTIC) 2618 else { 2619 pd_entry_t *pdeaddr = pmap_pde(pmap, va); 2620 origpte = *pdeaddr; 2621 if ((origpte & PG_V) == 0) { 2622 panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n", 2623 pmap->pm_pdir[PTDPTDI], origpte, va); 2624 } 2625 } 2626#endif 2627 2628 pde = pmap_pde(pmap, va); 2629 if ((*pde & PG_PS) != 0) 2630 panic("pmap_enter: attempted pmap_enter on 4MB page"); 2631 pte = pmap_pte_quick(pmap, va); 2632 2633 /* 2634 * Page Directory table entry not valid, we need a new PT page 2635 */ 2636 if (pte == NULL) { 2637 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n", 2638 (uintmax_t)pmap->pm_pdir[va >> PDRSHIFT], va); 2639 } 2640 2641 pa = VM_PAGE_TO_PHYS(m); 2642 om = NULL; 2643 opa = origpte = 0; 2644 2645#if 0 2646 KASSERT((*pte & PG_V) || (*pte == 0), ("address set but not valid pte=%p *pte=0x%016jx", 2647 pte, *pte)); 2648#endif 2649 origpte = *pte; 2650 if (origpte) 2651 origpte = xpmap_mtop(origpte); 2652 opa = origpte & PG_FRAME; 2653 2654 /* 2655 * Mapping has not changed, must be protection or wiring change. 2656 */ 2657 if (origpte && (opa == pa)) { 2658 /* 2659 * Wiring change, just update stats. We don't worry about 2660 * wiring PT pages as they remain resident as long as there 2661 * are valid mappings in them. Hence, if a user page is wired, 2662 * the PT page will be also. 2663 */ 2664 if (wired && ((origpte & PG_W) == 0)) 2665 pmap->pm_stats.wired_count++; 2666 else if (!wired && (origpte & PG_W)) 2667 pmap->pm_stats.wired_count--; 2668 2669 /* 2670 * Remove extra pte reference 2671 */ 2672 if (mpte) 2673 mpte->wire_count--; 2674 2675 /* 2676 * We might be turning off write access to the page, 2677 * so we go ahead and sense modify status. 2678 */ 2679 if (origpte & PG_MANAGED) { 2680 om = m; 2681 pa |= PG_MANAGED; 2682 } 2683 goto validate; 2684 } 2685 /* 2686 * Mapping has changed, invalidate old range and fall through to 2687 * handle validating new mapping. 2688 */ 2689 if (opa) { 2690 if (origpte & PG_W) 2691 pmap->pm_stats.wired_count--; 2692 if (origpte & PG_MANAGED) { 2693 om = PHYS_TO_VM_PAGE(opa); 2694 pmap_remove_entry(pmap, om, va); 2695 } else if (va < VM_MAXUSER_ADDRESS) 2696 printf("va=0x%x is unmanaged :-( \n", va); 2697 2698 if (mpte != NULL) { 2699 mpte->wire_count--; 2700 KASSERT(mpte->wire_count > 0, 2701 ("pmap_enter: missing reference to page table page," 2702 " va: 0x%x", va)); 2703 } 2704 } else 2705 pmap->pm_stats.resident_count++; 2706 2707 /* 2708 * Enter on the PV list if part of our managed memory. 2709 */ 2710 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 2711 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva, 2712 ("pmap_enter: managed mapping within the clean submap")); 2713 pmap_insert_entry(pmap, va, m); 2714 pa |= PG_MANAGED; 2715 } 2716 2717 /* 2718 * Increment counters 2719 */ 2720 if (wired) 2721 pmap->pm_stats.wired_count++; 2722 2723validate: 2724 /* 2725 * Now validate mapping with desired protection/wiring. 2726 */ 2727 newpte = (pt_entry_t)(pa | PG_V); 2728 if ((prot & VM_PROT_WRITE) != 0) { 2729 newpte |= PG_RW; 2730 vm_page_flag_set(m, PG_WRITEABLE); 2731 } 2732#ifdef PAE 2733 if ((prot & VM_PROT_EXECUTE) == 0) 2734 newpte |= pg_nx; 2735#endif 2736 if (wired) 2737 newpte |= PG_W; 2738 if (va < VM_MAXUSER_ADDRESS) 2739 newpte |= PG_U; 2740 if (pmap == kernel_pmap) 2741 newpte |= pgeflag; 2742 2743 critical_enter(); 2744 /* 2745 * if the mapping or permission bits are different, we need 2746 * to update the pte. 2747 */ 2748 if ((origpte & ~(PG_M|PG_A)) != newpte) { 2749 if (origpte) { 2750 invlva = FALSE; 2751 origpte = *pte; 2752 PT_SET_VA(pte, newpte | PG_A, FALSE); 2753 if (origpte & PG_A) { 2754 if (origpte & PG_MANAGED) 2755 vm_page_flag_set(om, PG_REFERENCED); 2756 if (opa != VM_PAGE_TO_PHYS(m)) 2757 invlva = TRUE; 2758#ifdef PAE 2759 if ((origpte & PG_NX) == 0 && 2760 (newpte & PG_NX) != 0) 2761 invlva = TRUE; 2762#endif 2763 } 2764 if (origpte & PG_M) { 2765 KASSERT((origpte & PG_RW), 2766 ("pmap_enter: modified page not writable: va: %#x, pte: %#jx", 2767 va, (uintmax_t)origpte)); 2768 if ((origpte & PG_MANAGED) != 0) 2769 vm_page_dirty(om); 2770 if ((prot & VM_PROT_WRITE) == 0) 2771 invlva = TRUE; 2772 } 2773 if (invlva) 2774 pmap_invalidate_page(pmap, va); 2775 } else{ 2776 PT_SET_VA(pte, newpte | PG_A, FALSE); 2777 } 2778 2779 } 2780 PT_UPDATES_FLUSH(); 2781 critical_exit(); 2782 if (*PMAP1) 2783 PT_SET_VA_MA(PMAP1, 0, TRUE); 2784 sched_unpin(); 2785 vm_page_unlock_queues(); 2786 PMAP_UNLOCK(pmap); 2787} 2788 2789/* 2790 * Maps a sequence of resident pages belonging to the same object. 2791 * The sequence begins with the given page m_start. This page is 2792 * mapped at the given virtual address start. Each subsequent page is 2793 * mapped at a virtual address that is offset from start by the same 2794 * amount as the page is offset from m_start within the object. The 2795 * last page in the sequence is the page with the largest offset from 2796 * m_start that can be mapped at a virtual address less than the given 2797 * virtual address end. Not every virtual page between start and end 2798 * is mapped; only those for which a resident page exists with the 2799 * corresponding offset from m_start are mapped. 2800 */ 2801void 2802pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, 2803 vm_page_t m_start, vm_prot_t prot) 2804{ 2805 vm_page_t m, mpte; 2806 vm_pindex_t diff, psize; 2807 multicall_entry_t mcl[16]; 2808 multicall_entry_t *mclp = mcl; 2809 int error, count = 0; 2810 2811 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED); 2812 psize = atop(end - start); 2813 2814 mpte = NULL; 2815 m = m_start; 2816 PMAP_LOCK(pmap); 2817 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { 2818 mpte = pmap_enter_quick_locked(&mclp, &count, pmap, start + ptoa(diff), m, 2819 prot, mpte); 2820 m = TAILQ_NEXT(m, listq); 2821 if (count == 16) { 2822 error = HYPERVISOR_multicall(mcl, count); 2823 KASSERT(error == 0, ("bad multicall %d", error)); 2824 mclp = mcl; 2825 count = 0; 2826 } 2827 } 2828 if (count) { 2829 error = HYPERVISOR_multicall(mcl, count); 2830 KASSERT(error == 0, ("bad multicall %d", error)); 2831 } 2832 2833 PMAP_UNLOCK(pmap); 2834} 2835 2836/* 2837 * this code makes some *MAJOR* assumptions: 2838 * 1. Current pmap & pmap exists. 2839 * 2. Not wired. 2840 * 3. Read access. 2841 * 4. No page table pages. 2842 * but is *MUCH* faster than pmap_enter... 2843 */ 2844 2845void 2846pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 2847{ 2848 multicall_entry_t mcl, *mclp; 2849 int count = 0; 2850 mclp = &mcl; 2851 2852 CTR4(KTR_PMAP, "pmap_enter_quick: pmap=%p va=0x%x m=%p prot=0x%x", 2853 pmap, va, m, prot); 2854 2855 PMAP_LOCK(pmap); 2856 (void) pmap_enter_quick_locked(&mclp, &count, pmap, va, m, prot, NULL); 2857 if (count) 2858 HYPERVISOR_multicall(&mcl, count); 2859 PMAP_UNLOCK(pmap); 2860} 2861 2862void 2863pmap_enter_quick_range(pmap_t pmap, vm_offset_t *addrs, vm_page_t *pages, vm_prot_t *prots, int count) 2864{ 2865 int i, error, index = 0; 2866 multicall_entry_t mcl[16]; 2867 multicall_entry_t *mclp = mcl; 2868 2869 PMAP_LOCK(pmap); 2870 for (i = 0; i < count; i++, addrs++, pages++, prots++) { 2871 if (!pmap_is_prefaultable_locked(pmap, *addrs)) 2872 continue; 2873 2874 (void) pmap_enter_quick_locked(&mclp, &index, pmap, *addrs, *pages, *prots, NULL); 2875 if (index == 16) { 2876 error = HYPERVISOR_multicall(mcl, index); 2877 mclp = mcl; 2878 index = 0; 2879 KASSERT(error == 0, ("bad multicall %d", error)); 2880 } 2881 } 2882 if (index) { 2883 error = HYPERVISOR_multicall(mcl, index); 2884 KASSERT(error == 0, ("bad multicall %d", error)); 2885 } 2886 2887 PMAP_UNLOCK(pmap); 2888} 2889 2890static vm_page_t 2891pmap_enter_quick_locked(multicall_entry_t **mclpp, int *count, pmap_t pmap, vm_offset_t va, vm_page_t m, 2892 vm_prot_t prot, vm_page_t mpte) 2893{ 2894 pt_entry_t *pte; 2895 vm_paddr_t pa; 2896 vm_page_t free; 2897 multicall_entry_t *mcl = *mclpp; 2898 2899 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva || 2900 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0, 2901 ("pmap_enter_quick_locked: managed mapping within the clean submap")); 2902 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2903 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2904 2905 /* 2906 * In the case that a page table page is not 2907 * resident, we are creating it here. 2908 */ 2909 if (va < VM_MAXUSER_ADDRESS) { 2910 unsigned ptepindex; 2911 pd_entry_t ptema; 2912 2913 /* 2914 * Calculate pagetable page index 2915 */ 2916 ptepindex = va >> PDRSHIFT; 2917 if (mpte && (mpte->pindex == ptepindex)) { 2918 mpte->wire_count++; 2919 } else { 2920 /* 2921 * Get the page directory entry 2922 */ 2923 ptema = pmap->pm_pdir[ptepindex]; 2924 2925 /* 2926 * If the page table page is mapped, we just increment 2927 * the hold count, and activate it. 2928 */ 2929 if (ptema & PG_V) { 2930 if (ptema & PG_PS) 2931 panic("pmap_enter_quick: unexpected mapping into 4MB page"); 2932 mpte = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME); 2933 mpte->wire_count++; 2934 } else { 2935 mpte = _pmap_allocpte(pmap, ptepindex, 2936 M_NOWAIT); 2937 if (mpte == NULL) 2938 return (mpte); 2939 } 2940 } 2941 } else { 2942 mpte = NULL; 2943 } 2944 2945 /* 2946 * This call to vtopte makes the assumption that we are 2947 * entering the page into the current pmap. In order to support 2948 * quick entry into any pmap, one would likely use pmap_pte_quick. 2949 * But that isn't as quick as vtopte. 2950 */ 2951 KASSERT(pmap_is_current(pmap), ("entering pages in non-current pmap")); 2952 pte = vtopte(va); 2953 if (*pte & PG_V) { 2954 if (mpte != NULL) { 2955 mpte->wire_count--; 2956 mpte = NULL; 2957 } 2958 return (mpte); 2959 } 2960 2961 /* 2962 * Enter on the PV list if part of our managed memory. 2963 */ 2964 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 && 2965 !pmap_try_insert_pv_entry(pmap, va, m)) { 2966 if (mpte != NULL) { 2967 free = NULL; 2968 if (pmap_unwire_pte_hold(pmap, mpte, &free)) { 2969 pmap_invalidate_page(pmap, va); 2970 pmap_free_zero_pages(free); 2971 } 2972 2973 mpte = NULL; 2974 } 2975 return (mpte); 2976 } 2977 2978 /* 2979 * Increment counters 2980 */ 2981 pmap->pm_stats.resident_count++; 2982 2983 pa = VM_PAGE_TO_PHYS(m); 2984#ifdef PAE 2985 if ((prot & VM_PROT_EXECUTE) == 0) 2986 pa |= pg_nx; 2987#endif 2988 2989#if 0 2990 /* 2991 * Now validate mapping with RO protection 2992 */ 2993 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 2994 pte_store(pte, pa | PG_V | PG_U); 2995 else 2996 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 2997#else 2998 /* 2999 * Now validate mapping with RO protection 3000 */ 3001 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 3002 pa = xpmap_ptom(pa | PG_V | PG_U); 3003 else 3004 pa = xpmap_ptom(pa | PG_V | PG_U | PG_MANAGED); 3005 3006 mcl->op = __HYPERVISOR_update_va_mapping; 3007 mcl->args[0] = va; 3008 mcl->args[1] = (uint32_t)(pa & 0xffffffff); 3009 mcl->args[2] = (uint32_t)(pa >> 32); 3010 mcl->args[3] = 0; 3011 *mclpp = mcl + 1; 3012 *count = *count + 1; 3013#endif 3014 return mpte; 3015} 3016 3017/* 3018 * Make a temporary mapping for a physical address. This is only intended 3019 * to be used for panic dumps. 3020 */ 3021void * 3022pmap_kenter_temporary(vm_paddr_t pa, int i) 3023{ 3024 vm_offset_t va; 3025 3026 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 3027 pmap_kenter(va, pa); 3028 invlpg(va); 3029 return ((void *)crashdumpmap); 3030} 3031 3032/* 3033 * This code maps large physical mmap regions into the 3034 * processor address space. Note that some shortcuts 3035 * are taken, but the code works. 3036 */ 3037void 3038pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 3039 vm_object_t object, vm_pindex_t pindex, 3040 vm_size_t size) 3041{ 3042 vm_page_t p; 3043 3044 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 3045 KASSERT(object->type == OBJT_DEVICE, 3046 ("pmap_object_init_pt: non-device object")); 3047 if (pseflag && 3048 ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) { 3049 int i; 3050 vm_page_t m[1]; 3051 unsigned int ptepindex; 3052 int npdes; 3053 pd_entry_t ptepa; 3054 3055 PMAP_LOCK(pmap); 3056 if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)]) 3057 goto out; 3058 PMAP_UNLOCK(pmap); 3059retry: 3060 p = vm_page_lookup(object, pindex); 3061 if (p != NULL) { 3062 if (vm_page_sleep_if_busy(p, FALSE, "init4p")) 3063 goto retry; 3064 } else { 3065 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL); 3066 if (p == NULL) 3067 return; 3068 m[0] = p; 3069 3070 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) { 3071 vm_page_lock_queues(); 3072 vm_page_free(p); 3073 vm_page_unlock_queues(); 3074 return; 3075 } 3076 3077 p = vm_page_lookup(object, pindex); 3078 vm_page_lock_queues(); 3079 vm_page_wakeup(p); 3080 vm_page_unlock_queues(); 3081 } 3082 3083 ptepa = VM_PAGE_TO_PHYS(p); 3084 if (ptepa & (NBPDR - 1)) 3085 return; 3086 3087 p->valid = VM_PAGE_BITS_ALL; 3088 3089 PMAP_LOCK(pmap); 3090 pmap->pm_stats.resident_count += size >> PAGE_SHIFT; 3091 npdes = size >> PDRSHIFT; 3092 critical_enter(); 3093 for(i = 0; i < npdes; i++) { 3094 PD_SET_VA(pmap, ptepindex, 3095 ptepa | PG_U | PG_M | PG_RW | PG_V | PG_PS, FALSE); 3096 ptepa += NBPDR; 3097 ptepindex += 1; 3098 } 3099 pmap_invalidate_all(pmap); 3100 critical_exit(); 3101out: 3102 PMAP_UNLOCK(pmap); 3103 } 3104} 3105 3106/* 3107 * Routine: pmap_change_wiring 3108 * Function: Change the wiring attribute for a map/virtual-address 3109 * pair. 3110 * In/out conditions: 3111 * The mapping must already exist in the pmap. 3112 */ 3113void 3114pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired) 3115{ 3116 pt_entry_t *pte; 3117 3118 vm_page_lock_queues(); 3119 PMAP_LOCK(pmap); 3120 pte = pmap_pte(pmap, va); 3121 3122 if (wired && !pmap_pte_w(pte)) { 3123 PT_SET_VA_MA((pte), *(pte) | PG_W, TRUE); 3124 pmap->pm_stats.wired_count++; 3125 } else if (!wired && pmap_pte_w(pte)) { 3126 PT_SET_VA_MA((pte), *(pte) & ~PG_W, TRUE); 3127 pmap->pm_stats.wired_count--; 3128 } 3129 3130 /* 3131 * Wiring is not a hardware characteristic so there is no need to 3132 * invalidate TLB. 3133 */ 3134 pmap_pte_release(pte); 3135 PMAP_UNLOCK(pmap); 3136 vm_page_unlock_queues(); 3137} 3138 3139 3140 3141/* 3142 * Copy the range specified by src_addr/len 3143 * from the source map to the range dst_addr/len 3144 * in the destination map. 3145 * 3146 * This routine is only advisory and need not do anything. 3147 */ 3148 3149void 3150pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 3151 vm_offset_t src_addr) 3152{ 3153 vm_page_t free; 3154 vm_offset_t addr; 3155 vm_offset_t end_addr = src_addr + len; 3156 vm_offset_t pdnxt; 3157 3158 if (dst_addr != src_addr) 3159 return; 3160 3161 if (!pmap_is_current(src_pmap)) { 3162 CTR2(KTR_PMAP, 3163 "pmap_copy, skipping: pdir[PTDPTDI]=0x%jx PTDpde[0]=0x%jx", 3164 (src_pmap->pm_pdir[PTDPTDI] & PG_FRAME), (PTDpde[0] & PG_FRAME)); 3165 3166 return; 3167 } 3168 CTR5(KTR_PMAP, "pmap_copy: dst_pmap=%p src_pmap=%p dst_addr=0x%x len=%d src_addr=0x%x", 3169 dst_pmap, src_pmap, dst_addr, len, src_addr); 3170 3171 vm_page_lock_queues(); 3172 if (dst_pmap < src_pmap) { 3173 PMAP_LOCK(dst_pmap); 3174 PMAP_LOCK(src_pmap); 3175 } else { 3176 PMAP_LOCK(src_pmap); 3177 PMAP_LOCK(dst_pmap); 3178 } 3179 sched_pin(); 3180 for (addr = src_addr; addr < end_addr; addr = pdnxt) { 3181 pt_entry_t *src_pte, *dst_pte; 3182 vm_page_t dstmpte, srcmpte; 3183 pd_entry_t srcptepaddr; 3184 unsigned ptepindex; 3185 3186 if (addr >= UPT_MIN_ADDRESS) 3187 panic("pmap_copy: invalid to pmap_copy page tables"); 3188 3189 pdnxt = (addr + NBPDR) & ~PDRMASK; 3190 ptepindex = addr >> PDRSHIFT; 3191 3192 srcptepaddr = PT_GET(&src_pmap->pm_pdir[ptepindex]); 3193 if (srcptepaddr == 0) 3194 continue; 3195 3196 if (srcptepaddr & PG_PS) { 3197 if (dst_pmap->pm_pdir[ptepindex] == 0) { 3198 PD_SET_VA(dst_pmap, ptepindex, srcptepaddr & ~PG_W, TRUE); 3199 dst_pmap->pm_stats.resident_count += 3200 NBPDR / PAGE_SIZE; 3201 } 3202 continue; 3203 } 3204 3205 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME); 3206 if (srcmpte->wire_count == 0) 3207 panic("pmap_copy: source page table page is unused"); 3208 3209 if (pdnxt > end_addr) 3210 pdnxt = end_addr; 3211 3212 src_pte = vtopte(addr); 3213 while (addr < pdnxt) { 3214 pt_entry_t ptetemp; 3215 ptetemp = *src_pte; 3216 /* 3217 * we only virtual copy managed pages 3218 */ 3219 if ((ptetemp & PG_MANAGED) != 0) { 3220 dstmpte = pmap_allocpte(dst_pmap, addr, 3221 M_NOWAIT); 3222 if (dstmpte == NULL) 3223 break; 3224 dst_pte = pmap_pte_quick(dst_pmap, addr); 3225 if (*dst_pte == 0 && 3226 pmap_try_insert_pv_entry(dst_pmap, addr, 3227 PHYS_TO_VM_PAGE(xpmap_mtop(ptetemp) & PG_FRAME))) { 3228 /* 3229 * Clear the wired, modified, and 3230 * accessed (referenced) bits 3231 * during the copy. 3232 */ 3233 KASSERT(ptetemp != 0, ("src_pte not set")); 3234 PT_SET_VA_MA(dst_pte, ptetemp & ~(PG_W | PG_M | PG_A), TRUE /* XXX debug */); 3235 KASSERT(*dst_pte == (ptetemp & ~(PG_W | PG_M | PG_A)), 3236 ("no pmap copy expected: 0x%jx saw: 0x%jx", 3237 ptetemp & ~(PG_W | PG_M | PG_A), *dst_pte)); 3238 dst_pmap->pm_stats.resident_count++; 3239 } else { 3240 free = NULL; 3241 if (pmap_unwire_pte_hold(dst_pmap, 3242 dstmpte, &free)) { 3243 pmap_invalidate_page(dst_pmap, 3244 addr); 3245 pmap_free_zero_pages(free); 3246 } 3247 } 3248 if (dstmpte->wire_count >= srcmpte->wire_count) 3249 break; 3250 } 3251 addr += PAGE_SIZE; 3252 src_pte++; 3253 } 3254 } 3255 PT_UPDATES_FLUSH(); 3256 sched_unpin(); 3257 vm_page_unlock_queues(); 3258 PMAP_UNLOCK(src_pmap); 3259 PMAP_UNLOCK(dst_pmap); 3260} 3261 3262/* 3263 * pmap_zero_page zeros the specified hardware page by mapping 3264 * the page into KVM and using bzero to clear its contents. 3265 */ 3266void 3267pmap_zero_page(vm_page_t m) 3268{ 3269 struct sysmaps *sysmaps; 3270 3271 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3272 mtx_lock(&sysmaps->lock); 3273 if (*sysmaps->CMAP2) 3274 panic("pmap_zero_page: CMAP2 busy"); 3275 sched_pin(); 3276 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3277 pagezero(sysmaps->CADDR2); 3278 PT_SET_MA(sysmaps->CADDR2, 0); 3279 sched_unpin(); 3280 mtx_unlock(&sysmaps->lock); 3281} 3282 3283/* 3284 * pmap_zero_page_area zeros the specified hardware page by mapping 3285 * the page into KVM and using bzero to clear its contents. 3286 * 3287 * off and size may not cover an area beyond a single hardware page. 3288 */ 3289void 3290pmap_zero_page_area(vm_page_t m, int off, int size) 3291{ 3292 struct sysmaps *sysmaps; 3293 3294 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3295 mtx_lock(&sysmaps->lock); 3296 if (*sysmaps->CMAP2) 3297 panic("pmap_zero_page: CMAP2 busy"); 3298 sched_pin(); 3299 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3300 3301 if (off == 0 && size == PAGE_SIZE) 3302 pagezero(sysmaps->CADDR2); 3303 else 3304 bzero((char *)sysmaps->CADDR2 + off, size); 3305 PT_SET_MA(sysmaps->CADDR2, 0); 3306 sched_unpin(); 3307 mtx_unlock(&sysmaps->lock); 3308} 3309 3310/* 3311 * pmap_zero_page_idle zeros the specified hardware page by mapping 3312 * the page into KVM and using bzero to clear its contents. This 3313 * is intended to be called from the vm_pagezero process only and 3314 * outside of Giant. 3315 */ 3316void 3317pmap_zero_page_idle(vm_page_t m) 3318{ 3319 3320 if (*CMAP3) 3321 panic("pmap_zero_page: CMAP3 busy"); 3322 sched_pin(); 3323 PT_SET_MA(CADDR3, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3324 pagezero(CADDR3); 3325 PT_SET_MA(CADDR3, 0); 3326 sched_unpin(); 3327} 3328 3329/* 3330 * pmap_copy_page copies the specified (machine independent) 3331 * page by mapping the page into virtual memory and using 3332 * bcopy to copy the page, one machine dependent page at a 3333 * time. 3334 */ 3335void 3336pmap_copy_page(vm_page_t src, vm_page_t dst) 3337{ 3338 struct sysmaps *sysmaps; 3339 3340 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3341 mtx_lock(&sysmaps->lock); 3342 if (*sysmaps->CMAP1) 3343 panic("pmap_copy_page: CMAP1 busy"); 3344 if (*sysmaps->CMAP2) 3345 panic("pmap_copy_page: CMAP2 busy"); 3346 sched_pin(); 3347 PT_SET_MA(sysmaps->CADDR1, PG_V | xpmap_ptom(VM_PAGE_TO_PHYS(src)) | PG_A); 3348 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(dst)) | PG_A | PG_M); 3349 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); 3350 PT_SET_MA(sysmaps->CADDR1, 0); 3351 PT_SET_MA(sysmaps->CADDR2, 0); 3352 sched_unpin(); 3353 mtx_unlock(&sysmaps->lock); 3354} 3355 3356/* 3357 * Returns true if the pmap's pv is one of the first 3358 * 16 pvs linked to from this page. This count may 3359 * be changed upwards or downwards in the future; it 3360 * is only necessary that true be returned for a small 3361 * subset of pmaps for proper page aging. 3362 */ 3363boolean_t 3364pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 3365{ 3366 pv_entry_t pv; 3367 int loops = 0; 3368 3369 if (m->flags & PG_FICTITIOUS) 3370 return (FALSE); 3371 3372 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3373 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3374 if (PV_PMAP(pv) == pmap) { 3375 return TRUE; 3376 } 3377 loops++; 3378 if (loops >= 16) 3379 break; 3380 } 3381 return (FALSE); 3382} 3383 3384/* 3385 * pmap_page_wired_mappings: 3386 * 3387 * Return the number of managed mappings to the given physical page 3388 * that are wired. 3389 */ 3390int 3391pmap_page_wired_mappings(vm_page_t m) 3392{ 3393 pv_entry_t pv; 3394 pt_entry_t *pte; 3395 pmap_t pmap; 3396 int count; 3397 3398 count = 0; 3399 if ((m->flags & PG_FICTITIOUS) != 0) 3400 return (count); 3401 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3402 sched_pin(); 3403 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3404 pmap = PV_PMAP(pv); 3405 PMAP_LOCK(pmap); 3406 pte = pmap_pte_quick(pmap, pv->pv_va); 3407 if ((*pte & PG_W) != 0) 3408 count++; 3409 PMAP_UNLOCK(pmap); 3410 } 3411 sched_unpin(); 3412 return (count); 3413} 3414 3415/* 3416 * Remove all pages from specified address space 3417 * this aids process exit speeds. Also, this code 3418 * is special cased for current process only, but 3419 * can have the more generic (and slightly slower) 3420 * mode enabled. This is much faster than pmap_remove 3421 * in the case of running down an entire address space. 3422 */ 3423void 3424pmap_remove_pages(pmap_t pmap) 3425{ 3426 pt_entry_t *pte, tpte; 3427 vm_page_t m, free = NULL; 3428 pv_entry_t pv; 3429 struct pv_chunk *pc, *npc; 3430 int field, idx; 3431 int32_t bit; 3432 uint32_t inuse, bitmask; 3433 int allfree; 3434 3435 CTR1(KTR_PMAP, "pmap_remove_pages: pmap=%p", pmap); 3436 3437 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { 3438 printf("warning: pmap_remove_pages called with non-current pmap\n"); 3439 return; 3440 } 3441 vm_page_lock_queues(); 3442 KASSERT(pmap_is_current(pmap), ("removing pages from non-current pmap")); 3443 PMAP_LOCK(pmap); 3444 sched_pin(); 3445 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) { 3446 allfree = 1; 3447 for (field = 0; field < _NPCM; field++) { 3448 inuse = (~(pc->pc_map[field])) & pc_freemask[field]; 3449 while (inuse != 0) { 3450 bit = bsfl(inuse); 3451 bitmask = 1UL << bit; 3452 idx = field * 32 + bit; 3453 pv = &pc->pc_pventry[idx]; 3454 inuse &= ~bitmask; 3455 3456 pte = vtopte(pv->pv_va); 3457 tpte = *pte ? xpmap_mtop(*pte) : 0; 3458 3459 if (tpte == 0) { 3460 printf( 3461 "TPTE at %p IS ZERO @ VA %08x\n", 3462 pte, pv->pv_va); 3463 panic("bad pte"); 3464 } 3465 3466/* 3467 * We cannot remove wired pages from a process' mapping at this time 3468 */ 3469 if (tpte & PG_W) { 3470 allfree = 0; 3471 continue; 3472 } 3473 3474 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME); 3475 KASSERT(m->phys_addr == (tpte & PG_FRAME), 3476 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 3477 m, (uintmax_t)m->phys_addr, 3478 (uintmax_t)tpte)); 3479 3480 KASSERT(m < &vm_page_array[vm_page_array_size], 3481 ("pmap_remove_pages: bad tpte %#jx", 3482 (uintmax_t)tpte)); 3483 3484 3485 PT_CLEAR_VA(pte, FALSE); 3486 3487 /* 3488 * Update the vm_page_t clean/reference bits. 3489 */ 3490 if (tpte & PG_M) 3491 vm_page_dirty(m); 3492 3493 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3494 if (TAILQ_EMPTY(&m->md.pv_list)) 3495 vm_page_flag_clear(m, PG_WRITEABLE); 3496 3497 pmap_unuse_pt(pmap, pv->pv_va, &free); 3498 3499 /* Mark free */ 3500 PV_STAT(pv_entry_frees++); 3501 PV_STAT(pv_entry_spare++); 3502 pv_entry_count--; 3503 pc->pc_map[field] |= bitmask; 3504 pmap->pm_stats.resident_count--; 3505 } 3506 } 3507 PT_UPDATES_FLUSH(); 3508 if (allfree) { 3509 PV_STAT(pv_entry_spare -= _NPCPV); 3510 PV_STAT(pc_chunk_count--); 3511 PV_STAT(pc_chunk_frees++); 3512 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 3513 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 3514 pmap_qremove((vm_offset_t)pc, 1); 3515 vm_page_unwire(m, 0); 3516 vm_page_free(m); 3517 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 3518 } 3519 } 3520 PT_UPDATES_FLUSH(); 3521 if (*PMAP1) 3522 PT_SET_MA(PADDR1, 0); 3523 3524 sched_unpin(); 3525 pmap_invalidate_all(pmap); 3526 vm_page_unlock_queues(); 3527 PMAP_UNLOCK(pmap); 3528 pmap_free_zero_pages(free); 3529} 3530 3531/* 3532 * pmap_is_modified: 3533 * 3534 * Return whether or not the specified physical page was modified 3535 * in any physical maps. 3536 */ 3537boolean_t 3538pmap_is_modified(vm_page_t m) 3539{ 3540 pv_entry_t pv; 3541 pt_entry_t *pte; 3542 pmap_t pmap; 3543 boolean_t rv; 3544 3545 rv = FALSE; 3546 if (m->flags & PG_FICTITIOUS) 3547 return (rv); 3548 3549 sched_pin(); 3550 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3551 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3552 pmap = PV_PMAP(pv); 3553 PMAP_LOCK(pmap); 3554 pte = pmap_pte_quick(pmap, pv->pv_va); 3555 rv = (*pte & PG_M) != 0; 3556 PMAP_UNLOCK(pmap); 3557 if (rv) 3558 break; 3559 } 3560 if (*PMAP1) 3561 PT_SET_MA(PADDR1, 0); 3562 sched_unpin(); 3563 return (rv); 3564} 3565 3566/* 3567 * pmap_is_prefaultable: 3568 * 3569 * Return whether or not the specified virtual address is elgible 3570 * for prefault. 3571 */ 3572static boolean_t 3573pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr) 3574{ 3575 pt_entry_t *pte; 3576 boolean_t rv = FALSE; 3577 3578 return (rv); 3579 3580 if (pmap_is_current(pmap) && *pmap_pde(pmap, addr)) { 3581 pte = vtopte(addr); 3582 rv = (*pte == 0); 3583 } 3584 return (rv); 3585} 3586 3587boolean_t 3588pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 3589{ 3590 boolean_t rv; 3591 3592 PMAP_LOCK(pmap); 3593 rv = pmap_is_prefaultable_locked(pmap, addr); 3594 PMAP_UNLOCK(pmap); 3595 return (rv); 3596} 3597 3598void 3599pmap_map_readonly(pmap_t pmap, vm_offset_t va, int len) 3600{ 3601 int i, npages = round_page(len) >> PAGE_SHIFT; 3602 for (i = 0; i < npages; i++) { 3603 pt_entry_t *pte; 3604 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE)); 3605 pte_store(pte, xpmap_mtop(*pte & ~(PG_RW|PG_M))); 3606 PMAP_MARK_PRIV(xpmap_mtop(*pte)); 3607 pmap_pte_release(pte); 3608 } 3609} 3610 3611void 3612pmap_map_readwrite(pmap_t pmap, vm_offset_t va, int len) 3613{ 3614 int i, npages = round_page(len) >> PAGE_SHIFT; 3615 for (i = 0; i < npages; i++) { 3616 pt_entry_t *pte; 3617 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE)); 3618 PMAP_MARK_UNPRIV(xpmap_mtop(*pte)); 3619 pte_store(pte, xpmap_mtop(*pte) | (PG_RW|PG_M)); 3620 pmap_pte_release(pte); 3621 } 3622} 3623 3624/* 3625 * Clear the write and modified bits in each of the given page's mappings. 3626 */ 3627void 3628pmap_remove_write(vm_page_t m) 3629{ 3630 pv_entry_t pv; 3631 pmap_t pmap; 3632 pt_entry_t oldpte, *pte; 3633 3634 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3635 if ((m->flags & PG_FICTITIOUS) != 0 || 3636 (m->flags & PG_WRITEABLE) == 0) 3637 return; 3638 sched_pin(); 3639 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3640 pmap = PV_PMAP(pv); 3641 PMAP_LOCK(pmap); 3642 pte = pmap_pte_quick(pmap, pv->pv_va); 3643retry: 3644 oldpte = *pte; 3645 if ((oldpte & PG_RW) != 0) { 3646 /* 3647 * Regardless of whether a pte is 32 or 64 bits 3648 * in size, PG_RW and PG_M are among the least 3649 * significant 32 bits. 3650 */ 3651 if (!atomic_cmpset_int((u_int *)pte, oldpte, 3652 oldpte & ~(PG_RW | PG_M))) 3653 goto retry; 3654 if ((oldpte & PG_M) != 0) 3655 vm_page_dirty(m); 3656 pmap_invalidate_page(pmap, pv->pv_va); 3657 } 3658 PMAP_UNLOCK(pmap); 3659 } 3660 vm_page_flag_clear(m, PG_WRITEABLE); 3661 PT_UPDATES_FLUSH(); 3662 if (*PMAP1) 3663 PT_SET_MA(PADDR1, 0); 3664 sched_unpin(); 3665} 3666 3667/* 3668 * pmap_ts_referenced: 3669 * 3670 * Return a count of reference bits for a page, clearing those bits. 3671 * It is not necessary for every reference bit to be cleared, but it 3672 * is necessary that 0 only be returned when there are truly no 3673 * reference bits set. 3674 * 3675 * XXX: The exact number of bits to check and clear is a matter that 3676 * should be tested and standardized at some point in the future for 3677 * optimal aging of shared pages. 3678 */ 3679int 3680pmap_ts_referenced(vm_page_t m) 3681{ 3682 pv_entry_t pv, pvf, pvn; 3683 pmap_t pmap; 3684 pt_entry_t *pte; 3685 int rtval = 0; 3686 3687 if (m->flags & PG_FICTITIOUS) 3688 return (rtval); 3689 sched_pin(); 3690 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3691 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 3692 pvf = pv; 3693 do { 3694 pvn = TAILQ_NEXT(pv, pv_list); 3695 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3696 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 3697 pmap = PV_PMAP(pv); 3698 PMAP_LOCK(pmap); 3699 pte = pmap_pte_quick(pmap, pv->pv_va); 3700 if ((*pte & PG_A) != 0) { 3701 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE); 3702 pmap_invalidate_page(pmap, pv->pv_va); 3703 rtval++; 3704 if (rtval > 4) 3705 pvn = NULL; 3706 } 3707 PMAP_UNLOCK(pmap); 3708 } while ((pv = pvn) != NULL && pv != pvf); 3709 } 3710 PT_UPDATES_FLUSH(); 3711 if (*PMAP1) 3712 PT_SET_MA(PADDR1, 0); 3713 3714 sched_unpin(); 3715 return (rtval); 3716} 3717 3718/* 3719 * Clear the modify bits on the specified physical page. 3720 */ 3721void 3722pmap_clear_modify(vm_page_t m) 3723{ 3724 pv_entry_t pv; 3725 pmap_t pmap; 3726 pt_entry_t *pte; 3727 3728 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3729 if ((m->flags & PG_FICTITIOUS) != 0) 3730 return; 3731 sched_pin(); 3732 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3733 pmap = PV_PMAP(pv); 3734 PMAP_LOCK(pmap); 3735 pte = pmap_pte_quick(pmap, pv->pv_va); 3736 if ((*pte & PG_M) != 0) { 3737 /* 3738 * Regardless of whether a pte is 32 or 64 bits 3739 * in size, PG_M is among the least significant 3740 * 32 bits. 3741 */ 3742 PT_SET_VA_MA(pte, *pte & ~PG_M, FALSE); 3743 pmap_invalidate_page(pmap, pv->pv_va); 3744 } 3745 PMAP_UNLOCK(pmap); 3746 } 3747 sched_unpin(); 3748} 3749 3750/* 3751 * pmap_clear_reference: 3752 * 3753 * Clear the reference bit on the specified physical page. 3754 */ 3755void 3756pmap_clear_reference(vm_page_t m) 3757{ 3758 pv_entry_t pv; 3759 pmap_t pmap; 3760 pt_entry_t *pte; 3761 3762 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3763 if ((m->flags & PG_FICTITIOUS) != 0) 3764 return; 3765 sched_pin(); 3766 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3767 pmap = PV_PMAP(pv); 3768 PMAP_LOCK(pmap); 3769 pte = pmap_pte_quick(pmap, pv->pv_va); 3770 if ((*pte & PG_A) != 0) { 3771 /* 3772 * Regardless of whether a pte is 32 or 64 bits 3773 * in size, PG_A is among the least significant 3774 * 32 bits. 3775 */ 3776 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE); 3777 pmap_invalidate_page(pmap, pv->pv_va); 3778 } 3779 PMAP_UNLOCK(pmap); 3780 } 3781 sched_unpin(); 3782} 3783 3784/* 3785 * Miscellaneous support routines follow 3786 */ 3787 3788/* 3789 * Map a set of physical memory pages into the kernel virtual 3790 * address space. Return a pointer to where it is mapped. This 3791 * routine is intended to be used for mapping device memory, 3792 * NOT real memory. 3793 */ 3794void * 3795pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode) 3796{ 3797 vm_offset_t va, tmpva, offset; 3798 3799 offset = pa & PAGE_MASK; 3800 size = roundup(offset + size, PAGE_SIZE); 3801 pa = pa & PG_FRAME; 3802 3803 if (pa < KERNLOAD && pa + size <= KERNLOAD) 3804 va = KERNBASE + pa; 3805 else 3806 va = kmem_alloc_nofault(kernel_map, size); 3807 if (!va) 3808 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 3809 3810 for (tmpva = va; size > 0; ) { 3811 pmap_kenter_attr(tmpva, pa, mode); 3812 size -= PAGE_SIZE; 3813 tmpva += PAGE_SIZE; 3814 pa += PAGE_SIZE; 3815 } 3816 pmap_invalidate_range(kernel_pmap, va, tmpva); 3817 pmap_invalidate_cache(); 3818 return ((void *)(va + offset)); 3819} 3820 3821void * 3822pmap_mapdev(vm_paddr_t pa, vm_size_t size) 3823{ 3824 3825 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE)); 3826} 3827 3828void * 3829pmap_mapbios(vm_paddr_t pa, vm_size_t size) 3830{ 3831 3832 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK)); 3833} 3834 3835void 3836pmap_unmapdev(vm_offset_t va, vm_size_t size) 3837{ 3838 vm_offset_t base, offset, tmpva; 3839 3840 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD) 3841 return; 3842 base = trunc_page(va); 3843 offset = va & PAGE_MASK; 3844 size = roundup(offset + size, PAGE_SIZE); 3845 critical_enter(); 3846 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 3847 pmap_kremove(tmpva); 3848 pmap_invalidate_range(kernel_pmap, va, tmpva); 3849 critical_exit(); 3850 kmem_free(kernel_map, base, size); 3851} 3852 3853int 3854pmap_change_attr(va, size, mode) 3855 vm_offset_t va; 3856 vm_size_t size; 3857 int mode; 3858{ 3859 vm_offset_t base, offset, tmpva; 3860 pt_entry_t *pte; 3861 u_int opte, npte; 3862 pd_entry_t *pde; 3863 3864 base = trunc_page(va); 3865 offset = va & PAGE_MASK; 3866 size = roundup(offset + size, PAGE_SIZE); 3867 3868 /* Only supported on kernel virtual addresses. */ 3869 if (base <= VM_MAXUSER_ADDRESS) 3870 return (EINVAL); 3871 3872 /* 4MB pages and pages that aren't mapped aren't supported. */ 3873 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) { 3874 pde = pmap_pde(kernel_pmap, tmpva); 3875 if (*pde & PG_PS) 3876 return (EINVAL); 3877 if ((*pde & PG_V) == 0) 3878 return (EINVAL); 3879 pte = vtopte(va); 3880 if ((*pte & PG_V) == 0) 3881 return (EINVAL); 3882 } 3883 3884 /* 3885 * Ok, all the pages exist and are 4k, so run through them updating 3886 * their cache mode. 3887 */ 3888 for (tmpva = base; size > 0; ) { 3889 pte = vtopte(tmpva); 3890 3891 /* 3892 * The cache mode bits are all in the low 32-bits of the 3893 * PTE, so we can just spin on updating the low 32-bits. 3894 */ 3895 do { 3896 opte = *(u_int *)pte; 3897 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT); 3898 npte |= pmap_cache_bits(mode, 0); 3899 PT_SET_VA_MA(pte, npte, TRUE); 3900 } while (npte != opte && (*pte != npte)); 3901 tmpva += PAGE_SIZE; 3902 size -= PAGE_SIZE; 3903 } 3904 3905 /* 3906 * Flush CPU caches to make sure any data isn't cached that shouldn't 3907 * be, etc. 3908 */ 3909 pmap_invalidate_range(kernel_pmap, base, tmpva); 3910 pmap_invalidate_cache(); 3911 return (0); 3912} 3913 3914/* 3915 * perform the pmap work for mincore 3916 */ 3917int 3918pmap_mincore(pmap_t pmap, vm_offset_t addr) 3919{ 3920 pt_entry_t *ptep, pte; 3921 vm_page_t m; 3922 int val = 0; 3923 3924 PMAP_LOCK(pmap); 3925 ptep = pmap_pte(pmap, addr); 3926 pte = (ptep != NULL) ? PT_GET(ptep) : 0; 3927 pmap_pte_release(ptep); 3928 PMAP_UNLOCK(pmap); 3929 3930 if (pte != 0) { 3931 vm_paddr_t pa; 3932 3933 val = MINCORE_INCORE; 3934 if ((pte & PG_MANAGED) == 0) 3935 return val; 3936 3937 pa = pte & PG_FRAME; 3938 3939 m = PHYS_TO_VM_PAGE(pa); 3940 3941 /* 3942 * Modified by us 3943 */ 3944 if (pte & PG_M) 3945 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 3946 else { 3947 /* 3948 * Modified by someone else 3949 */ 3950 vm_page_lock_queues(); 3951 if (m->dirty || pmap_is_modified(m)) 3952 val |= MINCORE_MODIFIED_OTHER; 3953 vm_page_unlock_queues(); 3954 } 3955 /* 3956 * Referenced by us 3957 */ 3958 if (pte & PG_A) 3959 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 3960 else { 3961 /* 3962 * Referenced by someone else 3963 */ 3964 vm_page_lock_queues(); 3965 if ((m->flags & PG_REFERENCED) || 3966 pmap_ts_referenced(m)) { 3967 val |= MINCORE_REFERENCED_OTHER; 3968 vm_page_flag_set(m, PG_REFERENCED); 3969 } 3970 vm_page_unlock_queues(); 3971 } 3972 } 3973 return val; 3974} 3975 3976void 3977pmap_activate(struct thread *td) 3978{ 3979 pmap_t pmap, oldpmap; 3980 u_int32_t cr3; 3981 3982 critical_enter(); 3983 pmap = vmspace_pmap(td->td_proc->p_vmspace); 3984 oldpmap = PCPU_GET(curpmap); 3985#if defined(SMP) 3986 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 3987 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 3988#else 3989 oldpmap->pm_active &= ~1; 3990 pmap->pm_active |= 1; 3991#endif 3992#ifdef PAE 3993 cr3 = vtophys(pmap->pm_pdpt); 3994#else 3995 cr3 = vtophys(pmap->pm_pdir); 3996#endif 3997 /* 3998 * pmap_activate is for the current thread on the current cpu 3999 */ 4000 td->td_pcb->pcb_cr3 = cr3; 4001 PT_UPDATES_FLUSH(); 4002 load_cr3(cr3); 4003 4004 PCPU_SET(curpmap, pmap); 4005 critical_exit(); 4006} 4007 4008vm_offset_t 4009pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size) 4010{ 4011 4012 if ((obj == NULL) || (size < NBPDR) || (obj->type != OBJT_DEVICE)) { 4013 return addr; 4014 } 4015 4016 addr = (addr + PDRMASK) & ~PDRMASK; 4017 return addr; 4018} 4019 4020 4021#if defined(PMAP_DEBUG) 4022pmap_pid_dump(int pid) 4023{ 4024 pmap_t pmap; 4025 struct proc *p; 4026 int npte = 0; 4027 int index; 4028 4029 sx_slock(&allproc_lock); 4030 FOREACH_PROC_IN_SYSTEM(p) { 4031 if (p->p_pid != pid) 4032 continue; 4033 4034 if (p->p_vmspace) { 4035 int i,j; 4036 index = 0; 4037 pmap = vmspace_pmap(p->p_vmspace); 4038 for (i = 0; i < NPDEPTD; i++) { 4039 pd_entry_t *pde; 4040 pt_entry_t *pte; 4041 vm_offset_t base = i << PDRSHIFT; 4042 4043 pde = &pmap->pm_pdir[i]; 4044 if (pde && pmap_pde_v(pde)) { 4045 for (j = 0; j < NPTEPG; j++) { 4046 vm_offset_t va = base + (j << PAGE_SHIFT); 4047 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 4048 if (index) { 4049 index = 0; 4050 printf("\n"); 4051 } 4052 sx_sunlock(&allproc_lock); 4053 return npte; 4054 } 4055 pte = pmap_pte(pmap, va); 4056 if (pte && pmap_pte_v(pte)) { 4057 pt_entry_t pa; 4058 vm_page_t m; 4059 pa = PT_GET(pte); 4060 m = PHYS_TO_VM_PAGE(pa & PG_FRAME); 4061 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 4062 va, pa, m->hold_count, m->wire_count, m->flags); 4063 npte++; 4064 index++; 4065 if (index >= 2) { 4066 index = 0; 4067 printf("\n"); 4068 } else { 4069 printf(" "); 4070 } 4071 } 4072 } 4073 } 4074 } 4075 } 4076 } 4077 sx_sunlock(&allproc_lock); 4078 return npte; 4079} 4080#endif 4081 4082#if defined(DEBUG) 4083 4084static void pads(pmap_t pm); 4085void pmap_pvdump(vm_paddr_t pa); 4086 4087/* print address space of pmap*/ 4088static void 4089pads(pmap_t pm) 4090{ 4091 int i, j; 4092 vm_paddr_t va; 4093 pt_entry_t *ptep; 4094 4095 if (pm == kernel_pmap) 4096 return; 4097 for (i = 0; i < NPDEPTD; i++) 4098 if (pm->pm_pdir[i]) 4099 for (j = 0; j < NPTEPG; j++) { 4100 va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 4101 if (pm == kernel_pmap && va < KERNBASE) 4102 continue; 4103 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 4104 continue; 4105 ptep = pmap_pte(pm, va); 4106 if (pmap_pte_v(ptep)) 4107 printf("%x:%x ", va, *ptep); 4108 }; 4109 4110} 4111 4112void 4113pmap_pvdump(vm_paddr_t pa) 4114{ 4115 pv_entry_t pv; 4116 pmap_t pmap; 4117 vm_page_t m; 4118 4119 printf("pa %x", pa); 4120 m = PHYS_TO_VM_PAGE(pa); 4121 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 4122 pmap = PV_PMAP(pv); 4123 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va); 4124 pads(pmap); 4125 } 4126 printf(" "); 4127} 4128#endif 4129