mp_machdep.c revision 184112
1182902Skmacy/*- 2182902Skmacy * Copyright (c) 1996, by Steve Passe 3182902Skmacy * Copyright (c) 2008, by Kip Macy 4182902Skmacy * All rights reserved. 5182902Skmacy * 6182902Skmacy * Redistribution and use in source and binary forms, with or without 7182902Skmacy * modification, are permitted provided that the following conditions 8182902Skmacy * are met: 9182902Skmacy * 1. Redistributions of source code must retain the above copyright 10182902Skmacy * notice, this list of conditions and the following disclaimer. 11182902Skmacy * 2. The name of the developer may NOT be used to endorse or promote products 12182902Skmacy * derived from this software without specific prior written permission. 13182902Skmacy * 14182902Skmacy * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15182902Skmacy * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16182902Skmacy * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17182902Skmacy * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18182902Skmacy * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19182902Skmacy * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20182902Skmacy * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21182902Skmacy * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22182902Skmacy * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23182902Skmacy * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24182902Skmacy * SUCH DAMAGE. 25182902Skmacy */ 26182902Skmacy 27182902Skmacy#include <sys/cdefs.h> 28182902Skmacy__FBSDID("$FreeBSD: head/sys/i386/xen/mp_machdep.c 184112 2008-10-21 06:39:40Z kmacy $"); 29182902Skmacy 30182902Skmacy#include "opt_apic.h" 31182902Skmacy#include "opt_cpu.h" 32182902Skmacy#include "opt_kstack_pages.h" 33182902Skmacy#include "opt_mp_watchdog.h" 34182902Skmacy#include "opt_sched.h" 35182902Skmacy#include "opt_smp.h" 36182902Skmacy 37182902Skmacy#if !defined(lint) 38182902Skmacy#if !defined(SMP) 39182902Skmacy#error How did you get here? 40182902Skmacy#endif 41182902Skmacy 42182902Skmacy#ifndef DEV_APIC 43182902Skmacy#error The apic device is required for SMP, add "device apic" to your config file. 44182902Skmacy#endif 45182902Skmacy#if defined(CPU_DISABLE_CMPXCHG) && !defined(COMPILING_LINT) 46182902Skmacy#error SMP not supported with CPU_DISABLE_CMPXCHG 47182902Skmacy#endif 48182902Skmacy#endif /* not lint */ 49182902Skmacy 50182902Skmacy#include <sys/param.h> 51182902Skmacy#include <sys/systm.h> 52182902Skmacy#include <sys/bus.h> 53182902Skmacy#include <sys/cons.h> /* cngetc() */ 54182902Skmacy#ifdef GPROF 55182902Skmacy#include <sys/gmon.h> 56182902Skmacy#endif 57182902Skmacy#include <sys/kernel.h> 58182902Skmacy#include <sys/ktr.h> 59182902Skmacy#include <sys/lock.h> 60182902Skmacy#include <sys/malloc.h> 61182902Skmacy#include <sys/memrange.h> 62182902Skmacy#include <sys/mutex.h> 63182902Skmacy#include <sys/pcpu.h> 64182902Skmacy#include <sys/proc.h> 65182902Skmacy#include <sys/sched.h> 66182902Skmacy#include <sys/smp.h> 67182902Skmacy#include <sys/sysctl.h> 68182902Skmacy 69182902Skmacy#include <vm/vm.h> 70182902Skmacy#include <vm/vm_param.h> 71182902Skmacy#include <vm/pmap.h> 72182902Skmacy#include <vm/vm_kern.h> 73182902Skmacy#include <vm/vm_extern.h> 74182902Skmacy#include <vm/vm_page.h> 75182902Skmacy 76182902Skmacy#include <machine/apicreg.h> 77182902Skmacy#include <machine/md_var.h> 78182902Skmacy#include <machine/mp_watchdog.h> 79182902Skmacy#include <machine/pcb.h> 80182902Skmacy#include <machine/psl.h> 81182902Skmacy#include <machine/smp.h> 82182902Skmacy#include <machine/specialreg.h> 83182902Skmacy#include <machine/pcpu.h> 84182902Skmacy 85182902Skmacy 86182902Skmacy 87182902Skmacy#include <machine/xen/xen-os.h> 88183379Skmacy#include <machine/xen/evtchn.h> 89184112Skmacy#include <machine/xen/xen_intr.h> 90182902Skmacy#include <machine/xen/hypervisor.h> 91182902Skmacy#include <xen/interface/vcpu.h> 92182902Skmacy 93182902Skmacy#define stop_cpus_with_nmi 0 94182902Skmacy 95182902Skmacy 96182902Skmacyint mp_naps; /* # of Applications processors */ 97182902Skmacyint boot_cpu_id = -1; /* designated BSP */ 98182902Skmacy 99182902Skmacyextern struct pcpu __pcpu[]; 100182902Skmacy 101182902Skmacystatic int bootAP; 102182902Skmacystatic union descriptor *bootAPgdt; 103182902Skmacy 104184112Skmacystatic DEFINE_PER_CPU(int, resched_irq); 105184112Skmacystatic DEFINE_PER_CPU(int, callfunc_irq); 106184112Skmacystatic char resched_name[NR_CPUS][15]; 107184112Skmacystatic char callfunc_name[NR_CPUS][15]; 108182902Skmacy 109182902Skmacy/* Free these after use */ 110182902Skmacyvoid *bootstacks[MAXCPU]; 111182902Skmacy 112182902Skmacy/* Hotwire a 0->4MB V==P mapping */ 113182902Skmacyextern pt_entry_t *KPTphys; 114182902Skmacy 115182902Skmacystruct pcb stoppcbs[MAXCPU]; 116182902Skmacy 117182902Skmacy/* Variables needed for SMP tlb shootdown. */ 118182902Skmacyvm_offset_t smp_tlb_addr1; 119182902Skmacyvm_offset_t smp_tlb_addr2; 120182902Skmacyvolatile int smp_tlb_wait; 121182902Skmacy 122184112Skmacytypedef void call_data_func_t(uintptr_t , uintptr_t); 123184112Skmacy 124182902Skmacystatic u_int logical_cpus; 125182902Skmacy 126182902Skmacy/* used to hold the AP's until we are ready to release them */ 127182902Skmacystatic struct mtx ap_boot_mtx; 128182902Skmacy 129182902Skmacy/* Set to 1 once we're ready to let the APs out of the pen. */ 130182902Skmacystatic volatile int aps_ready = 0; 131182902Skmacy 132182902Skmacy/* 133182902Skmacy * Store data from cpu_add() until later in the boot when we actually setup 134182902Skmacy * the APs. 135182902Skmacy */ 136182902Skmacystruct cpu_info { 137182902Skmacy int cpu_present:1; 138182902Skmacy int cpu_bsp:1; 139182902Skmacy int cpu_disabled:1; 140182902Skmacy} static cpu_info[MAX_APIC_ID + 1]; 141182902Skmacyint cpu_apic_ids[MAXCPU]; 142182902Skmacy 143182902Skmacy/* Holds pending bitmap based IPIs per CPU */ 144182902Skmacystatic volatile u_int cpu_ipi_pending[MAXCPU]; 145182902Skmacy 146182902Skmacystatic void assign_cpu_ids(void); 147182902Skmacystatic void set_interrupt_apic_ids(void); 148182902Skmacyint start_all_aps(void); 149182902Skmacystatic int start_ap(int apic_id); 150182902Skmacystatic void release_aps(void *dummy); 151182902Skmacy 152182902Skmacystatic u_int hyperthreading_cpus; 153182902Skmacystatic cpumask_t hyperthreading_cpus_mask; 154182902Skmacy 155182902Skmacyextern void Xhypervisor_callback(void); 156182902Skmacyextern void failsafe_callback(void); 157182902Skmacy 158182902Skmacystruct cpu_group * 159182902Skmacycpu_topo(void) 160182902Skmacy{ 161182902Skmacy if (cpu_cores == 0) 162182902Skmacy cpu_cores = 1; 163182902Skmacy if (cpu_logical == 0) 164182902Skmacy cpu_logical = 1; 165182902Skmacy if (mp_ncpus % (cpu_cores * cpu_logical) != 0) { 166182902Skmacy printf("WARNING: Non-uniform processors.\n"); 167182902Skmacy printf("WARNING: Using suboptimal topology.\n"); 168182902Skmacy return (smp_topo_none()); 169182902Skmacy } 170182902Skmacy /* 171182902Skmacy * No multi-core or hyper-threaded. 172182902Skmacy */ 173182902Skmacy if (cpu_logical * cpu_cores == 1) 174182902Skmacy return (smp_topo_none()); 175182902Skmacy /* 176182902Skmacy * Only HTT no multi-core. 177182902Skmacy */ 178182902Skmacy if (cpu_logical > 1 && cpu_cores == 1) 179182902Skmacy return (smp_topo_1level(CG_SHARE_L1, cpu_logical, CG_FLAG_HTT)); 180182902Skmacy /* 181182902Skmacy * Only multi-core no HTT. 182182902Skmacy */ 183182902Skmacy if (cpu_cores > 1 && cpu_logical == 1) 184182902Skmacy return (smp_topo_1level(CG_SHARE_NONE, cpu_cores, 0)); 185182902Skmacy /* 186182902Skmacy * Both HTT and multi-core. 187182902Skmacy */ 188182902Skmacy return (smp_topo_2level(CG_SHARE_NONE, cpu_cores, 189182902Skmacy CG_SHARE_L1, cpu_logical, CG_FLAG_HTT)); 190182902Skmacy} 191182902Skmacy 192182902Skmacy/* 193182902Skmacy * Calculate usable address in base memory for AP trampoline code. 194182902Skmacy */ 195182902Skmacyu_int 196182902Skmacymp_bootaddress(u_int basemem) 197182902Skmacy{ 198182902Skmacy 199182902Skmacy return (basemem); 200182902Skmacy} 201182902Skmacy 202182902Skmacyvoid 203182902Skmacycpu_add(u_int apic_id, char boot_cpu) 204182902Skmacy{ 205182902Skmacy 206182902Skmacy if (apic_id > MAX_APIC_ID) { 207182902Skmacy panic("SMP: APIC ID %d too high", apic_id); 208182902Skmacy return; 209182902Skmacy } 210182902Skmacy KASSERT(cpu_info[apic_id].cpu_present == 0, ("CPU %d added twice", 211182902Skmacy apic_id)); 212182902Skmacy cpu_info[apic_id].cpu_present = 1; 213182902Skmacy if (boot_cpu) { 214182902Skmacy KASSERT(boot_cpu_id == -1, 215182902Skmacy ("CPU %d claims to be BSP, but CPU %d already is", apic_id, 216182902Skmacy boot_cpu_id)); 217182902Skmacy boot_cpu_id = apic_id; 218182902Skmacy cpu_info[apic_id].cpu_bsp = 1; 219182902Skmacy } 220182902Skmacy if (mp_ncpus < MAXCPU) 221182902Skmacy mp_ncpus++; 222182902Skmacy if (bootverbose) 223182902Skmacy printf("SMP: Added CPU %d (%s)\n", apic_id, boot_cpu ? "BSP" : 224182902Skmacy "AP"); 225182902Skmacy} 226182902Skmacy 227182902Skmacyvoid 228182902Skmacycpu_mp_setmaxid(void) 229182902Skmacy{ 230182902Skmacy 231182902Skmacy mp_maxid = MAXCPU - 1; 232182902Skmacy} 233182902Skmacy 234182902Skmacyint 235182902Skmacycpu_mp_probe(void) 236182902Skmacy{ 237182902Skmacy 238182902Skmacy /* 239182902Skmacy * Always record BSP in CPU map so that the mbuf init code works 240182902Skmacy * correctly. 241182902Skmacy */ 242182902Skmacy all_cpus = 1; 243182902Skmacy if (mp_ncpus == 0) { 244182902Skmacy /* 245182902Skmacy * No CPUs were found, so this must be a UP system. Setup 246182902Skmacy * the variables to represent a system with a single CPU 247182902Skmacy * with an id of 0. 248182902Skmacy */ 249182902Skmacy mp_ncpus = 1; 250182902Skmacy return (0); 251182902Skmacy } 252182902Skmacy 253182902Skmacy /* At least one CPU was found. */ 254182902Skmacy if (mp_ncpus == 1) { 255182902Skmacy /* 256182902Skmacy * One CPU was found, so this must be a UP system with 257182902Skmacy * an I/O APIC. 258182902Skmacy */ 259182902Skmacy return (0); 260182902Skmacy } 261182902Skmacy 262182902Skmacy /* At least two CPUs were found. */ 263182902Skmacy return (1); 264182902Skmacy} 265182902Skmacy 266182902Skmacy/* 267182902Skmacy * Initialize the IPI handlers and start up the AP's. 268182902Skmacy */ 269182902Skmacyvoid 270182902Skmacycpu_mp_start(void) 271182902Skmacy{ 272182902Skmacy int i; 273182902Skmacy 274182902Skmacy /* Initialize the logical ID to APIC ID table. */ 275182902Skmacy for (i = 0; i < MAXCPU; i++) { 276182902Skmacy cpu_apic_ids[i] = -1; 277182902Skmacy cpu_ipi_pending[i] = 0; 278182902Skmacy } 279182902Skmacy 280182902Skmacy /* Set boot_cpu_id if needed. */ 281182902Skmacy if (boot_cpu_id == -1) { 282182902Skmacy boot_cpu_id = PCPU_GET(apic_id); 283182902Skmacy cpu_info[boot_cpu_id].cpu_bsp = 1; 284182902Skmacy } else 285182902Skmacy KASSERT(boot_cpu_id == PCPU_GET(apic_id), 286182902Skmacy ("BSP's APIC ID doesn't match boot_cpu_id")); 287182902Skmacy cpu_apic_ids[0] = boot_cpu_id; 288182902Skmacy 289182902Skmacy assign_cpu_ids(); 290182902Skmacy 291182902Skmacy /* Start each Application Processor */ 292182902Skmacy start_all_aps(); 293182902Skmacy 294182902Skmacy /* Setup the initial logical CPUs info. */ 295182902Skmacy logical_cpus = logical_cpus_mask = 0; 296182902Skmacy if (cpu_feature & CPUID_HTT) 297182902Skmacy logical_cpus = (cpu_procinfo & CPUID_HTT_CORES) >> 16; 298182902Skmacy 299182902Skmacy set_interrupt_apic_ids(); 300182902Skmacy} 301182902Skmacy 302182902Skmacy 303184112Skmacystatic void 304184112Skmacyiv_rendezvous(uintptr_t a, uintptr_t b) 305184112Skmacy{ 306184112Skmacy 307184112Skmacy} 308184112Skmacy 309184112Skmacystatic void 310184112Skmacyiv_invltlb(uintptr_t a, uintptr_t b) 311184112Skmacy{ 312184112Skmacy 313184112Skmacy} 314184112Skmacy 315184112Skmacystatic void 316184112Skmacyiv_invlpg(uintptr_t a, uintptr_t b) 317184112Skmacy{ 318184112Skmacy 319184112Skmacy} 320184112Skmacy 321184112Skmacystatic void 322184112Skmacyiv_invlrng(uintptr_t a, uintptr_t b) 323184112Skmacy{ 324184112Skmacy 325184112Skmacy} 326184112Skmacy 327184112Skmacystatic void 328184112Skmacyiv_invlcache(uintptr_t a, uintptr_t b) 329184112Skmacy{ 330184112Skmacy 331184112Skmacy} 332184112Skmacy 333184112Skmacystatic void 334184112Skmacyiv_lazypmap(uintptr_t a, uintptr_t b) 335184112Skmacy{ 336184112Skmacy 337184112Skmacy} 338184112Skmacy 339184112Skmacystatic void 340184112Skmacyiv_bitmap_vector(uintptr_t a, uintptr_t b) 341184112Skmacy{ 342184112Skmacy 343184112Skmacy} 344184112Skmacy 345184112Skmacy 346184112Skmacystatic call_data_func_t *ipi_vectors[IPI_BITMAP_VECTOR + 1] = 347184112Skmacy{ iv_rendezvous, 348184112Skmacy iv_invltlb, 349184112Skmacy iv_invlpg, 350184112Skmacy iv_invlrng, 351184112Skmacy iv_invlcache, 352184112Skmacy iv_lazypmap, 353184112Skmacy iv_bitmap_vector 354184112Skmacy}; 355184112Skmacy 356182902Skmacy/* 357184112Skmacy * Reschedule call back. Nothing to do, 358184112Skmacy * all the work is done automatically when 359184112Skmacy * we return from the interrupt. 360184112Skmacy */ 361184112Skmacystatic void 362184112Skmacysmp_reschedule_interrupt(void *unused) 363184112Skmacy{ 364184112Skmacy} 365184112Skmacy 366184112Skmacystruct _call_data { 367184112Skmacy call_data_func_t *func; 368184112Skmacy uintptr_t arg1; 369184112Skmacy uintptr_t arg2; 370184112Skmacy atomic_t started; 371184112Skmacy atomic_t finished; 372184112Skmacy int wait; 373184112Skmacy}; 374184112Skmacy 375184112Skmacystatic struct _call_data *call_data; 376184112Skmacy 377184112Skmacystatic void 378184112Skmacysmp_call_function_interrupt(void *unused) 379184112Skmacy{ 380184112Skmacy call_data_func_t *func = call_data->func; 381184112Skmacy uintptr_t arg1 = call_data->arg1; 382184112Skmacy uintptr_t arg2 = call_data->arg2; 383184112Skmacy int wait = call_data->wait; 384184112Skmacy 385184112Skmacy /* 386184112Skmacy * Notify initiating CPU that I've grabbed the data and am 387184112Skmacy * about to execute the function 388184112Skmacy */ 389184112Skmacy mb(); 390184112Skmacy atomic_inc(&call_data->started); 391184112Skmacy /* 392184112Skmacy * At this point the info structure may be out of scope unless wait==1 393184112Skmacy */ 394184112Skmacy (*func)(arg1, arg2); 395184112Skmacy 396184112Skmacy if (wait) { 397184112Skmacy mb(); 398184112Skmacy atomic_inc(&call_data->finished); 399184112Skmacy } 400184112Skmacy} 401184112Skmacy 402184112Skmacy/* 403182902Skmacy * Print various information about the SMP system hardware and setup. 404182902Skmacy */ 405182902Skmacyvoid 406182902Skmacycpu_mp_announce(void) 407182902Skmacy{ 408182902Skmacy int i, x; 409182902Skmacy 410182902Skmacy /* List CPUs */ 411182902Skmacy printf(" cpu0 (BSP): APIC ID: %2d\n", boot_cpu_id); 412182902Skmacy for (i = 1, x = 0; x <= MAX_APIC_ID; x++) { 413182902Skmacy if (!cpu_info[x].cpu_present || cpu_info[x].cpu_bsp) 414182902Skmacy continue; 415182902Skmacy if (cpu_info[x].cpu_disabled) 416182902Skmacy printf(" cpu (AP): APIC ID: %2d (disabled)\n", x); 417182902Skmacy else { 418182902Skmacy KASSERT(i < mp_ncpus, 419182902Skmacy ("mp_ncpus and actual cpus are out of whack")); 420182902Skmacy printf(" cpu%d (AP): APIC ID: %2d\n", i++, x); 421182902Skmacy } 422182902Skmacy } 423182902Skmacy} 424182902Skmacy 425184112Skmacy 426184112Skmacystatic int 427184112Skmacyxen_smp_intr_init(unsigned int cpu) 428184112Skmacy{ 429184112Skmacy int rc; 430184112Skmacy 431184112Skmacy per_cpu(resched_irq, cpu) = per_cpu(callfunc_irq, cpu) = -1; 432184112Skmacy 433184112Skmacy sprintf(resched_name[cpu], "resched%u", cpu); 434184112Skmacy rc = bind_ipi_to_irqhandler(RESCHEDULE_VECTOR, 435184112Skmacy cpu, 436184112Skmacy resched_name[cpu], 437184112Skmacy smp_reschedule_interrupt, 438184112Skmacy INTR_FAST); 439184112Skmacy 440184112Skmacy per_cpu(resched_irq, cpu) = rc; 441184112Skmacy 442184112Skmacy sprintf(callfunc_name[cpu], "callfunc%u", cpu); 443184112Skmacy rc = bind_ipi_to_irqhandler(CALL_FUNCTION_VECTOR, 444184112Skmacy cpu, 445184112Skmacy callfunc_name[cpu], 446184112Skmacy smp_call_function_interrupt, 447184112Skmacy INTR_FAST); 448184112Skmacy if (rc < 0) 449184112Skmacy goto fail; 450184112Skmacy per_cpu(callfunc_irq, cpu) = rc; 451184112Skmacy 452184112Skmacy if ((cpu != 0) && ((rc = ap_cpu_initclocks(cpu)) != 0)) 453184112Skmacy goto fail; 454184112Skmacy 455184112Skmacy return 0; 456184112Skmacy 457184112Skmacy fail: 458184112Skmacy if (per_cpu(resched_irq, cpu) >= 0) 459184112Skmacy unbind_from_irqhandler(per_cpu(resched_irq, cpu), NULL); 460184112Skmacy if (per_cpu(callfunc_irq, cpu) >= 0) 461184112Skmacy unbind_from_irqhandler(per_cpu(callfunc_irq, cpu), NULL); 462184112Skmacy return rc; 463184112Skmacy} 464184112Skmacy 465182902Skmacy#define MTOPSIZE (1<<(14 + PAGE_SHIFT)) 466182902Skmacy 467182902Skmacy/* 468182902Skmacy * AP CPU's call this to initialize themselves. 469182902Skmacy */ 470182902Skmacyvoid 471182902Skmacyinit_secondary(void) 472182902Skmacy{ 473182902Skmacy vm_offset_t addr; 474182902Skmacy int gsel_tss; 475182902Skmacy 476182902Skmacy 477182902Skmacy /* bootAP is set in start_ap() to our ID. */ 478182902Skmacy PCPU_SET(currentldt, _default_ldt); 479182902Skmacy gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 480182902Skmacy#if 0 481182902Skmacy gdt[bootAP * NGDT + GPROC0_SEL].sd.sd_type = SDT_SYS386TSS; 482182902Skmacy#endif 483182902Skmacy PCPU_SET(common_tss.tss_esp0, 0); /* not used until after switch */ 484182902Skmacy PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL)); 485182902Skmacy PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16); 486182902Skmacy#if 0 487182902Skmacy PCPU_SET(tss_gdt, &gdt[bootAP * NGDT + GPROC0_SEL].sd); 488182902Skmacy 489182902Skmacy PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); 490182902Skmacy#endif 491182902Skmacy PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd); 492182902Skmacy 493182902Skmacy /* 494182902Skmacy * Set to a known state: 495182902Skmacy * Set by mpboot.s: CR0_PG, CR0_PE 496182902Skmacy * Set by cpu_setregs: CR0_NE, CR0_MP, CR0_TS, CR0_WP, CR0_AM 497182902Skmacy */ 498182902Skmacy /* 499182902Skmacy * signal our startup to the BSP. 500182902Skmacy */ 501182902Skmacy mp_naps++; 502182902Skmacy 503182902Skmacy /* Spin until the BSP releases the AP's. */ 504182902Skmacy while (!aps_ready) 505182902Skmacy ia32_pause(); 506182902Skmacy 507182902Skmacy /* BSP may have changed PTD while we were waiting */ 508182902Skmacy invltlb(); 509182902Skmacy for (addr = 0; addr < NKPT * NBPDR - 1; addr += PAGE_SIZE) 510182902Skmacy invlpg(addr); 511182902Skmacy 512182902Skmacy /* set up FPU state on the AP */ 513182902Skmacy npxinit(__INITIAL_NPXCW__); 514182902Skmacy#if 0 515182902Skmacy 516182902Skmacy /* set up SSE registers */ 517182902Skmacy enable_sse(); 518182902Skmacy#endif 519182902Skmacy#if 0 && defined(PAE) 520182902Skmacy /* Enable the PTE no-execute bit. */ 521182902Skmacy if ((amd_feature & AMDID_NX) != 0) { 522182902Skmacy uint64_t msr; 523182902Skmacy 524182902Skmacy msr = rdmsr(MSR_EFER) | EFER_NXE; 525182902Skmacy wrmsr(MSR_EFER, msr); 526182902Skmacy } 527182902Skmacy#endif 528182902Skmacy#if 0 529182902Skmacy /* A quick check from sanity claus */ 530182902Skmacy if (PCPU_GET(apic_id) != lapic_id()) { 531182902Skmacy printf("SMP: cpuid = %d\n", PCPU_GET(cpuid)); 532182902Skmacy printf("SMP: actual apic_id = %d\n", lapic_id()); 533182902Skmacy printf("SMP: correct apic_id = %d\n", PCPU_GET(apic_id)); 534182902Skmacy panic("cpuid mismatch! boom!!"); 535182902Skmacy } 536182902Skmacy#endif 537182902Skmacy 538182902Skmacy /* Initialize curthread. */ 539182902Skmacy KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread")); 540182902Skmacy PCPU_SET(curthread, PCPU_GET(idlethread)); 541182902Skmacy 542182902Skmacy mtx_lock_spin(&ap_boot_mtx); 543182902Skmacy#if 0 544182902Skmacy 545182902Skmacy /* Init local apic for irq's */ 546182902Skmacy lapic_setup(1); 547182902Skmacy#endif 548182902Skmacy smp_cpus++; 549182902Skmacy 550182902Skmacy CTR1(KTR_SMP, "SMP: AP CPU #%d Launched", PCPU_GET(cpuid)); 551182902Skmacy printf("SMP: AP CPU #%d Launched!\n", PCPU_GET(cpuid)); 552182902Skmacy 553182902Skmacy /* Determine if we are a logical CPU. */ 554182902Skmacy if (logical_cpus > 1 && PCPU_GET(apic_id) % logical_cpus != 0) 555182902Skmacy logical_cpus_mask |= PCPU_GET(cpumask); 556182902Skmacy 557182902Skmacy /* Determine if we are a hyperthread. */ 558182902Skmacy if (hyperthreading_cpus > 1 && 559182902Skmacy PCPU_GET(apic_id) % hyperthreading_cpus != 0) 560182902Skmacy hyperthreading_cpus_mask |= PCPU_GET(cpumask); 561182902Skmacy 562182902Skmacy /* Build our map of 'other' CPUs. */ 563182902Skmacy PCPU_SET(other_cpus, all_cpus & ~PCPU_GET(cpumask)); 564182902Skmacy#if 0 565182902Skmacy if (bootverbose) 566182902Skmacy lapic_dump("AP"); 567182902Skmacy#endif 568182902Skmacy if (smp_cpus == mp_ncpus) { 569182902Skmacy /* enable IPI's, tlb shootdown, freezes etc */ 570182902Skmacy atomic_store_rel_int(&smp_started, 1); 571182902Skmacy smp_active = 1; /* historic */ 572182902Skmacy } 573182902Skmacy 574184112Skmacy xen_smp_intr_init(bootAP); 575182902Skmacy mtx_unlock_spin(&ap_boot_mtx); 576182902Skmacy 577182902Skmacy /* wait until all the AP's are up */ 578182902Skmacy while (smp_started == 0) 579182902Skmacy ia32_pause(); 580182902Skmacy 581183131Skmacy 582183131Skmacy PCPU_SET(curthread, PCPU_GET(idlethread)); 583182902Skmacy /* enter the scheduler */ 584182902Skmacy sched_throw(NULL); 585182902Skmacy 586182902Skmacy panic("scheduler returned us to %s", __func__); 587182902Skmacy /* NOTREACHED */ 588182902Skmacy} 589182902Skmacy 590182902Skmacy/******************************************************************* 591182902Skmacy * local functions and data 592182902Skmacy */ 593182902Skmacy 594182902Skmacy/* 595182902Skmacy * We tell the I/O APIC code about all the CPUs we want to receive 596182902Skmacy * interrupts. If we don't want certain CPUs to receive IRQs we 597182902Skmacy * can simply not tell the I/O APIC code about them in this function. 598182902Skmacy * We also do not tell it about the BSP since it tells itself about 599182902Skmacy * the BSP internally to work with UP kernels and on UP machines. 600182902Skmacy */ 601182902Skmacystatic void 602182902Skmacyset_interrupt_apic_ids(void) 603182902Skmacy{ 604182902Skmacy u_int i, apic_id; 605182902Skmacy 606182902Skmacy for (i = 0; i < MAXCPU; i++) { 607182902Skmacy apic_id = cpu_apic_ids[i]; 608182902Skmacy if (apic_id == -1) 609182902Skmacy continue; 610182902Skmacy if (cpu_info[apic_id].cpu_bsp) 611182902Skmacy continue; 612182902Skmacy if (cpu_info[apic_id].cpu_disabled) 613182902Skmacy continue; 614182902Skmacy 615182902Skmacy /* Don't let hyperthreads service interrupts. */ 616182902Skmacy if (hyperthreading_cpus > 1 && 617182902Skmacy apic_id % hyperthreading_cpus != 0) 618182902Skmacy continue; 619182902Skmacy 620182902Skmacy intr_add_cpu(i); 621182902Skmacy } 622182902Skmacy} 623182902Skmacy 624182902Skmacy/* 625182902Skmacy * Assign logical CPU IDs to local APICs. 626182902Skmacy */ 627182902Skmacystatic void 628182902Skmacyassign_cpu_ids(void) 629182902Skmacy{ 630182902Skmacy u_int i; 631182902Skmacy 632182902Skmacy /* Check for explicitly disabled CPUs. */ 633182902Skmacy for (i = 0; i <= MAX_APIC_ID; i++) { 634182902Skmacy if (!cpu_info[i].cpu_present || cpu_info[i].cpu_bsp) 635182902Skmacy continue; 636182902Skmacy 637182902Skmacy /* Don't use this CPU if it has been disabled by a tunable. */ 638182902Skmacy if (resource_disabled("lapic", i)) { 639182902Skmacy cpu_info[i].cpu_disabled = 1; 640182902Skmacy continue; 641182902Skmacy } 642182902Skmacy } 643182902Skmacy 644182902Skmacy /* 645182902Skmacy * Assign CPU IDs to local APIC IDs and disable any CPUs 646182902Skmacy * beyond MAXCPU. CPU 0 has already been assigned to the BSP, 647182902Skmacy * so we only have to assign IDs for APs. 648182902Skmacy */ 649182902Skmacy mp_ncpus = 1; 650182902Skmacy for (i = 0; i <= MAX_APIC_ID; i++) { 651182902Skmacy if (!cpu_info[i].cpu_present || cpu_info[i].cpu_bsp || 652182902Skmacy cpu_info[i].cpu_disabled) 653182902Skmacy continue; 654182902Skmacy 655182902Skmacy if (mp_ncpus < MAXCPU) { 656182902Skmacy cpu_apic_ids[mp_ncpus] = i; 657182902Skmacy mp_ncpus++; 658182902Skmacy } else 659182902Skmacy cpu_info[i].cpu_disabled = 1; 660182902Skmacy } 661182902Skmacy KASSERT(mp_maxid >= mp_ncpus - 1, 662182902Skmacy ("%s: counters out of sync: max %d, count %d", __func__, mp_maxid, 663182902Skmacy mp_ncpus)); 664182902Skmacy} 665182902Skmacy 666182902Skmacy/* 667182902Skmacy * start each AP in our list 668182902Skmacy */ 669182902Skmacy/* Lowest 1MB is already mapped: don't touch*/ 670182902Skmacy#define TMPMAP_START 1 671182902Skmacyint 672182902Skmacystart_all_aps(void) 673182902Skmacy{ 674182902Skmacy int x,apic_id, cpu; 675182902Skmacy struct pcpu *pc; 676182902Skmacy 677182902Skmacy mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); 678182902Skmacy 679182902Skmacy /* set up temporary P==V mapping for AP boot */ 680182902Skmacy /* XXX this is a hack, we should boot the AP on its own stack/PTD */ 681182902Skmacy 682182902Skmacy /* start each AP */ 683182902Skmacy for (cpu = 1; cpu < mp_ncpus; cpu++) { 684182902Skmacy apic_id = cpu_apic_ids[cpu]; 685182902Skmacy 686182902Skmacy 687182902Skmacy bootAP = cpu; 688182902Skmacy bootAPgdt = gdt + (512*cpu); 689182902Skmacy 690182902Skmacy /* Get per-cpu data */ 691182902Skmacy pc = &__pcpu[bootAP]; 692183132Skmacy pcpu_init(pc, bootAP, sizeof(struct pcpu)); 693182902Skmacy pc->pc_apic_id = cpu_apic_ids[bootAP]; 694182902Skmacy pc->pc_prvspace = pc; 695182902Skmacy pc->pc_curthread = 0; 696182902Skmacy 697182902Skmacy gdt_segs[GPRIV_SEL].ssd_base = (int) pc; 698182902Skmacy gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss; 699182902Skmacy 700182902Skmacy PT_SET_MA(bootAPgdt, xpmap_ptom(VTOP(bootAPgdt)) | PG_V | PG_RW); 701182902Skmacy bzero(bootAPgdt, PAGE_SIZE); 702182902Skmacy for (x = 0; x < NGDT; x++) 703182902Skmacy ssdtosd(&gdt_segs[x], &bootAPgdt[x].sd); 704182902Skmacy PT_SET_MA(bootAPgdt, vtomach(bootAPgdt) | PG_V); 705183345Skmacy#ifdef notyet 706183345Skmacy 707183345Skmacy if (HYPERVISOR_vcpu_op(VCPUOP_get_physid, cpu, &cpu_id) == 0) { 708183345Skmacy apicid = xen_vcpu_physid_to_x86_apicid(cpu_id.phys_id); 709183345Skmacy acpiid = xen_vcpu_physid_to_x86_acpiid(cpu_id.phys_id); 710183345Skmacy#ifdef CONFIG_ACPI 711183345Skmacy if (acpiid != 0xff) 712183345Skmacy x86_acpiid_to_apicid[acpiid] = apicid; 713183345Skmacy#endif 714183345Skmacy } 715183345Skmacy#endif 716183345Skmacy 717182902Skmacy /* attempt to start the Application Processor */ 718182902Skmacy if (!start_ap(cpu)) { 719182902Skmacy printf("AP #%d (PHY# %d) failed!\n", cpu, apic_id); 720182902Skmacy /* better panic as the AP may be running loose */ 721182902Skmacy printf("panic y/n? [y] "); 722182902Skmacy if (cngetc() != 'n') 723182902Skmacy panic("bye-bye"); 724182902Skmacy } 725182902Skmacy 726182902Skmacy all_cpus |= (1 << cpu); /* record AP in CPU map */ 727182902Skmacy } 728182902Skmacy 729182902Skmacy 730182902Skmacy /* build our map of 'other' CPUs */ 731182902Skmacy PCPU_SET(other_cpus, all_cpus & ~PCPU_GET(cpumask)); 732182902Skmacy 733182902Skmacy pmap_invalidate_range(kernel_pmap, 0, NKPT * NBPDR - 1); 734182902Skmacy 735182902Skmacy /* number of APs actually started */ 736182902Skmacy return mp_naps; 737182902Skmacy} 738182902Skmacy 739182902Skmacyextern uint8_t *pcpu_boot_stack; 740182902Skmacyextern trap_info_t trap_table[]; 741182902Skmacy 742182902Skmacystatic void 743182902Skmacysmp_trap_init(trap_info_t *trap_ctxt) 744182902Skmacy{ 745182902Skmacy const trap_info_t *t = trap_table; 746182902Skmacy 747182902Skmacy for (t = trap_table; t->address; t++) { 748182902Skmacy trap_ctxt[t->vector].flags = t->flags; 749182902Skmacy trap_ctxt[t->vector].cs = t->cs; 750182902Skmacy trap_ctxt[t->vector].address = t->address; 751182902Skmacy } 752182902Skmacy} 753182902Skmacy 754182902Skmacyextern int nkpt; 755184112Skmacystatic void 756182902Skmacycpu_initialize_context(unsigned int cpu) 757182902Skmacy{ 758182902Skmacy /* vcpu_guest_context_t is too large to allocate on the stack. 759182902Skmacy * Hence we allocate statically and protect it with a lock */ 760182902Skmacy vm_page_t m[4]; 761182902Skmacy static vcpu_guest_context_t ctxt; 762182902Skmacy vm_offset_t boot_stack; 763183131Skmacy vm_offset_t newPTD; 764183131Skmacy vm_paddr_t ma[NPGPTD]; 765182902Skmacy static int color; 766182902Skmacy int i; 767182902Skmacy 768182902Skmacy /* 769183131Skmacy * Page 0,[0-3] PTD 770183131Skmacy * Page 1, [4] boot stack 771183131Skmacy * Page [5] PDPT 772182902Skmacy * 773182902Skmacy */ 774183131Skmacy for (i = 0; i < NPGPTD + 2; i++) { 775182902Skmacy m[i] = vm_page_alloc(NULL, color++, 776182902Skmacy VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 777182902Skmacy VM_ALLOC_ZERO); 778182902Skmacy 779182902Skmacy pmap_zero_page(m[i]); 780182902Skmacy 781182902Skmacy } 782183131Skmacy boot_stack = kmem_alloc_nofault(kernel_map, 1); 783183131Skmacy newPTD = kmem_alloc_nofault(kernel_map, NPGPTD); 784183131Skmacy ma[0] = xpmap_ptom(VM_PAGE_TO_PHYS(m[0]))|PG_V; 785182902Skmacy 786183131Skmacy#ifdef PAE 787183131Skmacy pmap_kenter(boot_stack, VM_PAGE_TO_PHYS(m[NPGPTD + 1])); 788183131Skmacy for (i = 0; i < NPGPTD; i++) { 789183131Skmacy ((vm_paddr_t *)boot_stack)[i] = 790183131Skmacy ma[i] = 791183131Skmacy xpmap_ptom(VM_PAGE_TO_PHYS(m[i]))|PG_V; 792182902Skmacy } 793183131Skmacy#endif 794182902Skmacy 795182902Skmacy /* 796182902Skmacy * Copy cpu0 IdlePTD to new IdlePTD - copying only 797182902Skmacy * kernel mappings 798182902Skmacy */ 799183131Skmacy pmap_qenter(newPTD, m, 4); 800183131Skmacy 801183131Skmacy memcpy((uint8_t *)newPTD + KPTDI*sizeof(vm_paddr_t), 802183131Skmacy (uint8_t *)PTOV(IdlePTD) + KPTDI*sizeof(vm_paddr_t), 803182902Skmacy nkpt*sizeof(vm_paddr_t)); 804183131Skmacy 805183131Skmacy pmap_qremove(newPTD, 4); 806183131Skmacy kmem_free(kernel_map, newPTD, 4); 807182902Skmacy /* 808182902Skmacy * map actual idle stack to boot_stack 809182902Skmacy */ 810183131Skmacy pmap_kenter(boot_stack, VM_PAGE_TO_PHYS(m[NPGPTD])); 811182902Skmacy 812182902Skmacy 813183131Skmacy xen_pgdpt_pin(xpmap_ptom(VM_PAGE_TO_PHYS(m[NPGPTD + 1]))); 814182902Skmacy vm_page_lock_queues(); 815182902Skmacy for (i = 0; i < 4; i++) { 816183131Skmacy int pdir = (PTDPTDI + i) / NPDEPG; 817183131Skmacy int curoffset = (PTDPTDI + i) % NPDEPG; 818183131Skmacy 819182902Skmacy xen_queue_pt_update((vm_paddr_t) 820183131Skmacy ((ma[pdir] & ~PG_V) + (curoffset*sizeof(vm_paddr_t))), 821182902Skmacy ma[i]); 822182902Skmacy } 823182902Skmacy PT_UPDATES_FLUSH(); 824182902Skmacy vm_page_unlock_queues(); 825182902Skmacy 826182902Skmacy memset(&ctxt, 0, sizeof(ctxt)); 827182902Skmacy ctxt.flags = VGCF_IN_KERNEL; 828182902Skmacy ctxt.user_regs.ds = GSEL(GDATA_SEL, SEL_KPL); 829182902Skmacy ctxt.user_regs.es = GSEL(GDATA_SEL, SEL_KPL); 830182902Skmacy ctxt.user_regs.fs = GSEL(GPRIV_SEL, SEL_KPL); 831182902Skmacy ctxt.user_regs.gs = GSEL(GDATA_SEL, SEL_KPL); 832182902Skmacy ctxt.user_regs.cs = GSEL(GCODE_SEL, SEL_KPL); 833182902Skmacy ctxt.user_regs.ss = GSEL(GDATA_SEL, SEL_KPL); 834182902Skmacy ctxt.user_regs.eip = (unsigned long)init_secondary; 835182902Skmacy ctxt.user_regs.eflags = PSL_KERNEL | 0x1000; /* IOPL_RING1 */ 836182902Skmacy 837182902Skmacy memset(&ctxt.fpu_ctxt, 0, sizeof(ctxt.fpu_ctxt)); 838182902Skmacy 839182902Skmacy smp_trap_init(ctxt.trap_ctxt); 840182902Skmacy 841182902Skmacy ctxt.ldt_ents = 0; 842182902Skmacy ctxt.gdt_frames[0] = (uint32_t)((uint64_t)vtomach(bootAPgdt) >> PAGE_SHIFT); 843182902Skmacy ctxt.gdt_ents = 512; 844182902Skmacy 845182902Skmacy#ifdef __i386__ 846182902Skmacy ctxt.user_regs.esp = boot_stack + PAGE_SIZE; 847182902Skmacy 848182902Skmacy ctxt.kernel_ss = GSEL(GDATA_SEL, SEL_KPL); 849182902Skmacy ctxt.kernel_sp = boot_stack + PAGE_SIZE; 850182902Skmacy 851182902Skmacy ctxt.event_callback_cs = GSEL(GCODE_SEL, SEL_KPL); 852182902Skmacy ctxt.event_callback_eip = (unsigned long)Xhypervisor_callback; 853182902Skmacy ctxt.failsafe_callback_cs = GSEL(GCODE_SEL, SEL_KPL); 854182902Skmacy ctxt.failsafe_callback_eip = (unsigned long)failsafe_callback; 855182902Skmacy 856183131Skmacy ctxt.ctrlreg[3] = xpmap_ptom(VM_PAGE_TO_PHYS(m[NPGPTD + 1])); 857182902Skmacy#else /* __x86_64__ */ 858182902Skmacy ctxt.user_regs.esp = idle->thread.rsp0 - sizeof(struct pt_regs); 859182902Skmacy ctxt.kernel_ss = GSEL(GDATA_SEL, SEL_KPL); 860182902Skmacy ctxt.kernel_sp = idle->thread.rsp0; 861182902Skmacy 862182902Skmacy ctxt.event_callback_eip = (unsigned long)hypervisor_callback; 863182902Skmacy ctxt.failsafe_callback_eip = (unsigned long)failsafe_callback; 864182902Skmacy ctxt.syscall_callback_eip = (unsigned long)system_call; 865182902Skmacy 866182902Skmacy ctxt.ctrlreg[3] = xen_pfn_to_cr3(virt_to_mfn(init_level4_pgt)); 867182902Skmacy 868182902Skmacy ctxt.gs_base_kernel = (unsigned long)(cpu_pda(cpu)); 869182902Skmacy#endif 870182902Skmacy 871182902Skmacy printf("gdtpfn=%lx pdptpfn=%lx\n", 872182902Skmacy ctxt.gdt_frames[0], 873182902Skmacy ctxt.ctrlreg[3] >> PAGE_SHIFT); 874182902Skmacy 875182902Skmacy PANIC_IF(HYPERVISOR_vcpu_op(VCPUOP_initialise, cpu, &ctxt)); 876182902Skmacy DELAY(3000); 877182902Skmacy PANIC_IF(HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)); 878182902Skmacy} 879182902Skmacy 880182902Skmacy/* 881182902Skmacy * This function starts the AP (application processor) identified 882182902Skmacy * by the APIC ID 'physicalCpu'. It does quite a "song and dance" 883182902Skmacy * to accomplish this. This is necessary because of the nuances 884182902Skmacy * of the different hardware we might encounter. It isn't pretty, 885182902Skmacy * but it seems to work. 886182902Skmacy */ 887183131Skmacy 888183131Skmacyint cpus; 889182902Skmacystatic int 890182902Skmacystart_ap(int apic_id) 891182902Skmacy{ 892182902Skmacy int ms; 893182902Skmacy 894182902Skmacy /* used as a watchpoint to signal AP startup */ 895182902Skmacy cpus = mp_naps; 896182902Skmacy 897182902Skmacy cpu_initialize_context(apic_id); 898182902Skmacy 899182902Skmacy /* Wait up to 5 seconds for it to start. */ 900182902Skmacy for (ms = 0; ms < 5000; ms++) { 901182902Skmacy if (mp_naps > cpus) 902182902Skmacy return 1; /* return SUCCESS */ 903182902Skmacy DELAY(1000); 904182902Skmacy } 905182902Skmacy return 0; /* return FAILURE */ 906182902Skmacy} 907182902Skmacy 908182902Skmacy/* 909182902Skmacy * Flush the TLB on all other CPU's 910182902Skmacy */ 911182902Skmacystatic void 912182902Skmacysmp_tlb_shootdown(u_int vector, vm_offset_t addr1, vm_offset_t addr2) 913182902Skmacy{ 914182902Skmacy u_int ncpu; 915182902Skmacy 916182902Skmacy ncpu = mp_ncpus - 1; /* does not shootdown self */ 917182902Skmacy if (ncpu < 1) 918182902Skmacy return; /* no other cpus */ 919182902Skmacy if (!(read_eflags() & PSL_I)) 920182902Skmacy panic("%s: interrupts disabled", __func__); 921182902Skmacy mtx_lock_spin(&smp_ipi_mtx); 922184112Skmacy call_data->func = ipi_vectors[vector]; 923184112Skmacy call_data->arg1 = addr1; 924184112Skmacy call_data->arg2 = addr2; 925182902Skmacy atomic_store_rel_int(&smp_tlb_wait, 0); 926182902Skmacy ipi_all_but_self(vector); 927182902Skmacy while (smp_tlb_wait < ncpu) 928182902Skmacy ia32_pause(); 929182902Skmacy mtx_unlock_spin(&smp_ipi_mtx); 930182902Skmacy} 931182902Skmacy 932182902Skmacystatic void 933182902Skmacysmp_targeted_tlb_shootdown(u_int mask, u_int vector, vm_offset_t addr1, vm_offset_t addr2) 934182902Skmacy{ 935182902Skmacy int ncpu, othercpus; 936182902Skmacy 937182902Skmacy othercpus = mp_ncpus - 1; 938182902Skmacy if (mask == (u_int)-1) { 939182902Skmacy ncpu = othercpus; 940182902Skmacy if (ncpu < 1) 941182902Skmacy return; 942182902Skmacy } else { 943182902Skmacy mask &= ~PCPU_GET(cpumask); 944182902Skmacy if (mask == 0) 945182902Skmacy return; 946182902Skmacy ncpu = bitcount32(mask); 947182902Skmacy if (ncpu > othercpus) { 948182902Skmacy /* XXX this should be a panic offence */ 949182902Skmacy printf("SMP: tlb shootdown to %d other cpus (only have %d)\n", 950182902Skmacy ncpu, othercpus); 951182902Skmacy ncpu = othercpus; 952182902Skmacy } 953182902Skmacy /* XXX should be a panic, implied by mask == 0 above */ 954182902Skmacy if (ncpu < 1) 955182902Skmacy return; 956182902Skmacy } 957182902Skmacy if (!(read_eflags() & PSL_I)) 958182902Skmacy panic("%s: interrupts disabled", __func__); 959182902Skmacy mtx_lock_spin(&smp_ipi_mtx); 960182902Skmacy smp_tlb_addr1 = addr1; 961182902Skmacy smp_tlb_addr2 = addr2; 962182902Skmacy atomic_store_rel_int(&smp_tlb_wait, 0); 963182902Skmacy if (mask == (u_int)-1) 964182902Skmacy ipi_all_but_self(vector); 965182902Skmacy else 966182902Skmacy ipi_selected(mask, vector); 967182902Skmacy while (smp_tlb_wait < ncpu) 968182902Skmacy ia32_pause(); 969182902Skmacy mtx_unlock_spin(&smp_ipi_mtx); 970182902Skmacy} 971182902Skmacy 972182902Skmacyvoid 973182902Skmacysmp_cache_flush(void) 974182902Skmacy{ 975182902Skmacy 976182902Skmacy if (smp_started) 977182902Skmacy smp_tlb_shootdown(IPI_INVLCACHE, 0, 0); 978182902Skmacy} 979182902Skmacy 980182902Skmacyvoid 981182902Skmacysmp_invltlb(void) 982182902Skmacy{ 983182902Skmacy 984182902Skmacy if (smp_started) { 985182902Skmacy smp_tlb_shootdown(IPI_INVLTLB, 0, 0); 986182902Skmacy } 987182902Skmacy} 988182902Skmacy 989182902Skmacyvoid 990182902Skmacysmp_invlpg(vm_offset_t addr) 991182902Skmacy{ 992182902Skmacy 993182902Skmacy if (smp_started) { 994182902Skmacy smp_tlb_shootdown(IPI_INVLPG, addr, 0); 995182902Skmacy } 996182902Skmacy} 997182902Skmacy 998182902Skmacyvoid 999182902Skmacysmp_invlpg_range(vm_offset_t addr1, vm_offset_t addr2) 1000182902Skmacy{ 1001182902Skmacy 1002182902Skmacy if (smp_started) { 1003182902Skmacy smp_tlb_shootdown(IPI_INVLRNG, addr1, addr2); 1004182902Skmacy } 1005182902Skmacy} 1006182902Skmacy 1007182902Skmacyvoid 1008182902Skmacysmp_masked_invltlb(u_int mask) 1009182902Skmacy{ 1010182902Skmacy 1011182902Skmacy if (smp_started) { 1012182902Skmacy smp_targeted_tlb_shootdown(mask, IPI_INVLTLB, 0, 0); 1013182902Skmacy } 1014182902Skmacy} 1015182902Skmacy 1016182902Skmacyvoid 1017182902Skmacysmp_masked_invlpg(u_int mask, vm_offset_t addr) 1018182902Skmacy{ 1019182902Skmacy 1020182902Skmacy if (smp_started) { 1021182902Skmacy smp_targeted_tlb_shootdown(mask, IPI_INVLPG, addr, 0); 1022182902Skmacy } 1023182902Skmacy} 1024182902Skmacy 1025182902Skmacyvoid 1026182902Skmacysmp_masked_invlpg_range(u_int mask, vm_offset_t addr1, vm_offset_t addr2) 1027182902Skmacy{ 1028182902Skmacy 1029182902Skmacy if (smp_started) { 1030182902Skmacy smp_targeted_tlb_shootdown(mask, IPI_INVLRNG, addr1, addr2); 1031182902Skmacy } 1032182902Skmacy} 1033182902Skmacy 1034182902Skmacyvoid 1035182902Skmacyipi_bitmap_handler(struct trapframe frame) 1036182902Skmacy{ 1037182902Skmacy int cpu = PCPU_GET(cpuid); 1038182902Skmacy u_int ipi_bitmap; 1039182902Skmacy 1040182902Skmacy ipi_bitmap = atomic_readandclear_int(&cpu_ipi_pending[cpu]); 1041182902Skmacy 1042182902Skmacy if (ipi_bitmap & (1 << IPI_PREEMPT)) { 1043182902Skmacy sched_preempt(curthread); 1044182902Skmacy } 1045182902Skmacy} 1046182902Skmacy 1047182902Skmacy/* 1048182902Skmacy * send an IPI to a set of cpus. 1049182902Skmacy */ 1050182902Skmacyvoid 1051182902Skmacyipi_selected(u_int32_t cpus, u_int ipi) 1052182902Skmacy{ 1053182902Skmacy int cpu; 1054182902Skmacy u_int bitmap = 0; 1055182902Skmacy u_int old_pending; 1056182902Skmacy u_int new_pending; 1057182902Skmacy 1058182902Skmacy if (IPI_IS_BITMAPED(ipi)) { 1059182902Skmacy bitmap = 1 << ipi; 1060182902Skmacy ipi = IPI_BITMAP_VECTOR; 1061182902Skmacy } 1062182902Skmacy 1063182902Skmacy#ifdef STOP_NMI 1064182902Skmacy if (ipi == IPI_STOP && stop_cpus_with_nmi) { 1065182902Skmacy ipi_nmi_selected(cpus); 1066182902Skmacy return; 1067182902Skmacy } 1068182902Skmacy#endif 1069182902Skmacy CTR3(KTR_SMP, "%s: cpus: %x ipi: %x", __func__, cpus, ipi); 1070182902Skmacy while ((cpu = ffs(cpus)) != 0) { 1071182902Skmacy cpu--; 1072182902Skmacy cpus &= ~(1 << cpu); 1073182902Skmacy 1074182902Skmacy KASSERT(cpu_apic_ids[cpu] != -1, 1075182902Skmacy ("IPI to non-existent CPU %d", cpu)); 1076182902Skmacy 1077182902Skmacy if (bitmap) { 1078182902Skmacy do { 1079182902Skmacy old_pending = cpu_ipi_pending[cpu]; 1080182902Skmacy new_pending = old_pending | bitmap; 1081182902Skmacy } while (!atomic_cmpset_int(&cpu_ipi_pending[cpu],old_pending, new_pending)); 1082182902Skmacy 1083182902Skmacy if (old_pending) 1084182902Skmacy continue; 1085182902Skmacy } 1086182902Skmacy 1087183345Skmacy ipi_pcpu(cpu, ipi); 1088182902Skmacy } 1089182902Skmacy} 1090182902Skmacy 1091182902Skmacy/* 1092182902Skmacy * send an IPI to all CPUs EXCEPT myself 1093182902Skmacy */ 1094182902Skmacyvoid 1095182902Skmacyipi_all_but_self(u_int ipi) 1096182902Skmacy{ 1097182902Skmacy 1098182902Skmacy if (IPI_IS_BITMAPED(ipi) || (ipi == IPI_STOP && stop_cpus_with_nmi)) { 1099182902Skmacy ipi_selected(PCPU_GET(other_cpus), ipi); 1100182902Skmacy return; 1101182902Skmacy } 1102182902Skmacy CTR2(KTR_SMP, "%s: ipi: %x", __func__, ipi); 1103183345Skmacy ipi_selected(((int)-1 & ~(1 << curcpu)), ipi); 1104182902Skmacy} 1105182902Skmacy 1106182902Skmacy#ifdef STOP_NMI 1107182902Skmacy/* 1108182902Skmacy * send NMI IPI to selected CPUs 1109182902Skmacy */ 1110182902Skmacy 1111182902Skmacy#define BEFORE_SPIN 1000000 1112182902Skmacy 1113182902Skmacyvoid 1114182902Skmacyipi_nmi_selected(u_int32_t cpus) 1115182902Skmacy{ 1116182902Skmacy int cpu; 1117182902Skmacy register_t icrlo; 1118182902Skmacy 1119182902Skmacy icrlo = APIC_DELMODE_NMI | APIC_DESTMODE_PHY | APIC_LEVEL_ASSERT 1120182902Skmacy | APIC_TRIGMOD_EDGE; 1121182902Skmacy 1122182902Skmacy CTR2(KTR_SMP, "%s: cpus: %x nmi", __func__, cpus); 1123182902Skmacy 1124182902Skmacy atomic_set_int(&ipi_nmi_pending, cpus); 1125182902Skmacy 1126182902Skmacy while ((cpu = ffs(cpus)) != 0) { 1127182902Skmacy cpu--; 1128182902Skmacy cpus &= ~(1 << cpu); 1129182902Skmacy 1130182902Skmacy KASSERT(cpu_apic_ids[cpu] != -1, 1131182902Skmacy ("IPI NMI to non-existent CPU %d", cpu)); 1132182902Skmacy 1133182902Skmacy /* Wait for an earlier IPI to finish. */ 1134182902Skmacy if (!lapic_ipi_wait(BEFORE_SPIN)) 1135182902Skmacy panic("ipi_nmi_selected: previous IPI has not cleared"); 1136182902Skmacy 1137182902Skmacy lapic_ipi_raw(icrlo, cpu_apic_ids[cpu]); 1138182902Skmacy } 1139182902Skmacy} 1140182902Skmacy 1141182902Skmacyint 1142182902Skmacyipi_nmi_handler(void) 1143182902Skmacy{ 1144182902Skmacy int cpumask = PCPU_GET(cpumask); 1145182902Skmacy 1146182902Skmacy if (!(ipi_nmi_pending & cpumask)) 1147182902Skmacy return 1; 1148182902Skmacy 1149182902Skmacy atomic_clear_int(&ipi_nmi_pending, cpumask); 1150182902Skmacy cpustop_handler(); 1151182902Skmacy return 0; 1152182902Skmacy} 1153182902Skmacy 1154182902Skmacy#endif /* STOP_NMI */ 1155182902Skmacy 1156182902Skmacy/* 1157182902Skmacy * Handle an IPI_STOP by saving our current context and spinning until we 1158182902Skmacy * are resumed. 1159182902Skmacy */ 1160182902Skmacyvoid 1161182902Skmacycpustop_handler(void) 1162182902Skmacy{ 1163182902Skmacy int cpu = PCPU_GET(cpuid); 1164182902Skmacy int cpumask = PCPU_GET(cpumask); 1165182902Skmacy 1166182902Skmacy savectx(&stoppcbs[cpu]); 1167182902Skmacy 1168182902Skmacy /* Indicate that we are stopped */ 1169182902Skmacy atomic_set_int(&stopped_cpus, cpumask); 1170182902Skmacy 1171182902Skmacy /* Wait for restart */ 1172182902Skmacy while (!(started_cpus & cpumask)) 1173182902Skmacy ia32_pause(); 1174182902Skmacy 1175182902Skmacy atomic_clear_int(&started_cpus, cpumask); 1176182902Skmacy atomic_clear_int(&stopped_cpus, cpumask); 1177182902Skmacy 1178182902Skmacy if (cpu == 0 && cpustop_restartfunc != NULL) { 1179182902Skmacy cpustop_restartfunc(); 1180182902Skmacy cpustop_restartfunc = NULL; 1181182902Skmacy } 1182182902Skmacy} 1183182902Skmacy 1184182902Skmacy/* 1185182902Skmacy * This is called once the rest of the system is up and running and we're 1186182902Skmacy * ready to let the AP's out of the pen. 1187182902Skmacy */ 1188182902Skmacystatic void 1189182902Skmacyrelease_aps(void *dummy __unused) 1190182902Skmacy{ 1191182902Skmacy 1192182902Skmacy if (mp_ncpus == 1) 1193182902Skmacy return; 1194182902Skmacy atomic_store_rel_int(&aps_ready, 1); 1195182902Skmacy while (smp_started == 0) 1196182902Skmacy ia32_pause(); 1197182902Skmacy} 1198182902SkmacySYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, release_aps, NULL); 1199182902Skmacy 1200