pmap.c revision 180871
1/*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * Copyright (c) 1994 John S. Dyson 5 * All rights reserved. 6 * Copyright (c) 1994 David Greenman 7 * All rights reserved. 8 * Copyright (c) 2005-2008 Alan L. Cox <alc@cs.rice.edu> 9 * All rights reserved. 10 * 11 * This code is derived from software contributed to Berkeley by 12 * the Systems Programming Group of the University of Utah Computer 13 * Science Department and William Jolitz of UUNET Technologies Inc. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the University of 26 * California, Berkeley and its contributors. 27 * 4. Neither the name of the University nor the names of its contributors 28 * may be used to endorse or promote products derived from this software 29 * without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41 * SUCH DAMAGE. 42 * 43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 44 */ 45/*- 46 * Copyright (c) 2003 Networks Associates Technology, Inc. 47 * All rights reserved. 48 * 49 * This software was developed for the FreeBSD Project by Jake Burkholder, 50 * Safeport Network Services, and Network Associates Laboratories, the 51 * Security Research Division of Network Associates, Inc. under 52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 53 * CHATS research program. 54 * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 1. Redistributions of source code must retain the above copyright 59 * notice, this list of conditions and the following disclaimer. 60 * 2. Redistributions in binary form must reproduce the above copyright 61 * notice, this list of conditions and the following disclaimer in the 62 * documentation and/or other materials provided with the distribution. 63 * 64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 74 * SUCH DAMAGE. 75 */ 76 77#include <sys/cdefs.h> 78__FBSDID("$FreeBSD: head/sys/i386/i386/pmap.c 180871 2008-07-28 04:13:49Z alc $"); 79 80/* 81 * Manages physical address maps. 82 * 83 * In addition to hardware address maps, this 84 * module is called upon to provide software-use-only 85 * maps which may or may not be stored in the same 86 * form as hardware maps. These pseudo-maps are 87 * used to store intermediate results from copy 88 * operations to and from address spaces. 89 * 90 * Since the information managed by this module is 91 * also stored by the logical address mapping module, 92 * this module may throw away valid virtual-to-physical 93 * mappings at almost any time. However, invalidations 94 * of virtual-to-physical mappings must be done as 95 * requested. 96 * 97 * In order to cope with hardware architectures which 98 * make virtual-to-physical map invalidates expensive, 99 * this module may delay invalidate or reduced protection 100 * operations until such time as they are actually 101 * necessary. This module is given full information as 102 * to which processors are currently using which maps, 103 * and to when physical maps must be made correct. 104 */ 105 106#include "opt_cpu.h" 107#include "opt_pmap.h" 108#include "opt_msgbuf.h" 109#include "opt_smp.h" 110#include "opt_xbox.h" 111 112#include <sys/param.h> 113#include <sys/systm.h> 114#include <sys/kernel.h> 115#include <sys/ktr.h> 116#include <sys/lock.h> 117#include <sys/malloc.h> 118#include <sys/mman.h> 119#include <sys/msgbuf.h> 120#include <sys/mutex.h> 121#include <sys/proc.h> 122#include <sys/sx.h> 123#include <sys/vmmeter.h> 124#include <sys/sched.h> 125#include <sys/sysctl.h> 126#ifdef SMP 127#include <sys/smp.h> 128#endif 129 130#include <vm/vm.h> 131#include <vm/vm_param.h> 132#include <vm/vm_kern.h> 133#include <vm/vm_page.h> 134#include <vm/vm_map.h> 135#include <vm/vm_object.h> 136#include <vm/vm_extern.h> 137#include <vm/vm_pageout.h> 138#include <vm/vm_pager.h> 139#include <vm/vm_reserv.h> 140#include <vm/uma.h> 141 142#include <machine/cpu.h> 143#include <machine/cputypes.h> 144#include <machine/md_var.h> 145#include <machine/pcb.h> 146#include <machine/specialreg.h> 147#ifdef SMP 148#include <machine/smp.h> 149#endif 150 151#ifdef XBOX 152#include <machine/xbox.h> 153#endif 154 155#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 156#define CPU_ENABLE_SSE 157#endif 158 159#ifndef PMAP_SHPGPERPROC 160#define PMAP_SHPGPERPROC 200 161#endif 162 163#if !defined(DIAGNOSTIC) 164#define PMAP_INLINE __gnu89_inline 165#else 166#define PMAP_INLINE 167#endif 168 169#define PV_STATS 170#ifdef PV_STATS 171#define PV_STAT(x) do { x ; } while (0) 172#else 173#define PV_STAT(x) do { } while (0) 174#endif 175 176#define pa_index(pa) ((pa) >> PDRSHIFT) 177#define pa_to_pvh(pa) (&pv_table[pa_index(pa)]) 178 179/* 180 * Get PDEs and PTEs for user/kernel address space 181 */ 182#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 183#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 184 185#define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 186#define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 187#define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 188#define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 189#define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 190 191#define pmap_pte_set_w(pte, v) ((v) ? atomic_set_int((u_int *)(pte), PG_W) : \ 192 atomic_clear_int((u_int *)(pte), PG_W)) 193#define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 194 195struct pmap kernel_pmap_store; 196LIST_HEAD(pmaplist, pmap); 197static struct pmaplist allpmaps; 198static struct mtx allpmaps_lock; 199 200vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 201vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 202int pgeflag = 0; /* PG_G or-in */ 203int pseflag = 0; /* PG_PS or-in */ 204 205static int nkpt; 206vm_offset_t kernel_vm_end; 207extern u_int32_t KERNend; 208 209#ifdef PAE 210pt_entry_t pg_nx; 211static uma_zone_t pdptzone; 212#endif 213 214SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters"); 215 216static int pg_ps_enabled; 217SYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RD, &pg_ps_enabled, 0, 218 "Are large page mappings enabled?"); 219 220/* 221 * Data for the pv entry allocation mechanism 222 */ 223static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 224static struct md_page *pv_table; 225static int shpgperproc = PMAP_SHPGPERPROC; 226 227struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */ 228int pv_maxchunks; /* How many chunks we have KVA for */ 229vm_offset_t pv_vafree; /* freelist stored in the PTE */ 230 231/* 232 * All those kernel PT submaps that BSD is so fond of 233 */ 234struct sysmaps { 235 struct mtx lock; 236 pt_entry_t *CMAP1; 237 pt_entry_t *CMAP2; 238 caddr_t CADDR1; 239 caddr_t CADDR2; 240}; 241static struct sysmaps sysmaps_pcpu[MAXCPU]; 242pt_entry_t *CMAP1 = 0; 243static pt_entry_t *CMAP3; 244caddr_t CADDR1 = 0, ptvmmap = 0; 245static caddr_t CADDR3; 246struct msgbuf *msgbufp = 0; 247 248/* 249 * Crashdump maps. 250 */ 251static caddr_t crashdumpmap; 252 253static pt_entry_t *PMAP1 = 0, *PMAP2; 254static pt_entry_t *PADDR1 = 0, *PADDR2; 255#ifdef SMP 256static int PMAP1cpu; 257static int PMAP1changedcpu; 258SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD, 259 &PMAP1changedcpu, 0, 260 "Number of times pmap_pte_quick changed CPU with same PMAP1"); 261#endif 262static int PMAP1changed; 263SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD, 264 &PMAP1changed, 0, 265 "Number of times pmap_pte_quick changed PMAP1"); 266static int PMAP1unchanged; 267SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD, 268 &PMAP1unchanged, 0, 269 "Number of times pmap_pte_quick didn't change PMAP1"); 270static struct mtx PMAP2mutex; 271 272static void free_pv_entry(pmap_t pmap, pv_entry_t pv); 273static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try); 274static void pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa); 275static boolean_t pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa); 276static void pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa); 277static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va); 278static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, 279 vm_offset_t va); 280static int pmap_pvh_wired_mappings(struct md_page *pvh, int count); 281 282static boolean_t pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va); 283static boolean_t pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m, 284 vm_prot_t prot); 285static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, 286 vm_page_t m, vm_prot_t prot, vm_page_t mpte); 287static void pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte); 288static boolean_t pmap_is_modified_pvh(struct md_page *pvh); 289static vm_page_t pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va); 290static void pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va); 291static boolean_t pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva, 292 vm_prot_t prot); 293static void pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva, 294 vm_page_t *free); 295static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva, 296 vm_page_t *free); 297static void pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte); 298static void pmap_remove_page(struct pmap *pmap, vm_offset_t va, 299 vm_page_t *free); 300static void pmap_remove_entry(struct pmap *pmap, vm_page_t m, 301 vm_offset_t va); 302static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m); 303static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, 304 vm_page_t m); 305 306static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags); 307 308static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags); 309static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free); 310static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va); 311static void pmap_pte_release(pt_entry_t *pte); 312static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *); 313static vm_offset_t pmap_kmem_choose(vm_offset_t addr); 314#ifdef PAE 315static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 316#endif 317 318CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 319CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 320 321/* 322 * If you get an error here, then you set KVA_PAGES wrong! See the 323 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be 324 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE. 325 */ 326CTASSERT(KERNBASE % (1 << 24) == 0); 327 328/* 329 * Move the kernel virtual free pointer to the next 330 * 4MB. This is used to help improve performance 331 * by using a large (4MB) page for much of the kernel 332 * (.text, .data, .bss) 333 */ 334static vm_offset_t 335pmap_kmem_choose(vm_offset_t addr) 336{ 337 vm_offset_t newaddr = addr; 338 339#ifndef DISABLE_PSE 340 if (cpu_feature & CPUID_PSE) 341 newaddr = (addr + PDRMASK) & ~PDRMASK; 342#endif 343 return newaddr; 344} 345 346/* 347 * Bootstrap the system enough to run with virtual memory. 348 * 349 * On the i386 this is called after mapping has already been enabled 350 * and just syncs the pmap module with what has already been done. 351 * [We can't call it easily with mapping off since the kernel is not 352 * mapped with PA == VA, hence we would have to relocate every address 353 * from the linked base (virtual) address "KERNBASE" to the actual 354 * (physical) address starting relative to 0] 355 */ 356void 357pmap_bootstrap(vm_paddr_t firstaddr) 358{ 359 vm_offset_t va; 360 pt_entry_t *pte, *unused; 361 struct sysmaps *sysmaps; 362 int i; 363 364 /* 365 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 366 * large. It should instead be correctly calculated in locore.s and 367 * not based on 'first' (which is a physical address, not a virtual 368 * address, for the start of unused physical memory). The kernel 369 * page tables are NOT double mapped and thus should not be included 370 * in this calculation. 371 */ 372 virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 373 virtual_avail = pmap_kmem_choose(virtual_avail); 374 375 virtual_end = VM_MAX_KERNEL_ADDRESS; 376 377 /* 378 * Initialize the kernel pmap (which is statically allocated). 379 */ 380 PMAP_LOCK_INIT(kernel_pmap); 381 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 382#ifdef PAE 383 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 384#endif 385 kernel_pmap->pm_root = NULL; 386 kernel_pmap->pm_active = -1; /* don't allow deactivation */ 387 TAILQ_INIT(&kernel_pmap->pm_pvchunk); 388 LIST_INIT(&allpmaps); 389 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 390 mtx_lock_spin(&allpmaps_lock); 391 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 392 mtx_unlock_spin(&allpmaps_lock); 393 nkpt = NKPT; 394 395 /* 396 * Reserve some special page table entries/VA space for temporary 397 * mapping of pages. 398 */ 399#define SYSMAP(c, p, v, n) \ 400 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 401 402 va = virtual_avail; 403 pte = vtopte(va); 404 405 /* 406 * CMAP1/CMAP2 are used for zeroing and copying pages. 407 * CMAP3 is used for the idle process page zeroing. 408 */ 409 for (i = 0; i < MAXCPU; i++) { 410 sysmaps = &sysmaps_pcpu[i]; 411 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF); 412 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1) 413 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1) 414 } 415 SYSMAP(caddr_t, CMAP1, CADDR1, 1) 416 SYSMAP(caddr_t, CMAP3, CADDR3, 1) 417 *CMAP3 = 0; 418 419 /* 420 * Crashdump maps. 421 */ 422 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS) 423 424 /* 425 * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 426 */ 427 SYSMAP(caddr_t, unused, ptvmmap, 1) 428 429 /* 430 * msgbufp is used to map the system message buffer. 431 */ 432 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE))) 433 434 /* 435 * ptemap is used for pmap_pte_quick 436 */ 437 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 438 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1); 439 440 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF); 441 442 virtual_avail = va; 443 444 *CMAP1 = 0; 445 446 /* 447 * Leave in place an identity mapping (virt == phys) for the low 1 MB 448 * physical memory region that is used by the ACPI wakeup code. This 449 * mapping must not have PG_G set. 450 */ 451#ifdef XBOX 452 /* FIXME: This is gross, but needed for the XBOX. Since we are in such 453 * an early stadium, we cannot yet neatly map video memory ... :-( 454 * Better fixes are very welcome! */ 455 if (!arch_i386_is_xbox) 456#endif 457 for (i = 1; i < NKPT; i++) 458 PTD[i] = 0; 459 460 /* Initialize the PAT MSR if present. */ 461 pmap_init_pat(); 462 463 /* Turn on PG_G on kernel page(s) */ 464 pmap_set_pg(); 465} 466 467/* 468 * Setup the PAT MSR. 469 */ 470void 471pmap_init_pat(void) 472{ 473 uint64_t pat_msr; 474 475 /* Bail if this CPU doesn't implement PAT. */ 476 if (!(cpu_feature & CPUID_PAT)) 477 return; 478 479#ifdef PAT_WORKS 480 /* 481 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-. 482 * Program 4 and 5 as WP and WC. 483 * Leave 6 and 7 as UC and UC-. 484 */ 485 pat_msr = rdmsr(MSR_PAT); 486 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5)); 487 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) | 488 PAT_VALUE(5, PAT_WRITE_COMBINING); 489#else 490 /* 491 * Due to some Intel errata, we can only safely use the lower 4 492 * PAT entries. Thus, just replace PAT Index 2 with WC instead 493 * of UC-. 494 * 495 * Intel Pentium III Processor Specification Update 496 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B 497 * or Mode C Paging) 498 * 499 * Intel Pentium IV Processor Specification Update 500 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly) 501 */ 502 pat_msr = rdmsr(MSR_PAT); 503 pat_msr &= ~PAT_MASK(2); 504 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING); 505#endif 506 wrmsr(MSR_PAT, pat_msr); 507} 508 509/* 510 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on. 511 */ 512void 513pmap_set_pg(void) 514{ 515 pd_entry_t pdir; 516 pt_entry_t *pte; 517 vm_offset_t va, endva; 518 int i; 519 520 if (pgeflag == 0) 521 return; 522 523 i = KERNLOAD/NBPDR; 524 endva = KERNBASE + KERNend; 525 526 if (pseflag) { 527 va = KERNBASE + KERNLOAD; 528 while (va < endva) { 529 pdir = kernel_pmap->pm_pdir[KPTDI+i]; 530 pdir |= pgeflag; 531 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir; 532 invltlb(); /* Play it safe, invltlb() every time */ 533 i++; 534 va += NBPDR; 535 } 536 } else { 537 va = (vm_offset_t)btext; 538 while (va < endva) { 539 pte = vtopte(va); 540 if (*pte) 541 *pte |= pgeflag; 542 invltlb(); /* Play it safe, invltlb() every time */ 543 va += PAGE_SIZE; 544 } 545 } 546} 547 548/* 549 * Initialize a vm_page's machine-dependent fields. 550 */ 551void 552pmap_page_init(vm_page_t m) 553{ 554 555 TAILQ_INIT(&m->md.pv_list); 556} 557 558#ifdef PAE 559 560static MALLOC_DEFINE(M_PMAPPDPT, "pmap", "pmap pdpt"); 561 562static void * 563pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 564{ 565 566 /* Inform UMA that this allocator uses kernel_map/object. */ 567 *flags = UMA_SLAB_KERNEL; 568 return (contigmalloc(PAGE_SIZE, M_PMAPPDPT, 0, 0x0ULL, 0xffffffffULL, 569 1, 0)); 570} 571#endif 572 573/* 574 * ABuse the pte nodes for unmapped kva to thread a kva freelist through. 575 * Requirements: 576 * - Must deal with pages in order to ensure that none of the PG_* bits 577 * are ever set, PG_V in particular. 578 * - Assumes we can write to ptes without pte_store() atomic ops, even 579 * on PAE systems. This should be ok. 580 * - Assumes nothing will ever test these addresses for 0 to indicate 581 * no mapping instead of correctly checking PG_V. 582 * - Assumes a vm_offset_t will fit in a pte (true for i386). 583 * Because PG_V is never set, there can be no mappings to invalidate. 584 */ 585static vm_offset_t 586pmap_ptelist_alloc(vm_offset_t *head) 587{ 588 pt_entry_t *pte; 589 vm_offset_t va; 590 591 va = *head; 592 if (va == 0) 593 return (va); /* Out of memory */ 594 pte = vtopte(va); 595 *head = *pte; 596 if (*head & PG_V) 597 panic("pmap_ptelist_alloc: va with PG_V set!"); 598 *pte = 0; 599 return (va); 600} 601 602static void 603pmap_ptelist_free(vm_offset_t *head, vm_offset_t va) 604{ 605 pt_entry_t *pte; 606 607 if (va & PG_V) 608 panic("pmap_ptelist_free: freeing va with PG_V set!"); 609 pte = vtopte(va); 610 *pte = *head; /* virtual! PG_V is 0 though */ 611 *head = va; 612} 613 614static void 615pmap_ptelist_init(vm_offset_t *head, void *base, int npages) 616{ 617 int i; 618 vm_offset_t va; 619 620 *head = 0; 621 for (i = npages - 1; i >= 0; i--) { 622 va = (vm_offset_t)base + i * PAGE_SIZE; 623 pmap_ptelist_free(head, va); 624 } 625} 626 627 628/* 629 * Initialize the pmap module. 630 * Called by vm_init, to initialize any structures that the pmap 631 * system needs to map virtual memory. 632 */ 633void 634pmap_init(void) 635{ 636 vm_page_t mpte; 637 vm_size_t s; 638 int i, pv_npg; 639 640 /* 641 * Initialize the vm page array entries for the kernel pmap's 642 * page table pages. 643 */ 644 for (i = 0; i < nkpt; i++) { 645 mpte = PHYS_TO_VM_PAGE(PTD[i + KPTDI] & PG_FRAME); 646 KASSERT(mpte >= vm_page_array && 647 mpte < &vm_page_array[vm_page_array_size], 648 ("pmap_init: page table page is out of range")); 649 mpte->pindex = i + KPTDI; 650 mpte->phys_addr = PTD[i + KPTDI] & PG_FRAME; 651 } 652 653 /* 654 * Initialize the address space (zone) for the pv entries. Set a 655 * high water mark so that the system can recover from excessive 656 * numbers of pv entries. 657 */ 658 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 659 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count; 660 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 661 pv_entry_max = roundup(pv_entry_max, _NPCPV); 662 pv_entry_high_water = 9 * (pv_entry_max / 10); 663 664 /* 665 * Are large page mappings enabled? 666 */ 667 TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled); 668 669 /* 670 * Calculate the size of the pv head table for superpages. 671 */ 672 for (i = 0; phys_avail[i + 1]; i += 2); 673 pv_npg = round_4mpage(phys_avail[(i - 2) + 1]) / NBPDR; 674 675 /* 676 * Allocate memory for the pv head table for superpages. 677 */ 678 s = (vm_size_t)(pv_npg * sizeof(struct md_page)); 679 s = round_page(s); 680 pv_table = (struct md_page *)kmem_alloc(kernel_map, s); 681 for (i = 0; i < pv_npg; i++) 682 TAILQ_INIT(&pv_table[i].pv_list); 683 684 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc); 685 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map, 686 PAGE_SIZE * pv_maxchunks); 687 if (pv_chunkbase == NULL) 688 panic("pmap_init: not enough kvm for pv chunks"); 689 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks); 690#ifdef PAE 691 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL, 692 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1, 693 UMA_ZONE_VM | UMA_ZONE_NOFREE); 694 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf); 695#endif 696} 697 698 699SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0, 700 "Max number of PV entries"); 701SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0, 702 "Page share factor per proc"); 703 704SYSCTL_NODE(_vm_pmap, OID_AUTO, pde, CTLFLAG_RD, 0, 705 "2/4MB page mapping counters"); 706 707static u_long pmap_pde_demotions; 708SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, demotions, CTLFLAG_RD, 709 &pmap_pde_demotions, 0, "2/4MB page demotions"); 710 711static u_long pmap_pde_mappings; 712SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, mappings, CTLFLAG_RD, 713 &pmap_pde_mappings, 0, "2/4MB page mappings"); 714 715static u_long pmap_pde_p_failures; 716SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, p_failures, CTLFLAG_RD, 717 &pmap_pde_p_failures, 0, "2/4MB page promotion failures"); 718 719static u_long pmap_pde_promotions; 720SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, promotions, CTLFLAG_RD, 721 &pmap_pde_promotions, 0, "2/4MB page promotions"); 722 723/*************************************************** 724 * Low level helper routines..... 725 ***************************************************/ 726 727/* 728 * Determine the appropriate bits to set in a PTE or PDE for a specified 729 * caching mode. 730 */ 731static int 732pmap_cache_bits(int mode, boolean_t is_pde) 733{ 734 int pat_flag, pat_index, cache_bits; 735 736 /* The PAT bit is different for PTE's and PDE's. */ 737 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT; 738 739 /* If we don't support PAT, map extended modes to older ones. */ 740 if (!(cpu_feature & CPUID_PAT)) { 741 switch (mode) { 742 case PAT_UNCACHEABLE: 743 case PAT_WRITE_THROUGH: 744 case PAT_WRITE_BACK: 745 break; 746 case PAT_UNCACHED: 747 case PAT_WRITE_COMBINING: 748 case PAT_WRITE_PROTECTED: 749 mode = PAT_UNCACHEABLE; 750 break; 751 } 752 } 753 754 /* Map the caching mode to a PAT index. */ 755 switch (mode) { 756#ifdef PAT_WORKS 757 case PAT_UNCACHEABLE: 758 pat_index = 3; 759 break; 760 case PAT_WRITE_THROUGH: 761 pat_index = 1; 762 break; 763 case PAT_WRITE_BACK: 764 pat_index = 0; 765 break; 766 case PAT_UNCACHED: 767 pat_index = 2; 768 break; 769 case PAT_WRITE_COMBINING: 770 pat_index = 5; 771 break; 772 case PAT_WRITE_PROTECTED: 773 pat_index = 4; 774 break; 775#else 776 case PAT_UNCACHED: 777 case PAT_UNCACHEABLE: 778 case PAT_WRITE_PROTECTED: 779 pat_index = 3; 780 break; 781 case PAT_WRITE_THROUGH: 782 pat_index = 1; 783 break; 784 case PAT_WRITE_BACK: 785 pat_index = 0; 786 break; 787 case PAT_WRITE_COMBINING: 788 pat_index = 2; 789 break; 790#endif 791 default: 792 panic("Unknown caching mode %d\n", mode); 793 } 794 795 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */ 796 cache_bits = 0; 797 if (pat_index & 0x4) 798 cache_bits |= pat_flag; 799 if (pat_index & 0x2) 800 cache_bits |= PG_NC_PCD; 801 if (pat_index & 0x1) 802 cache_bits |= PG_NC_PWT; 803 return (cache_bits); 804} 805#ifdef SMP 806/* 807 * For SMP, these functions have to use the IPI mechanism for coherence. 808 * 809 * N.B.: Before calling any of the following TLB invalidation functions, 810 * the calling processor must ensure that all stores updating a non- 811 * kernel page table are globally performed. Otherwise, another 812 * processor could cache an old, pre-update entry without being 813 * invalidated. This can happen one of two ways: (1) The pmap becomes 814 * active on another processor after its pm_active field is checked by 815 * one of the following functions but before a store updating the page 816 * table is globally performed. (2) The pmap becomes active on another 817 * processor before its pm_active field is checked but due to 818 * speculative loads one of the following functions stills reads the 819 * pmap as inactive on the other processor. 820 * 821 * The kernel page table is exempt because its pm_active field is 822 * immutable. The kernel page table is always active on every 823 * processor. 824 */ 825void 826pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 827{ 828 u_int cpumask; 829 u_int other_cpus; 830 831 sched_pin(); 832 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 833 invlpg(va); 834 smp_invlpg(va); 835 } else { 836 cpumask = PCPU_GET(cpumask); 837 other_cpus = PCPU_GET(other_cpus); 838 if (pmap->pm_active & cpumask) 839 invlpg(va); 840 if (pmap->pm_active & other_cpus) 841 smp_masked_invlpg(pmap->pm_active & other_cpus, va); 842 } 843 sched_unpin(); 844} 845 846void 847pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 848{ 849 u_int cpumask; 850 u_int other_cpus; 851 vm_offset_t addr; 852 853 sched_pin(); 854 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 855 for (addr = sva; addr < eva; addr += PAGE_SIZE) 856 invlpg(addr); 857 smp_invlpg_range(sva, eva); 858 } else { 859 cpumask = PCPU_GET(cpumask); 860 other_cpus = PCPU_GET(other_cpus); 861 if (pmap->pm_active & cpumask) 862 for (addr = sva; addr < eva; addr += PAGE_SIZE) 863 invlpg(addr); 864 if (pmap->pm_active & other_cpus) 865 smp_masked_invlpg_range(pmap->pm_active & other_cpus, 866 sva, eva); 867 } 868 sched_unpin(); 869} 870 871void 872pmap_invalidate_all(pmap_t pmap) 873{ 874 u_int cpumask; 875 u_int other_cpus; 876 877 sched_pin(); 878 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 879 invltlb(); 880 smp_invltlb(); 881 } else { 882 cpumask = PCPU_GET(cpumask); 883 other_cpus = PCPU_GET(other_cpus); 884 if (pmap->pm_active & cpumask) 885 invltlb(); 886 if (pmap->pm_active & other_cpus) 887 smp_masked_invltlb(pmap->pm_active & other_cpus); 888 } 889 sched_unpin(); 890} 891 892void 893pmap_invalidate_cache(void) 894{ 895 896 sched_pin(); 897 wbinvd(); 898 smp_cache_flush(); 899 sched_unpin(); 900} 901#else /* !SMP */ 902/* 903 * Normal, non-SMP, 486+ invalidation functions. 904 * We inline these within pmap.c for speed. 905 */ 906PMAP_INLINE void 907pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 908{ 909 910 if (pmap == kernel_pmap || pmap->pm_active) 911 invlpg(va); 912} 913 914PMAP_INLINE void 915pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 916{ 917 vm_offset_t addr; 918 919 if (pmap == kernel_pmap || pmap->pm_active) 920 for (addr = sva; addr < eva; addr += PAGE_SIZE) 921 invlpg(addr); 922} 923 924PMAP_INLINE void 925pmap_invalidate_all(pmap_t pmap) 926{ 927 928 if (pmap == kernel_pmap || pmap->pm_active) 929 invltlb(); 930} 931 932PMAP_INLINE void 933pmap_invalidate_cache(void) 934{ 935 936 wbinvd(); 937} 938#endif /* !SMP */ 939 940/* 941 * Are we current address space or kernel? N.B. We return FALSE when 942 * a pmap's page table is in use because a kernel thread is borrowing 943 * it. The borrowed page table can change spontaneously, making any 944 * dependence on its continued use subject to a race condition. 945 */ 946static __inline int 947pmap_is_current(pmap_t pmap) 948{ 949 950 return (pmap == kernel_pmap || 951 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) && 952 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME))); 953} 954 955/* 956 * If the given pmap is not the current or kernel pmap, the returned pte must 957 * be released by passing it to pmap_pte_release(). 958 */ 959pt_entry_t * 960pmap_pte(pmap_t pmap, vm_offset_t va) 961{ 962 pd_entry_t newpf; 963 pd_entry_t *pde; 964 965 pde = pmap_pde(pmap, va); 966 if (*pde & PG_PS) 967 return (pde); 968 if (*pde != 0) { 969 /* are we current address space or kernel? */ 970 if (pmap_is_current(pmap)) 971 return (vtopte(va)); 972 mtx_lock(&PMAP2mutex); 973 newpf = *pde & PG_FRAME; 974 if ((*PMAP2 & PG_FRAME) != newpf) { 975 *PMAP2 = newpf | PG_RW | PG_V | PG_A | PG_M; 976 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2); 977 } 978 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1))); 979 } 980 return (0); 981} 982 983/* 984 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte 985 * being NULL. 986 */ 987static __inline void 988pmap_pte_release(pt_entry_t *pte) 989{ 990 991 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) 992 mtx_unlock(&PMAP2mutex); 993} 994 995static __inline void 996invlcaddr(void *caddr) 997{ 998 999 invlpg((u_int)caddr); 1000} 1001 1002/* 1003 * Super fast pmap_pte routine best used when scanning 1004 * the pv lists. This eliminates many coarse-grained 1005 * invltlb calls. Note that many of the pv list 1006 * scans are across different pmaps. It is very wasteful 1007 * to do an entire invltlb for checking a single mapping. 1008 * 1009 * If the given pmap is not the current pmap, vm_page_queue_mtx 1010 * must be held and curthread pinned to a CPU. 1011 */ 1012static pt_entry_t * 1013pmap_pte_quick(pmap_t pmap, vm_offset_t va) 1014{ 1015 pd_entry_t newpf; 1016 pd_entry_t *pde; 1017 1018 pde = pmap_pde(pmap, va); 1019 if (*pde & PG_PS) 1020 return (pde); 1021 if (*pde != 0) { 1022 /* are we current address space or kernel? */ 1023 if (pmap_is_current(pmap)) 1024 return (vtopte(va)); 1025 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1026 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 1027 newpf = *pde & PG_FRAME; 1028 if ((*PMAP1 & PG_FRAME) != newpf) { 1029 *PMAP1 = newpf | PG_RW | PG_V | PG_A | PG_M; 1030#ifdef SMP 1031 PMAP1cpu = PCPU_GET(cpuid); 1032#endif 1033 invlcaddr(PADDR1); 1034 PMAP1changed++; 1035 } else 1036#ifdef SMP 1037 if (PMAP1cpu != PCPU_GET(cpuid)) { 1038 PMAP1cpu = PCPU_GET(cpuid); 1039 invlcaddr(PADDR1); 1040 PMAP1changedcpu++; 1041 } else 1042#endif 1043 PMAP1unchanged++; 1044 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1))); 1045 } 1046 return (0); 1047} 1048 1049/* 1050 * Routine: pmap_extract 1051 * Function: 1052 * Extract the physical page address associated 1053 * with the given map/virtual_address pair. 1054 */ 1055vm_paddr_t 1056pmap_extract(pmap_t pmap, vm_offset_t va) 1057{ 1058 vm_paddr_t rtval; 1059 pt_entry_t *pte; 1060 pd_entry_t pde; 1061 1062 rtval = 0; 1063 PMAP_LOCK(pmap); 1064 pde = pmap->pm_pdir[va >> PDRSHIFT]; 1065 if (pde != 0) { 1066 if ((pde & PG_PS) != 0) 1067 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK); 1068 else { 1069 pte = pmap_pte(pmap, va); 1070 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK); 1071 pmap_pte_release(pte); 1072 } 1073 } 1074 PMAP_UNLOCK(pmap); 1075 return (rtval); 1076} 1077 1078/* 1079 * Routine: pmap_extract_and_hold 1080 * Function: 1081 * Atomically extract and hold the physical page 1082 * with the given pmap and virtual address pair 1083 * if that mapping permits the given protection. 1084 */ 1085vm_page_t 1086pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 1087{ 1088 pd_entry_t pde; 1089 pt_entry_t pte; 1090 vm_page_t m; 1091 1092 m = NULL; 1093 vm_page_lock_queues(); 1094 PMAP_LOCK(pmap); 1095 pde = *pmap_pde(pmap, va); 1096 if (pde != 0) { 1097 if (pde & PG_PS) { 1098 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) { 1099 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) | 1100 (va & PDRMASK)); 1101 vm_page_hold(m); 1102 } 1103 } else { 1104 sched_pin(); 1105 pte = *pmap_pte_quick(pmap, va); 1106 if (pte != 0 && 1107 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) { 1108 m = PHYS_TO_VM_PAGE(pte & PG_FRAME); 1109 vm_page_hold(m); 1110 } 1111 sched_unpin(); 1112 } 1113 } 1114 vm_page_unlock_queues(); 1115 PMAP_UNLOCK(pmap); 1116 return (m); 1117} 1118 1119/*************************************************** 1120 * Low level mapping routines..... 1121 ***************************************************/ 1122 1123/* 1124 * Add a wired page to the kva. 1125 * Note: not SMP coherent. 1126 */ 1127PMAP_INLINE void 1128pmap_kenter(vm_offset_t va, vm_paddr_t pa) 1129{ 1130 pt_entry_t *pte; 1131 1132 pte = vtopte(va); 1133 pte_store(pte, pa | PG_RW | PG_V | pgeflag); 1134} 1135 1136PMAP_INLINE void 1137pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode) 1138{ 1139 pt_entry_t *pte; 1140 1141 pte = vtopte(va); 1142 pte_store(pte, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0)); 1143} 1144 1145/* 1146 * Remove a page from the kernel pagetables. 1147 * Note: not SMP coherent. 1148 */ 1149PMAP_INLINE void 1150pmap_kremove(vm_offset_t va) 1151{ 1152 pt_entry_t *pte; 1153 1154 pte = vtopte(va); 1155 pte_clear(pte); 1156} 1157 1158/* 1159 * Used to map a range of physical addresses into kernel 1160 * virtual address space. 1161 * 1162 * The value passed in '*virt' is a suggested virtual address for 1163 * the mapping. Architectures which can support a direct-mapped 1164 * physical to virtual region can return the appropriate address 1165 * within that region, leaving '*virt' unchanged. Other 1166 * architectures should map the pages starting at '*virt' and 1167 * update '*virt' with the first usable address after the mapped 1168 * region. 1169 */ 1170vm_offset_t 1171pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 1172{ 1173 vm_offset_t va, sva; 1174 1175 va = sva = *virt; 1176 while (start < end) { 1177 pmap_kenter(va, start); 1178 va += PAGE_SIZE; 1179 start += PAGE_SIZE; 1180 } 1181 pmap_invalidate_range(kernel_pmap, sva, va); 1182 *virt = va; 1183 return (sva); 1184} 1185 1186 1187/* 1188 * Add a list of wired pages to the kva 1189 * this routine is only used for temporary 1190 * kernel mappings that do not need to have 1191 * page modification or references recorded. 1192 * Note that old mappings are simply written 1193 * over. The page *must* be wired. 1194 * Note: SMP coherent. Uses a ranged shootdown IPI. 1195 */ 1196void 1197pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count) 1198{ 1199 pt_entry_t *endpte, oldpte, *pte; 1200 1201 oldpte = 0; 1202 pte = vtopte(sva); 1203 endpte = pte + count; 1204 while (pte < endpte) { 1205 oldpte |= *pte; 1206 pte_store(pte, VM_PAGE_TO_PHYS(*ma) | pgeflag | PG_RW | PG_V); 1207 pte++; 1208 ma++; 1209 } 1210 if ((oldpte & PG_V) != 0) 1211 pmap_invalidate_range(kernel_pmap, sva, sva + count * 1212 PAGE_SIZE); 1213} 1214 1215/* 1216 * This routine tears out page mappings from the 1217 * kernel -- it is meant only for temporary mappings. 1218 * Note: SMP coherent. Uses a ranged shootdown IPI. 1219 */ 1220void 1221pmap_qremove(vm_offset_t sva, int count) 1222{ 1223 vm_offset_t va; 1224 1225 va = sva; 1226 while (count-- > 0) { 1227 pmap_kremove(va); 1228 va += PAGE_SIZE; 1229 } 1230 pmap_invalidate_range(kernel_pmap, sva, va); 1231} 1232 1233/*************************************************** 1234 * Page table page management routines..... 1235 ***************************************************/ 1236static __inline void 1237pmap_free_zero_pages(vm_page_t free) 1238{ 1239 vm_page_t m; 1240 1241 while (free != NULL) { 1242 m = free; 1243 free = m->right; 1244 /* Preserve the page's PG_ZERO setting. */ 1245 vm_page_free_toq(m); 1246 } 1247} 1248 1249/* 1250 * Schedule the specified unused page table page to be freed. Specifically, 1251 * add the page to the specified list of pages that will be released to the 1252 * physical memory manager after the TLB has been updated. 1253 */ 1254static __inline void 1255pmap_add_delayed_free_list(vm_page_t m, vm_page_t *free, boolean_t set_PG_ZERO) 1256{ 1257 1258 if (set_PG_ZERO) 1259 m->flags |= PG_ZERO; 1260 else 1261 m->flags &= ~PG_ZERO; 1262 m->right = *free; 1263 *free = m; 1264} 1265 1266/* 1267 * Inserts the specified page table page into the specified pmap's collection 1268 * of idle page table pages. Each of a pmap's page table pages is responsible 1269 * for mapping a distinct range of virtual addresses. The pmap's collection is 1270 * ordered by this virtual address range. 1271 */ 1272static void 1273pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte) 1274{ 1275 vm_page_t root; 1276 1277 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1278 root = pmap->pm_root; 1279 if (root == NULL) { 1280 mpte->left = NULL; 1281 mpte->right = NULL; 1282 } else { 1283 root = vm_page_splay(mpte->pindex, root); 1284 if (mpte->pindex < root->pindex) { 1285 mpte->left = root->left; 1286 mpte->right = root; 1287 root->left = NULL; 1288 } else if (mpte->pindex == root->pindex) 1289 panic("pmap_insert_pt_page: pindex already inserted"); 1290 else { 1291 mpte->right = root->right; 1292 mpte->left = root; 1293 root->right = NULL; 1294 } 1295 } 1296 pmap->pm_root = mpte; 1297} 1298 1299/* 1300 * Looks for a page table page mapping the specified virtual address in the 1301 * specified pmap's collection of idle page table pages. Returns NULL if there 1302 * is no page table page corresponding to the specified virtual address. 1303 */ 1304static vm_page_t 1305pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va) 1306{ 1307 vm_page_t mpte; 1308 vm_pindex_t pindex = va >> PDRSHIFT; 1309 1310 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1311 if ((mpte = pmap->pm_root) != NULL && mpte->pindex != pindex) { 1312 mpte = vm_page_splay(pindex, mpte); 1313 if ((pmap->pm_root = mpte)->pindex != pindex) 1314 mpte = NULL; 1315 } 1316 return (mpte); 1317} 1318 1319/* 1320 * Removes the specified page table page from the specified pmap's collection 1321 * of idle page table pages. The specified page table page must be a member of 1322 * the pmap's collection. 1323 */ 1324static void 1325pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte) 1326{ 1327 vm_page_t root; 1328 1329 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1330 if (mpte != pmap->pm_root) 1331 vm_page_splay(mpte->pindex, pmap->pm_root); 1332 if (mpte->left == NULL) 1333 root = mpte->right; 1334 else { 1335 root = vm_page_splay(mpte->pindex, mpte->left); 1336 root->right = mpte->right; 1337 } 1338 pmap->pm_root = root; 1339} 1340 1341/* 1342 * This routine unholds page table pages, and if the hold count 1343 * drops to zero, then it decrements the wire count. 1344 */ 1345static __inline int 1346pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1347{ 1348 1349 --m->wire_count; 1350 if (m->wire_count == 0) 1351 return _pmap_unwire_pte_hold(pmap, m, free); 1352 else 1353 return 0; 1354} 1355 1356static int 1357_pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1358{ 1359 vm_offset_t pteva; 1360 1361 /* 1362 * unmap the page table page 1363 */ 1364 pmap->pm_pdir[m->pindex] = 0; 1365 --pmap->pm_stats.resident_count; 1366 1367 /* 1368 * This is a release store so that the ordinary store unmapping 1369 * the page table page is globally performed before TLB shoot- 1370 * down is begun. 1371 */ 1372 atomic_subtract_rel_int(&cnt.v_wire_count, 1); 1373 1374 /* 1375 * Do an invltlb to make the invalidated mapping 1376 * take effect immediately. 1377 */ 1378 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1379 pmap_invalidate_page(pmap, pteva); 1380 1381 /* 1382 * Put page on a list so that it is released after 1383 * *ALL* TLB shootdown is done 1384 */ 1385 pmap_add_delayed_free_list(m, free, TRUE); 1386 1387 return 1; 1388} 1389 1390/* 1391 * After removing a page table entry, this routine is used to 1392 * conditionally free the page, and manage the hold/wire counts. 1393 */ 1394static int 1395pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free) 1396{ 1397 pd_entry_t ptepde; 1398 vm_page_t mpte; 1399 1400 if (va >= VM_MAXUSER_ADDRESS) 1401 return 0; 1402 ptepde = *pmap_pde(pmap, va); 1403 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); 1404 return pmap_unwire_pte_hold(pmap, mpte, free); 1405} 1406 1407void 1408pmap_pinit0(pmap_t pmap) 1409{ 1410 1411 PMAP_LOCK_INIT(pmap); 1412 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1413#ifdef PAE 1414 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1415#endif 1416 pmap->pm_root = NULL; 1417 pmap->pm_active = 0; 1418 PCPU_SET(curpmap, pmap); 1419 TAILQ_INIT(&pmap->pm_pvchunk); 1420 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1421 mtx_lock_spin(&allpmaps_lock); 1422 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1423 mtx_unlock_spin(&allpmaps_lock); 1424} 1425 1426/* 1427 * Initialize a preallocated and zeroed pmap structure, 1428 * such as one in a vmspace structure. 1429 */ 1430int 1431pmap_pinit(pmap_t pmap) 1432{ 1433 vm_page_t m, ptdpg[NPGPTD]; 1434 vm_paddr_t pa; 1435 static int color; 1436 int i; 1437 1438 PMAP_LOCK_INIT(pmap); 1439 1440 /* 1441 * No need to allocate page table space yet but we do need a valid 1442 * page directory table. 1443 */ 1444 if (pmap->pm_pdir == NULL) { 1445 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1446 NBPTD); 1447 1448 if (pmap->pm_pdir == NULL) { 1449 PMAP_LOCK_DESTROY(pmap); 1450 return (0); 1451 } 1452#ifdef PAE 1453 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO); 1454 KASSERT(((vm_offset_t)pmap->pm_pdpt & 1455 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0, 1456 ("pmap_pinit: pdpt misaligned")); 1457 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30), 1458 ("pmap_pinit: pdpt above 4g")); 1459#endif 1460 pmap->pm_root = NULL; 1461 } 1462 KASSERT(pmap->pm_root == NULL, 1463 ("pmap_pinit: pmap has reserved page table page(s)")); 1464 1465 /* 1466 * allocate the page directory page(s) 1467 */ 1468 for (i = 0; i < NPGPTD;) { 1469 m = vm_page_alloc(NULL, color++, 1470 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1471 VM_ALLOC_ZERO); 1472 if (m == NULL) 1473 VM_WAIT; 1474 else { 1475 ptdpg[i++] = m; 1476 } 1477 } 1478 1479 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1480 1481 for (i = 0; i < NPGPTD; i++) { 1482 if ((ptdpg[i]->flags & PG_ZERO) == 0) 1483 bzero(pmap->pm_pdir + (i * NPDEPG), PAGE_SIZE); 1484 } 1485 1486 mtx_lock_spin(&allpmaps_lock); 1487 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1488 mtx_unlock_spin(&allpmaps_lock); 1489 /* Wire in kernel global address entries. */ 1490 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1491 1492 /* install self-referential address mapping entry(s) */ 1493 for (i = 0; i < NPGPTD; i++) { 1494 pa = VM_PAGE_TO_PHYS(ptdpg[i]); 1495 pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M; 1496#ifdef PAE 1497 pmap->pm_pdpt[i] = pa | PG_V; 1498#endif 1499 } 1500 1501 pmap->pm_active = 0; 1502 TAILQ_INIT(&pmap->pm_pvchunk); 1503 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1504 1505 return (1); 1506} 1507 1508/* 1509 * this routine is called if the page table page is not 1510 * mapped correctly. 1511 */ 1512static vm_page_t 1513_pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags) 1514{ 1515 vm_paddr_t ptepa; 1516 vm_page_t m; 1517 1518 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1519 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1520 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1521 1522 /* 1523 * Allocate a page table page. 1524 */ 1525 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1526 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1527 if (flags & M_WAITOK) { 1528 PMAP_UNLOCK(pmap); 1529 vm_page_unlock_queues(); 1530 VM_WAIT; 1531 vm_page_lock_queues(); 1532 PMAP_LOCK(pmap); 1533 } 1534 1535 /* 1536 * Indicate the need to retry. While waiting, the page table 1537 * page may have been allocated. 1538 */ 1539 return (NULL); 1540 } 1541 if ((m->flags & PG_ZERO) == 0) 1542 pmap_zero_page(m); 1543 1544 /* 1545 * Map the pagetable page into the process address space, if 1546 * it isn't already there. 1547 */ 1548 1549 pmap->pm_stats.resident_count++; 1550 1551 ptepa = VM_PAGE_TO_PHYS(m); 1552 pmap->pm_pdir[ptepindex] = 1553 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M); 1554 1555 return m; 1556} 1557 1558static vm_page_t 1559pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags) 1560{ 1561 unsigned ptepindex; 1562 pd_entry_t ptepa; 1563 vm_page_t m; 1564 1565 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1566 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1567 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1568 1569 /* 1570 * Calculate pagetable page index 1571 */ 1572 ptepindex = va >> PDRSHIFT; 1573retry: 1574 /* 1575 * Get the page directory entry 1576 */ 1577 ptepa = pmap->pm_pdir[ptepindex]; 1578 1579 /* 1580 * This supports switching from a 4MB page to a 1581 * normal 4K page. 1582 */ 1583 if (ptepa & PG_PS) { 1584 (void)pmap_demote_pde(pmap, &pmap->pm_pdir[ptepindex], va); 1585 ptepa = pmap->pm_pdir[ptepindex]; 1586 } 1587 1588 /* 1589 * If the page table page is mapped, we just increment the 1590 * hold count, and activate it. 1591 */ 1592 if (ptepa) { 1593 m = PHYS_TO_VM_PAGE(ptepa & PG_FRAME); 1594 m->wire_count++; 1595 } else { 1596 /* 1597 * Here if the pte page isn't mapped, or if it has 1598 * been deallocated. 1599 */ 1600 m = _pmap_allocpte(pmap, ptepindex, flags); 1601 if (m == NULL && (flags & M_WAITOK)) 1602 goto retry; 1603 } 1604 return (m); 1605} 1606 1607 1608/*************************************************** 1609* Pmap allocation/deallocation routines. 1610 ***************************************************/ 1611 1612#ifdef SMP 1613/* 1614 * Deal with a SMP shootdown of other users of the pmap that we are 1615 * trying to dispose of. This can be a bit hairy. 1616 */ 1617static u_int *lazymask; 1618static u_int lazyptd; 1619static volatile u_int lazywait; 1620 1621void pmap_lazyfix_action(void); 1622 1623void 1624pmap_lazyfix_action(void) 1625{ 1626 u_int mymask = PCPU_GET(cpumask); 1627 1628#ifdef COUNT_IPIS 1629 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++; 1630#endif 1631 if (rcr3() == lazyptd) 1632 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1633 atomic_clear_int(lazymask, mymask); 1634 atomic_store_rel_int(&lazywait, 1); 1635} 1636 1637static void 1638pmap_lazyfix_self(u_int mymask) 1639{ 1640 1641 if (rcr3() == lazyptd) 1642 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1643 atomic_clear_int(lazymask, mymask); 1644} 1645 1646 1647static void 1648pmap_lazyfix(pmap_t pmap) 1649{ 1650 u_int mymask; 1651 u_int mask; 1652 u_int spins; 1653 1654 while ((mask = pmap->pm_active) != 0) { 1655 spins = 50000000; 1656 mask = mask & -mask; /* Find least significant set bit */ 1657 mtx_lock_spin(&smp_ipi_mtx); 1658#ifdef PAE 1659 lazyptd = vtophys(pmap->pm_pdpt); 1660#else 1661 lazyptd = vtophys(pmap->pm_pdir); 1662#endif 1663 mymask = PCPU_GET(cpumask); 1664 if (mask == mymask) { 1665 lazymask = &pmap->pm_active; 1666 pmap_lazyfix_self(mymask); 1667 } else { 1668 atomic_store_rel_int((u_int *)&lazymask, 1669 (u_int)&pmap->pm_active); 1670 atomic_store_rel_int(&lazywait, 0); 1671 ipi_selected(mask, IPI_LAZYPMAP); 1672 while (lazywait == 0) { 1673 ia32_pause(); 1674 if (--spins == 0) 1675 break; 1676 } 1677 } 1678 mtx_unlock_spin(&smp_ipi_mtx); 1679 if (spins == 0) 1680 printf("pmap_lazyfix: spun for 50000000\n"); 1681 } 1682} 1683 1684#else /* SMP */ 1685 1686/* 1687 * Cleaning up on uniprocessor is easy. For various reasons, we're 1688 * unlikely to have to even execute this code, including the fact 1689 * that the cleanup is deferred until the parent does a wait(2), which 1690 * means that another userland process has run. 1691 */ 1692static void 1693pmap_lazyfix(pmap_t pmap) 1694{ 1695 u_int cr3; 1696 1697 cr3 = vtophys(pmap->pm_pdir); 1698 if (cr3 == rcr3()) { 1699 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1700 pmap->pm_active &= ~(PCPU_GET(cpumask)); 1701 } 1702} 1703#endif /* SMP */ 1704 1705/* 1706 * Release any resources held by the given physical map. 1707 * Called when a pmap initialized by pmap_pinit is being released. 1708 * Should only be called if the map contains no valid mappings. 1709 */ 1710void 1711pmap_release(pmap_t pmap) 1712{ 1713 vm_page_t m, ptdpg[NPGPTD]; 1714 int i; 1715 1716 KASSERT(pmap->pm_stats.resident_count == 0, 1717 ("pmap_release: pmap resident count %ld != 0", 1718 pmap->pm_stats.resident_count)); 1719 KASSERT(pmap->pm_root == NULL, 1720 ("pmap_release: pmap has reserved page table page(s)")); 1721 1722 pmap_lazyfix(pmap); 1723 mtx_lock_spin(&allpmaps_lock); 1724 LIST_REMOVE(pmap, pm_list); 1725 mtx_unlock_spin(&allpmaps_lock); 1726 1727 for (i = 0; i < NPGPTD; i++) 1728 ptdpg[i] = PHYS_TO_VM_PAGE(pmap->pm_pdir[PTDPTDI + i] & 1729 PG_FRAME); 1730 1731 bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) * 1732 sizeof(*pmap->pm_pdir)); 1733 1734 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1735 1736 for (i = 0; i < NPGPTD; i++) { 1737 m = ptdpg[i]; 1738#ifdef PAE 1739 KASSERT(VM_PAGE_TO_PHYS(m) == (pmap->pm_pdpt[i] & PG_FRAME), 1740 ("pmap_release: got wrong ptd page")); 1741#endif 1742 m->wire_count--; 1743 atomic_subtract_int(&cnt.v_wire_count, 1); 1744 vm_page_free_zero(m); 1745 } 1746 PMAP_LOCK_DESTROY(pmap); 1747} 1748 1749static int 1750kvm_size(SYSCTL_HANDLER_ARGS) 1751{ 1752 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1753 1754 return sysctl_handle_long(oidp, &ksize, 0, req); 1755} 1756SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1757 0, 0, kvm_size, "IU", "Size of KVM"); 1758 1759static int 1760kvm_free(SYSCTL_HANDLER_ARGS) 1761{ 1762 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1763 1764 return sysctl_handle_long(oidp, &kfree, 0, req); 1765} 1766SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1767 0, 0, kvm_free, "IU", "Amount of KVM free"); 1768 1769/* 1770 * grow the number of kernel page table entries, if needed 1771 */ 1772void 1773pmap_growkernel(vm_offset_t addr) 1774{ 1775 struct pmap *pmap; 1776 vm_paddr_t ptppaddr; 1777 vm_page_t nkpg; 1778 pd_entry_t newpdir; 1779 pt_entry_t *pde; 1780 1781 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1782 if (kernel_vm_end == 0) { 1783 kernel_vm_end = KERNBASE; 1784 nkpt = 0; 1785 while (pdir_pde(PTD, kernel_vm_end)) { 1786 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1787 nkpt++; 1788 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1789 kernel_vm_end = kernel_map->max_offset; 1790 break; 1791 } 1792 } 1793 } 1794 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1795 if (addr - 1 >= kernel_map->max_offset) 1796 addr = kernel_map->max_offset; 1797 while (kernel_vm_end < addr) { 1798 if (pdir_pde(PTD, kernel_vm_end)) { 1799 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1800 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1801 kernel_vm_end = kernel_map->max_offset; 1802 break; 1803 } 1804 continue; 1805 } 1806 1807 nkpg = vm_page_alloc(NULL, kernel_vm_end >> PDRSHIFT, 1808 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1809 VM_ALLOC_ZERO); 1810 if (nkpg == NULL) 1811 panic("pmap_growkernel: no memory to grow kernel"); 1812 1813 nkpt++; 1814 1815 if ((nkpg->flags & PG_ZERO) == 0) 1816 pmap_zero_page(nkpg); 1817 ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1818 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1819 pdir_pde(PTD, kernel_vm_end) = newpdir; 1820 1821 mtx_lock_spin(&allpmaps_lock); 1822 LIST_FOREACH(pmap, &allpmaps, pm_list) { 1823 pde = pmap_pde(pmap, kernel_vm_end); 1824 pde_store(pde, newpdir); 1825 } 1826 mtx_unlock_spin(&allpmaps_lock); 1827 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1828 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1829 kernel_vm_end = kernel_map->max_offset; 1830 break; 1831 } 1832 } 1833} 1834 1835 1836/*************************************************** 1837 * page management routines. 1838 ***************************************************/ 1839 1840CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE); 1841CTASSERT(_NPCM == 11); 1842 1843static __inline struct pv_chunk * 1844pv_to_chunk(pv_entry_t pv) 1845{ 1846 1847 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK); 1848} 1849 1850#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap) 1851 1852#define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */ 1853#define PC_FREE10 0x0000fffful /* Free values for index 10 */ 1854 1855static uint32_t pc_freemask[11] = { 1856 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1857 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1858 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1859 PC_FREE0_9, PC_FREE10 1860}; 1861 1862SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0, 1863 "Current number of pv entries"); 1864 1865#ifdef PV_STATS 1866static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail; 1867 1868SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0, 1869 "Current number of pv entry chunks"); 1870SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0, 1871 "Current number of pv entry chunks allocated"); 1872SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0, 1873 "Current number of pv entry chunks frees"); 1874SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0, 1875 "Number of times tried to get a chunk page but failed."); 1876 1877static long pv_entry_frees, pv_entry_allocs; 1878static int pv_entry_spare; 1879 1880SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0, 1881 "Current number of pv entry frees"); 1882SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0, 1883 "Current number of pv entry allocs"); 1884SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0, 1885 "Current number of spare pv entries"); 1886 1887static int pmap_collect_inactive, pmap_collect_active; 1888 1889SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0, 1890 "Current number times pmap_collect called on inactive queue"); 1891SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0, 1892 "Current number times pmap_collect called on active queue"); 1893#endif 1894 1895/* 1896 * We are in a serious low memory condition. Resort to 1897 * drastic measures to free some pages so we can allocate 1898 * another pv entry chunk. This is normally called to 1899 * unmap inactive pages, and if necessary, active pages. 1900 */ 1901static void 1902pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq) 1903{ 1904 struct md_page *pvh; 1905 pd_entry_t *pde; 1906 pmap_t pmap; 1907 pt_entry_t *pte, tpte; 1908 pv_entry_t next_pv, pv; 1909 vm_offset_t va; 1910 vm_page_t m, free; 1911 1912 sched_pin(); 1913 TAILQ_FOREACH(m, &vpq->pl, pageq) { 1914 if (m->hold_count || m->busy) 1915 continue; 1916 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) { 1917 va = pv->pv_va; 1918 pmap = PV_PMAP(pv); 1919 /* Avoid deadlock and lock recursion. */ 1920 if (pmap > locked_pmap) 1921 PMAP_LOCK(pmap); 1922 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) 1923 continue; 1924 pmap->pm_stats.resident_count--; 1925 pde = pmap_pde(pmap, va); 1926 KASSERT((*pde & PG_PS) == 0, ("pmap_collect: found" 1927 " a 4mpage in page %p's pv list", m)); 1928 pte = pmap_pte_quick(pmap, va); 1929 tpte = pte_load_clear(pte); 1930 KASSERT((tpte & PG_W) == 0, 1931 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte)); 1932 if (tpte & PG_A) 1933 vm_page_flag_set(m, PG_REFERENCED); 1934 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) 1935 vm_page_dirty(m); 1936 free = NULL; 1937 pmap_unuse_pt(pmap, va, &free); 1938 pmap_invalidate_page(pmap, va); 1939 pmap_free_zero_pages(free); 1940 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1941 if (TAILQ_EMPTY(&m->md.pv_list)) { 1942 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 1943 if (TAILQ_EMPTY(&pvh->pv_list)) 1944 vm_page_flag_clear(m, PG_WRITEABLE); 1945 } 1946 free_pv_entry(pmap, pv); 1947 if (pmap != locked_pmap) 1948 PMAP_UNLOCK(pmap); 1949 } 1950 } 1951 sched_unpin(); 1952} 1953 1954 1955/* 1956 * free the pv_entry back to the free list 1957 */ 1958static void 1959free_pv_entry(pmap_t pmap, pv_entry_t pv) 1960{ 1961 vm_page_t m; 1962 struct pv_chunk *pc; 1963 int idx, field, bit; 1964 1965 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1966 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1967 PV_STAT(pv_entry_frees++); 1968 PV_STAT(pv_entry_spare++); 1969 pv_entry_count--; 1970 pc = pv_to_chunk(pv); 1971 idx = pv - &pc->pc_pventry[0]; 1972 field = idx / 32; 1973 bit = idx % 32; 1974 pc->pc_map[field] |= 1ul << bit; 1975 /* move to head of list */ 1976 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 1977 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 1978 for (idx = 0; idx < _NPCM; idx++) 1979 if (pc->pc_map[idx] != pc_freemask[idx]) 1980 return; 1981 PV_STAT(pv_entry_spare -= _NPCPV); 1982 PV_STAT(pc_chunk_count--); 1983 PV_STAT(pc_chunk_frees++); 1984 /* entire chunk is free, return it */ 1985 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 1986 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 1987 pmap_qremove((vm_offset_t)pc, 1); 1988 vm_page_unwire(m, 0); 1989 vm_page_free(m); 1990 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 1991} 1992 1993/* 1994 * get a new pv_entry, allocating a block from the system 1995 * when needed. 1996 */ 1997static pv_entry_t 1998get_pv_entry(pmap_t pmap, int try) 1999{ 2000 static const struct timeval printinterval = { 60, 0 }; 2001 static struct timeval lastprint; 2002 static vm_pindex_t colour; 2003 struct vpgqueues *pq; 2004 int bit, field; 2005 pv_entry_t pv; 2006 struct pv_chunk *pc; 2007 vm_page_t m; 2008 2009 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2010 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2011 PV_STAT(pv_entry_allocs++); 2012 pv_entry_count++; 2013 if (pv_entry_count > pv_entry_high_water) 2014 if (ratecheck(&lastprint, &printinterval)) 2015 printf("Approaching the limit on PV entries, consider " 2016 "increasing either the vm.pmap.shpgperproc or the " 2017 "vm.pmap.pv_entry_max tunable.\n"); 2018 pq = NULL; 2019retry: 2020 pc = TAILQ_FIRST(&pmap->pm_pvchunk); 2021 if (pc != NULL) { 2022 for (field = 0; field < _NPCM; field++) { 2023 if (pc->pc_map[field]) { 2024 bit = bsfl(pc->pc_map[field]); 2025 break; 2026 } 2027 } 2028 if (field < _NPCM) { 2029 pv = &pc->pc_pventry[field * 32 + bit]; 2030 pc->pc_map[field] &= ~(1ul << bit); 2031 /* If this was the last item, move it to tail */ 2032 for (field = 0; field < _NPCM; field++) 2033 if (pc->pc_map[field] != 0) { 2034 PV_STAT(pv_entry_spare--); 2035 return (pv); /* not full, return */ 2036 } 2037 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2038 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); 2039 PV_STAT(pv_entry_spare--); 2040 return (pv); 2041 } 2042 } 2043 /* 2044 * Access to the ptelist "pv_vafree" is synchronized by the page 2045 * queues lock. If "pv_vafree" is currently non-empty, it will 2046 * remain non-empty until pmap_ptelist_alloc() completes. 2047 */ 2048 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq == 2049 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) | 2050 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) { 2051 if (try) { 2052 pv_entry_count--; 2053 PV_STAT(pc_chunk_tryfail++); 2054 return (NULL); 2055 } 2056 /* 2057 * Reclaim pv entries: At first, destroy mappings to 2058 * inactive pages. After that, if a pv chunk entry 2059 * is still needed, destroy mappings to active pages. 2060 */ 2061 if (pq == NULL) { 2062 PV_STAT(pmap_collect_inactive++); 2063 pq = &vm_page_queues[PQ_INACTIVE]; 2064 } else if (pq == &vm_page_queues[PQ_INACTIVE]) { 2065 PV_STAT(pmap_collect_active++); 2066 pq = &vm_page_queues[PQ_ACTIVE]; 2067 } else 2068 panic("get_pv_entry: increase vm.pmap.shpgperproc"); 2069 pmap_collect(pmap, pq); 2070 goto retry; 2071 } 2072 PV_STAT(pc_chunk_count++); 2073 PV_STAT(pc_chunk_allocs++); 2074 colour++; 2075 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 2076 pmap_qenter((vm_offset_t)pc, &m, 1); 2077 pc->pc_pmap = pmap; 2078 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */ 2079 for (field = 1; field < _NPCM; field++) 2080 pc->pc_map[field] = pc_freemask[field]; 2081 pv = &pc->pc_pventry[0]; 2082 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2083 PV_STAT(pv_entry_spare += _NPCPV - 1); 2084 return (pv); 2085} 2086 2087static __inline pv_entry_t 2088pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va) 2089{ 2090 pv_entry_t pv; 2091 2092 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2093 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) { 2094 if (pmap == PV_PMAP(pv) && va == pv->pv_va) { 2095 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list); 2096 break; 2097 } 2098 } 2099 return (pv); 2100} 2101 2102static void 2103pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa) 2104{ 2105 struct md_page *pvh; 2106 pv_entry_t pv; 2107 vm_offset_t va_last; 2108 vm_page_t m; 2109 2110 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2111 KASSERT((pa & PDRMASK) == 0, 2112 ("pmap_pv_demote_pde: pa is not 4mpage aligned")); 2113 2114 /* 2115 * Transfer the 4mpage's pv entry for this mapping to the first 2116 * page's pv list. 2117 */ 2118 pvh = pa_to_pvh(pa); 2119 va = trunc_4mpage(va); 2120 pv = pmap_pvh_remove(pvh, pmap, va); 2121 KASSERT(pv != NULL, ("pmap_pv_demote_pde: pv not found")); 2122 m = PHYS_TO_VM_PAGE(pa); 2123 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2124 /* Instantiate the remaining NPTEPG - 1 pv entries. */ 2125 va_last = va + NBPDR - PAGE_SIZE; 2126 do { 2127 m++; 2128 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0, 2129 ("pmap_pv_demote_pde: page %p is not managed", m)); 2130 va += PAGE_SIZE; 2131 pmap_insert_entry(pmap, va, m); 2132 } while (va < va_last); 2133} 2134 2135static void 2136pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa) 2137{ 2138 struct md_page *pvh; 2139 pv_entry_t pv; 2140 vm_offset_t va_last; 2141 vm_page_t m; 2142 2143 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2144 KASSERT((pa & PDRMASK) == 0, 2145 ("pmap_pv_promote_pde: pa is not 4mpage aligned")); 2146 2147 /* 2148 * Transfer the first page's pv entry for this mapping to the 2149 * 4mpage's pv list. Aside from avoiding the cost of a call 2150 * to get_pv_entry(), a transfer avoids the possibility that 2151 * get_pv_entry() calls pmap_collect() and that pmap_collect() 2152 * removes one of the mappings that is being promoted. 2153 */ 2154 m = PHYS_TO_VM_PAGE(pa); 2155 va = trunc_4mpage(va); 2156 pv = pmap_pvh_remove(&m->md, pmap, va); 2157 KASSERT(pv != NULL, ("pmap_pv_promote_pde: pv not found")); 2158 pvh = pa_to_pvh(pa); 2159 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list); 2160 /* Free the remaining NPTEPG - 1 pv entries. */ 2161 va_last = va + NBPDR - PAGE_SIZE; 2162 do { 2163 m++; 2164 va += PAGE_SIZE; 2165 pmap_pvh_free(&m->md, pmap, va); 2166 } while (va < va_last); 2167} 2168 2169static void 2170pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va) 2171{ 2172 pv_entry_t pv; 2173 2174 pv = pmap_pvh_remove(pvh, pmap, va); 2175 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found")); 2176 free_pv_entry(pmap, pv); 2177} 2178 2179static void 2180pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 2181{ 2182 struct md_page *pvh; 2183 2184 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2185 pmap_pvh_free(&m->md, pmap, va); 2186 if (TAILQ_EMPTY(&m->md.pv_list)) { 2187 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 2188 if (TAILQ_EMPTY(&pvh->pv_list)) 2189 vm_page_flag_clear(m, PG_WRITEABLE); 2190 } 2191} 2192 2193/* 2194 * Create a pv entry for page at pa for 2195 * (pmap, va). 2196 */ 2197static void 2198pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2199{ 2200 pv_entry_t pv; 2201 2202 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2203 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2204 pv = get_pv_entry(pmap, FALSE); 2205 pv->pv_va = va; 2206 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2207} 2208 2209/* 2210 * Conditionally create a pv entry. 2211 */ 2212static boolean_t 2213pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2214{ 2215 pv_entry_t pv; 2216 2217 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2218 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2219 if (pv_entry_count < pv_entry_high_water && 2220 (pv = get_pv_entry(pmap, TRUE)) != NULL) { 2221 pv->pv_va = va; 2222 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2223 return (TRUE); 2224 } else 2225 return (FALSE); 2226} 2227 2228/* 2229 * Create the pv entries for each of the pages within a superpage. 2230 */ 2231static boolean_t 2232pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa) 2233{ 2234 struct md_page *pvh; 2235 pv_entry_t pv; 2236 2237 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2238 if (pv_entry_count < pv_entry_high_water && 2239 (pv = get_pv_entry(pmap, TRUE)) != NULL) { 2240 pv->pv_va = va; 2241 pvh = pa_to_pvh(pa); 2242 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list); 2243 return (TRUE); 2244 } else 2245 return (FALSE); 2246} 2247 2248/* 2249 * Tries to demote a 2- or 4MB page mapping. 2250 */ 2251static boolean_t 2252pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va) 2253{ 2254 pd_entry_t newpde, oldpde; 2255 pmap_t allpmaps_entry; 2256 pt_entry_t *firstpte, newpte, *pte; 2257 vm_paddr_t mptepa; 2258 vm_page_t free, mpte; 2259 2260 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2261 mpte = pmap_lookup_pt_page(pmap, va); 2262 if (mpte != NULL) 2263 pmap_remove_pt_page(pmap, mpte); 2264 else { 2265 KASSERT((*pde & PG_W) == 0, 2266 ("pmap_demote_pde: page table page for a wired mapping" 2267 " is missing")); 2268 free = NULL; 2269 pmap_remove_pde(pmap, pde, trunc_4mpage(va), &free); 2270 pmap_invalidate_page(pmap, trunc_4mpage(va)); 2271 pmap_free_zero_pages(free); 2272 CTR2(KTR_PMAP, "pmap_demote_pde: failure for va %#x" 2273 " in pmap %p", va, pmap); 2274 return (FALSE); 2275 } 2276 mptepa = VM_PAGE_TO_PHYS(mpte); 2277 2278 /* 2279 * Temporarily map the page table page (mpte) into the kernel's 2280 * address space at either PADDR1 or PADDR2. 2281 */ 2282 if (curthread->td_pinned > 0 && mtx_owned(&vm_page_queue_mtx)) { 2283 if ((*PMAP1 & PG_FRAME) != mptepa) { 2284 *PMAP1 = mptepa | PG_RW | PG_V | PG_A | PG_M; 2285#ifdef SMP 2286 PMAP1cpu = PCPU_GET(cpuid); 2287#endif 2288 invlcaddr(PADDR1); 2289 PMAP1changed++; 2290 } else 2291#ifdef SMP 2292 if (PMAP1cpu != PCPU_GET(cpuid)) { 2293 PMAP1cpu = PCPU_GET(cpuid); 2294 invlcaddr(PADDR1); 2295 PMAP1changedcpu++; 2296 } else 2297#endif 2298 PMAP1unchanged++; 2299 firstpte = PADDR1; 2300 } else { 2301 mtx_lock(&PMAP2mutex); 2302 if ((*PMAP2 & PG_FRAME) != mptepa) { 2303 *PMAP2 = mptepa | PG_RW | PG_V | PG_A | PG_M; 2304 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2); 2305 } 2306 firstpte = PADDR2; 2307 } 2308 oldpde = *pde; 2309 newpde = mptepa | PG_M | PG_A | (oldpde & PG_U) | PG_RW | PG_V; 2310 KASSERT((oldpde & (PG_A | PG_V)) == (PG_A | PG_V), 2311 ("pmap_demote_pde: oldpde is missing PG_A and/or PG_V")); 2312 KASSERT((oldpde & (PG_M | PG_RW)) != PG_RW, 2313 ("pmap_demote_pde: oldpde is missing PG_M")); 2314 KASSERT((oldpde & PG_PS) != 0, 2315 ("pmap_demote_pde: oldpde is missing PG_PS")); 2316 newpte = oldpde & ~PG_PS; 2317 if ((newpte & PG_PDE_PAT) != 0) 2318 newpte ^= PG_PDE_PAT | PG_PTE_PAT; 2319 2320 /* 2321 * If the mapping has changed attributes, update the page table 2322 * entries. 2323 */ 2324 KASSERT((*firstpte & PG_FRAME) == (newpte & PG_FRAME), 2325 ("pmap_demote_pde: firstpte and newpte map different physical" 2326 " addresses")); 2327 if ((*firstpte & PG_PTE_PROMOTE) != (newpte & PG_PTE_PROMOTE)) 2328 for (pte = firstpte; pte < firstpte + NPTEPG; pte++) { 2329 *pte = newpte; 2330 newpte += PAGE_SIZE; 2331 } 2332 2333 /* 2334 * Demote the mapping. This pmap is locked. The old PDE has 2335 * PG_A set. If the old PDE has PG_RW set, it also has PG_M 2336 * set. Thus, there is no danger of a race with another 2337 * processor changing the setting of PG_A and/or PG_M between 2338 * the read above and the store below. 2339 */ 2340 if (pmap == kernel_pmap) { 2341 /* 2342 * A harmless race exists between this loop and the bcopy() 2343 * in pmap_pinit() that initializes the kernel segment of 2344 * the new page table. Specifically, that bcopy() may copy 2345 * the new PDE from the PTD, which is first in allpmaps, to 2346 * the new page table before this loop updates that new 2347 * page table. 2348 */ 2349 mtx_lock_spin(&allpmaps_lock); 2350 LIST_FOREACH(allpmaps_entry, &allpmaps, pm_list) { 2351 pde = pmap_pde(allpmaps_entry, va); 2352 KASSERT(*pde == newpde || (*pde & PG_PTE_PROMOTE) == 2353 (oldpde & PG_PTE_PROMOTE), 2354 ("pmap_demote_pde: pde was %#jx, expected %#jx", 2355 (uintmax_t)*pde, (uintmax_t)oldpde)); 2356 pde_store(pde, newpde); 2357 } 2358 mtx_unlock_spin(&allpmaps_lock); 2359 } else 2360 pde_store(pde, newpde); 2361 if (firstpte == PADDR2) 2362 mtx_unlock(&PMAP2mutex); 2363 2364 /* 2365 * Invalidate the recursive mapping of the page table page. 2366 */ 2367 pmap_invalidate_page(pmap, (vm_offset_t)vtopte(va)); 2368 2369 /* 2370 * Demote the pv entry. This depends on the earlier demotion 2371 * of the mapping. Specifically, the (re)creation of a per- 2372 * page pv entry might trigger the execution of pmap_collect(), 2373 * which might reclaim a newly (re)created per-page pv entry 2374 * and destroy the associated mapping. In order to destroy 2375 * the mapping, the PDE must have already changed from mapping 2376 * the 2mpage to referencing the page table page. 2377 */ 2378 if ((oldpde & PG_MANAGED) != 0) 2379 pmap_pv_demote_pde(pmap, va, oldpde & PG_PS_FRAME); 2380 2381 pmap_pde_demotions++; 2382 CTR2(KTR_PMAP, "pmap_demote_pde: success for va %#x" 2383 " in pmap %p", va, pmap); 2384 return (TRUE); 2385} 2386 2387/* 2388 * pmap_remove_pde: do the things to unmap a superpage in a process 2389 */ 2390static void 2391pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva, 2392 vm_page_t *free) 2393{ 2394 struct md_page *pvh; 2395 pd_entry_t oldpde; 2396 vm_offset_t eva, va; 2397 vm_page_t m, mpte; 2398 2399 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2400 KASSERT((sva & PDRMASK) == 0, 2401 ("pmap_remove_pde: sva is not 4mpage aligned")); 2402 oldpde = pte_load_clear(pdq); 2403 if (oldpde & PG_W) 2404 pmap->pm_stats.wired_count -= NBPDR / PAGE_SIZE; 2405 2406 /* 2407 * Machines that don't support invlpg, also don't support 2408 * PG_G. 2409 */ 2410 if (oldpde & PG_G) 2411 pmap_invalidate_page(kernel_pmap, sva); 2412 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 2413 if (oldpde & PG_MANAGED) { 2414 pvh = pa_to_pvh(oldpde & PG_PS_FRAME); 2415 pmap_pvh_free(pvh, pmap, sva); 2416 eva = sva + NBPDR; 2417 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME); 2418 va < eva; va += PAGE_SIZE, m++) { 2419 if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW)) 2420 vm_page_dirty(m); 2421 if (oldpde & PG_A) 2422 vm_page_flag_set(m, PG_REFERENCED); 2423 if (TAILQ_EMPTY(&m->md.pv_list) && 2424 TAILQ_EMPTY(&pvh->pv_list)) 2425 vm_page_flag_clear(m, PG_WRITEABLE); 2426 } 2427 } 2428 if (pmap == kernel_pmap) { 2429 if (!pmap_demote_pde(pmap, pdq, sva)) 2430 panic("pmap_remove_pde: failed demotion"); 2431 } else { 2432 mpte = pmap_lookup_pt_page(pmap, sva); 2433 if (mpte != NULL) { 2434 pmap_remove_pt_page(pmap, mpte); 2435 KASSERT(mpte->wire_count == NPTEPG, 2436 ("pmap_remove_pde: pte page wire count error")); 2437 mpte->wire_count = 0; 2438 pmap_add_delayed_free_list(mpte, free, FALSE); 2439 atomic_subtract_int(&cnt.v_wire_count, 1); 2440 } 2441 } 2442} 2443 2444/* 2445 * pmap_remove_pte: do the things to unmap a page in a process 2446 */ 2447static int 2448pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free) 2449{ 2450 pt_entry_t oldpte; 2451 vm_page_t m; 2452 2453 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2454 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2455 oldpte = pte_load_clear(ptq); 2456 if (oldpte & PG_W) 2457 pmap->pm_stats.wired_count -= 1; 2458 /* 2459 * Machines that don't support invlpg, also don't support 2460 * PG_G. 2461 */ 2462 if (oldpte & PG_G) 2463 pmap_invalidate_page(kernel_pmap, va); 2464 pmap->pm_stats.resident_count -= 1; 2465 if (oldpte & PG_MANAGED) { 2466 m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME); 2467 if ((oldpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) 2468 vm_page_dirty(m); 2469 if (oldpte & PG_A) 2470 vm_page_flag_set(m, PG_REFERENCED); 2471 pmap_remove_entry(pmap, m, va); 2472 } 2473 return (pmap_unuse_pt(pmap, va, free)); 2474} 2475 2476/* 2477 * Remove a single page from a process address space 2478 */ 2479static void 2480pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free) 2481{ 2482 pt_entry_t *pte; 2483 2484 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2485 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 2486 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2487 if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0) 2488 return; 2489 pmap_remove_pte(pmap, pte, va, free); 2490 pmap_invalidate_page(pmap, va); 2491} 2492 2493/* 2494 * Remove the given range of addresses from the specified map. 2495 * 2496 * It is assumed that the start and end are properly 2497 * rounded to the page size. 2498 */ 2499void 2500pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 2501{ 2502 vm_offset_t pdnxt; 2503 pd_entry_t ptpaddr; 2504 pt_entry_t *pte; 2505 vm_page_t free = NULL; 2506 int anyvalid; 2507 2508 /* 2509 * Perform an unsynchronized read. This is, however, safe. 2510 */ 2511 if (pmap->pm_stats.resident_count == 0) 2512 return; 2513 2514 anyvalid = 0; 2515 2516 vm_page_lock_queues(); 2517 sched_pin(); 2518 PMAP_LOCK(pmap); 2519 2520 /* 2521 * special handling of removing one page. a very 2522 * common operation and easy to short circuit some 2523 * code. 2524 */ 2525 if ((sva + PAGE_SIZE == eva) && 2526 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 2527 pmap_remove_page(pmap, sva, &free); 2528 goto out; 2529 } 2530 2531 for (; sva < eva; sva = pdnxt) { 2532 unsigned pdirindex; 2533 2534 /* 2535 * Calculate index for next page table. 2536 */ 2537 pdnxt = (sva + NBPDR) & ~PDRMASK; 2538 if (pdnxt < sva) 2539 pdnxt = eva; 2540 if (pmap->pm_stats.resident_count == 0) 2541 break; 2542 2543 pdirindex = sva >> PDRSHIFT; 2544 ptpaddr = pmap->pm_pdir[pdirindex]; 2545 2546 /* 2547 * Weed out invalid mappings. Note: we assume that the page 2548 * directory table is always allocated, and in kernel virtual. 2549 */ 2550 if (ptpaddr == 0) 2551 continue; 2552 2553 /* 2554 * Check for large page. 2555 */ 2556 if ((ptpaddr & PG_PS) != 0) { 2557 /* 2558 * Are we removing the entire large page? If not, 2559 * demote the mapping and fall through. 2560 */ 2561 if (sva + NBPDR == pdnxt && eva >= pdnxt) { 2562 /* 2563 * The TLB entry for a PG_G mapping is 2564 * invalidated by pmap_remove_pde(). 2565 */ 2566 if ((ptpaddr & PG_G) == 0) 2567 anyvalid = 1; 2568 pmap_remove_pde(pmap, 2569 &pmap->pm_pdir[pdirindex], sva, &free); 2570 continue; 2571 } else if (!pmap_demote_pde(pmap, 2572 &pmap->pm_pdir[pdirindex], sva)) { 2573 /* The large page mapping was destroyed. */ 2574 continue; 2575 } 2576 } 2577 2578 /* 2579 * Limit our scan to either the end of the va represented 2580 * by the current page table page, or to the end of the 2581 * range being removed. 2582 */ 2583 if (pdnxt > eva) 2584 pdnxt = eva; 2585 2586 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2587 sva += PAGE_SIZE) { 2588 if (*pte == 0) 2589 continue; 2590 2591 /* 2592 * The TLB entry for a PG_G mapping is invalidated 2593 * by pmap_remove_pte(). 2594 */ 2595 if ((*pte & PG_G) == 0) 2596 anyvalid = 1; 2597 if (pmap_remove_pte(pmap, pte, sva, &free)) 2598 break; 2599 } 2600 } 2601out: 2602 sched_unpin(); 2603 if (anyvalid) 2604 pmap_invalidate_all(pmap); 2605 vm_page_unlock_queues(); 2606 PMAP_UNLOCK(pmap); 2607 pmap_free_zero_pages(free); 2608} 2609 2610/* 2611 * Routine: pmap_remove_all 2612 * Function: 2613 * Removes this physical page from 2614 * all physical maps in which it resides. 2615 * Reflects back modify bits to the pager. 2616 * 2617 * Notes: 2618 * Original versions of this routine were very 2619 * inefficient because they iteratively called 2620 * pmap_remove (slow...) 2621 */ 2622 2623void 2624pmap_remove_all(vm_page_t m) 2625{ 2626 struct md_page *pvh; 2627 pv_entry_t pv; 2628 pmap_t pmap; 2629 pt_entry_t *pte, tpte; 2630 pd_entry_t *pde; 2631 vm_offset_t va; 2632 vm_page_t free; 2633 2634 KASSERT((m->flags & PG_FICTITIOUS) == 0, 2635 ("pmap_remove_all: page %p is fictitious", m)); 2636 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2637 sched_pin(); 2638 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 2639 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) { 2640 va = pv->pv_va; 2641 pmap = PV_PMAP(pv); 2642 PMAP_LOCK(pmap); 2643 pde = pmap_pde(pmap, va); 2644 (void)pmap_demote_pde(pmap, pde, va); 2645 PMAP_UNLOCK(pmap); 2646 } 2647 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2648 pmap = PV_PMAP(pv); 2649 PMAP_LOCK(pmap); 2650 pmap->pm_stats.resident_count--; 2651 pde = pmap_pde(pmap, pv->pv_va); 2652 KASSERT((*pde & PG_PS) == 0, ("pmap_remove_all: found" 2653 " a 4mpage in page %p's pv list", m)); 2654 pte = pmap_pte_quick(pmap, pv->pv_va); 2655 tpte = pte_load_clear(pte); 2656 if (tpte & PG_W) 2657 pmap->pm_stats.wired_count--; 2658 if (tpte & PG_A) 2659 vm_page_flag_set(m, PG_REFERENCED); 2660 2661 /* 2662 * Update the vm_page_t clean and reference bits. 2663 */ 2664 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) 2665 vm_page_dirty(m); 2666 free = NULL; 2667 pmap_unuse_pt(pmap, pv->pv_va, &free); 2668 pmap_invalidate_page(pmap, pv->pv_va); 2669 pmap_free_zero_pages(free); 2670 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2671 free_pv_entry(pmap, pv); 2672 PMAP_UNLOCK(pmap); 2673 } 2674 vm_page_flag_clear(m, PG_WRITEABLE); 2675 sched_unpin(); 2676} 2677 2678/* 2679 * pmap_protect_pde: do the things to protect a 4mpage in a process 2680 */ 2681static boolean_t 2682pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva, vm_prot_t prot) 2683{ 2684 pd_entry_t newpde, oldpde; 2685 vm_offset_t eva, va; 2686 vm_page_t m; 2687 boolean_t anychanged; 2688 2689 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2690 KASSERT((sva & PDRMASK) == 0, 2691 ("pmap_protect_pde: sva is not 4mpage aligned")); 2692 anychanged = FALSE; 2693retry: 2694 oldpde = newpde = *pde; 2695 if (oldpde & PG_MANAGED) { 2696 eva = sva + NBPDR; 2697 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME); 2698 va < eva; va += PAGE_SIZE, m++) { 2699 /* 2700 * In contrast to the analogous operation on a 4KB page 2701 * mapping, the mapping's PG_A flag is not cleared and 2702 * the page's PG_REFERENCED flag is not set. The 2703 * reason is that pmap_demote_pde() expects that a 2/4MB 2704 * page mapping with a stored page table page has PG_A 2705 * set. 2706 */ 2707 if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW)) 2708 vm_page_dirty(m); 2709 } 2710 } 2711 if ((prot & VM_PROT_WRITE) == 0) 2712 newpde &= ~(PG_RW | PG_M); 2713#ifdef PAE 2714 if ((prot & VM_PROT_EXECUTE) == 0) 2715 newpde |= pg_nx; 2716#endif 2717 if (newpde != oldpde) { 2718 if (!pde_cmpset(pde, oldpde, newpde)) 2719 goto retry; 2720 if (oldpde & PG_G) 2721 pmap_invalidate_page(pmap, sva); 2722 else 2723 anychanged = TRUE; 2724 } 2725 return (anychanged); 2726} 2727 2728/* 2729 * Set the physical protection on the 2730 * specified range of this map as requested. 2731 */ 2732void 2733pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 2734{ 2735 vm_offset_t pdnxt; 2736 pd_entry_t ptpaddr; 2737 pt_entry_t *pte; 2738 int anychanged; 2739 2740 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 2741 pmap_remove(pmap, sva, eva); 2742 return; 2743 } 2744 2745#ifdef PAE 2746 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) == 2747 (VM_PROT_WRITE|VM_PROT_EXECUTE)) 2748 return; 2749#else 2750 if (prot & VM_PROT_WRITE) 2751 return; 2752#endif 2753 2754 anychanged = 0; 2755 2756 vm_page_lock_queues(); 2757 sched_pin(); 2758 PMAP_LOCK(pmap); 2759 for (; sva < eva; sva = pdnxt) { 2760 pt_entry_t obits, pbits; 2761 unsigned pdirindex; 2762 2763 pdnxt = (sva + NBPDR) & ~PDRMASK; 2764 if (pdnxt < sva) 2765 pdnxt = eva; 2766 2767 pdirindex = sva >> PDRSHIFT; 2768 ptpaddr = pmap->pm_pdir[pdirindex]; 2769 2770 /* 2771 * Weed out invalid mappings. Note: we assume that the page 2772 * directory table is always allocated, and in kernel virtual. 2773 */ 2774 if (ptpaddr == 0) 2775 continue; 2776 2777 /* 2778 * Check for large page. 2779 */ 2780 if ((ptpaddr & PG_PS) != 0) { 2781 /* 2782 * Are we protecting the entire large page? If not, 2783 * demote the mapping and fall through. 2784 */ 2785 if (sva + NBPDR == pdnxt && eva >= pdnxt) { 2786 /* 2787 * The TLB entry for a PG_G mapping is 2788 * invalidated by pmap_protect_pde(). 2789 */ 2790 if (pmap_protect_pde(pmap, 2791 &pmap->pm_pdir[pdirindex], sva, prot)) 2792 anychanged = 1; 2793 continue; 2794 } else if (!pmap_demote_pde(pmap, 2795 &pmap->pm_pdir[pdirindex], sva)) { 2796 /* The large page mapping was destroyed. */ 2797 continue; 2798 } 2799 } 2800 2801 if (pdnxt > eva) 2802 pdnxt = eva; 2803 2804 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2805 sva += PAGE_SIZE) { 2806 vm_page_t m; 2807 2808retry: 2809 /* 2810 * Regardless of whether a pte is 32 or 64 bits in 2811 * size, PG_RW, PG_A, and PG_M are among the least 2812 * significant 32 bits. 2813 */ 2814 obits = pbits = *pte; 2815 if ((pbits & PG_V) == 0) 2816 continue; 2817 if (pbits & PG_MANAGED) { 2818 m = NULL; 2819 if (pbits & PG_A) { 2820 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME); 2821 vm_page_flag_set(m, PG_REFERENCED); 2822 pbits &= ~PG_A; 2823 } 2824 if ((pbits & (PG_M | PG_RW)) == (PG_M | PG_RW)) { 2825 if (m == NULL) 2826 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME); 2827 vm_page_dirty(m); 2828 } 2829 } 2830 2831 if ((prot & VM_PROT_WRITE) == 0) 2832 pbits &= ~(PG_RW | PG_M); 2833#ifdef PAE 2834 if ((prot & VM_PROT_EXECUTE) == 0) 2835 pbits |= pg_nx; 2836#endif 2837 2838 if (pbits != obits) { 2839#ifdef PAE 2840 if (!atomic_cmpset_64(pte, obits, pbits)) 2841 goto retry; 2842#else 2843 if (!atomic_cmpset_int((u_int *)pte, obits, 2844 pbits)) 2845 goto retry; 2846#endif 2847 if (obits & PG_G) 2848 pmap_invalidate_page(pmap, sva); 2849 else 2850 anychanged = 1; 2851 } 2852 } 2853 } 2854 sched_unpin(); 2855 if (anychanged) 2856 pmap_invalidate_all(pmap); 2857 vm_page_unlock_queues(); 2858 PMAP_UNLOCK(pmap); 2859} 2860 2861/* 2862 * Tries to promote the 512 or 1024, contiguous 4KB page mappings that are 2863 * within a single page table page to a single 2- or 4MB page mapping. For 2864 * promotion to occur, two conditions must be met: (1) the 4KB page mappings 2865 * must map aligned, contiguous physical memory and (2) the 4KB page mappings 2866 * must have identical characteristics. 2867 * 2868 * Managed (PG_MANAGED) mappings within the kernel address space are not 2869 * promoted. The reason is that kernel PDEs are replicated in each pmap but 2870 * pmap_clear_ptes() and pmap_ts_referenced() only read the PDE from the kernel 2871 * pmap. 2872 */ 2873static void 2874pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va) 2875{ 2876 pd_entry_t newpde; 2877 pmap_t allpmaps_entry; 2878 pt_entry_t *firstpte, oldpte, *pte; 2879 vm_offset_t oldpteva; 2880 vm_paddr_t pa; 2881 vm_page_t mpte; 2882 2883 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2884 firstpte = vtopte(trunc_4mpage(va)); 2885 KASSERT((*firstpte & PG_V) != 0, 2886 ("pmap_promote_pde: firstpte is missing PG_V")); 2887 if ((*firstpte & PG_A) == 0) { 2888 pmap_pde_p_failures++; 2889 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x" 2890 " in pmap %p", va, pmap); 2891 return; 2892 } 2893 if ((*firstpte & PG_MANAGED) != 0 && pmap == kernel_pmap) { 2894 pmap_pde_p_failures++; 2895 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x" 2896 " in pmap %p", va, pmap); 2897 return; 2898 } 2899 pa = *firstpte & PG_PS_FRAME; 2900 newpde = *firstpte; 2901 if ((newpde & (PG_M | PG_RW)) == PG_RW) 2902 newpde &= ~PG_RW; 2903 2904 /* 2905 * Check all the ptes before promotion 2906 */ 2907 for (pte = firstpte; pte < firstpte + NPTEPG; pte++) { 2908retry: 2909 oldpte = *pte; 2910 if ((oldpte & PG_FRAME) != pa) { 2911 pmap_pde_p_failures++; 2912 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x" 2913 " in pmap %p", va, pmap); 2914 return; 2915 } 2916 if ((oldpte & (PG_M | PG_RW)) == PG_RW) { 2917 /* 2918 * When PG_M is already clear, PG_RW can be cleared 2919 * without a TLB invalidation. 2920 */ 2921 if (!atomic_cmpset_int((u_int *)pte, oldpte, 2922 oldpte & ~PG_RW)) 2923 goto retry; 2924 oldpte &= ~PG_RW; 2925 oldpteva = (oldpte & PG_FRAME & PDRMASK) | 2926 (va & ~PDRMASK); 2927 CTR2(KTR_PMAP, "pmap_promote_pde: protect for va %#x" 2928 " in pmap %p", oldpteva, pmap); 2929 } 2930 if ((oldpte & PG_PTE_PROMOTE) != (newpde & PG_PTE_PROMOTE)) { 2931 pmap_pde_p_failures++; 2932 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x" 2933 " in pmap %p", va, pmap); 2934 return; 2935 } 2936 pa += PAGE_SIZE; 2937 } 2938 2939 /* 2940 * Save the page table page in its current state until the PDE 2941 * mapping the superpage is demoted by pmap_demote_pde() or 2942 * destroyed by pmap_remove_pde(). 2943 */ 2944 mpte = PHYS_TO_VM_PAGE(*pde & PG_FRAME); 2945 KASSERT(mpte >= vm_page_array && 2946 mpte < &vm_page_array[vm_page_array_size], 2947 ("pmap_promote_pde: page table page is out of range")); 2948 KASSERT(mpte->pindex == va >> PDRSHIFT, 2949 ("pmap_promote_pde: page table page's pindex is wrong")); 2950 pmap_insert_pt_page(pmap, mpte); 2951 2952 /* 2953 * Promote the pv entries. 2954 */ 2955 if ((newpde & PG_MANAGED) != 0) 2956 pmap_pv_promote_pde(pmap, va, newpde & PG_PS_FRAME); 2957 2958 /* 2959 * Propagate the PAT index to its proper position. 2960 */ 2961 if ((newpde & PG_PTE_PAT) != 0) 2962 newpde ^= PG_PDE_PAT | PG_PTE_PAT; 2963 2964 /* 2965 * Map the superpage. 2966 */ 2967 if (pmap == kernel_pmap) { 2968 mtx_lock_spin(&allpmaps_lock); 2969 LIST_FOREACH(allpmaps_entry, &allpmaps, pm_list) { 2970 pde = pmap_pde(allpmaps_entry, va); 2971 pde_store(pde, PG_PS | newpde); 2972 } 2973 mtx_unlock_spin(&allpmaps_lock); 2974 } else 2975 pde_store(pde, PG_PS | newpde); 2976 2977 pmap_pde_promotions++; 2978 CTR2(KTR_PMAP, "pmap_promote_pde: success for va %#x" 2979 " in pmap %p", va, pmap); 2980} 2981 2982/* 2983 * Insert the given physical page (p) at 2984 * the specified virtual address (v) in the 2985 * target physical map with the protection requested. 2986 * 2987 * If specified, the page will be wired down, meaning 2988 * that the related pte can not be reclaimed. 2989 * 2990 * NB: This is the only routine which MAY NOT lazy-evaluate 2991 * or lose information. That is, this routine must actually 2992 * insert this page into the given map NOW. 2993 */ 2994void 2995pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m, 2996 vm_prot_t prot, boolean_t wired) 2997{ 2998 vm_paddr_t pa; 2999 pd_entry_t *pde; 3000 pt_entry_t *pte; 3001 vm_paddr_t opa; 3002 pt_entry_t origpte, newpte; 3003 vm_page_t mpte, om; 3004 boolean_t invlva; 3005 3006 va = trunc_page(va); 3007 KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig")); 3008 KASSERT(va < UPT_MIN_ADDRESS || va >= UPT_MAX_ADDRESS, 3009 ("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va)); 3010 3011 mpte = NULL; 3012 3013 vm_page_lock_queues(); 3014 PMAP_LOCK(pmap); 3015 sched_pin(); 3016 3017 /* 3018 * In the case that a page table page is not 3019 * resident, we are creating it here. 3020 */ 3021 if (va < VM_MAXUSER_ADDRESS) { 3022 mpte = pmap_allocpte(pmap, va, M_WAITOK); 3023 } 3024 3025 pde = pmap_pde(pmap, va); 3026 if ((*pde & PG_PS) != 0) 3027 panic("pmap_enter: attempted pmap_enter on 4MB page"); 3028 pte = pmap_pte_quick(pmap, va); 3029 3030 /* 3031 * Page Directory table entry not valid, we need a new PT page 3032 */ 3033 if (pte == NULL) { 3034 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x", 3035 (uintmax_t)pmap->pm_pdir[PTDPTDI], va); 3036 } 3037 3038 pa = VM_PAGE_TO_PHYS(m); 3039 om = NULL; 3040 origpte = *pte; 3041 opa = origpte & PG_FRAME; 3042 3043 /* 3044 * Mapping has not changed, must be protection or wiring change. 3045 */ 3046 if (origpte && (opa == pa)) { 3047 /* 3048 * Wiring change, just update stats. We don't worry about 3049 * wiring PT pages as they remain resident as long as there 3050 * are valid mappings in them. Hence, if a user page is wired, 3051 * the PT page will be also. 3052 */ 3053 if (wired && ((origpte & PG_W) == 0)) 3054 pmap->pm_stats.wired_count++; 3055 else if (!wired && (origpte & PG_W)) 3056 pmap->pm_stats.wired_count--; 3057 3058 /* 3059 * Remove extra pte reference 3060 */ 3061 if (mpte) 3062 mpte->wire_count--; 3063 3064 /* 3065 * We might be turning off write access to the page, 3066 * so we go ahead and sense modify status. 3067 */ 3068 if (origpte & PG_MANAGED) { 3069 om = m; 3070 pa |= PG_MANAGED; 3071 } 3072 goto validate; 3073 } 3074 /* 3075 * Mapping has changed, invalidate old range and fall through to 3076 * handle validating new mapping. 3077 */ 3078 if (opa) { 3079 if (origpte & PG_W) 3080 pmap->pm_stats.wired_count--; 3081 if (origpte & PG_MANAGED) { 3082 om = PHYS_TO_VM_PAGE(opa); 3083 pmap_remove_entry(pmap, om, va); 3084 } 3085 if (mpte != NULL) { 3086 mpte->wire_count--; 3087 KASSERT(mpte->wire_count > 0, 3088 ("pmap_enter: missing reference to page table page," 3089 " va: 0x%x", va)); 3090 } 3091 } else 3092 pmap->pm_stats.resident_count++; 3093 3094 /* 3095 * Enter on the PV list if part of our managed memory. 3096 */ 3097 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 3098 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva, 3099 ("pmap_enter: managed mapping within the clean submap")); 3100 pmap_insert_entry(pmap, va, m); 3101 pa |= PG_MANAGED; 3102 } 3103 3104 /* 3105 * Increment counters 3106 */ 3107 if (wired) 3108 pmap->pm_stats.wired_count++; 3109 3110validate: 3111 /* 3112 * Now validate mapping with desired protection/wiring. 3113 */ 3114 newpte = (pt_entry_t)(pa | PG_V); 3115 if ((prot & VM_PROT_WRITE) != 0) { 3116 newpte |= PG_RW; 3117 vm_page_flag_set(m, PG_WRITEABLE); 3118 } 3119#ifdef PAE 3120 if ((prot & VM_PROT_EXECUTE) == 0) 3121 newpte |= pg_nx; 3122#endif 3123 if (wired) 3124 newpte |= PG_W; 3125 if (va < VM_MAXUSER_ADDRESS) 3126 newpte |= PG_U; 3127 if (pmap == kernel_pmap) 3128 newpte |= pgeflag; 3129 3130 /* 3131 * if the mapping or permission bits are different, we need 3132 * to update the pte. 3133 */ 3134 if ((origpte & ~(PG_M|PG_A)) != newpte) { 3135 newpte |= PG_A; 3136 if ((access & VM_PROT_WRITE) != 0) 3137 newpte |= PG_M; 3138 if (origpte & PG_V) { 3139 invlva = FALSE; 3140 origpte = pte_load_store(pte, newpte); 3141 if (origpte & PG_A) { 3142 if (origpte & PG_MANAGED) 3143 vm_page_flag_set(om, PG_REFERENCED); 3144 if (opa != VM_PAGE_TO_PHYS(m)) 3145 invlva = TRUE; 3146#ifdef PAE 3147 if ((origpte & PG_NX) == 0 && 3148 (newpte & PG_NX) != 0) 3149 invlva = TRUE; 3150#endif 3151 } 3152 if ((origpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) { 3153 if ((origpte & PG_MANAGED) != 0) 3154 vm_page_dirty(om); 3155 if ((prot & VM_PROT_WRITE) == 0) 3156 invlva = TRUE; 3157 } 3158 if (invlva) 3159 pmap_invalidate_page(pmap, va); 3160 } else 3161 pte_store(pte, newpte); 3162 } 3163 3164 /* 3165 * If both the page table page and the reservation are fully 3166 * populated, then attempt promotion. 3167 */ 3168 if ((mpte == NULL || mpte->wire_count == NPTEPG) && 3169 pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0) 3170 pmap_promote_pde(pmap, pde, va); 3171 3172 sched_unpin(); 3173 vm_page_unlock_queues(); 3174 PMAP_UNLOCK(pmap); 3175} 3176 3177/* 3178 * Tries to create a 2- or 4MB page mapping. Returns TRUE if successful and 3179 * FALSE otherwise. Fails if (1) a page table page cannot be allocated without 3180 * blocking, (2) a mapping already exists at the specified virtual address, or 3181 * (3) a pv entry cannot be allocated without reclaiming another pv entry. 3182 */ 3183static boolean_t 3184pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 3185{ 3186 pd_entry_t *pde, newpde; 3187 3188 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3189 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 3190 pde = pmap_pde(pmap, va); 3191 if (*pde != 0) { 3192 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx" 3193 " in pmap %p", va, pmap); 3194 return (FALSE); 3195 } 3196 newpde = VM_PAGE_TO_PHYS(m) | PG_PS | PG_V; 3197 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 3198 newpde |= PG_MANAGED; 3199 3200 /* 3201 * Abort this mapping if its PV entry could not be created. 3202 */ 3203 if (!pmap_pv_insert_pde(pmap, va, VM_PAGE_TO_PHYS(m))) { 3204 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx" 3205 " in pmap %p", va, pmap); 3206 return (FALSE); 3207 } 3208 } 3209#ifdef PAE 3210 if ((prot & VM_PROT_EXECUTE) == 0) 3211 newpde |= pg_nx; 3212#endif 3213 if (va < VM_MAXUSER_ADDRESS) 3214 newpde |= PG_U; 3215 3216 /* 3217 * Increment counters. 3218 */ 3219 pmap->pm_stats.resident_count += NBPDR / PAGE_SIZE; 3220 3221 /* 3222 * Map the superpage. 3223 */ 3224 pde_store(pde, newpde); 3225 3226 pmap_pde_mappings++; 3227 CTR2(KTR_PMAP, "pmap_enter_pde: success for va %#lx" 3228 " in pmap %p", va, pmap); 3229 return (TRUE); 3230} 3231 3232/* 3233 * Maps a sequence of resident pages belonging to the same object. 3234 * The sequence begins with the given page m_start. This page is 3235 * mapped at the given virtual address start. Each subsequent page is 3236 * mapped at a virtual address that is offset from start by the same 3237 * amount as the page is offset from m_start within the object. The 3238 * last page in the sequence is the page with the largest offset from 3239 * m_start that can be mapped at a virtual address less than the given 3240 * virtual address end. Not every virtual page between start and end 3241 * is mapped; only those for which a resident page exists with the 3242 * corresponding offset from m_start are mapped. 3243 */ 3244void 3245pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, 3246 vm_page_t m_start, vm_prot_t prot) 3247{ 3248 vm_offset_t va; 3249 vm_page_t m, mpte; 3250 vm_pindex_t diff, psize; 3251 3252 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED); 3253 psize = atop(end - start); 3254 mpte = NULL; 3255 m = m_start; 3256 PMAP_LOCK(pmap); 3257 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { 3258 va = start + ptoa(diff); 3259 if ((va & PDRMASK) == 0 && va + NBPDR <= end && 3260 (VM_PAGE_TO_PHYS(m) & PDRMASK) == 0 && 3261 pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0 && 3262 pmap_enter_pde(pmap, va, m, prot)) 3263 m = &m[NBPDR / PAGE_SIZE - 1]; 3264 else 3265 mpte = pmap_enter_quick_locked(pmap, va, m, prot, 3266 mpte); 3267 m = TAILQ_NEXT(m, listq); 3268 } 3269 PMAP_UNLOCK(pmap); 3270} 3271 3272/* 3273 * this code makes some *MAJOR* assumptions: 3274 * 1. Current pmap & pmap exists. 3275 * 2. Not wired. 3276 * 3. Read access. 3277 * 4. No page table pages. 3278 * but is *MUCH* faster than pmap_enter... 3279 */ 3280 3281void 3282pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 3283{ 3284 3285 PMAP_LOCK(pmap); 3286 (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL); 3287 PMAP_UNLOCK(pmap); 3288} 3289 3290static vm_page_t 3291pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, 3292 vm_prot_t prot, vm_page_t mpte) 3293{ 3294 pt_entry_t *pte; 3295 vm_paddr_t pa; 3296 vm_page_t free; 3297 3298 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva || 3299 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0, 3300 ("pmap_enter_quick_locked: managed mapping within the clean submap")); 3301 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3302 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 3303 3304 /* 3305 * In the case that a page table page is not 3306 * resident, we are creating it here. 3307 */ 3308 if (va < VM_MAXUSER_ADDRESS) { 3309 unsigned ptepindex; 3310 pd_entry_t ptepa; 3311 3312 /* 3313 * Calculate pagetable page index 3314 */ 3315 ptepindex = va >> PDRSHIFT; 3316 if (mpte && (mpte->pindex == ptepindex)) { 3317 mpte->wire_count++; 3318 } else { 3319 /* 3320 * Get the page directory entry 3321 */ 3322 ptepa = pmap->pm_pdir[ptepindex]; 3323 3324 /* 3325 * If the page table page is mapped, we just increment 3326 * the hold count, and activate it. 3327 */ 3328 if (ptepa) { 3329 if (ptepa & PG_PS) 3330 return (NULL); 3331 mpte = PHYS_TO_VM_PAGE(ptepa & PG_FRAME); 3332 mpte->wire_count++; 3333 } else { 3334 mpte = _pmap_allocpte(pmap, ptepindex, 3335 M_NOWAIT); 3336 if (mpte == NULL) 3337 return (mpte); 3338 } 3339 } 3340 } else { 3341 mpte = NULL; 3342 } 3343 3344 /* 3345 * This call to vtopte makes the assumption that we are 3346 * entering the page into the current pmap. In order to support 3347 * quick entry into any pmap, one would likely use pmap_pte_quick. 3348 * But that isn't as quick as vtopte. 3349 */ 3350 pte = vtopte(va); 3351 if (*pte) { 3352 if (mpte != NULL) { 3353 mpte->wire_count--; 3354 mpte = NULL; 3355 } 3356 return (mpte); 3357 } 3358 3359 /* 3360 * Enter on the PV list if part of our managed memory. 3361 */ 3362 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 && 3363 !pmap_try_insert_pv_entry(pmap, va, m)) { 3364 if (mpte != NULL) { 3365 free = NULL; 3366 if (pmap_unwire_pte_hold(pmap, mpte, &free)) { 3367 pmap_invalidate_page(pmap, va); 3368 pmap_free_zero_pages(free); 3369 } 3370 3371 mpte = NULL; 3372 } 3373 return (mpte); 3374 } 3375 3376 /* 3377 * Increment counters 3378 */ 3379 pmap->pm_stats.resident_count++; 3380 3381 pa = VM_PAGE_TO_PHYS(m); 3382#ifdef PAE 3383 if ((prot & VM_PROT_EXECUTE) == 0) 3384 pa |= pg_nx; 3385#endif 3386 3387 /* 3388 * Now validate mapping with RO protection 3389 */ 3390 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 3391 pte_store(pte, pa | PG_V | PG_U); 3392 else 3393 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 3394 return mpte; 3395} 3396 3397/* 3398 * Make a temporary mapping for a physical address. This is only intended 3399 * to be used for panic dumps. 3400 */ 3401void * 3402pmap_kenter_temporary(vm_paddr_t pa, int i) 3403{ 3404 vm_offset_t va; 3405 3406 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 3407 pmap_kenter(va, pa); 3408 invlpg(va); 3409 return ((void *)crashdumpmap); 3410} 3411 3412/* 3413 * This code maps large physical mmap regions into the 3414 * processor address space. Note that some shortcuts 3415 * are taken, but the code works. 3416 */ 3417void 3418pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object, 3419 vm_pindex_t pindex, vm_size_t size) 3420{ 3421 vm_page_t p; 3422 3423 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 3424 KASSERT(object->type == OBJT_DEVICE, 3425 ("pmap_object_init_pt: non-device object")); 3426 if (pseflag && 3427 ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) { 3428 int i; 3429 vm_page_t m[1]; 3430 unsigned int ptepindex; 3431 int npdes; 3432 pd_entry_t ptepa; 3433 3434 PMAP_LOCK(pmap); 3435 if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)]) 3436 goto out; 3437 PMAP_UNLOCK(pmap); 3438retry: 3439 p = vm_page_lookup(object, pindex); 3440 if (p != NULL) { 3441 if (vm_page_sleep_if_busy(p, FALSE, "init4p")) 3442 goto retry; 3443 } else { 3444 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL); 3445 if (p == NULL) 3446 return; 3447 m[0] = p; 3448 3449 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) { 3450 vm_page_lock_queues(); 3451 vm_page_free(p); 3452 vm_page_unlock_queues(); 3453 return; 3454 } 3455 3456 p = vm_page_lookup(object, pindex); 3457 vm_page_lock_queues(); 3458 vm_page_wakeup(p); 3459 vm_page_unlock_queues(); 3460 } 3461 3462 ptepa = VM_PAGE_TO_PHYS(p); 3463 if (ptepa & (NBPDR - 1)) 3464 return; 3465 3466 p->valid = VM_PAGE_BITS_ALL; 3467 3468 PMAP_LOCK(pmap); 3469 pmap->pm_stats.resident_count += size >> PAGE_SHIFT; 3470 npdes = size >> PDRSHIFT; 3471 for(i = 0; i < npdes; i++) { 3472 pde_store(&pmap->pm_pdir[ptepindex], 3473 ptepa | PG_U | PG_RW | PG_V | PG_PS); 3474 ptepa += NBPDR; 3475 ptepindex += 1; 3476 } 3477 pmap_invalidate_all(pmap); 3478out: 3479 PMAP_UNLOCK(pmap); 3480 } 3481} 3482 3483/* 3484 * Routine: pmap_change_wiring 3485 * Function: Change the wiring attribute for a map/virtual-address 3486 * pair. 3487 * In/out conditions: 3488 * The mapping must already exist in the pmap. 3489 */ 3490void 3491pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired) 3492{ 3493 pd_entry_t *pde; 3494 pt_entry_t *pte; 3495 boolean_t are_queues_locked; 3496 3497 are_queues_locked = FALSE; 3498retry: 3499 PMAP_LOCK(pmap); 3500 pde = pmap_pde(pmap, va); 3501 if ((*pde & PG_PS) != 0) { 3502 if (!wired != ((*pde & PG_W) == 0)) { 3503 if (!are_queues_locked) { 3504 are_queues_locked = TRUE; 3505 if (!mtx_trylock(&vm_page_queue_mtx)) { 3506 PMAP_UNLOCK(pmap); 3507 vm_page_lock_queues(); 3508 goto retry; 3509 } 3510 } 3511 if (!pmap_demote_pde(pmap, pde, va)) 3512 panic("pmap_change_wiring: demotion failed"); 3513 } else 3514 goto out; 3515 } 3516 pte = pmap_pte(pmap, va); 3517 3518 if (wired && !pmap_pte_w(pte)) 3519 pmap->pm_stats.wired_count++; 3520 else if (!wired && pmap_pte_w(pte)) 3521 pmap->pm_stats.wired_count--; 3522 3523 /* 3524 * Wiring is not a hardware characteristic so there is no need to 3525 * invalidate TLB. 3526 */ 3527 pmap_pte_set_w(pte, wired); 3528 pmap_pte_release(pte); 3529out: 3530 if (are_queues_locked) 3531 vm_page_unlock_queues(); 3532 PMAP_UNLOCK(pmap); 3533} 3534 3535 3536 3537/* 3538 * Copy the range specified by src_addr/len 3539 * from the source map to the range dst_addr/len 3540 * in the destination map. 3541 * 3542 * This routine is only advisory and need not do anything. 3543 */ 3544 3545void 3546pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 3547 vm_offset_t src_addr) 3548{ 3549 vm_page_t free; 3550 vm_offset_t addr; 3551 vm_offset_t end_addr = src_addr + len; 3552 vm_offset_t pdnxt; 3553 3554 if (dst_addr != src_addr) 3555 return; 3556 3557 if (!pmap_is_current(src_pmap)) 3558 return; 3559 3560 vm_page_lock_queues(); 3561 if (dst_pmap < src_pmap) { 3562 PMAP_LOCK(dst_pmap); 3563 PMAP_LOCK(src_pmap); 3564 } else { 3565 PMAP_LOCK(src_pmap); 3566 PMAP_LOCK(dst_pmap); 3567 } 3568 sched_pin(); 3569 for (addr = src_addr; addr < end_addr; addr = pdnxt) { 3570 pt_entry_t *src_pte, *dst_pte; 3571 vm_page_t dstmpte, srcmpte; 3572 pd_entry_t srcptepaddr; 3573 unsigned ptepindex; 3574 3575 KASSERT(addr < UPT_MIN_ADDRESS, 3576 ("pmap_copy: invalid to pmap_copy page tables")); 3577 3578 pdnxt = (addr + NBPDR) & ~PDRMASK; 3579 if (pdnxt < addr) 3580 pdnxt = end_addr; 3581 ptepindex = addr >> PDRSHIFT; 3582 3583 srcptepaddr = src_pmap->pm_pdir[ptepindex]; 3584 if (srcptepaddr == 0) 3585 continue; 3586 3587 if (srcptepaddr & PG_PS) { 3588 if (dst_pmap->pm_pdir[ptepindex] == 0 && 3589 ((srcptepaddr & PG_MANAGED) == 0 || 3590 pmap_pv_insert_pde(dst_pmap, addr, srcptepaddr & 3591 PG_PS_FRAME))) { 3592 dst_pmap->pm_pdir[ptepindex] = srcptepaddr & 3593 ~PG_W; 3594 dst_pmap->pm_stats.resident_count += 3595 NBPDR / PAGE_SIZE; 3596 } 3597 continue; 3598 } 3599 3600 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME); 3601 KASSERT(srcmpte->wire_count > 0, 3602 ("pmap_copy: source page table page is unused")); 3603 3604 if (pdnxt > end_addr) 3605 pdnxt = end_addr; 3606 3607 src_pte = vtopte(addr); 3608 while (addr < pdnxt) { 3609 pt_entry_t ptetemp; 3610 ptetemp = *src_pte; 3611 /* 3612 * we only virtual copy managed pages 3613 */ 3614 if ((ptetemp & PG_MANAGED) != 0) { 3615 dstmpte = pmap_allocpte(dst_pmap, addr, 3616 M_NOWAIT); 3617 if (dstmpte == NULL) 3618 break; 3619 dst_pte = pmap_pte_quick(dst_pmap, addr); 3620 if (*dst_pte == 0 && 3621 pmap_try_insert_pv_entry(dst_pmap, addr, 3622 PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) { 3623 /* 3624 * Clear the wired, modified, and 3625 * accessed (referenced) bits 3626 * during the copy. 3627 */ 3628 *dst_pte = ptetemp & ~(PG_W | PG_M | 3629 PG_A); 3630 dst_pmap->pm_stats.resident_count++; 3631 } else { 3632 free = NULL; 3633 if (pmap_unwire_pte_hold( dst_pmap, 3634 dstmpte, &free)) { 3635 pmap_invalidate_page(dst_pmap, 3636 addr); 3637 pmap_free_zero_pages(free); 3638 } 3639 } 3640 if (dstmpte->wire_count >= srcmpte->wire_count) 3641 break; 3642 } 3643 addr += PAGE_SIZE; 3644 src_pte++; 3645 } 3646 } 3647 sched_unpin(); 3648 vm_page_unlock_queues(); 3649 PMAP_UNLOCK(src_pmap); 3650 PMAP_UNLOCK(dst_pmap); 3651} 3652 3653static __inline void 3654pagezero(void *page) 3655{ 3656#if defined(I686_CPU) 3657 if (cpu_class == CPUCLASS_686) { 3658#if defined(CPU_ENABLE_SSE) 3659 if (cpu_feature & CPUID_SSE2) 3660 sse2_pagezero(page); 3661 else 3662#endif 3663 i686_pagezero(page); 3664 } else 3665#endif 3666 bzero(page, PAGE_SIZE); 3667} 3668 3669/* 3670 * pmap_zero_page zeros the specified hardware page by mapping 3671 * the page into KVM and using bzero to clear its contents. 3672 */ 3673void 3674pmap_zero_page(vm_page_t m) 3675{ 3676 struct sysmaps *sysmaps; 3677 3678 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3679 mtx_lock(&sysmaps->lock); 3680 if (*sysmaps->CMAP2) 3681 panic("pmap_zero_page: CMAP2 busy"); 3682 sched_pin(); 3683 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 3684 invlcaddr(sysmaps->CADDR2); 3685 pagezero(sysmaps->CADDR2); 3686 *sysmaps->CMAP2 = 0; 3687 sched_unpin(); 3688 mtx_unlock(&sysmaps->lock); 3689} 3690 3691/* 3692 * pmap_zero_page_area zeros the specified hardware page by mapping 3693 * the page into KVM and using bzero to clear its contents. 3694 * 3695 * off and size may not cover an area beyond a single hardware page. 3696 */ 3697void 3698pmap_zero_page_area(vm_page_t m, int off, int size) 3699{ 3700 struct sysmaps *sysmaps; 3701 3702 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3703 mtx_lock(&sysmaps->lock); 3704 if (*sysmaps->CMAP2) 3705 panic("pmap_zero_page: CMAP2 busy"); 3706 sched_pin(); 3707 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 3708 invlcaddr(sysmaps->CADDR2); 3709 if (off == 0 && size == PAGE_SIZE) 3710 pagezero(sysmaps->CADDR2); 3711 else 3712 bzero((char *)sysmaps->CADDR2 + off, size); 3713 *sysmaps->CMAP2 = 0; 3714 sched_unpin(); 3715 mtx_unlock(&sysmaps->lock); 3716} 3717 3718/* 3719 * pmap_zero_page_idle zeros the specified hardware page by mapping 3720 * the page into KVM and using bzero to clear its contents. This 3721 * is intended to be called from the vm_pagezero process only and 3722 * outside of Giant. 3723 */ 3724void 3725pmap_zero_page_idle(vm_page_t m) 3726{ 3727 3728 if (*CMAP3) 3729 panic("pmap_zero_page: CMAP3 busy"); 3730 sched_pin(); 3731 *CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 3732 invlcaddr(CADDR3); 3733 pagezero(CADDR3); 3734 *CMAP3 = 0; 3735 sched_unpin(); 3736} 3737 3738/* 3739 * pmap_copy_page copies the specified (machine independent) 3740 * page by mapping the page into virtual memory and using 3741 * bcopy to copy the page, one machine dependent page at a 3742 * time. 3743 */ 3744void 3745pmap_copy_page(vm_page_t src, vm_page_t dst) 3746{ 3747 struct sysmaps *sysmaps; 3748 3749 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3750 mtx_lock(&sysmaps->lock); 3751 if (*sysmaps->CMAP1) 3752 panic("pmap_copy_page: CMAP1 busy"); 3753 if (*sysmaps->CMAP2) 3754 panic("pmap_copy_page: CMAP2 busy"); 3755 sched_pin(); 3756 invlpg((u_int)sysmaps->CADDR1); 3757 invlpg((u_int)sysmaps->CADDR2); 3758 *sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A; 3759 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M; 3760 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); 3761 *sysmaps->CMAP1 = 0; 3762 *sysmaps->CMAP2 = 0; 3763 sched_unpin(); 3764 mtx_unlock(&sysmaps->lock); 3765} 3766 3767/* 3768 * Returns true if the pmap's pv is one of the first 3769 * 16 pvs linked to from this page. This count may 3770 * be changed upwards or downwards in the future; it 3771 * is only necessary that true be returned for a small 3772 * subset of pmaps for proper page aging. 3773 */ 3774boolean_t 3775pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 3776{ 3777 struct md_page *pvh; 3778 pv_entry_t pv; 3779 int loops = 0; 3780 3781 if (m->flags & PG_FICTITIOUS) 3782 return FALSE; 3783 3784 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3785 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3786 if (PV_PMAP(pv) == pmap) { 3787 return TRUE; 3788 } 3789 loops++; 3790 if (loops >= 16) 3791 break; 3792 } 3793 if (loops < 16) { 3794 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 3795 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) { 3796 if (PV_PMAP(pv) == pmap) 3797 return (TRUE); 3798 loops++; 3799 if (loops >= 16) 3800 break; 3801 } 3802 } 3803 return (FALSE); 3804} 3805 3806/* 3807 * pmap_page_wired_mappings: 3808 * 3809 * Return the number of managed mappings to the given physical page 3810 * that are wired. 3811 */ 3812int 3813pmap_page_wired_mappings(vm_page_t m) 3814{ 3815 int count; 3816 3817 count = 0; 3818 if ((m->flags & PG_FICTITIOUS) != 0) 3819 return (count); 3820 count = pmap_pvh_wired_mappings(&m->md, count); 3821 return (pmap_pvh_wired_mappings(pa_to_pvh(VM_PAGE_TO_PHYS(m)), count)); 3822} 3823 3824/* 3825 * pmap_pvh_wired_mappings: 3826 * 3827 * Return the updated number "count" of managed mappings that are wired. 3828 */ 3829static int 3830pmap_pvh_wired_mappings(struct md_page *pvh, int count) 3831{ 3832 pmap_t pmap; 3833 pt_entry_t *pte; 3834 pv_entry_t pv; 3835 3836 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3837 sched_pin(); 3838 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) { 3839 pmap = PV_PMAP(pv); 3840 PMAP_LOCK(pmap); 3841 pte = pmap_pte_quick(pmap, pv->pv_va); 3842 if ((*pte & PG_W) != 0) 3843 count++; 3844 PMAP_UNLOCK(pmap); 3845 } 3846 sched_unpin(); 3847 return (count); 3848} 3849 3850/* 3851 * Returns TRUE if the given page is mapped individually or as part of 3852 * a 4mpage. Otherwise, returns FALSE. 3853 */ 3854boolean_t 3855pmap_page_is_mapped(vm_page_t m) 3856{ 3857 struct md_page *pvh; 3858 3859 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 3860 return (FALSE); 3861 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3862 if (TAILQ_EMPTY(&m->md.pv_list)) { 3863 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 3864 return (!TAILQ_EMPTY(&pvh->pv_list)); 3865 } else 3866 return (TRUE); 3867} 3868 3869/* 3870 * Remove all pages from specified address space 3871 * this aids process exit speeds. Also, this code 3872 * is special cased for current process only, but 3873 * can have the more generic (and slightly slower) 3874 * mode enabled. This is much faster than pmap_remove 3875 * in the case of running down an entire address space. 3876 */ 3877void 3878pmap_remove_pages(pmap_t pmap) 3879{ 3880 pt_entry_t *pte, tpte; 3881 vm_page_t free = NULL; 3882 vm_page_t m, mpte, mt; 3883 pv_entry_t pv; 3884 struct md_page *pvh; 3885 struct pv_chunk *pc, *npc; 3886 int field, idx; 3887 int32_t bit; 3888 uint32_t inuse, bitmask; 3889 int allfree; 3890 3891 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { 3892 printf("warning: pmap_remove_pages called with non-current pmap\n"); 3893 return; 3894 } 3895 vm_page_lock_queues(); 3896 PMAP_LOCK(pmap); 3897 sched_pin(); 3898 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) { 3899 allfree = 1; 3900 for (field = 0; field < _NPCM; field++) { 3901 inuse = (~(pc->pc_map[field])) & pc_freemask[field]; 3902 while (inuse != 0) { 3903 bit = bsfl(inuse); 3904 bitmask = 1UL << bit; 3905 idx = field * 32 + bit; 3906 pv = &pc->pc_pventry[idx]; 3907 inuse &= ~bitmask; 3908 3909 pte = pmap_pde(pmap, pv->pv_va); 3910 tpte = *pte; 3911 if ((tpte & PG_PS) == 0) { 3912 pte = vtopte(pv->pv_va); 3913 tpte = *pte & ~PG_PTE_PAT; 3914 } 3915 3916 if (tpte == 0) { 3917 printf( 3918 "TPTE at %p IS ZERO @ VA %08x\n", 3919 pte, pv->pv_va); 3920 panic("bad pte"); 3921 } 3922 3923/* 3924 * We cannot remove wired pages from a process' mapping at this time 3925 */ 3926 if (tpte & PG_W) { 3927 allfree = 0; 3928 continue; 3929 } 3930 3931 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME); 3932 KASSERT(m->phys_addr == (tpte & PG_FRAME), 3933 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 3934 m, (uintmax_t)m->phys_addr, 3935 (uintmax_t)tpte)); 3936 3937 KASSERT(m < &vm_page_array[vm_page_array_size], 3938 ("pmap_remove_pages: bad tpte %#jx", 3939 (uintmax_t)tpte)); 3940 3941 pte_clear(pte); 3942 3943 /* 3944 * Update the vm_page_t clean/reference bits. 3945 */ 3946 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) { 3947 if ((tpte & PG_PS) != 0) { 3948 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++) 3949 vm_page_dirty(mt); 3950 } else 3951 vm_page_dirty(m); 3952 } 3953 3954 /* Mark free */ 3955 PV_STAT(pv_entry_frees++); 3956 PV_STAT(pv_entry_spare++); 3957 pv_entry_count--; 3958 pc->pc_map[field] |= bitmask; 3959 if ((tpte & PG_PS) != 0) { 3960 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 3961 pvh = pa_to_pvh(tpte & PG_PS_FRAME); 3962 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list); 3963 if (TAILQ_EMPTY(&pvh->pv_list)) { 3964 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++) 3965 if (TAILQ_EMPTY(&mt->md.pv_list)) 3966 vm_page_flag_clear(mt, PG_WRITEABLE); 3967 } 3968 mpte = pmap_lookup_pt_page(pmap, pv->pv_va); 3969 if (mpte != NULL) { 3970 pmap_remove_pt_page(pmap, mpte); 3971 KASSERT(mpte->wire_count == NPTEPG, 3972 ("pmap_remove_pages: pte page wire count error")); 3973 mpte->wire_count = 0; 3974 pmap_add_delayed_free_list(mpte, &free, FALSE); 3975 atomic_subtract_int(&cnt.v_wire_count, 1); 3976 } 3977 } else { 3978 pmap->pm_stats.resident_count--; 3979 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3980 if (TAILQ_EMPTY(&m->md.pv_list)) { 3981 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 3982 if (TAILQ_EMPTY(&pvh->pv_list)) 3983 vm_page_flag_clear(m, PG_WRITEABLE); 3984 } 3985 pmap_unuse_pt(pmap, pv->pv_va, &free); 3986 } 3987 } 3988 } 3989 if (allfree) { 3990 PV_STAT(pv_entry_spare -= _NPCPV); 3991 PV_STAT(pc_chunk_count--); 3992 PV_STAT(pc_chunk_frees++); 3993 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 3994 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 3995 pmap_qremove((vm_offset_t)pc, 1); 3996 vm_page_unwire(m, 0); 3997 vm_page_free(m); 3998 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 3999 } 4000 } 4001 sched_unpin(); 4002 pmap_invalidate_all(pmap); 4003 vm_page_unlock_queues(); 4004 PMAP_UNLOCK(pmap); 4005 pmap_free_zero_pages(free); 4006} 4007 4008/* 4009 * pmap_is_modified: 4010 * 4011 * Return whether or not the specified physical page was modified 4012 * in any physical maps. 4013 */ 4014boolean_t 4015pmap_is_modified(vm_page_t m) 4016{ 4017 4018 if (m->flags & PG_FICTITIOUS) 4019 return (FALSE); 4020 if (pmap_is_modified_pvh(&m->md)) 4021 return (TRUE); 4022 return (pmap_is_modified_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m)))); 4023} 4024 4025/* 4026 * Returns TRUE if any of the given mappings were used to modify 4027 * physical memory. Otherwise, returns FALSE. Both page and 2mpage 4028 * mappings are supported. 4029 */ 4030static boolean_t 4031pmap_is_modified_pvh(struct md_page *pvh) 4032{ 4033 pv_entry_t pv; 4034 pt_entry_t *pte; 4035 pmap_t pmap; 4036 boolean_t rv; 4037 4038 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 4039 rv = FALSE; 4040 sched_pin(); 4041 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) { 4042 pmap = PV_PMAP(pv); 4043 PMAP_LOCK(pmap); 4044 pte = pmap_pte_quick(pmap, pv->pv_va); 4045 rv = (*pte & (PG_M | PG_RW)) == (PG_M | PG_RW); 4046 PMAP_UNLOCK(pmap); 4047 if (rv) 4048 break; 4049 } 4050 sched_unpin(); 4051 return (rv); 4052} 4053 4054/* 4055 * pmap_is_prefaultable: 4056 * 4057 * Return whether or not the specified virtual address is elgible 4058 * for prefault. 4059 */ 4060boolean_t 4061pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 4062{ 4063 pd_entry_t *pde; 4064 pt_entry_t *pte; 4065 boolean_t rv; 4066 4067 rv = FALSE; 4068 PMAP_LOCK(pmap); 4069 pde = pmap_pde(pmap, addr); 4070 if (*pde != 0 && (*pde & PG_PS) == 0) { 4071 pte = vtopte(addr); 4072 rv = *pte == 0; 4073 } 4074 PMAP_UNLOCK(pmap); 4075 return (rv); 4076} 4077 4078/* 4079 * Clear the write and modified bits in each of the given page's mappings. 4080 */ 4081void 4082pmap_remove_write(vm_page_t m) 4083{ 4084 struct md_page *pvh; 4085 pv_entry_t next_pv, pv; 4086 pmap_t pmap; 4087 pd_entry_t *pde; 4088 pt_entry_t oldpte, *pte; 4089 vm_offset_t va; 4090 4091 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 4092 if ((m->flags & PG_FICTITIOUS) != 0 || 4093 (m->flags & PG_WRITEABLE) == 0) 4094 return; 4095 sched_pin(); 4096 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 4097 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) { 4098 va = pv->pv_va; 4099 pmap = PV_PMAP(pv); 4100 PMAP_LOCK(pmap); 4101 pde = pmap_pde(pmap, va); 4102 if ((*pde & PG_RW) != 0) 4103 (void)pmap_demote_pde(pmap, pde, va); 4104 PMAP_UNLOCK(pmap); 4105 } 4106 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 4107 pmap = PV_PMAP(pv); 4108 PMAP_LOCK(pmap); 4109 pde = pmap_pde(pmap, pv->pv_va); 4110 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_write: found" 4111 " a 4mpage in page %p's pv list", m)); 4112 pte = pmap_pte_quick(pmap, pv->pv_va); 4113retry: 4114 oldpte = *pte; 4115 if ((oldpte & PG_RW) != 0) { 4116 /* 4117 * Regardless of whether a pte is 32 or 64 bits 4118 * in size, PG_RW and PG_M are among the least 4119 * significant 32 bits. 4120 */ 4121 if (!atomic_cmpset_int((u_int *)pte, oldpte, 4122 oldpte & ~(PG_RW | PG_M))) 4123 goto retry; 4124 if ((oldpte & PG_M) != 0) 4125 vm_page_dirty(m); 4126 pmap_invalidate_page(pmap, pv->pv_va); 4127 } 4128 PMAP_UNLOCK(pmap); 4129 } 4130 vm_page_flag_clear(m, PG_WRITEABLE); 4131 sched_unpin(); 4132} 4133 4134/* 4135 * pmap_ts_referenced: 4136 * 4137 * Return a count of reference bits for a page, clearing those bits. 4138 * It is not necessary for every reference bit to be cleared, but it 4139 * is necessary that 0 only be returned when there are truly no 4140 * reference bits set. 4141 * 4142 * XXX: The exact number of bits to check and clear is a matter that 4143 * should be tested and standardized at some point in the future for 4144 * optimal aging of shared pages. 4145 */ 4146int 4147pmap_ts_referenced(vm_page_t m) 4148{ 4149 struct md_page *pvh; 4150 pv_entry_t pv, pvf, pvn; 4151 pmap_t pmap; 4152 pd_entry_t oldpde, *pde; 4153 pt_entry_t *pte; 4154 vm_offset_t va; 4155 int rtval = 0; 4156 4157 if (m->flags & PG_FICTITIOUS) 4158 return (rtval); 4159 sched_pin(); 4160 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 4161 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 4162 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, pvn) { 4163 va = pv->pv_va; 4164 pmap = PV_PMAP(pv); 4165 PMAP_LOCK(pmap); 4166 pde = pmap_pde(pmap, va); 4167 oldpde = *pde; 4168 if ((oldpde & PG_A) != 0) { 4169 if (pmap_demote_pde(pmap, pde, va)) { 4170 if ((oldpde & PG_W) == 0) { 4171 /* 4172 * Remove the mapping to a single page 4173 * so that a subsequent access may 4174 * repromote. Since the underlying 4175 * page table page is fully populated, 4176 * this removal never frees a page 4177 * table page. 4178 */ 4179 va += VM_PAGE_TO_PHYS(m) - (oldpde & 4180 PG_PS_FRAME); 4181 pmap_remove_page(pmap, va, NULL); 4182 rtval++; 4183 if (rtval > 4) { 4184 PMAP_UNLOCK(pmap); 4185 return (rtval); 4186 } 4187 } 4188 } 4189 } 4190 PMAP_UNLOCK(pmap); 4191 } 4192 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 4193 pvf = pv; 4194 do { 4195 pvn = TAILQ_NEXT(pv, pv_list); 4196 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 4197 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 4198 pmap = PV_PMAP(pv); 4199 PMAP_LOCK(pmap); 4200 pde = pmap_pde(pmap, pv->pv_va); 4201 KASSERT((*pde & PG_PS) == 0, ("pmap_ts_referenced:" 4202 " found a 4mpage in page %p's pv list", m)); 4203 pte = pmap_pte_quick(pmap, pv->pv_va); 4204 if ((*pte & PG_A) != 0) { 4205 atomic_clear_int((u_int *)pte, PG_A); 4206 pmap_invalidate_page(pmap, pv->pv_va); 4207 rtval++; 4208 if (rtval > 4) 4209 pvn = NULL; 4210 } 4211 PMAP_UNLOCK(pmap); 4212 } while ((pv = pvn) != NULL && pv != pvf); 4213 } 4214 sched_unpin(); 4215 return (rtval); 4216} 4217 4218/* 4219 * Clear the modify bits on the specified physical page. 4220 */ 4221void 4222pmap_clear_modify(vm_page_t m) 4223{ 4224 struct md_page *pvh; 4225 pv_entry_t next_pv, pv; 4226 pmap_t pmap; 4227 pd_entry_t oldpde, *pde; 4228 pt_entry_t oldpte, *pte; 4229 vm_offset_t va; 4230 4231 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 4232 if ((m->flags & PG_FICTITIOUS) != 0) 4233 return; 4234 sched_pin(); 4235 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 4236 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) { 4237 va = pv->pv_va; 4238 pmap = PV_PMAP(pv); 4239 PMAP_LOCK(pmap); 4240 pde = pmap_pde(pmap, va); 4241 oldpde = *pde; 4242 if ((oldpde & PG_RW) != 0) { 4243 if (pmap_demote_pde(pmap, pde, va)) { 4244 if ((oldpde & PG_W) == 0) { 4245 /* 4246 * Write protect the mapping to a 4247 * single page so that a subsequent 4248 * write access may repromote. 4249 */ 4250 va += VM_PAGE_TO_PHYS(m) - (oldpde & 4251 PG_PS_FRAME); 4252 pte = pmap_pte_quick(pmap, va); 4253 oldpte = *pte; 4254 if ((oldpte & PG_V) != 0) { 4255 /* 4256 * Regardless of whether a pte is 32 or 64 bits 4257 * in size, PG_RW and PG_M are among the least 4258 * significant 32 bits. 4259 */ 4260 while (!atomic_cmpset_int((u_int *)pte, 4261 oldpte, 4262 oldpte & ~(PG_M | PG_RW))) 4263 oldpte = *pte; 4264 vm_page_dirty(m); 4265 pmap_invalidate_page(pmap, va); 4266 } 4267 } 4268 } 4269 } 4270 PMAP_UNLOCK(pmap); 4271 } 4272 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 4273 pmap = PV_PMAP(pv); 4274 PMAP_LOCK(pmap); 4275 pde = pmap_pde(pmap, pv->pv_va); 4276 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_modify: found" 4277 " a 4mpage in page %p's pv list", m)); 4278 pte = pmap_pte_quick(pmap, pv->pv_va); 4279 if ((*pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) { 4280 /* 4281 * Regardless of whether a pte is 32 or 64 bits 4282 * in size, PG_M is among the least significant 4283 * 32 bits. 4284 */ 4285 atomic_clear_int((u_int *)pte, PG_M); 4286 pmap_invalidate_page(pmap, pv->pv_va); 4287 } 4288 PMAP_UNLOCK(pmap); 4289 } 4290 sched_unpin(); 4291} 4292 4293/* 4294 * pmap_clear_reference: 4295 * 4296 * Clear the reference bit on the specified physical page. 4297 */ 4298void 4299pmap_clear_reference(vm_page_t m) 4300{ 4301 struct md_page *pvh; 4302 pv_entry_t next_pv, pv; 4303 pmap_t pmap; 4304 pd_entry_t oldpde, *pde; 4305 pt_entry_t *pte; 4306 vm_offset_t va; 4307 4308 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 4309 if ((m->flags & PG_FICTITIOUS) != 0) 4310 return; 4311 sched_pin(); 4312 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 4313 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) { 4314 va = pv->pv_va; 4315 pmap = PV_PMAP(pv); 4316 PMAP_LOCK(pmap); 4317 pde = pmap_pde(pmap, va); 4318 oldpde = *pde; 4319 if ((oldpde & PG_A) != 0) { 4320 if (pmap_demote_pde(pmap, pde, va)) { 4321 /* 4322 * Remove the mapping to a single page so 4323 * that a subsequent access may repromote. 4324 * Since the underlying page table page is 4325 * fully populated, this removal never frees 4326 * a page table page. 4327 */ 4328 va += VM_PAGE_TO_PHYS(m) - (oldpde & 4329 PG_PS_FRAME); 4330 pmap_remove_page(pmap, va, NULL); 4331 } 4332 } 4333 PMAP_UNLOCK(pmap); 4334 } 4335 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 4336 pmap = PV_PMAP(pv); 4337 PMAP_LOCK(pmap); 4338 pde = pmap_pde(pmap, pv->pv_va); 4339 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_reference: found" 4340 " a 4mpage in page %p's pv list", m)); 4341 pte = pmap_pte_quick(pmap, pv->pv_va); 4342 if ((*pte & PG_A) != 0) { 4343 /* 4344 * Regardless of whether a pte is 32 or 64 bits 4345 * in size, PG_A is among the least significant 4346 * 32 bits. 4347 */ 4348 atomic_clear_int((u_int *)pte, PG_A); 4349 pmap_invalidate_page(pmap, pv->pv_va); 4350 } 4351 PMAP_UNLOCK(pmap); 4352 } 4353 sched_unpin(); 4354} 4355 4356/* 4357 * Miscellaneous support routines follow 4358 */ 4359 4360/* 4361 * Map a set of physical memory pages into the kernel virtual 4362 * address space. Return a pointer to where it is mapped. This 4363 * routine is intended to be used for mapping device memory, 4364 * NOT real memory. 4365 */ 4366void * 4367pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode) 4368{ 4369 vm_offset_t va, tmpva, offset; 4370 4371 offset = pa & PAGE_MASK; 4372 size = roundup(offset + size, PAGE_SIZE); 4373 pa = pa & PG_FRAME; 4374 4375 if (pa < KERNLOAD && pa + size <= KERNLOAD) 4376 va = KERNBASE + pa; 4377 else 4378 va = kmem_alloc_nofault(kernel_map, size); 4379 if (!va) 4380 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 4381 4382 for (tmpva = va; size > 0; ) { 4383 pmap_kenter_attr(tmpva, pa, mode); 4384 size -= PAGE_SIZE; 4385 tmpva += PAGE_SIZE; 4386 pa += PAGE_SIZE; 4387 } 4388 pmap_invalidate_range(kernel_pmap, va, tmpva); 4389 pmap_invalidate_cache(); 4390 return ((void *)(va + offset)); 4391} 4392 4393void * 4394pmap_mapdev(vm_paddr_t pa, vm_size_t size) 4395{ 4396 4397 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE)); 4398} 4399 4400void * 4401pmap_mapbios(vm_paddr_t pa, vm_size_t size) 4402{ 4403 4404 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK)); 4405} 4406 4407void 4408pmap_unmapdev(vm_offset_t va, vm_size_t size) 4409{ 4410 vm_offset_t base, offset, tmpva; 4411 4412 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD) 4413 return; 4414 base = trunc_page(va); 4415 offset = va & PAGE_MASK; 4416 size = roundup(offset + size, PAGE_SIZE); 4417 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 4418 pmap_kremove(tmpva); 4419 pmap_invalidate_range(kernel_pmap, va, tmpva); 4420 kmem_free(kernel_map, base, size); 4421} 4422 4423int 4424pmap_change_attr(vm_offset_t va, vm_size_t size, int mode) 4425{ 4426 vm_offset_t base, offset, tmpva; 4427 pt_entry_t *pte; 4428 u_int opte, npte; 4429 pd_entry_t *pde; 4430 4431 base = trunc_page(va); 4432 offset = va & PAGE_MASK; 4433 size = roundup(offset + size, PAGE_SIZE); 4434 4435 /* Only supported on kernel virtual addresses. */ 4436 if (base <= VM_MIN_KERNEL_ADDRESS) 4437 return (EINVAL); 4438 4439 /* 4MB pages and pages that aren't mapped aren't supported. */ 4440 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) { 4441 pde = pmap_pde(kernel_pmap, tmpva); 4442 if (*pde & PG_PS) 4443 return (EINVAL); 4444 if (*pde == 0) 4445 return (EINVAL); 4446 pte = vtopte(tmpva); 4447 if (*pte == 0) 4448 return (EINVAL); 4449 } 4450 4451 /* 4452 * Ok, all the pages exist and are 4k, so run through them updating 4453 * their cache mode. 4454 */ 4455 for (tmpva = base; size > 0; ) { 4456 pte = vtopte(tmpva); 4457 4458 /* 4459 * The cache mode bits are all in the low 32-bits of the 4460 * PTE, so we can just spin on updating the low 32-bits. 4461 */ 4462 do { 4463 opte = *(u_int *)pte; 4464 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT); 4465 npte |= pmap_cache_bits(mode, 0); 4466 } while (npte != opte && 4467 !atomic_cmpset_int((u_int *)pte, opte, npte)); 4468 tmpva += PAGE_SIZE; 4469 size -= PAGE_SIZE; 4470 } 4471 4472 /* 4473 * Flush CPU caches to make sure any data isn't cached that shouldn't 4474 * be, etc. 4475 */ 4476 pmap_invalidate_range(kernel_pmap, base, tmpva); 4477 pmap_invalidate_cache(); 4478 return (0); 4479} 4480 4481/* 4482 * perform the pmap work for mincore 4483 */ 4484int 4485pmap_mincore(pmap_t pmap, vm_offset_t addr) 4486{ 4487 pd_entry_t *pdep; 4488 pt_entry_t *ptep, pte; 4489 vm_paddr_t pa; 4490 vm_page_t m; 4491 int val = 0; 4492 4493 PMAP_LOCK(pmap); 4494 pdep = pmap_pde(pmap, addr); 4495 if (*pdep != 0) { 4496 if (*pdep & PG_PS) { 4497 pte = *pdep; 4498 val = MINCORE_SUPER; 4499 /* Compute the physical address of the 4KB page. */ 4500 pa = ((*pdep & PG_PS_FRAME) | (addr & PDRMASK)) & 4501 PG_FRAME; 4502 } else { 4503 ptep = pmap_pte(pmap, addr); 4504 pte = *ptep; 4505 pmap_pte_release(ptep); 4506 pa = pte & PG_FRAME; 4507 } 4508 } else { 4509 pte = 0; 4510 pa = 0; 4511 } 4512 PMAP_UNLOCK(pmap); 4513 4514 if (pte != 0) { 4515 val |= MINCORE_INCORE; 4516 if ((pte & PG_MANAGED) == 0) 4517 return val; 4518 4519 m = PHYS_TO_VM_PAGE(pa); 4520 4521 /* 4522 * Modified by us 4523 */ 4524 if ((pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) 4525 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 4526 else { 4527 /* 4528 * Modified by someone else 4529 */ 4530 vm_page_lock_queues(); 4531 if (m->dirty || pmap_is_modified(m)) 4532 val |= MINCORE_MODIFIED_OTHER; 4533 vm_page_unlock_queues(); 4534 } 4535 /* 4536 * Referenced by us 4537 */ 4538 if (pte & PG_A) 4539 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 4540 else { 4541 /* 4542 * Referenced by someone else 4543 */ 4544 vm_page_lock_queues(); 4545 if ((m->flags & PG_REFERENCED) || 4546 pmap_ts_referenced(m)) { 4547 val |= MINCORE_REFERENCED_OTHER; 4548 vm_page_flag_set(m, PG_REFERENCED); 4549 } 4550 vm_page_unlock_queues(); 4551 } 4552 } 4553 return val; 4554} 4555 4556void 4557pmap_activate(struct thread *td) 4558{ 4559 pmap_t pmap, oldpmap; 4560 u_int32_t cr3; 4561 4562 critical_enter(); 4563 pmap = vmspace_pmap(td->td_proc->p_vmspace); 4564 oldpmap = PCPU_GET(curpmap); 4565#if defined(SMP) 4566 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 4567 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 4568#else 4569 oldpmap->pm_active &= ~1; 4570 pmap->pm_active |= 1; 4571#endif 4572#ifdef PAE 4573 cr3 = vtophys(pmap->pm_pdpt); 4574#else 4575 cr3 = vtophys(pmap->pm_pdir); 4576#endif 4577 /* 4578 * pmap_activate is for the current thread on the current cpu 4579 */ 4580 td->td_pcb->pcb_cr3 = cr3; 4581 load_cr3(cr3); 4582 PCPU_SET(curpmap, pmap); 4583 critical_exit(); 4584} 4585 4586/* 4587 * Increase the starting virtual address of the given mapping if a 4588 * different alignment might result in more superpage mappings. 4589 */ 4590void 4591pmap_align_superpage(vm_object_t object, vm_ooffset_t offset, 4592 vm_offset_t *addr, vm_size_t size) 4593{ 4594 vm_offset_t superpage_offset; 4595 4596 if (size < NBPDR) 4597 return; 4598 if (object != NULL && (object->flags & OBJ_COLORED) != 0) 4599 offset += ptoa(object->pg_color); 4600 superpage_offset = offset & PDRMASK; 4601 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR || 4602 (*addr & PDRMASK) == superpage_offset) 4603 return; 4604 if ((*addr & PDRMASK) < superpage_offset) 4605 *addr = (*addr & ~PDRMASK) + superpage_offset; 4606 else 4607 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset; 4608} 4609 4610 4611#if defined(PMAP_DEBUG) 4612pmap_pid_dump(int pid) 4613{ 4614 pmap_t pmap; 4615 struct proc *p; 4616 int npte = 0; 4617 int index; 4618 4619 sx_slock(&allproc_lock); 4620 FOREACH_PROC_IN_SYSTEM(p) { 4621 if (p->p_pid != pid) 4622 continue; 4623 4624 if (p->p_vmspace) { 4625 int i,j; 4626 index = 0; 4627 pmap = vmspace_pmap(p->p_vmspace); 4628 for (i = 0; i < NPDEPTD; i++) { 4629 pd_entry_t *pde; 4630 pt_entry_t *pte; 4631 vm_offset_t base = i << PDRSHIFT; 4632 4633 pde = &pmap->pm_pdir[i]; 4634 if (pde && pmap_pde_v(pde)) { 4635 for (j = 0; j < NPTEPG; j++) { 4636 vm_offset_t va = base + (j << PAGE_SHIFT); 4637 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 4638 if (index) { 4639 index = 0; 4640 printf("\n"); 4641 } 4642 sx_sunlock(&allproc_lock); 4643 return npte; 4644 } 4645 pte = pmap_pte(pmap, va); 4646 if (pte && pmap_pte_v(pte)) { 4647 pt_entry_t pa; 4648 vm_page_t m; 4649 pa = *pte; 4650 m = PHYS_TO_VM_PAGE(pa & PG_FRAME); 4651 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 4652 va, pa, m->hold_count, m->wire_count, m->flags); 4653 npte++; 4654 index++; 4655 if (index >= 2) { 4656 index = 0; 4657 printf("\n"); 4658 } else { 4659 printf(" "); 4660 } 4661 } 4662 } 4663 } 4664 } 4665 } 4666 } 4667 sx_sunlock(&allproc_lock); 4668 return npte; 4669} 4670#endif 4671 4672#if defined(DEBUG) 4673 4674static void pads(pmap_t pm); 4675void pmap_pvdump(vm_offset_t pa); 4676 4677/* print address space of pmap*/ 4678static void 4679pads(pmap_t pm) 4680{ 4681 int i, j; 4682 vm_paddr_t va; 4683 pt_entry_t *ptep; 4684 4685 if (pm == kernel_pmap) 4686 return; 4687 for (i = 0; i < NPDEPTD; i++) 4688 if (pm->pm_pdir[i]) 4689 for (j = 0; j < NPTEPG; j++) { 4690 va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 4691 if (pm == kernel_pmap && va < KERNBASE) 4692 continue; 4693 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 4694 continue; 4695 ptep = pmap_pte(pm, va); 4696 if (pmap_pte_v(ptep)) 4697 printf("%x:%x ", va, *ptep); 4698 }; 4699 4700} 4701 4702void 4703pmap_pvdump(vm_paddr_t pa) 4704{ 4705 pv_entry_t pv; 4706 pmap_t pmap; 4707 vm_page_t m; 4708 4709 printf("pa %x", pa); 4710 m = PHYS_TO_VM_PAGE(pa); 4711 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 4712 pmap = PV_PMAP(pv); 4713 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va); 4714 pads(pmap); 4715 } 4716 printf(" "); 4717} 4718#endif 4719