pmap.c revision 178070
1130389Sle/*- 2190507Slulf * Copyright (c) 1991 Regents of the University of California. 3130389Sle * All rights reserved. 4130389Sle * Copyright (c) 1994 John S. Dyson 5130389Sle * All rights reserved. 6130389Sle * Copyright (c) 1994 David Greenman 7130389Sle * All rights reserved. 8130389Sle * Copyright (c) 2005-2008 Alan L. Cox <alc@cs.rice.edu> 9130389Sle * All rights reserved. 10130389Sle * 11130389Sle * This code is derived from software contributed to Berkeley by 12130389Sle * the Systems Programming Group of the University of Utah Computer 13130389Sle * Science Department and William Jolitz of UUNET Technologies Inc. 14130389Sle * 15130389Sle * Redistribution and use in source and binary forms, with or without 16130389Sle * modification, are permitted provided that the following conditions 17130389Sle * are met: 18130389Sle * 1. Redistributions of source code must retain the above copyright 19130389Sle * notice, this list of conditions and the following disclaimer. 20130389Sle * 2. Redistributions in binary form must reproduce the above copyright 21130389Sle * notice, this list of conditions and the following disclaimer in the 22130389Sle * documentation and/or other materials provided with the distribution. 23130389Sle * 3. All advertising materials mentioning features or use of this software 24130389Sle * must display the following acknowledgement: 25130389Sle * This product includes software developed by the University of 26130389Sle * California, Berkeley and its contributors. 27130389Sle * 4. Neither the name of the University nor the names of its contributors 28130389Sle * may be used to endorse or promote products derived from this software 29130389Sle * without specific prior written permission. 30130389Sle * 31130389Sle * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32130389Sle * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33130389Sle * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34130389Sle * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35130389Sle * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36130389Sle * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37130389Sle * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38130389Sle * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39130389Sle * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40130389Sle * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41190507Slulf * SUCH DAMAGE. 42190507Slulf * 43190507Slulf * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 44190507Slulf */ 45190507Slulf/*- 46190507Slulf * Copyright (c) 2003 Networks Associates Technology, Inc. 47190507Slulf * All rights reserved. 48190507Slulf * 49190507Slulf * This software was developed for the FreeBSD Project by Jake Burkholder, 50190507Slulf * Safeport Network Services, and Network Associates Laboratories, the 51137730Sle * Security Research Division of Network Associates, Inc. under 52190507Slulf * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 53190507Slulf * CHATS research program. 54190507Slulf * 55190507Slulf * Redistribution and use in source and binary forms, with or without 56190507Slulf * modification, are permitted provided that the following conditions 57190507Slulf * are met: 58190507Slulf * 1. Redistributions of source code must retain the above copyright 59190507Slulf * notice, this list of conditions and the following disclaimer. 60190507Slulf * 2. Redistributions in binary form must reproduce the above copyright 61190507Slulf * notice, this list of conditions and the following disclaimer in the 62190507Slulf * documentation and/or other materials provided with the distribution. 63190507Slulf * 64190507Slulf * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 65190507Slulf * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 66190507Slulf * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 67190507Slulf * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 68191856Slulf * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 69190507Slulf * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 70191856Slulf * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 71190507Slulf * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 72190507Slulf * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 73190507Slulf * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 74190507Slulf * SUCH DAMAGE. 75190507Slulf */ 76190507Slulf 77190507Slulf#include <sys/cdefs.h> 78190507Slulf__FBSDID("$FreeBSD: head/sys/i386/i386/pmap.c 178070 2008-04-10 16:04:50Z alc $"); 79190507Slulf 80190507Slulf/* 81190507Slulf * Manages physical address maps. 82190507Slulf * 83190507Slulf * In addition to hardware address maps, this 84190507Slulf * module is called upon to provide software-use-only 85190507Slulf * maps which may or may not be stored in the same 86190507Slulf * form as hardware maps. These pseudo-maps are 87190507Slulf * used to store intermediate results from copy 88190507Slulf * operations to and from address spaces. 89190507Slulf * 90190507Slulf * Since the information managed by this module is 91190507Slulf * also stored by the logical address mapping module, 92190507Slulf * this module may throw away valid virtual-to-physical 93190507Slulf * mappings at almost any time. However, invalidations 94190507Slulf * of virtual-to-physical mappings must be done as 95190507Slulf * requested. 96190507Slulf * 97190507Slulf * In order to cope with hardware architectures which 98190507Slulf * make virtual-to-physical map invalidates expensive, 99190507Slulf * this module may delay invalidate or reduced protection 100190507Slulf * operations until such time as they are actually 101190507Slulf * necessary. This module is given full information as 102190507Slulf * to which processors are currently using which maps, 103190507Slulf * and to when physical maps must be made correct. 104190507Slulf */ 105190507Slulf 106190507Slulf#include "opt_cpu.h" 107190507Slulf#include "opt_pmap.h" 108190507Slulf#include "opt_msgbuf.h" 109190507Slulf#include "opt_smp.h" 110190507Slulf#include "opt_xbox.h" 111190507Slulf 112190507Slulf#include <sys/param.h> 113190507Slulf#include <sys/systm.h> 114190507Slulf#include <sys/kernel.h> 115190507Slulf#include <sys/ktr.h> 116190507Slulf#include <sys/lock.h> 117190507Slulf#include <sys/malloc.h> 118190507Slulf#include <sys/mman.h> 119190507Slulf#include <sys/msgbuf.h> 120190507Slulf#include <sys/mutex.h> 121190507Slulf#include <sys/proc.h> 122190507Slulf#include <sys/sx.h> 123191856Slulf#include <sys/vmmeter.h> 124191856Slulf#include <sys/sched.h> 125191852Slulf#include <sys/sysctl.h> 126190507Slulf#ifdef SMP 127190507Slulf#include <sys/smp.h> 128190507Slulf#endif 129190507Slulf 130190507Slulf#include <vm/vm.h> 131190507Slulf#include <vm/vm_param.h> 132190507Slulf#include <vm/vm_kern.h> 133190507Slulf#include <vm/vm_page.h> 134190507Slulf#include <vm/vm_map.h> 135190507Slulf#include <vm/vm_object.h> 136190507Slulf#include <vm/vm_extern.h> 137190507Slulf#include <vm/vm_pageout.h> 138190507Slulf#include <vm/vm_pager.h> 139130389Sle#include <vm/vm_reserv.h> 140130389Sle#include <vm/uma.h> 141130389Sle 142130389Sle#include <machine/cpu.h> 143130389Sle#include <machine/cputypes.h> 144135426Sle#include <machine/md_var.h> 145130389Sle#include <machine/pcb.h> 146135426Sle#include <machine/specialreg.h> 147135426Sle#ifdef SMP 148130389Sle#include <machine/smp.h> 149190507Slulf#endif 150135426Sle 151135426Sle#ifdef XBOX 152130389Sle#include <machine/xbox.h> 153135426Sle#endif 154135426Sle 155135426Sle#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 156135426Sle#define CPU_ENABLE_SSE 157135426Sle#endif 158135426Sle 159135426Sle#ifndef PMAP_SHPGPERPROC 160135426Sle#define PMAP_SHPGPERPROC 200 161130389Sle#endif 162135426Sle 163135426Sle#if !defined(DIAGNOSTIC) 164135426Sle#define PMAP_INLINE __gnu89_inline 165135426Sle#else 166130389Sle#define PMAP_INLINE 167130389Sle#endif 168130389Sle 169135426Sle#define PV_STATS 170130389Sle#ifdef PV_STATS 171130389Sle#define PV_STAT(x) do { x ; } while (0) 172190507Slulf#else 173190507Slulf#define PV_STAT(x) do { } while (0) 174138110Sle#endif 175138110Sle 176138110Sle#define pa_index(pa) ((pa) >> PDRSHIFT) 177138110Sle#define pa_to_pvh(pa) (&pv_table[pa_index(pa)]) 178190507Slulf 179138110Sle/* 180138110Sle * Get PDEs and PTEs for user/kernel address space 181138110Sle */ 182138110Sle#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 183138110Sle#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 184138110Sle 185190507Slulf#define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 186138110Sle#define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 187138110Sle#define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 188138110Sle#define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 189138110Sle#define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 190138110Sle 191138110Sle#define pmap_pte_set_w(pte, v) ((v) ? atomic_set_int((u_int *)(pte), PG_W) : \ 192138110Sle atomic_clear_int((u_int *)(pte), PG_W)) 193138110Sle#define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 194138110Sle 195138110Slestruct pmap kernel_pmap_store; 196138110SleLIST_HEAD(pmaplist, pmap); 197138110Slestatic struct pmaplist allpmaps; 198138110Slestatic struct mtx allpmaps_lock; 199138110Sle 200138110Slevm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 201138110Slevm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 202138110Sleint pgeflag = 0; /* PG_G or-in */ 203138110Sleint pseflag = 0; /* PG_PS or-in */ 204138110Sle 205138110Slestatic int nkpt; 206138110Slevm_offset_t kernel_vm_end; 207138110Sleextern u_int32_t KERNend; 208138110Sle 209138110Sle#ifdef PAE 210138110Slept_entry_t pg_nx; 211138110Slestatic uma_zone_t pdptzone; 212138110Sle#endif 213138110Sle 214190507SlulfSYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters"); 215190507Slulf 216190507Slulfstatic int pg_ps_enabled; 217138110SleSYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RD, &pg_ps_enabled, 0, 218190507Slulf "Are large page mappings enabled?"); 219138110Sle 220138110Sle/* 221138110Sle * Data for the pv entry allocation mechanism 222138110Sle */ 223190507Slulfstatic int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 224138110Slestatic struct md_page *pv_table; 225138110Slestatic int shpgperproc = PMAP_SHPGPERPROC; 226138110Sle 227138110Slestruct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */ 228138110Sleint pv_maxchunks; /* How many chunks we have KVA for */ 229138110Slevm_offset_t pv_vafree; /* freelist stored in the PTE */ 230138110Sle 231190507Slulf/* 232138110Sle * All those kernel PT submaps that BSD is so fond of 233138110Sle */ 234138110Slestruct sysmaps { 235138110Sle struct mtx lock; 236138110Sle pt_entry_t *CMAP1; 237138110Sle pt_entry_t *CMAP2; 238138110Sle caddr_t CADDR1; 239138110Sle caddr_t CADDR2; 240138110Sle}; 241190507Slulfstatic struct sysmaps sysmaps_pcpu[MAXCPU]; 242138110Slept_entry_t *CMAP1 = 0; 243138110Slestatic pt_entry_t *CMAP3; 244138110Slecaddr_t CADDR1 = 0, ptvmmap = 0; 245138110Slestatic caddr_t CADDR3; 246138110Slestruct msgbuf *msgbufp = 0; 247138110Sle 248138110Sle/* 249138110Sle * Crashdump maps. 250190507Slulf */ 251190507Slulfstatic caddr_t crashdumpmap; 252135966Sle 253135966Slestatic pt_entry_t *PMAP1 = 0, *PMAP2; 254135966Slestatic pt_entry_t *PADDR1 = 0, *PADDR2; 255135966Sle#ifdef SMP 256190507Slulfstatic int PMAP1cpu; 257137730Slestatic int PMAP1changedcpu; 258135966SleSYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD, 259135966Sle &PMAP1changedcpu, 0, 260135966Sle "Number of times pmap_pte_quick changed CPU with same PMAP1"); 261135966Sle#endif 262190507Slulfstatic int PMAP1changed; 263135966SleSYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD, 264135966Sle &PMAP1changed, 0, 265135966Sle "Number of times pmap_pte_quick changed PMAP1"); 266135966Slestatic int PMAP1unchanged; 267135966SleSYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD, 268135966Sle &PMAP1unchanged, 0, 269135966Sle "Number of times pmap_pte_quick didn't change PMAP1"); 270135966Slestatic struct mtx PMAP2mutex; 271138110Sle 272135966Slestatic void free_pv_entry(pmap_t pmap, pv_entry_t pv); 273135966Slestatic pv_entry_t get_pv_entry(pmap_t locked_pmap, int try); 274135966Slestatic void pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa); 275135966Slestatic boolean_t pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa); 276135966Slestatic void pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa); 277135966Slestatic void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va); 278135966Slestatic pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, 279135966Sle vm_offset_t va); 280191856Slulfstatic int pmap_pvh_wired_mappings(struct md_page *pvh, int count); 281135966Sle 282135966Slestatic boolean_t pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va); 283184292Slulfstatic boolean_t pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m, 284135966Sle vm_prot_t prot); 285190507Slulfstatic vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, 286190507Slulf vm_page_t m, vm_prot_t prot, vm_page_t mpte); 287135966Slestatic void pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte); 288135966Slestatic boolean_t pmap_is_modified_pvh(struct md_page *pvh); 289135966Slestatic vm_page_t pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va); 290135966Slestatic void pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va); 291135966Slestatic boolean_t pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva, 292135966Sle vm_prot_t prot); 293135966Slestatic void pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva, 294135966Sle vm_page_t *free); 295135966Slestatic int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva, 296135966Sle vm_page_t *free); 297135966Slestatic void pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte); 298135966Slestatic void pmap_remove_page(struct pmap *pmap, vm_offset_t va, 299135966Sle vm_page_t *free); 300135966Slestatic void pmap_remove_entry(struct pmap *pmap, vm_page_t m, 301137730Sle vm_offset_t va); 302135966Slestatic void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m); 303135966Slestatic boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, 304135966Sle vm_page_t m); 305135966Sle 306135966Slestatic vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags); 307135966Sle 308135966Slestatic vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags); 309190507Slulfstatic int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free); 310190507Slulfstatic pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va); 311190507Slulfstatic void pmap_pte_release(pt_entry_t *pte); 312190507Slulfstatic int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *); 313190507Slulfstatic vm_offset_t pmap_kmem_choose(vm_offset_t addr); 314135966Sle#ifdef PAE 315135966Slestatic void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 316135966Sle#endif 317135966Sle 318190507SlulfCTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 319135966SleCTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 320135966Sle 321135966Sle/* 322135966Sle * If you get an error here, then you set KVA_PAGES wrong! See the 323135966Sle * description of KVA_PAGES in sys/i386/include/pmap.h. It must be 324135966Sle * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE. 325135966Sle */ 326190507SlulfCTASSERT(KERNBASE % (1 << 24) == 0); 327135966Sle 328135966Sle/* 329135966Sle * Move the kernel virtual free pointer to the next 330135966Sle * 4MB. This is used to help improve performance 331135966Sle * by using a large (4MB) page for much of the kernel 332135966Sle * (.text, .data, .bss) 333190507Slulf */ 334135966Slestatic vm_offset_t 335135966Slepmap_kmem_choose(vm_offset_t addr) 336135966Sle{ 337130389Sle vm_offset_t newaddr = addr; 338190507Slulf 339190507Slulf#ifndef DISABLE_PSE 340190507Slulf if (cpu_feature & CPUID_PSE) 341130389Sle newaddr = (addr + PDRMASK) & ~PDRMASK; 342130389Sle#endif 343130389Sle return newaddr; 344135426Sle} 345190507Slulf 346190507Slulf/* 347137730Sle * Bootstrap the system enough to run with virtual memory. 348130389Sle * 349130389Sle * On the i386 this is called after mapping has already been enabled 350130389Sle * and just syncs the pmap module with what has already been done. 351130389Sle * [We can't call it easily with mapping off since the kernel is not 352130389Sle * mapped with PA == VA, hence we would have to relocate every address 353130389Sle * from the linked base (virtual) address "KERNBASE" to the actual 354130389Sle * (physical) address starting relative to 0] 355135426Sle */ 356135426Slevoid 357135426Slepmap_bootstrap(vm_paddr_t firstaddr) 358135426Sle{ 359135426Sle vm_offset_t va; 360130389Sle pt_entry_t *pte, *unused; 361130389Sle struct sysmaps *sysmaps; 362190507Slulf int i; 363190507Slulf 364190507Slulf /* 365190507Slulf * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 366190507Slulf * large. It should instead be correctly calculated in locore.s and 367190507Slulf * not based on 'first' (which is a physical address, not a virtual 368190507Slulf * address, for the start of unused physical memory). The kernel 369190507Slulf * page tables are NOT double mapped and thus should not be included 370190507Slulf * in this calculation. 371190507Slulf */ 372190507Slulf virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 373190507Slulf virtual_avail = pmap_kmem_choose(virtual_avail); 374190507Slulf 375190507Slulf virtual_end = VM_MAX_KERNEL_ADDRESS; 376190507Slulf 377190507Slulf /* 378190507Slulf * Initialize the kernel pmap (which is statically allocated). 379190507Slulf */ 380130389Sle PMAP_LOCK_INIT(kernel_pmap); 381130389Sle kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 382130389Sle#ifdef PAE 383130389Sle kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 384130389Sle#endif 385130389Sle kernel_pmap->pm_root = NULL; 386130389Sle kernel_pmap->pm_active = -1; /* don't allow deactivation */ 387130389Sle TAILQ_INIT(&kernel_pmap->pm_pvchunk); 388130389Sle LIST_INIT(&allpmaps); 389130389Sle mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 390130389Sle mtx_lock_spin(&allpmaps_lock); 391130389Sle LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 392130389Sle mtx_unlock_spin(&allpmaps_lock); 393130389Sle nkpt = NKPT; 394130389Sle 395130389Sle /* 396130389Sle * Reserve some special page table entries/VA space for temporary 397130389Sle * mapping of pages. 398135426Sle */ 399190507Slulf#define SYSMAP(c, p, v, n) \ 400190507Slulf v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 401190507Slulf 402191856Slulf va = virtual_avail; 403190507Slulf pte = vtopte(va); 404130389Sle 405190507Slulf /* 406130389Sle * CMAP1/CMAP2 are used for zeroing and copying pages. 407135426Sle * CMAP3 is used for the idle process page zeroing. 408130389Sle */ 409130389Sle for (i = 0; i < MAXCPU; i++) { 410135426Sle sysmaps = &sysmaps_pcpu[i]; 411130389Sle mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF); 412130389Sle SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1) 413135426Sle SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1) 414130389Sle } 415135426Sle SYSMAP(caddr_t, CMAP1, CADDR1, 1) 416130389Sle SYSMAP(caddr_t, CMAP3, CADDR3, 1) 417130389Sle *CMAP3 = 0; 418130389Sle 419190507Slulf /* 420135966Sle * Crashdump maps. 421135966Sle */ 422190507Slulf SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS) 423190507Slulf 424190507Slulf /* 425190507Slulf * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 426190507Slulf */ 427190507Slulf SYSMAP(caddr_t, unused, ptvmmap, 1) 428130389Sle 429130389Sle /* 430130389Sle * msgbufp is used to map the system message buffer. 431130389Sle */ 432130389Sle SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE))) 433130389Sle 434130389Sle /* 435135426Sle * ptemap is used for pmap_pte_quick 436135426Sle */ 437130389Sle SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 438130389Sle SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1); 439130389Sle 440130389Sle mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF); 441190507Slulf 442190507Slulf virtual_avail = va; 443190507Slulf 444190507Slulf *CMAP1 = 0; 445135426Sle 446130389Sle /* 447135426Sle * Leave in place an identity mapping (virt == phys) for the low 1 MB 448190507Slulf * physical memory region that is used by the ACPI wakeup code. This 449135426Sle * mapping must not have PG_G set. 450135426Sle */ 451135426Sle#ifdef XBOX 452135426Sle /* FIXME: This is gross, but needed for the XBOX. Since we are in such 453130389Sle * an early stadium, we cannot yet neatly map video memory ... :-( 454130389Sle * Better fixes are very welcome! */ 455130389Sle if (!arch_i386_is_xbox) 456130389Sle#endif 457190507Slulf for (i = 1; i < NKPT; i++) 458135426Sle PTD[i] = 0; 459130389Sle 460135426Sle /* Initialize the PAT MSR if present. */ 461190507Slulf pmap_init_pat(); 462130389Sle 463135426Sle /* Turn on PG_G on kernel page(s) */ 464135426Sle pmap_set_pg(); 465130389Sle} 466130389Sle 467130389Sle/* 468130389Sle * Setup the PAT MSR. 469130389Sle */ 470130389Slevoid 471130389Slepmap_init_pat(void) 472130389Sle{ 473130389Sle uint64_t pat_msr; 474135426Sle 475135426Sle /* Bail if this CPU doesn't implement PAT. */ 476130389Sle if (!(cpu_feature & CPUID_PAT)) 477130389Sle return; 478135426Sle 479130389Sle#ifdef PAT_WORKS 480190507Slulf /* 481190507Slulf * Leave the indices 0-3 at the default of WB, WT, UC, and UC-. 482190507Slulf * Program 4 and 5 as WP and WC. 483130389Sle * Leave 6 and 7 as UC and UC-. 484190507Slulf */ 485135426Sle pat_msr = rdmsr(MSR_PAT); 486130389Sle pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5)); 487135426Sle pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) | 488135426Sle PAT_VALUE(5, PAT_WRITE_COMBINING); 489190507Slulf#else 490135426Sle /* 491135426Sle * Due to some Intel errata, we can only safely use the lower 4 492135426Sle * PAT entries. Thus, just replace PAT Index 2 with WC instead 493135426Sle * of UC-. 494130389Sle * 495130389Sle * Intel Pentium III Processor Specification Update 496135426Sle * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B 497190507Slulf * or Mode C Paging) 498135426Sle * 499130389Sle * Intel Pentium IV Processor Specification Update 500190507Slulf * Errata N46 (PAT Index MSB May Be Calculated Incorrectly) 501135426Sle */ 502130389Sle pat_msr = rdmsr(MSR_PAT); 503130389Sle pat_msr &= ~PAT_MASK(2); 504135426Sle pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING); 505130389Sle#endif 506135426Sle wrmsr(MSR_PAT, pat_msr); 507190507Slulf} 508135426Sle 509130925Sle/* 510130389Sle * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on. 511190507Slulf */ 512130389Slevoid 513135426Slepmap_set_pg(void) 514135426Sle{ 515135426Sle pd_entry_t pdir; 516130389Sle pt_entry_t *pte; 517130389Sle vm_offset_t va, endva; 518130389Sle int i; 519130389Sle 520130389Sle if (pgeflag == 0) 521130389Sle return; 522130389Sle 523135426Sle i = KERNLOAD/NBPDR; 524190507Slulf endva = KERNBASE + KERNend; 525135426Sle 526130925Sle if (pseflag) { 527135426Sle va = KERNBASE + KERNLOAD; 528130389Sle while (va < endva) { 529190507Slulf pdir = kernel_pmap->pm_pdir[KPTDI+i]; 530135426Sle pdir |= pgeflag; 531135426Sle kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir; 532135426Sle invltlb(); /* Play it safe, invltlb() every time */ 533135426Sle i++; 534135426Sle va += NBPDR; 535135426Sle } 536190507Slulf } else { 537135426Sle va = (vm_offset_t)btext; 538135426Sle while (va < endva) { 539135426Sle pte = vtopte(va); 540135426Sle if (*pte) 541190507Slulf *pte |= pgeflag; 542135426Sle invltlb(); /* Play it safe, invltlb() every time */ 543135426Sle va += PAGE_SIZE; 544135426Sle } 545135426Sle } 546135426Sle} 547135426Sle 548190507Slulf/* 549135426Sle * Initialize a vm_page's machine-dependent fields. 550135426Sle */ 551135426Slevoid 552135426Slepmap_page_init(vm_page_t m) 553135426Sle{ 554135426Sle 555135426Sle TAILQ_INIT(&m->md.pv_list); 556135426Sle} 557135426Sle 558135426Sle#ifdef PAE 559135426Sle 560190507Slulfstatic MALLOC_DEFINE(M_PMAPPDPT, "pmap", "pmap pdpt"); 561135426Sle 562135426Slestatic void * 563135426Slepmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 564135426Sle{ 565135426Sle 566130389Sle /* Inform UMA that this allocator uses kernel_map/object. */ 567130389Sle *flags = UMA_SLAB_KERNEL; 568135426Sle return (contigmalloc(PAGE_SIZE, M_PMAPPDPT, 0, 0x0ULL, 0xffffffffULL, 569130389Sle 1, 0)); 570130389Sle} 571130389Sle#endif 572130389Sle 573130389Sle/* 574130389Sle * ABuse the pte nodes for unmapped kva to thread a kva freelist through. 575137730Sle * Requirements: 576190507Slulf * - Must deal with pages in order to ensure that none of the PG_* bits 577190507Slulf * are ever set, PG_V in particular. 578190507Slulf * - Assumes we can write to ptes without pte_store() atomic ops, even 579190507Slulf * on PAE systems. This should be ok. 580190507Slulf * - Assumes nothing will ever test these addresses for 0 to indicate 581190507Slulf * no mapping instead of correctly checking PG_V. 582190507Slulf * - Assumes a vm_offset_t will fit in a pte (true for i386). 583190507Slulf * Because PG_V is never set, there can be no mappings to invalidate. 584137730Sle */ 585190507Slulfstatic vm_offset_t 586137730Slepmap_ptelist_alloc(vm_offset_t *head) 587190507Slulf{ 588190507Slulf pt_entry_t *pte; 589137730Sle vm_offset_t va; 590137730Sle 591190507Slulf va = *head; 592190507Slulf if (va == 0) 593190507Slulf return (va); /* Out of memory */ 594190507Slulf pte = vtopte(va); 595190507Slulf *head = *pte; 596190507Slulf if (*head & PG_V) 597190507Slulf panic("pmap_ptelist_alloc: va with PG_V set!"); 598190507Slulf *pte = 0; 599137730Sle return (va); 600190507Slulf} 601190507Slulf 602137730Slestatic void 603137730Slepmap_ptelist_free(vm_offset_t *head, vm_offset_t va) 604137730Sle{ 605190507Slulf pt_entry_t *pte; 606137730Sle 607137730Sle if (va & PG_V) 608137730Sle panic("pmap_ptelist_free: freeing va with PG_V set!"); 609137730Sle pte = vtopte(va); 610137730Sle *pte = *head; /* virtual! PG_V is 0 though */ 611137730Sle *head = va; 612137730Sle} 613137730Sle 614137730Slestatic void 615137730Slepmap_ptelist_init(vm_offset_t *head, void *base, int npages) 616137730Sle{ 617190507Slulf int i; 618137730Sle vm_offset_t va; 619137730Sle 620137730Sle *head = 0; 621137730Sle for (i = npages - 1; i >= 0; i--) { 622137730Sle va = (vm_offset_t)base + i * PAGE_SIZE; 623137730Sle pmap_ptelist_free(head, va); 624137730Sle } 625137730Sle} 626137730Sle 627137730Sle 628137730Sle/* 629137730Sle * Initialize the pmap module. 630137730Sle * Called by vm_init, to initialize any structures that the pmap 631137730Sle * system needs to map virtual memory. 632137730Sle */ 633137730Slevoid 634137730Slepmap_init(void) 635137730Sle{ 636137730Sle vm_page_t mpte; 637137730Sle vm_size_t s; 638190507Slulf int i, pv_npg; 639190507Slulf 640190507Slulf /* 641190507Slulf * Initialize the vm page array entries for the kernel pmap's 642190507Slulf * page table pages. 643190507Slulf */ 644190507Slulf for (i = 0; i < nkpt; i++) { 645190507Slulf mpte = PHYS_TO_VM_PAGE(PTD[i + KPTDI] & PG_FRAME); 646190507Slulf KASSERT(mpte >= vm_page_array && 647190507Slulf mpte < &vm_page_array[vm_page_array_size], 648190507Slulf ("pmap_init: page table page is out of range")); 649190507Slulf mpte->pindex = i + KPTDI; 650190507Slulf mpte->phys_addr = PTD[i + KPTDI] & PG_FRAME; 651190507Slulf } 652190507Slulf 653190507Slulf /* 654190507Slulf * Initialize the address space (zone) for the pv entries. Set a 655190507Slulf * high water mark so that the system can recover from excessive 656190507Slulf * numbers of pv entries. 657190507Slulf */ 658190507Slulf TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 659190507Slulf pv_entry_max = shpgperproc * maxproc + cnt.v_page_count; 660190507Slulf TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 661190507Slulf pv_entry_max = roundup(pv_entry_max, _NPCPV); 662 pv_entry_high_water = 9 * (pv_entry_max / 10); 663 664 /* 665 * Are large page mappings enabled? 666 */ 667 TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled); 668 669 /* 670 * Calculate the size of the pv head table for superpages. 671 */ 672 for (i = 0; phys_avail[i + 1]; i += 2); 673 pv_npg = round_4mpage(phys_avail[(i - 2) + 1]) / NBPDR; 674 675 /* 676 * Allocate memory for the pv head table for superpages. 677 */ 678 s = (vm_size_t)(pv_npg * sizeof(struct md_page)); 679 s = round_page(s); 680 pv_table = (struct md_page *)kmem_alloc(kernel_map, s); 681 for (i = 0; i < pv_npg; i++) 682 TAILQ_INIT(&pv_table[i].pv_list); 683 684 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc); 685 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map, 686 PAGE_SIZE * pv_maxchunks); 687 if (pv_chunkbase == NULL) 688 panic("pmap_init: not enough kvm for pv chunks"); 689 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks); 690#ifdef PAE 691 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL, 692 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1, 693 UMA_ZONE_VM | UMA_ZONE_NOFREE); 694 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf); 695#endif 696} 697 698 699SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0, 700 "Max number of PV entries"); 701SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0, 702 "Page share factor per proc"); 703 704SYSCTL_NODE(_vm_pmap, OID_AUTO, pde, CTLFLAG_RD, 0, 705 "2/4MB page mapping counters"); 706 707static u_long pmap_pde_demotions; 708SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, demotions, CTLFLAG_RD, 709 &pmap_pde_demotions, 0, "2/4MB page demotions"); 710 711static u_long pmap_pde_mappings; 712SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, mappings, CTLFLAG_RD, 713 &pmap_pde_mappings, 0, "2/4MB page mappings"); 714 715static u_long pmap_pde_p_failures; 716SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, p_failures, CTLFLAG_RD, 717 &pmap_pde_p_failures, 0, "2/4MB page promotion failures"); 718 719static u_long pmap_pde_promotions; 720SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, promotions, CTLFLAG_RD, 721 &pmap_pde_promotions, 0, "2/4MB page promotions"); 722 723/*************************************************** 724 * Low level helper routines..... 725 ***************************************************/ 726 727/* 728 * Determine the appropriate bits to set in a PTE or PDE for a specified 729 * caching mode. 730 */ 731static int 732pmap_cache_bits(int mode, boolean_t is_pde) 733{ 734 int pat_flag, pat_index, cache_bits; 735 736 /* The PAT bit is different for PTE's and PDE's. */ 737 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT; 738 739 /* If we don't support PAT, map extended modes to older ones. */ 740 if (!(cpu_feature & CPUID_PAT)) { 741 switch (mode) { 742 case PAT_UNCACHEABLE: 743 case PAT_WRITE_THROUGH: 744 case PAT_WRITE_BACK: 745 break; 746 case PAT_UNCACHED: 747 case PAT_WRITE_COMBINING: 748 case PAT_WRITE_PROTECTED: 749 mode = PAT_UNCACHEABLE; 750 break; 751 } 752 } 753 754 /* Map the caching mode to a PAT index. */ 755 switch (mode) { 756#ifdef PAT_WORKS 757 case PAT_UNCACHEABLE: 758 pat_index = 3; 759 break; 760 case PAT_WRITE_THROUGH: 761 pat_index = 1; 762 break; 763 case PAT_WRITE_BACK: 764 pat_index = 0; 765 break; 766 case PAT_UNCACHED: 767 pat_index = 2; 768 break; 769 case PAT_WRITE_COMBINING: 770 pat_index = 5; 771 break; 772 case PAT_WRITE_PROTECTED: 773 pat_index = 4; 774 break; 775#else 776 case PAT_UNCACHED: 777 case PAT_UNCACHEABLE: 778 case PAT_WRITE_PROTECTED: 779 pat_index = 3; 780 break; 781 case PAT_WRITE_THROUGH: 782 pat_index = 1; 783 break; 784 case PAT_WRITE_BACK: 785 pat_index = 0; 786 break; 787 case PAT_WRITE_COMBINING: 788 pat_index = 2; 789 break; 790#endif 791 default: 792 panic("Unknown caching mode %d\n", mode); 793 } 794 795 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */ 796 cache_bits = 0; 797 if (pat_index & 0x4) 798 cache_bits |= pat_flag; 799 if (pat_index & 0x2) 800 cache_bits |= PG_NC_PCD; 801 if (pat_index & 0x1) 802 cache_bits |= PG_NC_PWT; 803 return (cache_bits); 804} 805#ifdef SMP 806/* 807 * For SMP, these functions have to use the IPI mechanism for coherence. 808 * 809 * N.B.: Before calling any of the following TLB invalidation functions, 810 * the calling processor must ensure that all stores updating a non- 811 * kernel page table are globally performed. Otherwise, another 812 * processor could cache an old, pre-update entry without being 813 * invalidated. This can happen one of two ways: (1) The pmap becomes 814 * active on another processor after its pm_active field is checked by 815 * one of the following functions but before a store updating the page 816 * table is globally performed. (2) The pmap becomes active on another 817 * processor before its pm_active field is checked but due to 818 * speculative loads one of the following functions stills reads the 819 * pmap as inactive on the other processor. 820 * 821 * The kernel page table is exempt because its pm_active field is 822 * immutable. The kernel page table is always active on every 823 * processor. 824 */ 825void 826pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 827{ 828 u_int cpumask; 829 u_int other_cpus; 830 831 sched_pin(); 832 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 833 invlpg(va); 834 smp_invlpg(va); 835 } else { 836 cpumask = PCPU_GET(cpumask); 837 other_cpus = PCPU_GET(other_cpus); 838 if (pmap->pm_active & cpumask) 839 invlpg(va); 840 if (pmap->pm_active & other_cpus) 841 smp_masked_invlpg(pmap->pm_active & other_cpus, va); 842 } 843 sched_unpin(); 844} 845 846void 847pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 848{ 849 u_int cpumask; 850 u_int other_cpus; 851 vm_offset_t addr; 852 853 sched_pin(); 854 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 855 for (addr = sva; addr < eva; addr += PAGE_SIZE) 856 invlpg(addr); 857 smp_invlpg_range(sva, eva); 858 } else { 859 cpumask = PCPU_GET(cpumask); 860 other_cpus = PCPU_GET(other_cpus); 861 if (pmap->pm_active & cpumask) 862 for (addr = sva; addr < eva; addr += PAGE_SIZE) 863 invlpg(addr); 864 if (pmap->pm_active & other_cpus) 865 smp_masked_invlpg_range(pmap->pm_active & other_cpus, 866 sva, eva); 867 } 868 sched_unpin(); 869} 870 871void 872pmap_invalidate_all(pmap_t pmap) 873{ 874 u_int cpumask; 875 u_int other_cpus; 876 877 sched_pin(); 878 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 879 invltlb(); 880 smp_invltlb(); 881 } else { 882 cpumask = PCPU_GET(cpumask); 883 other_cpus = PCPU_GET(other_cpus); 884 if (pmap->pm_active & cpumask) 885 invltlb(); 886 if (pmap->pm_active & other_cpus) 887 smp_masked_invltlb(pmap->pm_active & other_cpus); 888 } 889 sched_unpin(); 890} 891 892void 893pmap_invalidate_cache(void) 894{ 895 896 sched_pin(); 897 wbinvd(); 898 smp_cache_flush(); 899 sched_unpin(); 900} 901#else /* !SMP */ 902/* 903 * Normal, non-SMP, 486+ invalidation functions. 904 * We inline these within pmap.c for speed. 905 */ 906PMAP_INLINE void 907pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 908{ 909 910 if (pmap == kernel_pmap || pmap->pm_active) 911 invlpg(va); 912} 913 914PMAP_INLINE void 915pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 916{ 917 vm_offset_t addr; 918 919 if (pmap == kernel_pmap || pmap->pm_active) 920 for (addr = sva; addr < eva; addr += PAGE_SIZE) 921 invlpg(addr); 922} 923 924PMAP_INLINE void 925pmap_invalidate_all(pmap_t pmap) 926{ 927 928 if (pmap == kernel_pmap || pmap->pm_active) 929 invltlb(); 930} 931 932PMAP_INLINE void 933pmap_invalidate_cache(void) 934{ 935 936 wbinvd(); 937} 938#endif /* !SMP */ 939 940/* 941 * Are we current address space or kernel? N.B. We return FALSE when 942 * a pmap's page table is in use because a kernel thread is borrowing 943 * it. The borrowed page table can change spontaneously, making any 944 * dependence on its continued use subject to a race condition. 945 */ 946static __inline int 947pmap_is_current(pmap_t pmap) 948{ 949 950 return (pmap == kernel_pmap || 951 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) && 952 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME))); 953} 954 955/* 956 * If the given pmap is not the current or kernel pmap, the returned pte must 957 * be released by passing it to pmap_pte_release(). 958 */ 959pt_entry_t * 960pmap_pte(pmap_t pmap, vm_offset_t va) 961{ 962 pd_entry_t newpf; 963 pd_entry_t *pde; 964 965 pde = pmap_pde(pmap, va); 966 if (*pde & PG_PS) 967 return (pde); 968 if (*pde != 0) { 969 /* are we current address space or kernel? */ 970 if (pmap_is_current(pmap)) 971 return (vtopte(va)); 972 mtx_lock(&PMAP2mutex); 973 newpf = *pde & PG_FRAME; 974 if ((*PMAP2 & PG_FRAME) != newpf) { 975 *PMAP2 = newpf | PG_RW | PG_V | PG_A | PG_M; 976 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2); 977 } 978 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1))); 979 } 980 return (0); 981} 982 983/* 984 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte 985 * being NULL. 986 */ 987static __inline void 988pmap_pte_release(pt_entry_t *pte) 989{ 990 991 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) 992 mtx_unlock(&PMAP2mutex); 993} 994 995static __inline void 996invlcaddr(void *caddr) 997{ 998 999 invlpg((u_int)caddr); 1000} 1001 1002/* 1003 * Super fast pmap_pte routine best used when scanning 1004 * the pv lists. This eliminates many coarse-grained 1005 * invltlb calls. Note that many of the pv list 1006 * scans are across different pmaps. It is very wasteful 1007 * to do an entire invltlb for checking a single mapping. 1008 * 1009 * If the given pmap is not the current pmap, vm_page_queue_mtx 1010 * must be held and curthread pinned to a CPU. 1011 */ 1012static pt_entry_t * 1013pmap_pte_quick(pmap_t pmap, vm_offset_t va) 1014{ 1015 pd_entry_t newpf; 1016 pd_entry_t *pde; 1017 1018 pde = pmap_pde(pmap, va); 1019 if (*pde & PG_PS) 1020 return (pde); 1021 if (*pde != 0) { 1022 /* are we current address space or kernel? */ 1023 if (pmap_is_current(pmap)) 1024 return (vtopte(va)); 1025 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1026 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 1027 newpf = *pde & PG_FRAME; 1028 if ((*PMAP1 & PG_FRAME) != newpf) { 1029 *PMAP1 = newpf | PG_RW | PG_V | PG_A | PG_M; 1030#ifdef SMP 1031 PMAP1cpu = PCPU_GET(cpuid); 1032#endif 1033 invlcaddr(PADDR1); 1034 PMAP1changed++; 1035 } else 1036#ifdef SMP 1037 if (PMAP1cpu != PCPU_GET(cpuid)) { 1038 PMAP1cpu = PCPU_GET(cpuid); 1039 invlcaddr(PADDR1); 1040 PMAP1changedcpu++; 1041 } else 1042#endif 1043 PMAP1unchanged++; 1044 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1))); 1045 } 1046 return (0); 1047} 1048 1049/* 1050 * Routine: pmap_extract 1051 * Function: 1052 * Extract the physical page address associated 1053 * with the given map/virtual_address pair. 1054 */ 1055vm_paddr_t 1056pmap_extract(pmap_t pmap, vm_offset_t va) 1057{ 1058 vm_paddr_t rtval; 1059 pt_entry_t *pte; 1060 pd_entry_t pde; 1061 1062 rtval = 0; 1063 PMAP_LOCK(pmap); 1064 pde = pmap->pm_pdir[va >> PDRSHIFT]; 1065 if (pde != 0) { 1066 if ((pde & PG_PS) != 0) { 1067 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK); 1068 PMAP_UNLOCK(pmap); 1069 return rtval; 1070 } 1071 pte = pmap_pte(pmap, va); 1072 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK); 1073 pmap_pte_release(pte); 1074 } 1075 PMAP_UNLOCK(pmap); 1076 return (rtval); 1077} 1078 1079/* 1080 * Routine: pmap_extract_and_hold 1081 * Function: 1082 * Atomically extract and hold the physical page 1083 * with the given pmap and virtual address pair 1084 * if that mapping permits the given protection. 1085 */ 1086vm_page_t 1087pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 1088{ 1089 pd_entry_t pde; 1090 pt_entry_t pte; 1091 vm_page_t m; 1092 1093 m = NULL; 1094 vm_page_lock_queues(); 1095 PMAP_LOCK(pmap); 1096 pde = *pmap_pde(pmap, va); 1097 if (pde != 0) { 1098 if (pde & PG_PS) { 1099 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) { 1100 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) | 1101 (va & PDRMASK)); 1102 vm_page_hold(m); 1103 } 1104 } else { 1105 sched_pin(); 1106 pte = *pmap_pte_quick(pmap, va); 1107 if (pte != 0 && 1108 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) { 1109 m = PHYS_TO_VM_PAGE(pte & PG_FRAME); 1110 vm_page_hold(m); 1111 } 1112 sched_unpin(); 1113 } 1114 } 1115 vm_page_unlock_queues(); 1116 PMAP_UNLOCK(pmap); 1117 return (m); 1118} 1119 1120/*************************************************** 1121 * Low level mapping routines..... 1122 ***************************************************/ 1123 1124/* 1125 * Add a wired page to the kva. 1126 * Note: not SMP coherent. 1127 */ 1128PMAP_INLINE void 1129pmap_kenter(vm_offset_t va, vm_paddr_t pa) 1130{ 1131 pt_entry_t *pte; 1132 1133 pte = vtopte(va); 1134 pte_store(pte, pa | PG_RW | PG_V | pgeflag); 1135} 1136 1137PMAP_INLINE void 1138pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode) 1139{ 1140 pt_entry_t *pte; 1141 1142 pte = vtopte(va); 1143 pte_store(pte, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0)); 1144} 1145 1146/* 1147 * Remove a page from the kernel pagetables. 1148 * Note: not SMP coherent. 1149 */ 1150PMAP_INLINE void 1151pmap_kremove(vm_offset_t va) 1152{ 1153 pt_entry_t *pte; 1154 1155 pte = vtopte(va); 1156 pte_clear(pte); 1157} 1158 1159/* 1160 * Used to map a range of physical addresses into kernel 1161 * virtual address space. 1162 * 1163 * The value passed in '*virt' is a suggested virtual address for 1164 * the mapping. Architectures which can support a direct-mapped 1165 * physical to virtual region can return the appropriate address 1166 * within that region, leaving '*virt' unchanged. Other 1167 * architectures should map the pages starting at '*virt' and 1168 * update '*virt' with the first usable address after the mapped 1169 * region. 1170 */ 1171vm_offset_t 1172pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 1173{ 1174 vm_offset_t va, sva; 1175 1176 va = sva = *virt; 1177 while (start < end) { 1178 pmap_kenter(va, start); 1179 va += PAGE_SIZE; 1180 start += PAGE_SIZE; 1181 } 1182 pmap_invalidate_range(kernel_pmap, sva, va); 1183 *virt = va; 1184 return (sva); 1185} 1186 1187 1188/* 1189 * Add a list of wired pages to the kva 1190 * this routine is only used for temporary 1191 * kernel mappings that do not need to have 1192 * page modification or references recorded. 1193 * Note that old mappings are simply written 1194 * over. The page *must* be wired. 1195 * Note: SMP coherent. Uses a ranged shootdown IPI. 1196 */ 1197void 1198pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count) 1199{ 1200 pt_entry_t *endpte, oldpte, *pte; 1201 1202 oldpte = 0; 1203 pte = vtopte(sva); 1204 endpte = pte + count; 1205 while (pte < endpte) { 1206 oldpte |= *pte; 1207 pte_store(pte, VM_PAGE_TO_PHYS(*ma) | pgeflag | PG_RW | PG_V); 1208 pte++; 1209 ma++; 1210 } 1211 if ((oldpte & PG_V) != 0) 1212 pmap_invalidate_range(kernel_pmap, sva, sva + count * 1213 PAGE_SIZE); 1214} 1215 1216/* 1217 * This routine tears out page mappings from the 1218 * kernel -- it is meant only for temporary mappings. 1219 * Note: SMP coherent. Uses a ranged shootdown IPI. 1220 */ 1221void 1222pmap_qremove(vm_offset_t sva, int count) 1223{ 1224 vm_offset_t va; 1225 1226 va = sva; 1227 while (count-- > 0) { 1228 pmap_kremove(va); 1229 va += PAGE_SIZE; 1230 } 1231 pmap_invalidate_range(kernel_pmap, sva, va); 1232} 1233 1234/*************************************************** 1235 * Page table page management routines..... 1236 ***************************************************/ 1237static __inline void 1238pmap_free_zero_pages(vm_page_t free) 1239{ 1240 vm_page_t m; 1241 1242 while (free != NULL) { 1243 m = free; 1244 free = m->right; 1245 /* Preserve the page's PG_ZERO setting. */ 1246 vm_page_free_toq(m); 1247 } 1248} 1249 1250/* 1251 * Schedule the specified unused page table page to be freed. Specifically, 1252 * add the page to the specified list of pages that will be released to the 1253 * physical memory manager after the TLB has been updated. 1254 */ 1255static __inline void 1256pmap_add_delayed_free_list(vm_page_t m, vm_page_t *free, boolean_t set_PG_ZERO) 1257{ 1258 1259 if (set_PG_ZERO) 1260 m->flags |= PG_ZERO; 1261 else 1262 m->flags &= ~PG_ZERO; 1263 m->right = *free; 1264 *free = m; 1265} 1266 1267/* 1268 * Inserts the specified page table page into the specified pmap's collection 1269 * of idle page table pages. Each of a pmap's page table pages is responsible 1270 * for mapping a distinct range of virtual addresses. The pmap's collection is 1271 * ordered by this virtual address range. 1272 */ 1273static void 1274pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte) 1275{ 1276 vm_page_t root; 1277 1278 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1279 root = pmap->pm_root; 1280 if (root == NULL) { 1281 mpte->left = NULL; 1282 mpte->right = NULL; 1283 } else { 1284 root = vm_page_splay(mpte->pindex, root); 1285 if (mpte->pindex < root->pindex) { 1286 mpte->left = root->left; 1287 mpte->right = root; 1288 root->left = NULL; 1289 } else if (mpte->pindex == root->pindex) 1290 panic("pmap_insert_pt_page: pindex already inserted"); 1291 else { 1292 mpte->right = root->right; 1293 mpte->left = root; 1294 root->right = NULL; 1295 } 1296 } 1297 pmap->pm_root = mpte; 1298} 1299 1300/* 1301 * Looks for a page table page mapping the specified virtual address in the 1302 * specified pmap's collection of idle page table pages. Returns NULL if there 1303 * is no page table page corresponding to the specified virtual address. 1304 */ 1305static vm_page_t 1306pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va) 1307{ 1308 vm_page_t mpte; 1309 vm_pindex_t pindex = va >> PDRSHIFT; 1310 1311 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1312 if ((mpte = pmap->pm_root) != NULL && mpte->pindex != pindex) { 1313 mpte = vm_page_splay(pindex, mpte); 1314 if ((pmap->pm_root = mpte)->pindex != pindex) 1315 mpte = NULL; 1316 } 1317 return (mpte); 1318} 1319 1320/* 1321 * Removes the specified page table page from the specified pmap's collection 1322 * of idle page table pages. The specified page table page must be a member of 1323 * the pmap's collection. 1324 */ 1325static void 1326pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte) 1327{ 1328 vm_page_t root; 1329 1330 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1331 if (mpte != pmap->pm_root) 1332 vm_page_splay(mpte->pindex, pmap->pm_root); 1333 if (mpte->left == NULL) 1334 root = mpte->right; 1335 else { 1336 root = vm_page_splay(mpte->pindex, mpte->left); 1337 root->right = mpte->right; 1338 } 1339 pmap->pm_root = root; 1340} 1341 1342/* 1343 * This routine unholds page table pages, and if the hold count 1344 * drops to zero, then it decrements the wire count. 1345 */ 1346static __inline int 1347pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1348{ 1349 1350 --m->wire_count; 1351 if (m->wire_count == 0) 1352 return _pmap_unwire_pte_hold(pmap, m, free); 1353 else 1354 return 0; 1355} 1356 1357static int 1358_pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1359{ 1360 vm_offset_t pteva; 1361 1362 /* 1363 * unmap the page table page 1364 */ 1365 pmap->pm_pdir[m->pindex] = 0; 1366 --pmap->pm_stats.resident_count; 1367 1368 /* 1369 * This is a release store so that the ordinary store unmapping 1370 * the page table page is globally performed before TLB shoot- 1371 * down is begun. 1372 */ 1373 atomic_subtract_rel_int(&cnt.v_wire_count, 1); 1374 1375 /* 1376 * Do an invltlb to make the invalidated mapping 1377 * take effect immediately. 1378 */ 1379 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1380 pmap_invalidate_page(pmap, pteva); 1381 1382 /* 1383 * Put page on a list so that it is released after 1384 * *ALL* TLB shootdown is done 1385 */ 1386 pmap_add_delayed_free_list(m, free, TRUE); 1387 1388 return 1; 1389} 1390 1391/* 1392 * After removing a page table entry, this routine is used to 1393 * conditionally free the page, and manage the hold/wire counts. 1394 */ 1395static int 1396pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free) 1397{ 1398 pd_entry_t ptepde; 1399 vm_page_t mpte; 1400 1401 if (va >= VM_MAXUSER_ADDRESS) 1402 return 0; 1403 ptepde = *pmap_pde(pmap, va); 1404 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); 1405 return pmap_unwire_pte_hold(pmap, mpte, free); 1406} 1407 1408void 1409pmap_pinit0(pmap_t pmap) 1410{ 1411 1412 PMAP_LOCK_INIT(pmap); 1413 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1414#ifdef PAE 1415 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1416#endif 1417 pmap->pm_root = NULL; 1418 pmap->pm_active = 0; 1419 PCPU_SET(curpmap, pmap); 1420 TAILQ_INIT(&pmap->pm_pvchunk); 1421 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1422 mtx_lock_spin(&allpmaps_lock); 1423 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1424 mtx_unlock_spin(&allpmaps_lock); 1425} 1426 1427/* 1428 * Initialize a preallocated and zeroed pmap structure, 1429 * such as one in a vmspace structure. 1430 */ 1431int 1432pmap_pinit(pmap_t pmap) 1433{ 1434 vm_page_t m, ptdpg[NPGPTD]; 1435 vm_paddr_t pa; 1436 static int color; 1437 int i; 1438 1439 PMAP_LOCK_INIT(pmap); 1440 1441 /* 1442 * No need to allocate page table space yet but we do need a valid 1443 * page directory table. 1444 */ 1445 if (pmap->pm_pdir == NULL) { 1446 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1447 NBPTD); 1448 1449 if (pmap->pm_pdir == NULL) { 1450 PMAP_LOCK_DESTROY(pmap); 1451 return (0); 1452 } 1453#ifdef PAE 1454 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO); 1455 KASSERT(((vm_offset_t)pmap->pm_pdpt & 1456 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0, 1457 ("pmap_pinit: pdpt misaligned")); 1458 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30), 1459 ("pmap_pinit: pdpt above 4g")); 1460#endif 1461 pmap->pm_root = NULL; 1462 } 1463 KASSERT(pmap->pm_root == NULL, 1464 ("pmap_pinit: pmap has reserved page table page(s)")); 1465 1466 /* 1467 * allocate the page directory page(s) 1468 */ 1469 for (i = 0; i < NPGPTD;) { 1470 m = vm_page_alloc(NULL, color++, 1471 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1472 VM_ALLOC_ZERO); 1473 if (m == NULL) 1474 VM_WAIT; 1475 else { 1476 ptdpg[i++] = m; 1477 } 1478 } 1479 1480 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1481 1482 for (i = 0; i < NPGPTD; i++) { 1483 if ((ptdpg[i]->flags & PG_ZERO) == 0) 1484 bzero(pmap->pm_pdir + (i * NPDEPG), PAGE_SIZE); 1485 } 1486 1487 mtx_lock_spin(&allpmaps_lock); 1488 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1489 mtx_unlock_spin(&allpmaps_lock); 1490 /* Wire in kernel global address entries. */ 1491 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1492 1493 /* install self-referential address mapping entry(s) */ 1494 for (i = 0; i < NPGPTD; i++) { 1495 pa = VM_PAGE_TO_PHYS(ptdpg[i]); 1496 pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M; 1497#ifdef PAE 1498 pmap->pm_pdpt[i] = pa | PG_V; 1499#endif 1500 } 1501 1502 pmap->pm_active = 0; 1503 TAILQ_INIT(&pmap->pm_pvchunk); 1504 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1505 1506 return (1); 1507} 1508 1509/* 1510 * this routine is called if the page table page is not 1511 * mapped correctly. 1512 */ 1513static vm_page_t 1514_pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags) 1515{ 1516 vm_paddr_t ptepa; 1517 vm_page_t m; 1518 1519 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1520 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1521 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1522 1523 /* 1524 * Allocate a page table page. 1525 */ 1526 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1527 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1528 if (flags & M_WAITOK) { 1529 PMAP_UNLOCK(pmap); 1530 vm_page_unlock_queues(); 1531 VM_WAIT; 1532 vm_page_lock_queues(); 1533 PMAP_LOCK(pmap); 1534 } 1535 1536 /* 1537 * Indicate the need to retry. While waiting, the page table 1538 * page may have been allocated. 1539 */ 1540 return (NULL); 1541 } 1542 if ((m->flags & PG_ZERO) == 0) 1543 pmap_zero_page(m); 1544 1545 /* 1546 * Map the pagetable page into the process address space, if 1547 * it isn't already there. 1548 */ 1549 1550 pmap->pm_stats.resident_count++; 1551 1552 ptepa = VM_PAGE_TO_PHYS(m); 1553 pmap->pm_pdir[ptepindex] = 1554 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M); 1555 1556 return m; 1557} 1558 1559static vm_page_t 1560pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags) 1561{ 1562 unsigned ptepindex; 1563 pd_entry_t ptepa; 1564 vm_page_t m; 1565 1566 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1567 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1568 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1569 1570 /* 1571 * Calculate pagetable page index 1572 */ 1573 ptepindex = va >> PDRSHIFT; 1574retry: 1575 /* 1576 * Get the page directory entry 1577 */ 1578 ptepa = pmap->pm_pdir[ptepindex]; 1579 1580 /* 1581 * This supports switching from a 4MB page to a 1582 * normal 4K page. 1583 */ 1584 if (ptepa & PG_PS) { 1585 (void)pmap_demote_pde(pmap, &pmap->pm_pdir[ptepindex], va); 1586 ptepa = pmap->pm_pdir[ptepindex]; 1587 } 1588 1589 /* 1590 * If the page table page is mapped, we just increment the 1591 * hold count, and activate it. 1592 */ 1593 if (ptepa) { 1594 m = PHYS_TO_VM_PAGE(ptepa & PG_FRAME); 1595 m->wire_count++; 1596 } else { 1597 /* 1598 * Here if the pte page isn't mapped, or if it has 1599 * been deallocated. 1600 */ 1601 m = _pmap_allocpte(pmap, ptepindex, flags); 1602 if (m == NULL && (flags & M_WAITOK)) 1603 goto retry; 1604 } 1605 return (m); 1606} 1607 1608 1609/*************************************************** 1610* Pmap allocation/deallocation routines. 1611 ***************************************************/ 1612 1613#ifdef SMP 1614/* 1615 * Deal with a SMP shootdown of other users of the pmap that we are 1616 * trying to dispose of. This can be a bit hairy. 1617 */ 1618static u_int *lazymask; 1619static u_int lazyptd; 1620static volatile u_int lazywait; 1621 1622void pmap_lazyfix_action(void); 1623 1624void 1625pmap_lazyfix_action(void) 1626{ 1627 u_int mymask = PCPU_GET(cpumask); 1628 1629#ifdef COUNT_IPIS 1630 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++; 1631#endif 1632 if (rcr3() == lazyptd) 1633 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1634 atomic_clear_int(lazymask, mymask); 1635 atomic_store_rel_int(&lazywait, 1); 1636} 1637 1638static void 1639pmap_lazyfix_self(u_int mymask) 1640{ 1641 1642 if (rcr3() == lazyptd) 1643 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1644 atomic_clear_int(lazymask, mymask); 1645} 1646 1647 1648static void 1649pmap_lazyfix(pmap_t pmap) 1650{ 1651 u_int mymask; 1652 u_int mask; 1653 u_int spins; 1654 1655 while ((mask = pmap->pm_active) != 0) { 1656 spins = 50000000; 1657 mask = mask & -mask; /* Find least significant set bit */ 1658 mtx_lock_spin(&smp_ipi_mtx); 1659#ifdef PAE 1660 lazyptd = vtophys(pmap->pm_pdpt); 1661#else 1662 lazyptd = vtophys(pmap->pm_pdir); 1663#endif 1664 mymask = PCPU_GET(cpumask); 1665 if (mask == mymask) { 1666 lazymask = &pmap->pm_active; 1667 pmap_lazyfix_self(mymask); 1668 } else { 1669 atomic_store_rel_int((u_int *)&lazymask, 1670 (u_int)&pmap->pm_active); 1671 atomic_store_rel_int(&lazywait, 0); 1672 ipi_selected(mask, IPI_LAZYPMAP); 1673 while (lazywait == 0) { 1674 ia32_pause(); 1675 if (--spins == 0) 1676 break; 1677 } 1678 } 1679 mtx_unlock_spin(&smp_ipi_mtx); 1680 if (spins == 0) 1681 printf("pmap_lazyfix: spun for 50000000\n"); 1682 } 1683} 1684 1685#else /* SMP */ 1686 1687/* 1688 * Cleaning up on uniprocessor is easy. For various reasons, we're 1689 * unlikely to have to even execute this code, including the fact 1690 * that the cleanup is deferred until the parent does a wait(2), which 1691 * means that another userland process has run. 1692 */ 1693static void 1694pmap_lazyfix(pmap_t pmap) 1695{ 1696 u_int cr3; 1697 1698 cr3 = vtophys(pmap->pm_pdir); 1699 if (cr3 == rcr3()) { 1700 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1701 pmap->pm_active &= ~(PCPU_GET(cpumask)); 1702 } 1703} 1704#endif /* SMP */ 1705 1706/* 1707 * Release any resources held by the given physical map. 1708 * Called when a pmap initialized by pmap_pinit is being released. 1709 * Should only be called if the map contains no valid mappings. 1710 */ 1711void 1712pmap_release(pmap_t pmap) 1713{ 1714 vm_page_t m, ptdpg[NPGPTD]; 1715 int i; 1716 1717 KASSERT(pmap->pm_stats.resident_count == 0, 1718 ("pmap_release: pmap resident count %ld != 0", 1719 pmap->pm_stats.resident_count)); 1720 KASSERT(pmap->pm_root == NULL, 1721 ("pmap_release: pmap has reserved page table page(s)")); 1722 1723 pmap_lazyfix(pmap); 1724 mtx_lock_spin(&allpmaps_lock); 1725 LIST_REMOVE(pmap, pm_list); 1726 mtx_unlock_spin(&allpmaps_lock); 1727 1728 for (i = 0; i < NPGPTD; i++) 1729 ptdpg[i] = PHYS_TO_VM_PAGE(pmap->pm_pdir[PTDPTDI + i] & 1730 PG_FRAME); 1731 1732 bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) * 1733 sizeof(*pmap->pm_pdir)); 1734 1735 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1736 1737 for (i = 0; i < NPGPTD; i++) { 1738 m = ptdpg[i]; 1739#ifdef PAE 1740 KASSERT(VM_PAGE_TO_PHYS(m) == (pmap->pm_pdpt[i] & PG_FRAME), 1741 ("pmap_release: got wrong ptd page")); 1742#endif 1743 m->wire_count--; 1744 atomic_subtract_int(&cnt.v_wire_count, 1); 1745 vm_page_free_zero(m); 1746 } 1747 PMAP_LOCK_DESTROY(pmap); 1748} 1749 1750static int 1751kvm_size(SYSCTL_HANDLER_ARGS) 1752{ 1753 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1754 1755 return sysctl_handle_long(oidp, &ksize, 0, req); 1756} 1757SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1758 0, 0, kvm_size, "IU", "Size of KVM"); 1759 1760static int 1761kvm_free(SYSCTL_HANDLER_ARGS) 1762{ 1763 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1764 1765 return sysctl_handle_long(oidp, &kfree, 0, req); 1766} 1767SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1768 0, 0, kvm_free, "IU", "Amount of KVM free"); 1769 1770/* 1771 * grow the number of kernel page table entries, if needed 1772 */ 1773void 1774pmap_growkernel(vm_offset_t addr) 1775{ 1776 struct pmap *pmap; 1777 vm_paddr_t ptppaddr; 1778 vm_page_t nkpg; 1779 pd_entry_t newpdir; 1780 pt_entry_t *pde; 1781 1782 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1783 if (kernel_vm_end == 0) { 1784 kernel_vm_end = KERNBASE; 1785 nkpt = 0; 1786 while (pdir_pde(PTD, kernel_vm_end)) { 1787 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1788 nkpt++; 1789 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1790 kernel_vm_end = kernel_map->max_offset; 1791 break; 1792 } 1793 } 1794 } 1795 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1796 if (addr - 1 >= kernel_map->max_offset) 1797 addr = kernel_map->max_offset; 1798 while (kernel_vm_end < addr) { 1799 if (pdir_pde(PTD, kernel_vm_end)) { 1800 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1801 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1802 kernel_vm_end = kernel_map->max_offset; 1803 break; 1804 } 1805 continue; 1806 } 1807 1808 nkpg = vm_page_alloc(NULL, kernel_vm_end >> PDRSHIFT, 1809 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1810 if (nkpg == NULL) 1811 panic("pmap_growkernel: no memory to grow kernel"); 1812 1813 nkpt++; 1814 1815 pmap_zero_page(nkpg); 1816 ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1817 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1818 pdir_pde(PTD, kernel_vm_end) = newpdir; 1819 1820 mtx_lock_spin(&allpmaps_lock); 1821 LIST_FOREACH(pmap, &allpmaps, pm_list) { 1822 pde = pmap_pde(pmap, kernel_vm_end); 1823 pde_store(pde, newpdir); 1824 } 1825 mtx_unlock_spin(&allpmaps_lock); 1826 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1827 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1828 kernel_vm_end = kernel_map->max_offset; 1829 break; 1830 } 1831 } 1832} 1833 1834 1835/*************************************************** 1836 * page management routines. 1837 ***************************************************/ 1838 1839CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE); 1840CTASSERT(_NPCM == 11); 1841 1842static __inline struct pv_chunk * 1843pv_to_chunk(pv_entry_t pv) 1844{ 1845 1846 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK); 1847} 1848 1849#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap) 1850 1851#define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */ 1852#define PC_FREE10 0x0000fffful /* Free values for index 10 */ 1853 1854static uint32_t pc_freemask[11] = { 1855 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1856 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1857 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1858 PC_FREE0_9, PC_FREE10 1859}; 1860 1861SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0, 1862 "Current number of pv entries"); 1863 1864#ifdef PV_STATS 1865static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail; 1866 1867SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0, 1868 "Current number of pv entry chunks"); 1869SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0, 1870 "Current number of pv entry chunks allocated"); 1871SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0, 1872 "Current number of pv entry chunks frees"); 1873SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0, 1874 "Number of times tried to get a chunk page but failed."); 1875 1876static long pv_entry_frees, pv_entry_allocs; 1877static int pv_entry_spare; 1878 1879SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0, 1880 "Current number of pv entry frees"); 1881SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0, 1882 "Current number of pv entry allocs"); 1883SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0, 1884 "Current number of spare pv entries"); 1885 1886static int pmap_collect_inactive, pmap_collect_active; 1887 1888SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0, 1889 "Current number times pmap_collect called on inactive queue"); 1890SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0, 1891 "Current number times pmap_collect called on active queue"); 1892#endif 1893 1894/* 1895 * We are in a serious low memory condition. Resort to 1896 * drastic measures to free some pages so we can allocate 1897 * another pv entry chunk. This is normally called to 1898 * unmap inactive pages, and if necessary, active pages. 1899 */ 1900static void 1901pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq) 1902{ 1903 struct md_page *pvh; 1904 pd_entry_t *pde; 1905 pmap_t pmap; 1906 pt_entry_t *pte, tpte; 1907 pv_entry_t next_pv, pv; 1908 vm_offset_t va; 1909 vm_page_t m, free; 1910 1911 sched_pin(); 1912 TAILQ_FOREACH(m, &vpq->pl, pageq) { 1913 if (m->hold_count || m->busy) 1914 continue; 1915 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) { 1916 va = pv->pv_va; 1917 pmap = PV_PMAP(pv); 1918 /* Avoid deadlock and lock recursion. */ 1919 if (pmap > locked_pmap) 1920 PMAP_LOCK(pmap); 1921 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) 1922 continue; 1923 pmap->pm_stats.resident_count--; 1924 pde = pmap_pde(pmap, va); 1925 KASSERT((*pde & PG_PS) == 0, ("pmap_collect: found" 1926 " a 4mpage in page %p's pv list", m)); 1927 pte = pmap_pte_quick(pmap, va); 1928 tpte = pte_load_clear(pte); 1929 KASSERT((tpte & PG_W) == 0, 1930 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte)); 1931 if (tpte & PG_A) 1932 vm_page_flag_set(m, PG_REFERENCED); 1933 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) 1934 vm_page_dirty(m); 1935 free = NULL; 1936 pmap_unuse_pt(pmap, va, &free); 1937 pmap_invalidate_page(pmap, va); 1938 pmap_free_zero_pages(free); 1939 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1940 if (TAILQ_EMPTY(&m->md.pv_list)) { 1941 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 1942 if (TAILQ_EMPTY(&pvh->pv_list)) 1943 vm_page_flag_clear(m, PG_WRITEABLE); 1944 } 1945 free_pv_entry(pmap, pv); 1946 if (pmap != locked_pmap) 1947 PMAP_UNLOCK(pmap); 1948 } 1949 } 1950 sched_unpin(); 1951} 1952 1953 1954/* 1955 * free the pv_entry back to the free list 1956 */ 1957static void 1958free_pv_entry(pmap_t pmap, pv_entry_t pv) 1959{ 1960 vm_page_t m; 1961 struct pv_chunk *pc; 1962 int idx, field, bit; 1963 1964 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1965 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1966 PV_STAT(pv_entry_frees++); 1967 PV_STAT(pv_entry_spare++); 1968 pv_entry_count--; 1969 pc = pv_to_chunk(pv); 1970 idx = pv - &pc->pc_pventry[0]; 1971 field = idx / 32; 1972 bit = idx % 32; 1973 pc->pc_map[field] |= 1ul << bit; 1974 /* move to head of list */ 1975 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 1976 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 1977 for (idx = 0; idx < _NPCM; idx++) 1978 if (pc->pc_map[idx] != pc_freemask[idx]) 1979 return; 1980 PV_STAT(pv_entry_spare -= _NPCPV); 1981 PV_STAT(pc_chunk_count--); 1982 PV_STAT(pc_chunk_frees++); 1983 /* entire chunk is free, return it */ 1984 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 1985 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 1986 pmap_qremove((vm_offset_t)pc, 1); 1987 vm_page_unwire(m, 0); 1988 vm_page_free(m); 1989 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 1990} 1991 1992/* 1993 * get a new pv_entry, allocating a block from the system 1994 * when needed. 1995 */ 1996static pv_entry_t 1997get_pv_entry(pmap_t pmap, int try) 1998{ 1999 static const struct timeval printinterval = { 60, 0 }; 2000 static struct timeval lastprint; 2001 static vm_pindex_t colour; 2002 struct vpgqueues *pq; 2003 int bit, field; 2004 pv_entry_t pv; 2005 struct pv_chunk *pc; 2006 vm_page_t m; 2007 2008 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2009 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2010 PV_STAT(pv_entry_allocs++); 2011 pv_entry_count++; 2012 if (pv_entry_count > pv_entry_high_water) 2013 if (ratecheck(&lastprint, &printinterval)) 2014 printf("Approaching the limit on PV entries, consider " 2015 "increasing either the vm.pmap.shpgperproc or the " 2016 "vm.pmap.pv_entry_max tunable.\n"); 2017 pq = NULL; 2018retry: 2019 pc = TAILQ_FIRST(&pmap->pm_pvchunk); 2020 if (pc != NULL) { 2021 for (field = 0; field < _NPCM; field++) { 2022 if (pc->pc_map[field]) { 2023 bit = bsfl(pc->pc_map[field]); 2024 break; 2025 } 2026 } 2027 if (field < _NPCM) { 2028 pv = &pc->pc_pventry[field * 32 + bit]; 2029 pc->pc_map[field] &= ~(1ul << bit); 2030 /* If this was the last item, move it to tail */ 2031 for (field = 0; field < _NPCM; field++) 2032 if (pc->pc_map[field] != 0) { 2033 PV_STAT(pv_entry_spare--); 2034 return (pv); /* not full, return */ 2035 } 2036 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2037 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); 2038 PV_STAT(pv_entry_spare--); 2039 return (pv); 2040 } 2041 } 2042 /* 2043 * Access to the ptelist "pv_vafree" is synchronized by the page 2044 * queues lock. If "pv_vafree" is currently non-empty, it will 2045 * remain non-empty until pmap_ptelist_alloc() completes. 2046 */ 2047 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq == 2048 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) | 2049 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) { 2050 if (try) { 2051 pv_entry_count--; 2052 PV_STAT(pc_chunk_tryfail++); 2053 return (NULL); 2054 } 2055 /* 2056 * Reclaim pv entries: At first, destroy mappings to 2057 * inactive pages. After that, if a pv chunk entry 2058 * is still needed, destroy mappings to active pages. 2059 */ 2060 if (pq == NULL) { 2061 PV_STAT(pmap_collect_inactive++); 2062 pq = &vm_page_queues[PQ_INACTIVE]; 2063 } else if (pq == &vm_page_queues[PQ_INACTIVE]) { 2064 PV_STAT(pmap_collect_active++); 2065 pq = &vm_page_queues[PQ_ACTIVE]; 2066 } else 2067 panic("get_pv_entry: increase vm.pmap.shpgperproc"); 2068 pmap_collect(pmap, pq); 2069 goto retry; 2070 } 2071 PV_STAT(pc_chunk_count++); 2072 PV_STAT(pc_chunk_allocs++); 2073 colour++; 2074 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 2075 pmap_qenter((vm_offset_t)pc, &m, 1); 2076 pc->pc_pmap = pmap; 2077 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */ 2078 for (field = 1; field < _NPCM; field++) 2079 pc->pc_map[field] = pc_freemask[field]; 2080 pv = &pc->pc_pventry[0]; 2081 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2082 PV_STAT(pv_entry_spare += _NPCPV - 1); 2083 return (pv); 2084} 2085 2086static __inline pv_entry_t 2087pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va) 2088{ 2089 pv_entry_t pv; 2090 2091 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2092 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) { 2093 if (pmap == PV_PMAP(pv) && va == pv->pv_va) { 2094 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list); 2095 break; 2096 } 2097 } 2098 return (pv); 2099} 2100 2101static void 2102pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa) 2103{ 2104 struct md_page *pvh; 2105 pv_entry_t pv; 2106 vm_offset_t va_last; 2107 vm_page_t m; 2108 2109 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2110 KASSERT((pa & PDRMASK) == 0, 2111 ("pmap_pv_demote_pde: pa is not 4mpage aligned")); 2112 2113 /* 2114 * Transfer the 4mpage's pv entry for this mapping to the first 2115 * page's pv list. 2116 */ 2117 pvh = pa_to_pvh(pa); 2118 va = trunc_4mpage(va); 2119 pv = pmap_pvh_remove(pvh, pmap, va); 2120 KASSERT(pv != NULL, ("pmap_pv_demote_pde: pv not found")); 2121 m = PHYS_TO_VM_PAGE(pa); 2122 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2123 /* Instantiate the remaining NPTEPG - 1 pv entries. */ 2124 va_last = va + NBPDR - PAGE_SIZE; 2125 do { 2126 m++; 2127 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0, 2128 ("pmap_pv_demote_pde: page %p is not managed", m)); 2129 va += PAGE_SIZE; 2130 pmap_insert_entry(pmap, va, m); 2131 } while (va < va_last); 2132} 2133 2134static void 2135pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa) 2136{ 2137 struct md_page *pvh; 2138 pv_entry_t pv; 2139 vm_offset_t va_last; 2140 vm_page_t m; 2141 2142 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2143 KASSERT((pa & PDRMASK) == 0, 2144 ("pmap_pv_promote_pde: pa is not 4mpage aligned")); 2145 2146 /* 2147 * Transfer the first page's pv entry for this mapping to the 2148 * 4mpage's pv list. Aside from avoiding the cost of a call 2149 * to get_pv_entry(), a transfer avoids the possibility that 2150 * get_pv_entry() calls pmap_collect() and that pmap_collect() 2151 * removes one of the mappings that is being promoted. 2152 */ 2153 m = PHYS_TO_VM_PAGE(pa); 2154 va = trunc_4mpage(va); 2155 pv = pmap_pvh_remove(&m->md, pmap, va); 2156 KASSERT(pv != NULL, ("pmap_pv_promote_pde: pv not found")); 2157 pvh = pa_to_pvh(pa); 2158 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list); 2159 /* Free the remaining NPTEPG - 1 pv entries. */ 2160 va_last = va + NBPDR - PAGE_SIZE; 2161 do { 2162 m++; 2163 va += PAGE_SIZE; 2164 pmap_pvh_free(&m->md, pmap, va); 2165 } while (va < va_last); 2166} 2167 2168static void 2169pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va) 2170{ 2171 pv_entry_t pv; 2172 2173 pv = pmap_pvh_remove(pvh, pmap, va); 2174 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found")); 2175 free_pv_entry(pmap, pv); 2176} 2177 2178static void 2179pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 2180{ 2181 struct md_page *pvh; 2182 2183 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2184 pmap_pvh_free(&m->md, pmap, va); 2185 if (TAILQ_EMPTY(&m->md.pv_list)) { 2186 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 2187 if (TAILQ_EMPTY(&pvh->pv_list)) 2188 vm_page_flag_clear(m, PG_WRITEABLE); 2189 } 2190} 2191 2192/* 2193 * Create a pv entry for page at pa for 2194 * (pmap, va). 2195 */ 2196static void 2197pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2198{ 2199 pv_entry_t pv; 2200 2201 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2202 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2203 pv = get_pv_entry(pmap, FALSE); 2204 pv->pv_va = va; 2205 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2206} 2207 2208/* 2209 * Conditionally create a pv entry. 2210 */ 2211static boolean_t 2212pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2213{ 2214 pv_entry_t pv; 2215 2216 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2217 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2218 if (pv_entry_count < pv_entry_high_water && 2219 (pv = get_pv_entry(pmap, TRUE)) != NULL) { 2220 pv->pv_va = va; 2221 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2222 return (TRUE); 2223 } else 2224 return (FALSE); 2225} 2226 2227/* 2228 * Create the pv entries for each of the pages within a superpage. 2229 */ 2230static boolean_t 2231pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa) 2232{ 2233 struct md_page *pvh; 2234 pv_entry_t pv; 2235 2236 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2237 if (pv_entry_count < pv_entry_high_water && 2238 (pv = get_pv_entry(pmap, TRUE)) != NULL) { 2239 pv->pv_va = va; 2240 pvh = pa_to_pvh(pa); 2241 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list); 2242 return (TRUE); 2243 } else 2244 return (FALSE); 2245} 2246 2247/* 2248 * Tries to demote a 2- or 4MB page mapping. 2249 */ 2250static boolean_t 2251pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va) 2252{ 2253 pd_entry_t newpde, oldpde; 2254 pmap_t allpmaps_entry; 2255 pt_entry_t *firstpte, newpte, *pte; 2256 vm_paddr_t mptepa; 2257 vm_page_t free, mpte; 2258 2259 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2260 mpte = pmap_lookup_pt_page(pmap, va); 2261 if (mpte != NULL) 2262 pmap_remove_pt_page(pmap, mpte); 2263 else { 2264 KASSERT((*pde & PG_W) == 0, 2265 ("pmap_demote_pde: page table page for a wired mapping" 2266 " is missing")); 2267 free = NULL; 2268 pmap_remove_pde(pmap, pde, trunc_4mpage(va), &free); 2269 pmap_invalidate_page(pmap, trunc_4mpage(va)); 2270 pmap_free_zero_pages(free); 2271 CTR2(KTR_PMAP, "pmap_demote_pde: failure for va %#x" 2272 " in pmap %p", va, pmap); 2273 return (FALSE); 2274 } 2275 mptepa = VM_PAGE_TO_PHYS(mpte); 2276 2277 /* 2278 * Temporarily map the page table page (mpte) into the kernel's 2279 * address space at either PADDR1 or PADDR2. 2280 */ 2281 if (curthread->td_pinned > 0 && mtx_owned(&vm_page_queue_mtx)) { 2282 if ((*PMAP1 & PG_FRAME) != mptepa) { 2283 *PMAP1 = mptepa | PG_RW | PG_V | PG_A | PG_M; 2284#ifdef SMP 2285 PMAP1cpu = PCPU_GET(cpuid); 2286#endif 2287 invlcaddr(PADDR1); 2288 PMAP1changed++; 2289 } else 2290#ifdef SMP 2291 if (PMAP1cpu != PCPU_GET(cpuid)) { 2292 PMAP1cpu = PCPU_GET(cpuid); 2293 invlcaddr(PADDR1); 2294 PMAP1changedcpu++; 2295 } else 2296#endif 2297 PMAP1unchanged++; 2298 firstpte = PADDR1; 2299 } else { 2300 mtx_lock(&PMAP2mutex); 2301 if ((*PMAP2 & PG_FRAME) != mptepa) { 2302 *PMAP2 = mptepa | PG_RW | PG_V | PG_A | PG_M; 2303 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2); 2304 } 2305 firstpte = PADDR2; 2306 } 2307 oldpde = *pde; 2308 newpde = mptepa | PG_M | PG_A | (oldpde & PG_U) | PG_RW | PG_V; 2309 KASSERT((oldpde & (PG_A | PG_V)) == (PG_A | PG_V), 2310 ("pmap_demote_pde: oldpde is missing PG_A and/or PG_V")); 2311 KASSERT((oldpde & (PG_M | PG_RW)) != PG_RW, 2312 ("pmap_demote_pde: oldpde is missing PG_M")); 2313 KASSERT((oldpde & PG_PS) != 0, 2314 ("pmap_demote_pde: oldpde is missing PG_PS")); 2315 newpte = oldpde & ~PG_PS; 2316 if ((newpte & PG_PDE_PAT) != 0) 2317 newpte ^= PG_PDE_PAT | PG_PTE_PAT; 2318 2319 /* 2320 * If the mapping has changed attributes, update the page table 2321 * entries. 2322 */ 2323 KASSERT((*firstpte & PG_FRAME) == (newpte & PG_FRAME), 2324 ("pmap_demote_pde: firstpte and newpte map different physical" 2325 " addresses")); 2326 if ((*firstpte & PG_PTE_PROMOTE) != (newpte & PG_PTE_PROMOTE)) 2327 for (pte = firstpte; pte < firstpte + NPTEPG; pte++) { 2328 *pte = newpte; 2329 newpte += PAGE_SIZE; 2330 } 2331 2332 /* 2333 * Demote the mapping. This pmap is locked. The old PDE has 2334 * PG_A set. If the old PDE has PG_RW set, it also has PG_M 2335 * set. Thus, there is no danger of a race with another 2336 * processor changing the setting of PG_A and/or PG_M between 2337 * the read above and the store below. 2338 */ 2339 if (pmap == kernel_pmap) { 2340 /* 2341 * A harmless race exists between this loop and the bcopy() 2342 * in pmap_pinit() that initializes the kernel segment of 2343 * the new page table. Specifically, that bcopy() may copy 2344 * the new PDE from the PTD, which is first in allpmaps, to 2345 * the new page table before this loop updates that new 2346 * page table. 2347 */ 2348 mtx_lock_spin(&allpmaps_lock); 2349 LIST_FOREACH(allpmaps_entry, &allpmaps, pm_list) { 2350 pde = pmap_pde(allpmaps_entry, va); 2351 KASSERT(*pde == newpde || (*pde & PG_PTE_PROMOTE) == 2352 (oldpde & PG_PTE_PROMOTE), 2353 ("pmap_demote_pde: pde was %#jx, expected %#jx", 2354 (uintmax_t)*pde, (uintmax_t)oldpde)); 2355 pde_store(pde, newpde); 2356 } 2357 mtx_unlock_spin(&allpmaps_lock); 2358 } else 2359 pde_store(pde, newpde); 2360 if (firstpte == PADDR2) 2361 mtx_unlock(&PMAP2mutex); 2362 2363 /* 2364 * Invalidate the recursive mapping of the page table page. 2365 */ 2366 pmap_invalidate_page(pmap, (vm_offset_t)vtopte(va)); 2367 2368 /* 2369 * Demote the pv entry. This depends on the earlier demotion 2370 * of the mapping. Specifically, the (re)creation of a per- 2371 * page pv entry might trigger the execution of pmap_collect(), 2372 * which might reclaim a newly (re)created per-page pv entry 2373 * and destroy the associated mapping. In order to destroy 2374 * the mapping, the PDE must have already changed from mapping 2375 * the 2mpage to referencing the page table page. 2376 */ 2377 if ((oldpde & PG_MANAGED) != 0) 2378 pmap_pv_demote_pde(pmap, va, oldpde & PG_FRAME); 2379 2380 pmap_pde_demotions++; 2381 CTR2(KTR_PMAP, "pmap_demote_pde: success for va %#x" 2382 " in pmap %p", va, pmap); 2383 return (TRUE); 2384} 2385 2386/* 2387 * pmap_remove_pde: do the things to unmap a superpage in a process 2388 */ 2389static void 2390pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva, 2391 vm_page_t *free) 2392{ 2393 struct md_page *pvh; 2394 pd_entry_t oldpde; 2395 vm_offset_t eva, va; 2396 vm_page_t m, mpte; 2397 2398 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2399 KASSERT((sva & PDRMASK) == 0, 2400 ("pmap_remove_pde: sva is not 4mpage aligned")); 2401 oldpde = pte_load_clear(pdq); 2402 if (oldpde & PG_W) 2403 pmap->pm_stats.wired_count -= NBPDR / PAGE_SIZE; 2404 2405 /* 2406 * Machines that don't support invlpg, also don't support 2407 * PG_G. 2408 */ 2409 if (oldpde & PG_G) 2410 pmap_invalidate_page(kernel_pmap, sva); 2411 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 2412 if (oldpde & PG_MANAGED) { 2413 pvh = pa_to_pvh(oldpde & PG_FRAME); 2414 pmap_pvh_free(pvh, pmap, sva); 2415 eva = sva + NBPDR; 2416 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_FRAME); 2417 va < eva; va += PAGE_SIZE, m++) { 2418 if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW)) 2419 vm_page_dirty(m); 2420 if (oldpde & PG_A) 2421 vm_page_flag_set(m, PG_REFERENCED); 2422 if (TAILQ_EMPTY(&m->md.pv_list) && 2423 TAILQ_EMPTY(&pvh->pv_list)) 2424 vm_page_flag_clear(m, PG_WRITEABLE); 2425 } 2426 } 2427 if (pmap == kernel_pmap) { 2428 if (!pmap_demote_pde(pmap, pdq, sva)) 2429 panic("pmap_remove_pde: failed demotion"); 2430 } else { 2431 mpte = pmap_lookup_pt_page(pmap, sva); 2432 if (mpte != NULL) { 2433 pmap_remove_pt_page(pmap, mpte); 2434 KASSERT(mpte->wire_count == NPTEPG, 2435 ("pmap_remove_pde: pte page wire count error")); 2436 mpte->wire_count = 0; 2437 pmap_add_delayed_free_list(mpte, free, FALSE); 2438 atomic_subtract_int(&cnt.v_wire_count, 1); 2439 } 2440 } 2441} 2442 2443/* 2444 * pmap_remove_pte: do the things to unmap a page in a process 2445 */ 2446static int 2447pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free) 2448{ 2449 pt_entry_t oldpte; 2450 vm_page_t m; 2451 2452 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2453 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2454 oldpte = pte_load_clear(ptq); 2455 if (oldpte & PG_W) 2456 pmap->pm_stats.wired_count -= 1; 2457 /* 2458 * Machines that don't support invlpg, also don't support 2459 * PG_G. 2460 */ 2461 if (oldpte & PG_G) 2462 pmap_invalidate_page(kernel_pmap, va); 2463 pmap->pm_stats.resident_count -= 1; 2464 if (oldpte & PG_MANAGED) { 2465 m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME); 2466 if ((oldpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) 2467 vm_page_dirty(m); 2468 if (oldpte & PG_A) 2469 vm_page_flag_set(m, PG_REFERENCED); 2470 pmap_remove_entry(pmap, m, va); 2471 } 2472 return (pmap_unuse_pt(pmap, va, free)); 2473} 2474 2475/* 2476 * Remove a single page from a process address space 2477 */ 2478static void 2479pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free) 2480{ 2481 pt_entry_t *pte; 2482 2483 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2484 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 2485 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2486 if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0) 2487 return; 2488 pmap_remove_pte(pmap, pte, va, free); 2489 pmap_invalidate_page(pmap, va); 2490} 2491 2492/* 2493 * Remove the given range of addresses from the specified map. 2494 * 2495 * It is assumed that the start and end are properly 2496 * rounded to the page size. 2497 */ 2498void 2499pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 2500{ 2501 vm_offset_t pdnxt; 2502 pd_entry_t ptpaddr; 2503 pt_entry_t *pte; 2504 vm_page_t free = NULL; 2505 int anyvalid; 2506 2507 /* 2508 * Perform an unsynchronized read. This is, however, safe. 2509 */ 2510 if (pmap->pm_stats.resident_count == 0) 2511 return; 2512 2513 anyvalid = 0; 2514 2515 vm_page_lock_queues(); 2516 sched_pin(); 2517 PMAP_LOCK(pmap); 2518 2519 /* 2520 * special handling of removing one page. a very 2521 * common operation and easy to short circuit some 2522 * code. 2523 */ 2524 if ((sva + PAGE_SIZE == eva) && 2525 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 2526 pmap_remove_page(pmap, sva, &free); 2527 goto out; 2528 } 2529 2530 for (; sva < eva; sva = pdnxt) { 2531 unsigned pdirindex; 2532 2533 /* 2534 * Calculate index for next page table. 2535 */ 2536 pdnxt = (sva + NBPDR) & ~PDRMASK; 2537 if (pdnxt < sva) 2538 pdnxt = eva; 2539 if (pmap->pm_stats.resident_count == 0) 2540 break; 2541 2542 pdirindex = sva >> PDRSHIFT; 2543 ptpaddr = pmap->pm_pdir[pdirindex]; 2544 2545 /* 2546 * Weed out invalid mappings. Note: we assume that the page 2547 * directory table is always allocated, and in kernel virtual. 2548 */ 2549 if (ptpaddr == 0) 2550 continue; 2551 2552 /* 2553 * Check for large page. 2554 */ 2555 if ((ptpaddr & PG_PS) != 0) { 2556 /* 2557 * Are we removing the entire large page? If not, 2558 * demote the mapping and fall through. 2559 */ 2560 if (sva + NBPDR == pdnxt && eva >= pdnxt) { 2561 /* 2562 * The TLB entry for a PG_G mapping is 2563 * invalidated by pmap_remove_pde(). 2564 */ 2565 if ((ptpaddr & PG_G) == 0) 2566 anyvalid = 1; 2567 pmap_remove_pde(pmap, 2568 &pmap->pm_pdir[pdirindex], sva, &free); 2569 continue; 2570 } else if (!pmap_demote_pde(pmap, 2571 &pmap->pm_pdir[pdirindex], sva)) { 2572 /* The large page mapping was destroyed. */ 2573 continue; 2574 } 2575 } 2576 2577 /* 2578 * Limit our scan to either the end of the va represented 2579 * by the current page table page, or to the end of the 2580 * range being removed. 2581 */ 2582 if (pdnxt > eva) 2583 pdnxt = eva; 2584 2585 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2586 sva += PAGE_SIZE) { 2587 if (*pte == 0) 2588 continue; 2589 2590 /* 2591 * The TLB entry for a PG_G mapping is invalidated 2592 * by pmap_remove_pte(). 2593 */ 2594 if ((*pte & PG_G) == 0) 2595 anyvalid = 1; 2596 if (pmap_remove_pte(pmap, pte, sva, &free)) 2597 break; 2598 } 2599 } 2600out: 2601 sched_unpin(); 2602 if (anyvalid) 2603 pmap_invalidate_all(pmap); 2604 vm_page_unlock_queues(); 2605 PMAP_UNLOCK(pmap); 2606 pmap_free_zero_pages(free); 2607} 2608 2609/* 2610 * Routine: pmap_remove_all 2611 * Function: 2612 * Removes this physical page from 2613 * all physical maps in which it resides. 2614 * Reflects back modify bits to the pager. 2615 * 2616 * Notes: 2617 * Original versions of this routine were very 2618 * inefficient because they iteratively called 2619 * pmap_remove (slow...) 2620 */ 2621 2622void 2623pmap_remove_all(vm_page_t m) 2624{ 2625 struct md_page *pvh; 2626 pv_entry_t pv; 2627 pmap_t pmap; 2628 pt_entry_t *pte, tpte; 2629 pd_entry_t *pde; 2630 vm_offset_t va; 2631 vm_page_t free; 2632 2633 KASSERT((m->flags & PG_FICTITIOUS) == 0, 2634 ("pmap_remove_all: page %p is fictitious", m)); 2635 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2636 sched_pin(); 2637 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 2638 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) { 2639 va = pv->pv_va; 2640 pmap = PV_PMAP(pv); 2641 PMAP_LOCK(pmap); 2642 pde = pmap_pde(pmap, va); 2643 (void)pmap_demote_pde(pmap, pde, va); 2644 PMAP_UNLOCK(pmap); 2645 } 2646 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2647 pmap = PV_PMAP(pv); 2648 PMAP_LOCK(pmap); 2649 pmap->pm_stats.resident_count--; 2650 pde = pmap_pde(pmap, pv->pv_va); 2651 KASSERT((*pde & PG_PS) == 0, ("pmap_remove_all: found" 2652 " a 4mpage in page %p's pv list", m)); 2653 pte = pmap_pte_quick(pmap, pv->pv_va); 2654 tpte = pte_load_clear(pte); 2655 if (tpte & PG_W) 2656 pmap->pm_stats.wired_count--; 2657 if (tpte & PG_A) 2658 vm_page_flag_set(m, PG_REFERENCED); 2659 2660 /* 2661 * Update the vm_page_t clean and reference bits. 2662 */ 2663 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) 2664 vm_page_dirty(m); 2665 free = NULL; 2666 pmap_unuse_pt(pmap, pv->pv_va, &free); 2667 pmap_invalidate_page(pmap, pv->pv_va); 2668 pmap_free_zero_pages(free); 2669 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2670 free_pv_entry(pmap, pv); 2671 PMAP_UNLOCK(pmap); 2672 } 2673 vm_page_flag_clear(m, PG_WRITEABLE); 2674 sched_unpin(); 2675} 2676 2677/* 2678 * pmap_protect_pde: do the things to protect a 4mpage in a process 2679 */ 2680static boolean_t 2681pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva, vm_prot_t prot) 2682{ 2683 pd_entry_t newpde, oldpde; 2684 vm_offset_t eva, va; 2685 vm_page_t m; 2686 boolean_t anychanged; 2687 2688 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2689 KASSERT((sva & PDRMASK) == 0, 2690 ("pmap_protect_pde: sva is not 4mpage aligned")); 2691 anychanged = FALSE; 2692retry: 2693 oldpde = newpde = *pde; 2694 if (oldpde & PG_MANAGED) { 2695 eva = sva + NBPDR; 2696 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_FRAME); 2697 va < eva; va += PAGE_SIZE, m++) { 2698 /* 2699 * In contrast to the analogous operation on a 4KB page 2700 * mapping, the mapping's PG_A flag is not cleared and 2701 * the page's PG_REFERENCED flag is not set. The 2702 * reason is that pmap_demote_pde() expects that a 2/4MB 2703 * page mapping with a stored page table page has PG_A 2704 * set. 2705 */ 2706 if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW)) 2707 vm_page_dirty(m); 2708 } 2709 } 2710 if ((prot & VM_PROT_WRITE) == 0) 2711 newpde &= ~(PG_RW | PG_M); 2712#ifdef PAE 2713 if ((prot & VM_PROT_EXECUTE) == 0) 2714 newpde |= pg_nx; 2715#endif 2716 if (newpde != oldpde) { 2717 if (!pde_cmpset(pde, oldpde, newpde)) 2718 goto retry; 2719 if (oldpde & PG_G) 2720 pmap_invalidate_page(pmap, sva); 2721 else 2722 anychanged = TRUE; 2723 } 2724 return (anychanged); 2725} 2726 2727/* 2728 * Set the physical protection on the 2729 * specified range of this map as requested. 2730 */ 2731void 2732pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 2733{ 2734 vm_offset_t pdnxt; 2735 pd_entry_t ptpaddr; 2736 pt_entry_t *pte; 2737 int anychanged; 2738 2739 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 2740 pmap_remove(pmap, sva, eva); 2741 return; 2742 } 2743 2744#ifdef PAE 2745 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) == 2746 (VM_PROT_WRITE|VM_PROT_EXECUTE)) 2747 return; 2748#else 2749 if (prot & VM_PROT_WRITE) 2750 return; 2751#endif 2752 2753 anychanged = 0; 2754 2755 vm_page_lock_queues(); 2756 sched_pin(); 2757 PMAP_LOCK(pmap); 2758 for (; sva < eva; sva = pdnxt) { 2759 pt_entry_t obits, pbits; 2760 unsigned pdirindex; 2761 2762 pdnxt = (sva + NBPDR) & ~PDRMASK; 2763 if (pdnxt < sva) 2764 pdnxt = eva; 2765 2766 pdirindex = sva >> PDRSHIFT; 2767 ptpaddr = pmap->pm_pdir[pdirindex]; 2768 2769 /* 2770 * Weed out invalid mappings. Note: we assume that the page 2771 * directory table is always allocated, and in kernel virtual. 2772 */ 2773 if (ptpaddr == 0) 2774 continue; 2775 2776 /* 2777 * Check for large page. 2778 */ 2779 if ((ptpaddr & PG_PS) != 0) { 2780 /* 2781 * Are we protecting the entire large page? If not, 2782 * demote the mapping and fall through. 2783 */ 2784 if (sva + NBPDR == pdnxt && eva >= pdnxt) { 2785 /* 2786 * The TLB entry for a PG_G mapping is 2787 * invalidated by pmap_protect_pde(). 2788 */ 2789 if (pmap_protect_pde(pmap, 2790 &pmap->pm_pdir[pdirindex], sva, prot)) 2791 anychanged = 1; 2792 continue; 2793 } else if (!pmap_demote_pde(pmap, 2794 &pmap->pm_pdir[pdirindex], sva)) { 2795 /* The large page mapping was destroyed. */ 2796 continue; 2797 } 2798 } 2799 2800 if (pdnxt > eva) 2801 pdnxt = eva; 2802 2803 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2804 sva += PAGE_SIZE) { 2805 vm_page_t m; 2806 2807retry: 2808 /* 2809 * Regardless of whether a pte is 32 or 64 bits in 2810 * size, PG_RW, PG_A, and PG_M are among the least 2811 * significant 32 bits. 2812 */ 2813 obits = pbits = *pte; 2814 if ((pbits & PG_V) == 0) 2815 continue; 2816 if (pbits & PG_MANAGED) { 2817 m = NULL; 2818 if (pbits & PG_A) { 2819 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME); 2820 vm_page_flag_set(m, PG_REFERENCED); 2821 pbits &= ~PG_A; 2822 } 2823 if ((pbits & (PG_M | PG_RW)) == (PG_M | PG_RW)) { 2824 if (m == NULL) 2825 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME); 2826 vm_page_dirty(m); 2827 } 2828 } 2829 2830 if ((prot & VM_PROT_WRITE) == 0) 2831 pbits &= ~(PG_RW | PG_M); 2832#ifdef PAE 2833 if ((prot & VM_PROT_EXECUTE) == 0) 2834 pbits |= pg_nx; 2835#endif 2836 2837 if (pbits != obits) { 2838#ifdef PAE 2839 if (!atomic_cmpset_64(pte, obits, pbits)) 2840 goto retry; 2841#else 2842 if (!atomic_cmpset_int((u_int *)pte, obits, 2843 pbits)) 2844 goto retry; 2845#endif 2846 if (obits & PG_G) 2847 pmap_invalidate_page(pmap, sva); 2848 else 2849 anychanged = 1; 2850 } 2851 } 2852 } 2853 sched_unpin(); 2854 if (anychanged) 2855 pmap_invalidate_all(pmap); 2856 vm_page_unlock_queues(); 2857 PMAP_UNLOCK(pmap); 2858} 2859 2860/* 2861 * Tries to promote the 512 or 1024, contiguous 4KB page mappings that are 2862 * within a single page table page to a single 2- or 4MB page mapping. For 2863 * promotion to occur, two conditions must be met: (1) the 4KB page mappings 2864 * must map aligned, contiguous physical memory and (2) the 4KB page mappings 2865 * must have identical characteristics. 2866 * 2867 * Managed (PG_MANAGED) mappings within the kernel address space are not 2868 * promoted. The reason is that kernel PDEs are replicated in each pmap but 2869 * pmap_clear_ptes() and pmap_ts_referenced() only read the PDE from the kernel 2870 * pmap. 2871 */ 2872static void 2873pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va) 2874{ 2875 pd_entry_t newpde; 2876 pmap_t allpmaps_entry; 2877 pt_entry_t *firstpte, oldpte, *pte; 2878 vm_offset_t oldpteva; 2879 vm_paddr_t pa; 2880 vm_page_t mpte; 2881 2882 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2883 firstpte = vtopte(trunc_4mpage(va)); 2884 KASSERT((*firstpte & PG_V) != 0, 2885 ("pmap_promote_pde: firstpte is missing PG_V")); 2886 if ((*firstpte & PG_A) == 0) { 2887 pmap_pde_p_failures++; 2888 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x" 2889 " in pmap %p", va, pmap); 2890 return; 2891 } 2892 if ((*firstpte & PG_MANAGED) != 0 && pmap == kernel_pmap) { 2893 pmap_pde_p_failures++; 2894 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x" 2895 " in pmap %p", va, pmap); 2896 return; 2897 } 2898 pa = *firstpte & PG_PS_FRAME; 2899 newpde = *firstpte; 2900 if ((newpde & (PG_M | PG_RW)) == PG_RW) 2901 newpde &= ~PG_RW; 2902 2903 /* 2904 * Check all the ptes before promotion 2905 */ 2906 for (pte = firstpte; pte < firstpte + NPTEPG; pte++) { 2907retry: 2908 oldpte = *pte; 2909 if ((oldpte & PG_FRAME) != pa) { 2910 pmap_pde_p_failures++; 2911 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x" 2912 " in pmap %p", va, pmap); 2913 return; 2914 } 2915 if ((oldpte & (PG_M | PG_RW)) == PG_RW) { 2916 /* 2917 * When PG_M is already clear, PG_RW can be cleared 2918 * without a TLB invalidation. 2919 */ 2920 if (!atomic_cmpset_int((u_int *)pte, oldpte, 2921 oldpte & ~PG_RW)) 2922 goto retry; 2923 oldpte &= ~PG_RW; 2924 oldpteva = (oldpte & PG_FRAME & PDRMASK) | 2925 (va & ~PDRMASK); 2926 CTR2(KTR_PMAP, "pmap_promote_pde: protect for va %#x" 2927 " in pmap %p", oldpteva, pmap); 2928 } 2929 if ((oldpte & PG_PTE_PROMOTE) != (newpde & PG_PTE_PROMOTE)) { 2930 pmap_pde_p_failures++; 2931 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x" 2932 " in pmap %p", va, pmap); 2933 return; 2934 } 2935 pa += PAGE_SIZE; 2936 } 2937 2938 /* 2939 * Save the page table page in its current state until the PDE 2940 * mapping the superpage is demoted by pmap_demote_pde() or 2941 * destroyed by pmap_remove_pde(). 2942 */ 2943 mpte = PHYS_TO_VM_PAGE(*pde & PG_FRAME); 2944 KASSERT(mpte >= vm_page_array && 2945 mpte < &vm_page_array[vm_page_array_size], 2946 ("pmap_promote_pde: page table page is out of range")); 2947 KASSERT(mpte->pindex == va >> PDRSHIFT, 2948 ("pmap_promote_pde: page table page's pindex is wrong")); 2949 pmap_insert_pt_page(pmap, mpte); 2950 2951 /* 2952 * Promote the pv entries. 2953 */ 2954 if ((newpde & PG_MANAGED) != 0) 2955 pmap_pv_promote_pde(pmap, va, newpde & PG_FRAME); 2956 2957 /* 2958 * Propagate the PAT index to its proper position. 2959 */ 2960 if ((newpde & PG_PTE_PAT) != 0) 2961 newpde ^= PG_PDE_PAT | PG_PTE_PAT; 2962 2963 /* 2964 * Map the superpage. 2965 */ 2966 if (pmap == kernel_pmap) { 2967 mtx_lock_spin(&allpmaps_lock); 2968 LIST_FOREACH(allpmaps_entry, &allpmaps, pm_list) { 2969 pde = pmap_pde(allpmaps_entry, va); 2970 pde_store(pde, PG_PS | newpde); 2971 } 2972 mtx_unlock_spin(&allpmaps_lock); 2973 } else 2974 pde_store(pde, PG_PS | newpde); 2975 2976 pmap_pde_promotions++; 2977 CTR2(KTR_PMAP, "pmap_promote_pde: success for va %#x" 2978 " in pmap %p", va, pmap); 2979} 2980 2981/* 2982 * Insert the given physical page (p) at 2983 * the specified virtual address (v) in the 2984 * target physical map with the protection requested. 2985 * 2986 * If specified, the page will be wired down, meaning 2987 * that the related pte can not be reclaimed. 2988 * 2989 * NB: This is the only routine which MAY NOT lazy-evaluate 2990 * or lose information. That is, this routine must actually 2991 * insert this page into the given map NOW. 2992 */ 2993void 2994pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m, 2995 vm_prot_t prot, boolean_t wired) 2996{ 2997 vm_paddr_t pa; 2998 pd_entry_t *pde; 2999 pt_entry_t *pte; 3000 vm_paddr_t opa; 3001 pt_entry_t origpte, newpte; 3002 vm_page_t mpte, om; 3003 boolean_t invlva; 3004 3005 va = trunc_page(va); 3006 KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig")); 3007 KASSERT(va < UPT_MIN_ADDRESS || va >= UPT_MAX_ADDRESS, 3008 ("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va)); 3009 3010 mpte = NULL; 3011 3012 vm_page_lock_queues(); 3013 PMAP_LOCK(pmap); 3014 sched_pin(); 3015 3016 /* 3017 * In the case that a page table page is not 3018 * resident, we are creating it here. 3019 */ 3020 if (va < VM_MAXUSER_ADDRESS) { 3021 mpte = pmap_allocpte(pmap, va, M_WAITOK); 3022 } 3023 3024 pde = pmap_pde(pmap, va); 3025 if ((*pde & PG_PS) != 0) 3026 panic("pmap_enter: attempted pmap_enter on 4MB page"); 3027 pte = pmap_pte_quick(pmap, va); 3028 3029 /* 3030 * Page Directory table entry not valid, we need a new PT page 3031 */ 3032 if (pte == NULL) { 3033 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x", 3034 (uintmax_t)pmap->pm_pdir[PTDPTDI], va); 3035 } 3036 3037 pa = VM_PAGE_TO_PHYS(m); 3038 om = NULL; 3039 origpte = *pte; 3040 opa = origpte & PG_FRAME; 3041 3042 /* 3043 * Mapping has not changed, must be protection or wiring change. 3044 */ 3045 if (origpte && (opa == pa)) { 3046 /* 3047 * Wiring change, just update stats. We don't worry about 3048 * wiring PT pages as they remain resident as long as there 3049 * are valid mappings in them. Hence, if a user page is wired, 3050 * the PT page will be also. 3051 */ 3052 if (wired && ((origpte & PG_W) == 0)) 3053 pmap->pm_stats.wired_count++; 3054 else if (!wired && (origpte & PG_W)) 3055 pmap->pm_stats.wired_count--; 3056 3057 /* 3058 * Remove extra pte reference 3059 */ 3060 if (mpte) 3061 mpte->wire_count--; 3062 3063 /* 3064 * We might be turning off write access to the page, 3065 * so we go ahead and sense modify status. 3066 */ 3067 if (origpte & PG_MANAGED) { 3068 om = m; 3069 pa |= PG_MANAGED; 3070 } 3071 goto validate; 3072 } 3073 /* 3074 * Mapping has changed, invalidate old range and fall through to 3075 * handle validating new mapping. 3076 */ 3077 if (opa) { 3078 if (origpte & PG_W) 3079 pmap->pm_stats.wired_count--; 3080 if (origpte & PG_MANAGED) { 3081 om = PHYS_TO_VM_PAGE(opa); 3082 pmap_remove_entry(pmap, om, va); 3083 } 3084 if (mpte != NULL) { 3085 mpte->wire_count--; 3086 KASSERT(mpte->wire_count > 0, 3087 ("pmap_enter: missing reference to page table page," 3088 " va: 0x%x", va)); 3089 } 3090 } else 3091 pmap->pm_stats.resident_count++; 3092 3093 /* 3094 * Enter on the PV list if part of our managed memory. 3095 */ 3096 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 3097 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva, 3098 ("pmap_enter: managed mapping within the clean submap")); 3099 pmap_insert_entry(pmap, va, m); 3100 pa |= PG_MANAGED; 3101 } 3102 3103 /* 3104 * Increment counters 3105 */ 3106 if (wired) 3107 pmap->pm_stats.wired_count++; 3108 3109validate: 3110 /* 3111 * Now validate mapping with desired protection/wiring. 3112 */ 3113 newpte = (pt_entry_t)(pa | PG_V); 3114 if ((prot & VM_PROT_WRITE) != 0) { 3115 newpte |= PG_RW; 3116 vm_page_flag_set(m, PG_WRITEABLE); 3117 } 3118#ifdef PAE 3119 if ((prot & VM_PROT_EXECUTE) == 0) 3120 newpte |= pg_nx; 3121#endif 3122 if (wired) 3123 newpte |= PG_W; 3124 if (va < VM_MAXUSER_ADDRESS) 3125 newpte |= PG_U; 3126 if (pmap == kernel_pmap) 3127 newpte |= pgeflag; 3128 3129 /* 3130 * if the mapping or permission bits are different, we need 3131 * to update the pte. 3132 */ 3133 if ((origpte & ~(PG_M|PG_A)) != newpte) { 3134 newpte |= PG_A; 3135 if ((access & VM_PROT_WRITE) != 0) 3136 newpte |= PG_M; 3137 if (origpte & PG_V) { 3138 invlva = FALSE; 3139 origpte = pte_load_store(pte, newpte); 3140 if (origpte & PG_A) { 3141 if (origpte & PG_MANAGED) 3142 vm_page_flag_set(om, PG_REFERENCED); 3143 if (opa != VM_PAGE_TO_PHYS(m)) 3144 invlva = TRUE; 3145#ifdef PAE 3146 if ((origpte & PG_NX) == 0 && 3147 (newpte & PG_NX) != 0) 3148 invlva = TRUE; 3149#endif 3150 } 3151 if ((origpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) { 3152 if ((origpte & PG_MANAGED) != 0) 3153 vm_page_dirty(om); 3154 if ((prot & VM_PROT_WRITE) == 0) 3155 invlva = TRUE; 3156 } 3157 if (invlva) 3158 pmap_invalidate_page(pmap, va); 3159 } else 3160 pte_store(pte, newpte); 3161 } 3162 3163 /* 3164 * If both the page table page and the reservation are fully 3165 * populated, then attempt promotion. 3166 */ 3167 if ((mpte == NULL || mpte->wire_count == NPTEPG) && 3168 pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0) 3169 pmap_promote_pde(pmap, pde, va); 3170 3171 sched_unpin(); 3172 vm_page_unlock_queues(); 3173 PMAP_UNLOCK(pmap); 3174} 3175 3176/* 3177 * Tries to create a 2- or 4MB page mapping. Returns TRUE if successful and 3178 * FALSE otherwise. Fails if (1) a page table page cannot be allocated without 3179 * blocking, (2) a mapping already exists at the specified virtual address, or 3180 * (3) a pv entry cannot be allocated without reclaiming another pv entry. 3181 */ 3182static boolean_t 3183pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 3184{ 3185 pd_entry_t *pde, newpde; 3186 3187 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3188 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 3189 pde = pmap_pde(pmap, va); 3190 if (*pde != 0) { 3191 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx" 3192 " in pmap %p", va, pmap); 3193 return (FALSE); 3194 } 3195 newpde = VM_PAGE_TO_PHYS(m) | PG_PS | PG_V; 3196 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 3197 newpde |= PG_MANAGED; 3198 3199 /* 3200 * Abort this mapping if its PV entry could not be created. 3201 */ 3202 if (!pmap_pv_insert_pde(pmap, va, VM_PAGE_TO_PHYS(m))) { 3203 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx" 3204 " in pmap %p", va, pmap); 3205 return (FALSE); 3206 } 3207 } 3208#ifdef PAE 3209 if ((prot & VM_PROT_EXECUTE) == 0) 3210 newpde |= pg_nx; 3211#endif 3212 if (va < VM_MAXUSER_ADDRESS) 3213 newpde |= PG_U; 3214 3215 /* 3216 * Increment counters. 3217 */ 3218 pmap->pm_stats.resident_count += NBPDR / PAGE_SIZE; 3219 3220 /* 3221 * Map the superpage. 3222 */ 3223 pde_store(pde, newpde); 3224 3225 pmap_pde_mappings++; 3226 CTR2(KTR_PMAP, "pmap_enter_pde: success for va %#lx" 3227 " in pmap %p", va, pmap); 3228 return (TRUE); 3229} 3230 3231/* 3232 * Maps a sequence of resident pages belonging to the same object. 3233 * The sequence begins with the given page m_start. This page is 3234 * mapped at the given virtual address start. Each subsequent page is 3235 * mapped at a virtual address that is offset from start by the same 3236 * amount as the page is offset from m_start within the object. The 3237 * last page in the sequence is the page with the largest offset from 3238 * m_start that can be mapped at a virtual address less than the given 3239 * virtual address end. Not every virtual page between start and end 3240 * is mapped; only those for which a resident page exists with the 3241 * corresponding offset from m_start are mapped. 3242 */ 3243void 3244pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, 3245 vm_page_t m_start, vm_prot_t prot) 3246{ 3247 vm_offset_t va; 3248 vm_page_t m, mpte; 3249 vm_pindex_t diff, psize; 3250 3251 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED); 3252 psize = atop(end - start); 3253 mpte = NULL; 3254 m = m_start; 3255 PMAP_LOCK(pmap); 3256 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { 3257 va = start + ptoa(diff); 3258 if ((va & PDRMASK) == 0 && va + NBPDR <= end && 3259 (VM_PAGE_TO_PHYS(m) & PDRMASK) == 0 && 3260 pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0 && 3261 pmap_enter_pde(pmap, va, m, prot)) 3262 m = &m[NBPDR / PAGE_SIZE - 1]; 3263 else 3264 mpte = pmap_enter_quick_locked(pmap, va, m, prot, 3265 mpte); 3266 m = TAILQ_NEXT(m, listq); 3267 } 3268 PMAP_UNLOCK(pmap); 3269} 3270 3271/* 3272 * this code makes some *MAJOR* assumptions: 3273 * 1. Current pmap & pmap exists. 3274 * 2. Not wired. 3275 * 3. Read access. 3276 * 4. No page table pages. 3277 * but is *MUCH* faster than pmap_enter... 3278 */ 3279 3280void 3281pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 3282{ 3283 3284 PMAP_LOCK(pmap); 3285 (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL); 3286 PMAP_UNLOCK(pmap); 3287} 3288 3289static vm_page_t 3290pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, 3291 vm_prot_t prot, vm_page_t mpte) 3292{ 3293 pt_entry_t *pte; 3294 vm_paddr_t pa; 3295 vm_page_t free; 3296 3297 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva || 3298 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0, 3299 ("pmap_enter_quick_locked: managed mapping within the clean submap")); 3300 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3301 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 3302 3303 /* 3304 * In the case that a page table page is not 3305 * resident, we are creating it here. 3306 */ 3307 if (va < VM_MAXUSER_ADDRESS) { 3308 unsigned ptepindex; 3309 pd_entry_t ptepa; 3310 3311 /* 3312 * Calculate pagetable page index 3313 */ 3314 ptepindex = va >> PDRSHIFT; 3315 if (mpte && (mpte->pindex == ptepindex)) { 3316 mpte->wire_count++; 3317 } else { 3318 /* 3319 * Get the page directory entry 3320 */ 3321 ptepa = pmap->pm_pdir[ptepindex]; 3322 3323 /* 3324 * If the page table page is mapped, we just increment 3325 * the hold count, and activate it. 3326 */ 3327 if (ptepa) { 3328 if (ptepa & PG_PS) 3329 return (NULL); 3330 mpte = PHYS_TO_VM_PAGE(ptepa & PG_FRAME); 3331 mpte->wire_count++; 3332 } else { 3333 mpte = _pmap_allocpte(pmap, ptepindex, 3334 M_NOWAIT); 3335 if (mpte == NULL) 3336 return (mpte); 3337 } 3338 } 3339 } else { 3340 mpte = NULL; 3341 } 3342 3343 /* 3344 * This call to vtopte makes the assumption that we are 3345 * entering the page into the current pmap. In order to support 3346 * quick entry into any pmap, one would likely use pmap_pte_quick. 3347 * But that isn't as quick as vtopte. 3348 */ 3349 pte = vtopte(va); 3350 if (*pte) { 3351 if (mpte != NULL) { 3352 mpte->wire_count--; 3353 mpte = NULL; 3354 } 3355 return (mpte); 3356 } 3357 3358 /* 3359 * Enter on the PV list if part of our managed memory. 3360 */ 3361 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 && 3362 !pmap_try_insert_pv_entry(pmap, va, m)) { 3363 if (mpte != NULL) { 3364 free = NULL; 3365 if (pmap_unwire_pte_hold(pmap, mpte, &free)) { 3366 pmap_invalidate_page(pmap, va); 3367 pmap_free_zero_pages(free); 3368 } 3369 3370 mpte = NULL; 3371 } 3372 return (mpte); 3373 } 3374 3375 /* 3376 * Increment counters 3377 */ 3378 pmap->pm_stats.resident_count++; 3379 3380 pa = VM_PAGE_TO_PHYS(m); 3381#ifdef PAE 3382 if ((prot & VM_PROT_EXECUTE) == 0) 3383 pa |= pg_nx; 3384#endif 3385 3386 /* 3387 * Now validate mapping with RO protection 3388 */ 3389 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 3390 pte_store(pte, pa | PG_V | PG_U); 3391 else 3392 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 3393 return mpte; 3394} 3395 3396/* 3397 * Make a temporary mapping for a physical address. This is only intended 3398 * to be used for panic dumps. 3399 */ 3400void * 3401pmap_kenter_temporary(vm_paddr_t pa, int i) 3402{ 3403 vm_offset_t va; 3404 3405 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 3406 pmap_kenter(va, pa); 3407 invlpg(va); 3408 return ((void *)crashdumpmap); 3409} 3410 3411/* 3412 * This code maps large physical mmap regions into the 3413 * processor address space. Note that some shortcuts 3414 * are taken, but the code works. 3415 */ 3416void 3417pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 3418 vm_object_t object, vm_pindex_t pindex, 3419 vm_size_t size) 3420{ 3421 vm_page_t p; 3422 3423 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 3424 KASSERT(object->type == OBJT_DEVICE, 3425 ("pmap_object_init_pt: non-device object")); 3426 if (pseflag && 3427 ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) { 3428 int i; 3429 vm_page_t m[1]; 3430 unsigned int ptepindex; 3431 int npdes; 3432 pd_entry_t ptepa; 3433 3434 PMAP_LOCK(pmap); 3435 if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)]) 3436 goto out; 3437 PMAP_UNLOCK(pmap); 3438retry: 3439 p = vm_page_lookup(object, pindex); 3440 if (p != NULL) { 3441 if (vm_page_sleep_if_busy(p, FALSE, "init4p")) 3442 goto retry; 3443 } else { 3444 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL); 3445 if (p == NULL) 3446 return; 3447 m[0] = p; 3448 3449 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) { 3450 vm_page_lock_queues(); 3451 vm_page_free(p); 3452 vm_page_unlock_queues(); 3453 return; 3454 } 3455 3456 p = vm_page_lookup(object, pindex); 3457 vm_page_lock_queues(); 3458 vm_page_wakeup(p); 3459 vm_page_unlock_queues(); 3460 } 3461 3462 ptepa = VM_PAGE_TO_PHYS(p); 3463 if (ptepa & (NBPDR - 1)) 3464 return; 3465 3466 p->valid = VM_PAGE_BITS_ALL; 3467 3468 PMAP_LOCK(pmap); 3469 pmap->pm_stats.resident_count += size >> PAGE_SHIFT; 3470 npdes = size >> PDRSHIFT; 3471 for(i = 0; i < npdes; i++) { 3472 pde_store(&pmap->pm_pdir[ptepindex], 3473 ptepa | PG_U | PG_RW | PG_V | PG_PS); 3474 ptepa += NBPDR; 3475 ptepindex += 1; 3476 } 3477 pmap_invalidate_all(pmap); 3478out: 3479 PMAP_UNLOCK(pmap); 3480 } 3481} 3482 3483/* 3484 * Routine: pmap_change_wiring 3485 * Function: Change the wiring attribute for a map/virtual-address 3486 * pair. 3487 * In/out conditions: 3488 * The mapping must already exist in the pmap. 3489 */ 3490void 3491pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired) 3492{ 3493 pd_entry_t *pde; 3494 pt_entry_t *pte; 3495 boolean_t are_queues_locked; 3496 3497 are_queues_locked = FALSE; 3498retry: 3499 PMAP_LOCK(pmap); 3500 pde = pmap_pde(pmap, va); 3501 if ((*pde & PG_PS) != 0) { 3502 if (!wired != ((*pde & PG_W) == 0)) { 3503 if (!are_queues_locked) { 3504 are_queues_locked = TRUE; 3505 if (!mtx_trylock(&vm_page_queue_mtx)) { 3506 PMAP_UNLOCK(pmap); 3507 vm_page_lock_queues(); 3508 goto retry; 3509 } 3510 } 3511 if (!pmap_demote_pde(pmap, pde, va)) 3512 panic("pmap_change_wiring: demotion failed"); 3513 } else 3514 goto out; 3515 } 3516 pte = pmap_pte(pmap, va); 3517 3518 if (wired && !pmap_pte_w(pte)) 3519 pmap->pm_stats.wired_count++; 3520 else if (!wired && pmap_pte_w(pte)) 3521 pmap->pm_stats.wired_count--; 3522 3523 /* 3524 * Wiring is not a hardware characteristic so there is no need to 3525 * invalidate TLB. 3526 */ 3527 pmap_pte_set_w(pte, wired); 3528 pmap_pte_release(pte); 3529out: 3530 if (are_queues_locked) 3531 vm_page_unlock_queues(); 3532 PMAP_UNLOCK(pmap); 3533} 3534 3535 3536 3537/* 3538 * Copy the range specified by src_addr/len 3539 * from the source map to the range dst_addr/len 3540 * in the destination map. 3541 * 3542 * This routine is only advisory and need not do anything. 3543 */ 3544 3545void 3546pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 3547 vm_offset_t src_addr) 3548{ 3549 vm_page_t free; 3550 vm_offset_t addr; 3551 vm_offset_t end_addr = src_addr + len; 3552 vm_offset_t pdnxt; 3553 3554 if (dst_addr != src_addr) 3555 return; 3556 3557 if (!pmap_is_current(src_pmap)) 3558 return; 3559 3560 vm_page_lock_queues(); 3561 if (dst_pmap < src_pmap) { 3562 PMAP_LOCK(dst_pmap); 3563 PMAP_LOCK(src_pmap); 3564 } else { 3565 PMAP_LOCK(src_pmap); 3566 PMAP_LOCK(dst_pmap); 3567 } 3568 sched_pin(); 3569 for (addr = src_addr; addr < end_addr; addr = pdnxt) { 3570 pt_entry_t *src_pte, *dst_pte; 3571 vm_page_t dstmpte, srcmpte; 3572 pd_entry_t srcptepaddr; 3573 unsigned ptepindex; 3574 3575 KASSERT(addr < UPT_MIN_ADDRESS, 3576 ("pmap_copy: invalid to pmap_copy page tables")); 3577 3578 pdnxt = (addr + NBPDR) & ~PDRMASK; 3579 if (pdnxt < addr) 3580 pdnxt = end_addr; 3581 ptepindex = addr >> PDRSHIFT; 3582 3583 srcptepaddr = src_pmap->pm_pdir[ptepindex]; 3584 if (srcptepaddr == 0) 3585 continue; 3586 3587 if (srcptepaddr & PG_PS) { 3588 if (dst_pmap->pm_pdir[ptepindex] == 0 && 3589 ((srcptepaddr & PG_MANAGED) == 0 || 3590 pmap_pv_insert_pde(dst_pmap, addr, srcptepaddr & 3591 PG_PS_FRAME))) { 3592 dst_pmap->pm_pdir[ptepindex] = srcptepaddr & 3593 ~PG_W; 3594 dst_pmap->pm_stats.resident_count += 3595 NBPDR / PAGE_SIZE; 3596 } 3597 continue; 3598 } 3599 3600 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME); 3601 KASSERT(srcmpte->wire_count > 0, 3602 ("pmap_copy: source page table page is unused")); 3603 3604 if (pdnxt > end_addr) 3605 pdnxt = end_addr; 3606 3607 src_pte = vtopte(addr); 3608 while (addr < pdnxt) { 3609 pt_entry_t ptetemp; 3610 ptetemp = *src_pte; 3611 /* 3612 * we only virtual copy managed pages 3613 */ 3614 if ((ptetemp & PG_MANAGED) != 0) { 3615 dstmpte = pmap_allocpte(dst_pmap, addr, 3616 M_NOWAIT); 3617 if (dstmpte == NULL) 3618 break; 3619 dst_pte = pmap_pte_quick(dst_pmap, addr); 3620 if (*dst_pte == 0 && 3621 pmap_try_insert_pv_entry(dst_pmap, addr, 3622 PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) { 3623 /* 3624 * Clear the wired, modified, and 3625 * accessed (referenced) bits 3626 * during the copy. 3627 */ 3628 *dst_pte = ptetemp & ~(PG_W | PG_M | 3629 PG_A); 3630 dst_pmap->pm_stats.resident_count++; 3631 } else { 3632 free = NULL; 3633 if (pmap_unwire_pte_hold( dst_pmap, 3634 dstmpte, &free)) { 3635 pmap_invalidate_page(dst_pmap, 3636 addr); 3637 pmap_free_zero_pages(free); 3638 } 3639 } 3640 if (dstmpte->wire_count >= srcmpte->wire_count) 3641 break; 3642 } 3643 addr += PAGE_SIZE; 3644 src_pte++; 3645 } 3646 } 3647 sched_unpin(); 3648 vm_page_unlock_queues(); 3649 PMAP_UNLOCK(src_pmap); 3650 PMAP_UNLOCK(dst_pmap); 3651} 3652 3653static __inline void 3654pagezero(void *page) 3655{ 3656#if defined(I686_CPU) 3657 if (cpu_class == CPUCLASS_686) { 3658#if defined(CPU_ENABLE_SSE) 3659 if (cpu_feature & CPUID_SSE2) 3660 sse2_pagezero(page); 3661 else 3662#endif 3663 i686_pagezero(page); 3664 } else 3665#endif 3666 bzero(page, PAGE_SIZE); 3667} 3668 3669/* 3670 * pmap_zero_page zeros the specified hardware page by mapping 3671 * the page into KVM and using bzero to clear its contents. 3672 */ 3673void 3674pmap_zero_page(vm_page_t m) 3675{ 3676 struct sysmaps *sysmaps; 3677 3678 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3679 mtx_lock(&sysmaps->lock); 3680 if (*sysmaps->CMAP2) 3681 panic("pmap_zero_page: CMAP2 busy"); 3682 sched_pin(); 3683 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 3684 invlcaddr(sysmaps->CADDR2); 3685 pagezero(sysmaps->CADDR2); 3686 *sysmaps->CMAP2 = 0; 3687 sched_unpin(); 3688 mtx_unlock(&sysmaps->lock); 3689} 3690 3691/* 3692 * pmap_zero_page_area zeros the specified hardware page by mapping 3693 * the page into KVM and using bzero to clear its contents. 3694 * 3695 * off and size may not cover an area beyond a single hardware page. 3696 */ 3697void 3698pmap_zero_page_area(vm_page_t m, int off, int size) 3699{ 3700 struct sysmaps *sysmaps; 3701 3702 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3703 mtx_lock(&sysmaps->lock); 3704 if (*sysmaps->CMAP2) 3705 panic("pmap_zero_page: CMAP2 busy"); 3706 sched_pin(); 3707 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 3708 invlcaddr(sysmaps->CADDR2); 3709 if (off == 0 && size == PAGE_SIZE) 3710 pagezero(sysmaps->CADDR2); 3711 else 3712 bzero((char *)sysmaps->CADDR2 + off, size); 3713 *sysmaps->CMAP2 = 0; 3714 sched_unpin(); 3715 mtx_unlock(&sysmaps->lock); 3716} 3717 3718/* 3719 * pmap_zero_page_idle zeros the specified hardware page by mapping 3720 * the page into KVM and using bzero to clear its contents. This 3721 * is intended to be called from the vm_pagezero process only and 3722 * outside of Giant. 3723 */ 3724void 3725pmap_zero_page_idle(vm_page_t m) 3726{ 3727 3728 if (*CMAP3) 3729 panic("pmap_zero_page: CMAP3 busy"); 3730 sched_pin(); 3731 *CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 3732 invlcaddr(CADDR3); 3733 pagezero(CADDR3); 3734 *CMAP3 = 0; 3735 sched_unpin(); 3736} 3737 3738/* 3739 * pmap_copy_page copies the specified (machine independent) 3740 * page by mapping the page into virtual memory and using 3741 * bcopy to copy the page, one machine dependent page at a 3742 * time. 3743 */ 3744void 3745pmap_copy_page(vm_page_t src, vm_page_t dst) 3746{ 3747 struct sysmaps *sysmaps; 3748 3749 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3750 mtx_lock(&sysmaps->lock); 3751 if (*sysmaps->CMAP1) 3752 panic("pmap_copy_page: CMAP1 busy"); 3753 if (*sysmaps->CMAP2) 3754 panic("pmap_copy_page: CMAP2 busy"); 3755 sched_pin(); 3756 invlpg((u_int)sysmaps->CADDR1); 3757 invlpg((u_int)sysmaps->CADDR2); 3758 *sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A; 3759 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M; 3760 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); 3761 *sysmaps->CMAP1 = 0; 3762 *sysmaps->CMAP2 = 0; 3763 sched_unpin(); 3764 mtx_unlock(&sysmaps->lock); 3765} 3766 3767/* 3768 * Returns true if the pmap's pv is one of the first 3769 * 16 pvs linked to from this page. This count may 3770 * be changed upwards or downwards in the future; it 3771 * is only necessary that true be returned for a small 3772 * subset of pmaps for proper page aging. 3773 */ 3774boolean_t 3775pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 3776{ 3777 struct md_page *pvh; 3778 pv_entry_t pv; 3779 int loops = 0; 3780 3781 if (m->flags & PG_FICTITIOUS) 3782 return FALSE; 3783 3784 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3785 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3786 if (PV_PMAP(pv) == pmap) { 3787 return TRUE; 3788 } 3789 loops++; 3790 if (loops >= 16) 3791 break; 3792 } 3793 if (loops < 16) { 3794 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 3795 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) { 3796 if (PV_PMAP(pv) == pmap) 3797 return (TRUE); 3798 loops++; 3799 if (loops >= 16) 3800 break; 3801 } 3802 } 3803 return (FALSE); 3804} 3805 3806/* 3807 * pmap_page_wired_mappings: 3808 * 3809 * Return the number of managed mappings to the given physical page 3810 * that are wired. 3811 */ 3812int 3813pmap_page_wired_mappings(vm_page_t m) 3814{ 3815 int count; 3816 3817 count = 0; 3818 if ((m->flags & PG_FICTITIOUS) != 0) 3819 return (count); 3820 count = pmap_pvh_wired_mappings(&m->md, count); 3821 return (pmap_pvh_wired_mappings(pa_to_pvh(VM_PAGE_TO_PHYS(m)), count)); 3822} 3823 3824/* 3825 * pmap_pvh_wired_mappings: 3826 * 3827 * Return the updated number "count" of managed mappings that are wired. 3828 */ 3829static int 3830pmap_pvh_wired_mappings(struct md_page *pvh, int count) 3831{ 3832 pmap_t pmap; 3833 pt_entry_t *pte; 3834 pv_entry_t pv; 3835 3836 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3837 sched_pin(); 3838 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) { 3839 pmap = PV_PMAP(pv); 3840 PMAP_LOCK(pmap); 3841 pte = pmap_pte_quick(pmap, pv->pv_va); 3842 if ((*pte & PG_W) != 0) 3843 count++; 3844 PMAP_UNLOCK(pmap); 3845 } 3846 sched_unpin(); 3847 return (count); 3848} 3849 3850/* 3851 * Returns TRUE if the given page is mapped individually or as part of 3852 * a 4mpage. Otherwise, returns FALSE. 3853 */ 3854boolean_t 3855pmap_page_is_mapped(vm_page_t m) 3856{ 3857 struct md_page *pvh; 3858 3859 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 3860 return (FALSE); 3861 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3862 if (TAILQ_EMPTY(&m->md.pv_list)) { 3863 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 3864 return (!TAILQ_EMPTY(&pvh->pv_list)); 3865 } else 3866 return (TRUE); 3867} 3868 3869/* 3870 * Remove all pages from specified address space 3871 * this aids process exit speeds. Also, this code 3872 * is special cased for current process only, but 3873 * can have the more generic (and slightly slower) 3874 * mode enabled. This is much faster than pmap_remove 3875 * in the case of running down an entire address space. 3876 */ 3877void 3878pmap_remove_pages(pmap_t pmap) 3879{ 3880 pt_entry_t *pte, tpte; 3881 vm_page_t free = NULL; 3882 vm_page_t m, mpte, mt; 3883 pv_entry_t pv; 3884 struct md_page *pvh; 3885 struct pv_chunk *pc, *npc; 3886 int field, idx; 3887 int32_t bit; 3888 uint32_t inuse, bitmask; 3889 int allfree; 3890 3891 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { 3892 printf("warning: pmap_remove_pages called with non-current pmap\n"); 3893 return; 3894 } 3895 vm_page_lock_queues(); 3896 PMAP_LOCK(pmap); 3897 sched_pin(); 3898 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) { 3899 allfree = 1; 3900 for (field = 0; field < _NPCM; field++) { 3901 inuse = (~(pc->pc_map[field])) & pc_freemask[field]; 3902 while (inuse != 0) { 3903 bit = bsfl(inuse); 3904 bitmask = 1UL << bit; 3905 idx = field * 32 + bit; 3906 pv = &pc->pc_pventry[idx]; 3907 inuse &= ~bitmask; 3908 3909 pte = pmap_pde(pmap, pv->pv_va); 3910 tpte = *pte; 3911 if ((tpte & PG_PS) == 0) { 3912 pte = vtopte(pv->pv_va); 3913 tpte = *pte & ~PG_PTE_PAT; 3914 } 3915 3916 if (tpte == 0) { 3917 printf( 3918 "TPTE at %p IS ZERO @ VA %08x\n", 3919 pte, pv->pv_va); 3920 panic("bad pte"); 3921 } 3922 3923/* 3924 * We cannot remove wired pages from a process' mapping at this time 3925 */ 3926 if (tpte & PG_W) { 3927 allfree = 0; 3928 continue; 3929 } 3930 3931 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME); 3932 KASSERT(m->phys_addr == (tpte & PG_FRAME), 3933 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 3934 m, (uintmax_t)m->phys_addr, 3935 (uintmax_t)tpte)); 3936 3937 KASSERT(m < &vm_page_array[vm_page_array_size], 3938 ("pmap_remove_pages: bad tpte %#jx", 3939 (uintmax_t)tpte)); 3940 3941 pte_clear(pte); 3942 3943 /* 3944 * Update the vm_page_t clean/reference bits. 3945 */ 3946 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) { 3947 if ((tpte & PG_PS) != 0) { 3948 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++) 3949 vm_page_dirty(mt); 3950 } else 3951 vm_page_dirty(m); 3952 } 3953 3954 /* Mark free */ 3955 PV_STAT(pv_entry_frees++); 3956 PV_STAT(pv_entry_spare++); 3957 pv_entry_count--; 3958 pc->pc_map[field] |= bitmask; 3959 if ((tpte & PG_PS) != 0) { 3960 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 3961 pvh = pa_to_pvh(tpte & PG_FRAME); 3962 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list); 3963 if (TAILQ_EMPTY(&pvh->pv_list)) { 3964 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++) 3965 if (TAILQ_EMPTY(&mt->md.pv_list)) 3966 vm_page_flag_clear(mt, PG_WRITEABLE); 3967 } 3968 mpte = pmap_lookup_pt_page(pmap, pv->pv_va); 3969 if (mpte != NULL) { 3970 pmap_remove_pt_page(pmap, mpte); 3971 KASSERT(mpte->wire_count == NPTEPG, 3972 ("pmap_remove_pages: pte page wire count error")); 3973 mpte->wire_count = 0; 3974 pmap_add_delayed_free_list(mpte, &free, FALSE); 3975 atomic_subtract_int(&cnt.v_wire_count, 1); 3976 } 3977 } else { 3978 pmap->pm_stats.resident_count--; 3979 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3980 if (TAILQ_EMPTY(&m->md.pv_list)) { 3981 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 3982 if (TAILQ_EMPTY(&pvh->pv_list)) 3983 vm_page_flag_clear(m, PG_WRITEABLE); 3984 } 3985 pmap_unuse_pt(pmap, pv->pv_va, &free); 3986 } 3987 } 3988 } 3989 if (allfree) { 3990 PV_STAT(pv_entry_spare -= _NPCPV); 3991 PV_STAT(pc_chunk_count--); 3992 PV_STAT(pc_chunk_frees++); 3993 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 3994 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 3995 pmap_qremove((vm_offset_t)pc, 1); 3996 vm_page_unwire(m, 0); 3997 vm_page_free(m); 3998 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 3999 } 4000 } 4001 sched_unpin(); 4002 pmap_invalidate_all(pmap); 4003 vm_page_unlock_queues(); 4004 PMAP_UNLOCK(pmap); 4005 pmap_free_zero_pages(free); 4006} 4007 4008/* 4009 * pmap_is_modified: 4010 * 4011 * Return whether or not the specified physical page was modified 4012 * in any physical maps. 4013 */ 4014boolean_t 4015pmap_is_modified(vm_page_t m) 4016{ 4017 4018 if (m->flags & PG_FICTITIOUS) 4019 return (FALSE); 4020 if (pmap_is_modified_pvh(&m->md)) 4021 return (TRUE); 4022 return (pmap_is_modified_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m)))); 4023} 4024 4025/* 4026 * Returns TRUE if any of the given mappings were used to modify 4027 * physical memory. Otherwise, returns FALSE. Both page and 2mpage 4028 * mappings are supported. 4029 */ 4030static boolean_t 4031pmap_is_modified_pvh(struct md_page *pvh) 4032{ 4033 pv_entry_t pv; 4034 pt_entry_t *pte; 4035 pmap_t pmap; 4036 boolean_t rv; 4037 4038 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 4039 rv = FALSE; 4040 sched_pin(); 4041 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) { 4042 pmap = PV_PMAP(pv); 4043 PMAP_LOCK(pmap); 4044 pte = pmap_pte_quick(pmap, pv->pv_va); 4045 rv = (*pte & (PG_M | PG_RW)) == (PG_M | PG_RW); 4046 PMAP_UNLOCK(pmap); 4047 if (rv) 4048 break; 4049 } 4050 sched_unpin(); 4051 return (rv); 4052} 4053 4054/* 4055 * pmap_is_prefaultable: 4056 * 4057 * Return whether or not the specified virtual address is elgible 4058 * for prefault. 4059 */ 4060boolean_t 4061pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 4062{ 4063 pd_entry_t *pde; 4064 pt_entry_t *pte; 4065 boolean_t rv; 4066 4067 rv = FALSE; 4068 PMAP_LOCK(pmap); 4069 pde = pmap_pde(pmap, addr); 4070 if (*pde != 0 && (*pde & PG_PS) == 0) { 4071 pte = vtopte(addr); 4072 rv = *pte == 0; 4073 } 4074 PMAP_UNLOCK(pmap); 4075 return (rv); 4076} 4077 4078/* 4079 * Clear the write and modified bits in each of the given page's mappings. 4080 */ 4081void 4082pmap_remove_write(vm_page_t m) 4083{ 4084 struct md_page *pvh; 4085 pv_entry_t next_pv, pv; 4086 pmap_t pmap; 4087 pd_entry_t *pde; 4088 pt_entry_t oldpte, *pte; 4089 vm_offset_t va; 4090 4091 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 4092 if ((m->flags & PG_FICTITIOUS) != 0 || 4093 (m->flags & PG_WRITEABLE) == 0) 4094 return; 4095 sched_pin(); 4096 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 4097 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) { 4098 va = pv->pv_va; 4099 pmap = PV_PMAP(pv); 4100 PMAP_LOCK(pmap); 4101 pde = pmap_pde(pmap, va); 4102 if ((*pde & PG_RW) != 0) 4103 (void)pmap_demote_pde(pmap, pde, va); 4104 PMAP_UNLOCK(pmap); 4105 } 4106 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 4107 pmap = PV_PMAP(pv); 4108 PMAP_LOCK(pmap); 4109 pde = pmap_pde(pmap, pv->pv_va); 4110 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_write: found" 4111 " a 4mpage in page %p's pv list", m)); 4112 pte = pmap_pte_quick(pmap, pv->pv_va); 4113retry: 4114 oldpte = *pte; 4115 if ((oldpte & PG_RW) != 0) { 4116 /* 4117 * Regardless of whether a pte is 32 or 64 bits 4118 * in size, PG_RW and PG_M are among the least 4119 * significant 32 bits. 4120 */ 4121 if (!atomic_cmpset_int((u_int *)pte, oldpte, 4122 oldpte & ~(PG_RW | PG_M))) 4123 goto retry; 4124 if ((oldpte & PG_M) != 0) 4125 vm_page_dirty(m); 4126 pmap_invalidate_page(pmap, pv->pv_va); 4127 } 4128 PMAP_UNLOCK(pmap); 4129 } 4130 vm_page_flag_clear(m, PG_WRITEABLE); 4131 sched_unpin(); 4132} 4133 4134/* 4135 * pmap_ts_referenced: 4136 * 4137 * Return a count of reference bits for a page, clearing those bits. 4138 * It is not necessary for every reference bit to be cleared, but it 4139 * is necessary that 0 only be returned when there are truly no 4140 * reference bits set. 4141 * 4142 * XXX: The exact number of bits to check and clear is a matter that 4143 * should be tested and standardized at some point in the future for 4144 * optimal aging of shared pages. 4145 */ 4146int 4147pmap_ts_referenced(vm_page_t m) 4148{ 4149 struct md_page *pvh; 4150 pv_entry_t pv, pvf, pvn; 4151 pmap_t pmap; 4152 pd_entry_t oldpde, *pde; 4153 pt_entry_t *pte; 4154 vm_offset_t va; 4155 int rtval = 0; 4156 4157 if (m->flags & PG_FICTITIOUS) 4158 return (rtval); 4159 sched_pin(); 4160 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 4161 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 4162 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, pvn) { 4163 va = pv->pv_va; 4164 pmap = PV_PMAP(pv); 4165 PMAP_LOCK(pmap); 4166 pde = pmap_pde(pmap, va); 4167 oldpde = *pde; 4168 if ((oldpde & PG_A) != 0) { 4169 if (pmap_demote_pde(pmap, pde, va)) { 4170 if ((oldpde & PG_W) == 0) { 4171 /* 4172 * Remove the mapping to a single page 4173 * so that a subsequent access may 4174 * repromote. Since the underlying 4175 * page table page is fully populated, 4176 * this removal never frees a page 4177 * table page. 4178 */ 4179 va += VM_PAGE_TO_PHYS(m) - (oldpde & 4180 PG_FRAME); 4181 pmap_remove_page(pmap, va, NULL); 4182 rtval++; 4183 if (rtval > 4) { 4184 PMAP_UNLOCK(pmap); 4185 return (rtval); 4186 } 4187 } 4188 } 4189 } 4190 PMAP_UNLOCK(pmap); 4191 } 4192 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 4193 pvf = pv; 4194 do { 4195 pvn = TAILQ_NEXT(pv, pv_list); 4196 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 4197 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 4198 pmap = PV_PMAP(pv); 4199 PMAP_LOCK(pmap); 4200 pde = pmap_pde(pmap, pv->pv_va); 4201 KASSERT((*pde & PG_PS) == 0, ("pmap_ts_referenced:" 4202 " found a 4mpage in page %p's pv list", m)); 4203 pte = pmap_pte_quick(pmap, pv->pv_va); 4204 if ((*pte & PG_A) != 0) { 4205 atomic_clear_int((u_int *)pte, PG_A); 4206 pmap_invalidate_page(pmap, pv->pv_va); 4207 rtval++; 4208 if (rtval > 4) 4209 pvn = NULL; 4210 } 4211 PMAP_UNLOCK(pmap); 4212 } while ((pv = pvn) != NULL && pv != pvf); 4213 } 4214 sched_unpin(); 4215 return (rtval); 4216} 4217 4218/* 4219 * Clear the modify bits on the specified physical page. 4220 */ 4221void 4222pmap_clear_modify(vm_page_t m) 4223{ 4224 struct md_page *pvh; 4225 pv_entry_t next_pv, pv; 4226 pmap_t pmap; 4227 pd_entry_t oldpde, *pde; 4228 pt_entry_t oldpte, *pte; 4229 vm_offset_t va; 4230 4231 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 4232 if ((m->flags & PG_FICTITIOUS) != 0) 4233 return; 4234 sched_pin(); 4235 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 4236 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) { 4237 va = pv->pv_va; 4238 pmap = PV_PMAP(pv); 4239 PMAP_LOCK(pmap); 4240 pde = pmap_pde(pmap, va); 4241 oldpde = *pde; 4242 if ((oldpde & PG_RW) != 0) { 4243 if (pmap_demote_pde(pmap, pde, va)) { 4244 if ((oldpde & PG_W) == 0) { 4245 /* 4246 * Write protect the mapping to a 4247 * single page so that a subsequent 4248 * write access may repromote. 4249 */ 4250 va += VM_PAGE_TO_PHYS(m) - (oldpde & 4251 PG_FRAME); 4252 pte = pmap_pte_quick(pmap, va); 4253 oldpte = *pte; 4254 if ((oldpte & PG_V) != 0) { 4255 /* 4256 * Regardless of whether a pte is 32 or 64 bits 4257 * in size, PG_RW and PG_M are among the least 4258 * significant 32 bits. 4259 */ 4260 while (!atomic_cmpset_int((u_int *)pte, 4261 oldpte, 4262 oldpte & ~(PG_M | PG_RW))) 4263 oldpte = *pte; 4264 vm_page_dirty(m); 4265 pmap_invalidate_page(pmap, va); 4266 } 4267 } 4268 } 4269 } 4270 PMAP_UNLOCK(pmap); 4271 } 4272 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 4273 pmap = PV_PMAP(pv); 4274 PMAP_LOCK(pmap); 4275 pde = pmap_pde(pmap, pv->pv_va); 4276 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_modify: found" 4277 " a 4mpage in page %p's pv list", m)); 4278 pte = pmap_pte_quick(pmap, pv->pv_va); 4279 if ((*pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) { 4280 /* 4281 * Regardless of whether a pte is 32 or 64 bits 4282 * in size, PG_M is among the least significant 4283 * 32 bits. 4284 */ 4285 atomic_clear_int((u_int *)pte, PG_M); 4286 pmap_invalidate_page(pmap, pv->pv_va); 4287 } 4288 PMAP_UNLOCK(pmap); 4289 } 4290 sched_unpin(); 4291} 4292 4293/* 4294 * pmap_clear_reference: 4295 * 4296 * Clear the reference bit on the specified physical page. 4297 */ 4298void 4299pmap_clear_reference(vm_page_t m) 4300{ 4301 struct md_page *pvh; 4302 pv_entry_t next_pv, pv; 4303 pmap_t pmap; 4304 pd_entry_t oldpde, *pde; 4305 pt_entry_t *pte; 4306 vm_offset_t va; 4307 4308 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 4309 if ((m->flags & PG_FICTITIOUS) != 0) 4310 return; 4311 sched_pin(); 4312 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 4313 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) { 4314 va = pv->pv_va; 4315 pmap = PV_PMAP(pv); 4316 PMAP_LOCK(pmap); 4317 pde = pmap_pde(pmap, va); 4318 oldpde = *pde; 4319 if ((oldpde & PG_A) != 0) { 4320 if (pmap_demote_pde(pmap, pde, va)) { 4321 /* 4322 * Remove the mapping to a single page so 4323 * that a subsequent access may repromote. 4324 * Since the underlying page table page is 4325 * fully populated, this removal never frees 4326 * a page table page. 4327 */ 4328 va += VM_PAGE_TO_PHYS(m) - (oldpde & PG_FRAME); 4329 pmap_remove_page(pmap, va, NULL); 4330 } 4331 } 4332 PMAP_UNLOCK(pmap); 4333 } 4334 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 4335 pmap = PV_PMAP(pv); 4336 PMAP_LOCK(pmap); 4337 pde = pmap_pde(pmap, pv->pv_va); 4338 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_reference: found" 4339 " a 4mpage in page %p's pv list", m)); 4340 pte = pmap_pte_quick(pmap, pv->pv_va); 4341 if ((*pte & PG_A) != 0) { 4342 /* 4343 * Regardless of whether a pte is 32 or 64 bits 4344 * in size, PG_A is among the least significant 4345 * 32 bits. 4346 */ 4347 atomic_clear_int((u_int *)pte, PG_A); 4348 pmap_invalidate_page(pmap, pv->pv_va); 4349 } 4350 PMAP_UNLOCK(pmap); 4351 } 4352 sched_unpin(); 4353} 4354 4355/* 4356 * Miscellaneous support routines follow 4357 */ 4358 4359/* 4360 * Map a set of physical memory pages into the kernel virtual 4361 * address space. Return a pointer to where it is mapped. This 4362 * routine is intended to be used for mapping device memory, 4363 * NOT real memory. 4364 */ 4365void * 4366pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode) 4367{ 4368 vm_offset_t va, tmpva, offset; 4369 4370 offset = pa & PAGE_MASK; 4371 size = roundup(offset + size, PAGE_SIZE); 4372 pa = pa & PG_FRAME; 4373 4374 if (pa < KERNLOAD && pa + size <= KERNLOAD) 4375 va = KERNBASE + pa; 4376 else 4377 va = kmem_alloc_nofault(kernel_map, size); 4378 if (!va) 4379 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 4380 4381 for (tmpva = va; size > 0; ) { 4382 pmap_kenter_attr(tmpva, pa, mode); 4383 size -= PAGE_SIZE; 4384 tmpva += PAGE_SIZE; 4385 pa += PAGE_SIZE; 4386 } 4387 pmap_invalidate_range(kernel_pmap, va, tmpva); 4388 pmap_invalidate_cache(); 4389 return ((void *)(va + offset)); 4390} 4391 4392void * 4393pmap_mapdev(vm_paddr_t pa, vm_size_t size) 4394{ 4395 4396 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE)); 4397} 4398 4399void * 4400pmap_mapbios(vm_paddr_t pa, vm_size_t size) 4401{ 4402 4403 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK)); 4404} 4405 4406void 4407pmap_unmapdev(vm_offset_t va, vm_size_t size) 4408{ 4409 vm_offset_t base, offset, tmpva; 4410 4411 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD) 4412 return; 4413 base = trunc_page(va); 4414 offset = va & PAGE_MASK; 4415 size = roundup(offset + size, PAGE_SIZE); 4416 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 4417 pmap_kremove(tmpva); 4418 pmap_invalidate_range(kernel_pmap, va, tmpva); 4419 kmem_free(kernel_map, base, size); 4420} 4421 4422int 4423pmap_change_attr(va, size, mode) 4424 vm_offset_t va; 4425 vm_size_t size; 4426 int mode; 4427{ 4428 vm_offset_t base, offset, tmpva; 4429 pt_entry_t *pte; 4430 u_int opte, npte; 4431 pd_entry_t *pde; 4432 4433 base = trunc_page(va); 4434 offset = va & PAGE_MASK; 4435 size = roundup(offset + size, PAGE_SIZE); 4436 4437 /* Only supported on kernel virtual addresses. */ 4438 if (base <= VM_MAXUSER_ADDRESS) 4439 return (EINVAL); 4440 4441 /* 4MB pages and pages that aren't mapped aren't supported. */ 4442 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) { 4443 pde = pmap_pde(kernel_pmap, tmpva); 4444 if (*pde & PG_PS) 4445 return (EINVAL); 4446 if (*pde == 0) 4447 return (EINVAL); 4448 pte = vtopte(va); 4449 if (*pte == 0) 4450 return (EINVAL); 4451 } 4452 4453 /* 4454 * Ok, all the pages exist and are 4k, so run through them updating 4455 * their cache mode. 4456 */ 4457 for (tmpva = base; size > 0; ) { 4458 pte = vtopte(tmpva); 4459 4460 /* 4461 * The cache mode bits are all in the low 32-bits of the 4462 * PTE, so we can just spin on updating the low 32-bits. 4463 */ 4464 do { 4465 opte = *(u_int *)pte; 4466 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT); 4467 npte |= pmap_cache_bits(mode, 0); 4468 } while (npte != opte && 4469 !atomic_cmpset_int((u_int *)pte, opte, npte)); 4470 tmpva += PAGE_SIZE; 4471 size -= PAGE_SIZE; 4472 } 4473 4474 /* 4475 * Flush CPU caches to make sure any data isn't cached that shouldn't 4476 * be, etc. 4477 */ 4478 pmap_invalidate_range(kernel_pmap, base, tmpva); 4479 pmap_invalidate_cache(); 4480 return (0); 4481} 4482 4483/* 4484 * perform the pmap work for mincore 4485 */ 4486int 4487pmap_mincore(pmap_t pmap, vm_offset_t addr) 4488{ 4489 pd_entry_t *pdep; 4490 pt_entry_t *ptep, pte; 4491 vm_paddr_t pa; 4492 vm_page_t m; 4493 int val = 0; 4494 4495 PMAP_LOCK(pmap); 4496 pdep = pmap_pde(pmap, addr); 4497 if (*pdep != 0) { 4498 if (*pdep & PG_PS) { 4499 pte = *pdep; 4500 val = MINCORE_SUPER; 4501 /* Compute the physical address of the 4KB page. */ 4502 pa = ((*pdep & PG_PS_FRAME) | (addr & PDRMASK)) & 4503 PG_FRAME; 4504 } else { 4505 ptep = pmap_pte(pmap, addr); 4506 pte = *ptep; 4507 pmap_pte_release(ptep); 4508 pa = pte & PG_FRAME; 4509 } 4510 } else { 4511 pte = 0; 4512 pa = 0; 4513 } 4514 PMAP_UNLOCK(pmap); 4515 4516 if (pte != 0) { 4517 val |= MINCORE_INCORE; 4518 if ((pte & PG_MANAGED) == 0) 4519 return val; 4520 4521 m = PHYS_TO_VM_PAGE(pa); 4522 4523 /* 4524 * Modified by us 4525 */ 4526 if ((pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) 4527 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 4528 else { 4529 /* 4530 * Modified by someone else 4531 */ 4532 vm_page_lock_queues(); 4533 if (m->dirty || pmap_is_modified(m)) 4534 val |= MINCORE_MODIFIED_OTHER; 4535 vm_page_unlock_queues(); 4536 } 4537 /* 4538 * Referenced by us 4539 */ 4540 if (pte & PG_A) 4541 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 4542 else { 4543 /* 4544 * Referenced by someone else 4545 */ 4546 vm_page_lock_queues(); 4547 if ((m->flags & PG_REFERENCED) || 4548 pmap_ts_referenced(m)) { 4549 val |= MINCORE_REFERENCED_OTHER; 4550 vm_page_flag_set(m, PG_REFERENCED); 4551 } 4552 vm_page_unlock_queues(); 4553 } 4554 } 4555 return val; 4556} 4557 4558void 4559pmap_activate(struct thread *td) 4560{ 4561 pmap_t pmap, oldpmap; 4562 u_int32_t cr3; 4563 4564 critical_enter(); 4565 pmap = vmspace_pmap(td->td_proc->p_vmspace); 4566 oldpmap = PCPU_GET(curpmap); 4567#if defined(SMP) 4568 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 4569 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 4570#else 4571 oldpmap->pm_active &= ~1; 4572 pmap->pm_active |= 1; 4573#endif 4574#ifdef PAE 4575 cr3 = vtophys(pmap->pm_pdpt); 4576#else 4577 cr3 = vtophys(pmap->pm_pdir); 4578#endif 4579 /* 4580 * pmap_activate is for the current thread on the current cpu 4581 */ 4582 td->td_pcb->pcb_cr3 = cr3; 4583 load_cr3(cr3); 4584 PCPU_SET(curpmap, pmap); 4585 critical_exit(); 4586} 4587 4588vm_offset_t 4589pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size) 4590{ 4591 4592 if ((obj == NULL) || (size < NBPDR) || (obj->type != OBJT_DEVICE)) { 4593 return addr; 4594 } 4595 4596 addr = (addr + PDRMASK) & ~PDRMASK; 4597 return addr; 4598} 4599 4600 4601#if defined(PMAP_DEBUG) 4602pmap_pid_dump(int pid) 4603{ 4604 pmap_t pmap; 4605 struct proc *p; 4606 int npte = 0; 4607 int index; 4608 4609 sx_slock(&allproc_lock); 4610 FOREACH_PROC_IN_SYSTEM(p) { 4611 if (p->p_pid != pid) 4612 continue; 4613 4614 if (p->p_vmspace) { 4615 int i,j; 4616 index = 0; 4617 pmap = vmspace_pmap(p->p_vmspace); 4618 for (i = 0; i < NPDEPTD; i++) { 4619 pd_entry_t *pde; 4620 pt_entry_t *pte; 4621 vm_offset_t base = i << PDRSHIFT; 4622 4623 pde = &pmap->pm_pdir[i]; 4624 if (pde && pmap_pde_v(pde)) { 4625 for (j = 0; j < NPTEPG; j++) { 4626 vm_offset_t va = base + (j << PAGE_SHIFT); 4627 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 4628 if (index) { 4629 index = 0; 4630 printf("\n"); 4631 } 4632 sx_sunlock(&allproc_lock); 4633 return npte; 4634 } 4635 pte = pmap_pte(pmap, va); 4636 if (pte && pmap_pte_v(pte)) { 4637 pt_entry_t pa; 4638 vm_page_t m; 4639 pa = *pte; 4640 m = PHYS_TO_VM_PAGE(pa & PG_FRAME); 4641 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 4642 va, pa, m->hold_count, m->wire_count, m->flags); 4643 npte++; 4644 index++; 4645 if (index >= 2) { 4646 index = 0; 4647 printf("\n"); 4648 } else { 4649 printf(" "); 4650 } 4651 } 4652 } 4653 } 4654 } 4655 } 4656 } 4657 sx_sunlock(&allproc_lock); 4658 return npte; 4659} 4660#endif 4661 4662#if defined(DEBUG) 4663 4664static void pads(pmap_t pm); 4665void pmap_pvdump(vm_offset_t pa); 4666 4667/* print address space of pmap*/ 4668static void 4669pads(pmap_t pm) 4670{ 4671 int i, j; 4672 vm_paddr_t va; 4673 pt_entry_t *ptep; 4674 4675 if (pm == kernel_pmap) 4676 return; 4677 for (i = 0; i < NPDEPTD; i++) 4678 if (pm->pm_pdir[i]) 4679 for (j = 0; j < NPTEPG; j++) { 4680 va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 4681 if (pm == kernel_pmap && va < KERNBASE) 4682 continue; 4683 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 4684 continue; 4685 ptep = pmap_pte(pm, va); 4686 if (pmap_pte_v(ptep)) 4687 printf("%x:%x ", va, *ptep); 4688 }; 4689 4690} 4691 4692void 4693pmap_pvdump(vm_paddr_t pa) 4694{ 4695 pv_entry_t pv; 4696 pmap_t pmap; 4697 vm_page_t m; 4698 4699 printf("pa %x", pa); 4700 m = PHYS_TO_VM_PAGE(pa); 4701 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 4702 pmap = PV_PMAP(pv); 4703 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va); 4704 pads(pmap); 4705 } 4706 printf(" "); 4707} 4708#endif 4709