pmap.c revision 175067
1/*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * Copyright (c) 1994 John S. Dyson 5 * All rights reserved. 6 * Copyright (c) 1994 David Greenman 7 * All rights reserved. 8 * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu> 9 * All rights reserved. 10 * 11 * This code is derived from software contributed to Berkeley by 12 * the Systems Programming Group of the University of Utah Computer 13 * Science Department and William Jolitz of UUNET Technologies Inc. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the University of 26 * California, Berkeley and its contributors. 27 * 4. Neither the name of the University nor the names of its contributors 28 * may be used to endorse or promote products derived from this software 29 * without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41 * SUCH DAMAGE. 42 * 43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 44 */ 45/*- 46 * Copyright (c) 2003 Networks Associates Technology, Inc. 47 * All rights reserved. 48 * 49 * This software was developed for the FreeBSD Project by Jake Burkholder, 50 * Safeport Network Services, and Network Associates Laboratories, the 51 * Security Research Division of Network Associates, Inc. under 52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 53 * CHATS research program. 54 * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 1. Redistributions of source code must retain the above copyright 59 * notice, this list of conditions and the following disclaimer. 60 * 2. Redistributions in binary form must reproduce the above copyright 61 * notice, this list of conditions and the following disclaimer in the 62 * documentation and/or other materials provided with the distribution. 63 * 64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 74 * SUCH DAMAGE. 75 */ 76 77#include <sys/cdefs.h> 78__FBSDID("$FreeBSD: head/sys/i386/i386/pmap.c 175067 2008-01-03 07:34:34Z alc $"); 79 80/* 81 * Manages physical address maps. 82 * 83 * In addition to hardware address maps, this 84 * module is called upon to provide software-use-only 85 * maps which may or may not be stored in the same 86 * form as hardware maps. These pseudo-maps are 87 * used to store intermediate results from copy 88 * operations to and from address spaces. 89 * 90 * Since the information managed by this module is 91 * also stored by the logical address mapping module, 92 * this module may throw away valid virtual-to-physical 93 * mappings at almost any time. However, invalidations 94 * of virtual-to-physical mappings must be done as 95 * requested. 96 * 97 * In order to cope with hardware architectures which 98 * make virtual-to-physical map invalidates expensive, 99 * this module may delay invalidate or reduced protection 100 * operations until such time as they are actually 101 * necessary. This module is given full information as 102 * to which processors are currently using which maps, 103 * and to when physical maps must be made correct. 104 */ 105 106#include "opt_cpu.h" 107#include "opt_pmap.h" 108#include "opt_msgbuf.h" 109#include "opt_smp.h" 110#include "opt_xbox.h" 111 112#include <sys/param.h> 113#include <sys/systm.h> 114#include <sys/kernel.h> 115#include <sys/lock.h> 116#include <sys/malloc.h> 117#include <sys/mman.h> 118#include <sys/msgbuf.h> 119#include <sys/mutex.h> 120#include <sys/proc.h> 121#include <sys/sx.h> 122#include <sys/vmmeter.h> 123#include <sys/sched.h> 124#include <sys/sysctl.h> 125#ifdef SMP 126#include <sys/smp.h> 127#endif 128 129#include <vm/vm.h> 130#include <vm/vm_param.h> 131#include <vm/vm_kern.h> 132#include <vm/vm_page.h> 133#include <vm/vm_map.h> 134#include <vm/vm_object.h> 135#include <vm/vm_extern.h> 136#include <vm/vm_pageout.h> 137#include <vm/vm_pager.h> 138#include <vm/uma.h> 139 140#include <machine/cpu.h> 141#include <machine/cputypes.h> 142#include <machine/md_var.h> 143#include <machine/pcb.h> 144#include <machine/specialreg.h> 145#ifdef SMP 146#include <machine/smp.h> 147#endif 148 149#ifdef XBOX 150#include <machine/xbox.h> 151#endif 152 153#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 154#define CPU_ENABLE_SSE 155#endif 156 157#ifndef PMAP_SHPGPERPROC 158#define PMAP_SHPGPERPROC 200 159#endif 160 161#if defined(DIAGNOSTIC) 162#define PMAP_DIAGNOSTIC 163#endif 164 165#if !defined(PMAP_DIAGNOSTIC) 166#define PMAP_INLINE __gnu89_inline 167#else 168#define PMAP_INLINE 169#endif 170 171#define PV_STATS 172#ifdef PV_STATS 173#define PV_STAT(x) do { x ; } while (0) 174#else 175#define PV_STAT(x) do { } while (0) 176#endif 177 178/* 179 * Get PDEs and PTEs for user/kernel address space 180 */ 181#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 182#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 183 184#define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 185#define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 186#define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 187#define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 188#define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 189 190#define pmap_pte_set_w(pte, v) ((v) ? atomic_set_int((u_int *)(pte), PG_W) : \ 191 atomic_clear_int((u_int *)(pte), PG_W)) 192#define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 193 194struct pmap kernel_pmap_store; 195LIST_HEAD(pmaplist, pmap); 196static struct pmaplist allpmaps; 197static struct mtx allpmaps_lock; 198 199vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 200vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 201int pgeflag = 0; /* PG_G or-in */ 202int pseflag = 0; /* PG_PS or-in */ 203 204static int nkpt; 205vm_offset_t kernel_vm_end; 206extern u_int32_t KERNend; 207 208#ifdef PAE 209pt_entry_t pg_nx; 210static uma_zone_t pdptzone; 211#endif 212 213/* 214 * Data for the pv entry allocation mechanism 215 */ 216static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 217static int shpgperproc = PMAP_SHPGPERPROC; 218 219struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */ 220int pv_maxchunks; /* How many chunks we have KVA for */ 221vm_offset_t pv_vafree; /* freelist stored in the PTE */ 222 223/* 224 * All those kernel PT submaps that BSD is so fond of 225 */ 226struct sysmaps { 227 struct mtx lock; 228 pt_entry_t *CMAP1; 229 pt_entry_t *CMAP2; 230 caddr_t CADDR1; 231 caddr_t CADDR2; 232}; 233static struct sysmaps sysmaps_pcpu[MAXCPU]; 234pt_entry_t *CMAP1 = 0; 235static pt_entry_t *CMAP3; 236caddr_t CADDR1 = 0, ptvmmap = 0; 237static caddr_t CADDR3; 238struct msgbuf *msgbufp = 0; 239 240/* 241 * Crashdump maps. 242 */ 243static caddr_t crashdumpmap; 244 245static pt_entry_t *PMAP1 = 0, *PMAP2; 246static pt_entry_t *PADDR1 = 0, *PADDR2; 247#ifdef SMP 248static int PMAP1cpu; 249static int PMAP1changedcpu; 250SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD, 251 &PMAP1changedcpu, 0, 252 "Number of times pmap_pte_quick changed CPU with same PMAP1"); 253#endif 254static int PMAP1changed; 255SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD, 256 &PMAP1changed, 0, 257 "Number of times pmap_pte_quick changed PMAP1"); 258static int PMAP1unchanged; 259SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD, 260 &PMAP1unchanged, 0, 261 "Number of times pmap_pte_quick didn't change PMAP1"); 262static struct mtx PMAP2mutex; 263 264static void free_pv_entry(pmap_t pmap, pv_entry_t pv); 265static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try); 266 267static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, 268 vm_page_t m, vm_prot_t prot, vm_page_t mpte); 269static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva, 270 vm_page_t *free); 271static void pmap_remove_page(struct pmap *pmap, vm_offset_t va, 272 vm_page_t *free); 273static void pmap_remove_entry(struct pmap *pmap, vm_page_t m, 274 vm_offset_t va); 275static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m); 276static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, 277 vm_page_t m); 278 279static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags); 280 281static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags); 282static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free); 283static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va); 284static void pmap_pte_release(pt_entry_t *pte); 285static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *); 286static vm_offset_t pmap_kmem_choose(vm_offset_t addr); 287#ifdef PAE 288static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 289#endif 290 291CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 292CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 293 294/* 295 * Move the kernel virtual free pointer to the next 296 * 4MB. This is used to help improve performance 297 * by using a large (4MB) page for much of the kernel 298 * (.text, .data, .bss) 299 */ 300static vm_offset_t 301pmap_kmem_choose(vm_offset_t addr) 302{ 303 vm_offset_t newaddr = addr; 304 305#ifndef DISABLE_PSE 306 if (cpu_feature & CPUID_PSE) 307 newaddr = (addr + PDRMASK) & ~PDRMASK; 308#endif 309 return newaddr; 310} 311 312/* 313 * Bootstrap the system enough to run with virtual memory. 314 * 315 * On the i386 this is called after mapping has already been enabled 316 * and just syncs the pmap module with what has already been done. 317 * [We can't call it easily with mapping off since the kernel is not 318 * mapped with PA == VA, hence we would have to relocate every address 319 * from the linked base (virtual) address "KERNBASE" to the actual 320 * (physical) address starting relative to 0] 321 */ 322void 323pmap_bootstrap(vm_paddr_t firstaddr) 324{ 325 vm_offset_t va; 326 pt_entry_t *pte, *unused; 327 struct sysmaps *sysmaps; 328 int i; 329 330 /* 331 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 332 * large. It should instead be correctly calculated in locore.s and 333 * not based on 'first' (which is a physical address, not a virtual 334 * address, for the start of unused physical memory). The kernel 335 * page tables are NOT double mapped and thus should not be included 336 * in this calculation. 337 */ 338 virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 339 virtual_avail = pmap_kmem_choose(virtual_avail); 340 341 virtual_end = VM_MAX_KERNEL_ADDRESS; 342 343 /* 344 * Initialize the kernel pmap (which is statically allocated). 345 */ 346 PMAP_LOCK_INIT(kernel_pmap); 347 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 348#ifdef PAE 349 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 350#endif 351 kernel_pmap->pm_active = -1; /* don't allow deactivation */ 352 TAILQ_INIT(&kernel_pmap->pm_pvchunk); 353 LIST_INIT(&allpmaps); 354 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 355 mtx_lock_spin(&allpmaps_lock); 356 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 357 mtx_unlock_spin(&allpmaps_lock); 358 nkpt = NKPT; 359 360 /* 361 * Reserve some special page table entries/VA space for temporary 362 * mapping of pages. 363 */ 364#define SYSMAP(c, p, v, n) \ 365 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 366 367 va = virtual_avail; 368 pte = vtopte(va); 369 370 /* 371 * CMAP1/CMAP2 are used for zeroing and copying pages. 372 * CMAP3 is used for the idle process page zeroing. 373 */ 374 for (i = 0; i < MAXCPU; i++) { 375 sysmaps = &sysmaps_pcpu[i]; 376 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF); 377 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1) 378 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1) 379 } 380 SYSMAP(caddr_t, CMAP1, CADDR1, 1) 381 SYSMAP(caddr_t, CMAP3, CADDR3, 1) 382 *CMAP3 = 0; 383 384 /* 385 * Crashdump maps. 386 */ 387 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS) 388 389 /* 390 * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 391 */ 392 SYSMAP(caddr_t, unused, ptvmmap, 1) 393 394 /* 395 * msgbufp is used to map the system message buffer. 396 */ 397 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE))) 398 399 /* 400 * ptemap is used for pmap_pte_quick 401 */ 402 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 403 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1); 404 405 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF); 406 407 virtual_avail = va; 408 409 *CMAP1 = 0; 410 411 /* 412 * Leave in place an identity mapping (virt == phys) for the low 1 MB 413 * physical memory region that is used by the ACPI wakeup code. This 414 * mapping must not have PG_G set. 415 */ 416#ifdef XBOX 417 /* FIXME: This is gross, but needed for the XBOX. Since we are in such 418 * an early stadium, we cannot yet neatly map video memory ... :-( 419 * Better fixes are very welcome! */ 420 if (!arch_i386_is_xbox) 421#endif 422 for (i = 1; i < NKPT; i++) 423 PTD[i] = 0; 424 425 /* Initialize the PAT MSR if present. */ 426 pmap_init_pat(); 427 428 /* Turn on PG_G on kernel page(s) */ 429 pmap_set_pg(); 430} 431 432/* 433 * Setup the PAT MSR. 434 */ 435void 436pmap_init_pat(void) 437{ 438 uint64_t pat_msr; 439 440 /* Bail if this CPU doesn't implement PAT. */ 441 if (!(cpu_feature & CPUID_PAT)) 442 return; 443 444#ifdef PAT_WORKS 445 /* 446 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-. 447 * Program 4 and 5 as WP and WC. 448 * Leave 6 and 7 as UC and UC-. 449 */ 450 pat_msr = rdmsr(MSR_PAT); 451 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5)); 452 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) | 453 PAT_VALUE(5, PAT_WRITE_COMBINING); 454#else 455 /* 456 * Due to some Intel errata, we can only safely use the lower 4 457 * PAT entries. Thus, just replace PAT Index 2 with WC instead 458 * of UC-. 459 * 460 * Intel Pentium III Processor Specification Update 461 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B 462 * or Mode C Paging) 463 * 464 * Intel Pentium IV Processor Specification Update 465 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly) 466 */ 467 pat_msr = rdmsr(MSR_PAT); 468 pat_msr &= ~PAT_MASK(2); 469 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING); 470#endif 471 wrmsr(MSR_PAT, pat_msr); 472} 473 474/* 475 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on. 476 */ 477void 478pmap_set_pg(void) 479{ 480 pd_entry_t pdir; 481 pt_entry_t *pte; 482 vm_offset_t va, endva; 483 int i; 484 485 if (pgeflag == 0) 486 return; 487 488 i = KERNLOAD/NBPDR; 489 endva = KERNBASE + KERNend; 490 491 if (pseflag) { 492 va = KERNBASE + KERNLOAD; 493 while (va < endva) { 494 pdir = kernel_pmap->pm_pdir[KPTDI+i]; 495 pdir |= pgeflag; 496 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir; 497 invltlb(); /* Play it safe, invltlb() every time */ 498 i++; 499 va += NBPDR; 500 } 501 } else { 502 va = (vm_offset_t)btext; 503 while (va < endva) { 504 pte = vtopte(va); 505 if (*pte) 506 *pte |= pgeflag; 507 invltlb(); /* Play it safe, invltlb() every time */ 508 va += PAGE_SIZE; 509 } 510 } 511} 512 513/* 514 * Initialize a vm_page's machine-dependent fields. 515 */ 516void 517pmap_page_init(vm_page_t m) 518{ 519 520 TAILQ_INIT(&m->md.pv_list); 521 m->md.pv_list_count = 0; 522} 523 524#ifdef PAE 525 526static MALLOC_DEFINE(M_PMAPPDPT, "pmap", "pmap pdpt"); 527 528static void * 529pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 530{ 531 *flags = UMA_SLAB_PRIV; 532 return (contigmalloc(PAGE_SIZE, M_PMAPPDPT, 0, 0x0ULL, 0xffffffffULL, 533 1, 0)); 534} 535#endif 536 537/* 538 * ABuse the pte nodes for unmapped kva to thread a kva freelist through. 539 * Requirements: 540 * - Must deal with pages in order to ensure that none of the PG_* bits 541 * are ever set, PG_V in particular. 542 * - Assumes we can write to ptes without pte_store() atomic ops, even 543 * on PAE systems. This should be ok. 544 * - Assumes nothing will ever test these addresses for 0 to indicate 545 * no mapping instead of correctly checking PG_V. 546 * - Assumes a vm_offset_t will fit in a pte (true for i386). 547 * Because PG_V is never set, there can be no mappings to invalidate. 548 */ 549static vm_offset_t 550pmap_ptelist_alloc(vm_offset_t *head) 551{ 552 pt_entry_t *pte; 553 vm_offset_t va; 554 555 va = *head; 556 if (va == 0) 557 return (va); /* Out of memory */ 558 pte = vtopte(va); 559 *head = *pte; 560 if (*head & PG_V) 561 panic("pmap_ptelist_alloc: va with PG_V set!"); 562 *pte = 0; 563 return (va); 564} 565 566static void 567pmap_ptelist_free(vm_offset_t *head, vm_offset_t va) 568{ 569 pt_entry_t *pte; 570 571 if (va & PG_V) 572 panic("pmap_ptelist_free: freeing va with PG_V set!"); 573 pte = vtopte(va); 574 *pte = *head; /* virtual! PG_V is 0 though */ 575 *head = va; 576} 577 578static void 579pmap_ptelist_init(vm_offset_t *head, void *base, int npages) 580{ 581 int i; 582 vm_offset_t va; 583 584 *head = 0; 585 for (i = npages - 1; i >= 0; i--) { 586 va = (vm_offset_t)base + i * PAGE_SIZE; 587 pmap_ptelist_free(head, va); 588 } 589} 590 591 592/* 593 * Initialize the pmap module. 594 * Called by vm_init, to initialize any structures that the pmap 595 * system needs to map virtual memory. 596 */ 597void 598pmap_init(void) 599{ 600 601 /* 602 * Initialize the address space (zone) for the pv entries. Set a 603 * high water mark so that the system can recover from excessive 604 * numbers of pv entries. 605 */ 606 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 607 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count; 608 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 609 pv_entry_max = roundup(pv_entry_max, _NPCPV); 610 pv_entry_high_water = 9 * (pv_entry_max / 10); 611 612 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc); 613 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map, 614 PAGE_SIZE * pv_maxchunks); 615 if (pv_chunkbase == NULL) 616 panic("pmap_init: not enough kvm for pv chunks"); 617 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks); 618#ifdef PAE 619 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL, 620 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1, 621 UMA_ZONE_VM | UMA_ZONE_NOFREE); 622 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf); 623#endif 624} 625 626 627SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters"); 628SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0, 629 "Max number of PV entries"); 630SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0, 631 "Page share factor per proc"); 632 633/*************************************************** 634 * Low level helper routines..... 635 ***************************************************/ 636 637/* 638 * Determine the appropriate bits to set in a PTE or PDE for a specified 639 * caching mode. 640 */ 641static int 642pmap_cache_bits(int mode, boolean_t is_pde) 643{ 644 int pat_flag, pat_index, cache_bits; 645 646 /* The PAT bit is different for PTE's and PDE's. */ 647 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT; 648 649 /* If we don't support PAT, map extended modes to older ones. */ 650 if (!(cpu_feature & CPUID_PAT)) { 651 switch (mode) { 652 case PAT_UNCACHEABLE: 653 case PAT_WRITE_THROUGH: 654 case PAT_WRITE_BACK: 655 break; 656 case PAT_UNCACHED: 657 case PAT_WRITE_COMBINING: 658 case PAT_WRITE_PROTECTED: 659 mode = PAT_UNCACHEABLE; 660 break; 661 } 662 } 663 664 /* Map the caching mode to a PAT index. */ 665 switch (mode) { 666#ifdef PAT_WORKS 667 case PAT_UNCACHEABLE: 668 pat_index = 3; 669 break; 670 case PAT_WRITE_THROUGH: 671 pat_index = 1; 672 break; 673 case PAT_WRITE_BACK: 674 pat_index = 0; 675 break; 676 case PAT_UNCACHED: 677 pat_index = 2; 678 break; 679 case PAT_WRITE_COMBINING: 680 pat_index = 5; 681 break; 682 case PAT_WRITE_PROTECTED: 683 pat_index = 4; 684 break; 685#else 686 case PAT_UNCACHED: 687 case PAT_UNCACHEABLE: 688 case PAT_WRITE_PROTECTED: 689 pat_index = 3; 690 break; 691 case PAT_WRITE_THROUGH: 692 pat_index = 1; 693 break; 694 case PAT_WRITE_BACK: 695 pat_index = 0; 696 break; 697 case PAT_WRITE_COMBINING: 698 pat_index = 2; 699 break; 700#endif 701 default: 702 panic("Unknown caching mode %d\n", mode); 703 } 704 705 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */ 706 cache_bits = 0; 707 if (pat_index & 0x4) 708 cache_bits |= pat_flag; 709 if (pat_index & 0x2) 710 cache_bits |= PG_NC_PCD; 711 if (pat_index & 0x1) 712 cache_bits |= PG_NC_PWT; 713 return (cache_bits); 714} 715#ifdef SMP 716/* 717 * For SMP, these functions have to use the IPI mechanism for coherence. 718 * 719 * N.B.: Before calling any of the following TLB invalidation functions, 720 * the calling processor must ensure that all stores updating a non- 721 * kernel page table are globally performed. Otherwise, another 722 * processor could cache an old, pre-update entry without being 723 * invalidated. This can happen one of two ways: (1) The pmap becomes 724 * active on another processor after its pm_active field is checked by 725 * one of the following functions but before a store updating the page 726 * table is globally performed. (2) The pmap becomes active on another 727 * processor before its pm_active field is checked but due to 728 * speculative loads one of the following functions stills reads the 729 * pmap as inactive on the other processor. 730 * 731 * The kernel page table is exempt because its pm_active field is 732 * immutable. The kernel page table is always active on every 733 * processor. 734 */ 735void 736pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 737{ 738 u_int cpumask; 739 u_int other_cpus; 740 741 sched_pin(); 742 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 743 invlpg(va); 744 smp_invlpg(va); 745 } else { 746 cpumask = PCPU_GET(cpumask); 747 other_cpus = PCPU_GET(other_cpus); 748 if (pmap->pm_active & cpumask) 749 invlpg(va); 750 if (pmap->pm_active & other_cpus) 751 smp_masked_invlpg(pmap->pm_active & other_cpus, va); 752 } 753 sched_unpin(); 754} 755 756void 757pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 758{ 759 u_int cpumask; 760 u_int other_cpus; 761 vm_offset_t addr; 762 763 sched_pin(); 764 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 765 for (addr = sva; addr < eva; addr += PAGE_SIZE) 766 invlpg(addr); 767 smp_invlpg_range(sva, eva); 768 } else { 769 cpumask = PCPU_GET(cpumask); 770 other_cpus = PCPU_GET(other_cpus); 771 if (pmap->pm_active & cpumask) 772 for (addr = sva; addr < eva; addr += PAGE_SIZE) 773 invlpg(addr); 774 if (pmap->pm_active & other_cpus) 775 smp_masked_invlpg_range(pmap->pm_active & other_cpus, 776 sva, eva); 777 } 778 sched_unpin(); 779} 780 781void 782pmap_invalidate_all(pmap_t pmap) 783{ 784 u_int cpumask; 785 u_int other_cpus; 786 787 sched_pin(); 788 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 789 invltlb(); 790 smp_invltlb(); 791 } else { 792 cpumask = PCPU_GET(cpumask); 793 other_cpus = PCPU_GET(other_cpus); 794 if (pmap->pm_active & cpumask) 795 invltlb(); 796 if (pmap->pm_active & other_cpus) 797 smp_masked_invltlb(pmap->pm_active & other_cpus); 798 } 799 sched_unpin(); 800} 801 802void 803pmap_invalidate_cache(void) 804{ 805 806 sched_pin(); 807 wbinvd(); 808 smp_cache_flush(); 809 sched_unpin(); 810} 811#else /* !SMP */ 812/* 813 * Normal, non-SMP, 486+ invalidation functions. 814 * We inline these within pmap.c for speed. 815 */ 816PMAP_INLINE void 817pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 818{ 819 820 if (pmap == kernel_pmap || pmap->pm_active) 821 invlpg(va); 822} 823 824PMAP_INLINE void 825pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 826{ 827 vm_offset_t addr; 828 829 if (pmap == kernel_pmap || pmap->pm_active) 830 for (addr = sva; addr < eva; addr += PAGE_SIZE) 831 invlpg(addr); 832} 833 834PMAP_INLINE void 835pmap_invalidate_all(pmap_t pmap) 836{ 837 838 if (pmap == kernel_pmap || pmap->pm_active) 839 invltlb(); 840} 841 842PMAP_INLINE void 843pmap_invalidate_cache(void) 844{ 845 846 wbinvd(); 847} 848#endif /* !SMP */ 849 850/* 851 * Are we current address space or kernel? N.B. We return FALSE when 852 * a pmap's page table is in use because a kernel thread is borrowing 853 * it. The borrowed page table can change spontaneously, making any 854 * dependence on its continued use subject to a race condition. 855 */ 856static __inline int 857pmap_is_current(pmap_t pmap) 858{ 859 860 return (pmap == kernel_pmap || 861 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) && 862 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME))); 863} 864 865/* 866 * If the given pmap is not the current or kernel pmap, the returned pte must 867 * be released by passing it to pmap_pte_release(). 868 */ 869pt_entry_t * 870pmap_pte(pmap_t pmap, vm_offset_t va) 871{ 872 pd_entry_t newpf; 873 pd_entry_t *pde; 874 875 pde = pmap_pde(pmap, va); 876 if (*pde & PG_PS) 877 return (pde); 878 if (*pde != 0) { 879 /* are we current address space or kernel? */ 880 if (pmap_is_current(pmap)) 881 return (vtopte(va)); 882 mtx_lock(&PMAP2mutex); 883 newpf = *pde & PG_FRAME; 884 if ((*PMAP2 & PG_FRAME) != newpf) { 885 *PMAP2 = newpf | PG_RW | PG_V | PG_A | PG_M; 886 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2); 887 } 888 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1))); 889 } 890 return (0); 891} 892 893/* 894 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte 895 * being NULL. 896 */ 897static __inline void 898pmap_pte_release(pt_entry_t *pte) 899{ 900 901 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) 902 mtx_unlock(&PMAP2mutex); 903} 904 905static __inline void 906invlcaddr(void *caddr) 907{ 908 909 invlpg((u_int)caddr); 910} 911 912/* 913 * Super fast pmap_pte routine best used when scanning 914 * the pv lists. This eliminates many coarse-grained 915 * invltlb calls. Note that many of the pv list 916 * scans are across different pmaps. It is very wasteful 917 * to do an entire invltlb for checking a single mapping. 918 * 919 * If the given pmap is not the current pmap, vm_page_queue_mtx 920 * must be held and curthread pinned to a CPU. 921 */ 922static pt_entry_t * 923pmap_pte_quick(pmap_t pmap, vm_offset_t va) 924{ 925 pd_entry_t newpf; 926 pd_entry_t *pde; 927 928 pde = pmap_pde(pmap, va); 929 if (*pde & PG_PS) 930 return (pde); 931 if (*pde != 0) { 932 /* are we current address space or kernel? */ 933 if (pmap_is_current(pmap)) 934 return (vtopte(va)); 935 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 936 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 937 newpf = *pde & PG_FRAME; 938 if ((*PMAP1 & PG_FRAME) != newpf) { 939 *PMAP1 = newpf | PG_RW | PG_V | PG_A | PG_M; 940#ifdef SMP 941 PMAP1cpu = PCPU_GET(cpuid); 942#endif 943 invlcaddr(PADDR1); 944 PMAP1changed++; 945 } else 946#ifdef SMP 947 if (PMAP1cpu != PCPU_GET(cpuid)) { 948 PMAP1cpu = PCPU_GET(cpuid); 949 invlcaddr(PADDR1); 950 PMAP1changedcpu++; 951 } else 952#endif 953 PMAP1unchanged++; 954 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1))); 955 } 956 return (0); 957} 958 959/* 960 * Routine: pmap_extract 961 * Function: 962 * Extract the physical page address associated 963 * with the given map/virtual_address pair. 964 */ 965vm_paddr_t 966pmap_extract(pmap_t pmap, vm_offset_t va) 967{ 968 vm_paddr_t rtval; 969 pt_entry_t *pte; 970 pd_entry_t pde; 971 972 rtval = 0; 973 PMAP_LOCK(pmap); 974 pde = pmap->pm_pdir[va >> PDRSHIFT]; 975 if (pde != 0) { 976 if ((pde & PG_PS) != 0) { 977 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK); 978 PMAP_UNLOCK(pmap); 979 return rtval; 980 } 981 pte = pmap_pte(pmap, va); 982 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK); 983 pmap_pte_release(pte); 984 } 985 PMAP_UNLOCK(pmap); 986 return (rtval); 987} 988 989/* 990 * Routine: pmap_extract_and_hold 991 * Function: 992 * Atomically extract and hold the physical page 993 * with the given pmap and virtual address pair 994 * if that mapping permits the given protection. 995 */ 996vm_page_t 997pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 998{ 999 pd_entry_t pde; 1000 pt_entry_t pte; 1001 vm_page_t m; 1002 1003 m = NULL; 1004 vm_page_lock_queues(); 1005 PMAP_LOCK(pmap); 1006 pde = *pmap_pde(pmap, va); 1007 if (pde != 0) { 1008 if (pde & PG_PS) { 1009 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) { 1010 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) | 1011 (va & PDRMASK)); 1012 vm_page_hold(m); 1013 } 1014 } else { 1015 sched_pin(); 1016 pte = *pmap_pte_quick(pmap, va); 1017 if (pte != 0 && 1018 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) { 1019 m = PHYS_TO_VM_PAGE(pte & PG_FRAME); 1020 vm_page_hold(m); 1021 } 1022 sched_unpin(); 1023 } 1024 } 1025 vm_page_unlock_queues(); 1026 PMAP_UNLOCK(pmap); 1027 return (m); 1028} 1029 1030/*************************************************** 1031 * Low level mapping routines..... 1032 ***************************************************/ 1033 1034/* 1035 * Add a wired page to the kva. 1036 * Note: not SMP coherent. 1037 */ 1038PMAP_INLINE void 1039pmap_kenter(vm_offset_t va, vm_paddr_t pa) 1040{ 1041 pt_entry_t *pte; 1042 1043 pte = vtopte(va); 1044 pte_store(pte, pa | PG_RW | PG_V | pgeflag); 1045} 1046 1047PMAP_INLINE void 1048pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode) 1049{ 1050 pt_entry_t *pte; 1051 1052 pte = vtopte(va); 1053 pte_store(pte, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0)); 1054} 1055 1056/* 1057 * Remove a page from the kernel pagetables. 1058 * Note: not SMP coherent. 1059 */ 1060PMAP_INLINE void 1061pmap_kremove(vm_offset_t va) 1062{ 1063 pt_entry_t *pte; 1064 1065 pte = vtopte(va); 1066 pte_clear(pte); 1067} 1068 1069/* 1070 * Used to map a range of physical addresses into kernel 1071 * virtual address space. 1072 * 1073 * The value passed in '*virt' is a suggested virtual address for 1074 * the mapping. Architectures which can support a direct-mapped 1075 * physical to virtual region can return the appropriate address 1076 * within that region, leaving '*virt' unchanged. Other 1077 * architectures should map the pages starting at '*virt' and 1078 * update '*virt' with the first usable address after the mapped 1079 * region. 1080 */ 1081vm_offset_t 1082pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 1083{ 1084 vm_offset_t va, sva; 1085 1086 va = sva = *virt; 1087 while (start < end) { 1088 pmap_kenter(va, start); 1089 va += PAGE_SIZE; 1090 start += PAGE_SIZE; 1091 } 1092 pmap_invalidate_range(kernel_pmap, sva, va); 1093 *virt = va; 1094 return (sva); 1095} 1096 1097 1098/* 1099 * Add a list of wired pages to the kva 1100 * this routine is only used for temporary 1101 * kernel mappings that do not need to have 1102 * page modification or references recorded. 1103 * Note that old mappings are simply written 1104 * over. The page *must* be wired. 1105 * Note: SMP coherent. Uses a ranged shootdown IPI. 1106 */ 1107void 1108pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count) 1109{ 1110 pt_entry_t *endpte, oldpte, *pte; 1111 1112 oldpte = 0; 1113 pte = vtopte(sva); 1114 endpte = pte + count; 1115 while (pte < endpte) { 1116 oldpte |= *pte; 1117 pte_store(pte, VM_PAGE_TO_PHYS(*ma) | pgeflag | PG_RW | PG_V); 1118 pte++; 1119 ma++; 1120 } 1121 if ((oldpte & PG_V) != 0) 1122 pmap_invalidate_range(kernel_pmap, sva, sva + count * 1123 PAGE_SIZE); 1124} 1125 1126/* 1127 * This routine tears out page mappings from the 1128 * kernel -- it is meant only for temporary mappings. 1129 * Note: SMP coherent. Uses a ranged shootdown IPI. 1130 */ 1131void 1132pmap_qremove(vm_offset_t sva, int count) 1133{ 1134 vm_offset_t va; 1135 1136 va = sva; 1137 while (count-- > 0) { 1138 pmap_kremove(va); 1139 va += PAGE_SIZE; 1140 } 1141 pmap_invalidate_range(kernel_pmap, sva, va); 1142} 1143 1144/*************************************************** 1145 * Page table page management routines..... 1146 ***************************************************/ 1147static __inline void 1148pmap_free_zero_pages(vm_page_t free) 1149{ 1150 vm_page_t m; 1151 1152 while (free != NULL) { 1153 m = free; 1154 free = m->right; 1155 vm_page_free_zero(m); 1156 } 1157} 1158 1159/* 1160 * This routine unholds page table pages, and if the hold count 1161 * drops to zero, then it decrements the wire count. 1162 */ 1163static __inline int 1164pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1165{ 1166 1167 --m->wire_count; 1168 if (m->wire_count == 0) 1169 return _pmap_unwire_pte_hold(pmap, m, free); 1170 else 1171 return 0; 1172} 1173 1174static int 1175_pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1176{ 1177 vm_offset_t pteva; 1178 1179 /* 1180 * unmap the page table page 1181 */ 1182 pmap->pm_pdir[m->pindex] = 0; 1183 --pmap->pm_stats.resident_count; 1184 1185 /* 1186 * This is a release store so that the ordinary store unmapping 1187 * the page table page is globally performed before TLB shoot- 1188 * down is begun. 1189 */ 1190 atomic_subtract_rel_int(&cnt.v_wire_count, 1); 1191 1192 /* 1193 * Do an invltlb to make the invalidated mapping 1194 * take effect immediately. 1195 */ 1196 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1197 pmap_invalidate_page(pmap, pteva); 1198 1199 /* 1200 * Put page on a list so that it is released after 1201 * *ALL* TLB shootdown is done 1202 */ 1203 m->right = *free; 1204 *free = m; 1205 1206 return 1; 1207} 1208 1209/* 1210 * After removing a page table entry, this routine is used to 1211 * conditionally free the page, and manage the hold/wire counts. 1212 */ 1213static int 1214pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free) 1215{ 1216 pd_entry_t ptepde; 1217 vm_page_t mpte; 1218 1219 if (va >= VM_MAXUSER_ADDRESS) 1220 return 0; 1221 ptepde = *pmap_pde(pmap, va); 1222 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); 1223 return pmap_unwire_pte_hold(pmap, mpte, free); 1224} 1225 1226void 1227pmap_pinit0(pmap_t pmap) 1228{ 1229 1230 PMAP_LOCK_INIT(pmap); 1231 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1232#ifdef PAE 1233 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1234#endif 1235 pmap->pm_active = 0; 1236 PCPU_SET(curpmap, pmap); 1237 TAILQ_INIT(&pmap->pm_pvchunk); 1238 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1239 mtx_lock_spin(&allpmaps_lock); 1240 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1241 mtx_unlock_spin(&allpmaps_lock); 1242} 1243 1244/* 1245 * Initialize a preallocated and zeroed pmap structure, 1246 * such as one in a vmspace structure. 1247 */ 1248int 1249pmap_pinit(pmap_t pmap) 1250{ 1251 vm_page_t m, ptdpg[NPGPTD]; 1252 vm_paddr_t pa; 1253 static int color; 1254 int i; 1255 1256 PMAP_LOCK_INIT(pmap); 1257 1258 /* 1259 * No need to allocate page table space yet but we do need a valid 1260 * page directory table. 1261 */ 1262 if (pmap->pm_pdir == NULL) { 1263 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1264 NBPTD); 1265 1266 if (pmap->pm_pdir == NULL) { 1267 PMAP_LOCK_DESTROY(pmap); 1268 return (0); 1269 } 1270#ifdef PAE 1271 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO); 1272 KASSERT(((vm_offset_t)pmap->pm_pdpt & 1273 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0, 1274 ("pmap_pinit: pdpt misaligned")); 1275 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30), 1276 ("pmap_pinit: pdpt above 4g")); 1277#endif 1278 } 1279 1280 /* 1281 * allocate the page directory page(s) 1282 */ 1283 for (i = 0; i < NPGPTD;) { 1284 m = vm_page_alloc(NULL, color++, 1285 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1286 VM_ALLOC_ZERO); 1287 if (m == NULL) 1288 VM_WAIT; 1289 else { 1290 ptdpg[i++] = m; 1291 } 1292 } 1293 1294 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1295 1296 for (i = 0; i < NPGPTD; i++) { 1297 if ((ptdpg[i]->flags & PG_ZERO) == 0) 1298 bzero(pmap->pm_pdir + (i * NPDEPG), PAGE_SIZE); 1299 } 1300 1301 mtx_lock_spin(&allpmaps_lock); 1302 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1303 mtx_unlock_spin(&allpmaps_lock); 1304 /* Wire in kernel global address entries. */ 1305 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1306 1307 /* install self-referential address mapping entry(s) */ 1308 for (i = 0; i < NPGPTD; i++) { 1309 pa = VM_PAGE_TO_PHYS(ptdpg[i]); 1310 pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M; 1311#ifdef PAE 1312 pmap->pm_pdpt[i] = pa | PG_V; 1313#endif 1314 } 1315 1316 pmap->pm_active = 0; 1317 TAILQ_INIT(&pmap->pm_pvchunk); 1318 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1319 1320 return (1); 1321} 1322 1323/* 1324 * this routine is called if the page table page is not 1325 * mapped correctly. 1326 */ 1327static vm_page_t 1328_pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags) 1329{ 1330 vm_paddr_t ptepa; 1331 vm_page_t m; 1332 1333 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1334 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1335 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1336 1337 /* 1338 * Allocate a page table page. 1339 */ 1340 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1341 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1342 if (flags & M_WAITOK) { 1343 PMAP_UNLOCK(pmap); 1344 vm_page_unlock_queues(); 1345 VM_WAIT; 1346 vm_page_lock_queues(); 1347 PMAP_LOCK(pmap); 1348 } 1349 1350 /* 1351 * Indicate the need to retry. While waiting, the page table 1352 * page may have been allocated. 1353 */ 1354 return (NULL); 1355 } 1356 if ((m->flags & PG_ZERO) == 0) 1357 pmap_zero_page(m); 1358 1359 /* 1360 * Map the pagetable page into the process address space, if 1361 * it isn't already there. 1362 */ 1363 1364 pmap->pm_stats.resident_count++; 1365 1366 ptepa = VM_PAGE_TO_PHYS(m); 1367 pmap->pm_pdir[ptepindex] = 1368 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M); 1369 1370 return m; 1371} 1372 1373static vm_page_t 1374pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags) 1375{ 1376 unsigned ptepindex; 1377 pd_entry_t ptepa; 1378 vm_page_t m; 1379 1380 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1381 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1382 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1383 1384 /* 1385 * Calculate pagetable page index 1386 */ 1387 ptepindex = va >> PDRSHIFT; 1388retry: 1389 /* 1390 * Get the page directory entry 1391 */ 1392 ptepa = pmap->pm_pdir[ptepindex]; 1393 1394 /* 1395 * This supports switching from a 4MB page to a 1396 * normal 4K page. 1397 */ 1398 if (ptepa & PG_PS) { 1399 pmap->pm_pdir[ptepindex] = 0; 1400 ptepa = 0; 1401 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1402 pmap_invalidate_all(kernel_pmap); 1403 } 1404 1405 /* 1406 * If the page table page is mapped, we just increment the 1407 * hold count, and activate it. 1408 */ 1409 if (ptepa) { 1410 m = PHYS_TO_VM_PAGE(ptepa & PG_FRAME); 1411 m->wire_count++; 1412 } else { 1413 /* 1414 * Here if the pte page isn't mapped, or if it has 1415 * been deallocated. 1416 */ 1417 m = _pmap_allocpte(pmap, ptepindex, flags); 1418 if (m == NULL && (flags & M_WAITOK)) 1419 goto retry; 1420 } 1421 return (m); 1422} 1423 1424 1425/*************************************************** 1426* Pmap allocation/deallocation routines. 1427 ***************************************************/ 1428 1429#ifdef SMP 1430/* 1431 * Deal with a SMP shootdown of other users of the pmap that we are 1432 * trying to dispose of. This can be a bit hairy. 1433 */ 1434static u_int *lazymask; 1435static u_int lazyptd; 1436static volatile u_int lazywait; 1437 1438void pmap_lazyfix_action(void); 1439 1440void 1441pmap_lazyfix_action(void) 1442{ 1443 u_int mymask = PCPU_GET(cpumask); 1444 1445#ifdef COUNT_IPIS 1446 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++; 1447#endif 1448 if (rcr3() == lazyptd) 1449 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1450 atomic_clear_int(lazymask, mymask); 1451 atomic_store_rel_int(&lazywait, 1); 1452} 1453 1454static void 1455pmap_lazyfix_self(u_int mymask) 1456{ 1457 1458 if (rcr3() == lazyptd) 1459 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1460 atomic_clear_int(lazymask, mymask); 1461} 1462 1463 1464static void 1465pmap_lazyfix(pmap_t pmap) 1466{ 1467 u_int mymask; 1468 u_int mask; 1469 u_int spins; 1470 1471 while ((mask = pmap->pm_active) != 0) { 1472 spins = 50000000; 1473 mask = mask & -mask; /* Find least significant set bit */ 1474 mtx_lock_spin(&smp_ipi_mtx); 1475#ifdef PAE 1476 lazyptd = vtophys(pmap->pm_pdpt); 1477#else 1478 lazyptd = vtophys(pmap->pm_pdir); 1479#endif 1480 mymask = PCPU_GET(cpumask); 1481 if (mask == mymask) { 1482 lazymask = &pmap->pm_active; 1483 pmap_lazyfix_self(mymask); 1484 } else { 1485 atomic_store_rel_int((u_int *)&lazymask, 1486 (u_int)&pmap->pm_active); 1487 atomic_store_rel_int(&lazywait, 0); 1488 ipi_selected(mask, IPI_LAZYPMAP); 1489 while (lazywait == 0) { 1490 ia32_pause(); 1491 if (--spins == 0) 1492 break; 1493 } 1494 } 1495 mtx_unlock_spin(&smp_ipi_mtx); 1496 if (spins == 0) 1497 printf("pmap_lazyfix: spun for 50000000\n"); 1498 } 1499} 1500 1501#else /* SMP */ 1502 1503/* 1504 * Cleaning up on uniprocessor is easy. For various reasons, we're 1505 * unlikely to have to even execute this code, including the fact 1506 * that the cleanup is deferred until the parent does a wait(2), which 1507 * means that another userland process has run. 1508 */ 1509static void 1510pmap_lazyfix(pmap_t pmap) 1511{ 1512 u_int cr3; 1513 1514 cr3 = vtophys(pmap->pm_pdir); 1515 if (cr3 == rcr3()) { 1516 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1517 pmap->pm_active &= ~(PCPU_GET(cpumask)); 1518 } 1519} 1520#endif /* SMP */ 1521 1522/* 1523 * Release any resources held by the given physical map. 1524 * Called when a pmap initialized by pmap_pinit is being released. 1525 * Should only be called if the map contains no valid mappings. 1526 */ 1527void 1528pmap_release(pmap_t pmap) 1529{ 1530 vm_page_t m, ptdpg[NPGPTD]; 1531 int i; 1532 1533 KASSERT(pmap->pm_stats.resident_count == 0, 1534 ("pmap_release: pmap resident count %ld != 0", 1535 pmap->pm_stats.resident_count)); 1536 1537 pmap_lazyfix(pmap); 1538 mtx_lock_spin(&allpmaps_lock); 1539 LIST_REMOVE(pmap, pm_list); 1540 mtx_unlock_spin(&allpmaps_lock); 1541 1542 for (i = 0; i < NPGPTD; i++) 1543 ptdpg[i] = PHYS_TO_VM_PAGE(pmap->pm_pdir[PTDPTDI + i] & 1544 PG_FRAME); 1545 1546 bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) * 1547 sizeof(*pmap->pm_pdir)); 1548 1549 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1550 1551 for (i = 0; i < NPGPTD; i++) { 1552 m = ptdpg[i]; 1553#ifdef PAE 1554 KASSERT(VM_PAGE_TO_PHYS(m) == (pmap->pm_pdpt[i] & PG_FRAME), 1555 ("pmap_release: got wrong ptd page")); 1556#endif 1557 m->wire_count--; 1558 atomic_subtract_int(&cnt.v_wire_count, 1); 1559 vm_page_free_zero(m); 1560 } 1561 PMAP_LOCK_DESTROY(pmap); 1562} 1563 1564static int 1565kvm_size(SYSCTL_HANDLER_ARGS) 1566{ 1567 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1568 1569 return sysctl_handle_long(oidp, &ksize, 0, req); 1570} 1571SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1572 0, 0, kvm_size, "IU", "Size of KVM"); 1573 1574static int 1575kvm_free(SYSCTL_HANDLER_ARGS) 1576{ 1577 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1578 1579 return sysctl_handle_long(oidp, &kfree, 0, req); 1580} 1581SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1582 0, 0, kvm_free, "IU", "Amount of KVM free"); 1583 1584/* 1585 * grow the number of kernel page table entries, if needed 1586 */ 1587void 1588pmap_growkernel(vm_offset_t addr) 1589{ 1590 struct pmap *pmap; 1591 vm_paddr_t ptppaddr; 1592 vm_page_t nkpg; 1593 pd_entry_t newpdir; 1594 pt_entry_t *pde; 1595 1596 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1597 if (kernel_vm_end == 0) { 1598 kernel_vm_end = KERNBASE; 1599 nkpt = 0; 1600 while (pdir_pde(PTD, kernel_vm_end)) { 1601 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1602 nkpt++; 1603 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1604 kernel_vm_end = kernel_map->max_offset; 1605 break; 1606 } 1607 } 1608 } 1609 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1610 if (addr - 1 >= kernel_map->max_offset) 1611 addr = kernel_map->max_offset; 1612 while (kernel_vm_end < addr) { 1613 if (pdir_pde(PTD, kernel_vm_end)) { 1614 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1615 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1616 kernel_vm_end = kernel_map->max_offset; 1617 break; 1618 } 1619 continue; 1620 } 1621 1622 nkpg = vm_page_alloc(NULL, kernel_vm_end >> PDRSHIFT, 1623 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1624 if (nkpg == NULL) 1625 panic("pmap_growkernel: no memory to grow kernel"); 1626 1627 nkpt++; 1628 1629 pmap_zero_page(nkpg); 1630 ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1631 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1632 pdir_pde(PTD, kernel_vm_end) = newpdir; 1633 1634 mtx_lock_spin(&allpmaps_lock); 1635 LIST_FOREACH(pmap, &allpmaps, pm_list) { 1636 pde = pmap_pde(pmap, kernel_vm_end); 1637 pde_store(pde, newpdir); 1638 } 1639 mtx_unlock_spin(&allpmaps_lock); 1640 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1641 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1642 kernel_vm_end = kernel_map->max_offset; 1643 break; 1644 } 1645 } 1646} 1647 1648 1649/*************************************************** 1650 * page management routines. 1651 ***************************************************/ 1652 1653CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE); 1654CTASSERT(_NPCM == 11); 1655 1656static __inline struct pv_chunk * 1657pv_to_chunk(pv_entry_t pv) 1658{ 1659 1660 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK); 1661} 1662 1663#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap) 1664 1665#define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */ 1666#define PC_FREE10 0x0000fffful /* Free values for index 10 */ 1667 1668static uint32_t pc_freemask[11] = { 1669 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1670 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1671 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1672 PC_FREE0_9, PC_FREE10 1673}; 1674 1675SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0, 1676 "Current number of pv entries"); 1677 1678#ifdef PV_STATS 1679static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail; 1680 1681SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0, 1682 "Current number of pv entry chunks"); 1683SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0, 1684 "Current number of pv entry chunks allocated"); 1685SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0, 1686 "Current number of pv entry chunks frees"); 1687SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0, 1688 "Number of times tried to get a chunk page but failed."); 1689 1690static long pv_entry_frees, pv_entry_allocs; 1691static int pv_entry_spare; 1692 1693SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0, 1694 "Current number of pv entry frees"); 1695SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0, 1696 "Current number of pv entry allocs"); 1697SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0, 1698 "Current number of spare pv entries"); 1699 1700static int pmap_collect_inactive, pmap_collect_active; 1701 1702SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0, 1703 "Current number times pmap_collect called on inactive queue"); 1704SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0, 1705 "Current number times pmap_collect called on active queue"); 1706#endif 1707 1708/* 1709 * We are in a serious low memory condition. Resort to 1710 * drastic measures to free some pages so we can allocate 1711 * another pv entry chunk. This is normally called to 1712 * unmap inactive pages, and if necessary, active pages. 1713 */ 1714static void 1715pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq) 1716{ 1717 pmap_t pmap; 1718 pt_entry_t *pte, tpte; 1719 pv_entry_t next_pv, pv; 1720 vm_offset_t va; 1721 vm_page_t m, free; 1722 1723 sched_pin(); 1724 TAILQ_FOREACH(m, &vpq->pl, pageq) { 1725 if (m->hold_count || m->busy) 1726 continue; 1727 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) { 1728 va = pv->pv_va; 1729 pmap = PV_PMAP(pv); 1730 /* Avoid deadlock and lock recursion. */ 1731 if (pmap > locked_pmap) 1732 PMAP_LOCK(pmap); 1733 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) 1734 continue; 1735 pmap->pm_stats.resident_count--; 1736 pte = pmap_pte_quick(pmap, va); 1737 tpte = pte_load_clear(pte); 1738 KASSERT((tpte & PG_W) == 0, 1739 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte)); 1740 if (tpte & PG_A) 1741 vm_page_flag_set(m, PG_REFERENCED); 1742 if (tpte & PG_M) { 1743 KASSERT((tpte & PG_RW), 1744 ("pmap_collect: modified page not writable: va: %#x, pte: %#jx", 1745 va, (uintmax_t)tpte)); 1746 vm_page_dirty(m); 1747 } 1748 free = NULL; 1749 pmap_unuse_pt(pmap, va, &free); 1750 pmap_invalidate_page(pmap, va); 1751 pmap_free_zero_pages(free); 1752 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1753 if (TAILQ_EMPTY(&m->md.pv_list)) 1754 vm_page_flag_clear(m, PG_WRITEABLE); 1755 m->md.pv_list_count--; 1756 free_pv_entry(pmap, pv); 1757 if (pmap != locked_pmap) 1758 PMAP_UNLOCK(pmap); 1759 } 1760 } 1761 sched_unpin(); 1762} 1763 1764 1765/* 1766 * free the pv_entry back to the free list 1767 */ 1768static void 1769free_pv_entry(pmap_t pmap, pv_entry_t pv) 1770{ 1771 vm_page_t m; 1772 struct pv_chunk *pc; 1773 int idx, field, bit; 1774 1775 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1776 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1777 PV_STAT(pv_entry_frees++); 1778 PV_STAT(pv_entry_spare++); 1779 pv_entry_count--; 1780 pc = pv_to_chunk(pv); 1781 idx = pv - &pc->pc_pventry[0]; 1782 field = idx / 32; 1783 bit = idx % 32; 1784 pc->pc_map[field] |= 1ul << bit; 1785 /* move to head of list */ 1786 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 1787 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 1788 for (idx = 0; idx < _NPCM; idx++) 1789 if (pc->pc_map[idx] != pc_freemask[idx]) 1790 return; 1791 PV_STAT(pv_entry_spare -= _NPCPV); 1792 PV_STAT(pc_chunk_count--); 1793 PV_STAT(pc_chunk_frees++); 1794 /* entire chunk is free, return it */ 1795 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 1796 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 1797 pmap_qremove((vm_offset_t)pc, 1); 1798 vm_page_unwire(m, 0); 1799 vm_page_free(m); 1800 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 1801} 1802 1803/* 1804 * get a new pv_entry, allocating a block from the system 1805 * when needed. 1806 */ 1807static pv_entry_t 1808get_pv_entry(pmap_t pmap, int try) 1809{ 1810 static const struct timeval printinterval = { 60, 0 }; 1811 static struct timeval lastprint; 1812 static vm_pindex_t colour; 1813 struct vpgqueues *pq; 1814 int bit, field; 1815 pv_entry_t pv; 1816 struct pv_chunk *pc; 1817 vm_page_t m; 1818 1819 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1820 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1821 PV_STAT(pv_entry_allocs++); 1822 pv_entry_count++; 1823 if (pv_entry_count > pv_entry_high_water) 1824 if (ratecheck(&lastprint, &printinterval)) 1825 printf("Approaching the limit on PV entries, consider " 1826 "increasing either the vm.pmap.shpgperproc or the " 1827 "vm.pmap.pv_entry_max tunable.\n"); 1828 pq = NULL; 1829retry: 1830 pc = TAILQ_FIRST(&pmap->pm_pvchunk); 1831 if (pc != NULL) { 1832 for (field = 0; field < _NPCM; field++) { 1833 if (pc->pc_map[field]) { 1834 bit = bsfl(pc->pc_map[field]); 1835 break; 1836 } 1837 } 1838 if (field < _NPCM) { 1839 pv = &pc->pc_pventry[field * 32 + bit]; 1840 pc->pc_map[field] &= ~(1ul << bit); 1841 /* If this was the last item, move it to tail */ 1842 for (field = 0; field < _NPCM; field++) 1843 if (pc->pc_map[field] != 0) { 1844 PV_STAT(pv_entry_spare--); 1845 return (pv); /* not full, return */ 1846 } 1847 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 1848 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); 1849 PV_STAT(pv_entry_spare--); 1850 return (pv); 1851 } 1852 } 1853 /* 1854 * Access to the ptelist "pv_vafree" is synchronized by the page 1855 * queues lock. If "pv_vafree" is currently non-empty, it will 1856 * remain non-empty until pmap_ptelist_alloc() completes. 1857 */ 1858 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq == 1859 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) | 1860 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) { 1861 if (try) { 1862 pv_entry_count--; 1863 PV_STAT(pc_chunk_tryfail++); 1864 return (NULL); 1865 } 1866 /* 1867 * Reclaim pv entries: At first, destroy mappings to 1868 * inactive pages. After that, if a pv chunk entry 1869 * is still needed, destroy mappings to active pages. 1870 */ 1871 if (pq == NULL) { 1872 PV_STAT(pmap_collect_inactive++); 1873 pq = &vm_page_queues[PQ_INACTIVE]; 1874 } else if (pq == &vm_page_queues[PQ_INACTIVE]) { 1875 PV_STAT(pmap_collect_active++); 1876 pq = &vm_page_queues[PQ_ACTIVE]; 1877 } else 1878 panic("get_pv_entry: increase vm.pmap.shpgperproc"); 1879 pmap_collect(pmap, pq); 1880 goto retry; 1881 } 1882 PV_STAT(pc_chunk_count++); 1883 PV_STAT(pc_chunk_allocs++); 1884 colour++; 1885 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 1886 pmap_qenter((vm_offset_t)pc, &m, 1); 1887 pc->pc_pmap = pmap; 1888 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */ 1889 for (field = 1; field < _NPCM; field++) 1890 pc->pc_map[field] = pc_freemask[field]; 1891 pv = &pc->pc_pventry[0]; 1892 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 1893 PV_STAT(pv_entry_spare += _NPCPV - 1); 1894 return (pv); 1895} 1896 1897static void 1898pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 1899{ 1900 pv_entry_t pv; 1901 1902 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1903 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1904 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 1905 if (pmap == PV_PMAP(pv) && va == pv->pv_va) 1906 break; 1907 } 1908 KASSERT(pv != NULL, ("pmap_remove_entry: pv not found")); 1909 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1910 m->md.pv_list_count--; 1911 if (TAILQ_EMPTY(&m->md.pv_list)) 1912 vm_page_flag_clear(m, PG_WRITEABLE); 1913 free_pv_entry(pmap, pv); 1914} 1915 1916/* 1917 * Create a pv entry for page at pa for 1918 * (pmap, va). 1919 */ 1920static void 1921pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 1922{ 1923 pv_entry_t pv; 1924 1925 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1926 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1927 pv = get_pv_entry(pmap, FALSE); 1928 pv->pv_va = va; 1929 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 1930 m->md.pv_list_count++; 1931} 1932 1933/* 1934 * Conditionally create a pv entry. 1935 */ 1936static boolean_t 1937pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 1938{ 1939 pv_entry_t pv; 1940 1941 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1942 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1943 if (pv_entry_count < pv_entry_high_water && 1944 (pv = get_pv_entry(pmap, TRUE)) != NULL) { 1945 pv->pv_va = va; 1946 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 1947 m->md.pv_list_count++; 1948 return (TRUE); 1949 } else 1950 return (FALSE); 1951} 1952 1953/* 1954 * pmap_remove_pte: do the things to unmap a page in a process 1955 */ 1956static int 1957pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free) 1958{ 1959 pt_entry_t oldpte; 1960 vm_page_t m; 1961 1962 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1963 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1964 oldpte = pte_load_clear(ptq); 1965 if (oldpte & PG_W) 1966 pmap->pm_stats.wired_count -= 1; 1967 /* 1968 * Machines that don't support invlpg, also don't support 1969 * PG_G. 1970 */ 1971 if (oldpte & PG_G) 1972 pmap_invalidate_page(kernel_pmap, va); 1973 pmap->pm_stats.resident_count -= 1; 1974 if (oldpte & PG_MANAGED) { 1975 m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME); 1976 if (oldpte & PG_M) { 1977 KASSERT((oldpte & PG_RW), 1978 ("pmap_remove_pte: modified page not writable: va: %#x, pte: %#jx", 1979 va, (uintmax_t)oldpte)); 1980 vm_page_dirty(m); 1981 } 1982 if (oldpte & PG_A) 1983 vm_page_flag_set(m, PG_REFERENCED); 1984 pmap_remove_entry(pmap, m, va); 1985 } 1986 return (pmap_unuse_pt(pmap, va, free)); 1987} 1988 1989/* 1990 * Remove a single page from a process address space 1991 */ 1992static void 1993pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free) 1994{ 1995 pt_entry_t *pte; 1996 1997 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1998 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 1999 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2000 if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0) 2001 return; 2002 pmap_remove_pte(pmap, pte, va, free); 2003 pmap_invalidate_page(pmap, va); 2004} 2005 2006/* 2007 * Remove the given range of addresses from the specified map. 2008 * 2009 * It is assumed that the start and end are properly 2010 * rounded to the page size. 2011 */ 2012void 2013pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 2014{ 2015 vm_offset_t pdnxt; 2016 pd_entry_t ptpaddr; 2017 pt_entry_t *pte; 2018 vm_page_t free = NULL; 2019 int anyvalid; 2020 2021 /* 2022 * Perform an unsynchronized read. This is, however, safe. 2023 */ 2024 if (pmap->pm_stats.resident_count == 0) 2025 return; 2026 2027 anyvalid = 0; 2028 2029 vm_page_lock_queues(); 2030 sched_pin(); 2031 PMAP_LOCK(pmap); 2032 2033 /* 2034 * special handling of removing one page. a very 2035 * common operation and easy to short circuit some 2036 * code. 2037 */ 2038 if ((sva + PAGE_SIZE == eva) && 2039 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 2040 pmap_remove_page(pmap, sva, &free); 2041 goto out; 2042 } 2043 2044 for (; sva < eva; sva = pdnxt) { 2045 unsigned pdirindex; 2046 2047 /* 2048 * Calculate index for next page table. 2049 */ 2050 pdnxt = (sva + NBPDR) & ~PDRMASK; 2051 if (pmap->pm_stats.resident_count == 0) 2052 break; 2053 2054 pdirindex = sva >> PDRSHIFT; 2055 ptpaddr = pmap->pm_pdir[pdirindex]; 2056 2057 /* 2058 * Weed out invalid mappings. Note: we assume that the page 2059 * directory table is always allocated, and in kernel virtual. 2060 */ 2061 if (ptpaddr == 0) 2062 continue; 2063 2064 /* 2065 * Check for large page. 2066 */ 2067 if ((ptpaddr & PG_PS) != 0) { 2068 pmap->pm_pdir[pdirindex] = 0; 2069 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 2070 anyvalid = 1; 2071 continue; 2072 } 2073 2074 /* 2075 * Limit our scan to either the end of the va represented 2076 * by the current page table page, or to the end of the 2077 * range being removed. 2078 */ 2079 if (pdnxt > eva) 2080 pdnxt = eva; 2081 2082 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2083 sva += PAGE_SIZE) { 2084 if (*pte == 0) 2085 continue; 2086 2087 /* 2088 * The TLB entry for a PG_G mapping is invalidated 2089 * by pmap_remove_pte(). 2090 */ 2091 if ((*pte & PG_G) == 0) 2092 anyvalid = 1; 2093 if (pmap_remove_pte(pmap, pte, sva, &free)) 2094 break; 2095 } 2096 } 2097out: 2098 sched_unpin(); 2099 if (anyvalid) 2100 pmap_invalidate_all(pmap); 2101 vm_page_unlock_queues(); 2102 PMAP_UNLOCK(pmap); 2103 pmap_free_zero_pages(free); 2104} 2105 2106/* 2107 * Routine: pmap_remove_all 2108 * Function: 2109 * Removes this physical page from 2110 * all physical maps in which it resides. 2111 * Reflects back modify bits to the pager. 2112 * 2113 * Notes: 2114 * Original versions of this routine were very 2115 * inefficient because they iteratively called 2116 * pmap_remove (slow...) 2117 */ 2118 2119void 2120pmap_remove_all(vm_page_t m) 2121{ 2122 pv_entry_t pv; 2123 pmap_t pmap; 2124 pt_entry_t *pte, tpte; 2125 vm_page_t free; 2126 2127#if defined(PMAP_DIAGNOSTIC) 2128 /* 2129 * XXX This makes pmap_remove_all() illegal for non-managed pages! 2130 */ 2131 if (m->flags & PG_FICTITIOUS) { 2132 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%x", 2133 VM_PAGE_TO_PHYS(m)); 2134 } 2135#endif 2136 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2137 sched_pin(); 2138 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2139 pmap = PV_PMAP(pv); 2140 PMAP_LOCK(pmap); 2141 pmap->pm_stats.resident_count--; 2142 pte = pmap_pte_quick(pmap, pv->pv_va); 2143 tpte = pte_load_clear(pte); 2144 if (tpte & PG_W) 2145 pmap->pm_stats.wired_count--; 2146 if (tpte & PG_A) 2147 vm_page_flag_set(m, PG_REFERENCED); 2148 2149 /* 2150 * Update the vm_page_t clean and reference bits. 2151 */ 2152 if (tpte & PG_M) { 2153 KASSERT((tpte & PG_RW), 2154 ("pmap_remove_all: modified page not writable: va: %#x, pte: %#jx", 2155 pv->pv_va, (uintmax_t)tpte)); 2156 vm_page_dirty(m); 2157 } 2158 free = NULL; 2159 pmap_unuse_pt(pmap, pv->pv_va, &free); 2160 pmap_invalidate_page(pmap, pv->pv_va); 2161 pmap_free_zero_pages(free); 2162 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2163 m->md.pv_list_count--; 2164 free_pv_entry(pmap, pv); 2165 PMAP_UNLOCK(pmap); 2166 } 2167 vm_page_flag_clear(m, PG_WRITEABLE); 2168 sched_unpin(); 2169} 2170 2171/* 2172 * Set the physical protection on the 2173 * specified range of this map as requested. 2174 */ 2175void 2176pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 2177{ 2178 vm_offset_t pdnxt; 2179 pd_entry_t ptpaddr; 2180 pt_entry_t *pte; 2181 int anychanged; 2182 2183 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 2184 pmap_remove(pmap, sva, eva); 2185 return; 2186 } 2187 2188#ifdef PAE 2189 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) == 2190 (VM_PROT_WRITE|VM_PROT_EXECUTE)) 2191 return; 2192#else 2193 if (prot & VM_PROT_WRITE) 2194 return; 2195#endif 2196 2197 anychanged = 0; 2198 2199 vm_page_lock_queues(); 2200 sched_pin(); 2201 PMAP_LOCK(pmap); 2202 for (; sva < eva; sva = pdnxt) { 2203 pt_entry_t obits, pbits; 2204 unsigned pdirindex; 2205 2206 pdnxt = (sva + NBPDR) & ~PDRMASK; 2207 2208 pdirindex = sva >> PDRSHIFT; 2209 ptpaddr = pmap->pm_pdir[pdirindex]; 2210 2211 /* 2212 * Weed out invalid mappings. Note: we assume that the page 2213 * directory table is always allocated, and in kernel virtual. 2214 */ 2215 if (ptpaddr == 0) 2216 continue; 2217 2218 /* 2219 * Check for large page. 2220 */ 2221 if ((ptpaddr & PG_PS) != 0) { 2222 if ((prot & VM_PROT_WRITE) == 0) 2223 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW); 2224#ifdef PAE 2225 if ((prot & VM_PROT_EXECUTE) == 0) 2226 pmap->pm_pdir[pdirindex] |= pg_nx; 2227#endif 2228 anychanged = 1; 2229 continue; 2230 } 2231 2232 if (pdnxt > eva) 2233 pdnxt = eva; 2234 2235 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2236 sva += PAGE_SIZE) { 2237 vm_page_t m; 2238 2239retry: 2240 /* 2241 * Regardless of whether a pte is 32 or 64 bits in 2242 * size, PG_RW, PG_A, and PG_M are among the least 2243 * significant 32 bits. 2244 */ 2245 obits = pbits = *pte; 2246 if ((pbits & PG_V) == 0) 2247 continue; 2248 if (pbits & PG_MANAGED) { 2249 m = NULL; 2250 if (pbits & PG_A) { 2251 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME); 2252 vm_page_flag_set(m, PG_REFERENCED); 2253 pbits &= ~PG_A; 2254 } 2255 if ((pbits & PG_M) != 0) { 2256 if (m == NULL) 2257 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME); 2258 vm_page_dirty(m); 2259 } 2260 } 2261 2262 if ((prot & VM_PROT_WRITE) == 0) 2263 pbits &= ~(PG_RW | PG_M); 2264#ifdef PAE 2265 if ((prot & VM_PROT_EXECUTE) == 0) 2266 pbits |= pg_nx; 2267#endif 2268 2269 if (pbits != obits) { 2270#ifdef PAE 2271 if (!atomic_cmpset_64(pte, obits, pbits)) 2272 goto retry; 2273#else 2274 if (!atomic_cmpset_int((u_int *)pte, obits, 2275 pbits)) 2276 goto retry; 2277#endif 2278 if (obits & PG_G) 2279 pmap_invalidate_page(pmap, sva); 2280 else 2281 anychanged = 1; 2282 } 2283 } 2284 } 2285 sched_unpin(); 2286 if (anychanged) 2287 pmap_invalidate_all(pmap); 2288 vm_page_unlock_queues(); 2289 PMAP_UNLOCK(pmap); 2290} 2291 2292/* 2293 * Insert the given physical page (p) at 2294 * the specified virtual address (v) in the 2295 * target physical map with the protection requested. 2296 * 2297 * If specified, the page will be wired down, meaning 2298 * that the related pte can not be reclaimed. 2299 * 2300 * NB: This is the only routine which MAY NOT lazy-evaluate 2301 * or lose information. That is, this routine must actually 2302 * insert this page into the given map NOW. 2303 */ 2304void 2305pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m, 2306 vm_prot_t prot, boolean_t wired) 2307{ 2308 vm_paddr_t pa; 2309 pd_entry_t *pde; 2310 pt_entry_t *pte; 2311 vm_paddr_t opa; 2312 pt_entry_t origpte, newpte; 2313 vm_page_t mpte, om; 2314 boolean_t invlva; 2315 2316 va = trunc_page(va); 2317#ifdef PMAP_DIAGNOSTIC 2318 if (va > VM_MAX_KERNEL_ADDRESS) 2319 panic("pmap_enter: toobig"); 2320 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS)) 2321 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va); 2322#endif 2323 2324 mpte = NULL; 2325 2326 vm_page_lock_queues(); 2327 PMAP_LOCK(pmap); 2328 sched_pin(); 2329 2330 /* 2331 * In the case that a page table page is not 2332 * resident, we are creating it here. 2333 */ 2334 if (va < VM_MAXUSER_ADDRESS) { 2335 mpte = pmap_allocpte(pmap, va, M_WAITOK); 2336 } 2337#if 0 && defined(PMAP_DIAGNOSTIC) 2338 else { 2339 pd_entry_t *pdeaddr = pmap_pde(pmap, va); 2340 origpte = *pdeaddr; 2341 if ((origpte & PG_V) == 0) { 2342 panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n", 2343 pmap->pm_pdir[PTDPTDI], origpte, va); 2344 } 2345 } 2346#endif 2347 2348 pde = pmap_pde(pmap, va); 2349 if ((*pde & PG_PS) != 0) 2350 panic("pmap_enter: attempted pmap_enter on 4MB page"); 2351 pte = pmap_pte_quick(pmap, va); 2352 2353 /* 2354 * Page Directory table entry not valid, we need a new PT page 2355 */ 2356 if (pte == NULL) { 2357 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n", 2358 (uintmax_t)pmap->pm_pdir[PTDPTDI], va); 2359 } 2360 2361 pa = VM_PAGE_TO_PHYS(m); 2362 om = NULL; 2363 origpte = *pte; 2364 opa = origpte & PG_FRAME; 2365 2366 /* 2367 * Mapping has not changed, must be protection or wiring change. 2368 */ 2369 if (origpte && (opa == pa)) { 2370 /* 2371 * Wiring change, just update stats. We don't worry about 2372 * wiring PT pages as they remain resident as long as there 2373 * are valid mappings in them. Hence, if a user page is wired, 2374 * the PT page will be also. 2375 */ 2376 if (wired && ((origpte & PG_W) == 0)) 2377 pmap->pm_stats.wired_count++; 2378 else if (!wired && (origpte & PG_W)) 2379 pmap->pm_stats.wired_count--; 2380 2381 /* 2382 * Remove extra pte reference 2383 */ 2384 if (mpte) 2385 mpte->wire_count--; 2386 2387 /* 2388 * We might be turning off write access to the page, 2389 * so we go ahead and sense modify status. 2390 */ 2391 if (origpte & PG_MANAGED) { 2392 om = m; 2393 pa |= PG_MANAGED; 2394 } 2395 goto validate; 2396 } 2397 /* 2398 * Mapping has changed, invalidate old range and fall through to 2399 * handle validating new mapping. 2400 */ 2401 if (opa) { 2402 if (origpte & PG_W) 2403 pmap->pm_stats.wired_count--; 2404 if (origpte & PG_MANAGED) { 2405 om = PHYS_TO_VM_PAGE(opa); 2406 pmap_remove_entry(pmap, om, va); 2407 } 2408 if (mpte != NULL) { 2409 mpte->wire_count--; 2410 KASSERT(mpte->wire_count > 0, 2411 ("pmap_enter: missing reference to page table page," 2412 " va: 0x%x", va)); 2413 } 2414 } else 2415 pmap->pm_stats.resident_count++; 2416 2417 /* 2418 * Enter on the PV list if part of our managed memory. 2419 */ 2420 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 2421 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva, 2422 ("pmap_enter: managed mapping within the clean submap")); 2423 pmap_insert_entry(pmap, va, m); 2424 pa |= PG_MANAGED; 2425 } 2426 2427 /* 2428 * Increment counters 2429 */ 2430 if (wired) 2431 pmap->pm_stats.wired_count++; 2432 2433validate: 2434 /* 2435 * Now validate mapping with desired protection/wiring. 2436 */ 2437 newpte = (pt_entry_t)(pa | PG_V); 2438 if ((prot & VM_PROT_WRITE) != 0) { 2439 newpte |= PG_RW; 2440 vm_page_flag_set(m, PG_WRITEABLE); 2441 } 2442#ifdef PAE 2443 if ((prot & VM_PROT_EXECUTE) == 0) 2444 newpte |= pg_nx; 2445#endif 2446 if (wired) 2447 newpte |= PG_W; 2448 if (va < VM_MAXUSER_ADDRESS) 2449 newpte |= PG_U; 2450 if (pmap == kernel_pmap) 2451 newpte |= pgeflag; 2452 2453 /* 2454 * if the mapping or permission bits are different, we need 2455 * to update the pte. 2456 */ 2457 if ((origpte & ~(PG_M|PG_A)) != newpte) { 2458 if (origpte & PG_V) { 2459 invlva = FALSE; 2460 origpte = pte_load_store(pte, newpte | PG_A); 2461 if (origpte & PG_A) { 2462 if (origpte & PG_MANAGED) 2463 vm_page_flag_set(om, PG_REFERENCED); 2464 if (opa != VM_PAGE_TO_PHYS(m)) 2465 invlva = TRUE; 2466#ifdef PAE 2467 if ((origpte & PG_NX) == 0 && 2468 (newpte & PG_NX) != 0) 2469 invlva = TRUE; 2470#endif 2471 } 2472 if (origpte & PG_M) { 2473 KASSERT((origpte & PG_RW), 2474 ("pmap_enter: modified page not writable: va: %#x, pte: %#jx", 2475 va, (uintmax_t)origpte)); 2476 if ((origpte & PG_MANAGED) != 0) 2477 vm_page_dirty(om); 2478 if ((prot & VM_PROT_WRITE) == 0) 2479 invlva = TRUE; 2480 } 2481 if (invlva) 2482 pmap_invalidate_page(pmap, va); 2483 } else 2484 pte_store(pte, newpte | PG_A); 2485 } 2486 sched_unpin(); 2487 vm_page_unlock_queues(); 2488 PMAP_UNLOCK(pmap); 2489} 2490 2491/* 2492 * Maps a sequence of resident pages belonging to the same object. 2493 * The sequence begins with the given page m_start. This page is 2494 * mapped at the given virtual address start. Each subsequent page is 2495 * mapped at a virtual address that is offset from start by the same 2496 * amount as the page is offset from m_start within the object. The 2497 * last page in the sequence is the page with the largest offset from 2498 * m_start that can be mapped at a virtual address less than the given 2499 * virtual address end. Not every virtual page between start and end 2500 * is mapped; only those for which a resident page exists with the 2501 * corresponding offset from m_start are mapped. 2502 */ 2503void 2504pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, 2505 vm_page_t m_start, vm_prot_t prot) 2506{ 2507 vm_page_t m, mpte; 2508 vm_pindex_t diff, psize; 2509 2510 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED); 2511 psize = atop(end - start); 2512 mpte = NULL; 2513 m = m_start; 2514 PMAP_LOCK(pmap); 2515 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { 2516 mpte = pmap_enter_quick_locked(pmap, start + ptoa(diff), m, 2517 prot, mpte); 2518 m = TAILQ_NEXT(m, listq); 2519 } 2520 PMAP_UNLOCK(pmap); 2521} 2522 2523/* 2524 * this code makes some *MAJOR* assumptions: 2525 * 1. Current pmap & pmap exists. 2526 * 2. Not wired. 2527 * 3. Read access. 2528 * 4. No page table pages. 2529 * but is *MUCH* faster than pmap_enter... 2530 */ 2531 2532void 2533pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 2534{ 2535 2536 PMAP_LOCK(pmap); 2537 (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL); 2538 PMAP_UNLOCK(pmap); 2539} 2540 2541static vm_page_t 2542pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, 2543 vm_prot_t prot, vm_page_t mpte) 2544{ 2545 pt_entry_t *pte; 2546 vm_paddr_t pa; 2547 vm_page_t free; 2548 2549 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva || 2550 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0, 2551 ("pmap_enter_quick_locked: managed mapping within the clean submap")); 2552 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2553 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2554 2555 /* 2556 * In the case that a page table page is not 2557 * resident, we are creating it here. 2558 */ 2559 if (va < VM_MAXUSER_ADDRESS) { 2560 unsigned ptepindex; 2561 pd_entry_t ptepa; 2562 2563 /* 2564 * Calculate pagetable page index 2565 */ 2566 ptepindex = va >> PDRSHIFT; 2567 if (mpte && (mpte->pindex == ptepindex)) { 2568 mpte->wire_count++; 2569 } else { 2570 /* 2571 * Get the page directory entry 2572 */ 2573 ptepa = pmap->pm_pdir[ptepindex]; 2574 2575 /* 2576 * If the page table page is mapped, we just increment 2577 * the hold count, and activate it. 2578 */ 2579 if (ptepa) { 2580 if (ptepa & PG_PS) 2581 panic("pmap_enter_quick: unexpected mapping into 4MB page"); 2582 mpte = PHYS_TO_VM_PAGE(ptepa & PG_FRAME); 2583 mpte->wire_count++; 2584 } else { 2585 mpte = _pmap_allocpte(pmap, ptepindex, 2586 M_NOWAIT); 2587 if (mpte == NULL) 2588 return (mpte); 2589 } 2590 } 2591 } else { 2592 mpte = NULL; 2593 } 2594 2595 /* 2596 * This call to vtopte makes the assumption that we are 2597 * entering the page into the current pmap. In order to support 2598 * quick entry into any pmap, one would likely use pmap_pte_quick. 2599 * But that isn't as quick as vtopte. 2600 */ 2601 pte = vtopte(va); 2602 if (*pte) { 2603 if (mpte != NULL) { 2604 mpte->wire_count--; 2605 mpte = NULL; 2606 } 2607 return (mpte); 2608 } 2609 2610 /* 2611 * Enter on the PV list if part of our managed memory. 2612 */ 2613 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 && 2614 !pmap_try_insert_pv_entry(pmap, va, m)) { 2615 if (mpte != NULL) { 2616 free = NULL; 2617 if (pmap_unwire_pte_hold(pmap, mpte, &free)) { 2618 pmap_invalidate_page(pmap, va); 2619 pmap_free_zero_pages(free); 2620 } 2621 2622 mpte = NULL; 2623 } 2624 return (mpte); 2625 } 2626 2627 /* 2628 * Increment counters 2629 */ 2630 pmap->pm_stats.resident_count++; 2631 2632 pa = VM_PAGE_TO_PHYS(m); 2633#ifdef PAE 2634 if ((prot & VM_PROT_EXECUTE) == 0) 2635 pa |= pg_nx; 2636#endif 2637 2638 /* 2639 * Now validate mapping with RO protection 2640 */ 2641 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 2642 pte_store(pte, pa | PG_V | PG_U); 2643 else 2644 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 2645 return mpte; 2646} 2647 2648/* 2649 * Make a temporary mapping for a physical address. This is only intended 2650 * to be used for panic dumps. 2651 */ 2652void * 2653pmap_kenter_temporary(vm_paddr_t pa, int i) 2654{ 2655 vm_offset_t va; 2656 2657 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 2658 pmap_kenter(va, pa); 2659 invlpg(va); 2660 return ((void *)crashdumpmap); 2661} 2662 2663/* 2664 * This code maps large physical mmap regions into the 2665 * processor address space. Note that some shortcuts 2666 * are taken, but the code works. 2667 */ 2668void 2669pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 2670 vm_object_t object, vm_pindex_t pindex, 2671 vm_size_t size) 2672{ 2673 vm_page_t p; 2674 2675 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 2676 KASSERT(object->type == OBJT_DEVICE, 2677 ("pmap_object_init_pt: non-device object")); 2678 if (pseflag && 2679 ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) { 2680 int i; 2681 vm_page_t m[1]; 2682 unsigned int ptepindex; 2683 int npdes; 2684 pd_entry_t ptepa; 2685 2686 PMAP_LOCK(pmap); 2687 if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)]) 2688 goto out; 2689 PMAP_UNLOCK(pmap); 2690retry: 2691 p = vm_page_lookup(object, pindex); 2692 if (p != NULL) { 2693 if (vm_page_sleep_if_busy(p, FALSE, "init4p")) 2694 goto retry; 2695 } else { 2696 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL); 2697 if (p == NULL) 2698 return; 2699 m[0] = p; 2700 2701 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) { 2702 vm_page_lock_queues(); 2703 vm_page_free(p); 2704 vm_page_unlock_queues(); 2705 return; 2706 } 2707 2708 p = vm_page_lookup(object, pindex); 2709 vm_page_lock_queues(); 2710 vm_page_wakeup(p); 2711 vm_page_unlock_queues(); 2712 } 2713 2714 ptepa = VM_PAGE_TO_PHYS(p); 2715 if (ptepa & (NBPDR - 1)) 2716 return; 2717 2718 p->valid = VM_PAGE_BITS_ALL; 2719 2720 PMAP_LOCK(pmap); 2721 pmap->pm_stats.resident_count += size >> PAGE_SHIFT; 2722 npdes = size >> PDRSHIFT; 2723 for(i = 0; i < npdes; i++) { 2724 pde_store(&pmap->pm_pdir[ptepindex], 2725 ptepa | PG_U | PG_RW | PG_V | PG_PS); 2726 ptepa += NBPDR; 2727 ptepindex += 1; 2728 } 2729 pmap_invalidate_all(pmap); 2730out: 2731 PMAP_UNLOCK(pmap); 2732 } 2733} 2734 2735/* 2736 * Routine: pmap_change_wiring 2737 * Function: Change the wiring attribute for a map/virtual-address 2738 * pair. 2739 * In/out conditions: 2740 * The mapping must already exist in the pmap. 2741 */ 2742void 2743pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired) 2744{ 2745 pt_entry_t *pte; 2746 2747 PMAP_LOCK(pmap); 2748 pte = pmap_pte(pmap, va); 2749 2750 if (wired && !pmap_pte_w(pte)) 2751 pmap->pm_stats.wired_count++; 2752 else if (!wired && pmap_pte_w(pte)) 2753 pmap->pm_stats.wired_count--; 2754 2755 /* 2756 * Wiring is not a hardware characteristic so there is no need to 2757 * invalidate TLB. 2758 */ 2759 pmap_pte_set_w(pte, wired); 2760 pmap_pte_release(pte); 2761 PMAP_UNLOCK(pmap); 2762} 2763 2764 2765 2766/* 2767 * Copy the range specified by src_addr/len 2768 * from the source map to the range dst_addr/len 2769 * in the destination map. 2770 * 2771 * This routine is only advisory and need not do anything. 2772 */ 2773 2774void 2775pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 2776 vm_offset_t src_addr) 2777{ 2778 vm_page_t free; 2779 vm_offset_t addr; 2780 vm_offset_t end_addr = src_addr + len; 2781 vm_offset_t pdnxt; 2782 2783 if (dst_addr != src_addr) 2784 return; 2785 2786 if (!pmap_is_current(src_pmap)) 2787 return; 2788 2789 vm_page_lock_queues(); 2790 if (dst_pmap < src_pmap) { 2791 PMAP_LOCK(dst_pmap); 2792 PMAP_LOCK(src_pmap); 2793 } else { 2794 PMAP_LOCK(src_pmap); 2795 PMAP_LOCK(dst_pmap); 2796 } 2797 sched_pin(); 2798 for (addr = src_addr; addr < end_addr; addr = pdnxt) { 2799 pt_entry_t *src_pte, *dst_pte; 2800 vm_page_t dstmpte, srcmpte; 2801 pd_entry_t srcptepaddr; 2802 unsigned ptepindex; 2803 2804 if (addr >= UPT_MIN_ADDRESS) 2805 panic("pmap_copy: invalid to pmap_copy page tables"); 2806 2807 pdnxt = (addr + NBPDR) & ~PDRMASK; 2808 ptepindex = addr >> PDRSHIFT; 2809 2810 srcptepaddr = src_pmap->pm_pdir[ptepindex]; 2811 if (srcptepaddr == 0) 2812 continue; 2813 2814 if (srcptepaddr & PG_PS) { 2815 if (dst_pmap->pm_pdir[ptepindex] == 0) { 2816 dst_pmap->pm_pdir[ptepindex] = srcptepaddr & 2817 ~PG_W; 2818 dst_pmap->pm_stats.resident_count += 2819 NBPDR / PAGE_SIZE; 2820 } 2821 continue; 2822 } 2823 2824 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME); 2825 if (srcmpte->wire_count == 0) 2826 panic("pmap_copy: source page table page is unused"); 2827 2828 if (pdnxt > end_addr) 2829 pdnxt = end_addr; 2830 2831 src_pte = vtopte(addr); 2832 while (addr < pdnxt) { 2833 pt_entry_t ptetemp; 2834 ptetemp = *src_pte; 2835 /* 2836 * we only virtual copy managed pages 2837 */ 2838 if ((ptetemp & PG_MANAGED) != 0) { 2839 dstmpte = pmap_allocpte(dst_pmap, addr, 2840 M_NOWAIT); 2841 if (dstmpte == NULL) 2842 break; 2843 dst_pte = pmap_pte_quick(dst_pmap, addr); 2844 if (*dst_pte == 0 && 2845 pmap_try_insert_pv_entry(dst_pmap, addr, 2846 PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) { 2847 /* 2848 * Clear the wired, modified, and 2849 * accessed (referenced) bits 2850 * during the copy. 2851 */ 2852 *dst_pte = ptetemp & ~(PG_W | PG_M | 2853 PG_A); 2854 dst_pmap->pm_stats.resident_count++; 2855 } else { 2856 free = NULL; 2857 if (pmap_unwire_pte_hold( dst_pmap, 2858 dstmpte, &free)) { 2859 pmap_invalidate_page(dst_pmap, 2860 addr); 2861 pmap_free_zero_pages(free); 2862 } 2863 } 2864 if (dstmpte->wire_count >= srcmpte->wire_count) 2865 break; 2866 } 2867 addr += PAGE_SIZE; 2868 src_pte++; 2869 } 2870 } 2871 sched_unpin(); 2872 vm_page_unlock_queues(); 2873 PMAP_UNLOCK(src_pmap); 2874 PMAP_UNLOCK(dst_pmap); 2875} 2876 2877static __inline void 2878pagezero(void *page) 2879{ 2880#if defined(I686_CPU) 2881 if (cpu_class == CPUCLASS_686) { 2882#if defined(CPU_ENABLE_SSE) 2883 if (cpu_feature & CPUID_SSE2) 2884 sse2_pagezero(page); 2885 else 2886#endif 2887 i686_pagezero(page); 2888 } else 2889#endif 2890 bzero(page, PAGE_SIZE); 2891} 2892 2893/* 2894 * pmap_zero_page zeros the specified hardware page by mapping 2895 * the page into KVM and using bzero to clear its contents. 2896 */ 2897void 2898pmap_zero_page(vm_page_t m) 2899{ 2900 struct sysmaps *sysmaps; 2901 2902 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2903 mtx_lock(&sysmaps->lock); 2904 if (*sysmaps->CMAP2) 2905 panic("pmap_zero_page: CMAP2 busy"); 2906 sched_pin(); 2907 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2908 invlcaddr(sysmaps->CADDR2); 2909 pagezero(sysmaps->CADDR2); 2910 *sysmaps->CMAP2 = 0; 2911 sched_unpin(); 2912 mtx_unlock(&sysmaps->lock); 2913} 2914 2915/* 2916 * pmap_zero_page_area zeros the specified hardware page by mapping 2917 * the page into KVM and using bzero to clear its contents. 2918 * 2919 * off and size may not cover an area beyond a single hardware page. 2920 */ 2921void 2922pmap_zero_page_area(vm_page_t m, int off, int size) 2923{ 2924 struct sysmaps *sysmaps; 2925 2926 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2927 mtx_lock(&sysmaps->lock); 2928 if (*sysmaps->CMAP2) 2929 panic("pmap_zero_page: CMAP2 busy"); 2930 sched_pin(); 2931 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2932 invlcaddr(sysmaps->CADDR2); 2933 if (off == 0 && size == PAGE_SIZE) 2934 pagezero(sysmaps->CADDR2); 2935 else 2936 bzero((char *)sysmaps->CADDR2 + off, size); 2937 *sysmaps->CMAP2 = 0; 2938 sched_unpin(); 2939 mtx_unlock(&sysmaps->lock); 2940} 2941 2942/* 2943 * pmap_zero_page_idle zeros the specified hardware page by mapping 2944 * the page into KVM and using bzero to clear its contents. This 2945 * is intended to be called from the vm_pagezero process only and 2946 * outside of Giant. 2947 */ 2948void 2949pmap_zero_page_idle(vm_page_t m) 2950{ 2951 2952 if (*CMAP3) 2953 panic("pmap_zero_page: CMAP3 busy"); 2954 sched_pin(); 2955 *CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2956 invlcaddr(CADDR3); 2957 pagezero(CADDR3); 2958 *CMAP3 = 0; 2959 sched_unpin(); 2960} 2961 2962/* 2963 * pmap_copy_page copies the specified (machine independent) 2964 * page by mapping the page into virtual memory and using 2965 * bcopy to copy the page, one machine dependent page at a 2966 * time. 2967 */ 2968void 2969pmap_copy_page(vm_page_t src, vm_page_t dst) 2970{ 2971 struct sysmaps *sysmaps; 2972 2973 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2974 mtx_lock(&sysmaps->lock); 2975 if (*sysmaps->CMAP1) 2976 panic("pmap_copy_page: CMAP1 busy"); 2977 if (*sysmaps->CMAP2) 2978 panic("pmap_copy_page: CMAP2 busy"); 2979 sched_pin(); 2980 invlpg((u_int)sysmaps->CADDR1); 2981 invlpg((u_int)sysmaps->CADDR2); 2982 *sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A; 2983 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M; 2984 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); 2985 *sysmaps->CMAP1 = 0; 2986 *sysmaps->CMAP2 = 0; 2987 sched_unpin(); 2988 mtx_unlock(&sysmaps->lock); 2989} 2990 2991/* 2992 * Returns true if the pmap's pv is one of the first 2993 * 16 pvs linked to from this page. This count may 2994 * be changed upwards or downwards in the future; it 2995 * is only necessary that true be returned for a small 2996 * subset of pmaps for proper page aging. 2997 */ 2998boolean_t 2999pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 3000{ 3001 pv_entry_t pv; 3002 int loops = 0; 3003 3004 if (m->flags & PG_FICTITIOUS) 3005 return FALSE; 3006 3007 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3008 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3009 if (PV_PMAP(pv) == pmap) { 3010 return TRUE; 3011 } 3012 loops++; 3013 if (loops >= 16) 3014 break; 3015 } 3016 return (FALSE); 3017} 3018 3019/* 3020 * pmap_page_wired_mappings: 3021 * 3022 * Return the number of managed mappings to the given physical page 3023 * that are wired. 3024 */ 3025int 3026pmap_page_wired_mappings(vm_page_t m) 3027{ 3028 pv_entry_t pv; 3029 pt_entry_t *pte; 3030 pmap_t pmap; 3031 int count; 3032 3033 count = 0; 3034 if ((m->flags & PG_FICTITIOUS) != 0) 3035 return (count); 3036 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3037 sched_pin(); 3038 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3039 pmap = PV_PMAP(pv); 3040 PMAP_LOCK(pmap); 3041 pte = pmap_pte_quick(pmap, pv->pv_va); 3042 if ((*pte & PG_W) != 0) 3043 count++; 3044 PMAP_UNLOCK(pmap); 3045 } 3046 sched_unpin(); 3047 return (count); 3048} 3049 3050/* 3051 * Remove all pages from specified address space 3052 * this aids process exit speeds. Also, this code 3053 * is special cased for current process only, but 3054 * can have the more generic (and slightly slower) 3055 * mode enabled. This is much faster than pmap_remove 3056 * in the case of running down an entire address space. 3057 */ 3058void 3059pmap_remove_pages(pmap_t pmap) 3060{ 3061 pt_entry_t *pte, tpte; 3062 vm_page_t m, free = NULL; 3063 pv_entry_t pv; 3064 struct pv_chunk *pc, *npc; 3065 int field, idx; 3066 int32_t bit; 3067 uint32_t inuse, bitmask; 3068 int allfree; 3069 3070 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { 3071 printf("warning: pmap_remove_pages called with non-current pmap\n"); 3072 return; 3073 } 3074 vm_page_lock_queues(); 3075 PMAP_LOCK(pmap); 3076 sched_pin(); 3077 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) { 3078 allfree = 1; 3079 for (field = 0; field < _NPCM; field++) { 3080 inuse = (~(pc->pc_map[field])) & pc_freemask[field]; 3081 while (inuse != 0) { 3082 bit = bsfl(inuse); 3083 bitmask = 1UL << bit; 3084 idx = field * 32 + bit; 3085 pv = &pc->pc_pventry[idx]; 3086 inuse &= ~bitmask; 3087 3088 pte = vtopte(pv->pv_va); 3089 tpte = *pte; 3090 3091 if (tpte == 0) { 3092 printf( 3093 "TPTE at %p IS ZERO @ VA %08x\n", 3094 pte, pv->pv_va); 3095 panic("bad pte"); 3096 } 3097 3098/* 3099 * We cannot remove wired pages from a process' mapping at this time 3100 */ 3101 if (tpte & PG_W) { 3102 allfree = 0; 3103 continue; 3104 } 3105 3106 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME); 3107 KASSERT(m->phys_addr == (tpte & PG_FRAME), 3108 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 3109 m, (uintmax_t)m->phys_addr, 3110 (uintmax_t)tpte)); 3111 3112 KASSERT(m < &vm_page_array[vm_page_array_size], 3113 ("pmap_remove_pages: bad tpte %#jx", 3114 (uintmax_t)tpte)); 3115 3116 pmap->pm_stats.resident_count--; 3117 3118 pte_clear(pte); 3119 3120 /* 3121 * Update the vm_page_t clean/reference bits. 3122 */ 3123 if (tpte & PG_M) 3124 vm_page_dirty(m); 3125 3126 /* Mark free */ 3127 PV_STAT(pv_entry_frees++); 3128 PV_STAT(pv_entry_spare++); 3129 pv_entry_count--; 3130 pc->pc_map[field] |= bitmask; 3131 m->md.pv_list_count--; 3132 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3133 if (TAILQ_EMPTY(&m->md.pv_list)) 3134 vm_page_flag_clear(m, PG_WRITEABLE); 3135 3136 pmap_unuse_pt(pmap, pv->pv_va, &free); 3137 } 3138 } 3139 if (allfree) { 3140 PV_STAT(pv_entry_spare -= _NPCPV); 3141 PV_STAT(pc_chunk_count--); 3142 PV_STAT(pc_chunk_frees++); 3143 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 3144 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 3145 pmap_qremove((vm_offset_t)pc, 1); 3146 vm_page_unwire(m, 0); 3147 vm_page_free(m); 3148 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 3149 } 3150 } 3151 sched_unpin(); 3152 pmap_invalidate_all(pmap); 3153 vm_page_unlock_queues(); 3154 PMAP_UNLOCK(pmap); 3155 pmap_free_zero_pages(free); 3156} 3157 3158/* 3159 * pmap_is_modified: 3160 * 3161 * Return whether or not the specified physical page was modified 3162 * in any physical maps. 3163 */ 3164boolean_t 3165pmap_is_modified(vm_page_t m) 3166{ 3167 pv_entry_t pv; 3168 pt_entry_t *pte; 3169 pmap_t pmap; 3170 boolean_t rv; 3171 3172 rv = FALSE; 3173 if (m->flags & PG_FICTITIOUS) 3174 return (rv); 3175 3176 sched_pin(); 3177 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3178 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3179 pmap = PV_PMAP(pv); 3180 PMAP_LOCK(pmap); 3181 pte = pmap_pte_quick(pmap, pv->pv_va); 3182 rv = (*pte & PG_M) != 0; 3183 PMAP_UNLOCK(pmap); 3184 if (rv) 3185 break; 3186 } 3187 sched_unpin(); 3188 return (rv); 3189} 3190 3191/* 3192 * pmap_is_prefaultable: 3193 * 3194 * Return whether or not the specified virtual address is elgible 3195 * for prefault. 3196 */ 3197boolean_t 3198pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 3199{ 3200 pt_entry_t *pte; 3201 boolean_t rv; 3202 3203 rv = FALSE; 3204 PMAP_LOCK(pmap); 3205 if (*pmap_pde(pmap, addr)) { 3206 pte = vtopte(addr); 3207 rv = *pte == 0; 3208 } 3209 PMAP_UNLOCK(pmap); 3210 return (rv); 3211} 3212 3213/* 3214 * Clear the write and modified bits in each of the given page's mappings. 3215 */ 3216void 3217pmap_remove_write(vm_page_t m) 3218{ 3219 pv_entry_t pv; 3220 pmap_t pmap; 3221 pt_entry_t oldpte, *pte; 3222 3223 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3224 if ((m->flags & PG_FICTITIOUS) != 0 || 3225 (m->flags & PG_WRITEABLE) == 0) 3226 return; 3227 sched_pin(); 3228 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3229 pmap = PV_PMAP(pv); 3230 PMAP_LOCK(pmap); 3231 pte = pmap_pte_quick(pmap, pv->pv_va); 3232retry: 3233 oldpte = *pte; 3234 if ((oldpte & PG_RW) != 0) { 3235 /* 3236 * Regardless of whether a pte is 32 or 64 bits 3237 * in size, PG_RW and PG_M are among the least 3238 * significant 32 bits. 3239 */ 3240 if (!atomic_cmpset_int((u_int *)pte, oldpte, 3241 oldpte & ~(PG_RW | PG_M))) 3242 goto retry; 3243 if ((oldpte & PG_M) != 0) 3244 vm_page_dirty(m); 3245 pmap_invalidate_page(pmap, pv->pv_va); 3246 } 3247 PMAP_UNLOCK(pmap); 3248 } 3249 vm_page_flag_clear(m, PG_WRITEABLE); 3250 sched_unpin(); 3251} 3252 3253/* 3254 * pmap_ts_referenced: 3255 * 3256 * Return a count of reference bits for a page, clearing those bits. 3257 * It is not necessary for every reference bit to be cleared, but it 3258 * is necessary that 0 only be returned when there are truly no 3259 * reference bits set. 3260 * 3261 * XXX: The exact number of bits to check and clear is a matter that 3262 * should be tested and standardized at some point in the future for 3263 * optimal aging of shared pages. 3264 */ 3265int 3266pmap_ts_referenced(vm_page_t m) 3267{ 3268 pv_entry_t pv, pvf, pvn; 3269 pmap_t pmap; 3270 pt_entry_t *pte; 3271 int rtval = 0; 3272 3273 if (m->flags & PG_FICTITIOUS) 3274 return (rtval); 3275 sched_pin(); 3276 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3277 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 3278 pvf = pv; 3279 do { 3280 pvn = TAILQ_NEXT(pv, pv_list); 3281 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3282 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 3283 pmap = PV_PMAP(pv); 3284 PMAP_LOCK(pmap); 3285 pte = pmap_pte_quick(pmap, pv->pv_va); 3286 if ((*pte & PG_A) != 0) { 3287 atomic_clear_int((u_int *)pte, PG_A); 3288 pmap_invalidate_page(pmap, pv->pv_va); 3289 rtval++; 3290 if (rtval > 4) 3291 pvn = NULL; 3292 } 3293 PMAP_UNLOCK(pmap); 3294 } while ((pv = pvn) != NULL && pv != pvf); 3295 } 3296 sched_unpin(); 3297 return (rtval); 3298} 3299 3300/* 3301 * Clear the modify bits on the specified physical page. 3302 */ 3303void 3304pmap_clear_modify(vm_page_t m) 3305{ 3306 pv_entry_t pv; 3307 pmap_t pmap; 3308 pt_entry_t *pte; 3309 3310 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3311 if ((m->flags & PG_FICTITIOUS) != 0) 3312 return; 3313 sched_pin(); 3314 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3315 pmap = PV_PMAP(pv); 3316 PMAP_LOCK(pmap); 3317 pte = pmap_pte_quick(pmap, pv->pv_va); 3318 if ((*pte & PG_M) != 0) { 3319 /* 3320 * Regardless of whether a pte is 32 or 64 bits 3321 * in size, PG_M is among the least significant 3322 * 32 bits. 3323 */ 3324 atomic_clear_int((u_int *)pte, PG_M); 3325 pmap_invalidate_page(pmap, pv->pv_va); 3326 } 3327 PMAP_UNLOCK(pmap); 3328 } 3329 sched_unpin(); 3330} 3331 3332/* 3333 * pmap_clear_reference: 3334 * 3335 * Clear the reference bit on the specified physical page. 3336 */ 3337void 3338pmap_clear_reference(vm_page_t m) 3339{ 3340 pv_entry_t pv; 3341 pmap_t pmap; 3342 pt_entry_t *pte; 3343 3344 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3345 if ((m->flags & PG_FICTITIOUS) != 0) 3346 return; 3347 sched_pin(); 3348 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3349 pmap = PV_PMAP(pv); 3350 PMAP_LOCK(pmap); 3351 pte = pmap_pte_quick(pmap, pv->pv_va); 3352 if ((*pte & PG_A) != 0) { 3353 /* 3354 * Regardless of whether a pte is 32 or 64 bits 3355 * in size, PG_A is among the least significant 3356 * 32 bits. 3357 */ 3358 atomic_clear_int((u_int *)pte, PG_A); 3359 pmap_invalidate_page(pmap, pv->pv_va); 3360 } 3361 PMAP_UNLOCK(pmap); 3362 } 3363 sched_unpin(); 3364} 3365 3366/* 3367 * Miscellaneous support routines follow 3368 */ 3369 3370/* 3371 * Map a set of physical memory pages into the kernel virtual 3372 * address space. Return a pointer to where it is mapped. This 3373 * routine is intended to be used for mapping device memory, 3374 * NOT real memory. 3375 */ 3376void * 3377pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode) 3378{ 3379 vm_offset_t va, tmpva, offset; 3380 3381 offset = pa & PAGE_MASK; 3382 size = roundup(offset + size, PAGE_SIZE); 3383 pa = pa & PG_FRAME; 3384 3385 if (pa < KERNLOAD && pa + size <= KERNLOAD) 3386 va = KERNBASE + pa; 3387 else 3388 va = kmem_alloc_nofault(kernel_map, size); 3389 if (!va) 3390 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 3391 3392 for (tmpva = va; size > 0; ) { 3393 pmap_kenter_attr(tmpva, pa, mode); 3394 size -= PAGE_SIZE; 3395 tmpva += PAGE_SIZE; 3396 pa += PAGE_SIZE; 3397 } 3398 pmap_invalidate_range(kernel_pmap, va, tmpva); 3399 pmap_invalidate_cache(); 3400 return ((void *)(va + offset)); 3401} 3402 3403void * 3404pmap_mapdev(vm_paddr_t pa, vm_size_t size) 3405{ 3406 3407 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE)); 3408} 3409 3410void * 3411pmap_mapbios(vm_paddr_t pa, vm_size_t size) 3412{ 3413 3414 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK)); 3415} 3416 3417void 3418pmap_unmapdev(vm_offset_t va, vm_size_t size) 3419{ 3420 vm_offset_t base, offset, tmpva; 3421 3422 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD) 3423 return; 3424 base = trunc_page(va); 3425 offset = va & PAGE_MASK; 3426 size = roundup(offset + size, PAGE_SIZE); 3427 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 3428 pmap_kremove(tmpva); 3429 pmap_invalidate_range(kernel_pmap, va, tmpva); 3430 kmem_free(kernel_map, base, size); 3431} 3432 3433int 3434pmap_change_attr(va, size, mode) 3435 vm_offset_t va; 3436 vm_size_t size; 3437 int mode; 3438{ 3439 vm_offset_t base, offset, tmpva; 3440 pt_entry_t *pte; 3441 u_int opte, npte; 3442 pd_entry_t *pde; 3443 3444 base = trunc_page(va); 3445 offset = va & PAGE_MASK; 3446 size = roundup(offset + size, PAGE_SIZE); 3447 3448 /* Only supported on kernel virtual addresses. */ 3449 if (base <= VM_MAXUSER_ADDRESS) 3450 return (EINVAL); 3451 3452 /* 4MB pages and pages that aren't mapped aren't supported. */ 3453 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) { 3454 pde = pmap_pde(kernel_pmap, tmpva); 3455 if (*pde & PG_PS) 3456 return (EINVAL); 3457 if (*pde == 0) 3458 return (EINVAL); 3459 pte = vtopte(va); 3460 if (*pte == 0) 3461 return (EINVAL); 3462 } 3463 3464 /* 3465 * Ok, all the pages exist and are 4k, so run through them updating 3466 * their cache mode. 3467 */ 3468 for (tmpva = base; size > 0; ) { 3469 pte = vtopte(tmpva); 3470 3471 /* 3472 * The cache mode bits are all in the low 32-bits of the 3473 * PTE, so we can just spin on updating the low 32-bits. 3474 */ 3475 do { 3476 opte = *(u_int *)pte; 3477 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT); 3478 npte |= pmap_cache_bits(mode, 0); 3479 } while (npte != opte && 3480 !atomic_cmpset_int((u_int *)pte, opte, npte)); 3481 tmpva += PAGE_SIZE; 3482 size -= PAGE_SIZE; 3483 } 3484 3485 /* 3486 * Flush CPU caches to make sure any data isn't cached that shouldn't 3487 * be, etc. 3488 */ 3489 pmap_invalidate_range(kernel_pmap, base, tmpva); 3490 pmap_invalidate_cache(); 3491 return (0); 3492} 3493 3494/* 3495 * perform the pmap work for mincore 3496 */ 3497int 3498pmap_mincore(pmap_t pmap, vm_offset_t addr) 3499{ 3500 pt_entry_t *ptep, pte; 3501 vm_page_t m; 3502 int val = 0; 3503 3504 PMAP_LOCK(pmap); 3505 ptep = pmap_pte(pmap, addr); 3506 pte = (ptep != NULL) ? *ptep : 0; 3507 pmap_pte_release(ptep); 3508 PMAP_UNLOCK(pmap); 3509 3510 if (pte != 0) { 3511 vm_paddr_t pa; 3512 3513 val = MINCORE_INCORE; 3514 if ((pte & PG_MANAGED) == 0) 3515 return val; 3516 3517 pa = pte & PG_FRAME; 3518 3519 m = PHYS_TO_VM_PAGE(pa); 3520 3521 /* 3522 * Modified by us 3523 */ 3524 if (pte & PG_M) 3525 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 3526 else { 3527 /* 3528 * Modified by someone else 3529 */ 3530 vm_page_lock_queues(); 3531 if (m->dirty || pmap_is_modified(m)) 3532 val |= MINCORE_MODIFIED_OTHER; 3533 vm_page_unlock_queues(); 3534 } 3535 /* 3536 * Referenced by us 3537 */ 3538 if (pte & PG_A) 3539 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 3540 else { 3541 /* 3542 * Referenced by someone else 3543 */ 3544 vm_page_lock_queues(); 3545 if ((m->flags & PG_REFERENCED) || 3546 pmap_ts_referenced(m)) { 3547 val |= MINCORE_REFERENCED_OTHER; 3548 vm_page_flag_set(m, PG_REFERENCED); 3549 } 3550 vm_page_unlock_queues(); 3551 } 3552 } 3553 return val; 3554} 3555 3556void 3557pmap_activate(struct thread *td) 3558{ 3559 pmap_t pmap, oldpmap; 3560 u_int32_t cr3; 3561 3562 critical_enter(); 3563 pmap = vmspace_pmap(td->td_proc->p_vmspace); 3564 oldpmap = PCPU_GET(curpmap); 3565#if defined(SMP) 3566 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 3567 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 3568#else 3569 oldpmap->pm_active &= ~1; 3570 pmap->pm_active |= 1; 3571#endif 3572#ifdef PAE 3573 cr3 = vtophys(pmap->pm_pdpt); 3574#else 3575 cr3 = vtophys(pmap->pm_pdir); 3576#endif 3577 /* 3578 * pmap_activate is for the current thread on the current cpu 3579 */ 3580 td->td_pcb->pcb_cr3 = cr3; 3581 load_cr3(cr3); 3582 PCPU_SET(curpmap, pmap); 3583 critical_exit(); 3584} 3585 3586vm_offset_t 3587pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size) 3588{ 3589 3590 if ((obj == NULL) || (size < NBPDR) || (obj->type != OBJT_DEVICE)) { 3591 return addr; 3592 } 3593 3594 addr = (addr + PDRMASK) & ~PDRMASK; 3595 return addr; 3596} 3597 3598 3599#if defined(PMAP_DEBUG) 3600pmap_pid_dump(int pid) 3601{ 3602 pmap_t pmap; 3603 struct proc *p; 3604 int npte = 0; 3605 int index; 3606 3607 sx_slock(&allproc_lock); 3608 FOREACH_PROC_IN_SYSTEM(p) { 3609 if (p->p_pid != pid) 3610 continue; 3611 3612 if (p->p_vmspace) { 3613 int i,j; 3614 index = 0; 3615 pmap = vmspace_pmap(p->p_vmspace); 3616 for (i = 0; i < NPDEPTD; i++) { 3617 pd_entry_t *pde; 3618 pt_entry_t *pte; 3619 vm_offset_t base = i << PDRSHIFT; 3620 3621 pde = &pmap->pm_pdir[i]; 3622 if (pde && pmap_pde_v(pde)) { 3623 for (j = 0; j < NPTEPG; j++) { 3624 vm_offset_t va = base + (j << PAGE_SHIFT); 3625 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 3626 if (index) { 3627 index = 0; 3628 printf("\n"); 3629 } 3630 sx_sunlock(&allproc_lock); 3631 return npte; 3632 } 3633 pte = pmap_pte(pmap, va); 3634 if (pte && pmap_pte_v(pte)) { 3635 pt_entry_t pa; 3636 vm_page_t m; 3637 pa = *pte; 3638 m = PHYS_TO_VM_PAGE(pa & PG_FRAME); 3639 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 3640 va, pa, m->hold_count, m->wire_count, m->flags); 3641 npte++; 3642 index++; 3643 if (index >= 2) { 3644 index = 0; 3645 printf("\n"); 3646 } else { 3647 printf(" "); 3648 } 3649 } 3650 } 3651 } 3652 } 3653 } 3654 } 3655 sx_sunlock(&allproc_lock); 3656 return npte; 3657} 3658#endif 3659 3660#if defined(DEBUG) 3661 3662static void pads(pmap_t pm); 3663void pmap_pvdump(vm_offset_t pa); 3664 3665/* print address space of pmap*/ 3666static void 3667pads(pmap_t pm) 3668{ 3669 int i, j; 3670 vm_paddr_t va; 3671 pt_entry_t *ptep; 3672 3673 if (pm == kernel_pmap) 3674 return; 3675 for (i = 0; i < NPDEPTD; i++) 3676 if (pm->pm_pdir[i]) 3677 for (j = 0; j < NPTEPG; j++) { 3678 va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 3679 if (pm == kernel_pmap && va < KERNBASE) 3680 continue; 3681 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 3682 continue; 3683 ptep = pmap_pte(pm, va); 3684 if (pmap_pte_v(ptep)) 3685 printf("%x:%x ", va, *ptep); 3686 }; 3687 3688} 3689 3690void 3691pmap_pvdump(vm_paddr_t pa) 3692{ 3693 pv_entry_t pv; 3694 pmap_t pmap; 3695 vm_page_t m; 3696 3697 printf("pa %x", pa); 3698 m = PHYS_TO_VM_PAGE(pa); 3699 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3700 pmap = PV_PMAP(pv); 3701 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va); 3702 pads(pmap); 3703 } 3704 printf(" "); 3705} 3706#endif 3707