pmap.c revision 173708
1/*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * Copyright (c) 1994 John S. Dyson 5 * All rights reserved. 6 * Copyright (c) 1994 David Greenman 7 * All rights reserved. 8 * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu> 9 * All rights reserved. 10 * 11 * This code is derived from software contributed to Berkeley by 12 * the Systems Programming Group of the University of Utah Computer 13 * Science Department and William Jolitz of UUNET Technologies Inc. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the University of 26 * California, Berkeley and its contributors. 27 * 4. Neither the name of the University nor the names of its contributors 28 * may be used to endorse or promote products derived from this software 29 * without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41 * SUCH DAMAGE. 42 * 43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 44 */ 45/*- 46 * Copyright (c) 2003 Networks Associates Technology, Inc. 47 * All rights reserved. 48 * 49 * This software was developed for the FreeBSD Project by Jake Burkholder, 50 * Safeport Network Services, and Network Associates Laboratories, the 51 * Security Research Division of Network Associates, Inc. under 52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 53 * CHATS research program. 54 * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 1. Redistributions of source code must retain the above copyright 59 * notice, this list of conditions and the following disclaimer. 60 * 2. Redistributions in binary form must reproduce the above copyright 61 * notice, this list of conditions and the following disclaimer in the 62 * documentation and/or other materials provided with the distribution. 63 * 64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 74 * SUCH DAMAGE. 75 */ 76 77#include <sys/cdefs.h> 78__FBSDID("$FreeBSD: head/sys/i386/i386/pmap.c 173708 2007-11-17 22:52:29Z alc $"); 79 80/* 81 * Manages physical address maps. 82 * 83 * In addition to hardware address maps, this 84 * module is called upon to provide software-use-only 85 * maps which may or may not be stored in the same 86 * form as hardware maps. These pseudo-maps are 87 * used to store intermediate results from copy 88 * operations to and from address spaces. 89 * 90 * Since the information managed by this module is 91 * also stored by the logical address mapping module, 92 * this module may throw away valid virtual-to-physical 93 * mappings at almost any time. However, invalidations 94 * of virtual-to-physical mappings must be done as 95 * requested. 96 * 97 * In order to cope with hardware architectures which 98 * make virtual-to-physical map invalidates expensive, 99 * this module may delay invalidate or reduced protection 100 * operations until such time as they are actually 101 * necessary. This module is given full information as 102 * to which processors are currently using which maps, 103 * and to when physical maps must be made correct. 104 */ 105 106#include "opt_cpu.h" 107#include "opt_pmap.h" 108#include "opt_msgbuf.h" 109#include "opt_smp.h" 110#include "opt_xbox.h" 111 112#include <sys/param.h> 113#include <sys/systm.h> 114#include <sys/kernel.h> 115#include <sys/lock.h> 116#include <sys/malloc.h> 117#include <sys/mman.h> 118#include <sys/msgbuf.h> 119#include <sys/mutex.h> 120#include <sys/proc.h> 121#include <sys/sx.h> 122#include <sys/vmmeter.h> 123#include <sys/sched.h> 124#include <sys/sysctl.h> 125#ifdef SMP 126#include <sys/smp.h> 127#endif 128 129#include <vm/vm.h> 130#include <vm/vm_param.h> 131#include <vm/vm_kern.h> 132#include <vm/vm_page.h> 133#include <vm/vm_map.h> 134#include <vm/vm_object.h> 135#include <vm/vm_extern.h> 136#include <vm/vm_pageout.h> 137#include <vm/vm_pager.h> 138#include <vm/uma.h> 139 140#include <machine/cpu.h> 141#include <machine/cputypes.h> 142#include <machine/md_var.h> 143#include <machine/pcb.h> 144#include <machine/specialreg.h> 145#ifdef SMP 146#include <machine/smp.h> 147#endif 148 149#ifdef XBOX 150#include <machine/xbox.h> 151#endif 152 153#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 154#define CPU_ENABLE_SSE 155#endif 156 157#ifndef PMAP_SHPGPERPROC 158#define PMAP_SHPGPERPROC 200 159#endif 160 161#if defined(DIAGNOSTIC) 162#define PMAP_DIAGNOSTIC 163#endif 164 165#if !defined(PMAP_DIAGNOSTIC) 166#define PMAP_INLINE __inline 167#else 168#define PMAP_INLINE 169#endif 170 171#define PV_STATS 172#ifdef PV_STATS 173#define PV_STAT(x) do { x ; } while (0) 174#else 175#define PV_STAT(x) do { } while (0) 176#endif 177 178/* 179 * Get PDEs and PTEs for user/kernel address space 180 */ 181#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 182#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 183 184#define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 185#define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 186#define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 187#define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 188#define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 189 190#define pmap_pte_set_w(pte, v) ((v) ? atomic_set_int((u_int *)(pte), PG_W) : \ 191 atomic_clear_int((u_int *)(pte), PG_W)) 192#define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 193 194struct pmap kernel_pmap_store; 195LIST_HEAD(pmaplist, pmap); 196static struct pmaplist allpmaps; 197static struct mtx allpmaps_lock; 198 199vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 200vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 201int pgeflag = 0; /* PG_G or-in */ 202int pseflag = 0; /* PG_PS or-in */ 203 204static int nkpt; 205vm_offset_t kernel_vm_end; 206extern u_int32_t KERNend; 207 208#ifdef PAE 209pt_entry_t pg_nx; 210static uma_zone_t pdptzone; 211#endif 212 213/* 214 * Data for the pv entry allocation mechanism 215 */ 216static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 217static int shpgperproc = PMAP_SHPGPERPROC; 218 219struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */ 220int pv_maxchunks; /* How many chunks we have KVA for */ 221vm_offset_t pv_vafree; /* freelist stored in the PTE */ 222 223/* 224 * All those kernel PT submaps that BSD is so fond of 225 */ 226struct sysmaps { 227 struct mtx lock; 228 pt_entry_t *CMAP1; 229 pt_entry_t *CMAP2; 230 caddr_t CADDR1; 231 caddr_t CADDR2; 232}; 233static struct sysmaps sysmaps_pcpu[MAXCPU]; 234pt_entry_t *CMAP1 = 0; 235static pt_entry_t *CMAP3; 236caddr_t CADDR1 = 0, ptvmmap = 0; 237static caddr_t CADDR3; 238struct msgbuf *msgbufp = 0; 239 240/* 241 * Crashdump maps. 242 */ 243static caddr_t crashdumpmap; 244 245static pt_entry_t *PMAP1 = 0, *PMAP2; 246static pt_entry_t *PADDR1 = 0, *PADDR2; 247#ifdef SMP 248static int PMAP1cpu; 249static int PMAP1changedcpu; 250SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD, 251 &PMAP1changedcpu, 0, 252 "Number of times pmap_pte_quick changed CPU with same PMAP1"); 253#endif 254static int PMAP1changed; 255SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD, 256 &PMAP1changed, 0, 257 "Number of times pmap_pte_quick changed PMAP1"); 258static int PMAP1unchanged; 259SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD, 260 &PMAP1unchanged, 0, 261 "Number of times pmap_pte_quick didn't change PMAP1"); 262static struct mtx PMAP2mutex; 263 264static void free_pv_entry(pmap_t pmap, pv_entry_t pv); 265static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try); 266 267static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, 268 vm_page_t m, vm_prot_t prot, vm_page_t mpte); 269static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva, 270 vm_page_t *free); 271static void pmap_remove_page(struct pmap *pmap, vm_offset_t va, 272 vm_page_t *free); 273static void pmap_remove_entry(struct pmap *pmap, vm_page_t m, 274 vm_offset_t va); 275static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m); 276static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, 277 vm_page_t m); 278 279static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags); 280 281static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags); 282static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free); 283static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va); 284static void pmap_pte_release(pt_entry_t *pte); 285static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *); 286static vm_offset_t pmap_kmem_choose(vm_offset_t addr); 287#ifdef PAE 288static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 289#endif 290 291CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 292CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 293 294/* 295 * Move the kernel virtual free pointer to the next 296 * 4MB. This is used to help improve performance 297 * by using a large (4MB) page for much of the kernel 298 * (.text, .data, .bss) 299 */ 300static vm_offset_t 301pmap_kmem_choose(vm_offset_t addr) 302{ 303 vm_offset_t newaddr = addr; 304 305#ifndef DISABLE_PSE 306 if (cpu_feature & CPUID_PSE) 307 newaddr = (addr + PDRMASK) & ~PDRMASK; 308#endif 309 return newaddr; 310} 311 312/* 313 * Bootstrap the system enough to run with virtual memory. 314 * 315 * On the i386 this is called after mapping has already been enabled 316 * and just syncs the pmap module with what has already been done. 317 * [We can't call it easily with mapping off since the kernel is not 318 * mapped with PA == VA, hence we would have to relocate every address 319 * from the linked base (virtual) address "KERNBASE" to the actual 320 * (physical) address starting relative to 0] 321 */ 322void 323pmap_bootstrap(vm_paddr_t firstaddr) 324{ 325 vm_offset_t va; 326 pt_entry_t *pte, *unused; 327 struct sysmaps *sysmaps; 328 int i; 329 330 /* 331 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 332 * large. It should instead be correctly calculated in locore.s and 333 * not based on 'first' (which is a physical address, not a virtual 334 * address, for the start of unused physical memory). The kernel 335 * page tables are NOT double mapped and thus should not be included 336 * in this calculation. 337 */ 338 virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 339 virtual_avail = pmap_kmem_choose(virtual_avail); 340 341 virtual_end = VM_MAX_KERNEL_ADDRESS; 342 343 /* 344 * Initialize the kernel pmap (which is statically allocated). 345 */ 346 PMAP_LOCK_INIT(kernel_pmap); 347 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 348#ifdef PAE 349 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 350#endif 351 kernel_pmap->pm_active = -1; /* don't allow deactivation */ 352 TAILQ_INIT(&kernel_pmap->pm_pvchunk); 353 LIST_INIT(&allpmaps); 354 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 355 mtx_lock_spin(&allpmaps_lock); 356 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 357 mtx_unlock_spin(&allpmaps_lock); 358 nkpt = NKPT; 359 360 /* 361 * Reserve some special page table entries/VA space for temporary 362 * mapping of pages. 363 */ 364#define SYSMAP(c, p, v, n) \ 365 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 366 367 va = virtual_avail; 368 pte = vtopte(va); 369 370 /* 371 * CMAP1/CMAP2 are used for zeroing and copying pages. 372 * CMAP3 is used for the idle process page zeroing. 373 */ 374 for (i = 0; i < MAXCPU; i++) { 375 sysmaps = &sysmaps_pcpu[i]; 376 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF); 377 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1) 378 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1) 379 } 380 SYSMAP(caddr_t, CMAP1, CADDR1, 1) 381 SYSMAP(caddr_t, CMAP3, CADDR3, 1) 382 *CMAP3 = 0; 383 384 /* 385 * Crashdump maps. 386 */ 387 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS) 388 389 /* 390 * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 391 */ 392 SYSMAP(caddr_t, unused, ptvmmap, 1) 393 394 /* 395 * msgbufp is used to map the system message buffer. 396 */ 397 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE))) 398 399 /* 400 * ptemap is used for pmap_pte_quick 401 */ 402 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 403 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1); 404 405 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF); 406 407 virtual_avail = va; 408 409 *CMAP1 = 0; 410 411 /* 412 * Leave in place an identity mapping (virt == phys) for the low 1 MB 413 * physical memory region that is used by the ACPI wakeup code. This 414 * mapping must not have PG_G set. 415 */ 416#ifdef XBOX 417 /* FIXME: This is gross, but needed for the XBOX. Since we are in such 418 * an early stadium, we cannot yet neatly map video memory ... :-( 419 * Better fixes are very welcome! */ 420 if (!arch_i386_is_xbox) 421#endif 422 for (i = 1; i < NKPT; i++) 423 PTD[i] = 0; 424 425 /* Initialize the PAT MSR if present. */ 426 pmap_init_pat(); 427 428 /* Turn on PG_G on kernel page(s) */ 429 pmap_set_pg(); 430} 431 432/* 433 * Setup the PAT MSR. 434 */ 435void 436pmap_init_pat(void) 437{ 438 uint64_t pat_msr; 439 440 /* Bail if this CPU doesn't implement PAT. */ 441 if (!(cpu_feature & CPUID_PAT)) 442 return; 443 444#ifdef PAT_WORKS 445 /* 446 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-. 447 * Program 4 and 5 as WP and WC. 448 * Leave 6 and 7 as UC and UC-. 449 */ 450 pat_msr = rdmsr(MSR_PAT); 451 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5)); 452 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) | 453 PAT_VALUE(5, PAT_WRITE_COMBINING); 454#else 455 /* 456 * Due to some Intel errata, we can only safely use the lower 4 457 * PAT entries. Thus, just replace PAT Index 2 with WC instead 458 * of UC-. 459 * 460 * Intel Pentium III Processor Specification Update 461 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B 462 * or Mode C Paging) 463 * 464 * Intel Pentium IV Processor Specification Update 465 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly) 466 */ 467 pat_msr = rdmsr(MSR_PAT); 468 pat_msr &= ~PAT_MASK(2); 469 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING); 470#endif 471 wrmsr(MSR_PAT, pat_msr); 472} 473 474/* 475 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on. 476 */ 477void 478pmap_set_pg(void) 479{ 480 pd_entry_t pdir; 481 pt_entry_t *pte; 482 vm_offset_t va, endva; 483 int i; 484 485 if (pgeflag == 0) 486 return; 487 488 i = KERNLOAD/NBPDR; 489 endva = KERNBASE + KERNend; 490 491 if (pseflag) { 492 va = KERNBASE + KERNLOAD; 493 while (va < endva) { 494 pdir = kernel_pmap->pm_pdir[KPTDI+i]; 495 pdir |= pgeflag; 496 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir; 497 invltlb(); /* Play it safe, invltlb() every time */ 498 i++; 499 va += NBPDR; 500 } 501 } else { 502 va = (vm_offset_t)btext; 503 while (va < endva) { 504 pte = vtopte(va); 505 if (*pte) 506 *pte |= pgeflag; 507 invltlb(); /* Play it safe, invltlb() every time */ 508 va += PAGE_SIZE; 509 } 510 } 511} 512 513/* 514 * Initialize a vm_page's machine-dependent fields. 515 */ 516void 517pmap_page_init(vm_page_t m) 518{ 519 520 TAILQ_INIT(&m->md.pv_list); 521 m->md.pv_list_count = 0; 522} 523 524#ifdef PAE 525 526static MALLOC_DEFINE(M_PMAPPDPT, "pmap", "pmap pdpt"); 527 528static void * 529pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 530{ 531 *flags = UMA_SLAB_PRIV; 532 return (contigmalloc(PAGE_SIZE, M_PMAPPDPT, 0, 0x0ULL, 0xffffffffULL, 533 1, 0)); 534} 535#endif 536 537/* 538 * ABuse the pte nodes for unmapped kva to thread a kva freelist through. 539 * Requirements: 540 * - Must deal with pages in order to ensure that none of the PG_* bits 541 * are ever set, PG_V in particular. 542 * - Assumes we can write to ptes without pte_store() atomic ops, even 543 * on PAE systems. This should be ok. 544 * - Assumes nothing will ever test these addresses for 0 to indicate 545 * no mapping instead of correctly checking PG_V. 546 * - Assumes a vm_offset_t will fit in a pte (true for i386). 547 * Because PG_V is never set, there can be no mappings to invalidate. 548 */ 549static vm_offset_t 550pmap_ptelist_alloc(vm_offset_t *head) 551{ 552 pt_entry_t *pte; 553 vm_offset_t va; 554 555 va = *head; 556 if (va == 0) 557 return (va); /* Out of memory */ 558 pte = vtopte(va); 559 *head = *pte; 560 if (*head & PG_V) 561 panic("pmap_ptelist_alloc: va with PG_V set!"); 562 *pte = 0; 563 return (va); 564} 565 566static void 567pmap_ptelist_free(vm_offset_t *head, vm_offset_t va) 568{ 569 pt_entry_t *pte; 570 571 if (va & PG_V) 572 panic("pmap_ptelist_free: freeing va with PG_V set!"); 573 pte = vtopte(va); 574 *pte = *head; /* virtual! PG_V is 0 though */ 575 *head = va; 576} 577 578static void 579pmap_ptelist_init(vm_offset_t *head, void *base, int npages) 580{ 581 int i; 582 vm_offset_t va; 583 584 *head = 0; 585 for (i = npages - 1; i >= 0; i--) { 586 va = (vm_offset_t)base + i * PAGE_SIZE; 587 pmap_ptelist_free(head, va); 588 } 589} 590 591 592/* 593 * Initialize the pmap module. 594 * Called by vm_init, to initialize any structures that the pmap 595 * system needs to map virtual memory. 596 */ 597void 598pmap_init(void) 599{ 600 601 /* 602 * Initialize the address space (zone) for the pv entries. Set a 603 * high water mark so that the system can recover from excessive 604 * numbers of pv entries. 605 */ 606 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 607 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count; 608 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 609 pv_entry_max = roundup(pv_entry_max, _NPCPV); 610 pv_entry_high_water = 9 * (pv_entry_max / 10); 611 612 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc); 613 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map, 614 PAGE_SIZE * pv_maxchunks); 615 if (pv_chunkbase == NULL) 616 panic("pmap_init: not enough kvm for pv chunks"); 617 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks); 618#ifdef PAE 619 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL, 620 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1, 621 UMA_ZONE_VM | UMA_ZONE_NOFREE); 622 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf); 623#endif 624} 625 626 627SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters"); 628SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0, 629 "Max number of PV entries"); 630SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0, 631 "Page share factor per proc"); 632 633/*************************************************** 634 * Low level helper routines..... 635 ***************************************************/ 636 637/* 638 * Determine the appropriate bits to set in a PTE or PDE for a specified 639 * caching mode. 640 */ 641static int 642pmap_cache_bits(int mode, boolean_t is_pde) 643{ 644 int pat_flag, pat_index, cache_bits; 645 646 /* The PAT bit is different for PTE's and PDE's. */ 647 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT; 648 649 /* If we don't support PAT, map extended modes to older ones. */ 650 if (!(cpu_feature & CPUID_PAT)) { 651 switch (mode) { 652 case PAT_UNCACHEABLE: 653 case PAT_WRITE_THROUGH: 654 case PAT_WRITE_BACK: 655 break; 656 case PAT_UNCACHED: 657 case PAT_WRITE_COMBINING: 658 case PAT_WRITE_PROTECTED: 659 mode = PAT_UNCACHEABLE; 660 break; 661 } 662 } 663 664 /* Map the caching mode to a PAT index. */ 665 switch (mode) { 666#ifdef PAT_WORKS 667 case PAT_UNCACHEABLE: 668 pat_index = 3; 669 break; 670 case PAT_WRITE_THROUGH: 671 pat_index = 1; 672 break; 673 case PAT_WRITE_BACK: 674 pat_index = 0; 675 break; 676 case PAT_UNCACHED: 677 pat_index = 2; 678 break; 679 case PAT_WRITE_COMBINING: 680 pat_index = 5; 681 break; 682 case PAT_WRITE_PROTECTED: 683 pat_index = 4; 684 break; 685#else 686 case PAT_UNCACHED: 687 case PAT_UNCACHEABLE: 688 case PAT_WRITE_PROTECTED: 689 pat_index = 3; 690 break; 691 case PAT_WRITE_THROUGH: 692 pat_index = 1; 693 break; 694 case PAT_WRITE_BACK: 695 pat_index = 0; 696 break; 697 case PAT_WRITE_COMBINING: 698 pat_index = 2; 699 break; 700#endif 701 default: 702 panic("Unknown caching mode %d\n", mode); 703 } 704 705 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */ 706 cache_bits = 0; 707 if (pat_index & 0x4) 708 cache_bits |= pat_flag; 709 if (pat_index & 0x2) 710 cache_bits |= PG_NC_PCD; 711 if (pat_index & 0x1) 712 cache_bits |= PG_NC_PWT; 713 return (cache_bits); 714} 715#ifdef SMP 716/* 717 * For SMP, these functions have to use the IPI mechanism for coherence. 718 * 719 * N.B.: Before calling any of the following TLB invalidation functions, 720 * the calling processor must ensure that all stores updating a non- 721 * kernel page table are globally performed. Otherwise, another 722 * processor could cache an old, pre-update entry without being 723 * invalidated. This can happen one of two ways: (1) The pmap becomes 724 * active on another processor after its pm_active field is checked by 725 * one of the following functions but before a store updating the page 726 * table is globally performed. (2) The pmap becomes active on another 727 * processor before its pm_active field is checked but due to 728 * speculative loads one of the following functions stills reads the 729 * pmap as inactive on the other processor. 730 * 731 * The kernel page table is exempt because its pm_active field is 732 * immutable. The kernel page table is always active on every 733 * processor. 734 */ 735void 736pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 737{ 738 u_int cpumask; 739 u_int other_cpus; 740 741 sched_pin(); 742 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 743 invlpg(va); 744 smp_invlpg(va); 745 } else { 746 cpumask = PCPU_GET(cpumask); 747 other_cpus = PCPU_GET(other_cpus); 748 if (pmap->pm_active & cpumask) 749 invlpg(va); 750 if (pmap->pm_active & other_cpus) 751 smp_masked_invlpg(pmap->pm_active & other_cpus, va); 752 } 753 sched_unpin(); 754} 755 756void 757pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 758{ 759 u_int cpumask; 760 u_int other_cpus; 761 vm_offset_t addr; 762 763 sched_pin(); 764 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 765 for (addr = sva; addr < eva; addr += PAGE_SIZE) 766 invlpg(addr); 767 smp_invlpg_range(sva, eva); 768 } else { 769 cpumask = PCPU_GET(cpumask); 770 other_cpus = PCPU_GET(other_cpus); 771 if (pmap->pm_active & cpumask) 772 for (addr = sva; addr < eva; addr += PAGE_SIZE) 773 invlpg(addr); 774 if (pmap->pm_active & other_cpus) 775 smp_masked_invlpg_range(pmap->pm_active & other_cpus, 776 sva, eva); 777 } 778 sched_unpin(); 779} 780 781void 782pmap_invalidate_all(pmap_t pmap) 783{ 784 u_int cpumask; 785 u_int other_cpus; 786 787 sched_pin(); 788 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 789 invltlb(); 790 smp_invltlb(); 791 } else { 792 cpumask = PCPU_GET(cpumask); 793 other_cpus = PCPU_GET(other_cpus); 794 if (pmap->pm_active & cpumask) 795 invltlb(); 796 if (pmap->pm_active & other_cpus) 797 smp_masked_invltlb(pmap->pm_active & other_cpus); 798 } 799 sched_unpin(); 800} 801 802void 803pmap_invalidate_cache(void) 804{ 805 806 sched_pin(); 807 wbinvd(); 808 smp_cache_flush(); 809 sched_unpin(); 810} 811#else /* !SMP */ 812/* 813 * Normal, non-SMP, 486+ invalidation functions. 814 * We inline these within pmap.c for speed. 815 */ 816PMAP_INLINE void 817pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 818{ 819 820 if (pmap == kernel_pmap || pmap->pm_active) 821 invlpg(va); 822} 823 824PMAP_INLINE void 825pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 826{ 827 vm_offset_t addr; 828 829 if (pmap == kernel_pmap || pmap->pm_active) 830 for (addr = sva; addr < eva; addr += PAGE_SIZE) 831 invlpg(addr); 832} 833 834PMAP_INLINE void 835pmap_invalidate_all(pmap_t pmap) 836{ 837 838 if (pmap == kernel_pmap || pmap->pm_active) 839 invltlb(); 840} 841 842PMAP_INLINE void 843pmap_invalidate_cache(void) 844{ 845 846 wbinvd(); 847} 848#endif /* !SMP */ 849 850/* 851 * Are we current address space or kernel? N.B. We return FALSE when 852 * a pmap's page table is in use because a kernel thread is borrowing 853 * it. The borrowed page table can change spontaneously, making any 854 * dependence on its continued use subject to a race condition. 855 */ 856static __inline int 857pmap_is_current(pmap_t pmap) 858{ 859 860 return (pmap == kernel_pmap || 861 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) && 862 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME))); 863} 864 865/* 866 * If the given pmap is not the current or kernel pmap, the returned pte must 867 * be released by passing it to pmap_pte_release(). 868 */ 869pt_entry_t * 870pmap_pte(pmap_t pmap, vm_offset_t va) 871{ 872 pd_entry_t newpf; 873 pd_entry_t *pde; 874 875 pde = pmap_pde(pmap, va); 876 if (*pde & PG_PS) 877 return (pde); 878 if (*pde != 0) { 879 /* are we current address space or kernel? */ 880 if (pmap_is_current(pmap)) 881 return (vtopte(va)); 882 mtx_lock(&PMAP2mutex); 883 newpf = *pde & PG_FRAME; 884 if ((*PMAP2 & PG_FRAME) != newpf) { 885 *PMAP2 = newpf | PG_RW | PG_V | PG_A | PG_M; 886 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2); 887 } 888 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1))); 889 } 890 return (0); 891} 892 893/* 894 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte 895 * being NULL. 896 */ 897static __inline void 898pmap_pte_release(pt_entry_t *pte) 899{ 900 901 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) 902 mtx_unlock(&PMAP2mutex); 903} 904 905static __inline void 906invlcaddr(void *caddr) 907{ 908 909 invlpg((u_int)caddr); 910} 911 912/* 913 * Super fast pmap_pte routine best used when scanning 914 * the pv lists. This eliminates many coarse-grained 915 * invltlb calls. Note that many of the pv list 916 * scans are across different pmaps. It is very wasteful 917 * to do an entire invltlb for checking a single mapping. 918 * 919 * If the given pmap is not the current pmap, vm_page_queue_mtx 920 * must be held and curthread pinned to a CPU. 921 */ 922static pt_entry_t * 923pmap_pte_quick(pmap_t pmap, vm_offset_t va) 924{ 925 pd_entry_t newpf; 926 pd_entry_t *pde; 927 928 pde = pmap_pde(pmap, va); 929 if (*pde & PG_PS) 930 return (pde); 931 if (*pde != 0) { 932 /* are we current address space or kernel? */ 933 if (pmap_is_current(pmap)) 934 return (vtopte(va)); 935 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 936 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 937 newpf = *pde & PG_FRAME; 938 if ((*PMAP1 & PG_FRAME) != newpf) { 939 *PMAP1 = newpf | PG_RW | PG_V | PG_A | PG_M; 940#ifdef SMP 941 PMAP1cpu = PCPU_GET(cpuid); 942#endif 943 invlcaddr(PADDR1); 944 PMAP1changed++; 945 } else 946#ifdef SMP 947 if (PMAP1cpu != PCPU_GET(cpuid)) { 948 PMAP1cpu = PCPU_GET(cpuid); 949 invlcaddr(PADDR1); 950 PMAP1changedcpu++; 951 } else 952#endif 953 PMAP1unchanged++; 954 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1))); 955 } 956 return (0); 957} 958 959/* 960 * Routine: pmap_extract 961 * Function: 962 * Extract the physical page address associated 963 * with the given map/virtual_address pair. 964 */ 965vm_paddr_t 966pmap_extract(pmap_t pmap, vm_offset_t va) 967{ 968 vm_paddr_t rtval; 969 pt_entry_t *pte; 970 pd_entry_t pde; 971 972 rtval = 0; 973 PMAP_LOCK(pmap); 974 pde = pmap->pm_pdir[va >> PDRSHIFT]; 975 if (pde != 0) { 976 if ((pde & PG_PS) != 0) { 977 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK); 978 PMAP_UNLOCK(pmap); 979 return rtval; 980 } 981 pte = pmap_pte(pmap, va); 982 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK); 983 pmap_pte_release(pte); 984 } 985 PMAP_UNLOCK(pmap); 986 return (rtval); 987} 988 989/* 990 * Routine: pmap_extract_and_hold 991 * Function: 992 * Atomically extract and hold the physical page 993 * with the given pmap and virtual address pair 994 * if that mapping permits the given protection. 995 */ 996vm_page_t 997pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 998{ 999 pd_entry_t pde; 1000 pt_entry_t pte; 1001 vm_page_t m; 1002 1003 m = NULL; 1004 vm_page_lock_queues(); 1005 PMAP_LOCK(pmap); 1006 pde = *pmap_pde(pmap, va); 1007 if (pde != 0) { 1008 if (pde & PG_PS) { 1009 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) { 1010 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) | 1011 (va & PDRMASK)); 1012 vm_page_hold(m); 1013 } 1014 } else { 1015 sched_pin(); 1016 pte = *pmap_pte_quick(pmap, va); 1017 if (pte != 0 && 1018 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) { 1019 m = PHYS_TO_VM_PAGE(pte & PG_FRAME); 1020 vm_page_hold(m); 1021 } 1022 sched_unpin(); 1023 } 1024 } 1025 vm_page_unlock_queues(); 1026 PMAP_UNLOCK(pmap); 1027 return (m); 1028} 1029 1030/*************************************************** 1031 * Low level mapping routines..... 1032 ***************************************************/ 1033 1034/* 1035 * Add a wired page to the kva. 1036 * Note: not SMP coherent. 1037 */ 1038PMAP_INLINE void 1039pmap_kenter(vm_offset_t va, vm_paddr_t pa) 1040{ 1041 pt_entry_t *pte; 1042 1043 pte = vtopte(va); 1044 pte_store(pte, pa | PG_RW | PG_V | pgeflag); 1045} 1046 1047PMAP_INLINE void 1048pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode) 1049{ 1050 pt_entry_t *pte; 1051 1052 pte = vtopte(va); 1053 pte_store(pte, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0)); 1054} 1055 1056/* 1057 * Remove a page from the kernel pagetables. 1058 * Note: not SMP coherent. 1059 */ 1060PMAP_INLINE void 1061pmap_kremove(vm_offset_t va) 1062{ 1063 pt_entry_t *pte; 1064 1065 pte = vtopte(va); 1066 pte_clear(pte); 1067} 1068 1069/* 1070 * Used to map a range of physical addresses into kernel 1071 * virtual address space. 1072 * 1073 * The value passed in '*virt' is a suggested virtual address for 1074 * the mapping. Architectures which can support a direct-mapped 1075 * physical to virtual region can return the appropriate address 1076 * within that region, leaving '*virt' unchanged. Other 1077 * architectures should map the pages starting at '*virt' and 1078 * update '*virt' with the first usable address after the mapped 1079 * region. 1080 */ 1081vm_offset_t 1082pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 1083{ 1084 vm_offset_t va, sva; 1085 1086 va = sva = *virt; 1087 while (start < end) { 1088 pmap_kenter(va, start); 1089 va += PAGE_SIZE; 1090 start += PAGE_SIZE; 1091 } 1092 pmap_invalidate_range(kernel_pmap, sva, va); 1093 *virt = va; 1094 return (sva); 1095} 1096 1097 1098/* 1099 * Add a list of wired pages to the kva 1100 * this routine is only used for temporary 1101 * kernel mappings that do not need to have 1102 * page modification or references recorded. 1103 * Note that old mappings are simply written 1104 * over. The page *must* be wired. 1105 * Note: SMP coherent. Uses a ranged shootdown IPI. 1106 */ 1107void 1108pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count) 1109{ 1110 pt_entry_t *endpte, oldpte, *pte; 1111 1112 oldpte = 0; 1113 pte = vtopte(sva); 1114 endpte = pte + count; 1115 while (pte < endpte) { 1116 oldpte |= *pte; 1117 pte_store(pte, VM_PAGE_TO_PHYS(*ma) | pgeflag | PG_RW | PG_V); 1118 pte++; 1119 ma++; 1120 } 1121 if ((oldpte & PG_V) != 0) 1122 pmap_invalidate_range(kernel_pmap, sva, sva + count * 1123 PAGE_SIZE); 1124} 1125 1126/* 1127 * This routine tears out page mappings from the 1128 * kernel -- it is meant only for temporary mappings. 1129 * Note: SMP coherent. Uses a ranged shootdown IPI. 1130 */ 1131void 1132pmap_qremove(vm_offset_t sva, int count) 1133{ 1134 vm_offset_t va; 1135 1136 va = sva; 1137 while (count-- > 0) { 1138 pmap_kremove(va); 1139 va += PAGE_SIZE; 1140 } 1141 pmap_invalidate_range(kernel_pmap, sva, va); 1142} 1143 1144/*************************************************** 1145 * Page table page management routines..... 1146 ***************************************************/ 1147static PMAP_INLINE void 1148pmap_free_zero_pages(vm_page_t free) 1149{ 1150 vm_page_t m; 1151 1152 while (free != NULL) { 1153 m = free; 1154 free = m->right; 1155 vm_page_free_zero(m); 1156 } 1157} 1158 1159/* 1160 * This routine unholds page table pages, and if the hold count 1161 * drops to zero, then it decrements the wire count. 1162 */ 1163static PMAP_INLINE int 1164pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1165{ 1166 1167 --m->wire_count; 1168 if (m->wire_count == 0) 1169 return _pmap_unwire_pte_hold(pmap, m, free); 1170 else 1171 return 0; 1172} 1173 1174static int 1175_pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1176{ 1177 vm_offset_t pteva; 1178 1179 /* 1180 * unmap the page table page 1181 */ 1182 pmap->pm_pdir[m->pindex] = 0; 1183 --pmap->pm_stats.resident_count; 1184 1185 /* 1186 * This is a release store so that the ordinary store unmapping 1187 * the page table page is globally performed before TLB shoot- 1188 * down is begun. 1189 */ 1190 atomic_subtract_rel_int(&cnt.v_wire_count, 1); 1191 1192 /* 1193 * Do an invltlb to make the invalidated mapping 1194 * take effect immediately. 1195 */ 1196 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1197 pmap_invalidate_page(pmap, pteva); 1198 1199 /* 1200 * Put page on a list so that it is released after 1201 * *ALL* TLB shootdown is done 1202 */ 1203 m->right = *free; 1204 *free = m; 1205 1206 return 1; 1207} 1208 1209/* 1210 * After removing a page table entry, this routine is used to 1211 * conditionally free the page, and manage the hold/wire counts. 1212 */ 1213static int 1214pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free) 1215{ 1216 pd_entry_t ptepde; 1217 vm_page_t mpte; 1218 1219 if (va >= VM_MAXUSER_ADDRESS) 1220 return 0; 1221 ptepde = *pmap_pde(pmap, va); 1222 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); 1223 return pmap_unwire_pte_hold(pmap, mpte, free); 1224} 1225 1226void 1227pmap_pinit0(pmap_t pmap) 1228{ 1229 1230 PMAP_LOCK_INIT(pmap); 1231 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1232#ifdef PAE 1233 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1234#endif 1235 pmap->pm_active = 0; 1236 PCPU_SET(curpmap, pmap); 1237 TAILQ_INIT(&pmap->pm_pvchunk); 1238 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1239 mtx_lock_spin(&allpmaps_lock); 1240 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1241 mtx_unlock_spin(&allpmaps_lock); 1242} 1243 1244/* 1245 * Initialize a preallocated and zeroed pmap structure, 1246 * such as one in a vmspace structure. 1247 */ 1248int 1249pmap_pinit(pmap_t pmap) 1250{ 1251 vm_page_t m, ptdpg[NPGPTD]; 1252 vm_paddr_t pa; 1253 static int color; 1254 int i; 1255 1256 PMAP_LOCK_INIT(pmap); 1257 1258 /* 1259 * No need to allocate page table space yet but we do need a valid 1260 * page directory table. 1261 */ 1262 if (pmap->pm_pdir == NULL) { 1263 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1264 NBPTD); 1265 1266 if (pmap->pm_pdir == NULL) { 1267 PMAP_LOCK_DESTROY(pmap); 1268 return (0); 1269 } 1270#ifdef PAE 1271 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO); 1272 KASSERT(((vm_offset_t)pmap->pm_pdpt & 1273 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0, 1274 ("pmap_pinit: pdpt misaligned")); 1275 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30), 1276 ("pmap_pinit: pdpt above 4g")); 1277#endif 1278 } 1279 1280 /* 1281 * allocate the page directory page(s) 1282 */ 1283 for (i = 0; i < NPGPTD;) { 1284 m = vm_page_alloc(NULL, color++, 1285 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1286 VM_ALLOC_ZERO); 1287 if (m == NULL) 1288 VM_WAIT; 1289 else { 1290 ptdpg[i++] = m; 1291 } 1292 } 1293 1294 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1295 1296 for (i = 0; i < NPGPTD; i++) { 1297 if ((ptdpg[i]->flags & PG_ZERO) == 0) 1298 bzero(pmap->pm_pdir + (i * NPDEPG), PAGE_SIZE); 1299 } 1300 1301 mtx_lock_spin(&allpmaps_lock); 1302 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1303 mtx_unlock_spin(&allpmaps_lock); 1304 /* Wire in kernel global address entries. */ 1305 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1306 1307 /* install self-referential address mapping entry(s) */ 1308 for (i = 0; i < NPGPTD; i++) { 1309 pa = VM_PAGE_TO_PHYS(ptdpg[i]); 1310 pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M; 1311#ifdef PAE 1312 pmap->pm_pdpt[i] = pa | PG_V; 1313#endif 1314 } 1315 1316 pmap->pm_active = 0; 1317 TAILQ_INIT(&pmap->pm_pvchunk); 1318 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1319 1320 return (1); 1321} 1322 1323/* 1324 * this routine is called if the page table page is not 1325 * mapped correctly. 1326 */ 1327static vm_page_t 1328_pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags) 1329{ 1330 vm_paddr_t ptepa; 1331 vm_page_t m; 1332 1333 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1334 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1335 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1336 1337 /* 1338 * Allocate a page table page. 1339 */ 1340 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1341 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1342 if (flags & M_WAITOK) { 1343 PMAP_UNLOCK(pmap); 1344 vm_page_unlock_queues(); 1345 VM_WAIT; 1346 vm_page_lock_queues(); 1347 PMAP_LOCK(pmap); 1348 } 1349 1350 /* 1351 * Indicate the need to retry. While waiting, the page table 1352 * page may have been allocated. 1353 */ 1354 return (NULL); 1355 } 1356 if ((m->flags & PG_ZERO) == 0) 1357 pmap_zero_page(m); 1358 1359 /* 1360 * Map the pagetable page into the process address space, if 1361 * it isn't already there. 1362 */ 1363 1364 pmap->pm_stats.resident_count++; 1365 1366 ptepa = VM_PAGE_TO_PHYS(m); 1367 pmap->pm_pdir[ptepindex] = 1368 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M); 1369 1370 return m; 1371} 1372 1373static vm_page_t 1374pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags) 1375{ 1376 unsigned ptepindex; 1377 pd_entry_t ptepa; 1378 vm_page_t m; 1379 1380 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1381 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1382 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1383 1384 /* 1385 * Calculate pagetable page index 1386 */ 1387 ptepindex = va >> PDRSHIFT; 1388retry: 1389 /* 1390 * Get the page directory entry 1391 */ 1392 ptepa = pmap->pm_pdir[ptepindex]; 1393 1394 /* 1395 * This supports switching from a 4MB page to a 1396 * normal 4K page. 1397 */ 1398 if (ptepa & PG_PS) { 1399 pmap->pm_pdir[ptepindex] = 0; 1400 ptepa = 0; 1401 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1402 pmap_invalidate_all(kernel_pmap); 1403 } 1404 1405 /* 1406 * If the page table page is mapped, we just increment the 1407 * hold count, and activate it. 1408 */ 1409 if (ptepa) { 1410 m = PHYS_TO_VM_PAGE(ptepa & PG_FRAME); 1411 m->wire_count++; 1412 } else { 1413 /* 1414 * Here if the pte page isn't mapped, or if it has 1415 * been deallocated. 1416 */ 1417 m = _pmap_allocpte(pmap, ptepindex, flags); 1418 if (m == NULL && (flags & M_WAITOK)) 1419 goto retry; 1420 } 1421 return (m); 1422} 1423 1424 1425/*************************************************** 1426* Pmap allocation/deallocation routines. 1427 ***************************************************/ 1428 1429#ifdef SMP 1430/* 1431 * Deal with a SMP shootdown of other users of the pmap that we are 1432 * trying to dispose of. This can be a bit hairy. 1433 */ 1434static u_int *lazymask; 1435static u_int lazyptd; 1436static volatile u_int lazywait; 1437 1438void pmap_lazyfix_action(void); 1439 1440void 1441pmap_lazyfix_action(void) 1442{ 1443 u_int mymask = PCPU_GET(cpumask); 1444 1445#ifdef COUNT_IPIS 1446 *ipi_lazypmap_counts[PCPU_GET(cpuid)]++; 1447#endif 1448 if (rcr3() == lazyptd) 1449 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1450 atomic_clear_int(lazymask, mymask); 1451 atomic_store_rel_int(&lazywait, 1); 1452} 1453 1454static void 1455pmap_lazyfix_self(u_int mymask) 1456{ 1457 1458 if (rcr3() == lazyptd) 1459 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1460 atomic_clear_int(lazymask, mymask); 1461} 1462 1463 1464static void 1465pmap_lazyfix(pmap_t pmap) 1466{ 1467 u_int mymask; 1468 u_int mask; 1469 u_int spins; 1470 1471 while ((mask = pmap->pm_active) != 0) { 1472 spins = 50000000; 1473 mask = mask & -mask; /* Find least significant set bit */ 1474 mtx_lock_spin(&smp_ipi_mtx); 1475#ifdef PAE 1476 lazyptd = vtophys(pmap->pm_pdpt); 1477#else 1478 lazyptd = vtophys(pmap->pm_pdir); 1479#endif 1480 mymask = PCPU_GET(cpumask); 1481 if (mask == mymask) { 1482 lazymask = &pmap->pm_active; 1483 pmap_lazyfix_self(mymask); 1484 } else { 1485 atomic_store_rel_int((u_int *)&lazymask, 1486 (u_int)&pmap->pm_active); 1487 atomic_store_rel_int(&lazywait, 0); 1488 ipi_selected(mask, IPI_LAZYPMAP); 1489 while (lazywait == 0) { 1490 ia32_pause(); 1491 if (--spins == 0) 1492 break; 1493 } 1494 } 1495 mtx_unlock_spin(&smp_ipi_mtx); 1496 if (spins == 0) 1497 printf("pmap_lazyfix: spun for 50000000\n"); 1498 } 1499} 1500 1501#else /* SMP */ 1502 1503/* 1504 * Cleaning up on uniprocessor is easy. For various reasons, we're 1505 * unlikely to have to even execute this code, including the fact 1506 * that the cleanup is deferred until the parent does a wait(2), which 1507 * means that another userland process has run. 1508 */ 1509static void 1510pmap_lazyfix(pmap_t pmap) 1511{ 1512 u_int cr3; 1513 1514 cr3 = vtophys(pmap->pm_pdir); 1515 if (cr3 == rcr3()) { 1516 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1517 pmap->pm_active &= ~(PCPU_GET(cpumask)); 1518 } 1519} 1520#endif /* SMP */ 1521 1522/* 1523 * Release any resources held by the given physical map. 1524 * Called when a pmap initialized by pmap_pinit is being released. 1525 * Should only be called if the map contains no valid mappings. 1526 */ 1527void 1528pmap_release(pmap_t pmap) 1529{ 1530 vm_page_t m, ptdpg[NPGPTD]; 1531 int i; 1532 1533 KASSERT(pmap->pm_stats.resident_count == 0, 1534 ("pmap_release: pmap resident count %ld != 0", 1535 pmap->pm_stats.resident_count)); 1536 1537 pmap_lazyfix(pmap); 1538 mtx_lock_spin(&allpmaps_lock); 1539 LIST_REMOVE(pmap, pm_list); 1540 mtx_unlock_spin(&allpmaps_lock); 1541 1542 for (i = 0; i < NPGPTD; i++) 1543 ptdpg[i] = PHYS_TO_VM_PAGE(pmap->pm_pdir[PTDPTDI + i] & 1544 PG_FRAME); 1545 1546 bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) * 1547 sizeof(*pmap->pm_pdir)); 1548 1549 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1550 1551 for (i = 0; i < NPGPTD; i++) { 1552 m = ptdpg[i]; 1553#ifdef PAE 1554 KASSERT(VM_PAGE_TO_PHYS(m) == (pmap->pm_pdpt[i] & PG_FRAME), 1555 ("pmap_release: got wrong ptd page")); 1556#endif 1557 m->wire_count--; 1558 atomic_subtract_int(&cnt.v_wire_count, 1); 1559 vm_page_free_zero(m); 1560 } 1561 PMAP_LOCK_DESTROY(pmap); 1562} 1563 1564static int 1565kvm_size(SYSCTL_HANDLER_ARGS) 1566{ 1567 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1568 1569 return sysctl_handle_long(oidp, &ksize, 0, req); 1570} 1571SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1572 0, 0, kvm_size, "IU", "Size of KVM"); 1573 1574static int 1575kvm_free(SYSCTL_HANDLER_ARGS) 1576{ 1577 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1578 1579 return sysctl_handle_long(oidp, &kfree, 0, req); 1580} 1581SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1582 0, 0, kvm_free, "IU", "Amount of KVM free"); 1583 1584/* 1585 * grow the number of kernel page table entries, if needed 1586 */ 1587void 1588pmap_growkernel(vm_offset_t addr) 1589{ 1590 struct pmap *pmap; 1591 vm_paddr_t ptppaddr; 1592 vm_page_t nkpg; 1593 pd_entry_t newpdir; 1594 pt_entry_t *pde; 1595 1596 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1597 if (kernel_vm_end == 0) { 1598 kernel_vm_end = KERNBASE; 1599 nkpt = 0; 1600 while (pdir_pde(PTD, kernel_vm_end)) { 1601 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1602 nkpt++; 1603 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1604 kernel_vm_end = kernel_map->max_offset; 1605 break; 1606 } 1607 } 1608 } 1609 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1610 if (addr - 1 >= kernel_map->max_offset) 1611 addr = kernel_map->max_offset; 1612 while (kernel_vm_end < addr) { 1613 if (pdir_pde(PTD, kernel_vm_end)) { 1614 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1615 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1616 kernel_vm_end = kernel_map->max_offset; 1617 break; 1618 } 1619 continue; 1620 } 1621 1622 /* 1623 * This index is bogus, but out of the way 1624 */ 1625 nkpg = vm_page_alloc(NULL, nkpt, 1626 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1627 if (!nkpg) 1628 panic("pmap_growkernel: no memory to grow kernel"); 1629 1630 nkpt++; 1631 1632 pmap_zero_page(nkpg); 1633 ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1634 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1635 pdir_pde(PTD, kernel_vm_end) = newpdir; 1636 1637 mtx_lock_spin(&allpmaps_lock); 1638 LIST_FOREACH(pmap, &allpmaps, pm_list) { 1639 pde = pmap_pde(pmap, kernel_vm_end); 1640 pde_store(pde, newpdir); 1641 } 1642 mtx_unlock_spin(&allpmaps_lock); 1643 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1644 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1645 kernel_vm_end = kernel_map->max_offset; 1646 break; 1647 } 1648 } 1649} 1650 1651 1652/*************************************************** 1653 * page management routines. 1654 ***************************************************/ 1655 1656CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE); 1657CTASSERT(_NPCM == 11); 1658 1659static __inline struct pv_chunk * 1660pv_to_chunk(pv_entry_t pv) 1661{ 1662 1663 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK); 1664} 1665 1666#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap) 1667 1668#define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */ 1669#define PC_FREE10 0x0000fffful /* Free values for index 10 */ 1670 1671static uint32_t pc_freemask[11] = { 1672 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1673 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1674 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1675 PC_FREE0_9, PC_FREE10 1676}; 1677 1678SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0, 1679 "Current number of pv entries"); 1680 1681#ifdef PV_STATS 1682static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail; 1683 1684SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0, 1685 "Current number of pv entry chunks"); 1686SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0, 1687 "Current number of pv entry chunks allocated"); 1688SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0, 1689 "Current number of pv entry chunks frees"); 1690SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0, 1691 "Number of times tried to get a chunk page but failed."); 1692 1693static long pv_entry_frees, pv_entry_allocs; 1694static int pv_entry_spare; 1695 1696SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0, 1697 "Current number of pv entry frees"); 1698SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0, 1699 "Current number of pv entry allocs"); 1700SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0, 1701 "Current number of spare pv entries"); 1702 1703static int pmap_collect_inactive, pmap_collect_active; 1704 1705SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0, 1706 "Current number times pmap_collect called on inactive queue"); 1707SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0, 1708 "Current number times pmap_collect called on active queue"); 1709#endif 1710 1711/* 1712 * We are in a serious low memory condition. Resort to 1713 * drastic measures to free some pages so we can allocate 1714 * another pv entry chunk. This is normally called to 1715 * unmap inactive pages, and if necessary, active pages. 1716 */ 1717static void 1718pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq) 1719{ 1720 pmap_t pmap; 1721 pt_entry_t *pte, tpte; 1722 pv_entry_t next_pv, pv; 1723 vm_offset_t va; 1724 vm_page_t m, free; 1725 1726 sched_pin(); 1727 TAILQ_FOREACH(m, &vpq->pl, pageq) { 1728 if (m->hold_count || m->busy) 1729 continue; 1730 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) { 1731 va = pv->pv_va; 1732 pmap = PV_PMAP(pv); 1733 /* Avoid deadlock and lock recursion. */ 1734 if (pmap > locked_pmap) 1735 PMAP_LOCK(pmap); 1736 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) 1737 continue; 1738 pmap->pm_stats.resident_count--; 1739 pte = pmap_pte_quick(pmap, va); 1740 tpte = pte_load_clear(pte); 1741 KASSERT((tpte & PG_W) == 0, 1742 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte)); 1743 if (tpte & PG_A) 1744 vm_page_flag_set(m, PG_REFERENCED); 1745 if (tpte & PG_M) { 1746 KASSERT((tpte & PG_RW), 1747 ("pmap_collect: modified page not writable: va: %#x, pte: %#jx", 1748 va, (uintmax_t)tpte)); 1749 vm_page_dirty(m); 1750 } 1751 free = NULL; 1752 pmap_unuse_pt(pmap, va, &free); 1753 pmap_invalidate_page(pmap, va); 1754 pmap_free_zero_pages(free); 1755 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1756 if (TAILQ_EMPTY(&m->md.pv_list)) 1757 vm_page_flag_clear(m, PG_WRITEABLE); 1758 m->md.pv_list_count--; 1759 free_pv_entry(pmap, pv); 1760 if (pmap != locked_pmap) 1761 PMAP_UNLOCK(pmap); 1762 } 1763 } 1764 sched_unpin(); 1765} 1766 1767 1768/* 1769 * free the pv_entry back to the free list 1770 */ 1771static void 1772free_pv_entry(pmap_t pmap, pv_entry_t pv) 1773{ 1774 vm_page_t m; 1775 struct pv_chunk *pc; 1776 int idx, field, bit; 1777 1778 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1779 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1780 PV_STAT(pv_entry_frees++); 1781 PV_STAT(pv_entry_spare++); 1782 pv_entry_count--; 1783 pc = pv_to_chunk(pv); 1784 idx = pv - &pc->pc_pventry[0]; 1785 field = idx / 32; 1786 bit = idx % 32; 1787 pc->pc_map[field] |= 1ul << bit; 1788 /* move to head of list */ 1789 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 1790 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 1791 for (idx = 0; idx < _NPCM; idx++) 1792 if (pc->pc_map[idx] != pc_freemask[idx]) 1793 return; 1794 PV_STAT(pv_entry_spare -= _NPCPV); 1795 PV_STAT(pc_chunk_count--); 1796 PV_STAT(pc_chunk_frees++); 1797 /* entire chunk is free, return it */ 1798 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 1799 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 1800 pmap_qremove((vm_offset_t)pc, 1); 1801 vm_page_unwire(m, 0); 1802 vm_page_free(m); 1803 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 1804} 1805 1806/* 1807 * get a new pv_entry, allocating a block from the system 1808 * when needed. 1809 */ 1810static pv_entry_t 1811get_pv_entry(pmap_t pmap, int try) 1812{ 1813 static const struct timeval printinterval = { 60, 0 }; 1814 static struct timeval lastprint; 1815 static vm_pindex_t colour; 1816 int bit, field; 1817 pv_entry_t pv; 1818 struct pv_chunk *pc; 1819 vm_page_t m; 1820 1821 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1822 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1823 PV_STAT(pv_entry_allocs++); 1824 pv_entry_count++; 1825 if (pv_entry_count > pv_entry_high_water) 1826 if (ratecheck(&lastprint, &printinterval)) 1827 printf("Approaching the limit on PV entries, consider " 1828 "increasing either the vm.pmap.shpgperproc or the " 1829 "vm.pmap.pv_entry_max tunable.\n"); 1830 pc = TAILQ_FIRST(&pmap->pm_pvchunk); 1831 if (pc != NULL) { 1832 for (field = 0; field < _NPCM; field++) { 1833 if (pc->pc_map[field]) { 1834 bit = bsfl(pc->pc_map[field]); 1835 break; 1836 } 1837 } 1838 if (field < _NPCM) { 1839 pv = &pc->pc_pventry[field * 32 + bit]; 1840 pc->pc_map[field] &= ~(1ul << bit); 1841 /* If this was the last item, move it to tail */ 1842 for (field = 0; field < _NPCM; field++) 1843 if (pc->pc_map[field] != 0) { 1844 PV_STAT(pv_entry_spare--); 1845 return (pv); /* not full, return */ 1846 } 1847 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 1848 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); 1849 PV_STAT(pv_entry_spare--); 1850 return (pv); 1851 } 1852 } 1853 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 1854 m = vm_page_alloc(NULL, colour, VM_ALLOC_NORMAL | 1855 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED); 1856 if (m == NULL || pc == NULL) { 1857 if (try) { 1858 pv_entry_count--; 1859 PV_STAT(pc_chunk_tryfail++); 1860 if (m) { 1861 vm_page_lock_queues(); 1862 vm_page_unwire(m, 0); 1863 vm_page_free(m); 1864 vm_page_unlock_queues(); 1865 } 1866 if (pc) 1867 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 1868 return (NULL); 1869 } 1870 /* 1871 * Reclaim pv entries: At first, destroy mappings to 1872 * inactive pages. After that, if a pv chunk entry 1873 * is still needed, destroy mappings to active pages. 1874 */ 1875 PV_STAT(pmap_collect_inactive++); 1876 pmap_collect(pmap, &vm_page_queues[PQ_INACTIVE]); 1877 if (m == NULL) 1878 m = vm_page_alloc(NULL, colour, VM_ALLOC_NORMAL | 1879 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED); 1880 if (pc == NULL) 1881 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 1882 if (m == NULL || pc == NULL) { 1883 PV_STAT(pmap_collect_active++); 1884 pmap_collect(pmap, &vm_page_queues[PQ_ACTIVE]); 1885 if (m == NULL) 1886 m = vm_page_alloc(NULL, colour, 1887 VM_ALLOC_SYSTEM | VM_ALLOC_NOOBJ | 1888 VM_ALLOC_WIRED); 1889 if (pc == NULL) 1890 pc = (struct pv_chunk *) 1891 pmap_ptelist_alloc(&pv_vafree); 1892 if (m == NULL || pc == NULL) 1893 panic("get_pv_entry: increase vm.pmap.shpgperproc"); 1894 } 1895 } 1896 PV_STAT(pc_chunk_count++); 1897 PV_STAT(pc_chunk_allocs++); 1898 colour++; 1899 pmap_qenter((vm_offset_t)pc, &m, 1); 1900 pc->pc_pmap = pmap; 1901 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */ 1902 for (field = 1; field < _NPCM; field++) 1903 pc->pc_map[field] = pc_freemask[field]; 1904 pv = &pc->pc_pventry[0]; 1905 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 1906 PV_STAT(pv_entry_spare += _NPCPV - 1); 1907 return (pv); 1908} 1909 1910static void 1911pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 1912{ 1913 pv_entry_t pv; 1914 1915 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1916 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1917 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 1918 if (pmap == PV_PMAP(pv) && va == pv->pv_va) 1919 break; 1920 } 1921 KASSERT(pv != NULL, ("pmap_remove_entry: pv not found")); 1922 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1923 m->md.pv_list_count--; 1924 if (TAILQ_EMPTY(&m->md.pv_list)) 1925 vm_page_flag_clear(m, PG_WRITEABLE); 1926 free_pv_entry(pmap, pv); 1927} 1928 1929/* 1930 * Create a pv entry for page at pa for 1931 * (pmap, va). 1932 */ 1933static void 1934pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 1935{ 1936 pv_entry_t pv; 1937 1938 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1939 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1940 pv = get_pv_entry(pmap, FALSE); 1941 pv->pv_va = va; 1942 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 1943 m->md.pv_list_count++; 1944} 1945 1946/* 1947 * Conditionally create a pv entry. 1948 */ 1949static boolean_t 1950pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 1951{ 1952 pv_entry_t pv; 1953 1954 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1955 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1956 if (pv_entry_count < pv_entry_high_water && 1957 (pv = get_pv_entry(pmap, TRUE)) != NULL) { 1958 pv->pv_va = va; 1959 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 1960 m->md.pv_list_count++; 1961 return (TRUE); 1962 } else 1963 return (FALSE); 1964} 1965 1966/* 1967 * pmap_remove_pte: do the things to unmap a page in a process 1968 */ 1969static int 1970pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free) 1971{ 1972 pt_entry_t oldpte; 1973 vm_page_t m; 1974 1975 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1976 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1977 oldpte = pte_load_clear(ptq); 1978 if (oldpte & PG_W) 1979 pmap->pm_stats.wired_count -= 1; 1980 /* 1981 * Machines that don't support invlpg, also don't support 1982 * PG_G. 1983 */ 1984 if (oldpte & PG_G) 1985 pmap_invalidate_page(kernel_pmap, va); 1986 pmap->pm_stats.resident_count -= 1; 1987 if (oldpte & PG_MANAGED) { 1988 m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME); 1989 if (oldpte & PG_M) { 1990 KASSERT((oldpte & PG_RW), 1991 ("pmap_remove_pte: modified page not writable: va: %#x, pte: %#jx", 1992 va, (uintmax_t)oldpte)); 1993 vm_page_dirty(m); 1994 } 1995 if (oldpte & PG_A) 1996 vm_page_flag_set(m, PG_REFERENCED); 1997 pmap_remove_entry(pmap, m, va); 1998 } 1999 return (pmap_unuse_pt(pmap, va, free)); 2000} 2001 2002/* 2003 * Remove a single page from a process address space 2004 */ 2005static void 2006pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free) 2007{ 2008 pt_entry_t *pte; 2009 2010 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2011 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 2012 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2013 if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0) 2014 return; 2015 pmap_remove_pte(pmap, pte, va, free); 2016 pmap_invalidate_page(pmap, va); 2017} 2018 2019/* 2020 * Remove the given range of addresses from the specified map. 2021 * 2022 * It is assumed that the start and end are properly 2023 * rounded to the page size. 2024 */ 2025void 2026pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 2027{ 2028 vm_offset_t pdnxt; 2029 pd_entry_t ptpaddr; 2030 pt_entry_t *pte; 2031 vm_page_t free = NULL; 2032 int anyvalid; 2033 2034 /* 2035 * Perform an unsynchronized read. This is, however, safe. 2036 */ 2037 if (pmap->pm_stats.resident_count == 0) 2038 return; 2039 2040 anyvalid = 0; 2041 2042 vm_page_lock_queues(); 2043 sched_pin(); 2044 PMAP_LOCK(pmap); 2045 2046 /* 2047 * special handling of removing one page. a very 2048 * common operation and easy to short circuit some 2049 * code. 2050 */ 2051 if ((sva + PAGE_SIZE == eva) && 2052 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 2053 pmap_remove_page(pmap, sva, &free); 2054 goto out; 2055 } 2056 2057 for (; sva < eva; sva = pdnxt) { 2058 unsigned pdirindex; 2059 2060 /* 2061 * Calculate index for next page table. 2062 */ 2063 pdnxt = (sva + NBPDR) & ~PDRMASK; 2064 if (pmap->pm_stats.resident_count == 0) 2065 break; 2066 2067 pdirindex = sva >> PDRSHIFT; 2068 ptpaddr = pmap->pm_pdir[pdirindex]; 2069 2070 /* 2071 * Weed out invalid mappings. Note: we assume that the page 2072 * directory table is always allocated, and in kernel virtual. 2073 */ 2074 if (ptpaddr == 0) 2075 continue; 2076 2077 /* 2078 * Check for large page. 2079 */ 2080 if ((ptpaddr & PG_PS) != 0) { 2081 pmap->pm_pdir[pdirindex] = 0; 2082 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 2083 anyvalid = 1; 2084 continue; 2085 } 2086 2087 /* 2088 * Limit our scan to either the end of the va represented 2089 * by the current page table page, or to the end of the 2090 * range being removed. 2091 */ 2092 if (pdnxt > eva) 2093 pdnxt = eva; 2094 2095 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2096 sva += PAGE_SIZE) { 2097 if (*pte == 0) 2098 continue; 2099 2100 /* 2101 * The TLB entry for a PG_G mapping is invalidated 2102 * by pmap_remove_pte(). 2103 */ 2104 if ((*pte & PG_G) == 0) 2105 anyvalid = 1; 2106 if (pmap_remove_pte(pmap, pte, sva, &free)) 2107 break; 2108 } 2109 } 2110out: 2111 sched_unpin(); 2112 if (anyvalid) 2113 pmap_invalidate_all(pmap); 2114 vm_page_unlock_queues(); 2115 PMAP_UNLOCK(pmap); 2116 pmap_free_zero_pages(free); 2117} 2118 2119/* 2120 * Routine: pmap_remove_all 2121 * Function: 2122 * Removes this physical page from 2123 * all physical maps in which it resides. 2124 * Reflects back modify bits to the pager. 2125 * 2126 * Notes: 2127 * Original versions of this routine were very 2128 * inefficient because they iteratively called 2129 * pmap_remove (slow...) 2130 */ 2131 2132void 2133pmap_remove_all(vm_page_t m) 2134{ 2135 pv_entry_t pv; 2136 pmap_t pmap; 2137 pt_entry_t *pte, tpte; 2138 vm_page_t free; 2139 2140#if defined(PMAP_DIAGNOSTIC) 2141 /* 2142 * XXX This makes pmap_remove_all() illegal for non-managed pages! 2143 */ 2144 if (m->flags & PG_FICTITIOUS) { 2145 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%x", 2146 VM_PAGE_TO_PHYS(m)); 2147 } 2148#endif 2149 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2150 sched_pin(); 2151 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2152 pmap = PV_PMAP(pv); 2153 PMAP_LOCK(pmap); 2154 pmap->pm_stats.resident_count--; 2155 pte = pmap_pte_quick(pmap, pv->pv_va); 2156 tpte = pte_load_clear(pte); 2157 if (tpte & PG_W) 2158 pmap->pm_stats.wired_count--; 2159 if (tpte & PG_A) 2160 vm_page_flag_set(m, PG_REFERENCED); 2161 2162 /* 2163 * Update the vm_page_t clean and reference bits. 2164 */ 2165 if (tpte & PG_M) { 2166 KASSERT((tpte & PG_RW), 2167 ("pmap_remove_all: modified page not writable: va: %#x, pte: %#jx", 2168 pv->pv_va, (uintmax_t)tpte)); 2169 vm_page_dirty(m); 2170 } 2171 free = NULL; 2172 pmap_unuse_pt(pmap, pv->pv_va, &free); 2173 pmap_invalidate_page(pmap, pv->pv_va); 2174 pmap_free_zero_pages(free); 2175 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2176 m->md.pv_list_count--; 2177 free_pv_entry(pmap, pv); 2178 PMAP_UNLOCK(pmap); 2179 } 2180 vm_page_flag_clear(m, PG_WRITEABLE); 2181 sched_unpin(); 2182} 2183 2184/* 2185 * Set the physical protection on the 2186 * specified range of this map as requested. 2187 */ 2188void 2189pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 2190{ 2191 vm_offset_t pdnxt; 2192 pd_entry_t ptpaddr; 2193 pt_entry_t *pte; 2194 int anychanged; 2195 2196 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 2197 pmap_remove(pmap, sva, eva); 2198 return; 2199 } 2200 2201#ifdef PAE 2202 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) == 2203 (VM_PROT_WRITE|VM_PROT_EXECUTE)) 2204 return; 2205#else 2206 if (prot & VM_PROT_WRITE) 2207 return; 2208#endif 2209 2210 anychanged = 0; 2211 2212 vm_page_lock_queues(); 2213 sched_pin(); 2214 PMAP_LOCK(pmap); 2215 for (; sva < eva; sva = pdnxt) { 2216 pt_entry_t obits, pbits; 2217 unsigned pdirindex; 2218 2219 pdnxt = (sva + NBPDR) & ~PDRMASK; 2220 2221 pdirindex = sva >> PDRSHIFT; 2222 ptpaddr = pmap->pm_pdir[pdirindex]; 2223 2224 /* 2225 * Weed out invalid mappings. Note: we assume that the page 2226 * directory table is always allocated, and in kernel virtual. 2227 */ 2228 if (ptpaddr == 0) 2229 continue; 2230 2231 /* 2232 * Check for large page. 2233 */ 2234 if ((ptpaddr & PG_PS) != 0) { 2235 if ((prot & VM_PROT_WRITE) == 0) 2236 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW); 2237#ifdef PAE 2238 if ((prot & VM_PROT_EXECUTE) == 0) 2239 pmap->pm_pdir[pdirindex] |= pg_nx; 2240#endif 2241 anychanged = 1; 2242 continue; 2243 } 2244 2245 if (pdnxt > eva) 2246 pdnxt = eva; 2247 2248 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2249 sva += PAGE_SIZE) { 2250 vm_page_t m; 2251 2252retry: 2253 /* 2254 * Regardless of whether a pte is 32 or 64 bits in 2255 * size, PG_RW, PG_A, and PG_M are among the least 2256 * significant 32 bits. 2257 */ 2258 obits = pbits = *pte; 2259 if ((pbits & PG_V) == 0) 2260 continue; 2261 if (pbits & PG_MANAGED) { 2262 m = NULL; 2263 if (pbits & PG_A) { 2264 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME); 2265 vm_page_flag_set(m, PG_REFERENCED); 2266 pbits &= ~PG_A; 2267 } 2268 if ((pbits & PG_M) != 0) { 2269 if (m == NULL) 2270 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME); 2271 vm_page_dirty(m); 2272 } 2273 } 2274 2275 if ((prot & VM_PROT_WRITE) == 0) 2276 pbits &= ~(PG_RW | PG_M); 2277#ifdef PAE 2278 if ((prot & VM_PROT_EXECUTE) == 0) 2279 pbits |= pg_nx; 2280#endif 2281 2282 if (pbits != obits) { 2283#ifdef PAE 2284 if (!atomic_cmpset_64(pte, obits, pbits)) 2285 goto retry; 2286#else 2287 if (!atomic_cmpset_int((u_int *)pte, obits, 2288 pbits)) 2289 goto retry; 2290#endif 2291 if (obits & PG_G) 2292 pmap_invalidate_page(pmap, sva); 2293 else 2294 anychanged = 1; 2295 } 2296 } 2297 } 2298 sched_unpin(); 2299 if (anychanged) 2300 pmap_invalidate_all(pmap); 2301 vm_page_unlock_queues(); 2302 PMAP_UNLOCK(pmap); 2303} 2304 2305/* 2306 * Insert the given physical page (p) at 2307 * the specified virtual address (v) in the 2308 * target physical map with the protection requested. 2309 * 2310 * If specified, the page will be wired down, meaning 2311 * that the related pte can not be reclaimed. 2312 * 2313 * NB: This is the only routine which MAY NOT lazy-evaluate 2314 * or lose information. That is, this routine must actually 2315 * insert this page into the given map NOW. 2316 */ 2317void 2318pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 2319 boolean_t wired) 2320{ 2321 vm_paddr_t pa; 2322 pd_entry_t *pde; 2323 pt_entry_t *pte; 2324 vm_paddr_t opa; 2325 pt_entry_t origpte, newpte; 2326 vm_page_t mpte, om; 2327 boolean_t invlva; 2328 2329 va = trunc_page(va); 2330#ifdef PMAP_DIAGNOSTIC 2331 if (va > VM_MAX_KERNEL_ADDRESS) 2332 panic("pmap_enter: toobig"); 2333 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS)) 2334 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va); 2335#endif 2336 2337 mpte = NULL; 2338 2339 vm_page_lock_queues(); 2340 PMAP_LOCK(pmap); 2341 sched_pin(); 2342 2343 /* 2344 * In the case that a page table page is not 2345 * resident, we are creating it here. 2346 */ 2347 if (va < VM_MAXUSER_ADDRESS) { 2348 mpte = pmap_allocpte(pmap, va, M_WAITOK); 2349 } 2350#if 0 && defined(PMAP_DIAGNOSTIC) 2351 else { 2352 pd_entry_t *pdeaddr = pmap_pde(pmap, va); 2353 origpte = *pdeaddr; 2354 if ((origpte & PG_V) == 0) { 2355 panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n", 2356 pmap->pm_pdir[PTDPTDI], origpte, va); 2357 } 2358 } 2359#endif 2360 2361 pde = pmap_pde(pmap, va); 2362 if ((*pde & PG_PS) != 0) 2363 panic("pmap_enter: attempted pmap_enter on 4MB page"); 2364 pte = pmap_pte_quick(pmap, va); 2365 2366 /* 2367 * Page Directory table entry not valid, we need a new PT page 2368 */ 2369 if (pte == NULL) { 2370 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n", 2371 (uintmax_t)pmap->pm_pdir[PTDPTDI], va); 2372 } 2373 2374 pa = VM_PAGE_TO_PHYS(m); 2375 om = NULL; 2376 origpte = *pte; 2377 opa = origpte & PG_FRAME; 2378 2379 /* 2380 * Mapping has not changed, must be protection or wiring change. 2381 */ 2382 if (origpte && (opa == pa)) { 2383 /* 2384 * Wiring change, just update stats. We don't worry about 2385 * wiring PT pages as they remain resident as long as there 2386 * are valid mappings in them. Hence, if a user page is wired, 2387 * the PT page will be also. 2388 */ 2389 if (wired && ((origpte & PG_W) == 0)) 2390 pmap->pm_stats.wired_count++; 2391 else if (!wired && (origpte & PG_W)) 2392 pmap->pm_stats.wired_count--; 2393 2394 /* 2395 * Remove extra pte reference 2396 */ 2397 if (mpte) 2398 mpte->wire_count--; 2399 2400 /* 2401 * We might be turning off write access to the page, 2402 * so we go ahead and sense modify status. 2403 */ 2404 if (origpte & PG_MANAGED) { 2405 om = m; 2406 pa |= PG_MANAGED; 2407 } 2408 goto validate; 2409 } 2410 /* 2411 * Mapping has changed, invalidate old range and fall through to 2412 * handle validating new mapping. 2413 */ 2414 if (opa) { 2415 if (origpte & PG_W) 2416 pmap->pm_stats.wired_count--; 2417 if (origpte & PG_MANAGED) { 2418 om = PHYS_TO_VM_PAGE(opa); 2419 pmap_remove_entry(pmap, om, va); 2420 } 2421 if (mpte != NULL) { 2422 mpte->wire_count--; 2423 KASSERT(mpte->wire_count > 0, 2424 ("pmap_enter: missing reference to page table page," 2425 " va: 0x%x", va)); 2426 } 2427 } else 2428 pmap->pm_stats.resident_count++; 2429 2430 /* 2431 * Enter on the PV list if part of our managed memory. 2432 */ 2433 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 2434 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva, 2435 ("pmap_enter: managed mapping within the clean submap")); 2436 pmap_insert_entry(pmap, va, m); 2437 pa |= PG_MANAGED; 2438 } 2439 2440 /* 2441 * Increment counters 2442 */ 2443 if (wired) 2444 pmap->pm_stats.wired_count++; 2445 2446validate: 2447 /* 2448 * Now validate mapping with desired protection/wiring. 2449 */ 2450 newpte = (pt_entry_t)(pa | PG_V); 2451 if ((prot & VM_PROT_WRITE) != 0) { 2452 newpte |= PG_RW; 2453 vm_page_flag_set(m, PG_WRITEABLE); 2454 } 2455#ifdef PAE 2456 if ((prot & VM_PROT_EXECUTE) == 0) 2457 newpte |= pg_nx; 2458#endif 2459 if (wired) 2460 newpte |= PG_W; 2461 if (va < VM_MAXUSER_ADDRESS) 2462 newpte |= PG_U; 2463 if (pmap == kernel_pmap) 2464 newpte |= pgeflag; 2465 2466 /* 2467 * if the mapping or permission bits are different, we need 2468 * to update the pte. 2469 */ 2470 if ((origpte & ~(PG_M|PG_A)) != newpte) { 2471 if (origpte & PG_V) { 2472 invlva = FALSE; 2473 origpte = pte_load_store(pte, newpte | PG_A); 2474 if (origpte & PG_A) { 2475 if (origpte & PG_MANAGED) 2476 vm_page_flag_set(om, PG_REFERENCED); 2477 if (opa != VM_PAGE_TO_PHYS(m)) 2478 invlva = TRUE; 2479#ifdef PAE 2480 if ((origpte & PG_NX) == 0 && 2481 (newpte & PG_NX) != 0) 2482 invlva = TRUE; 2483#endif 2484 } 2485 if (origpte & PG_M) { 2486 KASSERT((origpte & PG_RW), 2487 ("pmap_enter: modified page not writable: va: %#x, pte: %#jx", 2488 va, (uintmax_t)origpte)); 2489 if ((origpte & PG_MANAGED) != 0) 2490 vm_page_dirty(om); 2491 if ((prot & VM_PROT_WRITE) == 0) 2492 invlva = TRUE; 2493 } 2494 if (invlva) 2495 pmap_invalidate_page(pmap, va); 2496 } else 2497 pte_store(pte, newpte | PG_A); 2498 } 2499 sched_unpin(); 2500 vm_page_unlock_queues(); 2501 PMAP_UNLOCK(pmap); 2502} 2503 2504/* 2505 * Maps a sequence of resident pages belonging to the same object. 2506 * The sequence begins with the given page m_start. This page is 2507 * mapped at the given virtual address start. Each subsequent page is 2508 * mapped at a virtual address that is offset from start by the same 2509 * amount as the page is offset from m_start within the object. The 2510 * last page in the sequence is the page with the largest offset from 2511 * m_start that can be mapped at a virtual address less than the given 2512 * virtual address end. Not every virtual page between start and end 2513 * is mapped; only those for which a resident page exists with the 2514 * corresponding offset from m_start are mapped. 2515 */ 2516void 2517pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, 2518 vm_page_t m_start, vm_prot_t prot) 2519{ 2520 vm_page_t m, mpte; 2521 vm_pindex_t diff, psize; 2522 2523 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED); 2524 psize = atop(end - start); 2525 mpte = NULL; 2526 m = m_start; 2527 PMAP_LOCK(pmap); 2528 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { 2529 mpte = pmap_enter_quick_locked(pmap, start + ptoa(diff), m, 2530 prot, mpte); 2531 m = TAILQ_NEXT(m, listq); 2532 } 2533 PMAP_UNLOCK(pmap); 2534} 2535 2536/* 2537 * this code makes some *MAJOR* assumptions: 2538 * 1. Current pmap & pmap exists. 2539 * 2. Not wired. 2540 * 3. Read access. 2541 * 4. No page table pages. 2542 * but is *MUCH* faster than pmap_enter... 2543 */ 2544 2545void 2546pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 2547{ 2548 2549 PMAP_LOCK(pmap); 2550 (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL); 2551 PMAP_UNLOCK(pmap); 2552} 2553 2554static vm_page_t 2555pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, 2556 vm_prot_t prot, vm_page_t mpte) 2557{ 2558 pt_entry_t *pte; 2559 vm_paddr_t pa; 2560 vm_page_t free; 2561 2562 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva || 2563 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0, 2564 ("pmap_enter_quick_locked: managed mapping within the clean submap")); 2565 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2566 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2567 2568 /* 2569 * In the case that a page table page is not 2570 * resident, we are creating it here. 2571 */ 2572 if (va < VM_MAXUSER_ADDRESS) { 2573 unsigned ptepindex; 2574 pd_entry_t ptepa; 2575 2576 /* 2577 * Calculate pagetable page index 2578 */ 2579 ptepindex = va >> PDRSHIFT; 2580 if (mpte && (mpte->pindex == ptepindex)) { 2581 mpte->wire_count++; 2582 } else { 2583 /* 2584 * Get the page directory entry 2585 */ 2586 ptepa = pmap->pm_pdir[ptepindex]; 2587 2588 /* 2589 * If the page table page is mapped, we just increment 2590 * the hold count, and activate it. 2591 */ 2592 if (ptepa) { 2593 if (ptepa & PG_PS) 2594 panic("pmap_enter_quick: unexpected mapping into 4MB page"); 2595 mpte = PHYS_TO_VM_PAGE(ptepa & PG_FRAME); 2596 mpte->wire_count++; 2597 } else { 2598 mpte = _pmap_allocpte(pmap, ptepindex, 2599 M_NOWAIT); 2600 if (mpte == NULL) 2601 return (mpte); 2602 } 2603 } 2604 } else { 2605 mpte = NULL; 2606 } 2607 2608 /* 2609 * This call to vtopte makes the assumption that we are 2610 * entering the page into the current pmap. In order to support 2611 * quick entry into any pmap, one would likely use pmap_pte_quick. 2612 * But that isn't as quick as vtopte. 2613 */ 2614 pte = vtopte(va); 2615 if (*pte) { 2616 if (mpte != NULL) { 2617 mpte->wire_count--; 2618 mpte = NULL; 2619 } 2620 return (mpte); 2621 } 2622 2623 /* 2624 * Enter on the PV list if part of our managed memory. 2625 */ 2626 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 && 2627 !pmap_try_insert_pv_entry(pmap, va, m)) { 2628 if (mpte != NULL) { 2629 free = NULL; 2630 if (pmap_unwire_pte_hold(pmap, mpte, &free)) { 2631 pmap_invalidate_page(pmap, va); 2632 pmap_free_zero_pages(free); 2633 } 2634 2635 mpte = NULL; 2636 } 2637 return (mpte); 2638 } 2639 2640 /* 2641 * Increment counters 2642 */ 2643 pmap->pm_stats.resident_count++; 2644 2645 pa = VM_PAGE_TO_PHYS(m); 2646#ifdef PAE 2647 if ((prot & VM_PROT_EXECUTE) == 0) 2648 pa |= pg_nx; 2649#endif 2650 2651 /* 2652 * Now validate mapping with RO protection 2653 */ 2654 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 2655 pte_store(pte, pa | PG_V | PG_U); 2656 else 2657 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 2658 return mpte; 2659} 2660 2661/* 2662 * Make a temporary mapping for a physical address. This is only intended 2663 * to be used for panic dumps. 2664 */ 2665void * 2666pmap_kenter_temporary(vm_paddr_t pa, int i) 2667{ 2668 vm_offset_t va; 2669 2670 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 2671 pmap_kenter(va, pa); 2672 invlpg(va); 2673 return ((void *)crashdumpmap); 2674} 2675 2676/* 2677 * This code maps large physical mmap regions into the 2678 * processor address space. Note that some shortcuts 2679 * are taken, but the code works. 2680 */ 2681void 2682pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 2683 vm_object_t object, vm_pindex_t pindex, 2684 vm_size_t size) 2685{ 2686 vm_page_t p; 2687 2688 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 2689 KASSERT(object->type == OBJT_DEVICE, 2690 ("pmap_object_init_pt: non-device object")); 2691 if (pseflag && 2692 ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) { 2693 int i; 2694 vm_page_t m[1]; 2695 unsigned int ptepindex; 2696 int npdes; 2697 pd_entry_t ptepa; 2698 2699 PMAP_LOCK(pmap); 2700 if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)]) 2701 goto out; 2702 PMAP_UNLOCK(pmap); 2703retry: 2704 p = vm_page_lookup(object, pindex); 2705 if (p != NULL) { 2706 if (vm_page_sleep_if_busy(p, FALSE, "init4p")) 2707 goto retry; 2708 } else { 2709 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL); 2710 if (p == NULL) 2711 return; 2712 m[0] = p; 2713 2714 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) { 2715 vm_page_lock_queues(); 2716 vm_page_free(p); 2717 vm_page_unlock_queues(); 2718 return; 2719 } 2720 2721 p = vm_page_lookup(object, pindex); 2722 vm_page_lock_queues(); 2723 vm_page_wakeup(p); 2724 vm_page_unlock_queues(); 2725 } 2726 2727 ptepa = VM_PAGE_TO_PHYS(p); 2728 if (ptepa & (NBPDR - 1)) 2729 return; 2730 2731 p->valid = VM_PAGE_BITS_ALL; 2732 2733 PMAP_LOCK(pmap); 2734 pmap->pm_stats.resident_count += size >> PAGE_SHIFT; 2735 npdes = size >> PDRSHIFT; 2736 for(i = 0; i < npdes; i++) { 2737 pde_store(&pmap->pm_pdir[ptepindex], 2738 ptepa | PG_U | PG_RW | PG_V | PG_PS); 2739 ptepa += NBPDR; 2740 ptepindex += 1; 2741 } 2742 pmap_invalidate_all(pmap); 2743out: 2744 PMAP_UNLOCK(pmap); 2745 } 2746} 2747 2748/* 2749 * Routine: pmap_change_wiring 2750 * Function: Change the wiring attribute for a map/virtual-address 2751 * pair. 2752 * In/out conditions: 2753 * The mapping must already exist in the pmap. 2754 */ 2755void 2756pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired) 2757{ 2758 pt_entry_t *pte; 2759 2760 PMAP_LOCK(pmap); 2761 pte = pmap_pte(pmap, va); 2762 2763 if (wired && !pmap_pte_w(pte)) 2764 pmap->pm_stats.wired_count++; 2765 else if (!wired && pmap_pte_w(pte)) 2766 pmap->pm_stats.wired_count--; 2767 2768 /* 2769 * Wiring is not a hardware characteristic so there is no need to 2770 * invalidate TLB. 2771 */ 2772 pmap_pte_set_w(pte, wired); 2773 pmap_pte_release(pte); 2774 PMAP_UNLOCK(pmap); 2775} 2776 2777 2778 2779/* 2780 * Copy the range specified by src_addr/len 2781 * from the source map to the range dst_addr/len 2782 * in the destination map. 2783 * 2784 * This routine is only advisory and need not do anything. 2785 */ 2786 2787void 2788pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 2789 vm_offset_t src_addr) 2790{ 2791 vm_page_t free; 2792 vm_offset_t addr; 2793 vm_offset_t end_addr = src_addr + len; 2794 vm_offset_t pdnxt; 2795 2796 if (dst_addr != src_addr) 2797 return; 2798 2799 if (!pmap_is_current(src_pmap)) 2800 return; 2801 2802 vm_page_lock_queues(); 2803 if (dst_pmap < src_pmap) { 2804 PMAP_LOCK(dst_pmap); 2805 PMAP_LOCK(src_pmap); 2806 } else { 2807 PMAP_LOCK(src_pmap); 2808 PMAP_LOCK(dst_pmap); 2809 } 2810 sched_pin(); 2811 for (addr = src_addr; addr < end_addr; addr = pdnxt) { 2812 pt_entry_t *src_pte, *dst_pte; 2813 vm_page_t dstmpte, srcmpte; 2814 pd_entry_t srcptepaddr; 2815 unsigned ptepindex; 2816 2817 if (addr >= UPT_MIN_ADDRESS) 2818 panic("pmap_copy: invalid to pmap_copy page tables"); 2819 2820 pdnxt = (addr + NBPDR) & ~PDRMASK; 2821 ptepindex = addr >> PDRSHIFT; 2822 2823 srcptepaddr = src_pmap->pm_pdir[ptepindex]; 2824 if (srcptepaddr == 0) 2825 continue; 2826 2827 if (srcptepaddr & PG_PS) { 2828 if (dst_pmap->pm_pdir[ptepindex] == 0) { 2829 dst_pmap->pm_pdir[ptepindex] = srcptepaddr & 2830 ~PG_W; 2831 dst_pmap->pm_stats.resident_count += 2832 NBPDR / PAGE_SIZE; 2833 } 2834 continue; 2835 } 2836 2837 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME); 2838 if (srcmpte->wire_count == 0) 2839 panic("pmap_copy: source page table page is unused"); 2840 2841 if (pdnxt > end_addr) 2842 pdnxt = end_addr; 2843 2844 src_pte = vtopte(addr); 2845 while (addr < pdnxt) { 2846 pt_entry_t ptetemp; 2847 ptetemp = *src_pte; 2848 /* 2849 * we only virtual copy managed pages 2850 */ 2851 if ((ptetemp & PG_MANAGED) != 0) { 2852 dstmpte = pmap_allocpte(dst_pmap, addr, 2853 M_NOWAIT); 2854 if (dstmpte == NULL) 2855 break; 2856 dst_pte = pmap_pte_quick(dst_pmap, addr); 2857 if (*dst_pte == 0 && 2858 pmap_try_insert_pv_entry(dst_pmap, addr, 2859 PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) { 2860 /* 2861 * Clear the wired, modified, and 2862 * accessed (referenced) bits 2863 * during the copy. 2864 */ 2865 *dst_pte = ptetemp & ~(PG_W | PG_M | 2866 PG_A); 2867 dst_pmap->pm_stats.resident_count++; 2868 } else { 2869 free = NULL; 2870 if (pmap_unwire_pte_hold( dst_pmap, 2871 dstmpte, &free)) { 2872 pmap_invalidate_page(dst_pmap, 2873 addr); 2874 pmap_free_zero_pages(free); 2875 } 2876 } 2877 if (dstmpte->wire_count >= srcmpte->wire_count) 2878 break; 2879 } 2880 addr += PAGE_SIZE; 2881 src_pte++; 2882 } 2883 } 2884 sched_unpin(); 2885 vm_page_unlock_queues(); 2886 PMAP_UNLOCK(src_pmap); 2887 PMAP_UNLOCK(dst_pmap); 2888} 2889 2890static __inline void 2891pagezero(void *page) 2892{ 2893#if defined(I686_CPU) 2894 if (cpu_class == CPUCLASS_686) { 2895#if defined(CPU_ENABLE_SSE) 2896 if (cpu_feature & CPUID_SSE2) 2897 sse2_pagezero(page); 2898 else 2899#endif 2900 i686_pagezero(page); 2901 } else 2902#endif 2903 bzero(page, PAGE_SIZE); 2904} 2905 2906/* 2907 * pmap_zero_page zeros the specified hardware page by mapping 2908 * the page into KVM and using bzero to clear its contents. 2909 */ 2910void 2911pmap_zero_page(vm_page_t m) 2912{ 2913 struct sysmaps *sysmaps; 2914 2915 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2916 mtx_lock(&sysmaps->lock); 2917 if (*sysmaps->CMAP2) 2918 panic("pmap_zero_page: CMAP2 busy"); 2919 sched_pin(); 2920 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2921 invlcaddr(sysmaps->CADDR2); 2922 pagezero(sysmaps->CADDR2); 2923 *sysmaps->CMAP2 = 0; 2924 sched_unpin(); 2925 mtx_unlock(&sysmaps->lock); 2926} 2927 2928/* 2929 * pmap_zero_page_area zeros the specified hardware page by mapping 2930 * the page into KVM and using bzero to clear its contents. 2931 * 2932 * off and size may not cover an area beyond a single hardware page. 2933 */ 2934void 2935pmap_zero_page_area(vm_page_t m, int off, int size) 2936{ 2937 struct sysmaps *sysmaps; 2938 2939 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2940 mtx_lock(&sysmaps->lock); 2941 if (*sysmaps->CMAP2) 2942 panic("pmap_zero_page: CMAP2 busy"); 2943 sched_pin(); 2944 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2945 invlcaddr(sysmaps->CADDR2); 2946 if (off == 0 && size == PAGE_SIZE) 2947 pagezero(sysmaps->CADDR2); 2948 else 2949 bzero((char *)sysmaps->CADDR2 + off, size); 2950 *sysmaps->CMAP2 = 0; 2951 sched_unpin(); 2952 mtx_unlock(&sysmaps->lock); 2953} 2954 2955/* 2956 * pmap_zero_page_idle zeros the specified hardware page by mapping 2957 * the page into KVM and using bzero to clear its contents. This 2958 * is intended to be called from the vm_pagezero process only and 2959 * outside of Giant. 2960 */ 2961void 2962pmap_zero_page_idle(vm_page_t m) 2963{ 2964 2965 if (*CMAP3) 2966 panic("pmap_zero_page: CMAP3 busy"); 2967 sched_pin(); 2968 *CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2969 invlcaddr(CADDR3); 2970 pagezero(CADDR3); 2971 *CMAP3 = 0; 2972 sched_unpin(); 2973} 2974 2975/* 2976 * pmap_copy_page copies the specified (machine independent) 2977 * page by mapping the page into virtual memory and using 2978 * bcopy to copy the page, one machine dependent page at a 2979 * time. 2980 */ 2981void 2982pmap_copy_page(vm_page_t src, vm_page_t dst) 2983{ 2984 struct sysmaps *sysmaps; 2985 2986 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2987 mtx_lock(&sysmaps->lock); 2988 if (*sysmaps->CMAP1) 2989 panic("pmap_copy_page: CMAP1 busy"); 2990 if (*sysmaps->CMAP2) 2991 panic("pmap_copy_page: CMAP2 busy"); 2992 sched_pin(); 2993 invlpg((u_int)sysmaps->CADDR1); 2994 invlpg((u_int)sysmaps->CADDR2); 2995 *sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A; 2996 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M; 2997 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); 2998 *sysmaps->CMAP1 = 0; 2999 *sysmaps->CMAP2 = 0; 3000 sched_unpin(); 3001 mtx_unlock(&sysmaps->lock); 3002} 3003 3004/* 3005 * Returns true if the pmap's pv is one of the first 3006 * 16 pvs linked to from this page. This count may 3007 * be changed upwards or downwards in the future; it 3008 * is only necessary that true be returned for a small 3009 * subset of pmaps for proper page aging. 3010 */ 3011boolean_t 3012pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 3013{ 3014 pv_entry_t pv; 3015 int loops = 0; 3016 3017 if (m->flags & PG_FICTITIOUS) 3018 return FALSE; 3019 3020 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3021 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3022 if (PV_PMAP(pv) == pmap) { 3023 return TRUE; 3024 } 3025 loops++; 3026 if (loops >= 16) 3027 break; 3028 } 3029 return (FALSE); 3030} 3031 3032/* 3033 * pmap_page_wired_mappings: 3034 * 3035 * Return the number of managed mappings to the given physical page 3036 * that are wired. 3037 */ 3038int 3039pmap_page_wired_mappings(vm_page_t m) 3040{ 3041 pv_entry_t pv; 3042 pt_entry_t *pte; 3043 pmap_t pmap; 3044 int count; 3045 3046 count = 0; 3047 if ((m->flags & PG_FICTITIOUS) != 0) 3048 return (count); 3049 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3050 sched_pin(); 3051 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3052 pmap = PV_PMAP(pv); 3053 PMAP_LOCK(pmap); 3054 pte = pmap_pte_quick(pmap, pv->pv_va); 3055 if ((*pte & PG_W) != 0) 3056 count++; 3057 PMAP_UNLOCK(pmap); 3058 } 3059 sched_unpin(); 3060 return (count); 3061} 3062 3063/* 3064 * Remove all pages from specified address space 3065 * this aids process exit speeds. Also, this code 3066 * is special cased for current process only, but 3067 * can have the more generic (and slightly slower) 3068 * mode enabled. This is much faster than pmap_remove 3069 * in the case of running down an entire address space. 3070 */ 3071void 3072pmap_remove_pages(pmap_t pmap) 3073{ 3074 pt_entry_t *pte, tpte; 3075 vm_page_t m, free = NULL; 3076 pv_entry_t pv; 3077 struct pv_chunk *pc, *npc; 3078 int field, idx; 3079 int32_t bit; 3080 uint32_t inuse, bitmask; 3081 int allfree; 3082 3083 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { 3084 printf("warning: pmap_remove_pages called with non-current pmap\n"); 3085 return; 3086 } 3087 vm_page_lock_queues(); 3088 PMAP_LOCK(pmap); 3089 sched_pin(); 3090 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) { 3091 allfree = 1; 3092 for (field = 0; field < _NPCM; field++) { 3093 inuse = (~(pc->pc_map[field])) & pc_freemask[field]; 3094 while (inuse != 0) { 3095 bit = bsfl(inuse); 3096 bitmask = 1UL << bit; 3097 idx = field * 32 + bit; 3098 pv = &pc->pc_pventry[idx]; 3099 inuse &= ~bitmask; 3100 3101 pte = vtopte(pv->pv_va); 3102 tpte = *pte; 3103 3104 if (tpte == 0) { 3105 printf( 3106 "TPTE at %p IS ZERO @ VA %08x\n", 3107 pte, pv->pv_va); 3108 panic("bad pte"); 3109 } 3110 3111/* 3112 * We cannot remove wired pages from a process' mapping at this time 3113 */ 3114 if (tpte & PG_W) { 3115 allfree = 0; 3116 continue; 3117 } 3118 3119 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME); 3120 KASSERT(m->phys_addr == (tpte & PG_FRAME), 3121 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 3122 m, (uintmax_t)m->phys_addr, 3123 (uintmax_t)tpte)); 3124 3125 KASSERT(m < &vm_page_array[vm_page_array_size], 3126 ("pmap_remove_pages: bad tpte %#jx", 3127 (uintmax_t)tpte)); 3128 3129 pmap->pm_stats.resident_count--; 3130 3131 pte_clear(pte); 3132 3133 /* 3134 * Update the vm_page_t clean/reference bits. 3135 */ 3136 if (tpte & PG_M) 3137 vm_page_dirty(m); 3138 3139 /* Mark free */ 3140 PV_STAT(pv_entry_frees++); 3141 PV_STAT(pv_entry_spare++); 3142 pv_entry_count--; 3143 pc->pc_map[field] |= bitmask; 3144 m->md.pv_list_count--; 3145 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3146 if (TAILQ_EMPTY(&m->md.pv_list)) 3147 vm_page_flag_clear(m, PG_WRITEABLE); 3148 3149 pmap_unuse_pt(pmap, pv->pv_va, &free); 3150 } 3151 } 3152 if (allfree) { 3153 PV_STAT(pv_entry_spare -= _NPCPV); 3154 PV_STAT(pc_chunk_count--); 3155 PV_STAT(pc_chunk_frees++); 3156 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 3157 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 3158 pmap_qremove((vm_offset_t)pc, 1); 3159 vm_page_unwire(m, 0); 3160 vm_page_free(m); 3161 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 3162 } 3163 } 3164 sched_unpin(); 3165 pmap_invalidate_all(pmap); 3166 vm_page_unlock_queues(); 3167 PMAP_UNLOCK(pmap); 3168 pmap_free_zero_pages(free); 3169} 3170 3171/* 3172 * pmap_is_modified: 3173 * 3174 * Return whether or not the specified physical page was modified 3175 * in any physical maps. 3176 */ 3177boolean_t 3178pmap_is_modified(vm_page_t m) 3179{ 3180 pv_entry_t pv; 3181 pt_entry_t *pte; 3182 pmap_t pmap; 3183 boolean_t rv; 3184 3185 rv = FALSE; 3186 if (m->flags & PG_FICTITIOUS) 3187 return (rv); 3188 3189 sched_pin(); 3190 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3191 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3192 pmap = PV_PMAP(pv); 3193 PMAP_LOCK(pmap); 3194 pte = pmap_pte_quick(pmap, pv->pv_va); 3195 rv = (*pte & PG_M) != 0; 3196 PMAP_UNLOCK(pmap); 3197 if (rv) 3198 break; 3199 } 3200 sched_unpin(); 3201 return (rv); 3202} 3203 3204/* 3205 * pmap_is_prefaultable: 3206 * 3207 * Return whether or not the specified virtual address is elgible 3208 * for prefault. 3209 */ 3210boolean_t 3211pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 3212{ 3213 pt_entry_t *pte; 3214 boolean_t rv; 3215 3216 rv = FALSE; 3217 PMAP_LOCK(pmap); 3218 if (*pmap_pde(pmap, addr)) { 3219 pte = vtopte(addr); 3220 rv = *pte == 0; 3221 } 3222 PMAP_UNLOCK(pmap); 3223 return (rv); 3224} 3225 3226/* 3227 * Clear the write and modified bits in each of the given page's mappings. 3228 */ 3229void 3230pmap_remove_write(vm_page_t m) 3231{ 3232 pv_entry_t pv; 3233 pmap_t pmap; 3234 pt_entry_t oldpte, *pte; 3235 3236 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3237 if ((m->flags & PG_FICTITIOUS) != 0 || 3238 (m->flags & PG_WRITEABLE) == 0) 3239 return; 3240 sched_pin(); 3241 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3242 pmap = PV_PMAP(pv); 3243 PMAP_LOCK(pmap); 3244 pte = pmap_pte_quick(pmap, pv->pv_va); 3245retry: 3246 oldpte = *pte; 3247 if ((oldpte & PG_RW) != 0) { 3248 /* 3249 * Regardless of whether a pte is 32 or 64 bits 3250 * in size, PG_RW and PG_M are among the least 3251 * significant 32 bits. 3252 */ 3253 if (!atomic_cmpset_int((u_int *)pte, oldpte, 3254 oldpte & ~(PG_RW | PG_M))) 3255 goto retry; 3256 if ((oldpte & PG_M) != 0) 3257 vm_page_dirty(m); 3258 pmap_invalidate_page(pmap, pv->pv_va); 3259 } 3260 PMAP_UNLOCK(pmap); 3261 } 3262 vm_page_flag_clear(m, PG_WRITEABLE); 3263 sched_unpin(); 3264} 3265 3266/* 3267 * pmap_ts_referenced: 3268 * 3269 * Return a count of reference bits for a page, clearing those bits. 3270 * It is not necessary for every reference bit to be cleared, but it 3271 * is necessary that 0 only be returned when there are truly no 3272 * reference bits set. 3273 * 3274 * XXX: The exact number of bits to check and clear is a matter that 3275 * should be tested and standardized at some point in the future for 3276 * optimal aging of shared pages. 3277 */ 3278int 3279pmap_ts_referenced(vm_page_t m) 3280{ 3281 pv_entry_t pv, pvf, pvn; 3282 pmap_t pmap; 3283 pt_entry_t *pte; 3284 int rtval = 0; 3285 3286 if (m->flags & PG_FICTITIOUS) 3287 return (rtval); 3288 sched_pin(); 3289 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3290 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 3291 pvf = pv; 3292 do { 3293 pvn = TAILQ_NEXT(pv, pv_list); 3294 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3295 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 3296 pmap = PV_PMAP(pv); 3297 PMAP_LOCK(pmap); 3298 pte = pmap_pte_quick(pmap, pv->pv_va); 3299 if ((*pte & PG_A) != 0) { 3300 atomic_clear_int((u_int *)pte, PG_A); 3301 pmap_invalidate_page(pmap, pv->pv_va); 3302 rtval++; 3303 if (rtval > 4) 3304 pvn = NULL; 3305 } 3306 PMAP_UNLOCK(pmap); 3307 } while ((pv = pvn) != NULL && pv != pvf); 3308 } 3309 sched_unpin(); 3310 return (rtval); 3311} 3312 3313/* 3314 * Clear the modify bits on the specified physical page. 3315 */ 3316void 3317pmap_clear_modify(vm_page_t m) 3318{ 3319 pv_entry_t pv; 3320 pmap_t pmap; 3321 pt_entry_t *pte; 3322 3323 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3324 if ((m->flags & PG_FICTITIOUS) != 0) 3325 return; 3326 sched_pin(); 3327 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3328 pmap = PV_PMAP(pv); 3329 PMAP_LOCK(pmap); 3330 pte = pmap_pte_quick(pmap, pv->pv_va); 3331 if ((*pte & PG_M) != 0) { 3332 /* 3333 * Regardless of whether a pte is 32 or 64 bits 3334 * in size, PG_M is among the least significant 3335 * 32 bits. 3336 */ 3337 atomic_clear_int((u_int *)pte, PG_M); 3338 pmap_invalidate_page(pmap, pv->pv_va); 3339 } 3340 PMAP_UNLOCK(pmap); 3341 } 3342 sched_unpin(); 3343} 3344 3345/* 3346 * pmap_clear_reference: 3347 * 3348 * Clear the reference bit on the specified physical page. 3349 */ 3350void 3351pmap_clear_reference(vm_page_t m) 3352{ 3353 pv_entry_t pv; 3354 pmap_t pmap; 3355 pt_entry_t *pte; 3356 3357 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3358 if ((m->flags & PG_FICTITIOUS) != 0) 3359 return; 3360 sched_pin(); 3361 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3362 pmap = PV_PMAP(pv); 3363 PMAP_LOCK(pmap); 3364 pte = pmap_pte_quick(pmap, pv->pv_va); 3365 if ((*pte & PG_A) != 0) { 3366 /* 3367 * Regardless of whether a pte is 32 or 64 bits 3368 * in size, PG_A is among the least significant 3369 * 32 bits. 3370 */ 3371 atomic_clear_int((u_int *)pte, PG_A); 3372 pmap_invalidate_page(pmap, pv->pv_va); 3373 } 3374 PMAP_UNLOCK(pmap); 3375 } 3376 sched_unpin(); 3377} 3378 3379/* 3380 * Miscellaneous support routines follow 3381 */ 3382 3383/* 3384 * Map a set of physical memory pages into the kernel virtual 3385 * address space. Return a pointer to where it is mapped. This 3386 * routine is intended to be used for mapping device memory, 3387 * NOT real memory. 3388 */ 3389void * 3390pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode) 3391{ 3392 vm_offset_t va, tmpva, offset; 3393 3394 offset = pa & PAGE_MASK; 3395 size = roundup(offset + size, PAGE_SIZE); 3396 pa = pa & PG_FRAME; 3397 3398 if (pa < KERNLOAD && pa + size <= KERNLOAD) 3399 va = KERNBASE + pa; 3400 else 3401 va = kmem_alloc_nofault(kernel_map, size); 3402 if (!va) 3403 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 3404 3405 for (tmpva = va; size > 0; ) { 3406 pmap_kenter_attr(tmpva, pa, mode); 3407 size -= PAGE_SIZE; 3408 tmpva += PAGE_SIZE; 3409 pa += PAGE_SIZE; 3410 } 3411 pmap_invalidate_range(kernel_pmap, va, tmpva); 3412 pmap_invalidate_cache(); 3413 return ((void *)(va + offset)); 3414} 3415 3416void * 3417pmap_mapdev(vm_paddr_t pa, vm_size_t size) 3418{ 3419 3420 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE)); 3421} 3422 3423void * 3424pmap_mapbios(vm_paddr_t pa, vm_size_t size) 3425{ 3426 3427 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK)); 3428} 3429 3430void 3431pmap_unmapdev(vm_offset_t va, vm_size_t size) 3432{ 3433 vm_offset_t base, offset, tmpva; 3434 3435 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD) 3436 return; 3437 base = trunc_page(va); 3438 offset = va & PAGE_MASK; 3439 size = roundup(offset + size, PAGE_SIZE); 3440 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 3441 pmap_kremove(tmpva); 3442 pmap_invalidate_range(kernel_pmap, va, tmpva); 3443 kmem_free(kernel_map, base, size); 3444} 3445 3446int 3447pmap_change_attr(va, size, mode) 3448 vm_offset_t va; 3449 vm_size_t size; 3450 int mode; 3451{ 3452 vm_offset_t base, offset, tmpva; 3453 pt_entry_t *pte; 3454 u_int opte, npte; 3455 pd_entry_t *pde; 3456 3457 base = trunc_page(va); 3458 offset = va & PAGE_MASK; 3459 size = roundup(offset + size, PAGE_SIZE); 3460 3461 /* Only supported on kernel virtual addresses. */ 3462 if (base <= VM_MAXUSER_ADDRESS) 3463 return (EINVAL); 3464 3465 /* 4MB pages and pages that aren't mapped aren't supported. */ 3466 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) { 3467 pde = pmap_pde(kernel_pmap, tmpva); 3468 if (*pde & PG_PS) 3469 return (EINVAL); 3470 if (*pde == 0) 3471 return (EINVAL); 3472 pte = vtopte(va); 3473 if (*pte == 0) 3474 return (EINVAL); 3475 } 3476 3477 /* 3478 * Ok, all the pages exist and are 4k, so run through them updating 3479 * their cache mode. 3480 */ 3481 for (tmpva = base; size > 0; ) { 3482 pte = vtopte(tmpva); 3483 3484 /* 3485 * The cache mode bits are all in the low 32-bits of the 3486 * PTE, so we can just spin on updating the low 32-bits. 3487 */ 3488 do { 3489 opte = *(u_int *)pte; 3490 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT); 3491 npte |= pmap_cache_bits(mode, 0); 3492 } while (npte != opte && 3493 !atomic_cmpset_int((u_int *)pte, opte, npte)); 3494 tmpva += PAGE_SIZE; 3495 size -= PAGE_SIZE; 3496 } 3497 3498 /* 3499 * Flush CPU caches to make sure any data isn't cached that shouldn't 3500 * be, etc. 3501 */ 3502 pmap_invalidate_range(kernel_pmap, base, tmpva); 3503 pmap_invalidate_cache(); 3504 return (0); 3505} 3506 3507/* 3508 * perform the pmap work for mincore 3509 */ 3510int 3511pmap_mincore(pmap_t pmap, vm_offset_t addr) 3512{ 3513 pt_entry_t *ptep, pte; 3514 vm_page_t m; 3515 int val = 0; 3516 3517 PMAP_LOCK(pmap); 3518 ptep = pmap_pte(pmap, addr); 3519 pte = (ptep != NULL) ? *ptep : 0; 3520 pmap_pte_release(ptep); 3521 PMAP_UNLOCK(pmap); 3522 3523 if (pte != 0) { 3524 vm_paddr_t pa; 3525 3526 val = MINCORE_INCORE; 3527 if ((pte & PG_MANAGED) == 0) 3528 return val; 3529 3530 pa = pte & PG_FRAME; 3531 3532 m = PHYS_TO_VM_PAGE(pa); 3533 3534 /* 3535 * Modified by us 3536 */ 3537 if (pte & PG_M) 3538 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 3539 else { 3540 /* 3541 * Modified by someone else 3542 */ 3543 vm_page_lock_queues(); 3544 if (m->dirty || pmap_is_modified(m)) 3545 val |= MINCORE_MODIFIED_OTHER; 3546 vm_page_unlock_queues(); 3547 } 3548 /* 3549 * Referenced by us 3550 */ 3551 if (pte & PG_A) 3552 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 3553 else { 3554 /* 3555 * Referenced by someone else 3556 */ 3557 vm_page_lock_queues(); 3558 if ((m->flags & PG_REFERENCED) || 3559 pmap_ts_referenced(m)) { 3560 val |= MINCORE_REFERENCED_OTHER; 3561 vm_page_flag_set(m, PG_REFERENCED); 3562 } 3563 vm_page_unlock_queues(); 3564 } 3565 } 3566 return val; 3567} 3568 3569void 3570pmap_activate(struct thread *td) 3571{ 3572 pmap_t pmap, oldpmap; 3573 u_int32_t cr3; 3574 3575 critical_enter(); 3576 pmap = vmspace_pmap(td->td_proc->p_vmspace); 3577 oldpmap = PCPU_GET(curpmap); 3578#if defined(SMP) 3579 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 3580 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 3581#else 3582 oldpmap->pm_active &= ~1; 3583 pmap->pm_active |= 1; 3584#endif 3585#ifdef PAE 3586 cr3 = vtophys(pmap->pm_pdpt); 3587#else 3588 cr3 = vtophys(pmap->pm_pdir); 3589#endif 3590 /* 3591 * pmap_activate is for the current thread on the current cpu 3592 */ 3593 td->td_pcb->pcb_cr3 = cr3; 3594 load_cr3(cr3); 3595 PCPU_SET(curpmap, pmap); 3596 critical_exit(); 3597} 3598 3599vm_offset_t 3600pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size) 3601{ 3602 3603 if ((obj == NULL) || (size < NBPDR) || (obj->type != OBJT_DEVICE)) { 3604 return addr; 3605 } 3606 3607 addr = (addr + PDRMASK) & ~PDRMASK; 3608 return addr; 3609} 3610 3611 3612#if defined(PMAP_DEBUG) 3613pmap_pid_dump(int pid) 3614{ 3615 pmap_t pmap; 3616 struct proc *p; 3617 int npte = 0; 3618 int index; 3619 3620 sx_slock(&allproc_lock); 3621 FOREACH_PROC_IN_SYSTEM(p) { 3622 if (p->p_pid != pid) 3623 continue; 3624 3625 if (p->p_vmspace) { 3626 int i,j; 3627 index = 0; 3628 pmap = vmspace_pmap(p->p_vmspace); 3629 for (i = 0; i < NPDEPTD; i++) { 3630 pd_entry_t *pde; 3631 pt_entry_t *pte; 3632 vm_offset_t base = i << PDRSHIFT; 3633 3634 pde = &pmap->pm_pdir[i]; 3635 if (pde && pmap_pde_v(pde)) { 3636 for (j = 0; j < NPTEPG; j++) { 3637 vm_offset_t va = base + (j << PAGE_SHIFT); 3638 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 3639 if (index) { 3640 index = 0; 3641 printf("\n"); 3642 } 3643 sx_sunlock(&allproc_lock); 3644 return npte; 3645 } 3646 pte = pmap_pte(pmap, va); 3647 if (pte && pmap_pte_v(pte)) { 3648 pt_entry_t pa; 3649 vm_page_t m; 3650 pa = *pte; 3651 m = PHYS_TO_VM_PAGE(pa & PG_FRAME); 3652 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 3653 va, pa, m->hold_count, m->wire_count, m->flags); 3654 npte++; 3655 index++; 3656 if (index >= 2) { 3657 index = 0; 3658 printf("\n"); 3659 } else { 3660 printf(" "); 3661 } 3662 } 3663 } 3664 } 3665 } 3666 } 3667 } 3668 sx_sunlock(&allproc_lock); 3669 return npte; 3670} 3671#endif 3672 3673#if defined(DEBUG) 3674 3675static void pads(pmap_t pm); 3676void pmap_pvdump(vm_offset_t pa); 3677 3678/* print address space of pmap*/ 3679static void 3680pads(pmap_t pm) 3681{ 3682 int i, j; 3683 vm_paddr_t va; 3684 pt_entry_t *ptep; 3685 3686 if (pm == kernel_pmap) 3687 return; 3688 for (i = 0; i < NPDEPTD; i++) 3689 if (pm->pm_pdir[i]) 3690 for (j = 0; j < NPTEPG; j++) { 3691 va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 3692 if (pm == kernel_pmap && va < KERNBASE) 3693 continue; 3694 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 3695 continue; 3696 ptep = pmap_pte(pm, va); 3697 if (pmap_pte_v(ptep)) 3698 printf("%x:%x ", va, *ptep); 3699 }; 3700 3701} 3702 3703void 3704pmap_pvdump(vm_paddr_t pa) 3705{ 3706 pv_entry_t pv; 3707 pmap_t pmap; 3708 vm_page_t m; 3709 3710 printf("pa %x", pa); 3711 m = PHYS_TO_VM_PAGE(pa); 3712 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3713 pmap = PV_PMAP(pv); 3714 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va); 3715 pads(pmap); 3716 } 3717 printf(" "); 3718} 3719#endif 3720