pmap.c revision 171907
1/*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * Copyright (c) 1994 John S. Dyson 5 * All rights reserved. 6 * Copyright (c) 1994 David Greenman 7 * All rights reserved. 8 * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu> 9 * All rights reserved. 10 * 11 * This code is derived from software contributed to Berkeley by 12 * the Systems Programming Group of the University of Utah Computer 13 * Science Department and William Jolitz of UUNET Technologies Inc. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the University of 26 * California, Berkeley and its contributors. 27 * 4. Neither the name of the University nor the names of its contributors 28 * may be used to endorse or promote products derived from this software 29 * without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41 * SUCH DAMAGE. 42 * 43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 44 */ 45/*- 46 * Copyright (c) 2003 Networks Associates Technology, Inc. 47 * All rights reserved. 48 * 49 * This software was developed for the FreeBSD Project by Jake Burkholder, 50 * Safeport Network Services, and Network Associates Laboratories, the 51 * Security Research Division of Network Associates, Inc. under 52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 53 * CHATS research program. 54 * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 1. Redistributions of source code must retain the above copyright 59 * notice, this list of conditions and the following disclaimer. 60 * 2. Redistributions in binary form must reproduce the above copyright 61 * notice, this list of conditions and the following disclaimer in the 62 * documentation and/or other materials provided with the distribution. 63 * 64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 74 * SUCH DAMAGE. 75 */ 76 77#include <sys/cdefs.h> 78__FBSDID("$FreeBSD: head/sys/i386/i386/pmap.c 171907 2007-08-21 04:59:34Z alc $"); 79 80/* 81 * Manages physical address maps. 82 * 83 * In addition to hardware address maps, this 84 * module is called upon to provide software-use-only 85 * maps which may or may not be stored in the same 86 * form as hardware maps. These pseudo-maps are 87 * used to store intermediate results from copy 88 * operations to and from address spaces. 89 * 90 * Since the information managed by this module is 91 * also stored by the logical address mapping module, 92 * this module may throw away valid virtual-to-physical 93 * mappings at almost any time. However, invalidations 94 * of virtual-to-physical mappings must be done as 95 * requested. 96 * 97 * In order to cope with hardware architectures which 98 * make virtual-to-physical map invalidates expensive, 99 * this module may delay invalidate or reduced protection 100 * operations until such time as they are actually 101 * necessary. This module is given full information as 102 * to which processors are currently using which maps, 103 * and to when physical maps must be made correct. 104 */ 105 106#include "opt_cpu.h" 107#include "opt_pmap.h" 108#include "opt_msgbuf.h" 109#include "opt_smp.h" 110#include "opt_xbox.h" 111 112#include <sys/param.h> 113#include <sys/systm.h> 114#include <sys/kernel.h> 115#include <sys/lock.h> 116#include <sys/malloc.h> 117#include <sys/mman.h> 118#include <sys/msgbuf.h> 119#include <sys/mutex.h> 120#include <sys/proc.h> 121#include <sys/sx.h> 122#include <sys/vmmeter.h> 123#include <sys/sched.h> 124#include <sys/sysctl.h> 125#ifdef SMP 126#include <sys/smp.h> 127#endif 128 129#include <vm/vm.h> 130#include <vm/vm_param.h> 131#include <vm/vm_kern.h> 132#include <vm/vm_page.h> 133#include <vm/vm_map.h> 134#include <vm/vm_object.h> 135#include <vm/vm_extern.h> 136#include <vm/vm_pageout.h> 137#include <vm/vm_pager.h> 138#include <vm/uma.h> 139 140#include <machine/cpu.h> 141#include <machine/cputypes.h> 142#include <machine/md_var.h> 143#include <machine/pcb.h> 144#include <machine/specialreg.h> 145#ifdef SMP 146#include <machine/smp.h> 147#endif 148 149#ifdef XBOX 150#include <machine/xbox.h> 151#endif 152 153#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 154#define CPU_ENABLE_SSE 155#endif 156 157#ifndef PMAP_SHPGPERPROC 158#define PMAP_SHPGPERPROC 200 159#endif 160 161#if defined(DIAGNOSTIC) 162#define PMAP_DIAGNOSTIC 163#endif 164 165#if !defined(PMAP_DIAGNOSTIC) 166#define PMAP_INLINE __inline 167#else 168#define PMAP_INLINE 169#endif 170 171#define PV_STATS 172#ifdef PV_STATS 173#define PV_STAT(x) do { x ; } while (0) 174#else 175#define PV_STAT(x) do { } while (0) 176#endif 177 178/* 179 * Get PDEs and PTEs for user/kernel address space 180 */ 181#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 182#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 183 184#define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 185#define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 186#define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 187#define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 188#define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 189 190#define pmap_pte_set_w(pte, v) ((v) ? atomic_set_int((u_int *)(pte), PG_W) : \ 191 atomic_clear_int((u_int *)(pte), PG_W)) 192#define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 193 194struct pmap kernel_pmap_store; 195LIST_HEAD(pmaplist, pmap); 196static struct pmaplist allpmaps; 197static struct mtx allpmaps_lock; 198 199vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 200vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 201int pgeflag = 0; /* PG_G or-in */ 202int pseflag = 0; /* PG_PS or-in */ 203 204static int nkpt; 205vm_offset_t kernel_vm_end; 206extern u_int32_t KERNend; 207 208#ifdef PAE 209pt_entry_t pg_nx; 210static uma_zone_t pdptzone; 211#endif 212 213/* 214 * Data for the pv entry allocation mechanism 215 */ 216static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 217static int shpgperproc = PMAP_SHPGPERPROC; 218 219struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */ 220int pv_maxchunks; /* How many chunks we have KVA for */ 221vm_offset_t pv_vafree; /* freelist stored in the PTE */ 222 223/* 224 * All those kernel PT submaps that BSD is so fond of 225 */ 226struct sysmaps { 227 struct mtx lock; 228 pt_entry_t *CMAP1; 229 pt_entry_t *CMAP2; 230 caddr_t CADDR1; 231 caddr_t CADDR2; 232}; 233static struct sysmaps sysmaps_pcpu[MAXCPU]; 234pt_entry_t *CMAP1 = 0; 235static pt_entry_t *CMAP3; 236caddr_t CADDR1 = 0, ptvmmap = 0; 237static caddr_t CADDR3; 238struct msgbuf *msgbufp = 0; 239 240/* 241 * Crashdump maps. 242 */ 243static caddr_t crashdumpmap; 244 245#ifdef SMP 246extern pt_entry_t *SMPpt; 247#endif 248static pt_entry_t *PMAP1 = 0, *PMAP2; 249static pt_entry_t *PADDR1 = 0, *PADDR2; 250#ifdef SMP 251static int PMAP1cpu; 252static int PMAP1changedcpu; 253SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD, 254 &PMAP1changedcpu, 0, 255 "Number of times pmap_pte_quick changed CPU with same PMAP1"); 256#endif 257static int PMAP1changed; 258SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD, 259 &PMAP1changed, 0, 260 "Number of times pmap_pte_quick changed PMAP1"); 261static int PMAP1unchanged; 262SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD, 263 &PMAP1unchanged, 0, 264 "Number of times pmap_pte_quick didn't change PMAP1"); 265static struct mtx PMAP2mutex; 266 267static void free_pv_entry(pmap_t pmap, pv_entry_t pv); 268static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try); 269 270static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, 271 vm_page_t m, vm_prot_t prot, vm_page_t mpte); 272static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva, 273 vm_page_t *free); 274static void pmap_remove_page(struct pmap *pmap, vm_offset_t va, 275 vm_page_t *free); 276static void pmap_remove_entry(struct pmap *pmap, vm_page_t m, 277 vm_offset_t va); 278static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m); 279static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, 280 vm_page_t m); 281 282static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags); 283 284static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags); 285static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free); 286static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va); 287static void pmap_pte_release(pt_entry_t *pte); 288static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *); 289static vm_offset_t pmap_kmem_choose(vm_offset_t addr); 290#ifdef PAE 291static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 292#endif 293 294CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 295CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 296 297/* 298 * Move the kernel virtual free pointer to the next 299 * 4MB. This is used to help improve performance 300 * by using a large (4MB) page for much of the kernel 301 * (.text, .data, .bss) 302 */ 303static vm_offset_t 304pmap_kmem_choose(vm_offset_t addr) 305{ 306 vm_offset_t newaddr = addr; 307 308#ifndef DISABLE_PSE 309 if (cpu_feature & CPUID_PSE) 310 newaddr = (addr + PDRMASK) & ~PDRMASK; 311#endif 312 return newaddr; 313} 314 315/* 316 * Bootstrap the system enough to run with virtual memory. 317 * 318 * On the i386 this is called after mapping has already been enabled 319 * and just syncs the pmap module with what has already been done. 320 * [We can't call it easily with mapping off since the kernel is not 321 * mapped with PA == VA, hence we would have to relocate every address 322 * from the linked base (virtual) address "KERNBASE" to the actual 323 * (physical) address starting relative to 0] 324 */ 325void 326pmap_bootstrap(vm_paddr_t firstaddr) 327{ 328 vm_offset_t va; 329 pt_entry_t *pte, *unused; 330 struct sysmaps *sysmaps; 331 int i; 332 333 /* 334 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 335 * large. It should instead be correctly calculated in locore.s and 336 * not based on 'first' (which is a physical address, not a virtual 337 * address, for the start of unused physical memory). The kernel 338 * page tables are NOT double mapped and thus should not be included 339 * in this calculation. 340 */ 341 virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 342 virtual_avail = pmap_kmem_choose(virtual_avail); 343 344 virtual_end = VM_MAX_KERNEL_ADDRESS; 345 346 /* 347 * Initialize the kernel pmap (which is statically allocated). 348 */ 349 PMAP_LOCK_INIT(kernel_pmap); 350 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 351#ifdef PAE 352 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 353#endif 354 kernel_pmap->pm_active = -1; /* don't allow deactivation */ 355 TAILQ_INIT(&kernel_pmap->pm_pvchunk); 356 LIST_INIT(&allpmaps); 357 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 358 mtx_lock_spin(&allpmaps_lock); 359 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 360 mtx_unlock_spin(&allpmaps_lock); 361 nkpt = NKPT; 362 363 /* 364 * Reserve some special page table entries/VA space for temporary 365 * mapping of pages. 366 */ 367#define SYSMAP(c, p, v, n) \ 368 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 369 370 va = virtual_avail; 371 pte = vtopte(va); 372 373 /* 374 * CMAP1/CMAP2 are used for zeroing and copying pages. 375 * CMAP3 is used for the idle process page zeroing. 376 */ 377 for (i = 0; i < MAXCPU; i++) { 378 sysmaps = &sysmaps_pcpu[i]; 379 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF); 380 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1) 381 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1) 382 } 383 SYSMAP(caddr_t, CMAP1, CADDR1, 1) 384 SYSMAP(caddr_t, CMAP3, CADDR3, 1) 385 *CMAP3 = 0; 386 387 /* 388 * Crashdump maps. 389 */ 390 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS) 391 392 /* 393 * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 394 */ 395 SYSMAP(caddr_t, unused, ptvmmap, 1) 396 397 /* 398 * msgbufp is used to map the system message buffer. 399 */ 400 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE))) 401 402 /* 403 * ptemap is used for pmap_pte_quick 404 */ 405 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 406 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1); 407 408 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF); 409 410 virtual_avail = va; 411 412 *CMAP1 = 0; 413 414 /* 415 * Leave in place an identity mapping (virt == phys) for the low 1 MB 416 * physical memory region that is used by the ACPI wakeup code. This 417 * mapping must not have PG_G set. 418 */ 419#ifdef XBOX 420 /* FIXME: This is gross, but needed for the XBOX. Since we are in such 421 * an early stadium, we cannot yet neatly map video memory ... :-( 422 * Better fixes are very welcome! */ 423 if (!arch_i386_is_xbox) 424#endif 425 for (i = 1; i < NKPT; i++) 426 PTD[i] = 0; 427 428 /* Initialize the PAT MSR if present. */ 429 pmap_init_pat(); 430 431 /* Turn on PG_G on kernel page(s) */ 432 pmap_set_pg(); 433} 434 435/* 436 * Setup the PAT MSR. 437 */ 438void 439pmap_init_pat(void) 440{ 441 uint64_t pat_msr; 442 443 /* Bail if this CPU doesn't implement PAT. */ 444 if (!(cpu_feature & CPUID_PAT)) 445 return; 446 447#ifdef PAT_WORKS 448 /* 449 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-. 450 * Program 4 and 5 as WP and WC. 451 * Leave 6 and 7 as UC and UC-. 452 */ 453 pat_msr = rdmsr(MSR_PAT); 454 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5)); 455 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) | 456 PAT_VALUE(5, PAT_WRITE_COMBINING); 457#else 458 /* 459 * Due to some Intel errata, we can only safely use the lower 4 460 * PAT entries. Thus, just replace PAT Index 2 with WC instead 461 * of UC-. 462 * 463 * Intel Pentium III Processor Specification Update 464 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B 465 * or Mode C Paging) 466 * 467 * Intel Pentium IV Processor Specification Update 468 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly) 469 */ 470 pat_msr = rdmsr(MSR_PAT); 471 pat_msr &= ~PAT_MASK(2); 472 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING); 473#endif 474 wrmsr(MSR_PAT, pat_msr); 475} 476 477/* 478 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on. 479 */ 480void 481pmap_set_pg(void) 482{ 483 pd_entry_t pdir; 484 pt_entry_t *pte; 485 vm_offset_t va, endva; 486 int i; 487 488 if (pgeflag == 0) 489 return; 490 491 i = KERNLOAD/NBPDR; 492 endva = KERNBASE + KERNend; 493 494 if (pseflag) { 495 va = KERNBASE + KERNLOAD; 496 while (va < endva) { 497 pdir = kernel_pmap->pm_pdir[KPTDI+i]; 498 pdir |= pgeflag; 499 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir; 500 invltlb(); /* Play it safe, invltlb() every time */ 501 i++; 502 va += NBPDR; 503 } 504 } else { 505 va = (vm_offset_t)btext; 506 while (va < endva) { 507 pte = vtopte(va); 508 if (*pte) 509 *pte |= pgeflag; 510 invltlb(); /* Play it safe, invltlb() every time */ 511 va += PAGE_SIZE; 512 } 513 } 514} 515 516/* 517 * Initialize a vm_page's machine-dependent fields. 518 */ 519void 520pmap_page_init(vm_page_t m) 521{ 522 523 TAILQ_INIT(&m->md.pv_list); 524 m->md.pv_list_count = 0; 525} 526 527#ifdef PAE 528 529static MALLOC_DEFINE(M_PMAPPDPT, "pmap", "pmap pdpt"); 530 531static void * 532pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 533{ 534 *flags = UMA_SLAB_PRIV; 535 return (contigmalloc(PAGE_SIZE, M_PMAPPDPT, 0, 0x0ULL, 0xffffffffULL, 536 1, 0)); 537} 538#endif 539 540/* 541 * ABuse the pte nodes for unmapped kva to thread a kva freelist through. 542 * Requirements: 543 * - Must deal with pages in order to ensure that none of the PG_* bits 544 * are ever set, PG_V in particular. 545 * - Assumes we can write to ptes without pte_store() atomic ops, even 546 * on PAE systems. This should be ok. 547 * - Assumes nothing will ever test these addresses for 0 to indicate 548 * no mapping instead of correctly checking PG_V. 549 * - Assumes a vm_offset_t will fit in a pte (true for i386). 550 * Because PG_V is never set, there can be no mappings to invalidate. 551 */ 552static vm_offset_t 553pmap_ptelist_alloc(vm_offset_t *head) 554{ 555 pt_entry_t *pte; 556 vm_offset_t va; 557 558 va = *head; 559 if (va == 0) 560 return (va); /* Out of memory */ 561 pte = vtopte(va); 562 *head = *pte; 563 if (*head & PG_V) 564 panic("pmap_ptelist_alloc: va with PG_V set!"); 565 *pte = 0; 566 return (va); 567} 568 569static void 570pmap_ptelist_free(vm_offset_t *head, vm_offset_t va) 571{ 572 pt_entry_t *pte; 573 574 if (va & PG_V) 575 panic("pmap_ptelist_free: freeing va with PG_V set!"); 576 pte = vtopte(va); 577 *pte = *head; /* virtual! PG_V is 0 though */ 578 *head = va; 579} 580 581static void 582pmap_ptelist_init(vm_offset_t *head, void *base, int npages) 583{ 584 int i; 585 vm_offset_t va; 586 587 *head = 0; 588 for (i = npages - 1; i >= 0; i--) { 589 va = (vm_offset_t)base + i * PAGE_SIZE; 590 pmap_ptelist_free(head, va); 591 } 592} 593 594 595/* 596 * Initialize the pmap module. 597 * Called by vm_init, to initialize any structures that the pmap 598 * system needs to map virtual memory. 599 */ 600void 601pmap_init(void) 602{ 603 604 /* 605 * Initialize the address space (zone) for the pv entries. Set a 606 * high water mark so that the system can recover from excessive 607 * numbers of pv entries. 608 */ 609 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 610 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count; 611 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 612 pv_entry_max = roundup(pv_entry_max, _NPCPV); 613 pv_entry_high_water = 9 * (pv_entry_max / 10); 614 615 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc); 616 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map, 617 PAGE_SIZE * pv_maxchunks); 618 if (pv_chunkbase == NULL) 619 panic("pmap_init: not enough kvm for pv chunks"); 620 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks); 621#ifdef PAE 622 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL, 623 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1, 624 UMA_ZONE_VM | UMA_ZONE_NOFREE); 625 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf); 626#endif 627} 628 629 630SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters"); 631SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0, 632 "Max number of PV entries"); 633SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0, 634 "Page share factor per proc"); 635 636/*************************************************** 637 * Low level helper routines..... 638 ***************************************************/ 639 640/* 641 * Determine the appropriate bits to set in a PTE or PDE for a specified 642 * caching mode. 643 */ 644static int 645pmap_cache_bits(int mode, boolean_t is_pde) 646{ 647 int pat_flag, pat_index, cache_bits; 648 649 /* The PAT bit is different for PTE's and PDE's. */ 650 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT; 651 652 /* If we don't support PAT, map extended modes to older ones. */ 653 if (!(cpu_feature & CPUID_PAT)) { 654 switch (mode) { 655 case PAT_UNCACHEABLE: 656 case PAT_WRITE_THROUGH: 657 case PAT_WRITE_BACK: 658 break; 659 case PAT_UNCACHED: 660 case PAT_WRITE_COMBINING: 661 case PAT_WRITE_PROTECTED: 662 mode = PAT_UNCACHEABLE; 663 break; 664 } 665 } 666 667 /* Map the caching mode to a PAT index. */ 668 switch (mode) { 669#ifdef PAT_WORKS 670 case PAT_UNCACHEABLE: 671 pat_index = 3; 672 break; 673 case PAT_WRITE_THROUGH: 674 pat_index = 1; 675 break; 676 case PAT_WRITE_BACK: 677 pat_index = 0; 678 break; 679 case PAT_UNCACHED: 680 pat_index = 2; 681 break; 682 case PAT_WRITE_COMBINING: 683 pat_index = 5; 684 break; 685 case PAT_WRITE_PROTECTED: 686 pat_index = 4; 687 break; 688#else 689 case PAT_UNCACHED: 690 case PAT_UNCACHEABLE: 691 case PAT_WRITE_PROTECTED: 692 pat_index = 3; 693 break; 694 case PAT_WRITE_THROUGH: 695 pat_index = 1; 696 break; 697 case PAT_WRITE_BACK: 698 pat_index = 0; 699 break; 700 case PAT_WRITE_COMBINING: 701 pat_index = 2; 702 break; 703#endif 704 default: 705 panic("Unknown caching mode %d\n", mode); 706 } 707 708 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */ 709 cache_bits = 0; 710 if (pat_index & 0x4) 711 cache_bits |= pat_flag; 712 if (pat_index & 0x2) 713 cache_bits |= PG_NC_PCD; 714 if (pat_index & 0x1) 715 cache_bits |= PG_NC_PWT; 716 return (cache_bits); 717} 718#ifdef SMP 719/* 720 * For SMP, these functions have to use the IPI mechanism for coherence. 721 */ 722void 723pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 724{ 725 u_int cpumask; 726 u_int other_cpus; 727 728 sched_pin(); 729 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 730 invlpg(va); 731 smp_invlpg(va); 732 } else { 733 cpumask = PCPU_GET(cpumask); 734 other_cpus = PCPU_GET(other_cpus); 735 if (pmap->pm_active & cpumask) 736 invlpg(va); 737 if (pmap->pm_active & other_cpus) 738 smp_masked_invlpg(pmap->pm_active & other_cpus, va); 739 } 740 sched_unpin(); 741} 742 743void 744pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 745{ 746 u_int cpumask; 747 u_int other_cpus; 748 vm_offset_t addr; 749 750 sched_pin(); 751 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 752 for (addr = sva; addr < eva; addr += PAGE_SIZE) 753 invlpg(addr); 754 smp_invlpg_range(sva, eva); 755 } else { 756 cpumask = PCPU_GET(cpumask); 757 other_cpus = PCPU_GET(other_cpus); 758 if (pmap->pm_active & cpumask) 759 for (addr = sva; addr < eva; addr += PAGE_SIZE) 760 invlpg(addr); 761 if (pmap->pm_active & other_cpus) 762 smp_masked_invlpg_range(pmap->pm_active & other_cpus, 763 sva, eva); 764 } 765 sched_unpin(); 766} 767 768void 769pmap_invalidate_all(pmap_t pmap) 770{ 771 u_int cpumask; 772 u_int other_cpus; 773 774 sched_pin(); 775 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 776 invltlb(); 777 smp_invltlb(); 778 } else { 779 cpumask = PCPU_GET(cpumask); 780 other_cpus = PCPU_GET(other_cpus); 781 if (pmap->pm_active & cpumask) 782 invltlb(); 783 if (pmap->pm_active & other_cpus) 784 smp_masked_invltlb(pmap->pm_active & other_cpus); 785 } 786 sched_unpin(); 787} 788 789void 790pmap_invalidate_cache(void) 791{ 792 793 sched_pin(); 794 wbinvd(); 795 smp_cache_flush(); 796 sched_unpin(); 797} 798#else /* !SMP */ 799/* 800 * Normal, non-SMP, 486+ invalidation functions. 801 * We inline these within pmap.c for speed. 802 */ 803PMAP_INLINE void 804pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 805{ 806 807 if (pmap == kernel_pmap || pmap->pm_active) 808 invlpg(va); 809} 810 811PMAP_INLINE void 812pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 813{ 814 vm_offset_t addr; 815 816 if (pmap == kernel_pmap || pmap->pm_active) 817 for (addr = sva; addr < eva; addr += PAGE_SIZE) 818 invlpg(addr); 819} 820 821PMAP_INLINE void 822pmap_invalidate_all(pmap_t pmap) 823{ 824 825 if (pmap == kernel_pmap || pmap->pm_active) 826 invltlb(); 827} 828 829PMAP_INLINE void 830pmap_invalidate_cache(void) 831{ 832 833 wbinvd(); 834} 835#endif /* !SMP */ 836 837/* 838 * Are we current address space or kernel? N.B. We return FALSE when 839 * a pmap's page table is in use because a kernel thread is borrowing 840 * it. The borrowed page table can change spontaneously, making any 841 * dependence on its continued use subject to a race condition. 842 */ 843static __inline int 844pmap_is_current(pmap_t pmap) 845{ 846 847 return (pmap == kernel_pmap || 848 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) && 849 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME))); 850} 851 852/* 853 * If the given pmap is not the current or kernel pmap, the returned pte must 854 * be released by passing it to pmap_pte_release(). 855 */ 856pt_entry_t * 857pmap_pte(pmap_t pmap, vm_offset_t va) 858{ 859 pd_entry_t newpf; 860 pd_entry_t *pde; 861 862 pde = pmap_pde(pmap, va); 863 if (*pde & PG_PS) 864 return (pde); 865 if (*pde != 0) { 866 /* are we current address space or kernel? */ 867 if (pmap_is_current(pmap)) 868 return (vtopte(va)); 869 mtx_lock(&PMAP2mutex); 870 newpf = *pde & PG_FRAME; 871 if ((*PMAP2 & PG_FRAME) != newpf) { 872 *PMAP2 = newpf | PG_RW | PG_V | PG_A | PG_M; 873 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2); 874 } 875 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1))); 876 } 877 return (0); 878} 879 880/* 881 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte 882 * being NULL. 883 */ 884static __inline void 885pmap_pte_release(pt_entry_t *pte) 886{ 887 888 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) 889 mtx_unlock(&PMAP2mutex); 890} 891 892static __inline void 893invlcaddr(void *caddr) 894{ 895 896 invlpg((u_int)caddr); 897} 898 899/* 900 * Super fast pmap_pte routine best used when scanning 901 * the pv lists. This eliminates many coarse-grained 902 * invltlb calls. Note that many of the pv list 903 * scans are across different pmaps. It is very wasteful 904 * to do an entire invltlb for checking a single mapping. 905 * 906 * If the given pmap is not the current pmap, vm_page_queue_mtx 907 * must be held and curthread pinned to a CPU. 908 */ 909static pt_entry_t * 910pmap_pte_quick(pmap_t pmap, vm_offset_t va) 911{ 912 pd_entry_t newpf; 913 pd_entry_t *pde; 914 915 pde = pmap_pde(pmap, va); 916 if (*pde & PG_PS) 917 return (pde); 918 if (*pde != 0) { 919 /* are we current address space or kernel? */ 920 if (pmap_is_current(pmap)) 921 return (vtopte(va)); 922 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 923 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 924 newpf = *pde & PG_FRAME; 925 if ((*PMAP1 & PG_FRAME) != newpf) { 926 *PMAP1 = newpf | PG_RW | PG_V | PG_A | PG_M; 927#ifdef SMP 928 PMAP1cpu = PCPU_GET(cpuid); 929#endif 930 invlcaddr(PADDR1); 931 PMAP1changed++; 932 } else 933#ifdef SMP 934 if (PMAP1cpu != PCPU_GET(cpuid)) { 935 PMAP1cpu = PCPU_GET(cpuid); 936 invlcaddr(PADDR1); 937 PMAP1changedcpu++; 938 } else 939#endif 940 PMAP1unchanged++; 941 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1))); 942 } 943 return (0); 944} 945 946/* 947 * Routine: pmap_extract 948 * Function: 949 * Extract the physical page address associated 950 * with the given map/virtual_address pair. 951 */ 952vm_paddr_t 953pmap_extract(pmap_t pmap, vm_offset_t va) 954{ 955 vm_paddr_t rtval; 956 pt_entry_t *pte; 957 pd_entry_t pde; 958 959 rtval = 0; 960 PMAP_LOCK(pmap); 961 pde = pmap->pm_pdir[va >> PDRSHIFT]; 962 if (pde != 0) { 963 if ((pde & PG_PS) != 0) { 964 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK); 965 PMAP_UNLOCK(pmap); 966 return rtval; 967 } 968 pte = pmap_pte(pmap, va); 969 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK); 970 pmap_pte_release(pte); 971 } 972 PMAP_UNLOCK(pmap); 973 return (rtval); 974} 975 976/* 977 * Routine: pmap_extract_and_hold 978 * Function: 979 * Atomically extract and hold the physical page 980 * with the given pmap and virtual address pair 981 * if that mapping permits the given protection. 982 */ 983vm_page_t 984pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 985{ 986 pd_entry_t pde; 987 pt_entry_t pte; 988 vm_page_t m; 989 990 m = NULL; 991 vm_page_lock_queues(); 992 PMAP_LOCK(pmap); 993 pde = *pmap_pde(pmap, va); 994 if (pde != 0) { 995 if (pde & PG_PS) { 996 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) { 997 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) | 998 (va & PDRMASK)); 999 vm_page_hold(m); 1000 } 1001 } else { 1002 sched_pin(); 1003 pte = *pmap_pte_quick(pmap, va); 1004 if (pte != 0 && 1005 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) { 1006 m = PHYS_TO_VM_PAGE(pte & PG_FRAME); 1007 vm_page_hold(m); 1008 } 1009 sched_unpin(); 1010 } 1011 } 1012 vm_page_unlock_queues(); 1013 PMAP_UNLOCK(pmap); 1014 return (m); 1015} 1016 1017/*************************************************** 1018 * Low level mapping routines..... 1019 ***************************************************/ 1020 1021/* 1022 * Add a wired page to the kva. 1023 * Note: not SMP coherent. 1024 */ 1025PMAP_INLINE void 1026pmap_kenter(vm_offset_t va, vm_paddr_t pa) 1027{ 1028 pt_entry_t *pte; 1029 1030 pte = vtopte(va); 1031 pte_store(pte, pa | PG_RW | PG_V | pgeflag); 1032} 1033 1034PMAP_INLINE void 1035pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode) 1036{ 1037 pt_entry_t *pte; 1038 1039 pte = vtopte(va); 1040 pte_store(pte, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0)); 1041} 1042 1043/* 1044 * Remove a page from the kernel pagetables. 1045 * Note: not SMP coherent. 1046 */ 1047PMAP_INLINE void 1048pmap_kremove(vm_offset_t va) 1049{ 1050 pt_entry_t *pte; 1051 1052 pte = vtopte(va); 1053 pte_clear(pte); 1054} 1055 1056/* 1057 * Used to map a range of physical addresses into kernel 1058 * virtual address space. 1059 * 1060 * The value passed in '*virt' is a suggested virtual address for 1061 * the mapping. Architectures which can support a direct-mapped 1062 * physical to virtual region can return the appropriate address 1063 * within that region, leaving '*virt' unchanged. Other 1064 * architectures should map the pages starting at '*virt' and 1065 * update '*virt' with the first usable address after the mapped 1066 * region. 1067 */ 1068vm_offset_t 1069pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 1070{ 1071 vm_offset_t va, sva; 1072 1073 va = sva = *virt; 1074 while (start < end) { 1075 pmap_kenter(va, start); 1076 va += PAGE_SIZE; 1077 start += PAGE_SIZE; 1078 } 1079 pmap_invalidate_range(kernel_pmap, sva, va); 1080 *virt = va; 1081 return (sva); 1082} 1083 1084 1085/* 1086 * Add a list of wired pages to the kva 1087 * this routine is only used for temporary 1088 * kernel mappings that do not need to have 1089 * page modification or references recorded. 1090 * Note that old mappings are simply written 1091 * over. The page *must* be wired. 1092 * Note: SMP coherent. Uses a ranged shootdown IPI. 1093 */ 1094void 1095pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count) 1096{ 1097 pt_entry_t *endpte, oldpte, *pte; 1098 1099 oldpte = 0; 1100 pte = vtopte(sva); 1101 endpte = pte + count; 1102 while (pte < endpte) { 1103 oldpte |= *pte; 1104 pte_store(pte, VM_PAGE_TO_PHYS(*ma) | pgeflag | PG_RW | PG_V); 1105 pte++; 1106 ma++; 1107 } 1108 if ((oldpte & PG_V) != 0) 1109 pmap_invalidate_range(kernel_pmap, sva, sva + count * 1110 PAGE_SIZE); 1111} 1112 1113/* 1114 * This routine tears out page mappings from the 1115 * kernel -- it is meant only for temporary mappings. 1116 * Note: SMP coherent. Uses a ranged shootdown IPI. 1117 */ 1118void 1119pmap_qremove(vm_offset_t sva, int count) 1120{ 1121 vm_offset_t va; 1122 1123 va = sva; 1124 while (count-- > 0) { 1125 pmap_kremove(va); 1126 va += PAGE_SIZE; 1127 } 1128 pmap_invalidate_range(kernel_pmap, sva, va); 1129} 1130 1131/*************************************************** 1132 * Page table page management routines..... 1133 ***************************************************/ 1134static PMAP_INLINE void 1135pmap_free_zero_pages(vm_page_t free) 1136{ 1137 vm_page_t m; 1138 1139 while (free != NULL) { 1140 m = free; 1141 free = m->right; 1142 vm_page_free_zero(m); 1143 } 1144} 1145 1146/* 1147 * This routine unholds page table pages, and if the hold count 1148 * drops to zero, then it decrements the wire count. 1149 */ 1150static PMAP_INLINE int 1151pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1152{ 1153 1154 --m->wire_count; 1155 if (m->wire_count == 0) 1156 return _pmap_unwire_pte_hold(pmap, m, free); 1157 else 1158 return 0; 1159} 1160 1161static int 1162_pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1163{ 1164 vm_offset_t pteva; 1165 1166 /* 1167 * unmap the page table page 1168 */ 1169 pmap->pm_pdir[m->pindex] = 0; 1170 --pmap->pm_stats.resident_count; 1171 1172 atomic_subtract_int(&cnt.v_wire_count, 1); 1173 1174 /* 1175 * Do an invltlb to make the invalidated mapping 1176 * take effect immediately. 1177 */ 1178 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1179 pmap_invalidate_page(pmap, pteva); 1180 1181 /* 1182 * Put page on a list so that it is released after 1183 * *ALL* TLB shootdown is done 1184 */ 1185 m->right = *free; 1186 *free = m; 1187 1188 return 1; 1189} 1190 1191/* 1192 * After removing a page table entry, this routine is used to 1193 * conditionally free the page, and manage the hold/wire counts. 1194 */ 1195static int 1196pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free) 1197{ 1198 pd_entry_t ptepde; 1199 vm_page_t mpte; 1200 1201 if (va >= VM_MAXUSER_ADDRESS) 1202 return 0; 1203 ptepde = *pmap_pde(pmap, va); 1204 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); 1205 return pmap_unwire_pte_hold(pmap, mpte, free); 1206} 1207 1208void 1209pmap_pinit0(pmap_t pmap) 1210{ 1211 1212 PMAP_LOCK_INIT(pmap); 1213 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1214#ifdef PAE 1215 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1216#endif 1217 pmap->pm_active = 0; 1218 PCPU_SET(curpmap, pmap); 1219 TAILQ_INIT(&pmap->pm_pvchunk); 1220 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1221 mtx_lock_spin(&allpmaps_lock); 1222 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1223 mtx_unlock_spin(&allpmaps_lock); 1224} 1225 1226/* 1227 * Initialize a preallocated and zeroed pmap structure, 1228 * such as one in a vmspace structure. 1229 */ 1230void 1231pmap_pinit(pmap_t pmap) 1232{ 1233 vm_page_t m, ptdpg[NPGPTD]; 1234 vm_paddr_t pa; 1235 static int color; 1236 int i; 1237 1238 PMAP_LOCK_INIT(pmap); 1239 1240 /* 1241 * No need to allocate page table space yet but we do need a valid 1242 * page directory table. 1243 */ 1244 if (pmap->pm_pdir == NULL) { 1245 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1246 NBPTD); 1247#ifdef PAE 1248 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO); 1249 KASSERT(((vm_offset_t)pmap->pm_pdpt & 1250 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0, 1251 ("pmap_pinit: pdpt misaligned")); 1252 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30), 1253 ("pmap_pinit: pdpt above 4g")); 1254#endif 1255 } 1256 1257 /* 1258 * allocate the page directory page(s) 1259 */ 1260 for (i = 0; i < NPGPTD;) { 1261 m = vm_page_alloc(NULL, color++, 1262 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1263 VM_ALLOC_ZERO); 1264 if (m == NULL) 1265 VM_WAIT; 1266 else { 1267 ptdpg[i++] = m; 1268 } 1269 } 1270 1271 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1272 1273 for (i = 0; i < NPGPTD; i++) { 1274 if ((ptdpg[i]->flags & PG_ZERO) == 0) 1275 bzero(pmap->pm_pdir + (i * NPDEPG), PAGE_SIZE); 1276 } 1277 1278 mtx_lock_spin(&allpmaps_lock); 1279 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1280 mtx_unlock_spin(&allpmaps_lock); 1281 /* Wire in kernel global address entries. */ 1282 /* XXX copies current process, does not fill in MPPTDI */ 1283 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1284#ifdef SMP 1285 pmap->pm_pdir[MPPTDI] = PTD[MPPTDI]; 1286#endif 1287 1288 /* install self-referential address mapping entry(s) */ 1289 for (i = 0; i < NPGPTD; i++) { 1290 pa = VM_PAGE_TO_PHYS(ptdpg[i]); 1291 pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M; 1292#ifdef PAE 1293 pmap->pm_pdpt[i] = pa | PG_V; 1294#endif 1295 } 1296 1297 pmap->pm_active = 0; 1298 TAILQ_INIT(&pmap->pm_pvchunk); 1299 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1300} 1301 1302/* 1303 * this routine is called if the page table page is not 1304 * mapped correctly. 1305 */ 1306static vm_page_t 1307_pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags) 1308{ 1309 vm_paddr_t ptepa; 1310 vm_page_t m; 1311 1312 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1313 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1314 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1315 1316 /* 1317 * Allocate a page table page. 1318 */ 1319 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1320 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1321 if (flags & M_WAITOK) { 1322 PMAP_UNLOCK(pmap); 1323 vm_page_unlock_queues(); 1324 VM_WAIT; 1325 vm_page_lock_queues(); 1326 PMAP_LOCK(pmap); 1327 } 1328 1329 /* 1330 * Indicate the need to retry. While waiting, the page table 1331 * page may have been allocated. 1332 */ 1333 return (NULL); 1334 } 1335 if ((m->flags & PG_ZERO) == 0) 1336 pmap_zero_page(m); 1337 1338 /* 1339 * Map the pagetable page into the process address space, if 1340 * it isn't already there. 1341 */ 1342 1343 pmap->pm_stats.resident_count++; 1344 1345 ptepa = VM_PAGE_TO_PHYS(m); 1346 pmap->pm_pdir[ptepindex] = 1347 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M); 1348 1349 return m; 1350} 1351 1352static vm_page_t 1353pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags) 1354{ 1355 unsigned ptepindex; 1356 pd_entry_t ptepa; 1357 vm_page_t m; 1358 1359 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1360 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1361 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1362 1363 /* 1364 * Calculate pagetable page index 1365 */ 1366 ptepindex = va >> PDRSHIFT; 1367retry: 1368 /* 1369 * Get the page directory entry 1370 */ 1371 ptepa = pmap->pm_pdir[ptepindex]; 1372 1373 /* 1374 * This supports switching from a 4MB page to a 1375 * normal 4K page. 1376 */ 1377 if (ptepa & PG_PS) { 1378 pmap->pm_pdir[ptepindex] = 0; 1379 ptepa = 0; 1380 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1381 pmap_invalidate_all(kernel_pmap); 1382 } 1383 1384 /* 1385 * If the page table page is mapped, we just increment the 1386 * hold count, and activate it. 1387 */ 1388 if (ptepa) { 1389 m = PHYS_TO_VM_PAGE(ptepa & PG_FRAME); 1390 m->wire_count++; 1391 } else { 1392 /* 1393 * Here if the pte page isn't mapped, or if it has 1394 * been deallocated. 1395 */ 1396 m = _pmap_allocpte(pmap, ptepindex, flags); 1397 if (m == NULL && (flags & M_WAITOK)) 1398 goto retry; 1399 } 1400 return (m); 1401} 1402 1403 1404/*************************************************** 1405* Pmap allocation/deallocation routines. 1406 ***************************************************/ 1407 1408#ifdef SMP 1409/* 1410 * Deal with a SMP shootdown of other users of the pmap that we are 1411 * trying to dispose of. This can be a bit hairy. 1412 */ 1413static u_int *lazymask; 1414static u_int lazyptd; 1415static volatile u_int lazywait; 1416 1417void pmap_lazyfix_action(void); 1418 1419void 1420pmap_lazyfix_action(void) 1421{ 1422 u_int mymask = PCPU_GET(cpumask); 1423 1424#ifdef COUNT_IPIS 1425 *ipi_lazypmap_counts[PCPU_GET(cpuid)]++; 1426#endif 1427 if (rcr3() == lazyptd) 1428 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1429 atomic_clear_int(lazymask, mymask); 1430 atomic_store_rel_int(&lazywait, 1); 1431} 1432 1433static void 1434pmap_lazyfix_self(u_int mymask) 1435{ 1436 1437 if (rcr3() == lazyptd) 1438 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1439 atomic_clear_int(lazymask, mymask); 1440} 1441 1442 1443static void 1444pmap_lazyfix(pmap_t pmap) 1445{ 1446 u_int mymask; 1447 u_int mask; 1448 u_int spins; 1449 1450 while ((mask = pmap->pm_active) != 0) { 1451 spins = 50000000; 1452 mask = mask & -mask; /* Find least significant set bit */ 1453 mtx_lock_spin(&smp_ipi_mtx); 1454#ifdef PAE 1455 lazyptd = vtophys(pmap->pm_pdpt); 1456#else 1457 lazyptd = vtophys(pmap->pm_pdir); 1458#endif 1459 mymask = PCPU_GET(cpumask); 1460 if (mask == mymask) { 1461 lazymask = &pmap->pm_active; 1462 pmap_lazyfix_self(mymask); 1463 } else { 1464 atomic_store_rel_int((u_int *)&lazymask, 1465 (u_int)&pmap->pm_active); 1466 atomic_store_rel_int(&lazywait, 0); 1467 ipi_selected(mask, IPI_LAZYPMAP); 1468 while (lazywait == 0) { 1469 ia32_pause(); 1470 if (--spins == 0) 1471 break; 1472 } 1473 } 1474 mtx_unlock_spin(&smp_ipi_mtx); 1475 if (spins == 0) 1476 printf("pmap_lazyfix: spun for 50000000\n"); 1477 } 1478} 1479 1480#else /* SMP */ 1481 1482/* 1483 * Cleaning up on uniprocessor is easy. For various reasons, we're 1484 * unlikely to have to even execute this code, including the fact 1485 * that the cleanup is deferred until the parent does a wait(2), which 1486 * means that another userland process has run. 1487 */ 1488static void 1489pmap_lazyfix(pmap_t pmap) 1490{ 1491 u_int cr3; 1492 1493 cr3 = vtophys(pmap->pm_pdir); 1494 if (cr3 == rcr3()) { 1495 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1496 pmap->pm_active &= ~(PCPU_GET(cpumask)); 1497 } 1498} 1499#endif /* SMP */ 1500 1501/* 1502 * Release any resources held by the given physical map. 1503 * Called when a pmap initialized by pmap_pinit is being released. 1504 * Should only be called if the map contains no valid mappings. 1505 */ 1506void 1507pmap_release(pmap_t pmap) 1508{ 1509 vm_page_t m, ptdpg[NPGPTD]; 1510 int i; 1511 1512 KASSERT(pmap->pm_stats.resident_count == 0, 1513 ("pmap_release: pmap resident count %ld != 0", 1514 pmap->pm_stats.resident_count)); 1515 1516 pmap_lazyfix(pmap); 1517 mtx_lock_spin(&allpmaps_lock); 1518 LIST_REMOVE(pmap, pm_list); 1519 mtx_unlock_spin(&allpmaps_lock); 1520 1521 for (i = 0; i < NPGPTD; i++) 1522 ptdpg[i] = PHYS_TO_VM_PAGE(pmap->pm_pdir[PTDPTDI + i] & 1523 PG_FRAME); 1524 1525 bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) * 1526 sizeof(*pmap->pm_pdir)); 1527#ifdef SMP 1528 pmap->pm_pdir[MPPTDI] = 0; 1529#endif 1530 1531 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1532 1533 for (i = 0; i < NPGPTD; i++) { 1534 m = ptdpg[i]; 1535#ifdef PAE 1536 KASSERT(VM_PAGE_TO_PHYS(m) == (pmap->pm_pdpt[i] & PG_FRAME), 1537 ("pmap_release: got wrong ptd page")); 1538#endif 1539 m->wire_count--; 1540 atomic_subtract_int(&cnt.v_wire_count, 1); 1541 vm_page_free_zero(m); 1542 } 1543 PMAP_LOCK_DESTROY(pmap); 1544} 1545 1546static int 1547kvm_size(SYSCTL_HANDLER_ARGS) 1548{ 1549 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1550 1551 return sysctl_handle_long(oidp, &ksize, 0, req); 1552} 1553SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1554 0, 0, kvm_size, "IU", "Size of KVM"); 1555 1556static int 1557kvm_free(SYSCTL_HANDLER_ARGS) 1558{ 1559 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1560 1561 return sysctl_handle_long(oidp, &kfree, 0, req); 1562} 1563SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1564 0, 0, kvm_free, "IU", "Amount of KVM free"); 1565 1566/* 1567 * grow the number of kernel page table entries, if needed 1568 */ 1569void 1570pmap_growkernel(vm_offset_t addr) 1571{ 1572 struct pmap *pmap; 1573 vm_paddr_t ptppaddr; 1574 vm_page_t nkpg; 1575 pd_entry_t newpdir; 1576 pt_entry_t *pde; 1577 1578 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1579 if (kernel_vm_end == 0) { 1580 kernel_vm_end = KERNBASE; 1581 nkpt = 0; 1582 while (pdir_pde(PTD, kernel_vm_end)) { 1583 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1584 nkpt++; 1585 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1586 kernel_vm_end = kernel_map->max_offset; 1587 break; 1588 } 1589 } 1590 } 1591 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1592 if (addr - 1 >= kernel_map->max_offset) 1593 addr = kernel_map->max_offset; 1594 while (kernel_vm_end < addr) { 1595 if (pdir_pde(PTD, kernel_vm_end)) { 1596 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1597 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1598 kernel_vm_end = kernel_map->max_offset; 1599 break; 1600 } 1601 continue; 1602 } 1603 1604 /* 1605 * This index is bogus, but out of the way 1606 */ 1607 nkpg = vm_page_alloc(NULL, nkpt, 1608 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1609 if (!nkpg) 1610 panic("pmap_growkernel: no memory to grow kernel"); 1611 1612 nkpt++; 1613 1614 pmap_zero_page(nkpg); 1615 ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1616 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1617 pdir_pde(PTD, kernel_vm_end) = newpdir; 1618 1619 mtx_lock_spin(&allpmaps_lock); 1620 LIST_FOREACH(pmap, &allpmaps, pm_list) { 1621 pde = pmap_pde(pmap, kernel_vm_end); 1622 pde_store(pde, newpdir); 1623 } 1624 mtx_unlock_spin(&allpmaps_lock); 1625 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1626 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1627 kernel_vm_end = kernel_map->max_offset; 1628 break; 1629 } 1630 } 1631} 1632 1633 1634/*************************************************** 1635 * page management routines. 1636 ***************************************************/ 1637 1638CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE); 1639CTASSERT(_NPCM == 11); 1640 1641static __inline struct pv_chunk * 1642pv_to_chunk(pv_entry_t pv) 1643{ 1644 1645 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK); 1646} 1647 1648#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap) 1649 1650#define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */ 1651#define PC_FREE10 0x0000fffful /* Free values for index 10 */ 1652 1653static uint32_t pc_freemask[11] = { 1654 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1655 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1656 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1657 PC_FREE0_9, PC_FREE10 1658}; 1659 1660SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0, 1661 "Current number of pv entries"); 1662 1663#ifdef PV_STATS 1664static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail; 1665 1666SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0, 1667 "Current number of pv entry chunks"); 1668SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0, 1669 "Current number of pv entry chunks allocated"); 1670SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0, 1671 "Current number of pv entry chunks frees"); 1672SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0, 1673 "Number of times tried to get a chunk page but failed."); 1674 1675static long pv_entry_frees, pv_entry_allocs; 1676static int pv_entry_spare; 1677 1678SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0, 1679 "Current number of pv entry frees"); 1680SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0, 1681 "Current number of pv entry allocs"); 1682SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0, 1683 "Current number of spare pv entries"); 1684 1685static int pmap_collect_inactive, pmap_collect_active; 1686 1687SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0, 1688 "Current number times pmap_collect called on inactive queue"); 1689SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0, 1690 "Current number times pmap_collect called on active queue"); 1691#endif 1692 1693/* 1694 * We are in a serious low memory condition. Resort to 1695 * drastic measures to free some pages so we can allocate 1696 * another pv entry chunk. This is normally called to 1697 * unmap inactive pages, and if necessary, active pages. 1698 */ 1699static void 1700pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq) 1701{ 1702 pmap_t pmap; 1703 pt_entry_t *pte, tpte; 1704 pv_entry_t next_pv, pv; 1705 vm_offset_t va; 1706 vm_page_t m, free; 1707 1708 sched_pin(); 1709 TAILQ_FOREACH(m, &vpq->pl, pageq) { 1710 if (m->hold_count || m->busy) 1711 continue; 1712 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) { 1713 va = pv->pv_va; 1714 pmap = PV_PMAP(pv); 1715 /* Avoid deadlock and lock recursion. */ 1716 if (pmap > locked_pmap) 1717 PMAP_LOCK(pmap); 1718 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) 1719 continue; 1720 pmap->pm_stats.resident_count--; 1721 pte = pmap_pte_quick(pmap, va); 1722 tpte = pte_load_clear(pte); 1723 KASSERT((tpte & PG_W) == 0, 1724 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte)); 1725 if (tpte & PG_A) 1726 vm_page_flag_set(m, PG_REFERENCED); 1727 if (tpte & PG_M) { 1728 KASSERT((tpte & PG_RW), 1729 ("pmap_collect: modified page not writable: va: %#x, pte: %#jx", 1730 va, (uintmax_t)tpte)); 1731 vm_page_dirty(m); 1732 } 1733 free = NULL; 1734 pmap_unuse_pt(pmap, va, &free); 1735 pmap_invalidate_page(pmap, va); 1736 pmap_free_zero_pages(free); 1737 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1738 if (TAILQ_EMPTY(&m->md.pv_list)) 1739 vm_page_flag_clear(m, PG_WRITEABLE); 1740 m->md.pv_list_count--; 1741 free_pv_entry(pmap, pv); 1742 if (pmap != locked_pmap) 1743 PMAP_UNLOCK(pmap); 1744 } 1745 } 1746 sched_unpin(); 1747} 1748 1749 1750/* 1751 * free the pv_entry back to the free list 1752 */ 1753static void 1754free_pv_entry(pmap_t pmap, pv_entry_t pv) 1755{ 1756 vm_page_t m; 1757 struct pv_chunk *pc; 1758 int idx, field, bit; 1759 1760 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1761 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1762 PV_STAT(pv_entry_frees++); 1763 PV_STAT(pv_entry_spare++); 1764 pv_entry_count--; 1765 pc = pv_to_chunk(pv); 1766 idx = pv - &pc->pc_pventry[0]; 1767 field = idx / 32; 1768 bit = idx % 32; 1769 pc->pc_map[field] |= 1ul << bit; 1770 /* move to head of list */ 1771 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 1772 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 1773 for (idx = 0; idx < _NPCM; idx++) 1774 if (pc->pc_map[idx] != pc_freemask[idx]) 1775 return; 1776 PV_STAT(pv_entry_spare -= _NPCPV); 1777 PV_STAT(pc_chunk_count--); 1778 PV_STAT(pc_chunk_frees++); 1779 /* entire chunk is free, return it */ 1780 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 1781 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 1782 pmap_qremove((vm_offset_t)pc, 1); 1783 vm_page_unwire(m, 0); 1784 vm_page_free(m); 1785 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 1786} 1787 1788/* 1789 * get a new pv_entry, allocating a block from the system 1790 * when needed. 1791 */ 1792static pv_entry_t 1793get_pv_entry(pmap_t pmap, int try) 1794{ 1795 static const struct timeval printinterval = { 60, 0 }; 1796 static struct timeval lastprint; 1797 static vm_pindex_t colour; 1798 int bit, field; 1799 pv_entry_t pv; 1800 struct pv_chunk *pc; 1801 vm_page_t m; 1802 1803 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1804 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1805 PV_STAT(pv_entry_allocs++); 1806 pv_entry_count++; 1807 if (pv_entry_count > pv_entry_high_water) 1808 pagedaemon_wakeup(); 1809 pc = TAILQ_FIRST(&pmap->pm_pvchunk); 1810 if (pc != NULL) { 1811 for (field = 0; field < _NPCM; field++) { 1812 if (pc->pc_map[field]) { 1813 bit = bsfl(pc->pc_map[field]); 1814 break; 1815 } 1816 } 1817 if (field < _NPCM) { 1818 pv = &pc->pc_pventry[field * 32 + bit]; 1819 pc->pc_map[field] &= ~(1ul << bit); 1820 /* If this was the last item, move it to tail */ 1821 for (field = 0; field < _NPCM; field++) 1822 if (pc->pc_map[field] != 0) { 1823 PV_STAT(pv_entry_spare--); 1824 return (pv); /* not full, return */ 1825 } 1826 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 1827 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); 1828 PV_STAT(pv_entry_spare--); 1829 return (pv); 1830 } 1831 } 1832 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 1833 m = vm_page_alloc(NULL, colour, VM_ALLOC_NORMAL | 1834 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED); 1835 if (m == NULL || pc == NULL) { 1836 if (try) { 1837 pv_entry_count--; 1838 PV_STAT(pc_chunk_tryfail++); 1839 if (m) { 1840 vm_page_lock_queues(); 1841 vm_page_unwire(m, 0); 1842 vm_page_free(m); 1843 vm_page_unlock_queues(); 1844 } 1845 if (pc) 1846 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 1847 return (NULL); 1848 } 1849 /* 1850 * Reclaim pv entries: At first, destroy mappings to 1851 * inactive pages. After that, if a pv chunk entry 1852 * is still needed, destroy mappings to active pages. 1853 */ 1854 if (ratecheck(&lastprint, &printinterval)) 1855 printf("Approaching the limit on PV entries, " 1856 "consider increasing tunables " 1857 "vm.pmap.shpgperproc or " 1858 "vm.pmap.pv_entry_max\n"); 1859 PV_STAT(pmap_collect_inactive++); 1860 pmap_collect(pmap, &vm_page_queues[PQ_INACTIVE]); 1861 if (m == NULL) 1862 m = vm_page_alloc(NULL, colour, VM_ALLOC_NORMAL | 1863 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED); 1864 if (pc == NULL) 1865 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 1866 if (m == NULL || pc == NULL) { 1867 PV_STAT(pmap_collect_active++); 1868 pmap_collect(pmap, &vm_page_queues[PQ_ACTIVE]); 1869 if (m == NULL) 1870 m = vm_page_alloc(NULL, colour, 1871 VM_ALLOC_SYSTEM | VM_ALLOC_NOOBJ | 1872 VM_ALLOC_WIRED); 1873 if (pc == NULL) 1874 pc = (struct pv_chunk *) 1875 pmap_ptelist_alloc(&pv_vafree); 1876 if (m == NULL || pc == NULL) 1877 panic("get_pv_entry: increase vm.pmap.shpgperproc"); 1878 } 1879 } 1880 PV_STAT(pc_chunk_count++); 1881 PV_STAT(pc_chunk_allocs++); 1882 colour++; 1883 pmap_qenter((vm_offset_t)pc, &m, 1); 1884 pc->pc_pmap = pmap; 1885 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */ 1886 for (field = 1; field < _NPCM; field++) 1887 pc->pc_map[field] = pc_freemask[field]; 1888 pv = &pc->pc_pventry[0]; 1889 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 1890 PV_STAT(pv_entry_spare += _NPCPV - 1); 1891 return (pv); 1892} 1893 1894static void 1895pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 1896{ 1897 pv_entry_t pv; 1898 1899 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1900 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1901 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 1902 if (pmap == PV_PMAP(pv) && va == pv->pv_va) 1903 break; 1904 } 1905 KASSERT(pv != NULL, ("pmap_remove_entry: pv not found")); 1906 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1907 m->md.pv_list_count--; 1908 if (TAILQ_EMPTY(&m->md.pv_list)) 1909 vm_page_flag_clear(m, PG_WRITEABLE); 1910 free_pv_entry(pmap, pv); 1911} 1912 1913/* 1914 * Create a pv entry for page at pa for 1915 * (pmap, va). 1916 */ 1917static void 1918pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 1919{ 1920 pv_entry_t pv; 1921 1922 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1923 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1924 pv = get_pv_entry(pmap, FALSE); 1925 pv->pv_va = va; 1926 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 1927 m->md.pv_list_count++; 1928} 1929 1930/* 1931 * Conditionally create a pv entry. 1932 */ 1933static boolean_t 1934pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 1935{ 1936 pv_entry_t pv; 1937 1938 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1939 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1940 if (pv_entry_count < pv_entry_high_water && 1941 (pv = get_pv_entry(pmap, TRUE)) != NULL) { 1942 pv->pv_va = va; 1943 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 1944 m->md.pv_list_count++; 1945 return (TRUE); 1946 } else 1947 return (FALSE); 1948} 1949 1950/* 1951 * pmap_remove_pte: do the things to unmap a page in a process 1952 */ 1953static int 1954pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free) 1955{ 1956 pt_entry_t oldpte; 1957 vm_page_t m; 1958 1959 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1960 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1961 oldpte = pte_load_clear(ptq); 1962 if (oldpte & PG_W) 1963 pmap->pm_stats.wired_count -= 1; 1964 /* 1965 * Machines that don't support invlpg, also don't support 1966 * PG_G. 1967 */ 1968 if (oldpte & PG_G) 1969 pmap_invalidate_page(kernel_pmap, va); 1970 pmap->pm_stats.resident_count -= 1; 1971 if (oldpte & PG_MANAGED) { 1972 m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME); 1973 if (oldpte & PG_M) { 1974 KASSERT((oldpte & PG_RW), 1975 ("pmap_remove_pte: modified page not writable: va: %#x, pte: %#jx", 1976 va, (uintmax_t)oldpte)); 1977 vm_page_dirty(m); 1978 } 1979 if (oldpte & PG_A) 1980 vm_page_flag_set(m, PG_REFERENCED); 1981 pmap_remove_entry(pmap, m, va); 1982 } 1983 return (pmap_unuse_pt(pmap, va, free)); 1984} 1985 1986/* 1987 * Remove a single page from a process address space 1988 */ 1989static void 1990pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free) 1991{ 1992 pt_entry_t *pte; 1993 1994 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1995 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 1996 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1997 if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0) 1998 return; 1999 pmap_remove_pte(pmap, pte, va, free); 2000 pmap_invalidate_page(pmap, va); 2001} 2002 2003/* 2004 * Remove the given range of addresses from the specified map. 2005 * 2006 * It is assumed that the start and end are properly 2007 * rounded to the page size. 2008 */ 2009void 2010pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 2011{ 2012 vm_offset_t pdnxt; 2013 pd_entry_t ptpaddr; 2014 pt_entry_t *pte; 2015 vm_page_t free = NULL; 2016 int anyvalid; 2017 2018 /* 2019 * Perform an unsynchronized read. This is, however, safe. 2020 */ 2021 if (pmap->pm_stats.resident_count == 0) 2022 return; 2023 2024 anyvalid = 0; 2025 2026 vm_page_lock_queues(); 2027 sched_pin(); 2028 PMAP_LOCK(pmap); 2029 2030 /* 2031 * special handling of removing one page. a very 2032 * common operation and easy to short circuit some 2033 * code. 2034 */ 2035 if ((sva + PAGE_SIZE == eva) && 2036 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 2037 pmap_remove_page(pmap, sva, &free); 2038 goto out; 2039 } 2040 2041 for (; sva < eva; sva = pdnxt) { 2042 unsigned pdirindex; 2043 2044 /* 2045 * Calculate index for next page table. 2046 */ 2047 pdnxt = (sva + NBPDR) & ~PDRMASK; 2048 if (pmap->pm_stats.resident_count == 0) 2049 break; 2050 2051 pdirindex = sva >> PDRSHIFT; 2052 ptpaddr = pmap->pm_pdir[pdirindex]; 2053 2054 /* 2055 * Weed out invalid mappings. Note: we assume that the page 2056 * directory table is always allocated, and in kernel virtual. 2057 */ 2058 if (ptpaddr == 0) 2059 continue; 2060 2061 /* 2062 * Check for large page. 2063 */ 2064 if ((ptpaddr & PG_PS) != 0) { 2065 pmap->pm_pdir[pdirindex] = 0; 2066 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 2067 anyvalid = 1; 2068 continue; 2069 } 2070 2071 /* 2072 * Limit our scan to either the end of the va represented 2073 * by the current page table page, or to the end of the 2074 * range being removed. 2075 */ 2076 if (pdnxt > eva) 2077 pdnxt = eva; 2078 2079 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2080 sva += PAGE_SIZE) { 2081 if (*pte == 0) 2082 continue; 2083 2084 /* 2085 * The TLB entry for a PG_G mapping is invalidated 2086 * by pmap_remove_pte(). 2087 */ 2088 if ((*pte & PG_G) == 0) 2089 anyvalid = 1; 2090 if (pmap_remove_pte(pmap, pte, sva, &free)) 2091 break; 2092 } 2093 } 2094out: 2095 sched_unpin(); 2096 if (anyvalid) 2097 pmap_invalidate_all(pmap); 2098 vm_page_unlock_queues(); 2099 PMAP_UNLOCK(pmap); 2100 pmap_free_zero_pages(free); 2101} 2102 2103/* 2104 * Routine: pmap_remove_all 2105 * Function: 2106 * Removes this physical page from 2107 * all physical maps in which it resides. 2108 * Reflects back modify bits to the pager. 2109 * 2110 * Notes: 2111 * Original versions of this routine were very 2112 * inefficient because they iteratively called 2113 * pmap_remove (slow...) 2114 */ 2115 2116void 2117pmap_remove_all(vm_page_t m) 2118{ 2119 pv_entry_t pv; 2120 pmap_t pmap; 2121 pt_entry_t *pte, tpte; 2122 vm_page_t free; 2123 2124#if defined(PMAP_DIAGNOSTIC) 2125 /* 2126 * XXX This makes pmap_remove_all() illegal for non-managed pages! 2127 */ 2128 if (m->flags & PG_FICTITIOUS) { 2129 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%x", 2130 VM_PAGE_TO_PHYS(m)); 2131 } 2132#endif 2133 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2134 sched_pin(); 2135 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2136 pmap = PV_PMAP(pv); 2137 PMAP_LOCK(pmap); 2138 pmap->pm_stats.resident_count--; 2139 pte = pmap_pte_quick(pmap, pv->pv_va); 2140 tpte = pte_load_clear(pte); 2141 if (tpte & PG_W) 2142 pmap->pm_stats.wired_count--; 2143 if (tpte & PG_A) 2144 vm_page_flag_set(m, PG_REFERENCED); 2145 2146 /* 2147 * Update the vm_page_t clean and reference bits. 2148 */ 2149 if (tpte & PG_M) { 2150 KASSERT((tpte & PG_RW), 2151 ("pmap_remove_all: modified page not writable: va: %#x, pte: %#jx", 2152 pv->pv_va, (uintmax_t)tpte)); 2153 vm_page_dirty(m); 2154 } 2155 free = NULL; 2156 pmap_unuse_pt(pmap, pv->pv_va, &free); 2157 pmap_invalidate_page(pmap, pv->pv_va); 2158 pmap_free_zero_pages(free); 2159 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2160 m->md.pv_list_count--; 2161 free_pv_entry(pmap, pv); 2162 PMAP_UNLOCK(pmap); 2163 } 2164 vm_page_flag_clear(m, PG_WRITEABLE); 2165 sched_unpin(); 2166} 2167 2168/* 2169 * Set the physical protection on the 2170 * specified range of this map as requested. 2171 */ 2172void 2173pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 2174{ 2175 vm_offset_t pdnxt; 2176 pd_entry_t ptpaddr; 2177 pt_entry_t *pte; 2178 int anychanged; 2179 2180 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 2181 pmap_remove(pmap, sva, eva); 2182 return; 2183 } 2184 2185#ifdef PAE 2186 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) == 2187 (VM_PROT_WRITE|VM_PROT_EXECUTE)) 2188 return; 2189#else 2190 if (prot & VM_PROT_WRITE) 2191 return; 2192#endif 2193 2194 anychanged = 0; 2195 2196 vm_page_lock_queues(); 2197 sched_pin(); 2198 PMAP_LOCK(pmap); 2199 for (; sva < eva; sva = pdnxt) { 2200 pt_entry_t obits, pbits; 2201 unsigned pdirindex; 2202 2203 pdnxt = (sva + NBPDR) & ~PDRMASK; 2204 2205 pdirindex = sva >> PDRSHIFT; 2206 ptpaddr = pmap->pm_pdir[pdirindex]; 2207 2208 /* 2209 * Weed out invalid mappings. Note: we assume that the page 2210 * directory table is always allocated, and in kernel virtual. 2211 */ 2212 if (ptpaddr == 0) 2213 continue; 2214 2215 /* 2216 * Check for large page. 2217 */ 2218 if ((ptpaddr & PG_PS) != 0) { 2219 if ((prot & VM_PROT_WRITE) == 0) 2220 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW); 2221#ifdef PAE 2222 if ((prot & VM_PROT_EXECUTE) == 0) 2223 pmap->pm_pdir[pdirindex] |= pg_nx; 2224#endif 2225 anychanged = 1; 2226 continue; 2227 } 2228 2229 if (pdnxt > eva) 2230 pdnxt = eva; 2231 2232 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2233 sva += PAGE_SIZE) { 2234 vm_page_t m; 2235 2236retry: 2237 /* 2238 * Regardless of whether a pte is 32 or 64 bits in 2239 * size, PG_RW, PG_A, and PG_M are among the least 2240 * significant 32 bits. 2241 */ 2242 obits = pbits = *pte; 2243 if ((pbits & PG_V) == 0) 2244 continue; 2245 if (pbits & PG_MANAGED) { 2246 m = NULL; 2247 if (pbits & PG_A) { 2248 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME); 2249 vm_page_flag_set(m, PG_REFERENCED); 2250 pbits &= ~PG_A; 2251 } 2252 if ((pbits & PG_M) != 0) { 2253 if (m == NULL) 2254 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME); 2255 vm_page_dirty(m); 2256 } 2257 } 2258 2259 if ((prot & VM_PROT_WRITE) == 0) 2260 pbits &= ~(PG_RW | PG_M); 2261#ifdef PAE 2262 if ((prot & VM_PROT_EXECUTE) == 0) 2263 pbits |= pg_nx; 2264#endif 2265 2266 if (pbits != obits) { 2267#ifdef PAE 2268 if (!atomic_cmpset_64(pte, obits, pbits)) 2269 goto retry; 2270#else 2271 if (!atomic_cmpset_int((u_int *)pte, obits, 2272 pbits)) 2273 goto retry; 2274#endif 2275 if (obits & PG_G) 2276 pmap_invalidate_page(pmap, sva); 2277 else 2278 anychanged = 1; 2279 } 2280 } 2281 } 2282 sched_unpin(); 2283 if (anychanged) 2284 pmap_invalidate_all(pmap); 2285 vm_page_unlock_queues(); 2286 PMAP_UNLOCK(pmap); 2287} 2288 2289/* 2290 * Insert the given physical page (p) at 2291 * the specified virtual address (v) in the 2292 * target physical map with the protection requested. 2293 * 2294 * If specified, the page will be wired down, meaning 2295 * that the related pte can not be reclaimed. 2296 * 2297 * NB: This is the only routine which MAY NOT lazy-evaluate 2298 * or lose information. That is, this routine must actually 2299 * insert this page into the given map NOW. 2300 */ 2301void 2302pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 2303 boolean_t wired) 2304{ 2305 vm_paddr_t pa; 2306 pd_entry_t *pde; 2307 pt_entry_t *pte; 2308 vm_paddr_t opa; 2309 pt_entry_t origpte, newpte; 2310 vm_page_t mpte, om; 2311 boolean_t invlva; 2312 2313 va = trunc_page(va); 2314#ifdef PMAP_DIAGNOSTIC 2315 if (va > VM_MAX_KERNEL_ADDRESS) 2316 panic("pmap_enter: toobig"); 2317 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS)) 2318 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va); 2319#endif 2320 2321 mpte = NULL; 2322 2323 vm_page_lock_queues(); 2324 PMAP_LOCK(pmap); 2325 sched_pin(); 2326 2327 /* 2328 * In the case that a page table page is not 2329 * resident, we are creating it here. 2330 */ 2331 if (va < VM_MAXUSER_ADDRESS) { 2332 mpte = pmap_allocpte(pmap, va, M_WAITOK); 2333 } 2334#if 0 && defined(PMAP_DIAGNOSTIC) 2335 else { 2336 pd_entry_t *pdeaddr = pmap_pde(pmap, va); 2337 origpte = *pdeaddr; 2338 if ((origpte & PG_V) == 0) { 2339 panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n", 2340 pmap->pm_pdir[PTDPTDI], origpte, va); 2341 } 2342 } 2343#endif 2344 2345 pde = pmap_pde(pmap, va); 2346 if ((*pde & PG_PS) != 0) 2347 panic("pmap_enter: attempted pmap_enter on 4MB page"); 2348 pte = pmap_pte_quick(pmap, va); 2349 2350 /* 2351 * Page Directory table entry not valid, we need a new PT page 2352 */ 2353 if (pte == NULL) { 2354 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n", 2355 (uintmax_t)pmap->pm_pdir[PTDPTDI], va); 2356 } 2357 2358 pa = VM_PAGE_TO_PHYS(m); 2359 om = NULL; 2360 origpte = *pte; 2361 opa = origpte & PG_FRAME; 2362 2363 /* 2364 * Mapping has not changed, must be protection or wiring change. 2365 */ 2366 if (origpte && (opa == pa)) { 2367 /* 2368 * Wiring change, just update stats. We don't worry about 2369 * wiring PT pages as they remain resident as long as there 2370 * are valid mappings in them. Hence, if a user page is wired, 2371 * the PT page will be also. 2372 */ 2373 if (wired && ((origpte & PG_W) == 0)) 2374 pmap->pm_stats.wired_count++; 2375 else if (!wired && (origpte & PG_W)) 2376 pmap->pm_stats.wired_count--; 2377 2378 /* 2379 * Remove extra pte reference 2380 */ 2381 if (mpte) 2382 mpte->wire_count--; 2383 2384 /* 2385 * We might be turning off write access to the page, 2386 * so we go ahead and sense modify status. 2387 */ 2388 if (origpte & PG_MANAGED) { 2389 om = m; 2390 pa |= PG_MANAGED; 2391 } 2392 goto validate; 2393 } 2394 /* 2395 * Mapping has changed, invalidate old range and fall through to 2396 * handle validating new mapping. 2397 */ 2398 if (opa) { 2399 if (origpte & PG_W) 2400 pmap->pm_stats.wired_count--; 2401 if (origpte & PG_MANAGED) { 2402 om = PHYS_TO_VM_PAGE(opa); 2403 pmap_remove_entry(pmap, om, va); 2404 } 2405 if (mpte != NULL) { 2406 mpte->wire_count--; 2407 KASSERT(mpte->wire_count > 0, 2408 ("pmap_enter: missing reference to page table page," 2409 " va: 0x%x", va)); 2410 } 2411 } else 2412 pmap->pm_stats.resident_count++; 2413 2414 /* 2415 * Enter on the PV list if part of our managed memory. 2416 */ 2417 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 2418 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva, 2419 ("pmap_enter: managed mapping within the clean submap")); 2420 pmap_insert_entry(pmap, va, m); 2421 pa |= PG_MANAGED; 2422 } 2423 2424 /* 2425 * Increment counters 2426 */ 2427 if (wired) 2428 pmap->pm_stats.wired_count++; 2429 2430validate: 2431 /* 2432 * Now validate mapping with desired protection/wiring. 2433 */ 2434 newpte = (pt_entry_t)(pa | PG_V); 2435 if ((prot & VM_PROT_WRITE) != 0) { 2436 newpte |= PG_RW; 2437 vm_page_flag_set(m, PG_WRITEABLE); 2438 } 2439#ifdef PAE 2440 if ((prot & VM_PROT_EXECUTE) == 0) 2441 newpte |= pg_nx; 2442#endif 2443 if (wired) 2444 newpte |= PG_W; 2445 if (va < VM_MAXUSER_ADDRESS) 2446 newpte |= PG_U; 2447 if (pmap == kernel_pmap) 2448 newpte |= pgeflag; 2449 2450 /* 2451 * if the mapping or permission bits are different, we need 2452 * to update the pte. 2453 */ 2454 if ((origpte & ~(PG_M|PG_A)) != newpte) { 2455 if (origpte & PG_V) { 2456 invlva = FALSE; 2457 origpte = pte_load_store(pte, newpte | PG_A); 2458 if (origpte & PG_A) { 2459 if (origpte & PG_MANAGED) 2460 vm_page_flag_set(om, PG_REFERENCED); 2461 if (opa != VM_PAGE_TO_PHYS(m)) 2462 invlva = TRUE; 2463#ifdef PAE 2464 if ((origpte & PG_NX) == 0 && 2465 (newpte & PG_NX) != 0) 2466 invlva = TRUE; 2467#endif 2468 } 2469 if (origpte & PG_M) { 2470 KASSERT((origpte & PG_RW), 2471 ("pmap_enter: modified page not writable: va: %#x, pte: %#jx", 2472 va, (uintmax_t)origpte)); 2473 if ((origpte & PG_MANAGED) != 0) 2474 vm_page_dirty(om); 2475 if ((prot & VM_PROT_WRITE) == 0) 2476 invlva = TRUE; 2477 } 2478 if (invlva) 2479 pmap_invalidate_page(pmap, va); 2480 } else 2481 pte_store(pte, newpte | PG_A); 2482 } 2483 sched_unpin(); 2484 vm_page_unlock_queues(); 2485 PMAP_UNLOCK(pmap); 2486} 2487 2488/* 2489 * Maps a sequence of resident pages belonging to the same object. 2490 * The sequence begins with the given page m_start. This page is 2491 * mapped at the given virtual address start. Each subsequent page is 2492 * mapped at a virtual address that is offset from start by the same 2493 * amount as the page is offset from m_start within the object. The 2494 * last page in the sequence is the page with the largest offset from 2495 * m_start that can be mapped at a virtual address less than the given 2496 * virtual address end. Not every virtual page between start and end 2497 * is mapped; only those for which a resident page exists with the 2498 * corresponding offset from m_start are mapped. 2499 */ 2500void 2501pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, 2502 vm_page_t m_start, vm_prot_t prot) 2503{ 2504 vm_page_t m, mpte; 2505 vm_pindex_t diff, psize; 2506 2507 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED); 2508 psize = atop(end - start); 2509 mpte = NULL; 2510 m = m_start; 2511 PMAP_LOCK(pmap); 2512 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { 2513 mpte = pmap_enter_quick_locked(pmap, start + ptoa(diff), m, 2514 prot, mpte); 2515 m = TAILQ_NEXT(m, listq); 2516 } 2517 PMAP_UNLOCK(pmap); 2518} 2519 2520/* 2521 * this code makes some *MAJOR* assumptions: 2522 * 1. Current pmap & pmap exists. 2523 * 2. Not wired. 2524 * 3. Read access. 2525 * 4. No page table pages. 2526 * but is *MUCH* faster than pmap_enter... 2527 */ 2528 2529void 2530pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 2531{ 2532 2533 PMAP_LOCK(pmap); 2534 (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL); 2535 PMAP_UNLOCK(pmap); 2536} 2537 2538static vm_page_t 2539pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, 2540 vm_prot_t prot, vm_page_t mpte) 2541{ 2542 pt_entry_t *pte; 2543 vm_paddr_t pa; 2544 vm_page_t free; 2545 2546 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva || 2547 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0, 2548 ("pmap_enter_quick_locked: managed mapping within the clean submap")); 2549 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2550 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2551 2552 /* 2553 * In the case that a page table page is not 2554 * resident, we are creating it here. 2555 */ 2556 if (va < VM_MAXUSER_ADDRESS) { 2557 unsigned ptepindex; 2558 pd_entry_t ptepa; 2559 2560 /* 2561 * Calculate pagetable page index 2562 */ 2563 ptepindex = va >> PDRSHIFT; 2564 if (mpte && (mpte->pindex == ptepindex)) { 2565 mpte->wire_count++; 2566 } else { 2567 /* 2568 * Get the page directory entry 2569 */ 2570 ptepa = pmap->pm_pdir[ptepindex]; 2571 2572 /* 2573 * If the page table page is mapped, we just increment 2574 * the hold count, and activate it. 2575 */ 2576 if (ptepa) { 2577 if (ptepa & PG_PS) 2578 panic("pmap_enter_quick: unexpected mapping into 4MB page"); 2579 mpte = PHYS_TO_VM_PAGE(ptepa & PG_FRAME); 2580 mpte->wire_count++; 2581 } else { 2582 mpte = _pmap_allocpte(pmap, ptepindex, 2583 M_NOWAIT); 2584 if (mpte == NULL) 2585 return (mpte); 2586 } 2587 } 2588 } else { 2589 mpte = NULL; 2590 } 2591 2592 /* 2593 * This call to vtopte makes the assumption that we are 2594 * entering the page into the current pmap. In order to support 2595 * quick entry into any pmap, one would likely use pmap_pte_quick. 2596 * But that isn't as quick as vtopte. 2597 */ 2598 pte = vtopte(va); 2599 if (*pte) { 2600 if (mpte != NULL) { 2601 mpte->wire_count--; 2602 mpte = NULL; 2603 } 2604 return (mpte); 2605 } 2606 2607 /* 2608 * Enter on the PV list if part of our managed memory. 2609 */ 2610 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 && 2611 !pmap_try_insert_pv_entry(pmap, va, m)) { 2612 if (mpte != NULL) { 2613 free = NULL; 2614 if (pmap_unwire_pte_hold(pmap, mpte, &free)) { 2615 pmap_invalidate_page(pmap, va); 2616 pmap_free_zero_pages(free); 2617 } 2618 2619 mpte = NULL; 2620 } 2621 return (mpte); 2622 } 2623 2624 /* 2625 * Increment counters 2626 */ 2627 pmap->pm_stats.resident_count++; 2628 2629 pa = VM_PAGE_TO_PHYS(m); 2630#ifdef PAE 2631 if ((prot & VM_PROT_EXECUTE) == 0) 2632 pa |= pg_nx; 2633#endif 2634 2635 /* 2636 * Now validate mapping with RO protection 2637 */ 2638 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 2639 pte_store(pte, pa | PG_V | PG_U); 2640 else 2641 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 2642 return mpte; 2643} 2644 2645/* 2646 * Make a temporary mapping for a physical address. This is only intended 2647 * to be used for panic dumps. 2648 */ 2649void * 2650pmap_kenter_temporary(vm_paddr_t pa, int i) 2651{ 2652 vm_offset_t va; 2653 2654 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 2655 pmap_kenter(va, pa); 2656 invlpg(va); 2657 return ((void *)crashdumpmap); 2658} 2659 2660/* 2661 * This code maps large physical mmap regions into the 2662 * processor address space. Note that some shortcuts 2663 * are taken, but the code works. 2664 */ 2665void 2666pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 2667 vm_object_t object, vm_pindex_t pindex, 2668 vm_size_t size) 2669{ 2670 vm_page_t p; 2671 2672 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 2673 KASSERT(object->type == OBJT_DEVICE, 2674 ("pmap_object_init_pt: non-device object")); 2675 if (pseflag && 2676 ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) { 2677 int i; 2678 vm_page_t m[1]; 2679 unsigned int ptepindex; 2680 int npdes; 2681 pd_entry_t ptepa; 2682 2683 PMAP_LOCK(pmap); 2684 if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)]) 2685 goto out; 2686 PMAP_UNLOCK(pmap); 2687retry: 2688 p = vm_page_lookup(object, pindex); 2689 if (p != NULL) { 2690 if (vm_page_sleep_if_busy(p, FALSE, "init4p")) 2691 goto retry; 2692 } else { 2693 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL); 2694 if (p == NULL) 2695 return; 2696 m[0] = p; 2697 2698 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) { 2699 vm_page_lock_queues(); 2700 vm_page_free(p); 2701 vm_page_unlock_queues(); 2702 return; 2703 } 2704 2705 p = vm_page_lookup(object, pindex); 2706 vm_page_lock_queues(); 2707 vm_page_wakeup(p); 2708 vm_page_unlock_queues(); 2709 } 2710 2711 ptepa = VM_PAGE_TO_PHYS(p); 2712 if (ptepa & (NBPDR - 1)) 2713 return; 2714 2715 p->valid = VM_PAGE_BITS_ALL; 2716 2717 PMAP_LOCK(pmap); 2718 pmap->pm_stats.resident_count += size >> PAGE_SHIFT; 2719 npdes = size >> PDRSHIFT; 2720 for(i = 0; i < npdes; i++) { 2721 pde_store(&pmap->pm_pdir[ptepindex], 2722 ptepa | PG_U | PG_RW | PG_V | PG_PS); 2723 ptepa += NBPDR; 2724 ptepindex += 1; 2725 } 2726 pmap_invalidate_all(pmap); 2727out: 2728 PMAP_UNLOCK(pmap); 2729 } 2730} 2731 2732/* 2733 * Routine: pmap_change_wiring 2734 * Function: Change the wiring attribute for a map/virtual-address 2735 * pair. 2736 * In/out conditions: 2737 * The mapping must already exist in the pmap. 2738 */ 2739void 2740pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired) 2741{ 2742 pt_entry_t *pte; 2743 2744 PMAP_LOCK(pmap); 2745 pte = pmap_pte(pmap, va); 2746 2747 if (wired && !pmap_pte_w(pte)) 2748 pmap->pm_stats.wired_count++; 2749 else if (!wired && pmap_pte_w(pte)) 2750 pmap->pm_stats.wired_count--; 2751 2752 /* 2753 * Wiring is not a hardware characteristic so there is no need to 2754 * invalidate TLB. 2755 */ 2756 pmap_pte_set_w(pte, wired); 2757 pmap_pte_release(pte); 2758 PMAP_UNLOCK(pmap); 2759} 2760 2761 2762 2763/* 2764 * Copy the range specified by src_addr/len 2765 * from the source map to the range dst_addr/len 2766 * in the destination map. 2767 * 2768 * This routine is only advisory and need not do anything. 2769 */ 2770 2771void 2772pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 2773 vm_offset_t src_addr) 2774{ 2775 vm_page_t free; 2776 vm_offset_t addr; 2777 vm_offset_t end_addr = src_addr + len; 2778 vm_offset_t pdnxt; 2779 2780 if (dst_addr != src_addr) 2781 return; 2782 2783 if (!pmap_is_current(src_pmap)) 2784 return; 2785 2786 vm_page_lock_queues(); 2787 if (dst_pmap < src_pmap) { 2788 PMAP_LOCK(dst_pmap); 2789 PMAP_LOCK(src_pmap); 2790 } else { 2791 PMAP_LOCK(src_pmap); 2792 PMAP_LOCK(dst_pmap); 2793 } 2794 sched_pin(); 2795 for (addr = src_addr; addr < end_addr; addr = pdnxt) { 2796 pt_entry_t *src_pte, *dst_pte; 2797 vm_page_t dstmpte, srcmpte; 2798 pd_entry_t srcptepaddr; 2799 unsigned ptepindex; 2800 2801 if (addr >= UPT_MIN_ADDRESS) 2802 panic("pmap_copy: invalid to pmap_copy page tables"); 2803 2804 pdnxt = (addr + NBPDR) & ~PDRMASK; 2805 ptepindex = addr >> PDRSHIFT; 2806 2807 srcptepaddr = src_pmap->pm_pdir[ptepindex]; 2808 if (srcptepaddr == 0) 2809 continue; 2810 2811 if (srcptepaddr & PG_PS) { 2812 if (dst_pmap->pm_pdir[ptepindex] == 0) { 2813 dst_pmap->pm_pdir[ptepindex] = srcptepaddr & 2814 ~PG_W; 2815 dst_pmap->pm_stats.resident_count += 2816 NBPDR / PAGE_SIZE; 2817 } 2818 continue; 2819 } 2820 2821 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME); 2822 if (srcmpte->wire_count == 0) 2823 panic("pmap_copy: source page table page is unused"); 2824 2825 if (pdnxt > end_addr) 2826 pdnxt = end_addr; 2827 2828 src_pte = vtopte(addr); 2829 while (addr < pdnxt) { 2830 pt_entry_t ptetemp; 2831 ptetemp = *src_pte; 2832 /* 2833 * we only virtual copy managed pages 2834 */ 2835 if ((ptetemp & PG_MANAGED) != 0) { 2836 dstmpte = pmap_allocpte(dst_pmap, addr, 2837 M_NOWAIT); 2838 if (dstmpte == NULL) 2839 break; 2840 dst_pte = pmap_pte_quick(dst_pmap, addr); 2841 if (*dst_pte == 0 && 2842 pmap_try_insert_pv_entry(dst_pmap, addr, 2843 PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) { 2844 /* 2845 * Clear the wired, modified, and 2846 * accessed (referenced) bits 2847 * during the copy. 2848 */ 2849 *dst_pte = ptetemp & ~(PG_W | PG_M | 2850 PG_A); 2851 dst_pmap->pm_stats.resident_count++; 2852 } else { 2853 free = NULL; 2854 if (pmap_unwire_pte_hold( dst_pmap, 2855 dstmpte, &free)) { 2856 pmap_invalidate_page(dst_pmap, 2857 addr); 2858 pmap_free_zero_pages(free); 2859 } 2860 } 2861 if (dstmpte->wire_count >= srcmpte->wire_count) 2862 break; 2863 } 2864 addr += PAGE_SIZE; 2865 src_pte++; 2866 } 2867 } 2868 sched_unpin(); 2869 vm_page_unlock_queues(); 2870 PMAP_UNLOCK(src_pmap); 2871 PMAP_UNLOCK(dst_pmap); 2872} 2873 2874static __inline void 2875pagezero(void *page) 2876{ 2877#if defined(I686_CPU) 2878 if (cpu_class == CPUCLASS_686) { 2879#if defined(CPU_ENABLE_SSE) 2880 if (cpu_feature & CPUID_SSE2) 2881 sse2_pagezero(page); 2882 else 2883#endif 2884 i686_pagezero(page); 2885 } else 2886#endif 2887 bzero(page, PAGE_SIZE); 2888} 2889 2890/* 2891 * pmap_zero_page zeros the specified hardware page by mapping 2892 * the page into KVM and using bzero to clear its contents. 2893 */ 2894void 2895pmap_zero_page(vm_page_t m) 2896{ 2897 struct sysmaps *sysmaps; 2898 2899 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2900 mtx_lock(&sysmaps->lock); 2901 if (*sysmaps->CMAP2) 2902 panic("pmap_zero_page: CMAP2 busy"); 2903 sched_pin(); 2904 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2905 invlcaddr(sysmaps->CADDR2); 2906 pagezero(sysmaps->CADDR2); 2907 *sysmaps->CMAP2 = 0; 2908 sched_unpin(); 2909 mtx_unlock(&sysmaps->lock); 2910} 2911 2912/* 2913 * pmap_zero_page_area zeros the specified hardware page by mapping 2914 * the page into KVM and using bzero to clear its contents. 2915 * 2916 * off and size may not cover an area beyond a single hardware page. 2917 */ 2918void 2919pmap_zero_page_area(vm_page_t m, int off, int size) 2920{ 2921 struct sysmaps *sysmaps; 2922 2923 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2924 mtx_lock(&sysmaps->lock); 2925 if (*sysmaps->CMAP2) 2926 panic("pmap_zero_page: CMAP2 busy"); 2927 sched_pin(); 2928 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2929 invlcaddr(sysmaps->CADDR2); 2930 if (off == 0 && size == PAGE_SIZE) 2931 pagezero(sysmaps->CADDR2); 2932 else 2933 bzero((char *)sysmaps->CADDR2 + off, size); 2934 *sysmaps->CMAP2 = 0; 2935 sched_unpin(); 2936 mtx_unlock(&sysmaps->lock); 2937} 2938 2939/* 2940 * pmap_zero_page_idle zeros the specified hardware page by mapping 2941 * the page into KVM and using bzero to clear its contents. This 2942 * is intended to be called from the vm_pagezero process only and 2943 * outside of Giant. 2944 */ 2945void 2946pmap_zero_page_idle(vm_page_t m) 2947{ 2948 2949 if (*CMAP3) 2950 panic("pmap_zero_page: CMAP3 busy"); 2951 sched_pin(); 2952 *CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2953 invlcaddr(CADDR3); 2954 pagezero(CADDR3); 2955 *CMAP3 = 0; 2956 sched_unpin(); 2957} 2958 2959/* 2960 * pmap_copy_page copies the specified (machine independent) 2961 * page by mapping the page into virtual memory and using 2962 * bcopy to copy the page, one machine dependent page at a 2963 * time. 2964 */ 2965void 2966pmap_copy_page(vm_page_t src, vm_page_t dst) 2967{ 2968 struct sysmaps *sysmaps; 2969 2970 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2971 mtx_lock(&sysmaps->lock); 2972 if (*sysmaps->CMAP1) 2973 panic("pmap_copy_page: CMAP1 busy"); 2974 if (*sysmaps->CMAP2) 2975 panic("pmap_copy_page: CMAP2 busy"); 2976 sched_pin(); 2977 invlpg((u_int)sysmaps->CADDR1); 2978 invlpg((u_int)sysmaps->CADDR2); 2979 *sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A; 2980 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M; 2981 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); 2982 *sysmaps->CMAP1 = 0; 2983 *sysmaps->CMAP2 = 0; 2984 sched_unpin(); 2985 mtx_unlock(&sysmaps->lock); 2986} 2987 2988/* 2989 * Returns true if the pmap's pv is one of the first 2990 * 16 pvs linked to from this page. This count may 2991 * be changed upwards or downwards in the future; it 2992 * is only necessary that true be returned for a small 2993 * subset of pmaps for proper page aging. 2994 */ 2995boolean_t 2996pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 2997{ 2998 pv_entry_t pv; 2999 int loops = 0; 3000 3001 if (m->flags & PG_FICTITIOUS) 3002 return FALSE; 3003 3004 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3005 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3006 if (PV_PMAP(pv) == pmap) { 3007 return TRUE; 3008 } 3009 loops++; 3010 if (loops >= 16) 3011 break; 3012 } 3013 return (FALSE); 3014} 3015 3016/* 3017 * Remove all pages from specified address space 3018 * this aids process exit speeds. Also, this code 3019 * is special cased for current process only, but 3020 * can have the more generic (and slightly slower) 3021 * mode enabled. This is much faster than pmap_remove 3022 * in the case of running down an entire address space. 3023 */ 3024void 3025pmap_remove_pages(pmap_t pmap) 3026{ 3027 pt_entry_t *pte, tpte; 3028 vm_page_t m, free = NULL; 3029 pv_entry_t pv; 3030 struct pv_chunk *pc, *npc; 3031 int field, idx; 3032 int32_t bit; 3033 uint32_t inuse, bitmask; 3034 int allfree; 3035 3036 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { 3037 printf("warning: pmap_remove_pages called with non-current pmap\n"); 3038 return; 3039 } 3040 vm_page_lock_queues(); 3041 PMAP_LOCK(pmap); 3042 sched_pin(); 3043 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) { 3044 allfree = 1; 3045 for (field = 0; field < _NPCM; field++) { 3046 inuse = (~(pc->pc_map[field])) & pc_freemask[field]; 3047 while (inuse != 0) { 3048 bit = bsfl(inuse); 3049 bitmask = 1UL << bit; 3050 idx = field * 32 + bit; 3051 pv = &pc->pc_pventry[idx]; 3052 inuse &= ~bitmask; 3053 3054 pte = vtopte(pv->pv_va); 3055 tpte = *pte; 3056 3057 if (tpte == 0) { 3058 printf( 3059 "TPTE at %p IS ZERO @ VA %08x\n", 3060 pte, pv->pv_va); 3061 panic("bad pte"); 3062 } 3063 3064/* 3065 * We cannot remove wired pages from a process' mapping at this time 3066 */ 3067 if (tpte & PG_W) { 3068 allfree = 0; 3069 continue; 3070 } 3071 3072 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME); 3073 KASSERT(m->phys_addr == (tpte & PG_FRAME), 3074 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 3075 m, (uintmax_t)m->phys_addr, 3076 (uintmax_t)tpte)); 3077 3078 KASSERT(m < &vm_page_array[vm_page_array_size], 3079 ("pmap_remove_pages: bad tpte %#jx", 3080 (uintmax_t)tpte)); 3081 3082 pmap->pm_stats.resident_count--; 3083 3084 pte_clear(pte); 3085 3086 /* 3087 * Update the vm_page_t clean/reference bits. 3088 */ 3089 if (tpte & PG_M) 3090 vm_page_dirty(m); 3091 3092 /* Mark free */ 3093 PV_STAT(pv_entry_frees++); 3094 PV_STAT(pv_entry_spare++); 3095 pv_entry_count--; 3096 pc->pc_map[field] |= bitmask; 3097 m->md.pv_list_count--; 3098 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3099 if (TAILQ_EMPTY(&m->md.pv_list)) 3100 vm_page_flag_clear(m, PG_WRITEABLE); 3101 3102 pmap_unuse_pt(pmap, pv->pv_va, &free); 3103 } 3104 } 3105 if (allfree) { 3106 PV_STAT(pv_entry_spare -= _NPCPV); 3107 PV_STAT(pc_chunk_count--); 3108 PV_STAT(pc_chunk_frees++); 3109 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 3110 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 3111 pmap_qremove((vm_offset_t)pc, 1); 3112 vm_page_unwire(m, 0); 3113 vm_page_free(m); 3114 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 3115 } 3116 } 3117 sched_unpin(); 3118 pmap_invalidate_all(pmap); 3119 vm_page_unlock_queues(); 3120 PMAP_UNLOCK(pmap); 3121 pmap_free_zero_pages(free); 3122} 3123 3124/* 3125 * pmap_is_modified: 3126 * 3127 * Return whether or not the specified physical page was modified 3128 * in any physical maps. 3129 */ 3130boolean_t 3131pmap_is_modified(vm_page_t m) 3132{ 3133 pv_entry_t pv; 3134 pt_entry_t *pte; 3135 pmap_t pmap; 3136 boolean_t rv; 3137 3138 rv = FALSE; 3139 if (m->flags & PG_FICTITIOUS) 3140 return (rv); 3141 3142 sched_pin(); 3143 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3144 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3145 pmap = PV_PMAP(pv); 3146 PMAP_LOCK(pmap); 3147 pte = pmap_pte_quick(pmap, pv->pv_va); 3148 rv = (*pte & PG_M) != 0; 3149 PMAP_UNLOCK(pmap); 3150 if (rv) 3151 break; 3152 } 3153 sched_unpin(); 3154 return (rv); 3155} 3156 3157/* 3158 * pmap_is_prefaultable: 3159 * 3160 * Return whether or not the specified virtual address is elgible 3161 * for prefault. 3162 */ 3163boolean_t 3164pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 3165{ 3166 pt_entry_t *pte; 3167 boolean_t rv; 3168 3169 rv = FALSE; 3170 PMAP_LOCK(pmap); 3171 if (*pmap_pde(pmap, addr)) { 3172 pte = vtopte(addr); 3173 rv = *pte == 0; 3174 } 3175 PMAP_UNLOCK(pmap); 3176 return (rv); 3177} 3178 3179/* 3180 * Clear the write and modified bits in each of the given page's mappings. 3181 */ 3182void 3183pmap_remove_write(vm_page_t m) 3184{ 3185 pv_entry_t pv; 3186 pmap_t pmap; 3187 pt_entry_t oldpte, *pte; 3188 3189 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3190 if ((m->flags & PG_FICTITIOUS) != 0 || 3191 (m->flags & PG_WRITEABLE) == 0) 3192 return; 3193 sched_pin(); 3194 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3195 pmap = PV_PMAP(pv); 3196 PMAP_LOCK(pmap); 3197 pte = pmap_pte_quick(pmap, pv->pv_va); 3198retry: 3199 oldpte = *pte; 3200 if ((oldpte & PG_RW) != 0) { 3201 /* 3202 * Regardless of whether a pte is 32 or 64 bits 3203 * in size, PG_RW and PG_M are among the least 3204 * significant 32 bits. 3205 */ 3206 if (!atomic_cmpset_int((u_int *)pte, oldpte, 3207 oldpte & ~(PG_RW | PG_M))) 3208 goto retry; 3209 if ((oldpte & PG_M) != 0) 3210 vm_page_dirty(m); 3211 pmap_invalidate_page(pmap, pv->pv_va); 3212 } 3213 PMAP_UNLOCK(pmap); 3214 } 3215 vm_page_flag_clear(m, PG_WRITEABLE); 3216 sched_unpin(); 3217} 3218 3219/* 3220 * pmap_ts_referenced: 3221 * 3222 * Return a count of reference bits for a page, clearing those bits. 3223 * It is not necessary for every reference bit to be cleared, but it 3224 * is necessary that 0 only be returned when there are truly no 3225 * reference bits set. 3226 * 3227 * XXX: The exact number of bits to check and clear is a matter that 3228 * should be tested and standardized at some point in the future for 3229 * optimal aging of shared pages. 3230 */ 3231int 3232pmap_ts_referenced(vm_page_t m) 3233{ 3234 pv_entry_t pv, pvf, pvn; 3235 pmap_t pmap; 3236 pt_entry_t *pte; 3237 int rtval = 0; 3238 3239 if (m->flags & PG_FICTITIOUS) 3240 return (rtval); 3241 sched_pin(); 3242 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3243 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 3244 pvf = pv; 3245 do { 3246 pvn = TAILQ_NEXT(pv, pv_list); 3247 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3248 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 3249 pmap = PV_PMAP(pv); 3250 PMAP_LOCK(pmap); 3251 pte = pmap_pte_quick(pmap, pv->pv_va); 3252 if ((*pte & PG_A) != 0) { 3253 atomic_clear_int((u_int *)pte, PG_A); 3254 pmap_invalidate_page(pmap, pv->pv_va); 3255 rtval++; 3256 if (rtval > 4) 3257 pvn = NULL; 3258 } 3259 PMAP_UNLOCK(pmap); 3260 } while ((pv = pvn) != NULL && pv != pvf); 3261 } 3262 sched_unpin(); 3263 return (rtval); 3264} 3265 3266/* 3267 * Clear the modify bits on the specified physical page. 3268 */ 3269void 3270pmap_clear_modify(vm_page_t m) 3271{ 3272 pv_entry_t pv; 3273 pmap_t pmap; 3274 pt_entry_t *pte; 3275 3276 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3277 if ((m->flags & PG_FICTITIOUS) != 0) 3278 return; 3279 sched_pin(); 3280 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3281 pmap = PV_PMAP(pv); 3282 PMAP_LOCK(pmap); 3283 pte = pmap_pte_quick(pmap, pv->pv_va); 3284 if ((*pte & PG_M) != 0) { 3285 /* 3286 * Regardless of whether a pte is 32 or 64 bits 3287 * in size, PG_M is among the least significant 3288 * 32 bits. 3289 */ 3290 atomic_clear_int((u_int *)pte, PG_M); 3291 pmap_invalidate_page(pmap, pv->pv_va); 3292 } 3293 PMAP_UNLOCK(pmap); 3294 } 3295 sched_unpin(); 3296} 3297 3298/* 3299 * pmap_clear_reference: 3300 * 3301 * Clear the reference bit on the specified physical page. 3302 */ 3303void 3304pmap_clear_reference(vm_page_t m) 3305{ 3306 pv_entry_t pv; 3307 pmap_t pmap; 3308 pt_entry_t *pte; 3309 3310 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3311 if ((m->flags & PG_FICTITIOUS) != 0) 3312 return; 3313 sched_pin(); 3314 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3315 pmap = PV_PMAP(pv); 3316 PMAP_LOCK(pmap); 3317 pte = pmap_pte_quick(pmap, pv->pv_va); 3318 if ((*pte & PG_A) != 0) { 3319 /* 3320 * Regardless of whether a pte is 32 or 64 bits 3321 * in size, PG_A is among the least significant 3322 * 32 bits. 3323 */ 3324 atomic_clear_int((u_int *)pte, PG_A); 3325 pmap_invalidate_page(pmap, pv->pv_va); 3326 } 3327 PMAP_UNLOCK(pmap); 3328 } 3329 sched_unpin(); 3330} 3331 3332/* 3333 * Miscellaneous support routines follow 3334 */ 3335 3336/* 3337 * Map a set of physical memory pages into the kernel virtual 3338 * address space. Return a pointer to where it is mapped. This 3339 * routine is intended to be used for mapping device memory, 3340 * NOT real memory. 3341 */ 3342void * 3343pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode) 3344{ 3345 vm_offset_t va, tmpva, offset; 3346 3347 offset = pa & PAGE_MASK; 3348 size = roundup(offset + size, PAGE_SIZE); 3349 pa = pa & PG_FRAME; 3350 3351 if (pa < KERNLOAD && pa + size <= KERNLOAD) 3352 va = KERNBASE + pa; 3353 else 3354 va = kmem_alloc_nofault(kernel_map, size); 3355 if (!va) 3356 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 3357 3358 for (tmpva = va; size > 0; ) { 3359 pmap_kenter_attr(tmpva, pa, mode); 3360 size -= PAGE_SIZE; 3361 tmpva += PAGE_SIZE; 3362 pa += PAGE_SIZE; 3363 } 3364 pmap_invalidate_range(kernel_pmap, va, tmpva); 3365 pmap_invalidate_cache(); 3366 return ((void *)(va + offset)); 3367} 3368 3369void * 3370pmap_mapdev(vm_paddr_t pa, vm_size_t size) 3371{ 3372 3373 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE)); 3374} 3375 3376void * 3377pmap_mapbios(vm_paddr_t pa, vm_size_t size) 3378{ 3379 3380 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK)); 3381} 3382 3383void 3384pmap_unmapdev(vm_offset_t va, vm_size_t size) 3385{ 3386 vm_offset_t base, offset, tmpva; 3387 3388 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD) 3389 return; 3390 base = trunc_page(va); 3391 offset = va & PAGE_MASK; 3392 size = roundup(offset + size, PAGE_SIZE); 3393 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 3394 pmap_kremove(tmpva); 3395 pmap_invalidate_range(kernel_pmap, va, tmpva); 3396 kmem_free(kernel_map, base, size); 3397} 3398 3399int 3400pmap_change_attr(va, size, mode) 3401 vm_offset_t va; 3402 vm_size_t size; 3403 int mode; 3404{ 3405 vm_offset_t base, offset, tmpva; 3406 pt_entry_t *pte; 3407 u_int opte, npte; 3408 pd_entry_t *pde; 3409 3410 base = trunc_page(va); 3411 offset = va & PAGE_MASK; 3412 size = roundup(offset + size, PAGE_SIZE); 3413 3414 /* Only supported on kernel virtual addresses. */ 3415 if (base <= VM_MAXUSER_ADDRESS) 3416 return (EINVAL); 3417 3418 /* 4MB pages and pages that aren't mapped aren't supported. */ 3419 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) { 3420 pde = pmap_pde(kernel_pmap, tmpva); 3421 if (*pde & PG_PS) 3422 return (EINVAL); 3423 if (*pde == 0) 3424 return (EINVAL); 3425 pte = vtopte(va); 3426 if (*pte == 0) 3427 return (EINVAL); 3428 } 3429 3430 /* 3431 * Ok, all the pages exist and are 4k, so run through them updating 3432 * their cache mode. 3433 */ 3434 for (tmpva = base; size > 0; ) { 3435 pte = vtopte(tmpva); 3436 3437 /* 3438 * The cache mode bits are all in the low 32-bits of the 3439 * PTE, so we can just spin on updating the low 32-bits. 3440 */ 3441 do { 3442 opte = *(u_int *)pte; 3443 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT); 3444 npte |= pmap_cache_bits(mode, 0); 3445 } while (npte != opte && 3446 !atomic_cmpset_int((u_int *)pte, opte, npte)); 3447 tmpva += PAGE_SIZE; 3448 size -= PAGE_SIZE; 3449 } 3450 3451 /* 3452 * Flush CPU caches to make sure any data isn't cached that shouldn't 3453 * be, etc. 3454 */ 3455 pmap_invalidate_range(kernel_pmap, base, tmpva); 3456 pmap_invalidate_cache(); 3457 return (0); 3458} 3459 3460/* 3461 * perform the pmap work for mincore 3462 */ 3463int 3464pmap_mincore(pmap_t pmap, vm_offset_t addr) 3465{ 3466 pt_entry_t *ptep, pte; 3467 vm_page_t m; 3468 int val = 0; 3469 3470 PMAP_LOCK(pmap); 3471 ptep = pmap_pte(pmap, addr); 3472 pte = (ptep != NULL) ? *ptep : 0; 3473 pmap_pte_release(ptep); 3474 PMAP_UNLOCK(pmap); 3475 3476 if (pte != 0) { 3477 vm_paddr_t pa; 3478 3479 val = MINCORE_INCORE; 3480 if ((pte & PG_MANAGED) == 0) 3481 return val; 3482 3483 pa = pte & PG_FRAME; 3484 3485 m = PHYS_TO_VM_PAGE(pa); 3486 3487 /* 3488 * Modified by us 3489 */ 3490 if (pte & PG_M) 3491 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 3492 else { 3493 /* 3494 * Modified by someone else 3495 */ 3496 vm_page_lock_queues(); 3497 if (m->dirty || pmap_is_modified(m)) 3498 val |= MINCORE_MODIFIED_OTHER; 3499 vm_page_unlock_queues(); 3500 } 3501 /* 3502 * Referenced by us 3503 */ 3504 if (pte & PG_A) 3505 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 3506 else { 3507 /* 3508 * Referenced by someone else 3509 */ 3510 vm_page_lock_queues(); 3511 if ((m->flags & PG_REFERENCED) || 3512 pmap_ts_referenced(m)) { 3513 val |= MINCORE_REFERENCED_OTHER; 3514 vm_page_flag_set(m, PG_REFERENCED); 3515 } 3516 vm_page_unlock_queues(); 3517 } 3518 } 3519 return val; 3520} 3521 3522void 3523pmap_activate(struct thread *td) 3524{ 3525 pmap_t pmap, oldpmap; 3526 u_int32_t cr3; 3527 3528 critical_enter(); 3529 pmap = vmspace_pmap(td->td_proc->p_vmspace); 3530 oldpmap = PCPU_GET(curpmap); 3531#if defined(SMP) 3532 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 3533 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 3534#else 3535 oldpmap->pm_active &= ~1; 3536 pmap->pm_active |= 1; 3537#endif 3538#ifdef PAE 3539 cr3 = vtophys(pmap->pm_pdpt); 3540#else 3541 cr3 = vtophys(pmap->pm_pdir); 3542#endif 3543 /* 3544 * pmap_activate is for the current thread on the current cpu 3545 */ 3546 td->td_pcb->pcb_cr3 = cr3; 3547 load_cr3(cr3); 3548 PCPU_SET(curpmap, pmap); 3549 critical_exit(); 3550} 3551 3552vm_offset_t 3553pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size) 3554{ 3555 3556 if ((obj == NULL) || (size < NBPDR) || (obj->type != OBJT_DEVICE)) { 3557 return addr; 3558 } 3559 3560 addr = (addr + PDRMASK) & ~PDRMASK; 3561 return addr; 3562} 3563 3564 3565#if defined(PMAP_DEBUG) 3566pmap_pid_dump(int pid) 3567{ 3568 pmap_t pmap; 3569 struct proc *p; 3570 int npte = 0; 3571 int index; 3572 3573 sx_slock(&allproc_lock); 3574 FOREACH_PROC_IN_SYSTEM(p) { 3575 if (p->p_pid != pid) 3576 continue; 3577 3578 if (p->p_vmspace) { 3579 int i,j; 3580 index = 0; 3581 pmap = vmspace_pmap(p->p_vmspace); 3582 for (i = 0; i < NPDEPTD; i++) { 3583 pd_entry_t *pde; 3584 pt_entry_t *pte; 3585 vm_offset_t base = i << PDRSHIFT; 3586 3587 pde = &pmap->pm_pdir[i]; 3588 if (pde && pmap_pde_v(pde)) { 3589 for (j = 0; j < NPTEPG; j++) { 3590 vm_offset_t va = base + (j << PAGE_SHIFT); 3591 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 3592 if (index) { 3593 index = 0; 3594 printf("\n"); 3595 } 3596 sx_sunlock(&allproc_lock); 3597 return npte; 3598 } 3599 pte = pmap_pte(pmap, va); 3600 if (pte && pmap_pte_v(pte)) { 3601 pt_entry_t pa; 3602 vm_page_t m; 3603 pa = *pte; 3604 m = PHYS_TO_VM_PAGE(pa & PG_FRAME); 3605 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 3606 va, pa, m->hold_count, m->wire_count, m->flags); 3607 npte++; 3608 index++; 3609 if (index >= 2) { 3610 index = 0; 3611 printf("\n"); 3612 } else { 3613 printf(" "); 3614 } 3615 } 3616 } 3617 } 3618 } 3619 } 3620 } 3621 sx_sunlock(&allproc_lock); 3622 return npte; 3623} 3624#endif 3625 3626#if defined(DEBUG) 3627 3628static void pads(pmap_t pm); 3629void pmap_pvdump(vm_offset_t pa); 3630 3631/* print address space of pmap*/ 3632static void 3633pads(pmap_t pm) 3634{ 3635 int i, j; 3636 vm_paddr_t va; 3637 pt_entry_t *ptep; 3638 3639 if (pm == kernel_pmap) 3640 return; 3641 for (i = 0; i < NPDEPTD; i++) 3642 if (pm->pm_pdir[i]) 3643 for (j = 0; j < NPTEPG; j++) { 3644 va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 3645 if (pm == kernel_pmap && va < KERNBASE) 3646 continue; 3647 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 3648 continue; 3649 ptep = pmap_pte(pm, va); 3650 if (pmap_pte_v(ptep)) 3651 printf("%x:%x ", va, *ptep); 3652 }; 3653 3654} 3655 3656void 3657pmap_pvdump(vm_paddr_t pa) 3658{ 3659 pv_entry_t pv; 3660 pmap_t pmap; 3661 vm_page_t m; 3662 3663 printf("pa %x", pa); 3664 m = PHYS_TO_VM_PAGE(pa); 3665 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3666 pmap = PV_PMAP(pv); 3667 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va); 3668 pads(pmap); 3669 } 3670 printf(" "); 3671} 3672#endif 3673