pmap.c revision 167578
1/*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * Copyright (c) 1994 John S. Dyson 5 * All rights reserved. 6 * Copyright (c) 1994 David Greenman 7 * All rights reserved. 8 * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu> 9 * All rights reserved. 10 * 11 * This code is derived from software contributed to Berkeley by 12 * the Systems Programming Group of the University of Utah Computer 13 * Science Department and William Jolitz of UUNET Technologies Inc. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the University of 26 * California, Berkeley and its contributors. 27 * 4. Neither the name of the University nor the names of its contributors 28 * may be used to endorse or promote products derived from this software 29 * without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41 * SUCH DAMAGE. 42 * 43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 44 */ 45/*- 46 * Copyright (c) 2003 Networks Associates Technology, Inc. 47 * All rights reserved. 48 * 49 * This software was developed for the FreeBSD Project by Jake Burkholder, 50 * Safeport Network Services, and Network Associates Laboratories, the 51 * Security Research Division of Network Associates, Inc. under 52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 53 * CHATS research program. 54 * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 1. Redistributions of source code must retain the above copyright 59 * notice, this list of conditions and the following disclaimer. 60 * 2. Redistributions in binary form must reproduce the above copyright 61 * notice, this list of conditions and the following disclaimer in the 62 * documentation and/or other materials provided with the distribution. 63 * 64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 74 * SUCH DAMAGE. 75 */ 76 77#include <sys/cdefs.h> 78__FBSDID("$FreeBSD: head/sys/i386/i386/pmap.c 167578 2007-03-14 22:30:02Z njl $"); 79 80/* 81 * Manages physical address maps. 82 * 83 * In addition to hardware address maps, this 84 * module is called upon to provide software-use-only 85 * maps which may or may not be stored in the same 86 * form as hardware maps. These pseudo-maps are 87 * used to store intermediate results from copy 88 * operations to and from address spaces. 89 * 90 * Since the information managed by this module is 91 * also stored by the logical address mapping module, 92 * this module may throw away valid virtual-to-physical 93 * mappings at almost any time. However, invalidations 94 * of virtual-to-physical mappings must be done as 95 * requested. 96 * 97 * In order to cope with hardware architectures which 98 * make virtual-to-physical map invalidates expensive, 99 * this module may delay invalidate or reduced protection 100 * operations until such time as they are actually 101 * necessary. This module is given full information as 102 * to which processors are currently using which maps, 103 * and to when physical maps must be made correct. 104 */ 105 106#include "opt_cpu.h" 107#include "opt_pmap.h" 108#include "opt_msgbuf.h" 109#include "opt_smp.h" 110#include "opt_xbox.h" 111 112#include <sys/param.h> 113#include <sys/systm.h> 114#include <sys/kernel.h> 115#include <sys/lock.h> 116#include <sys/malloc.h> 117#include <sys/mman.h> 118#include <sys/msgbuf.h> 119#include <sys/mutex.h> 120#include <sys/proc.h> 121#include <sys/sx.h> 122#include <sys/vmmeter.h> 123#include <sys/sched.h> 124#include <sys/sysctl.h> 125#ifdef SMP 126#include <sys/smp.h> 127#endif 128 129#include <vm/vm.h> 130#include <vm/vm_param.h> 131#include <vm/vm_kern.h> 132#include <vm/vm_page.h> 133#include <vm/vm_map.h> 134#include <vm/vm_object.h> 135#include <vm/vm_extern.h> 136#include <vm/vm_pageout.h> 137#include <vm/vm_pager.h> 138#include <vm/uma.h> 139 140#include <machine/cpu.h> 141#include <machine/cputypes.h> 142#include <machine/md_var.h> 143#include <machine/pcb.h> 144#include <machine/specialreg.h> 145#ifdef SMP 146#include <machine/smp.h> 147#endif 148 149#ifdef XBOX 150#include <machine/xbox.h> 151#endif 152 153#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 154#define CPU_ENABLE_SSE 155#endif 156 157#ifndef PMAP_SHPGPERPROC 158#define PMAP_SHPGPERPROC 200 159#endif 160 161#if defined(DIAGNOSTIC) 162#define PMAP_DIAGNOSTIC 163#endif 164 165#if !defined(PMAP_DIAGNOSTIC) 166#define PMAP_INLINE __inline 167#else 168#define PMAP_INLINE 169#endif 170 171#define PV_STATS 172#ifdef PV_STATS 173#define PV_STAT(x) do { x ; } while (0) 174#else 175#define PV_STAT(x) do { } while (0) 176#endif 177 178/* 179 * Get PDEs and PTEs for user/kernel address space 180 */ 181#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 182#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 183 184#define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 185#define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 186#define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 187#define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 188#define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 189 190#define pmap_pte_set_w(pte, v) ((v) ? atomic_set_int((u_int *)(pte), PG_W) : \ 191 atomic_clear_int((u_int *)(pte), PG_W)) 192#define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 193 194struct pmap kernel_pmap_store; 195LIST_HEAD(pmaplist, pmap); 196static struct pmaplist allpmaps; 197static struct mtx allpmaps_lock; 198 199vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 200vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 201int pgeflag = 0; /* PG_G or-in */ 202int pseflag = 0; /* PG_PS or-in */ 203 204static int nkpt; 205vm_offset_t kernel_vm_end; 206extern u_int32_t KERNend; 207 208#ifdef PAE 209static uma_zone_t pdptzone; 210#endif 211 212/* 213 * Data for the pv entry allocation mechanism 214 */ 215static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 216static int shpgperproc = PMAP_SHPGPERPROC; 217 218struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */ 219int pv_maxchunks; /* How many chunks we have KVA for */ 220vm_offset_t pv_vafree; /* freelist stored in the PTE */ 221 222/* 223 * All those kernel PT submaps that BSD is so fond of 224 */ 225struct sysmaps { 226 struct mtx lock; 227 pt_entry_t *CMAP1; 228 pt_entry_t *CMAP2; 229 caddr_t CADDR1; 230 caddr_t CADDR2; 231}; 232static struct sysmaps sysmaps_pcpu[MAXCPU]; 233pt_entry_t *CMAP1 = 0; 234static pt_entry_t *CMAP3; 235caddr_t CADDR1 = 0, ptvmmap = 0; 236static caddr_t CADDR3; 237struct msgbuf *msgbufp = 0; 238 239/* 240 * Crashdump maps. 241 */ 242static caddr_t crashdumpmap; 243 244#ifdef SMP 245extern pt_entry_t *SMPpt; 246#endif 247static pt_entry_t *PMAP1 = 0, *PMAP2; 248static pt_entry_t *PADDR1 = 0, *PADDR2; 249#ifdef SMP 250static int PMAP1cpu; 251static int PMAP1changedcpu; 252SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD, 253 &PMAP1changedcpu, 0, 254 "Number of times pmap_pte_quick changed CPU with same PMAP1"); 255#endif 256static int PMAP1changed; 257SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD, 258 &PMAP1changed, 0, 259 "Number of times pmap_pte_quick changed PMAP1"); 260static int PMAP1unchanged; 261SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD, 262 &PMAP1unchanged, 0, 263 "Number of times pmap_pte_quick didn't change PMAP1"); 264static struct mtx PMAP2mutex; 265 266static void free_pv_entry(pmap_t pmap, pv_entry_t pv); 267static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try); 268 269static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, 270 vm_page_t m, vm_prot_t prot, vm_page_t mpte); 271static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva); 272static void pmap_remove_page(struct pmap *pmap, vm_offset_t va); 273static void pmap_remove_entry(struct pmap *pmap, vm_page_t m, 274 vm_offset_t va); 275static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m); 276static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, 277 vm_page_t m); 278 279static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags); 280 281static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags); 282static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m); 283static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va); 284static void pmap_pte_release(pt_entry_t *pte); 285static int pmap_unuse_pt(pmap_t, vm_offset_t); 286static vm_offset_t pmap_kmem_choose(vm_offset_t addr); 287#ifdef PAE 288static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 289#endif 290 291CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 292CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 293 294/* 295 * Move the kernel virtual free pointer to the next 296 * 4MB. This is used to help improve performance 297 * by using a large (4MB) page for much of the kernel 298 * (.text, .data, .bss) 299 */ 300static vm_offset_t 301pmap_kmem_choose(vm_offset_t addr) 302{ 303 vm_offset_t newaddr = addr; 304 305#ifndef DISABLE_PSE 306 if (cpu_feature & CPUID_PSE) 307 newaddr = (addr + PDRMASK) & ~PDRMASK; 308#endif 309 return newaddr; 310} 311 312/* 313 * Bootstrap the system enough to run with virtual memory. 314 * 315 * On the i386 this is called after mapping has already been enabled 316 * and just syncs the pmap module with what has already been done. 317 * [We can't call it easily with mapping off since the kernel is not 318 * mapped with PA == VA, hence we would have to relocate every address 319 * from the linked base (virtual) address "KERNBASE" to the actual 320 * (physical) address starting relative to 0] 321 */ 322void 323pmap_bootstrap(vm_paddr_t firstaddr, vm_paddr_t loadaddr) 324{ 325 vm_offset_t va; 326 pt_entry_t *pte, *unused; 327 struct sysmaps *sysmaps; 328 int i; 329 330 /* 331 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 332 * large. It should instead be correctly calculated in locore.s and 333 * not based on 'first' (which is a physical address, not a virtual 334 * address, for the start of unused physical memory). The kernel 335 * page tables are NOT double mapped and thus should not be included 336 * in this calculation. 337 */ 338 virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 339 virtual_avail = pmap_kmem_choose(virtual_avail); 340 341 virtual_end = VM_MAX_KERNEL_ADDRESS; 342 343 /* 344 * Initialize the kernel pmap (which is statically allocated). 345 */ 346 PMAP_LOCK_INIT(kernel_pmap); 347 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 348#ifdef PAE 349 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 350#endif 351 kernel_pmap->pm_active = -1; /* don't allow deactivation */ 352 TAILQ_INIT(&kernel_pmap->pm_pvchunk); 353 LIST_INIT(&allpmaps); 354 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 355 mtx_lock_spin(&allpmaps_lock); 356 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 357 mtx_unlock_spin(&allpmaps_lock); 358 nkpt = NKPT; 359 360 /* 361 * Reserve some special page table entries/VA space for temporary 362 * mapping of pages. 363 */ 364#define SYSMAP(c, p, v, n) \ 365 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 366 367 va = virtual_avail; 368 pte = vtopte(va); 369 370 /* 371 * CMAP1/CMAP2 are used for zeroing and copying pages. 372 * CMAP3 is used for the idle process page zeroing. 373 */ 374 for (i = 0; i < MAXCPU; i++) { 375 sysmaps = &sysmaps_pcpu[i]; 376 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF); 377 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1) 378 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1) 379 } 380 SYSMAP(caddr_t, CMAP1, CADDR1, 1) 381 SYSMAP(caddr_t, CMAP3, CADDR3, 1) 382 *CMAP3 = 0; 383 384 /* 385 * Crashdump maps. 386 */ 387 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS) 388 389 /* 390 * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 391 */ 392 SYSMAP(caddr_t, unused, ptvmmap, 1) 393 394 /* 395 * msgbufp is used to map the system message buffer. 396 */ 397 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE))) 398 399 /* 400 * ptemap is used for pmap_pte_quick 401 */ 402 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 403 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1); 404 405 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF); 406 407 virtual_avail = va; 408 409 *CMAP1 = 0; 410 411#ifdef XBOX 412 /* FIXME: This is gross, but needed for the XBOX. Since we are in such 413 * an early stadium, we cannot yet neatly map video memory ... :-( 414 * Better fixes are very welcome! */ 415 if (!arch_i386_is_xbox) 416#endif 417 for (i = 0; i < NKPT; i++) 418 PTD[i] = 0; 419 420 /* Initialize the PAT MSR if present. */ 421 pmap_init_pat(); 422 423 /* Turn on PG_G on kernel page(s) */ 424 pmap_set_pg(); 425 426 /* 427 * Create an identity mapping (virt == phys) for the low 1 MB 428 * physical memory region that is used by the ACPI wakeup code. 429 * This mapping must not have PG_G set. 430 */ 431 kernel_pmap->pm_pdir[0] = PG_PS | PG_RW | PG_V; 432} 433 434/* 435 * Setup the PAT MSR. 436 */ 437void 438pmap_init_pat(void) 439{ 440 uint64_t pat_msr; 441 442 /* Bail if this CPU doesn't implement PAT. */ 443 if (!(cpu_feature & CPUID_PAT)) 444 return; 445 446#ifdef PAT_WORKS 447 /* 448 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-. 449 * Program 4 and 5 as WP and WC. 450 * Leave 6 and 7 as UC and UC-. 451 */ 452 pat_msr = rdmsr(MSR_PAT); 453 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5)); 454 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) | 455 PAT_VALUE(5, PAT_WRITE_COMBINING); 456#else 457 /* 458 * Due to some Intel errata, we can only safely use the lower 4 459 * PAT entries. Thus, just replace PAT Index 2 with WC instead 460 * of UC-. 461 * 462 * Intel Pentium III Processor Specification Update 463 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B 464 * or Mode C Paging) 465 * 466 * Intel Pentium IV Processor Specification Update 467 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly) 468 */ 469 pat_msr = rdmsr(MSR_PAT); 470 pat_msr &= ~PAT_MASK(2); 471 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING); 472#endif 473 wrmsr(MSR_PAT, pat_msr); 474} 475 476/* 477 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on. 478 */ 479void 480pmap_set_pg(void) 481{ 482 pd_entry_t pdir; 483 pt_entry_t *pte; 484 vm_offset_t va, endva; 485 int i; 486 487 if (pgeflag == 0) 488 return; 489 490 i = KERNLOAD/NBPDR; 491 endva = KERNBASE + KERNend; 492 493 if (pseflag) { 494 va = KERNBASE + KERNLOAD; 495 while (va < endva) { 496 pdir = kernel_pmap->pm_pdir[KPTDI+i]; 497 pdir |= pgeflag; 498 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir; 499 invltlb(); /* Play it safe, invltlb() every time */ 500 i++; 501 va += NBPDR; 502 } 503 } else { 504 va = (vm_offset_t)btext; 505 while (va < endva) { 506 pte = vtopte(va); 507 if (*pte) 508 *pte |= pgeflag; 509 invltlb(); /* Play it safe, invltlb() every time */ 510 va += PAGE_SIZE; 511 } 512 } 513} 514 515/* 516 * Initialize a vm_page's machine-dependent fields. 517 */ 518void 519pmap_page_init(vm_page_t m) 520{ 521 522 TAILQ_INIT(&m->md.pv_list); 523 m->md.pv_list_count = 0; 524} 525 526#ifdef PAE 527 528static MALLOC_DEFINE(M_PMAPPDPT, "pmap", "pmap pdpt"); 529 530static void * 531pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 532{ 533 *flags = UMA_SLAB_PRIV; 534 return (contigmalloc(PAGE_SIZE, M_PMAPPDPT, 0, 0x0ULL, 0xffffffffULL, 535 1, 0)); 536} 537#endif 538 539/* 540 * ABuse the pte nodes for unmapped kva to thread a kva freelist through. 541 * Requirements: 542 * - Must deal with pages in order to ensure that none of the PG_* bits 543 * are ever set, PG_V in particular. 544 * - Assumes we can write to ptes without pte_store() atomic ops, even 545 * on PAE systems. This should be ok. 546 * - Assumes nothing will ever test these addresses for 0 to indicate 547 * no mapping instead of correctly checking PG_V. 548 * - Assumes a vm_offset_t will fit in a pte (true for i386). 549 * Because PG_V is never set, there can be no mappings to invalidate. 550 */ 551static vm_offset_t 552pmap_ptelist_alloc(vm_offset_t *head) 553{ 554 pt_entry_t *pte; 555 vm_offset_t va; 556 557 va = *head; 558 if (va == 0) 559 return (va); /* Out of memory */ 560 pte = vtopte(va); 561 *head = *pte; 562 if (*head & PG_V) 563 panic("pmap_ptelist_alloc: va with PG_V set!"); 564 *pte = 0; 565 return (va); 566} 567 568static void 569pmap_ptelist_free(vm_offset_t *head, vm_offset_t va) 570{ 571 pt_entry_t *pte; 572 573 if (va & PG_V) 574 panic("pmap_ptelist_free: freeing va with PG_V set!"); 575 pte = vtopte(va); 576 *pte = *head; /* virtual! PG_V is 0 though */ 577 *head = va; 578} 579 580static void 581pmap_ptelist_init(vm_offset_t *head, void *base, int npages) 582{ 583 int i; 584 vm_offset_t va; 585 586 *head = 0; 587 for (i = npages - 1; i >= 0; i--) { 588 va = (vm_offset_t)base + i * PAGE_SIZE; 589 pmap_ptelist_free(head, va); 590 } 591} 592 593 594/* 595 * Initialize the pmap module. 596 * Called by vm_init, to initialize any structures that the pmap 597 * system needs to map virtual memory. 598 */ 599void 600pmap_init(void) 601{ 602 603 /* 604 * Initialize the address space (zone) for the pv entries. Set a 605 * high water mark so that the system can recover from excessive 606 * numbers of pv entries. 607 */ 608 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 609 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count; 610 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 611 pv_entry_max = roundup(pv_entry_max, _NPCPV); 612 pv_entry_high_water = 9 * (pv_entry_max / 10); 613 614 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc); 615 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map, 616 PAGE_SIZE * pv_maxchunks); 617 if (pv_chunkbase == NULL) 618 panic("pmap_init: not enough kvm for pv chunks"); 619 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks); 620#ifdef PAE 621 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL, 622 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1, 623 UMA_ZONE_VM | UMA_ZONE_NOFREE); 624 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf); 625#endif 626} 627 628 629SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters"); 630SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0, 631 "Max number of PV entries"); 632SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0, 633 "Page share factor per proc"); 634 635/*************************************************** 636 * Low level helper routines..... 637 ***************************************************/ 638 639/* 640 * Determine the appropriate bits to set in a PTE or PDE for a specified 641 * caching mode. 642 */ 643static int 644pmap_cache_bits(int mode, boolean_t is_pde) 645{ 646 int pat_flag, pat_index, cache_bits; 647 648 /* The PAT bit is different for PTE's and PDE's. */ 649 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT; 650 651 /* If we don't support PAT, map extended modes to older ones. */ 652 if (!(cpu_feature & CPUID_PAT)) { 653 switch (mode) { 654 case PAT_UNCACHEABLE: 655 case PAT_WRITE_THROUGH: 656 case PAT_WRITE_BACK: 657 break; 658 case PAT_UNCACHED: 659 case PAT_WRITE_COMBINING: 660 case PAT_WRITE_PROTECTED: 661 mode = PAT_UNCACHEABLE; 662 break; 663 } 664 } 665 666 /* Map the caching mode to a PAT index. */ 667 switch (mode) { 668#ifdef PAT_WORKS 669 case PAT_UNCACHEABLE: 670 pat_index = 3; 671 break; 672 case PAT_WRITE_THROUGH: 673 pat_index = 1; 674 break; 675 case PAT_WRITE_BACK: 676 pat_index = 0; 677 break; 678 case PAT_UNCACHED: 679 pat_index = 2; 680 break; 681 case PAT_WRITE_COMBINING: 682 pat_index = 5; 683 break; 684 case PAT_WRITE_PROTECTED: 685 pat_index = 4; 686 break; 687#else 688 case PAT_UNCACHED: 689 case PAT_UNCACHEABLE: 690 case PAT_WRITE_PROTECTED: 691 pat_index = 3; 692 break; 693 case PAT_WRITE_THROUGH: 694 pat_index = 1; 695 break; 696 case PAT_WRITE_BACK: 697 pat_index = 0; 698 break; 699 case PAT_WRITE_COMBINING: 700 pat_index = 2; 701 break; 702#endif 703 default: 704 panic("Unknown caching mode %d\n", mode); 705 } 706 707 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */ 708 cache_bits = 0; 709 if (pat_index & 0x4) 710 cache_bits |= pat_flag; 711 if (pat_index & 0x2) 712 cache_bits |= PG_NC_PCD; 713 if (pat_index & 0x1) 714 cache_bits |= PG_NC_PWT; 715 return (cache_bits); 716} 717#ifdef SMP 718/* 719 * For SMP, these functions have to use the IPI mechanism for coherence. 720 */ 721void 722pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 723{ 724 u_int cpumask; 725 u_int other_cpus; 726 727 sched_pin(); 728 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 729 invlpg(va); 730 smp_invlpg(va); 731 } else { 732 cpumask = PCPU_GET(cpumask); 733 other_cpus = PCPU_GET(other_cpus); 734 if (pmap->pm_active & cpumask) 735 invlpg(va); 736 if (pmap->pm_active & other_cpus) 737 smp_masked_invlpg(pmap->pm_active & other_cpus, va); 738 } 739 sched_unpin(); 740} 741 742void 743pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 744{ 745 u_int cpumask; 746 u_int other_cpus; 747 vm_offset_t addr; 748 749 sched_pin(); 750 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 751 for (addr = sva; addr < eva; addr += PAGE_SIZE) 752 invlpg(addr); 753 smp_invlpg_range(sva, eva); 754 } else { 755 cpumask = PCPU_GET(cpumask); 756 other_cpus = PCPU_GET(other_cpus); 757 if (pmap->pm_active & cpumask) 758 for (addr = sva; addr < eva; addr += PAGE_SIZE) 759 invlpg(addr); 760 if (pmap->pm_active & other_cpus) 761 smp_masked_invlpg_range(pmap->pm_active & other_cpus, 762 sva, eva); 763 } 764 sched_unpin(); 765} 766 767void 768pmap_invalidate_all(pmap_t pmap) 769{ 770 u_int cpumask; 771 u_int other_cpus; 772 773 sched_pin(); 774 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 775 invltlb(); 776 smp_invltlb(); 777 } else { 778 cpumask = PCPU_GET(cpumask); 779 other_cpus = PCPU_GET(other_cpus); 780 if (pmap->pm_active & cpumask) 781 invltlb(); 782 if (pmap->pm_active & other_cpus) 783 smp_masked_invltlb(pmap->pm_active & other_cpus); 784 } 785 sched_unpin(); 786} 787 788void 789pmap_invalidate_cache(void) 790{ 791 792 sched_pin(); 793 wbinvd(); 794 smp_cache_flush(); 795 sched_unpin(); 796} 797#else /* !SMP */ 798/* 799 * Normal, non-SMP, 486+ invalidation functions. 800 * We inline these within pmap.c for speed. 801 */ 802PMAP_INLINE void 803pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 804{ 805 806 if (pmap == kernel_pmap || pmap->pm_active) 807 invlpg(va); 808} 809 810PMAP_INLINE void 811pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 812{ 813 vm_offset_t addr; 814 815 if (pmap == kernel_pmap || pmap->pm_active) 816 for (addr = sva; addr < eva; addr += PAGE_SIZE) 817 invlpg(addr); 818} 819 820PMAP_INLINE void 821pmap_invalidate_all(pmap_t pmap) 822{ 823 824 if (pmap == kernel_pmap || pmap->pm_active) 825 invltlb(); 826} 827 828PMAP_INLINE void 829pmap_invalidate_cache(void) 830{ 831 832 wbinvd(); 833} 834#endif /* !SMP */ 835 836/* 837 * Are we current address space or kernel? N.B. We return FALSE when 838 * a pmap's page table is in use because a kernel thread is borrowing 839 * it. The borrowed page table can change spontaneously, making any 840 * dependence on its continued use subject to a race condition. 841 */ 842static __inline int 843pmap_is_current(pmap_t pmap) 844{ 845 846 return (pmap == kernel_pmap || 847 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) && 848 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME))); 849} 850 851/* 852 * If the given pmap is not the current or kernel pmap, the returned pte must 853 * be released by passing it to pmap_pte_release(). 854 */ 855pt_entry_t * 856pmap_pte(pmap_t pmap, vm_offset_t va) 857{ 858 pd_entry_t newpf; 859 pd_entry_t *pde; 860 861 pde = pmap_pde(pmap, va); 862 if (*pde & PG_PS) 863 return (pde); 864 if (*pde != 0) { 865 /* are we current address space or kernel? */ 866 if (pmap_is_current(pmap)) 867 return (vtopte(va)); 868 mtx_lock(&PMAP2mutex); 869 newpf = *pde & PG_FRAME; 870 if ((*PMAP2 & PG_FRAME) != newpf) { 871 *PMAP2 = newpf | PG_RW | PG_V | PG_A | PG_M; 872 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2); 873 } 874 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1))); 875 } 876 return (0); 877} 878 879/* 880 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte 881 * being NULL. 882 */ 883static __inline void 884pmap_pte_release(pt_entry_t *pte) 885{ 886 887 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) 888 mtx_unlock(&PMAP2mutex); 889} 890 891static __inline void 892invlcaddr(void *caddr) 893{ 894 895 invlpg((u_int)caddr); 896} 897 898/* 899 * Super fast pmap_pte routine best used when scanning 900 * the pv lists. This eliminates many coarse-grained 901 * invltlb calls. Note that many of the pv list 902 * scans are across different pmaps. It is very wasteful 903 * to do an entire invltlb for checking a single mapping. 904 * 905 * If the given pmap is not the current pmap, vm_page_queue_mtx 906 * must be held and curthread pinned to a CPU. 907 */ 908static pt_entry_t * 909pmap_pte_quick(pmap_t pmap, vm_offset_t va) 910{ 911 pd_entry_t newpf; 912 pd_entry_t *pde; 913 914 pde = pmap_pde(pmap, va); 915 if (*pde & PG_PS) 916 return (pde); 917 if (*pde != 0) { 918 /* are we current address space or kernel? */ 919 if (pmap_is_current(pmap)) 920 return (vtopte(va)); 921 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 922 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 923 newpf = *pde & PG_FRAME; 924 if ((*PMAP1 & PG_FRAME) != newpf) { 925 *PMAP1 = newpf | PG_RW | PG_V | PG_A | PG_M; 926#ifdef SMP 927 PMAP1cpu = PCPU_GET(cpuid); 928#endif 929 invlcaddr(PADDR1); 930 PMAP1changed++; 931 } else 932#ifdef SMP 933 if (PMAP1cpu != PCPU_GET(cpuid)) { 934 PMAP1cpu = PCPU_GET(cpuid); 935 invlcaddr(PADDR1); 936 PMAP1changedcpu++; 937 } else 938#endif 939 PMAP1unchanged++; 940 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1))); 941 } 942 return (0); 943} 944 945/* 946 * Routine: pmap_extract 947 * Function: 948 * Extract the physical page address associated 949 * with the given map/virtual_address pair. 950 */ 951vm_paddr_t 952pmap_extract(pmap_t pmap, vm_offset_t va) 953{ 954 vm_paddr_t rtval; 955 pt_entry_t *pte; 956 pd_entry_t pde; 957 958 rtval = 0; 959 PMAP_LOCK(pmap); 960 pde = pmap->pm_pdir[va >> PDRSHIFT]; 961 if (pde != 0) { 962 if ((pde & PG_PS) != 0) { 963 rtval = (pde & ~PDRMASK) | (va & PDRMASK); 964 PMAP_UNLOCK(pmap); 965 return rtval; 966 } 967 pte = pmap_pte(pmap, va); 968 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK); 969 pmap_pte_release(pte); 970 } 971 PMAP_UNLOCK(pmap); 972 return (rtval); 973} 974 975/* 976 * Routine: pmap_extract_and_hold 977 * Function: 978 * Atomically extract and hold the physical page 979 * with the given pmap and virtual address pair 980 * if that mapping permits the given protection. 981 */ 982vm_page_t 983pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 984{ 985 pd_entry_t pde; 986 pt_entry_t pte; 987 vm_page_t m; 988 989 m = NULL; 990 vm_page_lock_queues(); 991 PMAP_LOCK(pmap); 992 pde = *pmap_pde(pmap, va); 993 if (pde != 0) { 994 if (pde & PG_PS) { 995 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) { 996 m = PHYS_TO_VM_PAGE((pde & ~PDRMASK) | 997 (va & PDRMASK)); 998 vm_page_hold(m); 999 } 1000 } else { 1001 sched_pin(); 1002 pte = *pmap_pte_quick(pmap, va); 1003 if (pte != 0 && 1004 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) { 1005 m = PHYS_TO_VM_PAGE(pte & PG_FRAME); 1006 vm_page_hold(m); 1007 } 1008 sched_unpin(); 1009 } 1010 } 1011 vm_page_unlock_queues(); 1012 PMAP_UNLOCK(pmap); 1013 return (m); 1014} 1015 1016/*************************************************** 1017 * Low level mapping routines..... 1018 ***************************************************/ 1019 1020/* 1021 * Add a wired page to the kva. 1022 * Note: not SMP coherent. 1023 */ 1024PMAP_INLINE void 1025pmap_kenter(vm_offset_t va, vm_paddr_t pa) 1026{ 1027 pt_entry_t *pte; 1028 1029 pte = vtopte(va); 1030 pte_store(pte, pa | PG_RW | PG_V | pgeflag); 1031} 1032 1033PMAP_INLINE void 1034pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode) 1035{ 1036 pt_entry_t *pte; 1037 1038 pte = vtopte(va); 1039 pte_store(pte, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0)); 1040} 1041 1042/* 1043 * Remove a page from the kernel pagetables. 1044 * Note: not SMP coherent. 1045 */ 1046PMAP_INLINE void 1047pmap_kremove(vm_offset_t va) 1048{ 1049 pt_entry_t *pte; 1050 1051 pte = vtopte(va); 1052 pte_clear(pte); 1053} 1054 1055/* 1056 * Used to map a range of physical addresses into kernel 1057 * virtual address space. 1058 * 1059 * The value passed in '*virt' is a suggested virtual address for 1060 * the mapping. Architectures which can support a direct-mapped 1061 * physical to virtual region can return the appropriate address 1062 * within that region, leaving '*virt' unchanged. Other 1063 * architectures should map the pages starting at '*virt' and 1064 * update '*virt' with the first usable address after the mapped 1065 * region. 1066 */ 1067vm_offset_t 1068pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 1069{ 1070 vm_offset_t va, sva; 1071 1072 va = sva = *virt; 1073 while (start < end) { 1074 pmap_kenter(va, start); 1075 va += PAGE_SIZE; 1076 start += PAGE_SIZE; 1077 } 1078 pmap_invalidate_range(kernel_pmap, sva, va); 1079 *virt = va; 1080 return (sva); 1081} 1082 1083 1084/* 1085 * Add a list of wired pages to the kva 1086 * this routine is only used for temporary 1087 * kernel mappings that do not need to have 1088 * page modification or references recorded. 1089 * Note that old mappings are simply written 1090 * over. The page *must* be wired. 1091 * Note: SMP coherent. Uses a ranged shootdown IPI. 1092 */ 1093void 1094pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count) 1095{ 1096 pt_entry_t *endpte, oldpte, *pte; 1097 1098 oldpte = 0; 1099 pte = vtopte(sva); 1100 endpte = pte + count; 1101 while (pte < endpte) { 1102 oldpte |= *pte; 1103 pte_store(pte, VM_PAGE_TO_PHYS(*ma) | pgeflag | PG_RW | PG_V); 1104 pte++; 1105 ma++; 1106 } 1107 if ((oldpte & PG_V) != 0) 1108 pmap_invalidate_range(kernel_pmap, sva, sva + count * 1109 PAGE_SIZE); 1110} 1111 1112/* 1113 * This routine tears out page mappings from the 1114 * kernel -- it is meant only for temporary mappings. 1115 * Note: SMP coherent. Uses a ranged shootdown IPI. 1116 */ 1117void 1118pmap_qremove(vm_offset_t sva, int count) 1119{ 1120 vm_offset_t va; 1121 1122 va = sva; 1123 while (count-- > 0) { 1124 pmap_kremove(va); 1125 va += PAGE_SIZE; 1126 } 1127 pmap_invalidate_range(kernel_pmap, sva, va); 1128} 1129 1130/*************************************************** 1131 * Page table page management routines..... 1132 ***************************************************/ 1133 1134/* 1135 * This routine unholds page table pages, and if the hold count 1136 * drops to zero, then it decrements the wire count. 1137 */ 1138static PMAP_INLINE int 1139pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m) 1140{ 1141 1142 --m->wire_count; 1143 if (m->wire_count == 0) 1144 return _pmap_unwire_pte_hold(pmap, m); 1145 else 1146 return 0; 1147} 1148 1149static int 1150_pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m) 1151{ 1152 vm_offset_t pteva; 1153 1154 /* 1155 * unmap the page table page 1156 */ 1157 pmap->pm_pdir[m->pindex] = 0; 1158 --pmap->pm_stats.resident_count; 1159 1160 /* 1161 * Do an invltlb to make the invalidated mapping 1162 * take effect immediately. 1163 */ 1164 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1165 pmap_invalidate_page(pmap, pteva); 1166 1167 vm_page_free_zero(m); 1168 atomic_subtract_int(&cnt.v_wire_count, 1); 1169 return 1; 1170} 1171 1172/* 1173 * After removing a page table entry, this routine is used to 1174 * conditionally free the page, and manage the hold/wire counts. 1175 */ 1176static int 1177pmap_unuse_pt(pmap_t pmap, vm_offset_t va) 1178{ 1179 pd_entry_t ptepde; 1180 vm_page_t mpte; 1181 1182 if (va >= VM_MAXUSER_ADDRESS) 1183 return 0; 1184 ptepde = *pmap_pde(pmap, va); 1185 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); 1186 return pmap_unwire_pte_hold(pmap, mpte); 1187} 1188 1189void 1190pmap_pinit0(pmap_t pmap) 1191{ 1192 1193 PMAP_LOCK_INIT(pmap); 1194 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1195#ifdef PAE 1196 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1197#endif 1198 pmap->pm_active = 0; 1199 PCPU_SET(curpmap, pmap); 1200 TAILQ_INIT(&pmap->pm_pvchunk); 1201 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1202 mtx_lock_spin(&allpmaps_lock); 1203 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1204 mtx_unlock_spin(&allpmaps_lock); 1205} 1206 1207/* 1208 * Initialize a preallocated and zeroed pmap structure, 1209 * such as one in a vmspace structure. 1210 */ 1211void 1212pmap_pinit(pmap_t pmap) 1213{ 1214 vm_page_t m, ptdpg[NPGPTD]; 1215 vm_paddr_t pa; 1216 static int color; 1217 int i; 1218 1219 PMAP_LOCK_INIT(pmap); 1220 1221 /* 1222 * No need to allocate page table space yet but we do need a valid 1223 * page directory table. 1224 */ 1225 if (pmap->pm_pdir == NULL) { 1226 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1227 NBPTD); 1228#ifdef PAE 1229 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO); 1230 KASSERT(((vm_offset_t)pmap->pm_pdpt & 1231 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0, 1232 ("pmap_pinit: pdpt misaligned")); 1233 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30), 1234 ("pmap_pinit: pdpt above 4g")); 1235#endif 1236 } 1237 1238 /* 1239 * allocate the page directory page(s) 1240 */ 1241 for (i = 0; i < NPGPTD;) { 1242 m = vm_page_alloc(NULL, color++, 1243 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1244 VM_ALLOC_ZERO); 1245 if (m == NULL) 1246 VM_WAIT; 1247 else { 1248 ptdpg[i++] = m; 1249 } 1250 } 1251 1252 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1253 1254 for (i = 0; i < NPGPTD; i++) { 1255 if ((ptdpg[i]->flags & PG_ZERO) == 0) 1256 bzero(pmap->pm_pdir + (i * NPDEPG), PAGE_SIZE); 1257 } 1258 1259 mtx_lock_spin(&allpmaps_lock); 1260 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1261 mtx_unlock_spin(&allpmaps_lock); 1262 /* Wire in kernel global address entries. */ 1263 /* XXX copies current process, does not fill in MPPTDI */ 1264 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1265#ifdef SMP 1266 pmap->pm_pdir[MPPTDI] = PTD[MPPTDI]; 1267#endif 1268 1269 /* install self-referential address mapping entry(s) */ 1270 for (i = 0; i < NPGPTD; i++) { 1271 pa = VM_PAGE_TO_PHYS(ptdpg[i]); 1272 pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M; 1273#ifdef PAE 1274 pmap->pm_pdpt[i] = pa | PG_V; 1275#endif 1276 } 1277 1278 pmap->pm_active = 0; 1279 TAILQ_INIT(&pmap->pm_pvchunk); 1280 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1281} 1282 1283/* 1284 * this routine is called if the page table page is not 1285 * mapped correctly. 1286 */ 1287static vm_page_t 1288_pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags) 1289{ 1290 vm_paddr_t ptepa; 1291 vm_page_t m; 1292 1293 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1294 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1295 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1296 1297 /* 1298 * Allocate a page table page. 1299 */ 1300 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1301 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1302 if (flags & M_WAITOK) { 1303 PMAP_UNLOCK(pmap); 1304 vm_page_unlock_queues(); 1305 VM_WAIT; 1306 vm_page_lock_queues(); 1307 PMAP_LOCK(pmap); 1308 } 1309 1310 /* 1311 * Indicate the need to retry. While waiting, the page table 1312 * page may have been allocated. 1313 */ 1314 return (NULL); 1315 } 1316 if ((m->flags & PG_ZERO) == 0) 1317 pmap_zero_page(m); 1318 1319 /* 1320 * Map the pagetable page into the process address space, if 1321 * it isn't already there. 1322 */ 1323 1324 pmap->pm_stats.resident_count++; 1325 1326 ptepa = VM_PAGE_TO_PHYS(m); 1327 pmap->pm_pdir[ptepindex] = 1328 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M); 1329 1330 return m; 1331} 1332 1333static vm_page_t 1334pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags) 1335{ 1336 unsigned ptepindex; 1337 pd_entry_t ptepa; 1338 vm_page_t m; 1339 1340 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1341 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1342 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1343 1344 /* 1345 * Calculate pagetable page index 1346 */ 1347 ptepindex = va >> PDRSHIFT; 1348retry: 1349 /* 1350 * Get the page directory entry 1351 */ 1352 ptepa = pmap->pm_pdir[ptepindex]; 1353 1354 /* 1355 * This supports switching from a 4MB page to a 1356 * normal 4K page. 1357 */ 1358 if (ptepa & PG_PS) { 1359 pmap->pm_pdir[ptepindex] = 0; 1360 ptepa = 0; 1361 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1362 pmap_invalidate_all(kernel_pmap); 1363 } 1364 1365 /* 1366 * If the page table page is mapped, we just increment the 1367 * hold count, and activate it. 1368 */ 1369 if (ptepa) { 1370 m = PHYS_TO_VM_PAGE(ptepa); 1371 m->wire_count++; 1372 } else { 1373 /* 1374 * Here if the pte page isn't mapped, or if it has 1375 * been deallocated. 1376 */ 1377 m = _pmap_allocpte(pmap, ptepindex, flags); 1378 if (m == NULL && (flags & M_WAITOK)) 1379 goto retry; 1380 } 1381 return (m); 1382} 1383 1384 1385/*************************************************** 1386* Pmap allocation/deallocation routines. 1387 ***************************************************/ 1388 1389#ifdef SMP 1390/* 1391 * Deal with a SMP shootdown of other users of the pmap that we are 1392 * trying to dispose of. This can be a bit hairy. 1393 */ 1394static u_int *lazymask; 1395static u_int lazyptd; 1396static volatile u_int lazywait; 1397 1398void pmap_lazyfix_action(void); 1399 1400void 1401pmap_lazyfix_action(void) 1402{ 1403 u_int mymask = PCPU_GET(cpumask); 1404 1405#ifdef COUNT_IPIS 1406 *ipi_lazypmap_counts[PCPU_GET(cpuid)]++; 1407#endif 1408 if (rcr3() == lazyptd) 1409 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1410 atomic_clear_int(lazymask, mymask); 1411 atomic_store_rel_int(&lazywait, 1); 1412} 1413 1414static void 1415pmap_lazyfix_self(u_int mymask) 1416{ 1417 1418 if (rcr3() == lazyptd) 1419 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1420 atomic_clear_int(lazymask, mymask); 1421} 1422 1423 1424static void 1425pmap_lazyfix(pmap_t pmap) 1426{ 1427 u_int mymask; 1428 u_int mask; 1429 u_int spins; 1430 1431 while ((mask = pmap->pm_active) != 0) { 1432 spins = 50000000; 1433 mask = mask & -mask; /* Find least significant set bit */ 1434 mtx_lock_spin(&smp_ipi_mtx); 1435#ifdef PAE 1436 lazyptd = vtophys(pmap->pm_pdpt); 1437#else 1438 lazyptd = vtophys(pmap->pm_pdir); 1439#endif 1440 mymask = PCPU_GET(cpumask); 1441 if (mask == mymask) { 1442 lazymask = &pmap->pm_active; 1443 pmap_lazyfix_self(mymask); 1444 } else { 1445 atomic_store_rel_int((u_int *)&lazymask, 1446 (u_int)&pmap->pm_active); 1447 atomic_store_rel_int(&lazywait, 0); 1448 ipi_selected(mask, IPI_LAZYPMAP); 1449 while (lazywait == 0) { 1450 ia32_pause(); 1451 if (--spins == 0) 1452 break; 1453 } 1454 } 1455 mtx_unlock_spin(&smp_ipi_mtx); 1456 if (spins == 0) 1457 printf("pmap_lazyfix: spun for 50000000\n"); 1458 } 1459} 1460 1461#else /* SMP */ 1462 1463/* 1464 * Cleaning up on uniprocessor is easy. For various reasons, we're 1465 * unlikely to have to even execute this code, including the fact 1466 * that the cleanup is deferred until the parent does a wait(2), which 1467 * means that another userland process has run. 1468 */ 1469static void 1470pmap_lazyfix(pmap_t pmap) 1471{ 1472 u_int cr3; 1473 1474 cr3 = vtophys(pmap->pm_pdir); 1475 if (cr3 == rcr3()) { 1476 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1477 pmap->pm_active &= ~(PCPU_GET(cpumask)); 1478 } 1479} 1480#endif /* SMP */ 1481 1482/* 1483 * Release any resources held by the given physical map. 1484 * Called when a pmap initialized by pmap_pinit is being released. 1485 * Should only be called if the map contains no valid mappings. 1486 */ 1487void 1488pmap_release(pmap_t pmap) 1489{ 1490 vm_page_t m, ptdpg[NPGPTD]; 1491 int i; 1492 1493 KASSERT(pmap->pm_stats.resident_count == 0, 1494 ("pmap_release: pmap resident count %ld != 0", 1495 pmap->pm_stats.resident_count)); 1496 1497 pmap_lazyfix(pmap); 1498 mtx_lock_spin(&allpmaps_lock); 1499 LIST_REMOVE(pmap, pm_list); 1500 mtx_unlock_spin(&allpmaps_lock); 1501 1502 for (i = 0; i < NPGPTD; i++) 1503 ptdpg[i] = PHYS_TO_VM_PAGE(pmap->pm_pdir[PTDPTDI + i]); 1504 1505 bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) * 1506 sizeof(*pmap->pm_pdir)); 1507#ifdef SMP 1508 pmap->pm_pdir[MPPTDI] = 0; 1509#endif 1510 1511 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1512 1513 for (i = 0; i < NPGPTD; i++) { 1514 m = ptdpg[i]; 1515#ifdef PAE 1516 KASSERT(VM_PAGE_TO_PHYS(m) == (pmap->pm_pdpt[i] & PG_FRAME), 1517 ("pmap_release: got wrong ptd page")); 1518#endif 1519 m->wire_count--; 1520 atomic_subtract_int(&cnt.v_wire_count, 1); 1521 vm_page_free_zero(m); 1522 } 1523 PMAP_LOCK_DESTROY(pmap); 1524} 1525 1526static int 1527kvm_size(SYSCTL_HANDLER_ARGS) 1528{ 1529 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1530 1531 return sysctl_handle_long(oidp, &ksize, 0, req); 1532} 1533SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1534 0, 0, kvm_size, "IU", "Size of KVM"); 1535 1536static int 1537kvm_free(SYSCTL_HANDLER_ARGS) 1538{ 1539 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1540 1541 return sysctl_handle_long(oidp, &kfree, 0, req); 1542} 1543SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1544 0, 0, kvm_free, "IU", "Amount of KVM free"); 1545 1546/* 1547 * grow the number of kernel page table entries, if needed 1548 */ 1549void 1550pmap_growkernel(vm_offset_t addr) 1551{ 1552 struct pmap *pmap; 1553 vm_paddr_t ptppaddr; 1554 vm_page_t nkpg; 1555 pd_entry_t newpdir; 1556 pt_entry_t *pde; 1557 1558 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1559 if (kernel_vm_end == 0) { 1560 kernel_vm_end = KERNBASE; 1561 nkpt = 0; 1562 while (pdir_pde(PTD, kernel_vm_end)) { 1563 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1564 nkpt++; 1565 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1566 kernel_vm_end = kernel_map->max_offset; 1567 break; 1568 } 1569 } 1570 } 1571 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1572 if (addr - 1 >= kernel_map->max_offset) 1573 addr = kernel_map->max_offset; 1574 while (kernel_vm_end < addr) { 1575 if (pdir_pde(PTD, kernel_vm_end)) { 1576 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1577 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1578 kernel_vm_end = kernel_map->max_offset; 1579 break; 1580 } 1581 continue; 1582 } 1583 1584 /* 1585 * This index is bogus, but out of the way 1586 */ 1587 nkpg = vm_page_alloc(NULL, nkpt, 1588 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1589 if (!nkpg) 1590 panic("pmap_growkernel: no memory to grow kernel"); 1591 1592 nkpt++; 1593 1594 pmap_zero_page(nkpg); 1595 ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1596 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1597 pdir_pde(PTD, kernel_vm_end) = newpdir; 1598 1599 mtx_lock_spin(&allpmaps_lock); 1600 LIST_FOREACH(pmap, &allpmaps, pm_list) { 1601 pde = pmap_pde(pmap, kernel_vm_end); 1602 pde_store(pde, newpdir); 1603 } 1604 mtx_unlock_spin(&allpmaps_lock); 1605 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1606 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1607 kernel_vm_end = kernel_map->max_offset; 1608 break; 1609 } 1610 } 1611} 1612 1613 1614/*************************************************** 1615 * page management routines. 1616 ***************************************************/ 1617 1618CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE); 1619CTASSERT(_NPCM == 11); 1620 1621static __inline struct pv_chunk * 1622pv_to_chunk(pv_entry_t pv) 1623{ 1624 1625 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK); 1626} 1627 1628#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap) 1629 1630#define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */ 1631#define PC_FREE10 0x0000fffful /* Free values for index 10 */ 1632 1633static uint32_t pc_freemask[11] = { 1634 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1635 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1636 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1637 PC_FREE0_9, PC_FREE10 1638}; 1639 1640SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0, 1641 "Current number of pv entries"); 1642 1643#ifdef PV_STATS 1644static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail; 1645 1646SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0, 1647 "Current number of pv entry chunks"); 1648SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0, 1649 "Current number of pv entry chunks allocated"); 1650SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0, 1651 "Current number of pv entry chunks frees"); 1652SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0, 1653 "Number of times tried to get a chunk page but failed."); 1654 1655static long pv_entry_frees, pv_entry_allocs; 1656static int pv_entry_spare; 1657 1658SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0, 1659 "Current number of pv entry frees"); 1660SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0, 1661 "Current number of pv entry allocs"); 1662SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0, 1663 "Current number of spare pv entries"); 1664 1665static int pmap_collect_inactive, pmap_collect_active; 1666 1667SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0, 1668 "Current number times pmap_collect called on inactive queue"); 1669SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0, 1670 "Current number times pmap_collect called on active queue"); 1671#endif 1672 1673/* 1674 * We are in a serious low memory condition. Resort to 1675 * drastic measures to free some pages so we can allocate 1676 * another pv entry chunk. This is normally called to 1677 * unmap inactive pages, and if necessary, active pages. 1678 */ 1679static void 1680pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq) 1681{ 1682 pmap_t pmap; 1683 pt_entry_t *pte, tpte; 1684 pv_entry_t next_pv, pv; 1685 vm_offset_t va; 1686 vm_page_t m; 1687 1688 sched_pin(); 1689 TAILQ_FOREACH(m, &vpq->pl, pageq) { 1690 if (m->hold_count || m->busy) 1691 continue; 1692 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) { 1693 va = pv->pv_va; 1694 pmap = PV_PMAP(pv); 1695 /* Avoid deadlock and lock recursion. */ 1696 if (pmap > locked_pmap) 1697 PMAP_LOCK(pmap); 1698 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) 1699 continue; 1700 pmap->pm_stats.resident_count--; 1701 pte = pmap_pte_quick(pmap, va); 1702 tpte = pte_load_clear(pte); 1703 KASSERT((tpte & PG_W) == 0, 1704 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte)); 1705 if (tpte & PG_A) 1706 vm_page_flag_set(m, PG_REFERENCED); 1707 if (tpte & PG_M) { 1708 KASSERT((tpte & PG_RW), 1709 ("pmap_collect: modified page not writable: va: %#x, pte: %#jx", 1710 va, (uintmax_t)tpte)); 1711 vm_page_dirty(m); 1712 } 1713 pmap_invalidate_page(pmap, va); 1714 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1715 if (TAILQ_EMPTY(&m->md.pv_list)) 1716 vm_page_flag_clear(m, PG_WRITEABLE); 1717 m->md.pv_list_count--; 1718 pmap_unuse_pt(pmap, va); 1719 free_pv_entry(pmap, pv); 1720 if (pmap != locked_pmap) 1721 PMAP_UNLOCK(pmap); 1722 } 1723 } 1724 sched_unpin(); 1725} 1726 1727 1728/* 1729 * free the pv_entry back to the free list 1730 */ 1731static void 1732free_pv_entry(pmap_t pmap, pv_entry_t pv) 1733{ 1734 vm_page_t m; 1735 struct pv_chunk *pc; 1736 int idx, field, bit; 1737 1738 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1739 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1740 PV_STAT(pv_entry_frees++); 1741 PV_STAT(pv_entry_spare++); 1742 pv_entry_count--; 1743 pc = pv_to_chunk(pv); 1744 idx = pv - &pc->pc_pventry[0]; 1745 field = idx / 32; 1746 bit = idx % 32; 1747 pc->pc_map[field] |= 1ul << bit; 1748 /* move to head of list */ 1749 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 1750 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 1751 for (idx = 0; idx < _NPCM; idx++) 1752 if (pc->pc_map[idx] != pc_freemask[idx]) 1753 return; 1754 PV_STAT(pv_entry_spare -= _NPCPV); 1755 PV_STAT(pc_chunk_count--); 1756 PV_STAT(pc_chunk_frees++); 1757 /* entire chunk is free, return it */ 1758 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 1759 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 1760 pmap_qremove((vm_offset_t)pc, 1); 1761 vm_page_unwire(m, 0); 1762 vm_page_free(m); 1763 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 1764} 1765 1766/* 1767 * get a new pv_entry, allocating a block from the system 1768 * when needed. 1769 */ 1770static pv_entry_t 1771get_pv_entry(pmap_t pmap, int try) 1772{ 1773 static const struct timeval printinterval = { 60, 0 }; 1774 static struct timeval lastprint; 1775 static vm_pindex_t colour; 1776 int bit, field, page_req; 1777 pv_entry_t pv; 1778 struct pv_chunk *pc; 1779 vm_page_t m; 1780 1781 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1782 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1783 PV_STAT(pv_entry_allocs++); 1784 pv_entry_count++; 1785 if (pv_entry_count > pv_entry_high_water) 1786 pagedaemon_wakeup(); 1787 pc = TAILQ_FIRST(&pmap->pm_pvchunk); 1788 if (pc != NULL) { 1789 for (field = 0; field < _NPCM; field++) { 1790 if (pc->pc_map[field]) { 1791 bit = bsfl(pc->pc_map[field]); 1792 break; 1793 } 1794 } 1795 if (field < _NPCM) { 1796 pv = &pc->pc_pventry[field * 32 + bit]; 1797 pc->pc_map[field] &= ~(1ul << bit); 1798 /* If this was the last item, move it to tail */ 1799 for (field = 0; field < _NPCM; field++) 1800 if (pc->pc_map[field] != 0) { 1801 PV_STAT(pv_entry_spare--); 1802 return (pv); /* not full, return */ 1803 } 1804 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 1805 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); 1806 PV_STAT(pv_entry_spare--); 1807 return (pv); 1808 } 1809 } 1810 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 1811 page_req = try ? VM_ALLOC_NORMAL : VM_ALLOC_SYSTEM; 1812 m = vm_page_alloc(NULL, colour, page_req | 1813 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED); 1814 if (m == NULL || pc == NULL) { 1815 if (try) { 1816 pv_entry_count--; 1817 PV_STAT(pc_chunk_tryfail++); 1818 if (m) { 1819 vm_page_lock_queues(); 1820 vm_page_unwire(m, 0); 1821 vm_page_free(m); 1822 vm_page_unlock_queues(); 1823 } 1824 if (pc) 1825 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 1826 return (NULL); 1827 } 1828 /* 1829 * Reclaim pv entries: At first, destroy mappings to 1830 * inactive pages. After that, if a pv chunk entry 1831 * is still needed, destroy mappings to active pages. 1832 */ 1833 if (ratecheck(&lastprint, &printinterval)) 1834 printf("Approaching the limit on PV entries, " 1835 "consider increasing tunables " 1836 "vm.pmap.shpgperproc or " 1837 "vm.pmap.pv_entry_max\n"); 1838 PV_STAT(pmap_collect_inactive++); 1839 pmap_collect(pmap, &vm_page_queues[PQ_INACTIVE]); 1840 if (m == NULL) 1841 m = vm_page_alloc(NULL, colour, VM_ALLOC_SYSTEM | 1842 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED); 1843 if (pc == NULL) 1844 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 1845 if (m == NULL || pc == NULL) { 1846 PV_STAT(pmap_collect_active++); 1847 pmap_collect(pmap, &vm_page_queues[PQ_ACTIVE]); 1848 if (m == NULL) 1849 m = vm_page_alloc(NULL, colour, 1850 VM_ALLOC_SYSTEM | VM_ALLOC_NOOBJ | 1851 VM_ALLOC_WIRED); 1852 if (pc == NULL) 1853 pc = (struct pv_chunk *) 1854 pmap_ptelist_alloc(&pv_vafree); 1855 if (m == NULL || pc == NULL) 1856 panic("get_pv_entry: increase vm.pmap.shpgperproc"); 1857 } 1858 } 1859 PV_STAT(pc_chunk_count++); 1860 PV_STAT(pc_chunk_allocs++); 1861 colour++; 1862 pmap_qenter((vm_offset_t)pc, &m, 1); 1863 pc->pc_pmap = pmap; 1864 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */ 1865 for (field = 1; field < _NPCM; field++) 1866 pc->pc_map[field] = pc_freemask[field]; 1867 pv = &pc->pc_pventry[0]; 1868 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 1869 PV_STAT(pv_entry_spare += _NPCPV - 1); 1870 return (pv); 1871} 1872 1873static void 1874pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 1875{ 1876 pv_entry_t pv; 1877 1878 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1879 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1880 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 1881 if (pmap == PV_PMAP(pv) && va == pv->pv_va) 1882 break; 1883 } 1884 KASSERT(pv != NULL, ("pmap_remove_entry: pv not found")); 1885 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1886 m->md.pv_list_count--; 1887 if (TAILQ_EMPTY(&m->md.pv_list)) 1888 vm_page_flag_clear(m, PG_WRITEABLE); 1889 free_pv_entry(pmap, pv); 1890} 1891 1892/* 1893 * Create a pv entry for page at pa for 1894 * (pmap, va). 1895 */ 1896static void 1897pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 1898{ 1899 pv_entry_t pv; 1900 1901 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1902 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1903 pv = get_pv_entry(pmap, FALSE); 1904 pv->pv_va = va; 1905 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 1906 m->md.pv_list_count++; 1907} 1908 1909/* 1910 * Conditionally create a pv entry. 1911 */ 1912static boolean_t 1913pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 1914{ 1915 pv_entry_t pv; 1916 1917 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1918 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1919 if (pv_entry_count < pv_entry_high_water && 1920 (pv = get_pv_entry(pmap, TRUE)) != NULL) { 1921 pv->pv_va = va; 1922 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 1923 m->md.pv_list_count++; 1924 return (TRUE); 1925 } else 1926 return (FALSE); 1927} 1928 1929/* 1930 * pmap_remove_pte: do the things to unmap a page in a process 1931 */ 1932static int 1933pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va) 1934{ 1935 pt_entry_t oldpte; 1936 vm_page_t m; 1937 1938 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1939 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1940 oldpte = pte_load_clear(ptq); 1941 if (oldpte & PG_W) 1942 pmap->pm_stats.wired_count -= 1; 1943 /* 1944 * Machines that don't support invlpg, also don't support 1945 * PG_G. 1946 */ 1947 if (oldpte & PG_G) 1948 pmap_invalidate_page(kernel_pmap, va); 1949 pmap->pm_stats.resident_count -= 1; 1950 if (oldpte & PG_MANAGED) { 1951 m = PHYS_TO_VM_PAGE(oldpte); 1952 if (oldpte & PG_M) { 1953 KASSERT((oldpte & PG_RW), 1954 ("pmap_remove_pte: modified page not writable: va: %#x, pte: %#jx", 1955 va, (uintmax_t)oldpte)); 1956 vm_page_dirty(m); 1957 } 1958 if (oldpte & PG_A) 1959 vm_page_flag_set(m, PG_REFERENCED); 1960 pmap_remove_entry(pmap, m, va); 1961 } 1962 return (pmap_unuse_pt(pmap, va)); 1963} 1964 1965/* 1966 * Remove a single page from a process address space 1967 */ 1968static void 1969pmap_remove_page(pmap_t pmap, vm_offset_t va) 1970{ 1971 pt_entry_t *pte; 1972 1973 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1974 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 1975 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 1976 if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0) 1977 return; 1978 pmap_remove_pte(pmap, pte, va); 1979 pmap_invalidate_page(pmap, va); 1980} 1981 1982/* 1983 * Remove the given range of addresses from the specified map. 1984 * 1985 * It is assumed that the start and end are properly 1986 * rounded to the page size. 1987 */ 1988void 1989pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 1990{ 1991 vm_offset_t pdnxt; 1992 pd_entry_t ptpaddr; 1993 pt_entry_t *pte; 1994 int anyvalid; 1995 1996 /* 1997 * Perform an unsynchronized read. This is, however, safe. 1998 */ 1999 if (pmap->pm_stats.resident_count == 0) 2000 return; 2001 2002 anyvalid = 0; 2003 2004 vm_page_lock_queues(); 2005 sched_pin(); 2006 PMAP_LOCK(pmap); 2007 2008 /* 2009 * special handling of removing one page. a very 2010 * common operation and easy to short circuit some 2011 * code. 2012 */ 2013 if ((sva + PAGE_SIZE == eva) && 2014 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 2015 pmap_remove_page(pmap, sva); 2016 goto out; 2017 } 2018 2019 for (; sva < eva; sva = pdnxt) { 2020 unsigned pdirindex; 2021 2022 /* 2023 * Calculate index for next page table. 2024 */ 2025 pdnxt = (sva + NBPDR) & ~PDRMASK; 2026 if (pmap->pm_stats.resident_count == 0) 2027 break; 2028 2029 pdirindex = sva >> PDRSHIFT; 2030 ptpaddr = pmap->pm_pdir[pdirindex]; 2031 2032 /* 2033 * Weed out invalid mappings. Note: we assume that the page 2034 * directory table is always allocated, and in kernel virtual. 2035 */ 2036 if (ptpaddr == 0) 2037 continue; 2038 2039 /* 2040 * Check for large page. 2041 */ 2042 if ((ptpaddr & PG_PS) != 0) { 2043 pmap->pm_pdir[pdirindex] = 0; 2044 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 2045 anyvalid = 1; 2046 continue; 2047 } 2048 2049 /* 2050 * Limit our scan to either the end of the va represented 2051 * by the current page table page, or to the end of the 2052 * range being removed. 2053 */ 2054 if (pdnxt > eva) 2055 pdnxt = eva; 2056 2057 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2058 sva += PAGE_SIZE) { 2059 if (*pte == 0) 2060 continue; 2061 2062 /* 2063 * The TLB entry for a PG_G mapping is invalidated 2064 * by pmap_remove_pte(). 2065 */ 2066 if ((*pte & PG_G) == 0) 2067 anyvalid = 1; 2068 if (pmap_remove_pte(pmap, pte, sva)) 2069 break; 2070 } 2071 } 2072out: 2073 sched_unpin(); 2074 vm_page_unlock_queues(); 2075 if (anyvalid) 2076 pmap_invalidate_all(pmap); 2077 PMAP_UNLOCK(pmap); 2078} 2079 2080/* 2081 * Routine: pmap_remove_all 2082 * Function: 2083 * Removes this physical page from 2084 * all physical maps in which it resides. 2085 * Reflects back modify bits to the pager. 2086 * 2087 * Notes: 2088 * Original versions of this routine were very 2089 * inefficient because they iteratively called 2090 * pmap_remove (slow...) 2091 */ 2092 2093void 2094pmap_remove_all(vm_page_t m) 2095{ 2096 pv_entry_t pv; 2097 pmap_t pmap; 2098 pt_entry_t *pte, tpte; 2099 2100#if defined(PMAP_DIAGNOSTIC) 2101 /* 2102 * XXX This makes pmap_remove_all() illegal for non-managed pages! 2103 */ 2104 if (m->flags & PG_FICTITIOUS) { 2105 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%x", 2106 VM_PAGE_TO_PHYS(m)); 2107 } 2108#endif 2109 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2110 sched_pin(); 2111 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2112 pmap = PV_PMAP(pv); 2113 PMAP_LOCK(pmap); 2114 pmap->pm_stats.resident_count--; 2115 pte = pmap_pte_quick(pmap, pv->pv_va); 2116 tpte = pte_load_clear(pte); 2117 if (tpte & PG_W) 2118 pmap->pm_stats.wired_count--; 2119 if (tpte & PG_A) 2120 vm_page_flag_set(m, PG_REFERENCED); 2121 2122 /* 2123 * Update the vm_page_t clean and reference bits. 2124 */ 2125 if (tpte & PG_M) { 2126 KASSERT((tpte & PG_RW), 2127 ("pmap_remove_all: modified page not writable: va: %#x, pte: %#jx", 2128 pv->pv_va, (uintmax_t)tpte)); 2129 vm_page_dirty(m); 2130 } 2131 pmap_invalidate_page(pmap, pv->pv_va); 2132 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2133 m->md.pv_list_count--; 2134 pmap_unuse_pt(pmap, pv->pv_va); 2135 free_pv_entry(pmap, pv); 2136 PMAP_UNLOCK(pmap); 2137 } 2138 vm_page_flag_clear(m, PG_WRITEABLE); 2139 sched_unpin(); 2140} 2141 2142/* 2143 * Set the physical protection on the 2144 * specified range of this map as requested. 2145 */ 2146void 2147pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 2148{ 2149 vm_offset_t pdnxt; 2150 pd_entry_t ptpaddr; 2151 pt_entry_t *pte; 2152 int anychanged; 2153 2154 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 2155 pmap_remove(pmap, sva, eva); 2156 return; 2157 } 2158 2159 if (prot & VM_PROT_WRITE) 2160 return; 2161 2162 anychanged = 0; 2163 2164 vm_page_lock_queues(); 2165 sched_pin(); 2166 PMAP_LOCK(pmap); 2167 for (; sva < eva; sva = pdnxt) { 2168 unsigned obits, pbits, pdirindex; 2169 2170 pdnxt = (sva + NBPDR) & ~PDRMASK; 2171 2172 pdirindex = sva >> PDRSHIFT; 2173 ptpaddr = pmap->pm_pdir[pdirindex]; 2174 2175 /* 2176 * Weed out invalid mappings. Note: we assume that the page 2177 * directory table is always allocated, and in kernel virtual. 2178 */ 2179 if (ptpaddr == 0) 2180 continue; 2181 2182 /* 2183 * Check for large page. 2184 */ 2185 if ((ptpaddr & PG_PS) != 0) { 2186 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW); 2187 anychanged = 1; 2188 continue; 2189 } 2190 2191 if (pdnxt > eva) 2192 pdnxt = eva; 2193 2194 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2195 sva += PAGE_SIZE) { 2196 vm_page_t m; 2197 2198retry: 2199 /* 2200 * Regardless of whether a pte is 32 or 64 bits in 2201 * size, PG_RW, PG_A, and PG_M are among the least 2202 * significant 32 bits. 2203 */ 2204 obits = pbits = *(u_int *)pte; 2205 if (pbits & PG_MANAGED) { 2206 m = NULL; 2207 if (pbits & PG_A) { 2208 m = PHYS_TO_VM_PAGE(*pte); 2209 vm_page_flag_set(m, PG_REFERENCED); 2210 pbits &= ~PG_A; 2211 } 2212 if ((pbits & PG_M) != 0) { 2213 if (m == NULL) 2214 m = PHYS_TO_VM_PAGE(*pte); 2215 vm_page_dirty(m); 2216 } 2217 } 2218 2219 pbits &= ~(PG_RW | PG_M); 2220 2221 if (pbits != obits) { 2222 if (!atomic_cmpset_int((u_int *)pte, obits, 2223 pbits)) 2224 goto retry; 2225 if (obits & PG_G) 2226 pmap_invalidate_page(pmap, sva); 2227 else 2228 anychanged = 1; 2229 } 2230 } 2231 } 2232 sched_unpin(); 2233 vm_page_unlock_queues(); 2234 if (anychanged) 2235 pmap_invalidate_all(pmap); 2236 PMAP_UNLOCK(pmap); 2237} 2238 2239/* 2240 * Insert the given physical page (p) at 2241 * the specified virtual address (v) in the 2242 * target physical map with the protection requested. 2243 * 2244 * If specified, the page will be wired down, meaning 2245 * that the related pte can not be reclaimed. 2246 * 2247 * NB: This is the only routine which MAY NOT lazy-evaluate 2248 * or lose information. That is, this routine must actually 2249 * insert this page into the given map NOW. 2250 */ 2251void 2252pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 2253 boolean_t wired) 2254{ 2255 vm_paddr_t pa; 2256 pd_entry_t *pde; 2257 pt_entry_t *pte; 2258 vm_paddr_t opa; 2259 pt_entry_t origpte, newpte; 2260 vm_page_t mpte, om; 2261 boolean_t invlva; 2262 2263 va &= PG_FRAME; 2264#ifdef PMAP_DIAGNOSTIC 2265 if (va > VM_MAX_KERNEL_ADDRESS) 2266 panic("pmap_enter: toobig"); 2267 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS)) 2268 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va); 2269#endif 2270 2271 mpte = NULL; 2272 2273 vm_page_lock_queues(); 2274 PMAP_LOCK(pmap); 2275 sched_pin(); 2276 2277 /* 2278 * In the case that a page table page is not 2279 * resident, we are creating it here. 2280 */ 2281 if (va < VM_MAXUSER_ADDRESS) { 2282 mpte = pmap_allocpte(pmap, va, M_WAITOK); 2283 } 2284#if 0 && defined(PMAP_DIAGNOSTIC) 2285 else { 2286 pd_entry_t *pdeaddr = pmap_pde(pmap, va); 2287 origpte = *pdeaddr; 2288 if ((origpte & PG_V) == 0) { 2289 panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n", 2290 pmap->pm_pdir[PTDPTDI], origpte, va); 2291 } 2292 } 2293#endif 2294 2295 pde = pmap_pde(pmap, va); 2296 if ((*pde & PG_PS) != 0) 2297 panic("pmap_enter: attempted pmap_enter on 4MB page"); 2298 pte = pmap_pte_quick(pmap, va); 2299 2300 /* 2301 * Page Directory table entry not valid, we need a new PT page 2302 */ 2303 if (pte == NULL) { 2304 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n", 2305 (uintmax_t)pmap->pm_pdir[PTDPTDI], va); 2306 } 2307 2308 pa = VM_PAGE_TO_PHYS(m); 2309 om = NULL; 2310 origpte = *pte; 2311 opa = origpte & PG_FRAME; 2312 2313 /* 2314 * Mapping has not changed, must be protection or wiring change. 2315 */ 2316 if (origpte && (opa == pa)) { 2317 /* 2318 * Wiring change, just update stats. We don't worry about 2319 * wiring PT pages as they remain resident as long as there 2320 * are valid mappings in them. Hence, if a user page is wired, 2321 * the PT page will be also. 2322 */ 2323 if (wired && ((origpte & PG_W) == 0)) 2324 pmap->pm_stats.wired_count++; 2325 else if (!wired && (origpte & PG_W)) 2326 pmap->pm_stats.wired_count--; 2327 2328 /* 2329 * Remove extra pte reference 2330 */ 2331 if (mpte) 2332 mpte->wire_count--; 2333 2334 /* 2335 * We might be turning off write access to the page, 2336 * so we go ahead and sense modify status. 2337 */ 2338 if (origpte & PG_MANAGED) { 2339 om = m; 2340 pa |= PG_MANAGED; 2341 } 2342 goto validate; 2343 } 2344 /* 2345 * Mapping has changed, invalidate old range and fall through to 2346 * handle validating new mapping. 2347 */ 2348 if (opa) { 2349 if (origpte & PG_W) 2350 pmap->pm_stats.wired_count--; 2351 if (origpte & PG_MANAGED) { 2352 om = PHYS_TO_VM_PAGE(opa); 2353 pmap_remove_entry(pmap, om, va); 2354 } 2355 if (mpte != NULL) { 2356 mpte->wire_count--; 2357 KASSERT(mpte->wire_count > 0, 2358 ("pmap_enter: missing reference to page table page," 2359 " va: 0x%x", va)); 2360 } 2361 } else 2362 pmap->pm_stats.resident_count++; 2363 2364 /* 2365 * Enter on the PV list if part of our managed memory. 2366 */ 2367 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 2368 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva, 2369 ("pmap_enter: managed mapping within the clean submap")); 2370 pmap_insert_entry(pmap, va, m); 2371 pa |= PG_MANAGED; 2372 } 2373 2374 /* 2375 * Increment counters 2376 */ 2377 if (wired) 2378 pmap->pm_stats.wired_count++; 2379 2380validate: 2381 /* 2382 * Now validate mapping with desired protection/wiring. 2383 */ 2384 newpte = (pt_entry_t)(pa | PG_V); 2385 if ((prot & VM_PROT_WRITE) != 0) { 2386 newpte |= PG_RW; 2387 vm_page_flag_set(m, PG_WRITEABLE); 2388 } 2389 if (wired) 2390 newpte |= PG_W; 2391 if (va < VM_MAXUSER_ADDRESS) 2392 newpte |= PG_U; 2393 if (pmap == kernel_pmap) 2394 newpte |= pgeflag; 2395 2396 /* 2397 * if the mapping or permission bits are different, we need 2398 * to update the pte. 2399 */ 2400 if ((origpte & ~(PG_M|PG_A)) != newpte) { 2401 if (origpte & PG_V) { 2402 invlva = FALSE; 2403 origpte = pte_load_store(pte, newpte | PG_A); 2404 if (origpte & PG_A) { 2405 if (origpte & PG_MANAGED) 2406 vm_page_flag_set(om, PG_REFERENCED); 2407 if (opa != VM_PAGE_TO_PHYS(m)) 2408 invlva = TRUE; 2409 } 2410 if (origpte & PG_M) { 2411 KASSERT((origpte & PG_RW), 2412 ("pmap_enter: modified page not writable: va: %#x, pte: %#jx", 2413 va, (uintmax_t)origpte)); 2414 if ((origpte & PG_MANAGED) != 0) 2415 vm_page_dirty(om); 2416 if ((prot & VM_PROT_WRITE) == 0) 2417 invlva = TRUE; 2418 } 2419 if (invlva) 2420 pmap_invalidate_page(pmap, va); 2421 } else 2422 pte_store(pte, newpte | PG_A); 2423 } 2424 sched_unpin(); 2425 vm_page_unlock_queues(); 2426 PMAP_UNLOCK(pmap); 2427} 2428 2429/* 2430 * Maps a sequence of resident pages belonging to the same object. 2431 * The sequence begins with the given page m_start. This page is 2432 * mapped at the given virtual address start. Each subsequent page is 2433 * mapped at a virtual address that is offset from start by the same 2434 * amount as the page is offset from m_start within the object. The 2435 * last page in the sequence is the page with the largest offset from 2436 * m_start that can be mapped at a virtual address less than the given 2437 * virtual address end. Not every virtual page between start and end 2438 * is mapped; only those for which a resident page exists with the 2439 * corresponding offset from m_start are mapped. 2440 */ 2441void 2442pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, 2443 vm_page_t m_start, vm_prot_t prot) 2444{ 2445 vm_page_t m, mpte; 2446 vm_pindex_t diff, psize; 2447 2448 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED); 2449 psize = atop(end - start); 2450 mpte = NULL; 2451 m = m_start; 2452 PMAP_LOCK(pmap); 2453 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { 2454 mpte = pmap_enter_quick_locked(pmap, start + ptoa(diff), m, 2455 prot, mpte); 2456 m = TAILQ_NEXT(m, listq); 2457 } 2458 PMAP_UNLOCK(pmap); 2459} 2460 2461/* 2462 * this code makes some *MAJOR* assumptions: 2463 * 1. Current pmap & pmap exists. 2464 * 2. Not wired. 2465 * 3. Read access. 2466 * 4. No page table pages. 2467 * but is *MUCH* faster than pmap_enter... 2468 */ 2469 2470void 2471pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 2472{ 2473 2474 PMAP_LOCK(pmap); 2475 (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL); 2476 PMAP_UNLOCK(pmap); 2477} 2478 2479static vm_page_t 2480pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, 2481 vm_prot_t prot, vm_page_t mpte) 2482{ 2483 pt_entry_t *pte; 2484 vm_paddr_t pa; 2485 2486 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva || 2487 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0, 2488 ("pmap_enter_quick_locked: managed mapping within the clean submap")); 2489 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2490 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2491 2492 /* 2493 * In the case that a page table page is not 2494 * resident, we are creating it here. 2495 */ 2496 if (va < VM_MAXUSER_ADDRESS) { 2497 unsigned ptepindex; 2498 pd_entry_t ptepa; 2499 2500 /* 2501 * Calculate pagetable page index 2502 */ 2503 ptepindex = va >> PDRSHIFT; 2504 if (mpte && (mpte->pindex == ptepindex)) { 2505 mpte->wire_count++; 2506 } else { 2507 /* 2508 * Get the page directory entry 2509 */ 2510 ptepa = pmap->pm_pdir[ptepindex]; 2511 2512 /* 2513 * If the page table page is mapped, we just increment 2514 * the hold count, and activate it. 2515 */ 2516 if (ptepa) { 2517 if (ptepa & PG_PS) 2518 panic("pmap_enter_quick: unexpected mapping into 4MB page"); 2519 mpte = PHYS_TO_VM_PAGE(ptepa); 2520 mpte->wire_count++; 2521 } else { 2522 mpte = _pmap_allocpte(pmap, ptepindex, 2523 M_NOWAIT); 2524 if (mpte == NULL) 2525 return (mpte); 2526 } 2527 } 2528 } else { 2529 mpte = NULL; 2530 } 2531 2532 /* 2533 * This call to vtopte makes the assumption that we are 2534 * entering the page into the current pmap. In order to support 2535 * quick entry into any pmap, one would likely use pmap_pte_quick. 2536 * But that isn't as quick as vtopte. 2537 */ 2538 pte = vtopte(va); 2539 if (*pte) { 2540 if (mpte != NULL) { 2541 pmap_unwire_pte_hold(pmap, mpte); 2542 mpte = NULL; 2543 } 2544 return (mpte); 2545 } 2546 2547 /* 2548 * Enter on the PV list if part of our managed memory. 2549 */ 2550 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 && 2551 !pmap_try_insert_pv_entry(pmap, va, m)) { 2552 if (mpte != NULL) { 2553 pmap_unwire_pte_hold(pmap, mpte); 2554 mpte = NULL; 2555 } 2556 return (mpte); 2557 } 2558 2559 /* 2560 * Increment counters 2561 */ 2562 pmap->pm_stats.resident_count++; 2563 2564 pa = VM_PAGE_TO_PHYS(m); 2565 2566 /* 2567 * Now validate mapping with RO protection 2568 */ 2569 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 2570 pte_store(pte, pa | PG_V | PG_U); 2571 else 2572 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 2573 return mpte; 2574} 2575 2576/* 2577 * Make a temporary mapping for a physical address. This is only intended 2578 * to be used for panic dumps. 2579 */ 2580void * 2581pmap_kenter_temporary(vm_paddr_t pa, int i) 2582{ 2583 vm_offset_t va; 2584 2585 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 2586 pmap_kenter(va, pa); 2587 invlpg(va); 2588 return ((void *)crashdumpmap); 2589} 2590 2591/* 2592 * This code maps large physical mmap regions into the 2593 * processor address space. Note that some shortcuts 2594 * are taken, but the code works. 2595 */ 2596void 2597pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 2598 vm_object_t object, vm_pindex_t pindex, 2599 vm_size_t size) 2600{ 2601 vm_page_t p; 2602 2603 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 2604 KASSERT(object->type == OBJT_DEVICE, 2605 ("pmap_object_init_pt: non-device object")); 2606 if (pseflag && 2607 ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) { 2608 int i; 2609 vm_page_t m[1]; 2610 unsigned int ptepindex; 2611 int npdes; 2612 pd_entry_t ptepa; 2613 2614 PMAP_LOCK(pmap); 2615 if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)]) 2616 goto out; 2617 PMAP_UNLOCK(pmap); 2618retry: 2619 p = vm_page_lookup(object, pindex); 2620 if (p != NULL) { 2621 if (vm_page_sleep_if_busy(p, FALSE, "init4p")) 2622 goto retry; 2623 } else { 2624 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL); 2625 if (p == NULL) 2626 return; 2627 m[0] = p; 2628 2629 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) { 2630 vm_page_lock_queues(); 2631 vm_page_free(p); 2632 vm_page_unlock_queues(); 2633 return; 2634 } 2635 2636 p = vm_page_lookup(object, pindex); 2637 vm_page_lock_queues(); 2638 vm_page_wakeup(p); 2639 vm_page_unlock_queues(); 2640 } 2641 2642 ptepa = VM_PAGE_TO_PHYS(p); 2643 if (ptepa & (NBPDR - 1)) 2644 return; 2645 2646 p->valid = VM_PAGE_BITS_ALL; 2647 2648 PMAP_LOCK(pmap); 2649 pmap->pm_stats.resident_count += size >> PAGE_SHIFT; 2650 npdes = size >> PDRSHIFT; 2651 for(i = 0; i < npdes; i++) { 2652 pde_store(&pmap->pm_pdir[ptepindex], 2653 ptepa | PG_U | PG_RW | PG_V | PG_PS); 2654 ptepa += NBPDR; 2655 ptepindex += 1; 2656 } 2657 pmap_invalidate_all(pmap); 2658out: 2659 PMAP_UNLOCK(pmap); 2660 } 2661} 2662 2663/* 2664 * Routine: pmap_change_wiring 2665 * Function: Change the wiring attribute for a map/virtual-address 2666 * pair. 2667 * In/out conditions: 2668 * The mapping must already exist in the pmap. 2669 */ 2670void 2671pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired) 2672{ 2673 pt_entry_t *pte; 2674 2675 PMAP_LOCK(pmap); 2676 pte = pmap_pte(pmap, va); 2677 2678 if (wired && !pmap_pte_w(pte)) 2679 pmap->pm_stats.wired_count++; 2680 else if (!wired && pmap_pte_w(pte)) 2681 pmap->pm_stats.wired_count--; 2682 2683 /* 2684 * Wiring is not a hardware characteristic so there is no need to 2685 * invalidate TLB. 2686 */ 2687 pmap_pte_set_w(pte, wired); 2688 pmap_pte_release(pte); 2689 PMAP_UNLOCK(pmap); 2690} 2691 2692 2693 2694/* 2695 * Copy the range specified by src_addr/len 2696 * from the source map to the range dst_addr/len 2697 * in the destination map. 2698 * 2699 * This routine is only advisory and need not do anything. 2700 */ 2701 2702void 2703pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 2704 vm_offset_t src_addr) 2705{ 2706 vm_offset_t addr; 2707 vm_offset_t end_addr = src_addr + len; 2708 vm_offset_t pdnxt; 2709 2710 if (dst_addr != src_addr) 2711 return; 2712 2713 if (!pmap_is_current(src_pmap)) 2714 return; 2715 2716 vm_page_lock_queues(); 2717 if (dst_pmap < src_pmap) { 2718 PMAP_LOCK(dst_pmap); 2719 PMAP_LOCK(src_pmap); 2720 } else { 2721 PMAP_LOCK(src_pmap); 2722 PMAP_LOCK(dst_pmap); 2723 } 2724 sched_pin(); 2725 for (addr = src_addr; addr < end_addr; addr = pdnxt) { 2726 pt_entry_t *src_pte, *dst_pte; 2727 vm_page_t dstmpte, srcmpte; 2728 pd_entry_t srcptepaddr; 2729 unsigned ptepindex; 2730 2731 if (addr >= UPT_MIN_ADDRESS) 2732 panic("pmap_copy: invalid to pmap_copy page tables"); 2733 2734 pdnxt = (addr + NBPDR) & ~PDRMASK; 2735 ptepindex = addr >> PDRSHIFT; 2736 2737 srcptepaddr = src_pmap->pm_pdir[ptepindex]; 2738 if (srcptepaddr == 0) 2739 continue; 2740 2741 if (srcptepaddr & PG_PS) { 2742 if (dst_pmap->pm_pdir[ptepindex] == 0) { 2743 dst_pmap->pm_pdir[ptepindex] = srcptepaddr & 2744 ~PG_W; 2745 dst_pmap->pm_stats.resident_count += 2746 NBPDR / PAGE_SIZE; 2747 } 2748 continue; 2749 } 2750 2751 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr); 2752 if (srcmpte->wire_count == 0) 2753 panic("pmap_copy: source page table page is unused"); 2754 2755 if (pdnxt > end_addr) 2756 pdnxt = end_addr; 2757 2758 src_pte = vtopte(addr); 2759 while (addr < pdnxt) { 2760 pt_entry_t ptetemp; 2761 ptetemp = *src_pte; 2762 /* 2763 * we only virtual copy managed pages 2764 */ 2765 if ((ptetemp & PG_MANAGED) != 0) { 2766 dstmpte = pmap_allocpte(dst_pmap, addr, 2767 M_NOWAIT); 2768 if (dstmpte == NULL) 2769 break; 2770 dst_pte = pmap_pte_quick(dst_pmap, addr); 2771 if (*dst_pte == 0 && 2772 pmap_try_insert_pv_entry(dst_pmap, addr, 2773 PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) { 2774 /* 2775 * Clear the wired, modified, and 2776 * accessed (referenced) bits 2777 * during the copy. 2778 */ 2779 *dst_pte = ptetemp & ~(PG_W | PG_M | 2780 PG_A); 2781 dst_pmap->pm_stats.resident_count++; 2782 } else 2783 pmap_unwire_pte_hold(dst_pmap, dstmpte); 2784 if (dstmpte->wire_count >= srcmpte->wire_count) 2785 break; 2786 } 2787 addr += PAGE_SIZE; 2788 src_pte++; 2789 } 2790 } 2791 sched_unpin(); 2792 vm_page_unlock_queues(); 2793 PMAP_UNLOCK(src_pmap); 2794 PMAP_UNLOCK(dst_pmap); 2795} 2796 2797static __inline void 2798pagezero(void *page) 2799{ 2800#if defined(I686_CPU) 2801 if (cpu_class == CPUCLASS_686) { 2802#if defined(CPU_ENABLE_SSE) 2803 if (cpu_feature & CPUID_SSE2) 2804 sse2_pagezero(page); 2805 else 2806#endif 2807 i686_pagezero(page); 2808 } else 2809#endif 2810 bzero(page, PAGE_SIZE); 2811} 2812 2813/* 2814 * pmap_zero_page zeros the specified hardware page by mapping 2815 * the page into KVM and using bzero to clear its contents. 2816 */ 2817void 2818pmap_zero_page(vm_page_t m) 2819{ 2820 struct sysmaps *sysmaps; 2821 2822 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2823 mtx_lock(&sysmaps->lock); 2824 if (*sysmaps->CMAP2) 2825 panic("pmap_zero_page: CMAP2 busy"); 2826 sched_pin(); 2827 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2828 invlcaddr(sysmaps->CADDR2); 2829 pagezero(sysmaps->CADDR2); 2830 *sysmaps->CMAP2 = 0; 2831 sched_unpin(); 2832 mtx_unlock(&sysmaps->lock); 2833} 2834 2835/* 2836 * pmap_zero_page_area zeros the specified hardware page by mapping 2837 * the page into KVM and using bzero to clear its contents. 2838 * 2839 * off and size may not cover an area beyond a single hardware page. 2840 */ 2841void 2842pmap_zero_page_area(vm_page_t m, int off, int size) 2843{ 2844 struct sysmaps *sysmaps; 2845 2846 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2847 mtx_lock(&sysmaps->lock); 2848 if (*sysmaps->CMAP2) 2849 panic("pmap_zero_page: CMAP2 busy"); 2850 sched_pin(); 2851 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2852 invlcaddr(sysmaps->CADDR2); 2853 if (off == 0 && size == PAGE_SIZE) 2854 pagezero(sysmaps->CADDR2); 2855 else 2856 bzero((char *)sysmaps->CADDR2 + off, size); 2857 *sysmaps->CMAP2 = 0; 2858 sched_unpin(); 2859 mtx_unlock(&sysmaps->lock); 2860} 2861 2862/* 2863 * pmap_zero_page_idle zeros the specified hardware page by mapping 2864 * the page into KVM and using bzero to clear its contents. This 2865 * is intended to be called from the vm_pagezero process only and 2866 * outside of Giant. 2867 */ 2868void 2869pmap_zero_page_idle(vm_page_t m) 2870{ 2871 2872 if (*CMAP3) 2873 panic("pmap_zero_page: CMAP3 busy"); 2874 sched_pin(); 2875 *CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2876 invlcaddr(CADDR3); 2877 pagezero(CADDR3); 2878 *CMAP3 = 0; 2879 sched_unpin(); 2880} 2881 2882/* 2883 * pmap_copy_page copies the specified (machine independent) 2884 * page by mapping the page into virtual memory and using 2885 * bcopy to copy the page, one machine dependent page at a 2886 * time. 2887 */ 2888void 2889pmap_copy_page(vm_page_t src, vm_page_t dst) 2890{ 2891 struct sysmaps *sysmaps; 2892 2893 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 2894 mtx_lock(&sysmaps->lock); 2895 if (*sysmaps->CMAP1) 2896 panic("pmap_copy_page: CMAP1 busy"); 2897 if (*sysmaps->CMAP2) 2898 panic("pmap_copy_page: CMAP2 busy"); 2899 sched_pin(); 2900 invlpg((u_int)sysmaps->CADDR1); 2901 invlpg((u_int)sysmaps->CADDR2); 2902 *sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A; 2903 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M; 2904 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); 2905 *sysmaps->CMAP1 = 0; 2906 *sysmaps->CMAP2 = 0; 2907 sched_unpin(); 2908 mtx_unlock(&sysmaps->lock); 2909} 2910 2911/* 2912 * Returns true if the pmap's pv is one of the first 2913 * 16 pvs linked to from this page. This count may 2914 * be changed upwards or downwards in the future; it 2915 * is only necessary that true be returned for a small 2916 * subset of pmaps for proper page aging. 2917 */ 2918boolean_t 2919pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 2920{ 2921 pv_entry_t pv; 2922 int loops = 0; 2923 2924 if (m->flags & PG_FICTITIOUS) 2925 return FALSE; 2926 2927 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2928 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2929 if (PV_PMAP(pv) == pmap) { 2930 return TRUE; 2931 } 2932 loops++; 2933 if (loops >= 16) 2934 break; 2935 } 2936 return (FALSE); 2937} 2938 2939/* 2940 * Remove all pages from specified address space 2941 * this aids process exit speeds. Also, this code 2942 * is special cased for current process only, but 2943 * can have the more generic (and slightly slower) 2944 * mode enabled. This is much faster than pmap_remove 2945 * in the case of running down an entire address space. 2946 */ 2947void 2948pmap_remove_pages(pmap_t pmap) 2949{ 2950 pt_entry_t *pte, tpte; 2951 vm_page_t m; 2952 pv_entry_t pv; 2953 struct pv_chunk *pc, *npc; 2954 int field, idx; 2955 int32_t bit; 2956 uint32_t inuse, bitmask; 2957 int allfree; 2958 2959 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { 2960 printf("warning: pmap_remove_pages called with non-current pmap\n"); 2961 return; 2962 } 2963 vm_page_lock_queues(); 2964 PMAP_LOCK(pmap); 2965 sched_pin(); 2966 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) { 2967 allfree = 1; 2968 for (field = 0; field < _NPCM; field++) { 2969 inuse = (~(pc->pc_map[field])) & pc_freemask[field]; 2970 while (inuse != 0) { 2971 bit = bsfl(inuse); 2972 bitmask = 1UL << bit; 2973 idx = field * 32 + bit; 2974 pv = &pc->pc_pventry[idx]; 2975 inuse &= ~bitmask; 2976 2977 pte = vtopte(pv->pv_va); 2978 tpte = *pte; 2979 2980 if (tpte == 0) { 2981 printf( 2982 "TPTE at %p IS ZERO @ VA %08x\n", 2983 pte, pv->pv_va); 2984 panic("bad pte"); 2985 } 2986 2987/* 2988 * We cannot remove wired pages from a process' mapping at this time 2989 */ 2990 if (tpte & PG_W) { 2991 allfree = 0; 2992 continue; 2993 } 2994 2995 m = PHYS_TO_VM_PAGE(tpte); 2996 KASSERT(m->phys_addr == (tpte & PG_FRAME), 2997 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 2998 m, (uintmax_t)m->phys_addr, 2999 (uintmax_t)tpte)); 3000 3001 KASSERT(m < &vm_page_array[vm_page_array_size], 3002 ("pmap_remove_pages: bad tpte %#jx", 3003 (uintmax_t)tpte)); 3004 3005 pmap->pm_stats.resident_count--; 3006 3007 pte_clear(pte); 3008 3009 /* 3010 * Update the vm_page_t clean/reference bits. 3011 */ 3012 if (tpte & PG_M) 3013 vm_page_dirty(m); 3014 3015 /* Mark free */ 3016 PV_STAT(pv_entry_frees++); 3017 PV_STAT(pv_entry_spare++); 3018 pv_entry_count--; 3019 pc->pc_map[field] |= bitmask; 3020 m->md.pv_list_count--; 3021 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3022 if (TAILQ_EMPTY(&m->md.pv_list)) 3023 vm_page_flag_clear(m, PG_WRITEABLE); 3024 3025 pmap_unuse_pt(pmap, pv->pv_va); 3026 } 3027 } 3028 if (allfree) { 3029 PV_STAT(pv_entry_spare -= _NPCPV); 3030 PV_STAT(pc_chunk_count--); 3031 PV_STAT(pc_chunk_frees++); 3032 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 3033 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 3034 pmap_qremove((vm_offset_t)pc, 1); 3035 vm_page_unwire(m, 0); 3036 vm_page_free(m); 3037 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 3038 } 3039 } 3040 sched_unpin(); 3041 vm_page_unlock_queues(); 3042 pmap_invalidate_all(pmap); 3043 PMAP_UNLOCK(pmap); 3044} 3045 3046/* 3047 * pmap_is_modified: 3048 * 3049 * Return whether or not the specified physical page was modified 3050 * in any physical maps. 3051 */ 3052boolean_t 3053pmap_is_modified(vm_page_t m) 3054{ 3055 pv_entry_t pv; 3056 pt_entry_t *pte; 3057 pmap_t pmap; 3058 boolean_t rv; 3059 3060 rv = FALSE; 3061 if (m->flags & PG_FICTITIOUS) 3062 return (rv); 3063 3064 sched_pin(); 3065 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3066 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3067 pmap = PV_PMAP(pv); 3068 PMAP_LOCK(pmap); 3069 pte = pmap_pte_quick(pmap, pv->pv_va); 3070 rv = (*pte & PG_M) != 0; 3071 PMAP_UNLOCK(pmap); 3072 if (rv) 3073 break; 3074 } 3075 sched_unpin(); 3076 return (rv); 3077} 3078 3079/* 3080 * pmap_is_prefaultable: 3081 * 3082 * Return whether or not the specified virtual address is elgible 3083 * for prefault. 3084 */ 3085boolean_t 3086pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 3087{ 3088 pt_entry_t *pte; 3089 boolean_t rv; 3090 3091 rv = FALSE; 3092 PMAP_LOCK(pmap); 3093 if (*pmap_pde(pmap, addr)) { 3094 pte = vtopte(addr); 3095 rv = *pte == 0; 3096 } 3097 PMAP_UNLOCK(pmap); 3098 return (rv); 3099} 3100 3101/* 3102 * Clear the write and modified bits in each of the given page's mappings. 3103 */ 3104void 3105pmap_remove_write(vm_page_t m) 3106{ 3107 pv_entry_t pv; 3108 pmap_t pmap; 3109 pt_entry_t oldpte, *pte; 3110 3111 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3112 if ((m->flags & PG_FICTITIOUS) != 0 || 3113 (m->flags & PG_WRITEABLE) == 0) 3114 return; 3115 sched_pin(); 3116 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3117 pmap = PV_PMAP(pv); 3118 PMAP_LOCK(pmap); 3119 pte = pmap_pte_quick(pmap, pv->pv_va); 3120retry: 3121 oldpte = *pte; 3122 if ((oldpte & PG_RW) != 0) { 3123 /* 3124 * Regardless of whether a pte is 32 or 64 bits 3125 * in size, PG_RW and PG_M are among the least 3126 * significant 32 bits. 3127 */ 3128 if (!atomic_cmpset_int((u_int *)pte, oldpte, 3129 oldpte & ~(PG_RW | PG_M))) 3130 goto retry; 3131 if ((oldpte & PG_M) != 0) 3132 vm_page_dirty(m); 3133 pmap_invalidate_page(pmap, pv->pv_va); 3134 } 3135 PMAP_UNLOCK(pmap); 3136 } 3137 vm_page_flag_clear(m, PG_WRITEABLE); 3138 sched_unpin(); 3139} 3140 3141/* 3142 * pmap_ts_referenced: 3143 * 3144 * Return a count of reference bits for a page, clearing those bits. 3145 * It is not necessary for every reference bit to be cleared, but it 3146 * is necessary that 0 only be returned when there are truly no 3147 * reference bits set. 3148 * 3149 * XXX: The exact number of bits to check and clear is a matter that 3150 * should be tested and standardized at some point in the future for 3151 * optimal aging of shared pages. 3152 */ 3153int 3154pmap_ts_referenced(vm_page_t m) 3155{ 3156 pv_entry_t pv, pvf, pvn; 3157 pmap_t pmap; 3158 pt_entry_t *pte; 3159 int rtval = 0; 3160 3161 if (m->flags & PG_FICTITIOUS) 3162 return (rtval); 3163 sched_pin(); 3164 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3165 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 3166 pvf = pv; 3167 do { 3168 pvn = TAILQ_NEXT(pv, pv_list); 3169 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3170 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 3171 pmap = PV_PMAP(pv); 3172 PMAP_LOCK(pmap); 3173 pte = pmap_pte_quick(pmap, pv->pv_va); 3174 if ((*pte & PG_A) != 0) { 3175 atomic_clear_int((u_int *)pte, PG_A); 3176 pmap_invalidate_page(pmap, pv->pv_va); 3177 rtval++; 3178 if (rtval > 4) 3179 pvn = NULL; 3180 } 3181 PMAP_UNLOCK(pmap); 3182 } while ((pv = pvn) != NULL && pv != pvf); 3183 } 3184 sched_unpin(); 3185 return (rtval); 3186} 3187 3188/* 3189 * Clear the modify bits on the specified physical page. 3190 */ 3191void 3192pmap_clear_modify(vm_page_t m) 3193{ 3194 pv_entry_t pv; 3195 pmap_t pmap; 3196 pt_entry_t *pte; 3197 3198 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3199 if ((m->flags & PG_FICTITIOUS) != 0) 3200 return; 3201 sched_pin(); 3202 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3203 pmap = PV_PMAP(pv); 3204 PMAP_LOCK(pmap); 3205 pte = pmap_pte_quick(pmap, pv->pv_va); 3206 if ((*pte & PG_M) != 0) { 3207 /* 3208 * Regardless of whether a pte is 32 or 64 bits 3209 * in size, PG_M is among the least significant 3210 * 32 bits. 3211 */ 3212 atomic_clear_int((u_int *)pte, PG_M); 3213 pmap_invalidate_page(pmap, pv->pv_va); 3214 } 3215 PMAP_UNLOCK(pmap); 3216 } 3217 sched_unpin(); 3218} 3219 3220/* 3221 * pmap_clear_reference: 3222 * 3223 * Clear the reference bit on the specified physical page. 3224 */ 3225void 3226pmap_clear_reference(vm_page_t m) 3227{ 3228 pv_entry_t pv; 3229 pmap_t pmap; 3230 pt_entry_t *pte; 3231 3232 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3233 if ((m->flags & PG_FICTITIOUS) != 0) 3234 return; 3235 sched_pin(); 3236 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3237 pmap = PV_PMAP(pv); 3238 PMAP_LOCK(pmap); 3239 pte = pmap_pte_quick(pmap, pv->pv_va); 3240 if ((*pte & PG_A) != 0) { 3241 /* 3242 * Regardless of whether a pte is 32 or 64 bits 3243 * in size, PG_A is among the least significant 3244 * 32 bits. 3245 */ 3246 atomic_clear_int((u_int *)pte, PG_A); 3247 pmap_invalidate_page(pmap, pv->pv_va); 3248 } 3249 PMAP_UNLOCK(pmap); 3250 } 3251 sched_unpin(); 3252} 3253 3254/* 3255 * Miscellaneous support routines follow 3256 */ 3257 3258/* 3259 * Map a set of physical memory pages into the kernel virtual 3260 * address space. Return a pointer to where it is mapped. This 3261 * routine is intended to be used for mapping device memory, 3262 * NOT real memory. 3263 */ 3264void * 3265pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode) 3266{ 3267 vm_offset_t va, tmpva, offset; 3268 3269 offset = pa & PAGE_MASK; 3270 size = roundup(offset + size, PAGE_SIZE); 3271 pa = pa & PG_FRAME; 3272 3273 if (pa < KERNLOAD && pa + size <= KERNLOAD) 3274 va = KERNBASE + pa; 3275 else 3276 va = kmem_alloc_nofault(kernel_map, size); 3277 if (!va) 3278 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 3279 3280 for (tmpva = va; size > 0; ) { 3281 pmap_kenter_attr(tmpva, pa, mode); 3282 size -= PAGE_SIZE; 3283 tmpva += PAGE_SIZE; 3284 pa += PAGE_SIZE; 3285 } 3286 pmap_invalidate_range(kernel_pmap, va, tmpva); 3287 pmap_invalidate_cache(); 3288 return ((void *)(va + offset)); 3289} 3290 3291void * 3292pmap_mapdev(vm_paddr_t pa, vm_size_t size) 3293{ 3294 3295 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE)); 3296} 3297 3298void * 3299pmap_mapbios(vm_paddr_t pa, vm_size_t size) 3300{ 3301 3302 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK)); 3303} 3304 3305void 3306pmap_unmapdev(vm_offset_t va, vm_size_t size) 3307{ 3308 vm_offset_t base, offset, tmpva; 3309 3310 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD) 3311 return; 3312 base = va & PG_FRAME; 3313 offset = va & PAGE_MASK; 3314 size = roundup(offset + size, PAGE_SIZE); 3315 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 3316 pmap_kremove(tmpva); 3317 pmap_invalidate_range(kernel_pmap, va, tmpva); 3318 kmem_free(kernel_map, base, size); 3319} 3320 3321int 3322pmap_change_attr(va, size, mode) 3323 vm_offset_t va; 3324 vm_size_t size; 3325 int mode; 3326{ 3327 vm_offset_t base, offset, tmpva; 3328 pt_entry_t *pte; 3329 u_int opte, npte; 3330 pd_entry_t *pde; 3331 3332 base = va & PG_FRAME; 3333 offset = va & PAGE_MASK; 3334 size = roundup(offset + size, PAGE_SIZE); 3335 3336 /* Only supported on kernel virtual addresses. */ 3337 if (base <= VM_MAXUSER_ADDRESS) 3338 return (EINVAL); 3339 3340 /* 4MB pages and pages that aren't mapped aren't supported. */ 3341 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) { 3342 pde = pmap_pde(kernel_pmap, tmpva); 3343 if (*pde & PG_PS) 3344 return (EINVAL); 3345 if (*pde == 0) 3346 return (EINVAL); 3347 pte = vtopte(va); 3348 if (*pte == 0) 3349 return (EINVAL); 3350 } 3351 3352 /* 3353 * Ok, all the pages exist and are 4k, so run through them updating 3354 * their cache mode. 3355 */ 3356 for (tmpva = base; size > 0; ) { 3357 pte = vtopte(tmpva); 3358 3359 /* 3360 * The cache mode bits are all in the low 32-bits of the 3361 * PTE, so we can just spin on updating the low 32-bits. 3362 */ 3363 do { 3364 opte = *(u_int *)pte; 3365 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT); 3366 npte |= pmap_cache_bits(mode, 0); 3367 } while (npte != opte && 3368 !atomic_cmpset_int((u_int *)pte, opte, npte)); 3369 tmpva += PAGE_SIZE; 3370 size -= PAGE_SIZE; 3371 } 3372 3373 /* 3374 * Flush CPU caches to make sure any data isn't cached that shouldn't 3375 * be, etc. 3376 */ 3377 pmap_invalidate_range(kernel_pmap, base, tmpva); 3378 pmap_invalidate_cache(); 3379 return (0); 3380} 3381 3382/* 3383 * perform the pmap work for mincore 3384 */ 3385int 3386pmap_mincore(pmap_t pmap, vm_offset_t addr) 3387{ 3388 pt_entry_t *ptep, pte; 3389 vm_page_t m; 3390 int val = 0; 3391 3392 PMAP_LOCK(pmap); 3393 ptep = pmap_pte(pmap, addr); 3394 pte = (ptep != NULL) ? *ptep : 0; 3395 pmap_pte_release(ptep); 3396 PMAP_UNLOCK(pmap); 3397 3398 if (pte != 0) { 3399 vm_paddr_t pa; 3400 3401 val = MINCORE_INCORE; 3402 if ((pte & PG_MANAGED) == 0) 3403 return val; 3404 3405 pa = pte & PG_FRAME; 3406 3407 m = PHYS_TO_VM_PAGE(pa); 3408 3409 /* 3410 * Modified by us 3411 */ 3412 if (pte & PG_M) 3413 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 3414 else { 3415 /* 3416 * Modified by someone else 3417 */ 3418 vm_page_lock_queues(); 3419 if (m->dirty || pmap_is_modified(m)) 3420 val |= MINCORE_MODIFIED_OTHER; 3421 vm_page_unlock_queues(); 3422 } 3423 /* 3424 * Referenced by us 3425 */ 3426 if (pte & PG_A) 3427 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 3428 else { 3429 /* 3430 * Referenced by someone else 3431 */ 3432 vm_page_lock_queues(); 3433 if ((m->flags & PG_REFERENCED) || 3434 pmap_ts_referenced(m)) { 3435 val |= MINCORE_REFERENCED_OTHER; 3436 vm_page_flag_set(m, PG_REFERENCED); 3437 } 3438 vm_page_unlock_queues(); 3439 } 3440 } 3441 return val; 3442} 3443 3444void 3445pmap_activate(struct thread *td) 3446{ 3447 pmap_t pmap, oldpmap; 3448 u_int32_t cr3; 3449 3450 critical_enter(); 3451 pmap = vmspace_pmap(td->td_proc->p_vmspace); 3452 oldpmap = PCPU_GET(curpmap); 3453#if defined(SMP) 3454 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 3455 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 3456#else 3457 oldpmap->pm_active &= ~1; 3458 pmap->pm_active |= 1; 3459#endif 3460#ifdef PAE 3461 cr3 = vtophys(pmap->pm_pdpt); 3462#else 3463 cr3 = vtophys(pmap->pm_pdir); 3464#endif 3465 /* 3466 * pmap_activate is for the current thread on the current cpu 3467 */ 3468 td->td_pcb->pcb_cr3 = cr3; 3469 load_cr3(cr3); 3470 PCPU_SET(curpmap, pmap); 3471 critical_exit(); 3472} 3473 3474vm_offset_t 3475pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size) 3476{ 3477 3478 if ((obj == NULL) || (size < NBPDR) || (obj->type != OBJT_DEVICE)) { 3479 return addr; 3480 } 3481 3482 addr = (addr + PDRMASK) & ~PDRMASK; 3483 return addr; 3484} 3485 3486 3487#if defined(PMAP_DEBUG) 3488pmap_pid_dump(int pid) 3489{ 3490 pmap_t pmap; 3491 struct proc *p; 3492 int npte = 0; 3493 int index; 3494 3495 sx_slock(&allproc_lock); 3496 FOREACH_PROC_IN_SYSTEM(p) { 3497 if (p->p_pid != pid) 3498 continue; 3499 3500 if (p->p_vmspace) { 3501 int i,j; 3502 index = 0; 3503 pmap = vmspace_pmap(p->p_vmspace); 3504 for (i = 0; i < NPDEPTD; i++) { 3505 pd_entry_t *pde; 3506 pt_entry_t *pte; 3507 vm_offset_t base = i << PDRSHIFT; 3508 3509 pde = &pmap->pm_pdir[i]; 3510 if (pde && pmap_pde_v(pde)) { 3511 for (j = 0; j < NPTEPG; j++) { 3512 vm_offset_t va = base + (j << PAGE_SHIFT); 3513 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 3514 if (index) { 3515 index = 0; 3516 printf("\n"); 3517 } 3518 sx_sunlock(&allproc_lock); 3519 return npte; 3520 } 3521 pte = pmap_pte(pmap, va); 3522 if (pte && pmap_pte_v(pte)) { 3523 pt_entry_t pa; 3524 vm_page_t m; 3525 pa = *pte; 3526 m = PHYS_TO_VM_PAGE(pa); 3527 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 3528 va, pa, m->hold_count, m->wire_count, m->flags); 3529 npte++; 3530 index++; 3531 if (index >= 2) { 3532 index = 0; 3533 printf("\n"); 3534 } else { 3535 printf(" "); 3536 } 3537 } 3538 } 3539 } 3540 } 3541 } 3542 } 3543 sx_sunlock(&allproc_lock); 3544 return npte; 3545} 3546#endif 3547 3548#if defined(DEBUG) 3549 3550static void pads(pmap_t pm); 3551void pmap_pvdump(vm_offset_t pa); 3552 3553/* print address space of pmap*/ 3554static void 3555pads(pmap_t pm) 3556{ 3557 int i, j; 3558 vm_paddr_t va; 3559 pt_entry_t *ptep; 3560 3561 if (pm == kernel_pmap) 3562 return; 3563 for (i = 0; i < NPDEPTD; i++) 3564 if (pm->pm_pdir[i]) 3565 for (j = 0; j < NPTEPG; j++) { 3566 va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 3567 if (pm == kernel_pmap && va < KERNBASE) 3568 continue; 3569 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 3570 continue; 3571 ptep = pmap_pte(pm, va); 3572 if (pmap_pte_v(ptep)) 3573 printf("%x:%x ", va, *ptep); 3574 }; 3575 3576} 3577 3578void 3579pmap_pvdump(vm_paddr_t pa) 3580{ 3581 pv_entry_t pv; 3582 pmap_t pmap; 3583 vm_page_t m; 3584 3585 printf("pa %x", pa); 3586 m = PHYS_TO_VM_PAGE(pa); 3587 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3588 pmap = PV_PMAP(pv); 3589 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va); 3590 pads(pmap); 3591 } 3592 printf(" "); 3593} 3594#endif 3595