pmap.c revision 160889
1/*-
2 * Copyright (c) 1991 Regents of the University of California.
3 * All rights reserved.
4 * Copyright (c) 1994 John S. Dyson
5 * All rights reserved.
6 * Copyright (c) 1994 David Greenman
7 * All rights reserved.
8 * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu>
9 * All rights reserved.
10 *
11 * This code is derived from software contributed to Berkeley by
12 * the Systems Programming Group of the University of Utah Computer
13 * Science Department and William Jolitz of UUNET Technologies Inc.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 * 1. Redistributions of source code must retain the above copyright
19 *    notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 *    notice, this list of conditions and the following disclaimer in the
22 *    documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 *    must display the following acknowledgement:
25 *	This product includes software developed by the University of
26 *	California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 *    may be used to endorse or promote products derived from this software
29 *    without specific prior written permission.
30 *
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
41 * SUCH DAMAGE.
42 *
43 *	from:	@(#)pmap.c	7.7 (Berkeley)	5/12/91
44 */
45/*-
46 * Copyright (c) 2003 Networks Associates Technology, Inc.
47 * All rights reserved.
48 *
49 * This software was developed for the FreeBSD Project by Jake Burkholder,
50 * Safeport Network Services, and Network Associates Laboratories, the
51 * Security Research Division of Network Associates, Inc. under
52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
53 * CHATS research program.
54 *
55 * Redistribution and use in source and binary forms, with or without
56 * modification, are permitted provided that the following conditions
57 * are met:
58 * 1. Redistributions of source code must retain the above copyright
59 *    notice, this list of conditions and the following disclaimer.
60 * 2. Redistributions in binary form must reproduce the above copyright
61 *    notice, this list of conditions and the following disclaimer in the
62 *    documentation and/or other materials provided with the distribution.
63 *
64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
67 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
74 * SUCH DAMAGE.
75 */
76
77#include <sys/cdefs.h>
78__FBSDID("$FreeBSD: head/sys/i386/i386/pmap.c 160889 2006-08-01 19:06:06Z alc $");
79
80/*
81 *	Manages physical address maps.
82 *
83 *	In addition to hardware address maps, this
84 *	module is called upon to provide software-use-only
85 *	maps which may or may not be stored in the same
86 *	form as hardware maps.  These pseudo-maps are
87 *	used to store intermediate results from copy
88 *	operations to and from address spaces.
89 *
90 *	Since the information managed by this module is
91 *	also stored by the logical address mapping module,
92 *	this module may throw away valid virtual-to-physical
93 *	mappings at almost any time.  However, invalidations
94 *	of virtual-to-physical mappings must be done as
95 *	requested.
96 *
97 *	In order to cope with hardware architectures which
98 *	make virtual-to-physical map invalidates expensive,
99 *	this module may delay invalidate or reduced protection
100 *	operations until such time as they are actually
101 *	necessary.  This module is given full information as
102 *	to which processors are currently using which maps,
103 *	and to when physical maps must be made correct.
104 */
105
106#include "opt_cpu.h"
107#include "opt_pmap.h"
108#include "opt_msgbuf.h"
109#include "opt_smp.h"
110#include "opt_xbox.h"
111
112#include <sys/param.h>
113#include <sys/systm.h>
114#include <sys/kernel.h>
115#include <sys/lock.h>
116#include <sys/malloc.h>
117#include <sys/mman.h>
118#include <sys/msgbuf.h>
119#include <sys/mutex.h>
120#include <sys/proc.h>
121#include <sys/sx.h>
122#include <sys/vmmeter.h>
123#include <sys/sched.h>
124#include <sys/sysctl.h>
125#ifdef SMP
126#include <sys/smp.h>
127#endif
128
129#include <vm/vm.h>
130#include <vm/vm_param.h>
131#include <vm/vm_kern.h>
132#include <vm/vm_page.h>
133#include <vm/vm_map.h>
134#include <vm/vm_object.h>
135#include <vm/vm_extern.h>
136#include <vm/vm_pageout.h>
137#include <vm/vm_pager.h>
138#include <vm/uma.h>
139
140#include <machine/cpu.h>
141#include <machine/cputypes.h>
142#include <machine/md_var.h>
143#include <machine/pcb.h>
144#include <machine/specialreg.h>
145#ifdef SMP
146#include <machine/smp.h>
147#endif
148
149#ifdef XBOX
150#include <machine/xbox.h>
151#endif
152
153#if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
154#define CPU_ENABLE_SSE
155#endif
156
157#ifndef PMAP_SHPGPERPROC
158#define PMAP_SHPGPERPROC 200
159#endif
160
161#if defined(DIAGNOSTIC)
162#define PMAP_DIAGNOSTIC
163#endif
164
165#if !defined(PMAP_DIAGNOSTIC)
166#define PMAP_INLINE __inline
167#else
168#define PMAP_INLINE
169#endif
170
171#define PV_STATS
172#ifdef PV_STATS
173#define PV_STAT(x)	do { x ; } while (0)
174#else
175#define PV_STAT(x)	do { } while (0)
176#endif
177
178/*
179 * Get PDEs and PTEs for user/kernel address space
180 */
181#define	pmap_pde(m, v)	(&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT]))
182#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
183
184#define pmap_pde_v(pte)		((*(int *)pte & PG_V) != 0)
185#define pmap_pte_w(pte)		((*(int *)pte & PG_W) != 0)
186#define pmap_pte_m(pte)		((*(int *)pte & PG_M) != 0)
187#define pmap_pte_u(pte)		((*(int *)pte & PG_A) != 0)
188#define pmap_pte_v(pte)		((*(int *)pte & PG_V) != 0)
189
190#define pmap_pte_set_w(pte, v)	((v) ? atomic_set_int((u_int *)(pte), PG_W) : \
191    atomic_clear_int((u_int *)(pte), PG_W))
192#define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v)))
193
194struct pmap kernel_pmap_store;
195LIST_HEAD(pmaplist, pmap);
196static struct pmaplist allpmaps;
197static struct mtx allpmaps_lock;
198
199vm_paddr_t avail_end;	/* PA of last available physical page */
200vm_offset_t virtual_avail;	/* VA of first avail page (after kernel bss) */
201vm_offset_t virtual_end;	/* VA of last avail page (end of kernel AS) */
202int pgeflag = 0;		/* PG_G or-in */
203int pseflag = 0;		/* PG_PS or-in */
204
205static int nkpt;
206vm_offset_t kernel_vm_end;
207extern u_int32_t KERNend;
208
209#ifdef PAE
210static uma_zone_t pdptzone;
211#endif
212
213/*
214 * Data for the pv entry allocation mechanism
215 */
216static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0;
217static int shpgperproc = PMAP_SHPGPERPROC;
218
219struct pv_chunk *pv_chunkbase;		/* KVA block for pv_chunks */
220int pv_maxchunks;			/* How many chunks we have KVA for */
221vm_offset_t pv_vafree;			/* freelist stored in the PTE */
222
223/*
224 * All those kernel PT submaps that BSD is so fond of
225 */
226struct sysmaps {
227	struct	mtx lock;
228	pt_entry_t *CMAP1;
229	pt_entry_t *CMAP2;
230	caddr_t	CADDR1;
231	caddr_t	CADDR2;
232};
233static struct sysmaps sysmaps_pcpu[MAXCPU];
234pt_entry_t *CMAP1 = 0;
235static pt_entry_t *CMAP3;
236caddr_t CADDR1 = 0, ptvmmap = 0;
237static caddr_t CADDR3;
238struct msgbuf *msgbufp = 0;
239
240/*
241 * Crashdump maps.
242 */
243static caddr_t crashdumpmap;
244
245#ifdef SMP
246extern pt_entry_t *SMPpt;
247#endif
248static pt_entry_t *PMAP1 = 0, *PMAP2;
249static pt_entry_t *PADDR1 = 0, *PADDR2;
250#ifdef SMP
251static int PMAP1cpu;
252static int PMAP1changedcpu;
253SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD,
254	   &PMAP1changedcpu, 0,
255	   "Number of times pmap_pte_quick changed CPU with same PMAP1");
256#endif
257static int PMAP1changed;
258SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD,
259	   &PMAP1changed, 0,
260	   "Number of times pmap_pte_quick changed PMAP1");
261static int PMAP1unchanged;
262SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD,
263	   &PMAP1unchanged, 0,
264	   "Number of times pmap_pte_quick didn't change PMAP1");
265static struct mtx PMAP2mutex;
266
267static void	free_pv_entry(pmap_t pmap, pv_entry_t pv);
268static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try);
269
270static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
271    vm_page_t m, vm_prot_t prot, vm_page_t mpte);
272static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva);
273static void pmap_remove_page(struct pmap *pmap, vm_offset_t va);
274static void pmap_remove_entry(struct pmap *pmap, vm_page_t m,
275					vm_offset_t va);
276static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m);
277static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
278    vm_page_t m);
279
280static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
281
282static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags);
283static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m);
284static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va);
285static void pmap_pte_release(pt_entry_t *pte);
286static int pmap_unuse_pt(pmap_t, vm_offset_t);
287static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
288#ifdef PAE
289static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait);
290#endif
291
292CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
293CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
294
295/*
296 * Move the kernel virtual free pointer to the next
297 * 4MB.  This is used to help improve performance
298 * by using a large (4MB) page for much of the kernel
299 * (.text, .data, .bss)
300 */
301static vm_offset_t
302pmap_kmem_choose(vm_offset_t addr)
303{
304	vm_offset_t newaddr = addr;
305
306#ifndef DISABLE_PSE
307	if (cpu_feature & CPUID_PSE)
308		newaddr = (addr + PDRMASK) & ~PDRMASK;
309#endif
310	return newaddr;
311}
312
313/*
314 *	Bootstrap the system enough to run with virtual memory.
315 *
316 *	On the i386 this is called after mapping has already been enabled
317 *	and just syncs the pmap module with what has already been done.
318 *	[We can't call it easily with mapping off since the kernel is not
319 *	mapped with PA == VA, hence we would have to relocate every address
320 *	from the linked base (virtual) address "KERNBASE" to the actual
321 *	(physical) address starting relative to 0]
322 */
323void
324pmap_bootstrap(vm_paddr_t firstaddr, vm_paddr_t loadaddr)
325{
326	vm_offset_t va;
327	pt_entry_t *pte, *unused;
328	struct sysmaps *sysmaps;
329	int i;
330
331	/*
332	 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too
333	 * large. It should instead be correctly calculated in locore.s and
334	 * not based on 'first' (which is a physical address, not a virtual
335	 * address, for the start of unused physical memory). The kernel
336	 * page tables are NOT double mapped and thus should not be included
337	 * in this calculation.
338	 */
339	virtual_avail = (vm_offset_t) KERNBASE + firstaddr;
340	virtual_avail = pmap_kmem_choose(virtual_avail);
341
342	virtual_end = VM_MAX_KERNEL_ADDRESS;
343
344	/*
345	 * Initialize the kernel pmap (which is statically allocated).
346	 */
347	PMAP_LOCK_INIT(kernel_pmap);
348	kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD);
349#ifdef PAE
350	kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT);
351#endif
352	kernel_pmap->pm_active = -1;	/* don't allow deactivation */
353	TAILQ_INIT(&kernel_pmap->pm_pvchunk);
354	LIST_INIT(&allpmaps);
355	mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN);
356	mtx_lock_spin(&allpmaps_lock);
357	LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list);
358	mtx_unlock_spin(&allpmaps_lock);
359	nkpt = NKPT;
360
361	/*
362	 * Reserve some special page table entries/VA space for temporary
363	 * mapping of pages.
364	 */
365#define	SYSMAP(c, p, v, n)	\
366	v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
367
368	va = virtual_avail;
369	pte = vtopte(va);
370
371	/*
372	 * CMAP1/CMAP2 are used for zeroing and copying pages.
373	 * CMAP3 is used for the idle process page zeroing.
374	 */
375	for (i = 0; i < MAXCPU; i++) {
376		sysmaps = &sysmaps_pcpu[i];
377		mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF);
378		SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1)
379		SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1)
380	}
381	SYSMAP(caddr_t, CMAP1, CADDR1, 1)
382	SYSMAP(caddr_t, CMAP3, CADDR3, 1)
383	*CMAP3 = 0;
384
385	/*
386	 * Crashdump maps.
387	 */
388	SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS)
389
390	/*
391	 * ptvmmap is used for reading arbitrary physical pages via /dev/mem.
392	 */
393	SYSMAP(caddr_t, unused, ptvmmap, 1)
394
395	/*
396	 * msgbufp is used to map the system message buffer.
397	 */
398	SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE)))
399
400	/*
401	 * ptemap is used for pmap_pte_quick
402	 */
403	SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1);
404	SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1);
405
406	mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF);
407
408	virtual_avail = va;
409
410	*CMAP1 = 0;
411
412#ifdef XBOX
413	/* FIXME: This is gross, but needed for the XBOX. Since we are in such
414	 * an early stadium, we cannot yet neatly map video memory ... :-(
415	 * Better fixes are very welcome! */
416	if (!arch_i386_is_xbox)
417#endif
418	for (i = 0; i < NKPT; i++)
419		PTD[i] = 0;
420
421	/* Initialize the PAT MSR if present. */
422	pmap_init_pat();
423
424	/* Turn on PG_G on kernel page(s) */
425	pmap_set_pg();
426}
427
428/*
429 * Setup the PAT MSR.
430 */
431void
432pmap_init_pat(void)
433{
434	uint64_t pat_msr;
435
436	/* Bail if this CPU doesn't implement PAT. */
437	if (!(cpu_feature & CPUID_PAT))
438		return;
439
440#ifdef PAT_WORKS
441	/*
442	 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-.
443	 * Program 4 and 5 as WP and WC.
444	 * Leave 6 and 7 as UC and UC-.
445	 */
446	pat_msr = rdmsr(MSR_PAT);
447	pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5));
448	pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) |
449	    PAT_VALUE(5, PAT_WRITE_COMBINING);
450#else
451	/*
452	 * Due to some Intel errata, we can only safely use the lower 4
453	 * PAT entries.  Thus, just replace PAT Index 2 with WC instead
454	 * of UC-.
455	 *
456	 *   Intel Pentium III Processor Specification Update
457	 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B
458	 * or Mode C Paging)
459	 *
460	 *   Intel Pentium IV  Processor Specification Update
461	 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly)
462	 */
463	pat_msr = rdmsr(MSR_PAT);
464	pat_msr &= ~PAT_MASK(2);
465	pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING);
466#endif
467	wrmsr(MSR_PAT, pat_msr);
468}
469
470/*
471 * Set PG_G on kernel pages.  Only the BSP calls this when SMP is turned on.
472 */
473void
474pmap_set_pg(void)
475{
476	pd_entry_t pdir;
477	pt_entry_t *pte;
478	vm_offset_t va, endva;
479	int i;
480
481	if (pgeflag == 0)
482		return;
483
484	i = KERNLOAD/NBPDR;
485	endva = KERNBASE + KERNend;
486
487	if (pseflag) {
488		va = KERNBASE + KERNLOAD;
489		while (va  < endva) {
490			pdir = kernel_pmap->pm_pdir[KPTDI+i];
491			pdir |= pgeflag;
492			kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir;
493			invltlb();	/* Play it safe, invltlb() every time */
494			i++;
495			va += NBPDR;
496		}
497	} else {
498		va = (vm_offset_t)btext;
499		while (va < endva) {
500			pte = vtopte(va);
501			if (*pte)
502				*pte |= pgeflag;
503			invltlb();	/* Play it safe, invltlb() every time */
504			va += PAGE_SIZE;
505		}
506	}
507}
508
509/*
510 * Initialize a vm_page's machine-dependent fields.
511 */
512void
513pmap_page_init(vm_page_t m)
514{
515
516	TAILQ_INIT(&m->md.pv_list);
517	m->md.pv_list_count = 0;
518}
519
520#ifdef PAE
521
522static MALLOC_DEFINE(M_PMAPPDPT, "pmap", "pmap pdpt");
523
524static void *
525pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait)
526{
527	*flags = UMA_SLAB_PRIV;
528	return (contigmalloc(PAGE_SIZE, M_PMAPPDPT, 0, 0x0ULL, 0xffffffffULL,
529	    1, 0));
530}
531#endif
532
533/*
534 * ABuse the pte nodes for unmapped kva to thread a kva freelist through.
535 * Requirements:
536 *  - Must deal with pages in order to ensure that none of the PG_* bits
537 *    are ever set, PG_V in particular.
538 *  - Assumes we can write to ptes without pte_store() atomic ops, even
539 *    on PAE systems.  This should be ok.
540 *  - Assumes nothing will ever test these addresses for 0 to indicate
541 *    no mapping instead of correctly checking PG_V.
542 *  - Assumes a vm_offset_t will fit in a pte (true for i386).
543 * Because PG_V is never set, there can be no mappings to invalidate.
544 */
545static vm_offset_t
546pmap_ptelist_alloc(vm_offset_t *head)
547{
548	pt_entry_t *pte;
549	vm_offset_t va;
550
551	va = *head;
552	if (va == 0)
553		return (va);	/* Out of memory */
554	pte = vtopte(va);
555	*head = *pte;
556	if (*head & PG_V)
557		panic("pmap_ptelist_alloc: va with PG_V set!");
558	*pte = 0;
559	return (va);
560}
561
562static void
563pmap_ptelist_free(vm_offset_t *head, vm_offset_t va)
564{
565	pt_entry_t *pte;
566
567	if (va & PG_V)
568		panic("pmap_ptelist_free: freeing va with PG_V set!");
569	pte = vtopte(va);
570	*pte = *head;		/* virtual! PG_V is 0 though */
571	*head = va;
572}
573
574static void
575pmap_ptelist_init(vm_offset_t *head, void *base, int npages)
576{
577	int i;
578	vm_offset_t va;
579
580	*head = 0;
581	for (i = npages - 1; i >= 0; i--) {
582		va = (vm_offset_t)base + i * PAGE_SIZE;
583		pmap_ptelist_free(head, va);
584	}
585}
586
587
588/*
589 *	Initialize the pmap module.
590 *	Called by vm_init, to initialize any structures that the pmap
591 *	system needs to map virtual memory.
592 */
593void
594pmap_init(void)
595{
596
597	/*
598	 * Initialize the address space (zone) for the pv entries.  Set a
599	 * high water mark so that the system can recover from excessive
600	 * numbers of pv entries.
601	 */
602	TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
603	pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
604	TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
605	pv_entry_max = roundup(pv_entry_max, _NPCPV);
606	pv_entry_high_water = 9 * (pv_entry_max / 10);
607
608	pv_maxchunks = pv_entry_max / _NPCPV;
609	pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map,
610	    PAGE_SIZE * pv_maxchunks);
611	if (pv_chunkbase == NULL)
612		panic("pmap_init: not enough kvm for pv chunks");
613	pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks);
614#ifdef PAE
615	pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL,
616	    NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1,
617	    UMA_ZONE_VM | UMA_ZONE_NOFREE);
618	uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf);
619#endif
620}
621
622
623SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
624SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0,
625	"Max number of PV entries");
626SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0,
627	"Page share factor per proc");
628
629/***************************************************
630 * Low level helper routines.....
631 ***************************************************/
632
633#ifdef SMP
634/*
635 * For SMP, these functions have to use the IPI mechanism for coherence.
636 */
637void
638pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
639{
640	u_int cpumask;
641	u_int other_cpus;
642
643	if (smp_started) {
644		if (!(read_eflags() & PSL_I))
645			panic("%s: interrupts disabled", __func__);
646		mtx_lock_spin(&smp_ipi_mtx);
647	} else
648		critical_enter();
649	/*
650	 * We need to disable interrupt preemption but MUST NOT have
651	 * interrupts disabled here.
652	 * XXX we may need to hold schedlock to get a coherent pm_active
653	 * XXX critical sections disable interrupts again
654	 */
655	if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
656		invlpg(va);
657		smp_invlpg(va);
658	} else {
659		cpumask = PCPU_GET(cpumask);
660		other_cpus = PCPU_GET(other_cpus);
661		if (pmap->pm_active & cpumask)
662			invlpg(va);
663		if (pmap->pm_active & other_cpus)
664			smp_masked_invlpg(pmap->pm_active & other_cpus, va);
665	}
666	if (smp_started)
667		mtx_unlock_spin(&smp_ipi_mtx);
668	else
669		critical_exit();
670}
671
672void
673pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
674{
675	u_int cpumask;
676	u_int other_cpus;
677	vm_offset_t addr;
678
679	if (smp_started) {
680		if (!(read_eflags() & PSL_I))
681			panic("%s: interrupts disabled", __func__);
682		mtx_lock_spin(&smp_ipi_mtx);
683	} else
684		critical_enter();
685	/*
686	 * We need to disable interrupt preemption but MUST NOT have
687	 * interrupts disabled here.
688	 * XXX we may need to hold schedlock to get a coherent pm_active
689	 * XXX critical sections disable interrupts again
690	 */
691	if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
692		for (addr = sva; addr < eva; addr += PAGE_SIZE)
693			invlpg(addr);
694		smp_invlpg_range(sva, eva);
695	} else {
696		cpumask = PCPU_GET(cpumask);
697		other_cpus = PCPU_GET(other_cpus);
698		if (pmap->pm_active & cpumask)
699			for (addr = sva; addr < eva; addr += PAGE_SIZE)
700				invlpg(addr);
701		if (pmap->pm_active & other_cpus)
702			smp_masked_invlpg_range(pmap->pm_active & other_cpus,
703			    sva, eva);
704	}
705	if (smp_started)
706		mtx_unlock_spin(&smp_ipi_mtx);
707	else
708		critical_exit();
709}
710
711void
712pmap_invalidate_all(pmap_t pmap)
713{
714	u_int cpumask;
715	u_int other_cpus;
716
717	if (smp_started) {
718		if (!(read_eflags() & PSL_I))
719			panic("%s: interrupts disabled", __func__);
720		mtx_lock_spin(&smp_ipi_mtx);
721	} else
722		critical_enter();
723	/*
724	 * We need to disable interrupt preemption but MUST NOT have
725	 * interrupts disabled here.
726	 * XXX we may need to hold schedlock to get a coherent pm_active
727	 * XXX critical sections disable interrupts again
728	 */
729	if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
730		invltlb();
731		smp_invltlb();
732	} else {
733		cpumask = PCPU_GET(cpumask);
734		other_cpus = PCPU_GET(other_cpus);
735		if (pmap->pm_active & cpumask)
736			invltlb();
737		if (pmap->pm_active & other_cpus)
738			smp_masked_invltlb(pmap->pm_active & other_cpus);
739	}
740	if (smp_started)
741		mtx_unlock_spin(&smp_ipi_mtx);
742	else
743		critical_exit();
744}
745
746void
747pmap_invalidate_cache(void)
748{
749
750	if (smp_started) {
751		if (!(read_eflags() & PSL_I))
752			panic("%s: interrupts disabled", __func__);
753		mtx_lock_spin(&smp_ipi_mtx);
754	} else
755		critical_enter();
756	/*
757	 * We need to disable interrupt preemption but MUST NOT have
758	 * interrupts disabled here.
759	 * XXX we may need to hold schedlock to get a coherent pm_active
760	 * XXX critical sections disable interrupts again
761	 */
762	wbinvd();
763	smp_cache_flush();
764	if (smp_started)
765		mtx_unlock_spin(&smp_ipi_mtx);
766	else
767		critical_exit();
768}
769#else /* !SMP */
770/*
771 * Normal, non-SMP, 486+ invalidation functions.
772 * We inline these within pmap.c for speed.
773 */
774PMAP_INLINE void
775pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
776{
777
778	if (pmap == kernel_pmap || pmap->pm_active)
779		invlpg(va);
780}
781
782PMAP_INLINE void
783pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
784{
785	vm_offset_t addr;
786
787	if (pmap == kernel_pmap || pmap->pm_active)
788		for (addr = sva; addr < eva; addr += PAGE_SIZE)
789			invlpg(addr);
790}
791
792PMAP_INLINE void
793pmap_invalidate_all(pmap_t pmap)
794{
795
796	if (pmap == kernel_pmap || pmap->pm_active)
797		invltlb();
798}
799
800PMAP_INLINE void
801pmap_invalidate_cache(void)
802{
803
804	wbinvd();
805}
806#endif /* !SMP */
807
808/*
809 * Are we current address space or kernel?  N.B. We return FALSE when
810 * a pmap's page table is in use because a kernel thread is borrowing
811 * it.  The borrowed page table can change spontaneously, making any
812 * dependence on its continued use subject to a race condition.
813 */
814static __inline int
815pmap_is_current(pmap_t pmap)
816{
817
818	return (pmap == kernel_pmap ||
819		(pmap == vmspace_pmap(curthread->td_proc->p_vmspace) &&
820	    (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME)));
821}
822
823/*
824 * If the given pmap is not the current or kernel pmap, the returned pte must
825 * be released by passing it to pmap_pte_release().
826 */
827pt_entry_t *
828pmap_pte(pmap_t pmap, vm_offset_t va)
829{
830	pd_entry_t newpf;
831	pd_entry_t *pde;
832
833	pde = pmap_pde(pmap, va);
834	if (*pde & PG_PS)
835		return (pde);
836	if (*pde != 0) {
837		/* are we current address space or kernel? */
838		if (pmap_is_current(pmap))
839			return (vtopte(va));
840		mtx_lock(&PMAP2mutex);
841		newpf = *pde & PG_FRAME;
842		if ((*PMAP2 & PG_FRAME) != newpf) {
843			*PMAP2 = newpf | PG_RW | PG_V | PG_A | PG_M;
844			pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2);
845		}
846		return (PADDR2 + (i386_btop(va) & (NPTEPG - 1)));
847	}
848	return (0);
849}
850
851/*
852 * Releases a pte that was obtained from pmap_pte().  Be prepared for the pte
853 * being NULL.
854 */
855static __inline void
856pmap_pte_release(pt_entry_t *pte)
857{
858
859	if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2)
860		mtx_unlock(&PMAP2mutex);
861}
862
863static __inline void
864invlcaddr(void *caddr)
865{
866
867	invlpg((u_int)caddr);
868}
869
870/*
871 * Super fast pmap_pte routine best used when scanning
872 * the pv lists.  This eliminates many coarse-grained
873 * invltlb calls.  Note that many of the pv list
874 * scans are across different pmaps.  It is very wasteful
875 * to do an entire invltlb for checking a single mapping.
876 *
877 * If the given pmap is not the current pmap, vm_page_queue_mtx
878 * must be held and curthread pinned to a CPU.
879 */
880static pt_entry_t *
881pmap_pte_quick(pmap_t pmap, vm_offset_t va)
882{
883	pd_entry_t newpf;
884	pd_entry_t *pde;
885
886	pde = pmap_pde(pmap, va);
887	if (*pde & PG_PS)
888		return (pde);
889	if (*pde != 0) {
890		/* are we current address space or kernel? */
891		if (pmap_is_current(pmap))
892			return (vtopte(va));
893		mtx_assert(&vm_page_queue_mtx, MA_OWNED);
894		KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
895		newpf = *pde & PG_FRAME;
896		if ((*PMAP1 & PG_FRAME) != newpf) {
897			*PMAP1 = newpf | PG_RW | PG_V | PG_A | PG_M;
898#ifdef SMP
899			PMAP1cpu = PCPU_GET(cpuid);
900#endif
901			invlcaddr(PADDR1);
902			PMAP1changed++;
903		} else
904#ifdef SMP
905		if (PMAP1cpu != PCPU_GET(cpuid)) {
906			PMAP1cpu = PCPU_GET(cpuid);
907			invlcaddr(PADDR1);
908			PMAP1changedcpu++;
909		} else
910#endif
911			PMAP1unchanged++;
912		return (PADDR1 + (i386_btop(va) & (NPTEPG - 1)));
913	}
914	return (0);
915}
916
917/*
918 *	Routine:	pmap_extract
919 *	Function:
920 *		Extract the physical page address associated
921 *		with the given map/virtual_address pair.
922 */
923vm_paddr_t
924pmap_extract(pmap_t pmap, vm_offset_t va)
925{
926	vm_paddr_t rtval;
927	pt_entry_t *pte;
928	pd_entry_t pde;
929
930	rtval = 0;
931	PMAP_LOCK(pmap);
932	pde = pmap->pm_pdir[va >> PDRSHIFT];
933	if (pde != 0) {
934		if ((pde & PG_PS) != 0) {
935			rtval = (pde & ~PDRMASK) | (va & PDRMASK);
936			PMAP_UNLOCK(pmap);
937			return rtval;
938		}
939		pte = pmap_pte(pmap, va);
940		rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
941		pmap_pte_release(pte);
942	}
943	PMAP_UNLOCK(pmap);
944	return (rtval);
945}
946
947/*
948 *	Routine:	pmap_extract_and_hold
949 *	Function:
950 *		Atomically extract and hold the physical page
951 *		with the given pmap and virtual address pair
952 *		if that mapping permits the given protection.
953 */
954vm_page_t
955pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
956{
957	pd_entry_t pde;
958	pt_entry_t pte;
959	vm_page_t m;
960
961	m = NULL;
962	vm_page_lock_queues();
963	PMAP_LOCK(pmap);
964	pde = *pmap_pde(pmap, va);
965	if (pde != 0) {
966		if (pde & PG_PS) {
967			if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) {
968				m = PHYS_TO_VM_PAGE((pde & ~PDRMASK) |
969				    (va & PDRMASK));
970				vm_page_hold(m);
971			}
972		} else {
973			sched_pin();
974			pte = *pmap_pte_quick(pmap, va);
975			if (pte != 0 &&
976			    ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) {
977				m = PHYS_TO_VM_PAGE(pte & PG_FRAME);
978				vm_page_hold(m);
979			}
980			sched_unpin();
981		}
982	}
983	vm_page_unlock_queues();
984	PMAP_UNLOCK(pmap);
985	return (m);
986}
987
988/***************************************************
989 * Low level mapping routines.....
990 ***************************************************/
991
992/*
993 * Add a wired page to the kva.
994 * Note: not SMP coherent.
995 */
996PMAP_INLINE void
997pmap_kenter(vm_offset_t va, vm_paddr_t pa)
998{
999	pt_entry_t *pte;
1000
1001	pte = vtopte(va);
1002	pte_store(pte, pa | PG_RW | PG_V | pgeflag);
1003}
1004
1005/*
1006 * Remove a page from the kernel pagetables.
1007 * Note: not SMP coherent.
1008 */
1009PMAP_INLINE void
1010pmap_kremove(vm_offset_t va)
1011{
1012	pt_entry_t *pte;
1013
1014	pte = vtopte(va);
1015	pte_clear(pte);
1016}
1017
1018/*
1019 *	Used to map a range of physical addresses into kernel
1020 *	virtual address space.
1021 *
1022 *	The value passed in '*virt' is a suggested virtual address for
1023 *	the mapping. Architectures which can support a direct-mapped
1024 *	physical to virtual region can return the appropriate address
1025 *	within that region, leaving '*virt' unchanged. Other
1026 *	architectures should map the pages starting at '*virt' and
1027 *	update '*virt' with the first usable address after the mapped
1028 *	region.
1029 */
1030vm_offset_t
1031pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1032{
1033	vm_offset_t va, sva;
1034
1035	va = sva = *virt;
1036	while (start < end) {
1037		pmap_kenter(va, start);
1038		va += PAGE_SIZE;
1039		start += PAGE_SIZE;
1040	}
1041	pmap_invalidate_range(kernel_pmap, sva, va);
1042	*virt = va;
1043	return (sva);
1044}
1045
1046
1047/*
1048 * Add a list of wired pages to the kva
1049 * this routine is only used for temporary
1050 * kernel mappings that do not need to have
1051 * page modification or references recorded.
1052 * Note that old mappings are simply written
1053 * over.  The page *must* be wired.
1054 * Note: SMP coherent.  Uses a ranged shootdown IPI.
1055 */
1056void
1057pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1058{
1059	pt_entry_t *endpte, oldpte, *pte;
1060
1061	oldpte = 0;
1062	pte = vtopte(sva);
1063	endpte = pte + count;
1064	while (pte < endpte) {
1065		oldpte |= *pte;
1066		pte_store(pte, VM_PAGE_TO_PHYS(*ma) | pgeflag | PG_RW | PG_V);
1067		pte++;
1068		ma++;
1069	}
1070	if ((oldpte & PG_V) != 0)
1071		pmap_invalidate_range(kernel_pmap, sva, sva + count *
1072		    PAGE_SIZE);
1073}
1074
1075/*
1076 * This routine tears out page mappings from the
1077 * kernel -- it is meant only for temporary mappings.
1078 * Note: SMP coherent.  Uses a ranged shootdown IPI.
1079 */
1080void
1081pmap_qremove(vm_offset_t sva, int count)
1082{
1083	vm_offset_t va;
1084
1085	va = sva;
1086	while (count-- > 0) {
1087		pmap_kremove(va);
1088		va += PAGE_SIZE;
1089	}
1090	pmap_invalidate_range(kernel_pmap, sva, va);
1091}
1092
1093/***************************************************
1094 * Page table page management routines.....
1095 ***************************************************/
1096
1097/*
1098 * This routine unholds page table pages, and if the hold count
1099 * drops to zero, then it decrements the wire count.
1100 */
1101static PMAP_INLINE int
1102pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m)
1103{
1104
1105	--m->wire_count;
1106	if (m->wire_count == 0)
1107		return _pmap_unwire_pte_hold(pmap, m);
1108	else
1109		return 0;
1110}
1111
1112static int
1113_pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m)
1114{
1115	vm_offset_t pteva;
1116
1117	/*
1118	 * unmap the page table page
1119	 */
1120	pmap->pm_pdir[m->pindex] = 0;
1121	--pmap->pm_stats.resident_count;
1122
1123	/*
1124	 * Do an invltlb to make the invalidated mapping
1125	 * take effect immediately.
1126	 */
1127	pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex);
1128	pmap_invalidate_page(pmap, pteva);
1129
1130	vm_page_free_zero(m);
1131	atomic_subtract_int(&cnt.v_wire_count, 1);
1132	return 1;
1133}
1134
1135/*
1136 * After removing a page table entry, this routine is used to
1137 * conditionally free the page, and manage the hold/wire counts.
1138 */
1139static int
1140pmap_unuse_pt(pmap_t pmap, vm_offset_t va)
1141{
1142	pd_entry_t ptepde;
1143	vm_page_t mpte;
1144
1145	if (va >= VM_MAXUSER_ADDRESS)
1146		return 0;
1147	ptepde = *pmap_pde(pmap, va);
1148	mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME);
1149	return pmap_unwire_pte_hold(pmap, mpte);
1150}
1151
1152void
1153pmap_pinit0(pmap_t pmap)
1154{
1155
1156	PMAP_LOCK_INIT(pmap);
1157	pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD);
1158#ifdef PAE
1159	pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT);
1160#endif
1161	pmap->pm_active = 0;
1162	PCPU_SET(curpmap, pmap);
1163	TAILQ_INIT(&pmap->pm_pvchunk);
1164	bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1165	mtx_lock_spin(&allpmaps_lock);
1166	LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1167	mtx_unlock_spin(&allpmaps_lock);
1168}
1169
1170/*
1171 * Initialize a preallocated and zeroed pmap structure,
1172 * such as one in a vmspace structure.
1173 */
1174void
1175pmap_pinit(pmap_t pmap)
1176{
1177	vm_page_t m, ptdpg[NPGPTD];
1178	vm_paddr_t pa;
1179	static int color;
1180	int i;
1181
1182	PMAP_LOCK_INIT(pmap);
1183
1184	/*
1185	 * No need to allocate page table space yet but we do need a valid
1186	 * page directory table.
1187	 */
1188	if (pmap->pm_pdir == NULL) {
1189		pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map,
1190		    NBPTD);
1191#ifdef PAE
1192		pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO);
1193		KASSERT(((vm_offset_t)pmap->pm_pdpt &
1194		    ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0,
1195		    ("pmap_pinit: pdpt misaligned"));
1196		KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30),
1197		    ("pmap_pinit: pdpt above 4g"));
1198#endif
1199	}
1200
1201	/*
1202	 * allocate the page directory page(s)
1203	 */
1204	for (i = 0; i < NPGPTD;) {
1205		m = vm_page_alloc(NULL, color++,
1206		    VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1207		    VM_ALLOC_ZERO);
1208		if (m == NULL)
1209			VM_WAIT;
1210		else {
1211			ptdpg[i++] = m;
1212		}
1213	}
1214
1215	pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD);
1216
1217	for (i = 0; i < NPGPTD; i++) {
1218		if ((ptdpg[i]->flags & PG_ZERO) == 0)
1219			bzero(pmap->pm_pdir + (i * NPDEPG), PAGE_SIZE);
1220	}
1221
1222	mtx_lock_spin(&allpmaps_lock);
1223	LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1224	mtx_unlock_spin(&allpmaps_lock);
1225	/* Wire in kernel global address entries. */
1226	/* XXX copies current process, does not fill in MPPTDI */
1227	bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t));
1228#ifdef SMP
1229	pmap->pm_pdir[MPPTDI] = PTD[MPPTDI];
1230#endif
1231
1232	/* install self-referential address mapping entry(s) */
1233	for (i = 0; i < NPGPTD; i++) {
1234		pa = VM_PAGE_TO_PHYS(ptdpg[i]);
1235		pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M;
1236#ifdef PAE
1237		pmap->pm_pdpt[i] = pa | PG_V;
1238#endif
1239	}
1240
1241	pmap->pm_active = 0;
1242	TAILQ_INIT(&pmap->pm_pvchunk);
1243	bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1244}
1245
1246/*
1247 * this routine is called if the page table page is not
1248 * mapped correctly.
1249 */
1250static vm_page_t
1251_pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags)
1252{
1253	vm_paddr_t ptepa;
1254	vm_page_t m;
1255
1256	KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1257	    (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1258	    ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1259
1260	/*
1261	 * Allocate a page table page.
1262	 */
1263	if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1264	    VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1265		if (flags & M_WAITOK) {
1266			PMAP_UNLOCK(pmap);
1267			vm_page_unlock_queues();
1268			VM_WAIT;
1269			vm_page_lock_queues();
1270			PMAP_LOCK(pmap);
1271		}
1272
1273		/*
1274		 * Indicate the need to retry.  While waiting, the page table
1275		 * page may have been allocated.
1276		 */
1277		return (NULL);
1278	}
1279	if ((m->flags & PG_ZERO) == 0)
1280		pmap_zero_page(m);
1281
1282	/*
1283	 * Map the pagetable page into the process address space, if
1284	 * it isn't already there.
1285	 */
1286
1287	pmap->pm_stats.resident_count++;
1288
1289	ptepa = VM_PAGE_TO_PHYS(m);
1290	pmap->pm_pdir[ptepindex] =
1291		(pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M);
1292
1293	return m;
1294}
1295
1296static vm_page_t
1297pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags)
1298{
1299	unsigned ptepindex;
1300	pd_entry_t ptepa;
1301	vm_page_t m;
1302
1303	KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1304	    (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1305	    ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1306
1307	/*
1308	 * Calculate pagetable page index
1309	 */
1310	ptepindex = va >> PDRSHIFT;
1311retry:
1312	/*
1313	 * Get the page directory entry
1314	 */
1315	ptepa = pmap->pm_pdir[ptepindex];
1316
1317	/*
1318	 * This supports switching from a 4MB page to a
1319	 * normal 4K page.
1320	 */
1321	if (ptepa & PG_PS) {
1322		pmap->pm_pdir[ptepindex] = 0;
1323		ptepa = 0;
1324		pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
1325		pmap_invalidate_all(kernel_pmap);
1326	}
1327
1328	/*
1329	 * If the page table page is mapped, we just increment the
1330	 * hold count, and activate it.
1331	 */
1332	if (ptepa) {
1333		m = PHYS_TO_VM_PAGE(ptepa);
1334		m->wire_count++;
1335	} else {
1336		/*
1337		 * Here if the pte page isn't mapped, or if it has
1338		 * been deallocated.
1339		 */
1340		m = _pmap_allocpte(pmap, ptepindex, flags);
1341		if (m == NULL && (flags & M_WAITOK))
1342			goto retry;
1343	}
1344	return (m);
1345}
1346
1347
1348/***************************************************
1349* Pmap allocation/deallocation routines.
1350 ***************************************************/
1351
1352#ifdef SMP
1353/*
1354 * Deal with a SMP shootdown of other users of the pmap that we are
1355 * trying to dispose of.  This can be a bit hairy.
1356 */
1357static u_int *lazymask;
1358static u_int lazyptd;
1359static volatile u_int lazywait;
1360
1361void pmap_lazyfix_action(void);
1362
1363void
1364pmap_lazyfix_action(void)
1365{
1366	u_int mymask = PCPU_GET(cpumask);
1367
1368#ifdef COUNT_IPIS
1369	*ipi_lazypmap_counts[PCPU_GET(cpuid)]++;
1370#endif
1371	if (rcr3() == lazyptd)
1372		load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1373	atomic_clear_int(lazymask, mymask);
1374	atomic_store_rel_int(&lazywait, 1);
1375}
1376
1377static void
1378pmap_lazyfix_self(u_int mymask)
1379{
1380
1381	if (rcr3() == lazyptd)
1382		load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1383	atomic_clear_int(lazymask, mymask);
1384}
1385
1386
1387static void
1388pmap_lazyfix(pmap_t pmap)
1389{
1390	u_int mymask;
1391	u_int mask;
1392	u_int spins;
1393
1394	while ((mask = pmap->pm_active) != 0) {
1395		spins = 50000000;
1396		mask = mask & -mask;	/* Find least significant set bit */
1397		mtx_lock_spin(&smp_ipi_mtx);
1398#ifdef PAE
1399		lazyptd = vtophys(pmap->pm_pdpt);
1400#else
1401		lazyptd = vtophys(pmap->pm_pdir);
1402#endif
1403		mymask = PCPU_GET(cpumask);
1404		if (mask == mymask) {
1405			lazymask = &pmap->pm_active;
1406			pmap_lazyfix_self(mymask);
1407		} else {
1408			atomic_store_rel_int((u_int *)&lazymask,
1409			    (u_int)&pmap->pm_active);
1410			atomic_store_rel_int(&lazywait, 0);
1411			ipi_selected(mask, IPI_LAZYPMAP);
1412			while (lazywait == 0) {
1413				ia32_pause();
1414				if (--spins == 0)
1415					break;
1416			}
1417		}
1418		mtx_unlock_spin(&smp_ipi_mtx);
1419		if (spins == 0)
1420			printf("pmap_lazyfix: spun for 50000000\n");
1421	}
1422}
1423
1424#else	/* SMP */
1425
1426/*
1427 * Cleaning up on uniprocessor is easy.  For various reasons, we're
1428 * unlikely to have to even execute this code, including the fact
1429 * that the cleanup is deferred until the parent does a wait(2), which
1430 * means that another userland process has run.
1431 */
1432static void
1433pmap_lazyfix(pmap_t pmap)
1434{
1435	u_int cr3;
1436
1437	cr3 = vtophys(pmap->pm_pdir);
1438	if (cr3 == rcr3()) {
1439		load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1440		pmap->pm_active &= ~(PCPU_GET(cpumask));
1441	}
1442}
1443#endif	/* SMP */
1444
1445/*
1446 * Release any resources held by the given physical map.
1447 * Called when a pmap initialized by pmap_pinit is being released.
1448 * Should only be called if the map contains no valid mappings.
1449 */
1450void
1451pmap_release(pmap_t pmap)
1452{
1453	vm_page_t m, ptdpg[NPGPTD];
1454	int i;
1455
1456	KASSERT(pmap->pm_stats.resident_count == 0,
1457	    ("pmap_release: pmap resident count %ld != 0",
1458	    pmap->pm_stats.resident_count));
1459
1460	pmap_lazyfix(pmap);
1461	mtx_lock_spin(&allpmaps_lock);
1462	LIST_REMOVE(pmap, pm_list);
1463	mtx_unlock_spin(&allpmaps_lock);
1464
1465	for (i = 0; i < NPGPTD; i++)
1466		ptdpg[i] = PHYS_TO_VM_PAGE(pmap->pm_pdir[PTDPTDI + i]);
1467
1468	bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) *
1469	    sizeof(*pmap->pm_pdir));
1470#ifdef SMP
1471	pmap->pm_pdir[MPPTDI] = 0;
1472#endif
1473
1474	pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD);
1475
1476	vm_page_lock_queues();
1477	for (i = 0; i < NPGPTD; i++) {
1478		m = ptdpg[i];
1479#ifdef PAE
1480		KASSERT(VM_PAGE_TO_PHYS(m) == (pmap->pm_pdpt[i] & PG_FRAME),
1481		    ("pmap_release: got wrong ptd page"));
1482#endif
1483		m->wire_count--;
1484		atomic_subtract_int(&cnt.v_wire_count, 1);
1485		vm_page_free_zero(m);
1486	}
1487	vm_page_unlock_queues();
1488	PMAP_LOCK_DESTROY(pmap);
1489}
1490
1491static int
1492kvm_size(SYSCTL_HANDLER_ARGS)
1493{
1494	unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE;
1495
1496	return sysctl_handle_long(oidp, &ksize, 0, req);
1497}
1498SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1499    0, 0, kvm_size, "IU", "Size of KVM");
1500
1501static int
1502kvm_free(SYSCTL_HANDLER_ARGS)
1503{
1504	unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1505
1506	return sysctl_handle_long(oidp, &kfree, 0, req);
1507}
1508SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1509    0, 0, kvm_free, "IU", "Amount of KVM free");
1510
1511/*
1512 * grow the number of kernel page table entries, if needed
1513 */
1514void
1515pmap_growkernel(vm_offset_t addr)
1516{
1517	struct pmap *pmap;
1518	vm_paddr_t ptppaddr;
1519	vm_page_t nkpg;
1520	pd_entry_t newpdir;
1521	pt_entry_t *pde;
1522
1523	mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1524	if (kernel_vm_end == 0) {
1525		kernel_vm_end = KERNBASE;
1526		nkpt = 0;
1527		while (pdir_pde(PTD, kernel_vm_end)) {
1528			kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1529			nkpt++;
1530			if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1531				kernel_vm_end = kernel_map->max_offset;
1532				break;
1533			}
1534		}
1535	}
1536	addr = roundup2(addr, PAGE_SIZE * NPTEPG);
1537	if (addr - 1 >= kernel_map->max_offset)
1538		addr = kernel_map->max_offset;
1539	while (kernel_vm_end < addr) {
1540		if (pdir_pde(PTD, kernel_vm_end)) {
1541			kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1542			if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1543				kernel_vm_end = kernel_map->max_offset;
1544				break;
1545			}
1546			continue;
1547		}
1548
1549		/*
1550		 * This index is bogus, but out of the way
1551		 */
1552		nkpg = vm_page_alloc(NULL, nkpt,
1553		    VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED);
1554		if (!nkpg)
1555			panic("pmap_growkernel: no memory to grow kernel");
1556
1557		nkpt++;
1558
1559		pmap_zero_page(nkpg);
1560		ptppaddr = VM_PAGE_TO_PHYS(nkpg);
1561		newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
1562		pdir_pde(PTD, kernel_vm_end) = newpdir;
1563
1564		mtx_lock_spin(&allpmaps_lock);
1565		LIST_FOREACH(pmap, &allpmaps, pm_list) {
1566			pde = pmap_pde(pmap, kernel_vm_end);
1567			pde_store(pde, newpdir);
1568		}
1569		mtx_unlock_spin(&allpmaps_lock);
1570		kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1571		if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1572			kernel_vm_end = kernel_map->max_offset;
1573			break;
1574		}
1575	}
1576}
1577
1578
1579/***************************************************
1580 * page management routines.
1581 ***************************************************/
1582
1583CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1584CTASSERT(_NPCM == 11);
1585
1586static __inline struct pv_chunk *
1587pv_to_chunk(pv_entry_t pv)
1588{
1589
1590	return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK);
1591}
1592
1593#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1594
1595#define	PC_FREE0_9	0xfffffffful	/* Free values for index 0 through 9 */
1596#define	PC_FREE10	0x0000fffful	/* Free values for index 10 */
1597
1598static uint32_t pc_freemask[11] = {
1599	PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1600	PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1601	PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1602	PC_FREE0_9, PC_FREE10
1603};
1604
1605SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1606	"Current number of pv entries");
1607
1608#ifdef PV_STATS
1609static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1610
1611SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1612	"Current number of pv entry chunks");
1613SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1614	"Current number of pv entry chunks allocated");
1615SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1616	"Current number of pv entry chunks frees");
1617SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1618	"Number of times tried to get a chunk page but failed.");
1619
1620static long pv_entry_frees, pv_entry_allocs;
1621static int pv_entry_spare;
1622
1623SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1624	"Current number of pv entry frees");
1625SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1626	"Current number of pv entry allocs");
1627SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1628	"Current number of spare pv entries");
1629
1630static int pmap_collect_inactive, pmap_collect_active;
1631
1632SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0,
1633	"Current number times pmap_collect called on inactive queue");
1634SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0,
1635	"Current number times pmap_collect called on active queue");
1636#endif
1637
1638/*
1639 * We are in a serious low memory condition.  Resort to
1640 * drastic measures to free some pages so we can allocate
1641 * another pv entry chunk.  This is normally called to
1642 * unmap inactive pages, and if necessary, active pages.
1643 */
1644static void
1645pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq)
1646{
1647	pmap_t pmap;
1648	pt_entry_t *pte, tpte;
1649	pv_entry_t next_pv, pv;
1650	vm_offset_t va;
1651	vm_page_t m;
1652
1653	sched_pin();
1654	TAILQ_FOREACH(m, &vpq->pl, pageq) {
1655		if (m->hold_count || m->busy || (m->flags & PG_BUSY))
1656			continue;
1657		TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) {
1658			va = pv->pv_va;
1659			pmap = PV_PMAP(pv);
1660			/* Avoid deadlock and lock recursion. */
1661			if (pmap > locked_pmap)
1662				PMAP_LOCK(pmap);
1663			else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap))
1664				continue;
1665			pmap->pm_stats.resident_count--;
1666			pte = pmap_pte_quick(pmap, va);
1667			tpte = pte_load_clear(pte);
1668			KASSERT((tpte & PG_W) == 0,
1669			    ("pmap_collect: wired pte %#jx", (uintmax_t)tpte));
1670			if (tpte & PG_A)
1671				vm_page_flag_set(m, PG_REFERENCED);
1672			if (tpte & PG_M) {
1673				KASSERT((tpte & PG_RW),
1674	("pmap_collect: modified page not writable: va: %#x, pte: %#jx",
1675				    va, (uintmax_t)tpte));
1676				vm_page_dirty(m);
1677			}
1678			pmap_invalidate_page(pmap, va);
1679			TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
1680			if (TAILQ_EMPTY(&m->md.pv_list))
1681				vm_page_flag_clear(m, PG_WRITEABLE);
1682			m->md.pv_list_count--;
1683			pmap_unuse_pt(pmap, va);
1684			free_pv_entry(pmap, pv);
1685			if (pmap != locked_pmap)
1686				PMAP_UNLOCK(pmap);
1687		}
1688	}
1689	sched_unpin();
1690}
1691
1692
1693/*
1694 * free the pv_entry back to the free list
1695 */
1696static void
1697free_pv_entry(pmap_t pmap, pv_entry_t pv)
1698{
1699	vm_page_t m;
1700	struct pv_chunk *pc;
1701	int idx, field, bit;
1702
1703	mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1704	PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1705	PV_STAT(pv_entry_frees++);
1706	PV_STAT(pv_entry_spare++);
1707	pv_entry_count--;
1708	pc = pv_to_chunk(pv);
1709	idx = pv - &pc->pc_pventry[0];
1710	field = idx / 32;
1711	bit = idx % 32;
1712	pc->pc_map[field] |= 1ul << bit;
1713	/* move to head of list */
1714	TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1715	TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1716	for (idx = 0; idx < _NPCM; idx++)
1717		if (pc->pc_map[idx] != pc_freemask[idx])
1718			return;
1719	PV_STAT(pv_entry_spare -= _NPCPV);
1720	PV_STAT(pc_chunk_count--);
1721	PV_STAT(pc_chunk_frees++);
1722	/* entire chunk is free, return it */
1723	TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1724	m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
1725	pmap_qremove((vm_offset_t)pc, 1);
1726	vm_page_unwire(m, 0);
1727	vm_page_free(m);
1728	pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
1729}
1730
1731/*
1732 * get a new pv_entry, allocating a block from the system
1733 * when needed.
1734 */
1735static pv_entry_t
1736get_pv_entry(pmap_t pmap, int try)
1737{
1738	static const struct timeval printinterval = { 60, 0 };
1739	static struct timeval lastprint;
1740	static vm_pindex_t colour;
1741	int bit, field, page_req;
1742	pv_entry_t pv;
1743	struct pv_chunk *pc;
1744	vm_page_t m;
1745
1746	PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1747	mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1748	PV_STAT(pv_entry_allocs++);
1749	pv_entry_count++;
1750	if (pv_entry_count > pv_entry_high_water)
1751		pagedaemon_wakeup();
1752	pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1753	if (pc != NULL) {
1754		for (field = 0; field < _NPCM; field++) {
1755			if (pc->pc_map[field]) {
1756				bit = bsfl(pc->pc_map[field]);
1757				break;
1758			}
1759		}
1760		if (field < _NPCM) {
1761			pv = &pc->pc_pventry[field * 32 + bit];
1762			pc->pc_map[field] &= ~(1ul << bit);
1763			/* If this was the last item, move it to tail */
1764			for (field = 0; field < _NPCM; field++)
1765				if (pc->pc_map[field] != 0) {
1766					PV_STAT(pv_entry_spare--);
1767					return (pv);	/* not full, return */
1768				}
1769			TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1770			TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1771			PV_STAT(pv_entry_spare--);
1772			return (pv);
1773		}
1774	}
1775	pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree);
1776	page_req = try ? VM_ALLOC_NORMAL : VM_ALLOC_SYSTEM;
1777	m = vm_page_alloc(NULL, colour, page_req |
1778	    VM_ALLOC_NOOBJ | VM_ALLOC_WIRED);
1779	if (m == NULL || pc == NULL) {
1780		if (try) {
1781			pv_entry_count--;
1782			PV_STAT(pc_chunk_tryfail++);
1783			if (m) {
1784				vm_page_lock_queues();
1785				vm_page_unwire(m, 0);
1786				vm_page_free(m);
1787				vm_page_unlock_queues();
1788			}
1789			if (pc)
1790				pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
1791			return (NULL);
1792		}
1793		/*
1794		 * Reclaim pv entries: At first, destroy mappings to
1795		 * inactive pages.  After that, if a pv chunk entry
1796		 * is still needed, destroy mappings to active pages.
1797		 */
1798		if (ratecheck(&lastprint, &printinterval))
1799			printf("Approaching the limit on PV entries, "
1800			    "consider increasing tunables "
1801			    "vm.pmap.shpgperproc or "
1802			    "vm.pmap.pv_entry_max\n");
1803		PV_STAT(pmap_collect_inactive++);
1804		pmap_collect(pmap, &vm_page_queues[PQ_INACTIVE]);
1805		if (m == NULL)
1806			m = vm_page_alloc(NULL, colour, VM_ALLOC_SYSTEM |
1807			    VM_ALLOC_NOOBJ | VM_ALLOC_WIRED);
1808		if (pc == NULL)
1809			pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree);
1810		if (m == NULL || pc == NULL) {
1811			PV_STAT(pmap_collect_active++);
1812			pmap_collect(pmap, &vm_page_queues[PQ_ACTIVE]);
1813			if (m == NULL)
1814				m = vm_page_alloc(NULL, colour,
1815				    VM_ALLOC_SYSTEM | VM_ALLOC_NOOBJ |
1816				    VM_ALLOC_WIRED);
1817			if (pc == NULL)
1818				pc = (struct pv_chunk *)
1819				    pmap_ptelist_alloc(&pv_vafree);
1820			if (m == NULL || pc == NULL)
1821				panic("get_pv_entry: increase vm.pmap.shpgperproc");
1822		}
1823	}
1824	PV_STAT(pc_chunk_count++);
1825	PV_STAT(pc_chunk_allocs++);
1826	colour++;
1827	pmap_qenter((vm_offset_t)pc, &m, 1);
1828	pc->pc_pmap = pmap;
1829	pc->pc_map[0] = pc_freemask[0] & ~1ul;	/* preallocated bit 0 */
1830	for (field = 1; field < _NPCM; field++)
1831		pc->pc_map[field] = pc_freemask[field];
1832	pv = &pc->pc_pventry[0];
1833	TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1834	PV_STAT(pv_entry_spare += _NPCPV - 1);
1835	return (pv);
1836}
1837
1838static void
1839pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
1840{
1841	pv_entry_t pv;
1842
1843	PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1844	mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1845	TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
1846		if (pmap == PV_PMAP(pv) && va == pv->pv_va)
1847			break;
1848	}
1849	KASSERT(pv != NULL, ("pmap_remove_entry: pv not found"));
1850	TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
1851	m->md.pv_list_count--;
1852	if (TAILQ_EMPTY(&m->md.pv_list))
1853		vm_page_flag_clear(m, PG_WRITEABLE);
1854	free_pv_entry(pmap, pv);
1855}
1856
1857/*
1858 * Create a pv entry for page at pa for
1859 * (pmap, va).
1860 */
1861static void
1862pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
1863{
1864	pv_entry_t pv;
1865
1866	PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1867	mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1868	pv = get_pv_entry(pmap, FALSE);
1869	pv->pv_va = va;
1870	TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
1871	m->md.pv_list_count++;
1872}
1873
1874/*
1875 * Conditionally create a pv entry.
1876 */
1877static boolean_t
1878pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
1879{
1880	pv_entry_t pv;
1881
1882	PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1883	mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1884	if (pv_entry_count < pv_entry_high_water &&
1885	    (pv = get_pv_entry(pmap, TRUE)) != NULL) {
1886		pv->pv_va = va;
1887		TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
1888		m->md.pv_list_count++;
1889		return (TRUE);
1890	} else
1891		return (FALSE);
1892}
1893
1894/*
1895 * pmap_remove_pte: do the things to unmap a page in a process
1896 */
1897static int
1898pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va)
1899{
1900	pt_entry_t oldpte;
1901	vm_page_t m;
1902
1903	mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1904	PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1905	oldpte = pte_load_clear(ptq);
1906	if (oldpte & PG_W)
1907		pmap->pm_stats.wired_count -= 1;
1908	/*
1909	 * Machines that don't support invlpg, also don't support
1910	 * PG_G.
1911	 */
1912	if (oldpte & PG_G)
1913		pmap_invalidate_page(kernel_pmap, va);
1914	pmap->pm_stats.resident_count -= 1;
1915	if (oldpte & PG_MANAGED) {
1916		m = PHYS_TO_VM_PAGE(oldpte);
1917		if (oldpte & PG_M) {
1918			KASSERT((oldpte & PG_RW),
1919	("pmap_remove_pte: modified page not writable: va: %#x, pte: %#jx",
1920			    va, (uintmax_t)oldpte));
1921			vm_page_dirty(m);
1922		}
1923		if (oldpte & PG_A)
1924			vm_page_flag_set(m, PG_REFERENCED);
1925		pmap_remove_entry(pmap, m, va);
1926	}
1927	return (pmap_unuse_pt(pmap, va));
1928}
1929
1930/*
1931 * Remove a single page from a process address space
1932 */
1933static void
1934pmap_remove_page(pmap_t pmap, vm_offset_t va)
1935{
1936	pt_entry_t *pte;
1937
1938	mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1939	KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
1940	PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1941	if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0)
1942		return;
1943	pmap_remove_pte(pmap, pte, va);
1944	pmap_invalidate_page(pmap, va);
1945}
1946
1947/*
1948 *	Remove the given range of addresses from the specified map.
1949 *
1950 *	It is assumed that the start and end are properly
1951 *	rounded to the page size.
1952 */
1953void
1954pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1955{
1956	vm_offset_t pdnxt;
1957	pd_entry_t ptpaddr;
1958	pt_entry_t *pte;
1959	int anyvalid;
1960
1961	/*
1962	 * Perform an unsynchronized read.  This is, however, safe.
1963	 */
1964	if (pmap->pm_stats.resident_count == 0)
1965		return;
1966
1967	anyvalid = 0;
1968
1969	vm_page_lock_queues();
1970	sched_pin();
1971	PMAP_LOCK(pmap);
1972
1973	/*
1974	 * special handling of removing one page.  a very
1975	 * common operation and easy to short circuit some
1976	 * code.
1977	 */
1978	if ((sva + PAGE_SIZE == eva) &&
1979	    ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) {
1980		pmap_remove_page(pmap, sva);
1981		goto out;
1982	}
1983
1984	for (; sva < eva; sva = pdnxt) {
1985		unsigned pdirindex;
1986
1987		/*
1988		 * Calculate index for next page table.
1989		 */
1990		pdnxt = (sva + NBPDR) & ~PDRMASK;
1991		if (pmap->pm_stats.resident_count == 0)
1992			break;
1993
1994		pdirindex = sva >> PDRSHIFT;
1995		ptpaddr = pmap->pm_pdir[pdirindex];
1996
1997		/*
1998		 * Weed out invalid mappings. Note: we assume that the page
1999		 * directory table is always allocated, and in kernel virtual.
2000		 */
2001		if (ptpaddr == 0)
2002			continue;
2003
2004		/*
2005		 * Check for large page.
2006		 */
2007		if ((ptpaddr & PG_PS) != 0) {
2008			pmap->pm_pdir[pdirindex] = 0;
2009			pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2010			anyvalid = 1;
2011			continue;
2012		}
2013
2014		/*
2015		 * Limit our scan to either the end of the va represented
2016		 * by the current page table page, or to the end of the
2017		 * range being removed.
2018		 */
2019		if (pdnxt > eva)
2020			pdnxt = eva;
2021
2022		for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2023		    sva += PAGE_SIZE) {
2024			if (*pte == 0)
2025				continue;
2026
2027			/*
2028			 * The TLB entry for a PG_G mapping is invalidated
2029			 * by pmap_remove_pte().
2030			 */
2031			if ((*pte & PG_G) == 0)
2032				anyvalid = 1;
2033			if (pmap_remove_pte(pmap, pte, sva))
2034				break;
2035		}
2036	}
2037out:
2038	sched_unpin();
2039	vm_page_unlock_queues();
2040	if (anyvalid)
2041		pmap_invalidate_all(pmap);
2042	PMAP_UNLOCK(pmap);
2043}
2044
2045/*
2046 *	Routine:	pmap_remove_all
2047 *	Function:
2048 *		Removes this physical page from
2049 *		all physical maps in which it resides.
2050 *		Reflects back modify bits to the pager.
2051 *
2052 *	Notes:
2053 *		Original versions of this routine were very
2054 *		inefficient because they iteratively called
2055 *		pmap_remove (slow...)
2056 */
2057
2058void
2059pmap_remove_all(vm_page_t m)
2060{
2061	pv_entry_t pv;
2062	pmap_t pmap;
2063	pt_entry_t *pte, tpte;
2064
2065#if defined(PMAP_DIAGNOSTIC)
2066	/*
2067	 * XXX This makes pmap_remove_all() illegal for non-managed pages!
2068	 */
2069	if (m->flags & PG_FICTITIOUS) {
2070		panic("pmap_remove_all: illegal for unmanaged page, va: 0x%x",
2071		    VM_PAGE_TO_PHYS(m));
2072	}
2073#endif
2074	mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2075	sched_pin();
2076	while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2077		pmap = PV_PMAP(pv);
2078		PMAP_LOCK(pmap);
2079		pmap->pm_stats.resident_count--;
2080		pte = pmap_pte_quick(pmap, pv->pv_va);
2081		tpte = pte_load_clear(pte);
2082		if (tpte & PG_W)
2083			pmap->pm_stats.wired_count--;
2084		if (tpte & PG_A)
2085			vm_page_flag_set(m, PG_REFERENCED);
2086
2087		/*
2088		 * Update the vm_page_t clean and reference bits.
2089		 */
2090		if (tpte & PG_M) {
2091			KASSERT((tpte & PG_RW),
2092	("pmap_remove_all: modified page not writable: va: %#x, pte: %#jx",
2093			    pv->pv_va, (uintmax_t)tpte));
2094			vm_page_dirty(m);
2095		}
2096		pmap_invalidate_page(pmap, pv->pv_va);
2097		TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2098		m->md.pv_list_count--;
2099		pmap_unuse_pt(pmap, pv->pv_va);
2100		free_pv_entry(pmap, pv);
2101		PMAP_UNLOCK(pmap);
2102	}
2103	vm_page_flag_clear(m, PG_WRITEABLE);
2104	sched_unpin();
2105}
2106
2107/*
2108 *	Set the physical protection on the
2109 *	specified range of this map as requested.
2110 */
2111void
2112pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2113{
2114	vm_offset_t pdnxt;
2115	pd_entry_t ptpaddr;
2116	pt_entry_t *pte;
2117	int anychanged;
2118
2119	if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2120		pmap_remove(pmap, sva, eva);
2121		return;
2122	}
2123
2124	if (prot & VM_PROT_WRITE)
2125		return;
2126
2127	anychanged = 0;
2128
2129	vm_page_lock_queues();
2130	sched_pin();
2131	PMAP_LOCK(pmap);
2132	for (; sva < eva; sva = pdnxt) {
2133		unsigned obits, pbits, pdirindex;
2134
2135		pdnxt = (sva + NBPDR) & ~PDRMASK;
2136
2137		pdirindex = sva >> PDRSHIFT;
2138		ptpaddr = pmap->pm_pdir[pdirindex];
2139
2140		/*
2141		 * Weed out invalid mappings. Note: we assume that the page
2142		 * directory table is always allocated, and in kernel virtual.
2143		 */
2144		if (ptpaddr == 0)
2145			continue;
2146
2147		/*
2148		 * Check for large page.
2149		 */
2150		if ((ptpaddr & PG_PS) != 0) {
2151			pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW);
2152			anychanged = 1;
2153			continue;
2154		}
2155
2156		if (pdnxt > eva)
2157			pdnxt = eva;
2158
2159		for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2160		    sva += PAGE_SIZE) {
2161			vm_page_t m;
2162
2163retry:
2164			/*
2165			 * Regardless of whether a pte is 32 or 64 bits in
2166			 * size, PG_RW, PG_A, and PG_M are among the least
2167			 * significant 32 bits.
2168			 */
2169			obits = pbits = *(u_int *)pte;
2170			if (pbits & PG_MANAGED) {
2171				m = NULL;
2172				if (pbits & PG_A) {
2173					m = PHYS_TO_VM_PAGE(*pte);
2174					vm_page_flag_set(m, PG_REFERENCED);
2175					pbits &= ~PG_A;
2176				}
2177				if ((pbits & PG_M) != 0) {
2178					if (m == NULL)
2179						m = PHYS_TO_VM_PAGE(*pte);
2180					vm_page_dirty(m);
2181				}
2182			}
2183
2184			pbits &= ~(PG_RW | PG_M);
2185
2186			if (pbits != obits) {
2187				if (!atomic_cmpset_int((u_int *)pte, obits,
2188				    pbits))
2189					goto retry;
2190				if (obits & PG_G)
2191					pmap_invalidate_page(pmap, sva);
2192				else
2193					anychanged = 1;
2194			}
2195		}
2196	}
2197	sched_unpin();
2198	vm_page_unlock_queues();
2199	if (anychanged)
2200		pmap_invalidate_all(pmap);
2201	PMAP_UNLOCK(pmap);
2202}
2203
2204/*
2205 *	Insert the given physical page (p) at
2206 *	the specified virtual address (v) in the
2207 *	target physical map with the protection requested.
2208 *
2209 *	If specified, the page will be wired down, meaning
2210 *	that the related pte can not be reclaimed.
2211 *
2212 *	NB:  This is the only routine which MAY NOT lazy-evaluate
2213 *	or lose information.  That is, this routine must actually
2214 *	insert this page into the given map NOW.
2215 */
2216void
2217pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2218	   boolean_t wired)
2219{
2220	vm_paddr_t pa;
2221	pd_entry_t *pde;
2222	pt_entry_t *pte;
2223	vm_paddr_t opa;
2224	pt_entry_t origpte, newpte;
2225	vm_page_t mpte, om;
2226	boolean_t invlva;
2227
2228	va &= PG_FRAME;
2229#ifdef PMAP_DIAGNOSTIC
2230	if (va > VM_MAX_KERNEL_ADDRESS)
2231		panic("pmap_enter: toobig");
2232	if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS))
2233		panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va);
2234#endif
2235
2236	mpte = NULL;
2237
2238	vm_page_lock_queues();
2239	PMAP_LOCK(pmap);
2240	sched_pin();
2241
2242	/*
2243	 * In the case that a page table page is not
2244	 * resident, we are creating it here.
2245	 */
2246	if (va < VM_MAXUSER_ADDRESS) {
2247		mpte = pmap_allocpte(pmap, va, M_WAITOK);
2248	}
2249#if 0 && defined(PMAP_DIAGNOSTIC)
2250	else {
2251		pd_entry_t *pdeaddr = pmap_pde(pmap, va);
2252		origpte = *pdeaddr;
2253		if ((origpte & PG_V) == 0) {
2254			panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n",
2255				pmap->pm_pdir[PTDPTDI], origpte, va);
2256		}
2257	}
2258#endif
2259
2260	pde = pmap_pde(pmap, va);
2261	if ((*pde & PG_PS) != 0)
2262		panic("pmap_enter: attempted pmap_enter on 4MB page");
2263	pte = pmap_pte_quick(pmap, va);
2264
2265	/*
2266	 * Page Directory table entry not valid, we need a new PT page
2267	 */
2268	if (pte == NULL) {
2269		panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n",
2270			(uintmax_t)pmap->pm_pdir[PTDPTDI], va);
2271	}
2272
2273	pa = VM_PAGE_TO_PHYS(m);
2274	om = NULL;
2275	origpte = *pte;
2276	opa = origpte & PG_FRAME;
2277
2278	/*
2279	 * Mapping has not changed, must be protection or wiring change.
2280	 */
2281	if (origpte && (opa == pa)) {
2282		/*
2283		 * Wiring change, just update stats. We don't worry about
2284		 * wiring PT pages as they remain resident as long as there
2285		 * are valid mappings in them. Hence, if a user page is wired,
2286		 * the PT page will be also.
2287		 */
2288		if (wired && ((origpte & PG_W) == 0))
2289			pmap->pm_stats.wired_count++;
2290		else if (!wired && (origpte & PG_W))
2291			pmap->pm_stats.wired_count--;
2292
2293		/*
2294		 * Remove extra pte reference
2295		 */
2296		if (mpte)
2297			mpte->wire_count--;
2298
2299		/*
2300		 * We might be turning off write access to the page,
2301		 * so we go ahead and sense modify status.
2302		 */
2303		if (origpte & PG_MANAGED) {
2304			om = m;
2305			pa |= PG_MANAGED;
2306		}
2307		goto validate;
2308	}
2309	/*
2310	 * Mapping has changed, invalidate old range and fall through to
2311	 * handle validating new mapping.
2312	 */
2313	if (opa) {
2314		if (origpte & PG_W)
2315			pmap->pm_stats.wired_count--;
2316		if (origpte & PG_MANAGED) {
2317			om = PHYS_TO_VM_PAGE(opa);
2318			pmap_remove_entry(pmap, om, va);
2319		}
2320		if (mpte != NULL) {
2321			mpte->wire_count--;
2322			KASSERT(mpte->wire_count > 0,
2323			    ("pmap_enter: missing reference to page table page,"
2324			     " va: 0x%x", va));
2325		}
2326	} else
2327		pmap->pm_stats.resident_count++;
2328
2329	/*
2330	 * Enter on the PV list if part of our managed memory.
2331	 */
2332	if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
2333		KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
2334		    ("pmap_enter: managed mapping within the clean submap"));
2335		pmap_insert_entry(pmap, va, m);
2336		pa |= PG_MANAGED;
2337	}
2338
2339	/*
2340	 * Increment counters
2341	 */
2342	if (wired)
2343		pmap->pm_stats.wired_count++;
2344
2345validate:
2346	/*
2347	 * Now validate mapping with desired protection/wiring.
2348	 */
2349	newpte = (pt_entry_t)(pa | PG_V);
2350	if ((prot & VM_PROT_WRITE) != 0)
2351		newpte |= PG_RW;
2352	if (wired)
2353		newpte |= PG_W;
2354	if (va < VM_MAXUSER_ADDRESS)
2355		newpte |= PG_U;
2356	if (pmap == kernel_pmap)
2357		newpte |= pgeflag;
2358
2359	/*
2360	 * if the mapping or permission bits are different, we need
2361	 * to update the pte.
2362	 */
2363	if ((origpte & ~(PG_M|PG_A)) != newpte) {
2364		if (origpte & PG_V) {
2365			invlva = FALSE;
2366			origpte = pte_load_store(pte, newpte | PG_A);
2367			if (origpte & PG_A) {
2368				if (origpte & PG_MANAGED)
2369					vm_page_flag_set(om, PG_REFERENCED);
2370				if (opa != VM_PAGE_TO_PHYS(m))
2371					invlva = TRUE;
2372			}
2373			if (origpte & PG_M) {
2374				KASSERT((origpte & PG_RW),
2375	("pmap_enter: modified page not writable: va: %#x, pte: %#jx",
2376				    va, (uintmax_t)origpte));
2377				if ((origpte & PG_MANAGED) != 0)
2378					vm_page_dirty(om);
2379				if ((prot & VM_PROT_WRITE) == 0)
2380					invlva = TRUE;
2381			}
2382			if (invlva)
2383				pmap_invalidate_page(pmap, va);
2384		} else
2385			pte_store(pte, newpte | PG_A);
2386	}
2387	sched_unpin();
2388	vm_page_unlock_queues();
2389	PMAP_UNLOCK(pmap);
2390}
2391
2392/*
2393 * Maps a sequence of resident pages belonging to the same object.
2394 * The sequence begins with the given page m_start.  This page is
2395 * mapped at the given virtual address start.  Each subsequent page is
2396 * mapped at a virtual address that is offset from start by the same
2397 * amount as the page is offset from m_start within the object.  The
2398 * last page in the sequence is the page with the largest offset from
2399 * m_start that can be mapped at a virtual address less than the given
2400 * virtual address end.  Not every virtual page between start and end
2401 * is mapped; only those for which a resident page exists with the
2402 * corresponding offset from m_start are mapped.
2403 */
2404void
2405pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
2406    vm_page_t m_start, vm_prot_t prot)
2407{
2408	vm_page_t m, mpte;
2409	vm_pindex_t diff, psize;
2410
2411	VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED);
2412	psize = atop(end - start);
2413	mpte = NULL;
2414	m = m_start;
2415	PMAP_LOCK(pmap);
2416	while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
2417		mpte = pmap_enter_quick_locked(pmap, start + ptoa(diff), m,
2418		    prot, mpte);
2419		m = TAILQ_NEXT(m, listq);
2420	}
2421 	PMAP_UNLOCK(pmap);
2422}
2423
2424/*
2425 * this code makes some *MAJOR* assumptions:
2426 * 1. Current pmap & pmap exists.
2427 * 2. Not wired.
2428 * 3. Read access.
2429 * 4. No page table pages.
2430 * but is *MUCH* faster than pmap_enter...
2431 */
2432
2433void
2434pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
2435{
2436
2437	PMAP_LOCK(pmap);
2438	(void) pmap_enter_quick_locked(pmap, va, m, prot, NULL);
2439	PMAP_UNLOCK(pmap);
2440}
2441
2442static vm_page_t
2443pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
2444    vm_prot_t prot, vm_page_t mpte)
2445{
2446	pt_entry_t *pte;
2447	vm_paddr_t pa;
2448
2449	KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
2450	    (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0,
2451	    ("pmap_enter_quick_locked: managed mapping within the clean submap"));
2452	mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2453	PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2454
2455	/*
2456	 * In the case that a page table page is not
2457	 * resident, we are creating it here.
2458	 */
2459	if (va < VM_MAXUSER_ADDRESS) {
2460		unsigned ptepindex;
2461		pd_entry_t ptepa;
2462
2463		/*
2464		 * Calculate pagetable page index
2465		 */
2466		ptepindex = va >> PDRSHIFT;
2467		if (mpte && (mpte->pindex == ptepindex)) {
2468			mpte->wire_count++;
2469		} else {
2470			/*
2471			 * Get the page directory entry
2472			 */
2473			ptepa = pmap->pm_pdir[ptepindex];
2474
2475			/*
2476			 * If the page table page is mapped, we just increment
2477			 * the hold count, and activate it.
2478			 */
2479			if (ptepa) {
2480				if (ptepa & PG_PS)
2481					panic("pmap_enter_quick: unexpected mapping into 4MB page");
2482				mpte = PHYS_TO_VM_PAGE(ptepa);
2483				mpte->wire_count++;
2484			} else {
2485				mpte = _pmap_allocpte(pmap, ptepindex,
2486				    M_NOWAIT);
2487				if (mpte == NULL)
2488					return (mpte);
2489			}
2490		}
2491	} else {
2492		mpte = NULL;
2493	}
2494
2495	/*
2496	 * This call to vtopte makes the assumption that we are
2497	 * entering the page into the current pmap.  In order to support
2498	 * quick entry into any pmap, one would likely use pmap_pte_quick.
2499	 * But that isn't as quick as vtopte.
2500	 */
2501	pte = vtopte(va);
2502	if (*pte) {
2503		if (mpte != NULL) {
2504			pmap_unwire_pte_hold(pmap, mpte);
2505			mpte = NULL;
2506		}
2507		return (mpte);
2508	}
2509
2510	/*
2511	 * Enter on the PV list if part of our managed memory.
2512	 */
2513	if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 &&
2514	    !pmap_try_insert_pv_entry(pmap, va, m)) {
2515		if (mpte != NULL) {
2516			pmap_unwire_pte_hold(pmap, mpte);
2517			mpte = NULL;
2518		}
2519		return (mpte);
2520	}
2521
2522	/*
2523	 * Increment counters
2524	 */
2525	pmap->pm_stats.resident_count++;
2526
2527	pa = VM_PAGE_TO_PHYS(m);
2528
2529	/*
2530	 * Now validate mapping with RO protection
2531	 */
2532	if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
2533		pte_store(pte, pa | PG_V | PG_U);
2534	else
2535		pte_store(pte, pa | PG_V | PG_U | PG_MANAGED);
2536	return mpte;
2537}
2538
2539/*
2540 * Make a temporary mapping for a physical address.  This is only intended
2541 * to be used for panic dumps.
2542 */
2543void *
2544pmap_kenter_temporary(vm_paddr_t pa, int i)
2545{
2546	vm_offset_t va;
2547
2548	va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
2549	pmap_kenter(va, pa);
2550	invlpg(va);
2551	return ((void *)crashdumpmap);
2552}
2553
2554/*
2555 * This code maps large physical mmap regions into the
2556 * processor address space.  Note that some shortcuts
2557 * are taken, but the code works.
2558 */
2559void
2560pmap_object_init_pt(pmap_t pmap, vm_offset_t addr,
2561		    vm_object_t object, vm_pindex_t pindex,
2562		    vm_size_t size)
2563{
2564	vm_page_t p;
2565
2566	VM_OBJECT_LOCK_ASSERT(object, MA_OWNED);
2567	KASSERT(object->type == OBJT_DEVICE,
2568	    ("pmap_object_init_pt: non-device object"));
2569	if (pseflag &&
2570	    ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) {
2571		int i;
2572		vm_page_t m[1];
2573		unsigned int ptepindex;
2574		int npdes;
2575		pd_entry_t ptepa;
2576
2577		PMAP_LOCK(pmap);
2578		if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)])
2579			goto out;
2580		PMAP_UNLOCK(pmap);
2581retry:
2582		p = vm_page_lookup(object, pindex);
2583		if (p != NULL) {
2584			vm_page_lock_queues();
2585			if (vm_page_sleep_if_busy(p, FALSE, "init4p"))
2586				goto retry;
2587		} else {
2588			p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL);
2589			if (p == NULL)
2590				return;
2591			m[0] = p;
2592
2593			if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) {
2594				vm_page_lock_queues();
2595				vm_page_free(p);
2596				vm_page_unlock_queues();
2597				return;
2598			}
2599
2600			p = vm_page_lookup(object, pindex);
2601			vm_page_lock_queues();
2602			vm_page_wakeup(p);
2603		}
2604		vm_page_unlock_queues();
2605
2606		ptepa = VM_PAGE_TO_PHYS(p);
2607		if (ptepa & (NBPDR - 1))
2608			return;
2609
2610		p->valid = VM_PAGE_BITS_ALL;
2611
2612		PMAP_LOCK(pmap);
2613		pmap->pm_stats.resident_count += size >> PAGE_SHIFT;
2614		npdes = size >> PDRSHIFT;
2615		for(i = 0; i < npdes; i++) {
2616			pde_store(&pmap->pm_pdir[ptepindex],
2617			    ptepa | PG_U | PG_RW | PG_V | PG_PS);
2618			ptepa += NBPDR;
2619			ptepindex += 1;
2620		}
2621		pmap_invalidate_all(pmap);
2622out:
2623		PMAP_UNLOCK(pmap);
2624	}
2625}
2626
2627/*
2628 *	Routine:	pmap_change_wiring
2629 *	Function:	Change the wiring attribute for a map/virtual-address
2630 *			pair.
2631 *	In/out conditions:
2632 *			The mapping must already exist in the pmap.
2633 */
2634void
2635pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
2636{
2637	pt_entry_t *pte;
2638
2639	PMAP_LOCK(pmap);
2640	pte = pmap_pte(pmap, va);
2641
2642	if (wired && !pmap_pte_w(pte))
2643		pmap->pm_stats.wired_count++;
2644	else if (!wired && pmap_pte_w(pte))
2645		pmap->pm_stats.wired_count--;
2646
2647	/*
2648	 * Wiring is not a hardware characteristic so there is no need to
2649	 * invalidate TLB.
2650	 */
2651	pmap_pte_set_w(pte, wired);
2652	pmap_pte_release(pte);
2653	PMAP_UNLOCK(pmap);
2654}
2655
2656
2657
2658/*
2659 *	Copy the range specified by src_addr/len
2660 *	from the source map to the range dst_addr/len
2661 *	in the destination map.
2662 *
2663 *	This routine is only advisory and need not do anything.
2664 */
2665
2666void
2667pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
2668	  vm_offset_t src_addr)
2669{
2670	vm_offset_t addr;
2671	vm_offset_t end_addr = src_addr + len;
2672	vm_offset_t pdnxt;
2673
2674	if (dst_addr != src_addr)
2675		return;
2676
2677	if (!pmap_is_current(src_pmap))
2678		return;
2679
2680	vm_page_lock_queues();
2681	if (dst_pmap < src_pmap) {
2682		PMAP_LOCK(dst_pmap);
2683		PMAP_LOCK(src_pmap);
2684	} else {
2685		PMAP_LOCK(src_pmap);
2686		PMAP_LOCK(dst_pmap);
2687	}
2688	sched_pin();
2689	for (addr = src_addr; addr < end_addr; addr = pdnxt) {
2690		pt_entry_t *src_pte, *dst_pte;
2691		vm_page_t dstmpte, srcmpte;
2692		pd_entry_t srcptepaddr;
2693		unsigned ptepindex;
2694
2695		if (addr >= UPT_MIN_ADDRESS)
2696			panic("pmap_copy: invalid to pmap_copy page tables");
2697
2698		pdnxt = (addr + NBPDR) & ~PDRMASK;
2699		ptepindex = addr >> PDRSHIFT;
2700
2701		srcptepaddr = src_pmap->pm_pdir[ptepindex];
2702		if (srcptepaddr == 0)
2703			continue;
2704
2705		if (srcptepaddr & PG_PS) {
2706			if (dst_pmap->pm_pdir[ptepindex] == 0) {
2707				dst_pmap->pm_pdir[ptepindex] = srcptepaddr &
2708				    ~PG_W;
2709				dst_pmap->pm_stats.resident_count +=
2710				    NBPDR / PAGE_SIZE;
2711			}
2712			continue;
2713		}
2714
2715		srcmpte = PHYS_TO_VM_PAGE(srcptepaddr);
2716		if (srcmpte->wire_count == 0)
2717			panic("pmap_copy: source page table page is unused");
2718
2719		if (pdnxt > end_addr)
2720			pdnxt = end_addr;
2721
2722		src_pte = vtopte(addr);
2723		while (addr < pdnxt) {
2724			pt_entry_t ptetemp;
2725			ptetemp = *src_pte;
2726			/*
2727			 * we only virtual copy managed pages
2728			 */
2729			if ((ptetemp & PG_MANAGED) != 0) {
2730				dstmpte = pmap_allocpte(dst_pmap, addr,
2731				    M_NOWAIT);
2732				if (dstmpte == NULL)
2733					break;
2734				dst_pte = pmap_pte_quick(dst_pmap, addr);
2735				if (*dst_pte == 0 &&
2736				    pmap_try_insert_pv_entry(dst_pmap, addr,
2737				    PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) {
2738					/*
2739					 * Clear the wired, modified, and
2740					 * accessed (referenced) bits
2741					 * during the copy.
2742					 */
2743					*dst_pte = ptetemp & ~(PG_W | PG_M |
2744					    PG_A);
2745					dst_pmap->pm_stats.resident_count++;
2746	 			} else
2747					pmap_unwire_pte_hold(dst_pmap, dstmpte);
2748				if (dstmpte->wire_count >= srcmpte->wire_count)
2749					break;
2750			}
2751			addr += PAGE_SIZE;
2752			src_pte++;
2753		}
2754	}
2755	sched_unpin();
2756	vm_page_unlock_queues();
2757	PMAP_UNLOCK(src_pmap);
2758	PMAP_UNLOCK(dst_pmap);
2759}
2760
2761static __inline void
2762pagezero(void *page)
2763{
2764#if defined(I686_CPU)
2765	if (cpu_class == CPUCLASS_686) {
2766#if defined(CPU_ENABLE_SSE)
2767		if (cpu_feature & CPUID_SSE2)
2768			sse2_pagezero(page);
2769		else
2770#endif
2771			i686_pagezero(page);
2772	} else
2773#endif
2774		bzero(page, PAGE_SIZE);
2775}
2776
2777/*
2778 *	pmap_zero_page zeros the specified hardware page by mapping
2779 *	the page into KVM and using bzero to clear its contents.
2780 */
2781void
2782pmap_zero_page(vm_page_t m)
2783{
2784	struct sysmaps *sysmaps;
2785
2786	sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
2787	mtx_lock(&sysmaps->lock);
2788	if (*sysmaps->CMAP2)
2789		panic("pmap_zero_page: CMAP2 busy");
2790	sched_pin();
2791	*sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M;
2792	invlcaddr(sysmaps->CADDR2);
2793	pagezero(sysmaps->CADDR2);
2794	*sysmaps->CMAP2 = 0;
2795	sched_unpin();
2796	mtx_unlock(&sysmaps->lock);
2797}
2798
2799/*
2800 *	pmap_zero_page_area zeros the specified hardware page by mapping
2801 *	the page into KVM and using bzero to clear its contents.
2802 *
2803 *	off and size may not cover an area beyond a single hardware page.
2804 */
2805void
2806pmap_zero_page_area(vm_page_t m, int off, int size)
2807{
2808	struct sysmaps *sysmaps;
2809
2810	sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
2811	mtx_lock(&sysmaps->lock);
2812	if (*sysmaps->CMAP2)
2813		panic("pmap_zero_page: CMAP2 busy");
2814	sched_pin();
2815	*sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M;
2816	invlcaddr(sysmaps->CADDR2);
2817	if (off == 0 && size == PAGE_SIZE)
2818		pagezero(sysmaps->CADDR2);
2819	else
2820		bzero((char *)sysmaps->CADDR2 + off, size);
2821	*sysmaps->CMAP2 = 0;
2822	sched_unpin();
2823	mtx_unlock(&sysmaps->lock);
2824}
2825
2826/*
2827 *	pmap_zero_page_idle zeros the specified hardware page by mapping
2828 *	the page into KVM and using bzero to clear its contents.  This
2829 *	is intended to be called from the vm_pagezero process only and
2830 *	outside of Giant.
2831 */
2832void
2833pmap_zero_page_idle(vm_page_t m)
2834{
2835
2836	if (*CMAP3)
2837		panic("pmap_zero_page: CMAP3 busy");
2838	sched_pin();
2839	*CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M;
2840	invlcaddr(CADDR3);
2841	pagezero(CADDR3);
2842	*CMAP3 = 0;
2843	sched_unpin();
2844}
2845
2846/*
2847 *	pmap_copy_page copies the specified (machine independent)
2848 *	page by mapping the page into virtual memory and using
2849 *	bcopy to copy the page, one machine dependent page at a
2850 *	time.
2851 */
2852void
2853pmap_copy_page(vm_page_t src, vm_page_t dst)
2854{
2855	struct sysmaps *sysmaps;
2856
2857	sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
2858	mtx_lock(&sysmaps->lock);
2859	if (*sysmaps->CMAP1)
2860		panic("pmap_copy_page: CMAP1 busy");
2861	if (*sysmaps->CMAP2)
2862		panic("pmap_copy_page: CMAP2 busy");
2863	sched_pin();
2864	invlpg((u_int)sysmaps->CADDR1);
2865	invlpg((u_int)sysmaps->CADDR2);
2866	*sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A;
2867	*sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M;
2868	bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE);
2869	*sysmaps->CMAP1 = 0;
2870	*sysmaps->CMAP2 = 0;
2871	sched_unpin();
2872	mtx_unlock(&sysmaps->lock);
2873}
2874
2875/*
2876 * Returns true if the pmap's pv is one of the first
2877 * 16 pvs linked to from this page.  This count may
2878 * be changed upwards or downwards in the future; it
2879 * is only necessary that true be returned for a small
2880 * subset of pmaps for proper page aging.
2881 */
2882boolean_t
2883pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
2884{
2885	pv_entry_t pv;
2886	int loops = 0;
2887
2888	if (m->flags & PG_FICTITIOUS)
2889		return FALSE;
2890
2891	mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2892	TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
2893		if (PV_PMAP(pv) == pmap) {
2894			return TRUE;
2895		}
2896		loops++;
2897		if (loops >= 16)
2898			break;
2899	}
2900	return (FALSE);
2901}
2902
2903/*
2904 * Remove all pages from specified address space
2905 * this aids process exit speeds.  Also, this code
2906 * is special cased for current process only, but
2907 * can have the more generic (and slightly slower)
2908 * mode enabled.  This is much faster than pmap_remove
2909 * in the case of running down an entire address space.
2910 */
2911void
2912pmap_remove_pages(pmap_t pmap)
2913{
2914	pt_entry_t *pte, tpte;
2915	vm_page_t m;
2916	pv_entry_t pv;
2917	struct pv_chunk *pc, *npc;
2918	int field, idx;
2919	int32_t bit;
2920	uint32_t inuse, bitmask;
2921	int allfree;
2922
2923	if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) {
2924		printf("warning: pmap_remove_pages called with non-current pmap\n");
2925		return;
2926	}
2927	vm_page_lock_queues();
2928	PMAP_LOCK(pmap);
2929	sched_pin();
2930	TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
2931		allfree = 1;
2932		for (field = 0; field < _NPCM; field++) {
2933			inuse = (~(pc->pc_map[field])) & pc_freemask[field];
2934			while (inuse != 0) {
2935				bit = bsfl(inuse);
2936				bitmask = 1UL << bit;
2937				idx = field * 32 + bit;
2938				pv = &pc->pc_pventry[idx];
2939				inuse &= ~bitmask;
2940
2941				pte = vtopte(pv->pv_va);
2942				tpte = *pte;
2943
2944				if (tpte == 0) {
2945					printf(
2946					    "TPTE at %p  IS ZERO @ VA %08x\n",
2947					    pte, pv->pv_va);
2948					panic("bad pte");
2949				}
2950
2951/*
2952 * We cannot remove wired pages from a process' mapping at this time
2953 */
2954				if (tpte & PG_W) {
2955					allfree = 0;
2956					continue;
2957				}
2958
2959				m = PHYS_TO_VM_PAGE(tpte);
2960				KASSERT(m->phys_addr == (tpte & PG_FRAME),
2961				    ("vm_page_t %p phys_addr mismatch %016jx %016jx",
2962				    m, (uintmax_t)m->phys_addr,
2963				    (uintmax_t)tpte));
2964
2965				KASSERT(m < &vm_page_array[vm_page_array_size],
2966					("pmap_remove_pages: bad tpte %#jx",
2967					(uintmax_t)tpte));
2968
2969				pmap->pm_stats.resident_count--;
2970
2971				pte_clear(pte);
2972
2973				/*
2974				 * Update the vm_page_t clean/reference bits.
2975				 */
2976				if (tpte & PG_M)
2977					vm_page_dirty(m);
2978
2979				/* Mark free */
2980				PV_STAT(pv_entry_frees++);
2981				PV_STAT(pv_entry_spare++);
2982				pv_entry_count--;
2983				pc->pc_map[field] |= bitmask;
2984				m->md.pv_list_count--;
2985				TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2986				if (TAILQ_EMPTY(&m->md.pv_list))
2987					vm_page_flag_clear(m, PG_WRITEABLE);
2988
2989				pmap_unuse_pt(pmap, pv->pv_va);
2990			}
2991		}
2992		if (allfree) {
2993			PV_STAT(pv_entry_spare -= _NPCPV);
2994			PV_STAT(pc_chunk_count--);
2995			PV_STAT(pc_chunk_frees++);
2996			TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2997			m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
2998			pmap_qremove((vm_offset_t)pc, 1);
2999			vm_page_unwire(m, 0);
3000			vm_page_free(m);
3001			pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
3002		}
3003	}
3004	sched_unpin();
3005	vm_page_unlock_queues();
3006	pmap_invalidate_all(pmap);
3007	PMAP_UNLOCK(pmap);
3008}
3009
3010/*
3011 *	pmap_is_modified:
3012 *
3013 *	Return whether or not the specified physical page was modified
3014 *	in any physical maps.
3015 */
3016boolean_t
3017pmap_is_modified(vm_page_t m)
3018{
3019	pv_entry_t pv;
3020	pt_entry_t *pte;
3021	pmap_t pmap;
3022	boolean_t rv;
3023
3024	rv = FALSE;
3025	if (m->flags & PG_FICTITIOUS)
3026		return (rv);
3027
3028	sched_pin();
3029	mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3030	TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3031		pmap = PV_PMAP(pv);
3032		PMAP_LOCK(pmap);
3033		pte = pmap_pte_quick(pmap, pv->pv_va);
3034		rv = (*pte & PG_M) != 0;
3035		PMAP_UNLOCK(pmap);
3036		if (rv)
3037			break;
3038	}
3039	sched_unpin();
3040	return (rv);
3041}
3042
3043/*
3044 *	pmap_is_prefaultable:
3045 *
3046 *	Return whether or not the specified virtual address is elgible
3047 *	for prefault.
3048 */
3049boolean_t
3050pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3051{
3052	pt_entry_t *pte;
3053	boolean_t rv;
3054
3055	rv = FALSE;
3056	PMAP_LOCK(pmap);
3057	if (*pmap_pde(pmap, addr)) {
3058		pte = vtopte(addr);
3059		rv = *pte == 0;
3060	}
3061	PMAP_UNLOCK(pmap);
3062	return (rv);
3063}
3064
3065/*
3066 * Clear the write and modified bits in each of the given page's mappings.
3067 */
3068void
3069pmap_remove_write(vm_page_t m)
3070{
3071	pv_entry_t pv;
3072	pmap_t pmap;
3073	pt_entry_t oldpte, *pte;
3074
3075	mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3076	if ((m->flags & PG_FICTITIOUS) != 0 ||
3077	    (m->flags & PG_WRITEABLE) == 0)
3078		return;
3079	sched_pin();
3080	TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3081		pmap = PV_PMAP(pv);
3082		PMAP_LOCK(pmap);
3083		pte = pmap_pte_quick(pmap, pv->pv_va);
3084retry:
3085		oldpte = *pte;
3086		if ((oldpte & PG_RW) != 0) {
3087			/*
3088			 * Regardless of whether a pte is 32 or 64 bits
3089			 * in size, PG_RW and PG_M are among the least
3090			 * significant 32 bits.
3091			 */
3092			if (!atomic_cmpset_int((u_int *)pte, oldpte,
3093			    oldpte & ~(PG_RW | PG_M)))
3094				goto retry;
3095			if ((oldpte & PG_M) != 0)
3096				vm_page_dirty(m);
3097			pmap_invalidate_page(pmap, pv->pv_va);
3098		}
3099		PMAP_UNLOCK(pmap);
3100	}
3101	vm_page_flag_clear(m, PG_WRITEABLE);
3102	sched_unpin();
3103}
3104
3105/*
3106 *	pmap_ts_referenced:
3107 *
3108 *	Return a count of reference bits for a page, clearing those bits.
3109 *	It is not necessary for every reference bit to be cleared, but it
3110 *	is necessary that 0 only be returned when there are truly no
3111 *	reference bits set.
3112 *
3113 *	XXX: The exact number of bits to check and clear is a matter that
3114 *	should be tested and standardized at some point in the future for
3115 *	optimal aging of shared pages.
3116 */
3117int
3118pmap_ts_referenced(vm_page_t m)
3119{
3120	pv_entry_t pv, pvf, pvn;
3121	pmap_t pmap;
3122	pt_entry_t *pte;
3123	int rtval = 0;
3124
3125	if (m->flags & PG_FICTITIOUS)
3126		return (rtval);
3127	sched_pin();
3128	mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3129	if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
3130		pvf = pv;
3131		do {
3132			pvn = TAILQ_NEXT(pv, pv_list);
3133			TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
3134			TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
3135			pmap = PV_PMAP(pv);
3136			PMAP_LOCK(pmap);
3137			pte = pmap_pte_quick(pmap, pv->pv_va);
3138			if ((*pte & PG_A) != 0) {
3139				atomic_clear_int((u_int *)pte, PG_A);
3140				pmap_invalidate_page(pmap, pv->pv_va);
3141				rtval++;
3142				if (rtval > 4)
3143					pvn = NULL;
3144			}
3145			PMAP_UNLOCK(pmap);
3146		} while ((pv = pvn) != NULL && pv != pvf);
3147	}
3148	sched_unpin();
3149	return (rtval);
3150}
3151
3152/*
3153 *	Clear the modify bits on the specified physical page.
3154 */
3155void
3156pmap_clear_modify(vm_page_t m)
3157{
3158	pv_entry_t pv;
3159	pmap_t pmap;
3160	pt_entry_t *pte;
3161
3162	mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3163	if ((m->flags & PG_FICTITIOUS) != 0)
3164		return;
3165	sched_pin();
3166	TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3167		pmap = PV_PMAP(pv);
3168		PMAP_LOCK(pmap);
3169		pte = pmap_pte_quick(pmap, pv->pv_va);
3170		if ((*pte & PG_M) != 0) {
3171			/*
3172			 * Regardless of whether a pte is 32 or 64 bits
3173			 * in size, PG_M is among the least significant
3174			 * 32 bits.
3175			 */
3176			atomic_clear_int((u_int *)pte, PG_M);
3177			pmap_invalidate_page(pmap, pv->pv_va);
3178		}
3179		PMAP_UNLOCK(pmap);
3180	}
3181	sched_unpin();
3182}
3183
3184/*
3185 *	pmap_clear_reference:
3186 *
3187 *	Clear the reference bit on the specified physical page.
3188 */
3189void
3190pmap_clear_reference(vm_page_t m)
3191{
3192	pv_entry_t pv;
3193	pmap_t pmap;
3194	pt_entry_t *pte;
3195
3196	mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3197	if ((m->flags & PG_FICTITIOUS) != 0)
3198		return;
3199	sched_pin();
3200	TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3201		pmap = PV_PMAP(pv);
3202		PMAP_LOCK(pmap);
3203		pte = pmap_pte_quick(pmap, pv->pv_va);
3204		if ((*pte & PG_A) != 0) {
3205			/*
3206			 * Regardless of whether a pte is 32 or 64 bits
3207			 * in size, PG_A is among the least significant
3208			 * 32 bits.
3209			 */
3210			atomic_clear_int((u_int *)pte, PG_A);
3211			pmap_invalidate_page(pmap, pv->pv_va);
3212		}
3213		PMAP_UNLOCK(pmap);
3214	}
3215	sched_unpin();
3216}
3217
3218/*
3219 * Miscellaneous support routines follow
3220 */
3221
3222/*
3223 * Map a set of physical memory pages into the kernel virtual
3224 * address space. Return a pointer to where it is mapped. This
3225 * routine is intended to be used for mapping device memory,
3226 * NOT real memory.
3227 */
3228void *
3229pmap_mapdev(vm_paddr_t pa, vm_size_t size)
3230{
3231	vm_offset_t va, tmpva, offset;
3232
3233	offset = pa & PAGE_MASK;
3234	size = roundup(offset + size, PAGE_SIZE);
3235	pa = pa & PG_FRAME;
3236
3237	if (pa < KERNLOAD && pa + size <= KERNLOAD)
3238		va = KERNBASE + pa;
3239	else
3240		va = kmem_alloc_nofault(kernel_map, size);
3241	if (!va)
3242		panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
3243
3244	for (tmpva = va; size > 0; ) {
3245		pmap_kenter(tmpva, pa);
3246		size -= PAGE_SIZE;
3247		tmpva += PAGE_SIZE;
3248		pa += PAGE_SIZE;
3249	}
3250	pmap_invalidate_range(kernel_pmap, va, tmpva);
3251	return ((void *)(va + offset));
3252}
3253
3254void
3255pmap_unmapdev(vm_offset_t va, vm_size_t size)
3256{
3257	vm_offset_t base, offset, tmpva;
3258
3259	if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD)
3260		return;
3261	base = va & PG_FRAME;
3262	offset = va & PAGE_MASK;
3263	size = roundup(offset + size, PAGE_SIZE);
3264	for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE)
3265		pmap_kremove(tmpva);
3266	pmap_invalidate_range(kernel_pmap, va, tmpva);
3267	kmem_free(kernel_map, base, size);
3268}
3269
3270/*
3271 * perform the pmap work for mincore
3272 */
3273int
3274pmap_mincore(pmap_t pmap, vm_offset_t addr)
3275{
3276	pt_entry_t *ptep, pte;
3277	vm_page_t m;
3278	int val = 0;
3279
3280	PMAP_LOCK(pmap);
3281	ptep = pmap_pte(pmap, addr);
3282	pte = (ptep != NULL) ? *ptep : 0;
3283	pmap_pte_release(ptep);
3284	PMAP_UNLOCK(pmap);
3285
3286	if (pte != 0) {
3287		vm_paddr_t pa;
3288
3289		val = MINCORE_INCORE;
3290		if ((pte & PG_MANAGED) == 0)
3291			return val;
3292
3293		pa = pte & PG_FRAME;
3294
3295		m = PHYS_TO_VM_PAGE(pa);
3296
3297		/*
3298		 * Modified by us
3299		 */
3300		if (pte & PG_M)
3301			val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER;
3302		else {
3303			/*
3304			 * Modified by someone else
3305			 */
3306			vm_page_lock_queues();
3307			if (m->dirty || pmap_is_modified(m))
3308				val |= MINCORE_MODIFIED_OTHER;
3309			vm_page_unlock_queues();
3310		}
3311		/*
3312		 * Referenced by us
3313		 */
3314		if (pte & PG_A)
3315			val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER;
3316		else {
3317			/*
3318			 * Referenced by someone else
3319			 */
3320			vm_page_lock_queues();
3321			if ((m->flags & PG_REFERENCED) ||
3322			    pmap_ts_referenced(m)) {
3323				val |= MINCORE_REFERENCED_OTHER;
3324				vm_page_flag_set(m, PG_REFERENCED);
3325			}
3326			vm_page_unlock_queues();
3327		}
3328	}
3329	return val;
3330}
3331
3332void
3333pmap_activate(struct thread *td)
3334{
3335	pmap_t	pmap, oldpmap;
3336	u_int32_t  cr3;
3337
3338	critical_enter();
3339	pmap = vmspace_pmap(td->td_proc->p_vmspace);
3340	oldpmap = PCPU_GET(curpmap);
3341#if defined(SMP)
3342	atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask));
3343	atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask));
3344#else
3345	oldpmap->pm_active &= ~1;
3346	pmap->pm_active |= 1;
3347#endif
3348#ifdef PAE
3349	cr3 = vtophys(pmap->pm_pdpt);
3350#else
3351	cr3 = vtophys(pmap->pm_pdir);
3352#endif
3353	/*
3354	 * pmap_activate is for the current thread on the current cpu
3355	 */
3356	td->td_pcb->pcb_cr3 = cr3;
3357	load_cr3(cr3);
3358	PCPU_SET(curpmap, pmap);
3359	critical_exit();
3360}
3361
3362vm_offset_t
3363pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size)
3364{
3365
3366	if ((obj == NULL) || (size < NBPDR) || (obj->type != OBJT_DEVICE)) {
3367		return addr;
3368	}
3369
3370	addr = (addr + PDRMASK) & ~PDRMASK;
3371	return addr;
3372}
3373
3374
3375#if defined(PMAP_DEBUG)
3376pmap_pid_dump(int pid)
3377{
3378	pmap_t pmap;
3379	struct proc *p;
3380	int npte = 0;
3381	int index;
3382
3383	sx_slock(&allproc_lock);
3384	LIST_FOREACH(p, &allproc, p_list) {
3385		if (p->p_pid != pid)
3386			continue;
3387
3388		if (p->p_vmspace) {
3389			int i,j;
3390			index = 0;
3391			pmap = vmspace_pmap(p->p_vmspace);
3392			for (i = 0; i < NPDEPTD; i++) {
3393				pd_entry_t *pde;
3394				pt_entry_t *pte;
3395				vm_offset_t base = i << PDRSHIFT;
3396
3397				pde = &pmap->pm_pdir[i];
3398				if (pde && pmap_pde_v(pde)) {
3399					for (j = 0; j < NPTEPG; j++) {
3400						vm_offset_t va = base + (j << PAGE_SHIFT);
3401						if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) {
3402							if (index) {
3403								index = 0;
3404								printf("\n");
3405							}
3406							sx_sunlock(&allproc_lock);
3407							return npte;
3408						}
3409						pte = pmap_pte(pmap, va);
3410						if (pte && pmap_pte_v(pte)) {
3411							pt_entry_t pa;
3412							vm_page_t m;
3413							pa = *pte;
3414							m = PHYS_TO_VM_PAGE(pa);
3415							printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x",
3416								va, pa, m->hold_count, m->wire_count, m->flags);
3417							npte++;
3418							index++;
3419							if (index >= 2) {
3420								index = 0;
3421								printf("\n");
3422							} else {
3423								printf(" ");
3424							}
3425						}
3426					}
3427				}
3428			}
3429		}
3430	}
3431	sx_sunlock(&allproc_lock);
3432	return npte;
3433}
3434#endif
3435
3436#if defined(DEBUG)
3437
3438static void	pads(pmap_t pm);
3439void		pmap_pvdump(vm_offset_t pa);
3440
3441/* print address space of pmap*/
3442static void
3443pads(pmap_t pm)
3444{
3445	int i, j;
3446	vm_paddr_t va;
3447	pt_entry_t *ptep;
3448
3449	if (pm == kernel_pmap)
3450		return;
3451	for (i = 0; i < NPDEPTD; i++)
3452		if (pm->pm_pdir[i])
3453			for (j = 0; j < NPTEPG; j++) {
3454				va = (i << PDRSHIFT) + (j << PAGE_SHIFT);
3455				if (pm == kernel_pmap && va < KERNBASE)
3456					continue;
3457				if (pm != kernel_pmap && va > UPT_MAX_ADDRESS)
3458					continue;
3459				ptep = pmap_pte(pm, va);
3460				if (pmap_pte_v(ptep))
3461					printf("%x:%x ", va, *ptep);
3462			};
3463
3464}
3465
3466void
3467pmap_pvdump(vm_paddr_t pa)
3468{
3469	pv_entry_t pv;
3470	pmap_t pmap;
3471	vm_page_t m;
3472
3473	printf("pa %x", pa);
3474	m = PHYS_TO_VM_PAGE(pa);
3475	TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3476		pmap = PV_PMAP(pv);
3477		printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va);
3478		pads(pmap);
3479	}
3480	printf(" ");
3481}
3482#endif
3483