pmap.c revision 117242
1/* 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * Copyright (c) 1994 John S. Dyson 5 * All rights reserved. 6 * Copyright (c) 1994 David Greenman 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to Berkeley by 10 * the Systems Programming Group of the University of Utah Computer 11 * Science Department and William Jolitz of UUNET Technologies Inc. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by the University of 24 * California, Berkeley and its contributors. 25 * 4. Neither the name of the University nor the names of its contributors 26 * may be used to endorse or promote products derived from this software 27 * without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * SUCH DAMAGE. 40 * 41 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 42 */ 43 44#include <sys/cdefs.h> 45__FBSDID("$FreeBSD: head/sys/i386/i386/pmap.c 117242 2003-07-04 22:13:39Z alc $"); 46/*- 47 * Copyright (c) 2003 Networks Associates Technology, Inc. 48 * All rights reserved. 49 * 50 * This software was developed for the FreeBSD Project by Jake Burkholder, 51 * Safeport Network Services, and Network Associates Laboratories, the 52 * Security Research Division of Network Associates, Inc. under 53 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 54 * CHATS research program. 55 * 56 * Redistribution and use in source and binary forms, with or without 57 * modification, are permitted provided that the following conditions 58 * are met: 59 * 1. Redistributions of source code must retain the above copyright 60 * notice, this list of conditions and the following disclaimer. 61 * 2. Redistributions in binary form must reproduce the above copyright 62 * notice, this list of conditions and the following disclaimer in the 63 * documentation and/or other materials provided with the distribution. 64 * 65 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 66 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 67 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 68 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 69 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 70 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 71 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 72 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 73 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 74 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 75 * SUCH DAMAGE. 76 */ 77 78/* 79 * Manages physical address maps. 80 * 81 * In addition to hardware address maps, this 82 * module is called upon to provide software-use-only 83 * maps which may or may not be stored in the same 84 * form as hardware maps. These pseudo-maps are 85 * used to store intermediate results from copy 86 * operations to and from address spaces. 87 * 88 * Since the information managed by this module is 89 * also stored by the logical address mapping module, 90 * this module may throw away valid virtual-to-physical 91 * mappings at almost any time. However, invalidations 92 * of virtual-to-physical mappings must be done as 93 * requested. 94 * 95 * In order to cope with hardware architectures which 96 * make virtual-to-physical map invalidates expensive, 97 * this module may delay invalidate or reduced protection 98 * operations until such time as they are actually 99 * necessary. This module is given full information as 100 * to which processors are currently using which maps, 101 * and to when physical maps must be made correct. 102 */ 103 104#include "opt_pmap.h" 105#include "opt_msgbuf.h" 106#include "opt_kstack_pages.h" 107#include "opt_swtch.h" 108 109#include <sys/param.h> 110#include <sys/systm.h> 111#include <sys/kernel.h> 112#include <sys/lock.h> 113#include <sys/mman.h> 114#include <sys/msgbuf.h> 115#include <sys/mutex.h> 116#include <sys/proc.h> 117#include <sys/sx.h> 118#include <sys/user.h> 119#include <sys/vmmeter.h> 120#include <sys/sysctl.h> 121#ifdef SMP 122#include <sys/smp.h> 123#endif 124 125#include <vm/vm.h> 126#include <vm/vm_param.h> 127#include <vm/vm_kern.h> 128#include <vm/vm_page.h> 129#include <vm/vm_map.h> 130#include <vm/vm_object.h> 131#include <vm/vm_extern.h> 132#include <vm/vm_pageout.h> 133#include <vm/vm_pager.h> 134#include <vm/uma.h> 135 136#include <machine/cpu.h> 137#include <machine/cputypes.h> 138#include <machine/md_var.h> 139#include <machine/specialreg.h> 140#if defined(SMP) || defined(APIC_IO) 141#include <machine/smp.h> 142#include <machine/apic.h> 143#include <machine/segments.h> 144#include <machine/tss.h> 145#endif /* SMP || APIC_IO */ 146 147#define PMAP_KEEP_PDIRS 148#ifndef PMAP_SHPGPERPROC 149#define PMAP_SHPGPERPROC 200 150#endif 151 152#if defined(DIAGNOSTIC) 153#define PMAP_DIAGNOSTIC 154#endif 155 156#define MINPV 2048 157 158#if !defined(PMAP_DIAGNOSTIC) 159#define PMAP_INLINE __inline 160#else 161#define PMAP_INLINE 162#endif 163 164/* 165 * Get PDEs and PTEs for user/kernel address space 166 */ 167#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 168#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 169 170#define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 171#define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 172#define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 173#define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 174#define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 175 176#define pmap_pte_set_w(pte, v) ((v)?(*(int *)pte |= PG_W):(*(int *)pte &= ~PG_W)) 177#define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 178 179/* 180 * Given a map and a machine independent protection code, 181 * convert to a vax protection code. 182 */ 183#define pte_prot(m, p) (protection_codes[p]) 184static int protection_codes[8]; 185 186struct pmap kernel_pmap_store; 187LIST_HEAD(pmaplist, pmap); 188static struct pmaplist allpmaps; 189static struct mtx allpmaps_lock; 190#if defined(SMP) && defined(LAZY_SWITCH) 191static struct mtx lazypmap_lock; 192#endif 193 194vm_paddr_t avail_start; /* PA of first available physical page */ 195vm_paddr_t avail_end; /* PA of last available physical page */ 196vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 197vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 198static boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */ 199static int pgeflag; /* PG_G or-in */ 200static int pseflag; /* PG_PS or-in */ 201 202static int nkpt; 203vm_offset_t kernel_vm_end; 204extern u_int32_t KERNend; 205 206#ifdef PAE 207static uma_zone_t pdptzone; 208#endif 209 210/* 211 * Data for the pv entry allocation mechanism 212 */ 213static uma_zone_t pvzone; 214static struct vm_object pvzone_obj; 215static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 216int pmap_pagedaemon_waken; 217 218/* 219 * All those kernel PT submaps that BSD is so fond of 220 */ 221pt_entry_t *CMAP1 = 0; 222static pt_entry_t *CMAP2, *CMAP3, *ptmmap; 223caddr_t CADDR1 = 0, ptvmmap = 0; 224static caddr_t CADDR2, CADDR3; 225static struct mtx CMAPCADDR12_lock; 226static pt_entry_t *msgbufmap; 227struct msgbuf *msgbufp = 0; 228 229/* 230 * Crashdump maps. 231 */ 232static pt_entry_t *pt_crashdumpmap; 233static caddr_t crashdumpmap; 234 235#ifdef SMP 236extern pt_entry_t *SMPpt; 237#endif 238static pt_entry_t *PMAP1 = 0; 239static pt_entry_t *PADDR1 = 0; 240 241static PMAP_INLINE void free_pv_entry(pv_entry_t pv); 242static pv_entry_t get_pv_entry(void); 243static void i386_protection_init(void); 244static __inline void pmap_changebit(vm_page_t m, int bit, boolean_t setem); 245 246static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva); 247static void pmap_remove_page(struct pmap *pmap, vm_offset_t va); 248static int pmap_remove_entry(struct pmap *pmap, vm_page_t m, 249 vm_offset_t va); 250static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, 251 vm_page_t mpte, vm_page_t m); 252 253static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va); 254 255static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex); 256static vm_page_t pmap_page_lookup(vm_object_t object, vm_pindex_t pindex); 257static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t); 258static vm_offset_t pmap_kmem_choose(vm_offset_t addr); 259static void *pmap_pv_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 260#ifdef PAE 261static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 262#endif 263 264static pd_entry_t pdir4mb; 265 266CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 267CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 268 269/* 270 * Move the kernel virtual free pointer to the next 271 * 4MB. This is used to help improve performance 272 * by using a large (4MB) page for much of the kernel 273 * (.text, .data, .bss) 274 */ 275static vm_offset_t 276pmap_kmem_choose(vm_offset_t addr) 277{ 278 vm_offset_t newaddr = addr; 279 280#ifdef I686_CPU_not /* Problem seems to have gone away */ 281 /* Deal with un-resolved Pentium4 issues */ 282 if (cpu_class == CPUCLASS_686 && 283 strcmp(cpu_vendor, "GenuineIntel") == 0 && 284 (cpu_id & 0xf00) == 0xf00) 285 return newaddr; 286#endif 287#ifndef DISABLE_PSE 288 if (cpu_feature & CPUID_PSE) 289 newaddr = (addr + (NBPDR - 1)) & ~(NBPDR - 1); 290#endif 291 return newaddr; 292} 293 294/* 295 * Bootstrap the system enough to run with virtual memory. 296 * 297 * On the i386 this is called after mapping has already been enabled 298 * and just syncs the pmap module with what has already been done. 299 * [We can't call it easily with mapping off since the kernel is not 300 * mapped with PA == VA, hence we would have to relocate every address 301 * from the linked base (virtual) address "KERNBASE" to the actual 302 * (physical) address starting relative to 0] 303 */ 304void 305pmap_bootstrap(firstaddr, loadaddr) 306 vm_paddr_t firstaddr; 307 vm_paddr_t loadaddr; 308{ 309 vm_offset_t va; 310 pt_entry_t *pte; 311 int i; 312 313 avail_start = firstaddr; 314 315 /* 316 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 317 * large. It should instead be correctly calculated in locore.s and 318 * not based on 'first' (which is a physical address, not a virtual 319 * address, for the start of unused physical memory). The kernel 320 * page tables are NOT double mapped and thus should not be included 321 * in this calculation. 322 */ 323 virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 324 virtual_avail = pmap_kmem_choose(virtual_avail); 325 326 virtual_end = VM_MAX_KERNEL_ADDRESS; 327 328 /* 329 * Initialize protection array. 330 */ 331 i386_protection_init(); 332 333 /* 334 * Initialize the kernel pmap (which is statically allocated). 335 */ 336 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 337#ifdef PAE 338 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 339#endif 340 kernel_pmap->pm_active = -1; /* don't allow deactivation */ 341 TAILQ_INIT(&kernel_pmap->pm_pvlist); 342 LIST_INIT(&allpmaps); 343#if defined(SMP) && defined(LAZY_SWITCH) 344 mtx_init(&lazypmap_lock, "lazypmap", NULL, MTX_SPIN); 345#endif 346 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 347 mtx_lock_spin(&allpmaps_lock); 348 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 349 mtx_unlock_spin(&allpmaps_lock); 350 nkpt = NKPT; 351 352 /* 353 * Reserve some special page table entries/VA space for temporary 354 * mapping of pages. 355 */ 356#define SYSMAP(c, p, v, n) \ 357 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 358 359 va = virtual_avail; 360 pte = vtopte(va); 361 362 /* 363 * CMAP1/CMAP2 are used for zeroing and copying pages. 364 * CMAP3 is used for the idle process page zeroing. 365 */ 366 SYSMAP(caddr_t, CMAP1, CADDR1, 1) 367 SYSMAP(caddr_t, CMAP2, CADDR2, 1) 368 SYSMAP(caddr_t, CMAP3, CADDR3, 1) 369 370 mtx_init(&CMAPCADDR12_lock, "CMAPCADDR12", NULL, MTX_DEF); 371 372 /* 373 * Crashdump maps. 374 */ 375 SYSMAP(caddr_t, pt_crashdumpmap, crashdumpmap, MAXDUMPPGS); 376 377 /* 378 * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 379 * XXX ptmmap is not used. 380 */ 381 SYSMAP(caddr_t, ptmmap, ptvmmap, 1) 382 383 /* 384 * msgbufp is used to map the system message buffer. 385 * XXX msgbufmap is not used. 386 */ 387 SYSMAP(struct msgbuf *, msgbufmap, msgbufp, 388 atop(round_page(MSGBUF_SIZE))) 389 390 /* 391 * ptemap is used for pmap_pte_quick 392 */ 393 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 394 395 virtual_avail = va; 396 397 *CMAP1 = *CMAP2 = 0; 398 for (i = 0; i < NKPT; i++) 399 PTD[i] = 0; 400 401 pgeflag = 0; 402#ifndef DISABLE_PG_G 403 if (cpu_feature & CPUID_PGE) 404 pgeflag = PG_G; 405#endif 406#ifdef I686_CPU_not /* Problem seems to have gone away */ 407 /* Deal with un-resolved Pentium4 issues */ 408 if (cpu_class == CPUCLASS_686 && 409 strcmp(cpu_vendor, "GenuineIntel") == 0 && 410 (cpu_id & 0xf00) == 0xf00) { 411 printf("Warning: Pentium 4 cpu: PG_G disabled (global flag)\n"); 412 pgeflag = 0; 413 } 414#endif 415 416/* 417 * Initialize the 4MB page size flag 418 */ 419 pseflag = 0; 420/* 421 * The 4MB page version of the initial 422 * kernel page mapping. 423 */ 424 pdir4mb = 0; 425 426#ifndef DISABLE_PSE 427 if (cpu_feature & CPUID_PSE) 428 pseflag = PG_PS; 429#endif 430#ifdef I686_CPU_not /* Problem seems to have gone away */ 431 /* Deal with un-resolved Pentium4 issues */ 432 if (cpu_class == CPUCLASS_686 && 433 strcmp(cpu_vendor, "GenuineIntel") == 0 && 434 (cpu_id & 0xf00) == 0xf00) { 435 printf("Warning: Pentium 4 cpu: PG_PS disabled (4MB pages)\n"); 436 pseflag = 0; 437 } 438#endif 439#ifndef DISABLE_PSE 440 if (pseflag) { 441 pd_entry_t ptditmp; 442 /* 443 * Note that we have enabled PSE mode 444 */ 445 ptditmp = *(PTmap + i386_btop(KERNBASE)); 446 ptditmp &= ~(NBPDR - 1); 447 ptditmp |= PG_V | PG_RW | PG_PS | PG_U | pgeflag; 448 pdir4mb = ptditmp; 449 } 450#endif 451#ifndef SMP 452 /* 453 * Turn on PGE/PSE. SMP does this later on since the 454 * 4K page tables are required for AP boot (for now). 455 * XXX fixme. 456 */ 457 pmap_set_opt(); 458#endif 459#ifdef SMP 460 if (cpu_apic_address == 0) 461 panic("pmap_bootstrap: no local apic! (non-SMP hardware?)"); 462 463 /* local apic is mapped on last page */ 464 SMPpt[NPTEPG - 1] = (pt_entry_t)(PG_V | PG_RW | PG_N | pgeflag | 465 (cpu_apic_address & PG_FRAME)); 466#endif 467 invltlb(); 468} 469 470/* 471 * Enable 4MB page mode for MP startup. Turn on PG_G support. 472 * BSP will run this after all the AP's have started up. 473 */ 474void 475pmap_set_opt(void) 476{ 477 pt_entry_t *pte; 478 vm_offset_t va, endva; 479 480 if (pgeflag && (cpu_feature & CPUID_PGE)) { 481 load_cr4(rcr4() | CR4_PGE); 482 invltlb(); /* Insurance */ 483 } 484#ifndef DISABLE_PSE 485 if (pseflag && (cpu_feature & CPUID_PSE)) { 486 load_cr4(rcr4() | CR4_PSE); 487 invltlb(); /* Insurance */ 488 } 489#endif 490 if (PCPU_GET(cpuid) == 0) { 491#ifndef DISABLE_PSE 492 if (pdir4mb) { 493 kernel_pmap->pm_pdir[KPTDI] = PTD[KPTDI] = pdir4mb; 494 invltlb(); /* Insurance */ 495 } 496#endif 497 if (pgeflag) { 498 /* Turn on PG_G for text, data, bss pages. */ 499 va = (vm_offset_t)btext; 500#ifndef DISABLE_PSE 501 if (pseflag && (cpu_feature & CPUID_PSE)) { 502 if (va < KERNBASE + (1 << PDRSHIFT)) 503 va = KERNBASE + (1 << PDRSHIFT); 504 } 505#endif 506 endva = KERNBASE + KERNend; 507 while (va < endva) { 508 pte = vtopte(va); 509 if (*pte) 510 *pte |= pgeflag; 511 va += PAGE_SIZE; 512 } 513 invltlb(); /* Insurance */ 514 } 515 /* 516 * We do not need to broadcast the invltlb here, because 517 * each AP does it the moment it is released from the boot 518 * lock. See ap_init(). 519 */ 520 } 521} 522 523static void * 524pmap_pv_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 525{ 526 *flags = UMA_SLAB_PRIV; 527 return (void *)kmem_alloc(kernel_map, bytes); 528} 529 530#ifdef PAE 531static void * 532pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 533{ 534 *flags = UMA_SLAB_PRIV; 535 return (contigmalloc(PAGE_SIZE, NULL, 0, 0x0ULL, 0xffffffffULL, 1, 0)); 536} 537#endif 538 539/* 540 * Initialize the pmap module. 541 * Called by vm_init, to initialize any structures that the pmap 542 * system needs to map virtual memory. 543 * pmap_init has been enhanced to support in a fairly consistant 544 * way, discontiguous physical memory. 545 */ 546void 547pmap_init(phys_start, phys_end) 548 vm_paddr_t phys_start, phys_end; 549{ 550 int i; 551 int initial_pvs; 552 553 /* 554 * Allocate memory for random pmap data structures. Includes the 555 * pv_head_table. 556 */ 557 558 for(i = 0; i < vm_page_array_size; i++) { 559 vm_page_t m; 560 561 m = &vm_page_array[i]; 562 TAILQ_INIT(&m->md.pv_list); 563 m->md.pv_list_count = 0; 564 } 565 566 /* 567 * init the pv free list 568 */ 569 initial_pvs = vm_page_array_size; 570 if (initial_pvs < MINPV) 571 initial_pvs = MINPV; 572 pvzone = uma_zcreate("PV ENTRY", sizeof (struct pv_entry), NULL, NULL, 573 NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM); 574 uma_zone_set_allocf(pvzone, pmap_pv_allocf); 575 uma_prealloc(pvzone, initial_pvs); 576 577#ifdef PAE 578 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL, 579 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1, 0); 580 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf); 581#endif 582 583 /* 584 * Now it is safe to enable pv_table recording. 585 */ 586 pmap_initialized = TRUE; 587} 588 589/* 590 * Initialize the address space (zone) for the pv_entries. Set a 591 * high water mark so that the system can recover from excessive 592 * numbers of pv entries. 593 */ 594void 595pmap_init2() 596{ 597 int shpgperproc = PMAP_SHPGPERPROC; 598 599 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 600 pv_entry_max = shpgperproc * maxproc + vm_page_array_size; 601 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 602 pv_entry_high_water = 9 * (pv_entry_max / 10); 603 uma_zone_set_obj(pvzone, &pvzone_obj, pv_entry_max); 604} 605 606 607/*************************************************** 608 * Low level helper routines..... 609 ***************************************************/ 610 611#if defined(PMAP_DIAGNOSTIC) 612 613/* 614 * This code checks for non-writeable/modified pages. 615 * This should be an invalid condition. 616 */ 617static int 618pmap_nw_modified(pt_entry_t ptea) 619{ 620 int pte; 621 622 pte = (int) ptea; 623 624 if ((pte & (PG_M|PG_RW)) == PG_M) 625 return 1; 626 else 627 return 0; 628} 629#endif 630 631 632/* 633 * this routine defines the region(s) of memory that should 634 * not be tested for the modified bit. 635 */ 636static PMAP_INLINE int 637pmap_track_modified(vm_offset_t va) 638{ 639 if ((va < kmi.clean_sva) || (va >= kmi.clean_eva)) 640 return 1; 641 else 642 return 0; 643} 644 645#ifdef I386_CPU 646/* 647 * i386 only has "invalidate everything" and no SMP to worry about. 648 */ 649PMAP_INLINE void 650pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 651{ 652 653 if (pmap == kernel_pmap || pmap->pm_active) 654 invltlb(); 655} 656 657PMAP_INLINE void 658pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 659{ 660 661 if (pmap == kernel_pmap || pmap->pm_active) 662 invltlb(); 663} 664 665PMAP_INLINE void 666pmap_invalidate_all(pmap_t pmap) 667{ 668 669 if (pmap == kernel_pmap || pmap->pm_active) 670 invltlb(); 671} 672#else /* !I386_CPU */ 673#ifdef SMP 674/* 675 * For SMP, these functions have to use the IPI mechanism for coherence. 676 */ 677void 678pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 679{ 680 u_int cpumask; 681 u_int other_cpus; 682 683 critical_enter(); 684 /* 685 * We need to disable interrupt preemption but MUST NOT have 686 * interrupts disabled here. 687 * XXX we may need to hold schedlock to get a coherent pm_active 688 */ 689 if (pmap->pm_active == -1 || pmap->pm_active == all_cpus) { 690 invlpg(va); 691 smp_invlpg(va); 692 } else { 693 cpumask = PCPU_GET(cpumask); 694 other_cpus = PCPU_GET(other_cpus); 695 if (pmap->pm_active & cpumask) 696 invlpg(va); 697 if (pmap->pm_active & other_cpus) 698 smp_masked_invlpg(pmap->pm_active & other_cpus, va); 699 } 700 critical_exit(); 701} 702 703void 704pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 705{ 706 u_int cpumask; 707 u_int other_cpus; 708 vm_offset_t addr; 709 710 critical_enter(); 711 /* 712 * We need to disable interrupt preemption but MUST NOT have 713 * interrupts disabled here. 714 * XXX we may need to hold schedlock to get a coherent pm_active 715 */ 716 if (pmap->pm_active == -1 || pmap->pm_active == all_cpus) { 717 for (addr = sva; addr < eva; addr += PAGE_SIZE) 718 invlpg(addr); 719 smp_invlpg_range(sva, eva); 720 } else { 721 cpumask = PCPU_GET(cpumask); 722 other_cpus = PCPU_GET(other_cpus); 723 if (pmap->pm_active & cpumask) 724 for (addr = sva; addr < eva; addr += PAGE_SIZE) 725 invlpg(addr); 726 if (pmap->pm_active & other_cpus) 727 smp_masked_invlpg_range(pmap->pm_active & other_cpus, 728 sva, eva); 729 } 730 critical_exit(); 731} 732 733void 734pmap_invalidate_all(pmap_t pmap) 735{ 736 u_int cpumask; 737 u_int other_cpus; 738 739 critical_enter(); 740 /* 741 * We need to disable interrupt preemption but MUST NOT have 742 * interrupts disabled here. 743 * XXX we may need to hold schedlock to get a coherent pm_active 744 */ 745 if (pmap->pm_active == -1 || pmap->pm_active == all_cpus) { 746 invltlb(); 747 smp_invltlb(); 748 } else { 749 cpumask = PCPU_GET(cpumask); 750 other_cpus = PCPU_GET(other_cpus); 751 if (pmap->pm_active & cpumask) 752 invltlb(); 753 if (pmap->pm_active & other_cpus) 754 smp_masked_invltlb(pmap->pm_active & other_cpus); 755 } 756 critical_exit(); 757} 758#else /* !SMP */ 759/* 760 * Normal, non-SMP, 486+ invalidation functions. 761 * We inline these within pmap.c for speed. 762 */ 763PMAP_INLINE void 764pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 765{ 766 767 if (pmap == kernel_pmap || pmap->pm_active) 768 invlpg(va); 769} 770 771PMAP_INLINE void 772pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 773{ 774 vm_offset_t addr; 775 776 if (pmap == kernel_pmap || pmap->pm_active) 777 for (addr = sva; addr < eva; addr += PAGE_SIZE) 778 invlpg(addr); 779} 780 781PMAP_INLINE void 782pmap_invalidate_all(pmap_t pmap) 783{ 784 785 if (pmap == kernel_pmap || pmap->pm_active) 786 invltlb(); 787} 788#endif /* !SMP */ 789#endif /* !I386_CPU */ 790 791/* 792 * Are we current address space or kernel? 793 */ 794static __inline int 795pmap_is_current(pmap_t pmap) 796{ 797 return (pmap == kernel_pmap || 798 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME)); 799} 800 801/* 802 * Super fast pmap_pte routine best used when scanning 803 * the pv lists. This eliminates many coarse-grained 804 * invltlb calls. Note that many of the pv list 805 * scans are across different pmaps. It is very wasteful 806 * to do an entire invltlb for checking a single mapping. 807 */ 808pt_entry_t * 809pmap_pte_quick(pmap, va) 810 register pmap_t pmap; 811 vm_offset_t va; 812{ 813 pd_entry_t newpf; 814 pd_entry_t *pde; 815 816 pde = pmap_pde(pmap, va); 817 if (*pde & PG_PS) 818 return (pde); 819 if (*pde != 0) { 820 /* are we current address space or kernel? */ 821 if (pmap_is_current(pmap)) 822 return vtopte(va); 823 newpf = *pde & PG_FRAME; 824 if (((*PMAP1) & PG_FRAME) != newpf) { 825 *PMAP1 = newpf | PG_RW | PG_V; 826 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR1); 827 } 828 return PADDR1 + (i386_btop(va) & (NPTEPG - 1)); 829 } 830 return (0); 831} 832 833/* 834 * Routine: pmap_extract 835 * Function: 836 * Extract the physical page address associated 837 * with the given map/virtual_address pair. 838 */ 839vm_paddr_t 840pmap_extract(pmap, va) 841 register pmap_t pmap; 842 vm_offset_t va; 843{ 844 vm_paddr_t rtval; 845 pt_entry_t *pte; 846 pd_entry_t pde; 847 848 if (pmap == 0) 849 return 0; 850 pde = pmap->pm_pdir[va >> PDRSHIFT]; 851 if (pde != 0) { 852 if ((pde & PG_PS) != 0) { 853 rtval = (pde & ~PDRMASK) | (va & PDRMASK); 854 return rtval; 855 } 856 pte = pmap_pte_quick(pmap, va); 857 rtval = ((*pte & PG_FRAME) | (va & PAGE_MASK)); 858 return rtval; 859 } 860 return 0; 861 862} 863 864/*************************************************** 865 * Low level mapping routines..... 866 ***************************************************/ 867 868/* 869 * Add a wired page to the kva. 870 * Note: not SMP coherent. 871 */ 872PMAP_INLINE void 873pmap_kenter(vm_offset_t va, vm_paddr_t pa) 874{ 875 pt_entry_t *pte; 876 877 pte = vtopte(va); 878 pte_store(pte, pa | PG_RW | PG_V | pgeflag); 879} 880 881/* 882 * Remove a page from the kernel pagetables. 883 * Note: not SMP coherent. 884 */ 885PMAP_INLINE void 886pmap_kremove(vm_offset_t va) 887{ 888 pt_entry_t *pte; 889 890 pte = vtopte(va); 891 pte_clear(pte); 892} 893 894/* 895 * Used to map a range of physical addresses into kernel 896 * virtual address space. 897 * 898 * The value passed in '*virt' is a suggested virtual address for 899 * the mapping. Architectures which can support a direct-mapped 900 * physical to virtual region can return the appropriate address 901 * within that region, leaving '*virt' unchanged. Other 902 * architectures should map the pages starting at '*virt' and 903 * update '*virt' with the first usable address after the mapped 904 * region. 905 */ 906vm_offset_t 907pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 908{ 909 vm_offset_t va, sva; 910 911 va = sva = *virt; 912 while (start < end) { 913 pmap_kenter(va, start); 914 va += PAGE_SIZE; 915 start += PAGE_SIZE; 916 } 917 pmap_invalidate_range(kernel_pmap, sva, va); 918 *virt = va; 919 return (sva); 920} 921 922 923/* 924 * Add a list of wired pages to the kva 925 * this routine is only used for temporary 926 * kernel mappings that do not need to have 927 * page modification or references recorded. 928 * Note that old mappings are simply written 929 * over. The page *must* be wired. 930 * Note: SMP coherent. Uses a ranged shootdown IPI. 931 */ 932void 933pmap_qenter(vm_offset_t sva, vm_page_t *m, int count) 934{ 935 vm_offset_t va; 936 937 va = sva; 938 while (count-- > 0) { 939 pmap_kenter(va, VM_PAGE_TO_PHYS(*m)); 940 va += PAGE_SIZE; 941 m++; 942 } 943 pmap_invalidate_range(kernel_pmap, sva, va); 944} 945 946/* 947 * This routine tears out page mappings from the 948 * kernel -- it is meant only for temporary mappings. 949 * Note: SMP coherent. Uses a ranged shootdown IPI. 950 */ 951void 952pmap_qremove(vm_offset_t sva, int count) 953{ 954 vm_offset_t va; 955 956 va = sva; 957 while (count-- > 0) { 958 pmap_kremove(va); 959 va += PAGE_SIZE; 960 } 961 pmap_invalidate_range(kernel_pmap, sva, va); 962} 963 964static vm_page_t 965pmap_page_lookup(vm_object_t object, vm_pindex_t pindex) 966{ 967 vm_page_t m; 968 969retry: 970 m = vm_page_lookup(object, pindex); 971 if (m != NULL) { 972 vm_page_lock_queues(); 973 if (vm_page_sleep_if_busy(m, FALSE, "pplookp")) 974 goto retry; 975 vm_page_unlock_queues(); 976 } 977 return m; 978} 979 980/*************************************************** 981 * Page table page management routines..... 982 ***************************************************/ 983 984/* 985 * This routine unholds page table pages, and if the hold count 986 * drops to zero, then it decrements the wire count. 987 */ 988static int 989_pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m) 990{ 991 992 while (vm_page_sleep_if_busy(m, FALSE, "pmuwpt")) 993 vm_page_lock_queues(); 994 995 if (m->hold_count == 0) { 996 vm_offset_t pteva; 997 /* 998 * unmap the page table page 999 */ 1000 pmap->pm_pdir[m->pindex] = 0; 1001 --pmap->pm_stats.resident_count; 1002 if (pmap_is_current(pmap)) { 1003 /* 1004 * Do an invltlb to make the invalidated mapping 1005 * take effect immediately. 1006 */ 1007 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1008 pmap_invalidate_page(pmap, pteva); 1009 } 1010 1011 /* 1012 * If the page is finally unwired, simply free it. 1013 */ 1014 --m->wire_count; 1015 if (m->wire_count == 0) { 1016 vm_page_busy(m); 1017 vm_page_free_zero(m); 1018 atomic_subtract_int(&cnt.v_wire_count, 1); 1019 } 1020 return 1; 1021 } 1022 return 0; 1023} 1024 1025static PMAP_INLINE int 1026pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m) 1027{ 1028 vm_page_unhold(m); 1029 if (m->hold_count == 0) 1030 return _pmap_unwire_pte_hold(pmap, m); 1031 else 1032 return 0; 1033} 1034 1035/* 1036 * After removing a page table entry, this routine is used to 1037 * conditionally free the page, and manage the hold/wire counts. 1038 */ 1039static int 1040pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t mpte) 1041{ 1042 unsigned ptepindex; 1043 if (va >= VM_MAXUSER_ADDRESS) 1044 return 0; 1045 1046 if (mpte == NULL) { 1047 ptepindex = (va >> PDRSHIFT); 1048 if (pmap->pm_pteobj->root && 1049 (pmap->pm_pteobj->root->pindex == ptepindex)) { 1050 mpte = pmap->pm_pteobj->root; 1051 } else { 1052 while ((mpte = vm_page_lookup(pmap->pm_pteobj, ptepindex)) != NULL && 1053 vm_page_sleep_if_busy(mpte, FALSE, "pulook")) 1054 vm_page_lock_queues(); 1055 } 1056 } 1057 1058 return pmap_unwire_pte_hold(pmap, mpte); 1059} 1060 1061void 1062pmap_pinit0(pmap) 1063 struct pmap *pmap; 1064{ 1065 1066 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1067#ifdef PAE 1068 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1069#endif 1070 pmap->pm_active = 0; 1071 PCPU_SET(curpmap, pmap); 1072 TAILQ_INIT(&pmap->pm_pvlist); 1073 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1074 mtx_lock_spin(&allpmaps_lock); 1075 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1076 mtx_unlock_spin(&allpmaps_lock); 1077} 1078 1079/* 1080 * Initialize a preallocated and zeroed pmap structure, 1081 * such as one in a vmspace structure. 1082 */ 1083void 1084pmap_pinit(pmap) 1085 register struct pmap *pmap; 1086{ 1087 vm_page_t ptdpg[NPGPTD]; 1088 vm_paddr_t pa; 1089 int i; 1090 1091 /* 1092 * No need to allocate page table space yet but we do need a valid 1093 * page directory table. 1094 */ 1095 if (pmap->pm_pdir == NULL) { 1096 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_pageable(kernel_map, 1097 NBPTD); 1098#ifdef PAE 1099 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO); 1100 KASSERT(((vm_offset_t)pmap->pm_pdpt & 1101 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0, 1102 ("pmap_pinit: pdpt misaligned")); 1103 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30), 1104 ("pmap_pinit: pdpt above 4g")); 1105#endif 1106 } 1107 1108 /* 1109 * allocate object for the ptes 1110 */ 1111 if (pmap->pm_pteobj == NULL) 1112 pmap->pm_pteobj = vm_object_allocate(OBJT_DEFAULT, PTDPTDI + 1113 NPGPTD); 1114 1115 /* 1116 * allocate the page directory page(s) 1117 */ 1118 for (i = 0; i < NPGPTD; i++) { 1119 ptdpg[i] = vm_page_grab(pmap->pm_pteobj, PTDPTDI + i, 1120 VM_ALLOC_NORMAL | VM_ALLOC_RETRY | VM_ALLOC_WIRED | 1121 VM_ALLOC_ZERO); 1122 vm_page_lock_queues(); 1123 vm_page_flag_clear(ptdpg[i], PG_BUSY); 1124 ptdpg[i]->valid = VM_PAGE_BITS_ALL; 1125 vm_page_unlock_queues(); 1126 } 1127 1128 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1129 1130 for (i = 0; i < NPGPTD; i++) { 1131 if ((ptdpg[i]->flags & PG_ZERO) == 0) 1132 bzero(pmap->pm_pdir + (i * NPDEPG), PAGE_SIZE); 1133 } 1134 1135 mtx_lock_spin(&allpmaps_lock); 1136 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1137 mtx_unlock_spin(&allpmaps_lock); 1138 /* Wire in kernel global address entries. */ 1139 /* XXX copies current process, does not fill in MPPTDI */ 1140 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1141#ifdef SMP 1142 pmap->pm_pdir[MPPTDI] = PTD[MPPTDI]; 1143#endif 1144 1145 /* install self-referential address mapping entry(s) */ 1146 for (i = 0; i < NPGPTD; i++) { 1147 pa = VM_PAGE_TO_PHYS(ptdpg[i]); 1148 pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M; 1149#ifdef PAE 1150 pmap->pm_pdpt[i] = pa | PG_V; 1151#endif 1152 } 1153 1154 pmap->pm_active = 0; 1155 TAILQ_INIT(&pmap->pm_pvlist); 1156 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1157} 1158 1159/* 1160 * Wire in kernel global address entries. To avoid a race condition 1161 * between pmap initialization and pmap_growkernel, this procedure 1162 * should be called after the vmspace is attached to the process 1163 * but before this pmap is activated. 1164 */ 1165void 1166pmap_pinit2(pmap) 1167 struct pmap *pmap; 1168{ 1169 /* XXX: Remove this stub when no longer called */ 1170} 1171 1172/* 1173 * this routine is called if the page table page is not 1174 * mapped correctly. 1175 */ 1176static vm_page_t 1177_pmap_allocpte(pmap, ptepindex) 1178 pmap_t pmap; 1179 unsigned ptepindex; 1180{ 1181 vm_paddr_t ptepa; 1182 vm_offset_t pteva; 1183 vm_page_t m; 1184 1185 /* 1186 * Find or fabricate a new pagetable page 1187 */ 1188 m = vm_page_grab(pmap->pm_pteobj, ptepindex, 1189 VM_ALLOC_WIRED | VM_ALLOC_ZERO | VM_ALLOC_RETRY); 1190 1191 KASSERT(m->queue == PQ_NONE, 1192 ("_pmap_allocpte: %p->queue != PQ_NONE", m)); 1193 1194 /* 1195 * Increment the hold count for the page table page 1196 * (denoting a new mapping.) 1197 */ 1198 m->hold_count++; 1199 1200 /* 1201 * Map the pagetable page into the process address space, if 1202 * it isn't already there. 1203 */ 1204 1205 pmap->pm_stats.resident_count++; 1206 1207 ptepa = VM_PAGE_TO_PHYS(m); 1208 pmap->pm_pdir[ptepindex] = 1209 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M); 1210 1211 /* 1212 * Try to use the new mapping, but if we cannot, then 1213 * do it with the routine that maps the page explicitly. 1214 */ 1215 if ((m->flags & PG_ZERO) == 0) { 1216 if (pmap_is_current(pmap)) { 1217 pteva = VM_MAXUSER_ADDRESS + i386_ptob(ptepindex); 1218 bzero((caddr_t) pteva, PAGE_SIZE); 1219 } else { 1220 pmap_zero_page(m); 1221 } 1222 } 1223 vm_page_lock_queues(); 1224 m->valid = VM_PAGE_BITS_ALL; 1225 vm_page_flag_clear(m, PG_ZERO); 1226 vm_page_wakeup(m); 1227 vm_page_unlock_queues(); 1228 1229 return m; 1230} 1231 1232static vm_page_t 1233pmap_allocpte(pmap_t pmap, vm_offset_t va) 1234{ 1235 unsigned ptepindex; 1236 pd_entry_t ptepa; 1237 vm_page_t m; 1238 1239 /* 1240 * Calculate pagetable page index 1241 */ 1242 ptepindex = va >> PDRSHIFT; 1243 1244 /* 1245 * Get the page directory entry 1246 */ 1247 ptepa = pmap->pm_pdir[ptepindex]; 1248 1249 /* 1250 * This supports switching from a 4MB page to a 1251 * normal 4K page. 1252 */ 1253 if (ptepa & PG_PS) { 1254 pmap->pm_pdir[ptepindex] = 0; 1255 ptepa = 0; 1256 pmap_invalidate_all(kernel_pmap); 1257 } 1258 1259 /* 1260 * If the page table page is mapped, we just increment the 1261 * hold count, and activate it. 1262 */ 1263 if (ptepa) { 1264 /* 1265 * In order to get the page table page, try the 1266 * hint first. 1267 */ 1268 if (pmap->pm_pteobj->root && 1269 (pmap->pm_pteobj->root->pindex == ptepindex)) { 1270 m = pmap->pm_pteobj->root; 1271 } else { 1272 m = pmap_page_lookup(pmap->pm_pteobj, ptepindex); 1273 } 1274 m->hold_count++; 1275 return m; 1276 } 1277 /* 1278 * Here if the pte page isn't mapped, or if it has been deallocated. 1279 */ 1280 return _pmap_allocpte(pmap, ptepindex); 1281} 1282 1283 1284/*************************************************** 1285* Pmap allocation/deallocation routines. 1286 ***************************************************/ 1287 1288#ifdef LAZY_SWITCH 1289#ifdef SMP 1290/* 1291 * Deal with a SMP shootdown of other users of the pmap that we are 1292 * trying to dispose of. This can be a bit hairy. 1293 */ 1294static u_int *lazymask; 1295static u_int lazyptd; 1296static volatile u_int lazywait; 1297 1298void pmap_lazyfix_action(void); 1299 1300void 1301pmap_lazyfix_action(void) 1302{ 1303 u_int mymask = PCPU_GET(cpumask); 1304 1305 if (rcr3() == lazyptd) 1306 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1307 atomic_clear_int(lazymask, mymask); 1308 atomic_store_rel_int(&lazywait, 1); 1309} 1310 1311static void 1312pmap_lazyfix_self(u_int mymask) 1313{ 1314 1315 if (rcr3() == lazyptd) 1316 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1317 atomic_clear_int(lazymask, mymask); 1318} 1319 1320 1321static void 1322pmap_lazyfix(pmap_t pmap) 1323{ 1324 u_int mymask = PCPU_GET(cpumask); 1325 u_int mask; 1326 register u_int spins; 1327 1328 while ((mask = pmap->pm_active) != 0) { 1329 spins = 50000000; 1330 mask = mask & -mask; /* Find least significant set bit */ 1331 mtx_lock_spin(&lazypmap_lock); 1332#ifdef PAE 1333 lazyptd = vtophys(pmap->pm_pdpt); 1334#else 1335 lazyptd = vtophys(pmap->pm_pdir); 1336#endif 1337 if (mask == mymask) { 1338 lazymask = &pmap->pm_active; 1339 pmap_lazyfix_self(mymask); 1340 } else { 1341 atomic_store_rel_int((u_int *)&lazymask, 1342 (u_int)&pmap->pm_active); 1343 atomic_store_rel_int(&lazywait, 0); 1344 ipi_selected(mask, IPI_LAZYPMAP); 1345 while (lazywait == 0) { 1346 ia32_pause(); 1347 if (--spins == 0) 1348 break; 1349 } 1350 } 1351 mtx_unlock_spin(&lazypmap_lock); 1352 if (spins == 0) 1353 printf("pmap_lazyfix: spun for 50000000\n"); 1354 } 1355} 1356 1357#else /* SMP */ 1358 1359/* 1360 * Cleaning up on uniprocessor is easy. For various reasons, we're 1361 * unlikely to have to even execute this code, including the fact 1362 * that the cleanup is deferred until the parent does a wait(2), which 1363 * means that another userland process has run. 1364 */ 1365static void 1366pmap_lazyfix(pmap_t pmap) 1367{ 1368 u_int cr3; 1369 1370 cr3 = vtophys(pmap->pm_pdir); 1371 if (cr3 == rcr3()) { 1372 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1373 pmap->pm_active &= ~(PCPU_GET(cpumask)); 1374 } 1375} 1376#endif /* SMP */ 1377#endif /* LAZY_SWITCH */ 1378 1379/* 1380 * Release any resources held by the given physical map. 1381 * Called when a pmap initialized by pmap_pinit is being released. 1382 * Should only be called if the map contains no valid mappings. 1383 */ 1384void 1385pmap_release(pmap_t pmap) 1386{ 1387 vm_object_t object; 1388 vm_page_t m; 1389 int i; 1390 1391 object = pmap->pm_pteobj; 1392 1393 KASSERT(object->ref_count == 1, 1394 ("pmap_release: pteobj reference count %d != 1", 1395 object->ref_count)); 1396 KASSERT(pmap->pm_stats.resident_count == 0, 1397 ("pmap_release: pmap resident count %ld != 0", 1398 pmap->pm_stats.resident_count)); 1399 1400#ifdef LAZY_SWITCH 1401 pmap_lazyfix(pmap); 1402#endif 1403 mtx_lock_spin(&allpmaps_lock); 1404 LIST_REMOVE(pmap, pm_list); 1405 mtx_unlock_spin(&allpmaps_lock); 1406 1407 bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) * 1408 sizeof(*pmap->pm_pdir)); 1409#ifdef SMP 1410 pmap->pm_pdir[MPPTDI] = 0; 1411#endif 1412 1413 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1414 1415 vm_page_lock_queues(); 1416 for (i = 0; i < NPGPTD; i++) { 1417 m = TAILQ_FIRST(&object->memq); 1418#ifdef PAE 1419 KASSERT(VM_PAGE_TO_PHYS(m) == (pmap->pm_pdpt[i] & PG_FRAME), 1420 ("pmap_release: got wrong ptd page")); 1421#endif 1422 m->wire_count--; 1423 atomic_subtract_int(&cnt.v_wire_count, 1); 1424 vm_page_busy(m); 1425 vm_page_free_zero(m); 1426 } 1427 KASSERT(TAILQ_EMPTY(&object->memq), 1428 ("pmap_release: leaking page table pages")); 1429 vm_page_unlock_queues(); 1430} 1431 1432static int 1433kvm_size(SYSCTL_HANDLER_ARGS) 1434{ 1435 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1436 1437 return sysctl_handle_long(oidp, &ksize, 0, req); 1438} 1439SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1440 0, 0, kvm_size, "IU", "Size of KVM"); 1441 1442static int 1443kvm_free(SYSCTL_HANDLER_ARGS) 1444{ 1445 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1446 1447 return sysctl_handle_long(oidp, &kfree, 0, req); 1448} 1449SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1450 0, 0, kvm_free, "IU", "Amount of KVM free"); 1451 1452/* 1453 * grow the number of kernel page table entries, if needed 1454 */ 1455void 1456pmap_growkernel(vm_offset_t addr) 1457{ 1458 struct pmap *pmap; 1459 int s; 1460 vm_paddr_t ptppaddr; 1461 vm_page_t nkpg; 1462 pd_entry_t newpdir; 1463 pt_entry_t *pde; 1464 1465 s = splhigh(); 1466 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1467 if (kernel_vm_end == 0) { 1468 kernel_vm_end = KERNBASE; 1469 nkpt = 0; 1470 while (pdir_pde(PTD, kernel_vm_end)) { 1471 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1472 nkpt++; 1473 } 1474 } 1475 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1476 while (kernel_vm_end < addr) { 1477 if (pdir_pde(PTD, kernel_vm_end)) { 1478 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1479 continue; 1480 } 1481 1482 /* 1483 * This index is bogus, but out of the way 1484 */ 1485 nkpg = vm_page_alloc(NULL, nkpt, 1486 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1487 if (!nkpg) 1488 panic("pmap_growkernel: no memory to grow kernel"); 1489 1490 nkpt++; 1491 1492 pmap_zero_page(nkpg); 1493 ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1494 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1495 pdir_pde(PTD, kernel_vm_end) = newpdir; 1496 1497 mtx_lock_spin(&allpmaps_lock); 1498 LIST_FOREACH(pmap, &allpmaps, pm_list) { 1499 pde = pmap_pde(pmap, kernel_vm_end); 1500 pde_store(pde, newpdir); 1501 } 1502 mtx_unlock_spin(&allpmaps_lock); 1503 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1504 } 1505 splx(s); 1506} 1507 1508 1509/*************************************************** 1510 * page management routines. 1511 ***************************************************/ 1512 1513/* 1514 * free the pv_entry back to the free list 1515 */ 1516static PMAP_INLINE void 1517free_pv_entry(pv_entry_t pv) 1518{ 1519 pv_entry_count--; 1520 uma_zfree(pvzone, pv); 1521} 1522 1523/* 1524 * get a new pv_entry, allocating a block from the system 1525 * when needed. 1526 * the memory allocation is performed bypassing the malloc code 1527 * because of the possibility of allocations at interrupt time. 1528 */ 1529static pv_entry_t 1530get_pv_entry(void) 1531{ 1532 pv_entry_count++; 1533 if (pv_entry_high_water && 1534 (pv_entry_count > pv_entry_high_water) && 1535 (pmap_pagedaemon_waken == 0)) { 1536 pmap_pagedaemon_waken = 1; 1537 wakeup (&vm_pages_needed); 1538 } 1539 return uma_zalloc(pvzone, M_NOWAIT); 1540} 1541 1542/* 1543 * If it is the first entry on the list, it is actually 1544 * in the header and we must copy the following entry up 1545 * to the header. Otherwise we must search the list for 1546 * the entry. In either case we free the now unused entry. 1547 */ 1548 1549static int 1550pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 1551{ 1552 pv_entry_t pv; 1553 int rtval; 1554 int s; 1555 1556 s = splvm(); 1557 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1558 if (m->md.pv_list_count < pmap->pm_stats.resident_count) { 1559 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 1560 if (pmap == pv->pv_pmap && va == pv->pv_va) 1561 break; 1562 } 1563 } else { 1564 TAILQ_FOREACH(pv, &pmap->pm_pvlist, pv_plist) { 1565 if (va == pv->pv_va) 1566 break; 1567 } 1568 } 1569 1570 rtval = 0; 1571 if (pv) { 1572 rtval = pmap_unuse_pt(pmap, va, pv->pv_ptem); 1573 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1574 m->md.pv_list_count--; 1575 if (TAILQ_FIRST(&m->md.pv_list) == NULL) 1576 vm_page_flag_clear(m, PG_WRITEABLE); 1577 1578 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist); 1579 free_pv_entry(pv); 1580 } 1581 1582 splx(s); 1583 return rtval; 1584} 1585 1586/* 1587 * Create a pv entry for page at pa for 1588 * (pmap, va). 1589 */ 1590static void 1591pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t mpte, vm_page_t m) 1592{ 1593 1594 int s; 1595 pv_entry_t pv; 1596 1597 s = splvm(); 1598 pv = get_pv_entry(); 1599 pv->pv_va = va; 1600 pv->pv_pmap = pmap; 1601 pv->pv_ptem = mpte; 1602 1603 TAILQ_INSERT_TAIL(&pmap->pm_pvlist, pv, pv_plist); 1604 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 1605 m->md.pv_list_count++; 1606 1607 splx(s); 1608} 1609 1610/* 1611 * pmap_remove_pte: do the things to unmap a page in a process 1612 */ 1613static int 1614pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va) 1615{ 1616 pt_entry_t oldpte; 1617 vm_page_t m; 1618 1619 oldpte = pte_load_clear(ptq); 1620 if (oldpte & PG_W) 1621 pmap->pm_stats.wired_count -= 1; 1622 /* 1623 * Machines that don't support invlpg, also don't support 1624 * PG_G. 1625 */ 1626 if (oldpte & PG_G) 1627 pmap_invalidate_page(kernel_pmap, va); 1628 pmap->pm_stats.resident_count -= 1; 1629 if (oldpte & PG_MANAGED) { 1630 m = PHYS_TO_VM_PAGE(oldpte); 1631 if (oldpte & PG_M) { 1632#if defined(PMAP_DIAGNOSTIC) 1633 if (pmap_nw_modified((pt_entry_t) oldpte)) { 1634 printf( 1635 "pmap_remove: modified page not writable: va: 0x%x, pte: 0x%x\n", 1636 va, oldpte); 1637 } 1638#endif 1639 if (pmap_track_modified(va)) 1640 vm_page_dirty(m); 1641 } 1642 if (oldpte & PG_A) 1643 vm_page_flag_set(m, PG_REFERENCED); 1644 return pmap_remove_entry(pmap, m, va); 1645 } else { 1646 return pmap_unuse_pt(pmap, va, NULL); 1647 } 1648 1649 return 0; 1650} 1651 1652/* 1653 * Remove a single page from a process address space 1654 */ 1655static void 1656pmap_remove_page(pmap_t pmap, vm_offset_t va) 1657{ 1658 pt_entry_t *pte; 1659 1660 if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0) 1661 return; 1662 pmap_remove_pte(pmap, pte, va); 1663 pmap_invalidate_page(pmap, va); 1664} 1665 1666/* 1667 * Remove the given range of addresses from the specified map. 1668 * 1669 * It is assumed that the start and end are properly 1670 * rounded to the page size. 1671 */ 1672void 1673pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 1674{ 1675 vm_offset_t pdnxt; 1676 pd_entry_t ptpaddr; 1677 pt_entry_t *pte; 1678 int anyvalid; 1679 1680 if (pmap == NULL) 1681 return; 1682 1683 if (pmap->pm_stats.resident_count == 0) 1684 return; 1685 1686 /* 1687 * special handling of removing one page. a very 1688 * common operation and easy to short circuit some 1689 * code. 1690 */ 1691 if ((sva + PAGE_SIZE == eva) && 1692 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 1693 pmap_remove_page(pmap, sva); 1694 return; 1695 } 1696 1697 anyvalid = 0; 1698 1699 for (; sva < eva; sva = pdnxt) { 1700 unsigned pdirindex; 1701 1702 /* 1703 * Calculate index for next page table. 1704 */ 1705 pdnxt = (sva + NBPDR) & ~PDRMASK; 1706 if (pmap->pm_stats.resident_count == 0) 1707 break; 1708 1709 pdirindex = sva >> PDRSHIFT; 1710 ptpaddr = pmap->pm_pdir[pdirindex]; 1711 1712 /* 1713 * Weed out invalid mappings. Note: we assume that the page 1714 * directory table is always allocated, and in kernel virtual. 1715 */ 1716 if (ptpaddr == 0) 1717 continue; 1718 1719 /* 1720 * Check for large page. 1721 */ 1722 if ((ptpaddr & PG_PS) != 0) { 1723 pmap->pm_pdir[pdirindex] = 0; 1724 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1725 anyvalid = 1; 1726 continue; 1727 } 1728 1729 /* 1730 * Limit our scan to either the end of the va represented 1731 * by the current page table page, or to the end of the 1732 * range being removed. 1733 */ 1734 if (pdnxt > eva) 1735 pdnxt = eva; 1736 1737 for (; sva != pdnxt; sva += PAGE_SIZE) { 1738 if ((pte = pmap_pte_quick(pmap, sva)) == NULL || 1739 *pte == 0) 1740 continue; 1741 anyvalid = 1; 1742 if (pmap_remove_pte(pmap, pte, sva)) 1743 break; 1744 } 1745 } 1746 1747 if (anyvalid) 1748 pmap_invalidate_all(pmap); 1749} 1750 1751/* 1752 * Routine: pmap_remove_all 1753 * Function: 1754 * Removes this physical page from 1755 * all physical maps in which it resides. 1756 * Reflects back modify bits to the pager. 1757 * 1758 * Notes: 1759 * Original versions of this routine were very 1760 * inefficient because they iteratively called 1761 * pmap_remove (slow...) 1762 */ 1763 1764void 1765pmap_remove_all(vm_page_t m) 1766{ 1767 register pv_entry_t pv; 1768 pt_entry_t *pte, tpte; 1769 int s; 1770 1771#if defined(PMAP_DIAGNOSTIC) 1772 /* 1773 * XXX This makes pmap_remove_all() illegal for non-managed pages! 1774 */ 1775 if (!pmap_initialized || (m->flags & PG_FICTITIOUS)) { 1776 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%x", 1777 VM_PAGE_TO_PHYS(m)); 1778 } 1779#endif 1780 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1781 s = splvm(); 1782 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 1783 pv->pv_pmap->pm_stats.resident_count--; 1784 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va); 1785 tpte = pte_load_clear(pte); 1786 if (tpte & PG_W) 1787 pv->pv_pmap->pm_stats.wired_count--; 1788 if (tpte & PG_A) 1789 vm_page_flag_set(m, PG_REFERENCED); 1790 1791 /* 1792 * Update the vm_page_t clean and reference bits. 1793 */ 1794 if (tpte & PG_M) { 1795#if defined(PMAP_DIAGNOSTIC) 1796 if (pmap_nw_modified((pt_entry_t) tpte)) { 1797 printf( 1798 "pmap_remove_all: modified page not writable: va: 0x%x, pte: 0x%x\n", 1799 pv->pv_va, tpte); 1800 } 1801#endif 1802 if (pmap_track_modified(pv->pv_va)) 1803 vm_page_dirty(m); 1804 } 1805 pmap_invalidate_page(pv->pv_pmap, pv->pv_va); 1806 TAILQ_REMOVE(&pv->pv_pmap->pm_pvlist, pv, pv_plist); 1807 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 1808 m->md.pv_list_count--; 1809 pmap_unuse_pt(pv->pv_pmap, pv->pv_va, pv->pv_ptem); 1810 free_pv_entry(pv); 1811 } 1812 vm_page_flag_clear(m, PG_WRITEABLE); 1813 splx(s); 1814} 1815 1816/* 1817 * Set the physical protection on the 1818 * specified range of this map as requested. 1819 */ 1820void 1821pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 1822{ 1823 vm_offset_t pdnxt; 1824 pd_entry_t ptpaddr; 1825 int anychanged; 1826 1827 if (pmap == NULL) 1828 return; 1829 1830 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 1831 pmap_remove(pmap, sva, eva); 1832 return; 1833 } 1834 1835 if (prot & VM_PROT_WRITE) 1836 return; 1837 1838 anychanged = 0; 1839 1840 for (; sva < eva; sva = pdnxt) { 1841 unsigned pdirindex; 1842 1843 pdnxt = (sva + NBPDR) & ~PDRMASK; 1844 1845 pdirindex = sva >> PDRSHIFT; 1846 ptpaddr = pmap->pm_pdir[pdirindex]; 1847 1848 /* 1849 * Weed out invalid mappings. Note: we assume that the page 1850 * directory table is always allocated, and in kernel virtual. 1851 */ 1852 if (ptpaddr == 0) 1853 continue; 1854 1855 /* 1856 * Check for large page. 1857 */ 1858 if ((ptpaddr & PG_PS) != 0) { 1859 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW); 1860 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1861 anychanged = 1; 1862 continue; 1863 } 1864 1865 if (pdnxt > eva) 1866 pdnxt = eva; 1867 1868 for (; sva != pdnxt; sva += PAGE_SIZE) { 1869 pt_entry_t pbits; 1870 pt_entry_t *pte; 1871 vm_page_t m; 1872 1873 if ((pte = pmap_pte_quick(pmap, sva)) == NULL) 1874 continue; 1875 pbits = *pte; 1876 if (pbits & PG_MANAGED) { 1877 m = NULL; 1878 if (pbits & PG_A) { 1879 m = PHYS_TO_VM_PAGE(pbits); 1880 vm_page_flag_set(m, PG_REFERENCED); 1881 pbits &= ~PG_A; 1882 } 1883 if ((pbits & PG_M) != 0 && 1884 pmap_track_modified(sva)) { 1885 if (m == NULL) 1886 m = PHYS_TO_VM_PAGE(pbits); 1887 vm_page_dirty(m); 1888 pbits &= ~PG_M; 1889 } 1890 } 1891 1892 pbits &= ~PG_RW; 1893 1894 if (pbits != *pte) { 1895 pte_store(pte, pbits); 1896 anychanged = 1; 1897 } 1898 } 1899 } 1900 if (anychanged) 1901 pmap_invalidate_all(pmap); 1902} 1903 1904/* 1905 * Insert the given physical page (p) at 1906 * the specified virtual address (v) in the 1907 * target physical map with the protection requested. 1908 * 1909 * If specified, the page will be wired down, meaning 1910 * that the related pte can not be reclaimed. 1911 * 1912 * NB: This is the only routine which MAY NOT lazy-evaluate 1913 * or lose information. That is, this routine must actually 1914 * insert this page into the given map NOW. 1915 */ 1916void 1917pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 1918 boolean_t wired) 1919{ 1920 vm_paddr_t pa; 1921 register pt_entry_t *pte; 1922 vm_paddr_t opa; 1923 pt_entry_t origpte, newpte; 1924 vm_page_t mpte; 1925 1926 if (pmap == NULL) 1927 return; 1928 1929 va &= PG_FRAME; 1930#ifdef PMAP_DIAGNOSTIC 1931 if (va > VM_MAX_KERNEL_ADDRESS) 1932 panic("pmap_enter: toobig"); 1933 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS)) 1934 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va); 1935#endif 1936 1937 mpte = NULL; 1938 /* 1939 * In the case that a page table page is not 1940 * resident, we are creating it here. 1941 */ 1942 if (va < VM_MAXUSER_ADDRESS) { 1943 mpte = pmap_allocpte(pmap, va); 1944 } 1945#if 0 && defined(PMAP_DIAGNOSTIC) 1946 else { 1947 pd_entry_t *pdeaddr = pmap_pde(pmap, va); 1948 origpte = *pdeaddr; 1949 if ((origpte & PG_V) == 0) { 1950 panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n", 1951 pmap->pm_pdir[PTDPTDI], origpte, va); 1952 } 1953 } 1954#endif 1955 1956 pte = pmap_pte_quick(pmap, va); 1957 1958 /* 1959 * Page Directory table entry not valid, we need a new PT page 1960 */ 1961 if (pte == NULL) { 1962 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n", 1963 (uintmax_t)pmap->pm_pdir[PTDPTDI], va); 1964 } 1965 1966 pa = VM_PAGE_TO_PHYS(m) & PG_FRAME; 1967 origpte = *pte; 1968 opa = origpte & PG_FRAME; 1969 1970 if (origpte & PG_PS) 1971 panic("pmap_enter: attempted pmap_enter on 4MB page"); 1972 1973 /* 1974 * Mapping has not changed, must be protection or wiring change. 1975 */ 1976 if (origpte && (opa == pa)) { 1977 /* 1978 * Wiring change, just update stats. We don't worry about 1979 * wiring PT pages as they remain resident as long as there 1980 * are valid mappings in them. Hence, if a user page is wired, 1981 * the PT page will be also. 1982 */ 1983 if (wired && ((origpte & PG_W) == 0)) 1984 pmap->pm_stats.wired_count++; 1985 else if (!wired && (origpte & PG_W)) 1986 pmap->pm_stats.wired_count--; 1987 1988#if defined(PMAP_DIAGNOSTIC) 1989 if (pmap_nw_modified((pt_entry_t) origpte)) { 1990 printf( 1991 "pmap_enter: modified page not writable: va: 0x%x, pte: 0x%x\n", 1992 va, origpte); 1993 } 1994#endif 1995 1996 /* 1997 * Remove extra pte reference 1998 */ 1999 if (mpte) 2000 mpte->hold_count--; 2001 2002 if ((prot & VM_PROT_WRITE) && (origpte & PG_V)) { 2003 if ((origpte & PG_RW) == 0) { 2004 pte_store(pte, origpte | PG_RW); 2005 pmap_invalidate_page(pmap, va); 2006 } 2007 return; 2008 } 2009 2010 /* 2011 * We might be turning off write access to the page, 2012 * so we go ahead and sense modify status. 2013 */ 2014 if (origpte & PG_MANAGED) { 2015 if ((origpte & PG_M) && pmap_track_modified(va)) { 2016 vm_page_t om; 2017 om = PHYS_TO_VM_PAGE(opa); 2018 vm_page_dirty(om); 2019 } 2020 pa |= PG_MANAGED; 2021 } 2022 goto validate; 2023 } 2024 /* 2025 * Mapping has changed, invalidate old range and fall through to 2026 * handle validating new mapping. 2027 */ 2028 if (opa) { 2029 int err; 2030 vm_page_lock_queues(); 2031 err = pmap_remove_pte(pmap, pte, va); 2032 vm_page_unlock_queues(); 2033 if (err) 2034 panic("pmap_enter: pte vanished, va: 0x%x", va); 2035 } 2036 2037 /* 2038 * Enter on the PV list if part of our managed memory. Note that we 2039 * raise IPL while manipulating pv_table since pmap_enter can be 2040 * called at interrupt time. 2041 */ 2042 if (pmap_initialized && 2043 (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0) { 2044 pmap_insert_entry(pmap, va, mpte, m); 2045 pa |= PG_MANAGED; 2046 } 2047 2048 /* 2049 * Increment counters 2050 */ 2051 pmap->pm_stats.resident_count++; 2052 if (wired) 2053 pmap->pm_stats.wired_count++; 2054 2055validate: 2056 /* 2057 * Now validate mapping with desired protection/wiring. 2058 */ 2059 newpte = (pt_entry_t)(pa | pte_prot(pmap, prot) | PG_V); 2060 2061 if (wired) 2062 newpte |= PG_W; 2063 if (va < VM_MAXUSER_ADDRESS) 2064 newpte |= PG_U; 2065 if (pmap == kernel_pmap) 2066 newpte |= pgeflag; 2067 2068 /* 2069 * if the mapping or permission bits are different, we need 2070 * to update the pte. 2071 */ 2072 if ((origpte & ~(PG_M|PG_A)) != newpte) { 2073 pte_store(pte, newpte | PG_A); 2074 /*if (origpte)*/ { 2075 pmap_invalidate_page(pmap, va); 2076 } 2077 } 2078} 2079 2080/* 2081 * this code makes some *MAJOR* assumptions: 2082 * 1. Current pmap & pmap exists. 2083 * 2. Not wired. 2084 * 3. Read access. 2085 * 4. No page table pages. 2086 * 5. Tlbflush is deferred to calling procedure. 2087 * 6. Page IS managed. 2088 * but is *MUCH* faster than pmap_enter... 2089 */ 2090 2091vm_page_t 2092pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_page_t mpte) 2093{ 2094 pt_entry_t *pte; 2095 vm_paddr_t pa; 2096 2097 /* 2098 * In the case that a page table page is not 2099 * resident, we are creating it here. 2100 */ 2101 if (va < VM_MAXUSER_ADDRESS) { 2102 unsigned ptepindex; 2103 pd_entry_t ptepa; 2104 2105 /* 2106 * Calculate pagetable page index 2107 */ 2108 ptepindex = va >> PDRSHIFT; 2109 if (mpte && (mpte->pindex == ptepindex)) { 2110 mpte->hold_count++; 2111 } else { 2112retry: 2113 /* 2114 * Get the page directory entry 2115 */ 2116 ptepa = pmap->pm_pdir[ptepindex]; 2117 2118 /* 2119 * If the page table page is mapped, we just increment 2120 * the hold count, and activate it. 2121 */ 2122 if (ptepa) { 2123 if (ptepa & PG_PS) 2124 panic("pmap_enter_quick: unexpected mapping into 4MB page"); 2125 if (pmap->pm_pteobj->root && 2126 (pmap->pm_pteobj->root->pindex == ptepindex)) { 2127 mpte = pmap->pm_pteobj->root; 2128 } else { 2129 mpte = pmap_page_lookup(pmap->pm_pteobj, ptepindex); 2130 } 2131 if (mpte == NULL) 2132 goto retry; 2133 mpte->hold_count++; 2134 } else { 2135 mpte = _pmap_allocpte(pmap, ptepindex); 2136 } 2137 } 2138 } else { 2139 mpte = NULL; 2140 } 2141 2142 /* 2143 * This call to vtopte makes the assumption that we are 2144 * entering the page into the current pmap. In order to support 2145 * quick entry into any pmap, one would likely use pmap_pte_quick. 2146 * But that isn't as quick as vtopte. 2147 */ 2148 pte = vtopte(va); 2149 if (*pte) { 2150 if (mpte != NULL) { 2151 vm_page_lock_queues(); 2152 pmap_unwire_pte_hold(pmap, mpte); 2153 vm_page_unlock_queues(); 2154 } 2155 return 0; 2156 } 2157 2158 /* 2159 * Enter on the PV list if part of our managed memory. Note that we 2160 * raise IPL while manipulating pv_table since pmap_enter can be 2161 * called at interrupt time. 2162 */ 2163 if ((m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0) 2164 pmap_insert_entry(pmap, va, mpte, m); 2165 2166 /* 2167 * Increment counters 2168 */ 2169 pmap->pm_stats.resident_count++; 2170 2171 pa = VM_PAGE_TO_PHYS(m); 2172 2173 /* 2174 * Now validate mapping with RO protection 2175 */ 2176 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 2177 pte_store(pte, pa | PG_V | PG_U); 2178 else 2179 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 2180 2181 return mpte; 2182} 2183 2184/* 2185 * Make a temporary mapping for a physical address. This is only intended 2186 * to be used for panic dumps. 2187 */ 2188void * 2189pmap_kenter_temporary(vm_offset_t pa, int i) 2190{ 2191 vm_offset_t va; 2192 2193 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 2194 pmap_kenter(va, pa); 2195#ifndef I386_CPU 2196 invlpg(va); 2197#else 2198 invltlb(); 2199#endif 2200 return ((void *)crashdumpmap); 2201} 2202 2203/* 2204 * This code maps large physical mmap regions into the 2205 * processor address space. Note that some shortcuts 2206 * are taken, but the code works. 2207 */ 2208void 2209pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 2210 vm_object_t object, vm_pindex_t pindex, 2211 vm_size_t size) 2212{ 2213 vm_page_t p; 2214 2215 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 2216 KASSERT(object->type == OBJT_DEVICE, 2217 ("pmap_object_init_pt: non-device object")); 2218 if (pseflag && 2219 ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) { 2220 int i; 2221 vm_page_t m[1]; 2222 unsigned int ptepindex; 2223 int npdes; 2224 pd_entry_t ptepa; 2225 2226 if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)]) 2227 return; 2228retry: 2229 p = vm_page_lookup(object, pindex); 2230 if (p != NULL) { 2231 vm_page_lock_queues(); 2232 if (vm_page_sleep_if_busy(p, FALSE, "init4p")) 2233 goto retry; 2234 } else { 2235 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL); 2236 if (p == NULL) 2237 return; 2238 m[0] = p; 2239 2240 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) { 2241 vm_page_lock_queues(); 2242 vm_page_free(p); 2243 vm_page_unlock_queues(); 2244 return; 2245 } 2246 2247 p = vm_page_lookup(object, pindex); 2248 vm_page_lock_queues(); 2249 vm_page_wakeup(p); 2250 } 2251 vm_page_unlock_queues(); 2252 2253 ptepa = VM_PAGE_TO_PHYS(p); 2254 if (ptepa & (NBPDR - 1)) 2255 return; 2256 2257 p->valid = VM_PAGE_BITS_ALL; 2258 2259 pmap->pm_stats.resident_count += size >> PAGE_SHIFT; 2260 npdes = size >> PDRSHIFT; 2261 for(i = 0; i < npdes; i++) { 2262 pde_store(&pmap->pm_pdir[ptepindex], 2263 ptepa | PG_U | PG_RW | PG_V | PG_PS); 2264 ptepa += NBPDR; 2265 ptepindex += 1; 2266 } 2267 pmap_invalidate_all(kernel_pmap); 2268 } 2269} 2270 2271/* 2272 * pmap_prefault provides a quick way of clustering 2273 * pagefaults into a processes address space. It is a "cousin" 2274 * of pmap_object_init_pt, except it runs at page fault time instead 2275 * of mmap time. 2276 */ 2277#define PFBAK 4 2278#define PFFOR 4 2279#define PAGEORDER_SIZE (PFBAK+PFFOR) 2280 2281static int pmap_prefault_pageorder[] = { 2282 -1 * PAGE_SIZE, 1 * PAGE_SIZE, 2283 -2 * PAGE_SIZE, 2 * PAGE_SIZE, 2284 -3 * PAGE_SIZE, 3 * PAGE_SIZE, 2285 -4 * PAGE_SIZE, 4 * PAGE_SIZE 2286}; 2287 2288void 2289pmap_prefault(pmap, addra, entry) 2290 pmap_t pmap; 2291 vm_offset_t addra; 2292 vm_map_entry_t entry; 2293{ 2294 int i; 2295 vm_offset_t starta; 2296 vm_offset_t addr; 2297 vm_pindex_t pindex; 2298 vm_page_t m, mpte; 2299 vm_object_t object; 2300 2301 if (!curthread || (pmap != vmspace_pmap(curthread->td_proc->p_vmspace))) 2302 return; 2303 2304 object = entry->object.vm_object; 2305 2306 starta = addra - PFBAK * PAGE_SIZE; 2307 if (starta < entry->start) { 2308 starta = entry->start; 2309 } else if (starta > addra) { 2310 starta = 0; 2311 } 2312 2313 mpte = NULL; 2314 for (i = 0; i < PAGEORDER_SIZE; i++) { 2315 vm_object_t backing_object, lobject; 2316 pt_entry_t *pte; 2317 2318 addr = addra + pmap_prefault_pageorder[i]; 2319 if (addr > addra + (PFFOR * PAGE_SIZE)) 2320 addr = 0; 2321 2322 if (addr < starta || addr >= entry->end) 2323 continue; 2324 2325 if ((*pmap_pde(pmap, addr)) == 0) 2326 continue; 2327 2328 pte = vtopte(addr); 2329 if (*pte) 2330 continue; 2331 2332 pindex = ((addr - entry->start) + entry->offset) >> PAGE_SHIFT; 2333 lobject = object; 2334 VM_OBJECT_LOCK(lobject); 2335 while ((m = vm_page_lookup(lobject, pindex)) == NULL && 2336 lobject->type == OBJT_DEFAULT && 2337 (backing_object = lobject->backing_object) != NULL) { 2338 if (lobject->backing_object_offset & PAGE_MASK) 2339 break; 2340 pindex += lobject->backing_object_offset >> PAGE_SHIFT; 2341 VM_OBJECT_LOCK(backing_object); 2342 VM_OBJECT_UNLOCK(lobject); 2343 lobject = backing_object; 2344 } 2345 VM_OBJECT_UNLOCK(lobject); 2346 /* 2347 * give-up when a page is not in memory 2348 */ 2349 if (m == NULL) 2350 break; 2351 vm_page_lock_queues(); 2352 if (((m->valid & VM_PAGE_BITS_ALL) == VM_PAGE_BITS_ALL) && 2353 (m->busy == 0) && 2354 (m->flags & (PG_BUSY | PG_FICTITIOUS)) == 0) { 2355 2356 if ((m->queue - m->pc) == PQ_CACHE) { 2357 vm_page_deactivate(m); 2358 } 2359 vm_page_busy(m); 2360 vm_page_unlock_queues(); 2361 mpte = pmap_enter_quick(pmap, addr, m, mpte); 2362 vm_page_lock_queues(); 2363 vm_page_wakeup(m); 2364 } 2365 vm_page_unlock_queues(); 2366 } 2367} 2368 2369/* 2370 * Routine: pmap_change_wiring 2371 * Function: Change the wiring attribute for a map/virtual-address 2372 * pair. 2373 * In/out conditions: 2374 * The mapping must already exist in the pmap. 2375 */ 2376void 2377pmap_change_wiring(pmap, va, wired) 2378 register pmap_t pmap; 2379 vm_offset_t va; 2380 boolean_t wired; 2381{ 2382 register pt_entry_t *pte; 2383 2384 if (pmap == NULL) 2385 return; 2386 2387 pte = pmap_pte_quick(pmap, va); 2388 2389 if (wired && !pmap_pte_w(pte)) 2390 pmap->pm_stats.wired_count++; 2391 else if (!wired && pmap_pte_w(pte)) 2392 pmap->pm_stats.wired_count--; 2393 2394 /* 2395 * Wiring is not a hardware characteristic so there is no need to 2396 * invalidate TLB. 2397 */ 2398 pmap_pte_set_w(pte, wired); 2399} 2400 2401 2402 2403/* 2404 * Copy the range specified by src_addr/len 2405 * from the source map to the range dst_addr/len 2406 * in the destination map. 2407 * 2408 * This routine is only advisory and need not do anything. 2409 */ 2410 2411void 2412pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 2413 vm_offset_t src_addr) 2414{ 2415 vm_offset_t addr; 2416 vm_offset_t end_addr = src_addr + len; 2417 vm_offset_t pdnxt; 2418 vm_page_t m; 2419 2420 if (dst_addr != src_addr) 2421 return; 2422 2423 if (!pmap_is_current(src_pmap)) 2424 return; 2425 2426 for (addr = src_addr; addr < end_addr; addr = pdnxt) { 2427 pt_entry_t *src_pte, *dst_pte; 2428 vm_page_t dstmpte, srcmpte; 2429 pd_entry_t srcptepaddr; 2430 unsigned ptepindex; 2431 2432 if (addr >= UPT_MIN_ADDRESS) 2433 panic("pmap_copy: invalid to pmap_copy page tables\n"); 2434 2435 /* 2436 * Don't let optional prefaulting of pages make us go 2437 * way below the low water mark of free pages or way 2438 * above high water mark of used pv entries. 2439 */ 2440 if (cnt.v_free_count < cnt.v_free_reserved || 2441 pv_entry_count > pv_entry_high_water) 2442 break; 2443 2444 pdnxt = (addr + NBPDR) & ~PDRMASK; 2445 ptepindex = addr >> PDRSHIFT; 2446 2447 srcptepaddr = src_pmap->pm_pdir[ptepindex]; 2448 if (srcptepaddr == 0) 2449 continue; 2450 2451 if (srcptepaddr & PG_PS) { 2452 if (dst_pmap->pm_pdir[ptepindex] == 0) { 2453 dst_pmap->pm_pdir[ptepindex] = srcptepaddr; 2454 dst_pmap->pm_stats.resident_count += 2455 NBPDR / PAGE_SIZE; 2456 } 2457 continue; 2458 } 2459 2460 srcmpte = vm_page_lookup(src_pmap->pm_pteobj, ptepindex); 2461 if ((srcmpte == NULL) || 2462 (srcmpte->hold_count == 0) || (srcmpte->flags & PG_BUSY)) 2463 continue; 2464 2465 if (pdnxt > end_addr) 2466 pdnxt = end_addr; 2467 2468 src_pte = vtopte(addr); 2469 while (addr < pdnxt) { 2470 pt_entry_t ptetemp; 2471 ptetemp = *src_pte; 2472 /* 2473 * we only virtual copy managed pages 2474 */ 2475 if ((ptetemp & PG_MANAGED) != 0) { 2476 /* 2477 * We have to check after allocpte for the 2478 * pte still being around... allocpte can 2479 * block. 2480 */ 2481 dstmpte = pmap_allocpte(dst_pmap, addr); 2482 dst_pte = pmap_pte_quick(dst_pmap, addr); 2483 if ((*dst_pte == 0) && (ptetemp = *src_pte)) { 2484 /* 2485 * Clear the modified and 2486 * accessed (referenced) bits 2487 * during the copy. 2488 */ 2489 m = PHYS_TO_VM_PAGE(ptetemp); 2490 *dst_pte = ptetemp & ~(PG_M | PG_A); 2491 dst_pmap->pm_stats.resident_count++; 2492 pmap_insert_entry(dst_pmap, addr, 2493 dstmpte, m); 2494 } else { 2495 vm_page_lock_queues(); 2496 pmap_unwire_pte_hold(dst_pmap, dstmpte); 2497 vm_page_unlock_queues(); 2498 } 2499 if (dstmpte->hold_count >= srcmpte->hold_count) 2500 break; 2501 } 2502 addr += PAGE_SIZE; 2503 src_pte++; 2504 } 2505 } 2506} 2507 2508#ifdef SMP 2509 2510/* 2511 * pmap_zpi_switchin*() 2512 * 2513 * These functions allow us to avoid doing IPIs alltogether in certain 2514 * temporary page-mapping situations (page zeroing). Instead to deal 2515 * with being preempted and moved onto a different cpu we invalidate 2516 * the page when the scheduler switches us in. This does not occur 2517 * very often so we remain relatively optimal with very little effort. 2518 */ 2519static void 2520pmap_zpi_switchin12(void) 2521{ 2522 invlpg((u_int)CADDR1); 2523 invlpg((u_int)CADDR2); 2524} 2525 2526static void 2527pmap_zpi_switchin2(void) 2528{ 2529 invlpg((u_int)CADDR2); 2530} 2531 2532static void 2533pmap_zpi_switchin3(void) 2534{ 2535 invlpg((u_int)CADDR3); 2536} 2537 2538#endif 2539 2540/* 2541 * pmap_zero_page zeros the specified hardware page by mapping 2542 * the page into KVM and using bzero to clear its contents. 2543 */ 2544void 2545pmap_zero_page(vm_page_t m) 2546{ 2547 2548 mtx_lock(&CMAPCADDR12_lock); 2549 if (*CMAP2) 2550 panic("pmap_zero_page: CMAP2 busy"); 2551 *CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2552#ifdef I386_CPU 2553 invltlb(); 2554#else 2555#ifdef SMP 2556 curthread->td_switchin = pmap_zpi_switchin2; 2557#endif 2558 invlpg((u_int)CADDR2); 2559#endif 2560#if defined(I686_CPU) 2561 if (cpu_class == CPUCLASS_686) 2562 i686_pagezero(CADDR2); 2563 else 2564#endif 2565 bzero(CADDR2, PAGE_SIZE); 2566#ifdef SMP 2567 curthread->td_switchin = NULL; 2568#endif 2569 *CMAP2 = 0; 2570 mtx_unlock(&CMAPCADDR12_lock); 2571} 2572 2573/* 2574 * pmap_zero_page_area zeros the specified hardware page by mapping 2575 * the page into KVM and using bzero to clear its contents. 2576 * 2577 * off and size may not cover an area beyond a single hardware page. 2578 */ 2579void 2580pmap_zero_page_area(vm_page_t m, int off, int size) 2581{ 2582 2583 mtx_lock(&CMAPCADDR12_lock); 2584 if (*CMAP2) 2585 panic("pmap_zero_page: CMAP2 busy"); 2586 *CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2587#ifdef I386_CPU 2588 invltlb(); 2589#else 2590#ifdef SMP 2591 curthread->td_switchin = pmap_zpi_switchin2; 2592#endif 2593 invlpg((u_int)CADDR2); 2594#endif 2595#if defined(I686_CPU) 2596 if (cpu_class == CPUCLASS_686 && off == 0 && size == PAGE_SIZE) 2597 i686_pagezero(CADDR2); 2598 else 2599#endif 2600 bzero((char *)CADDR2 + off, size); 2601#ifdef SMP 2602 curthread->td_switchin = NULL; 2603#endif 2604 *CMAP2 = 0; 2605 mtx_unlock(&CMAPCADDR12_lock); 2606} 2607 2608/* 2609 * pmap_zero_page_idle zeros the specified hardware page by mapping 2610 * the page into KVM and using bzero to clear its contents. This 2611 * is intended to be called from the vm_pagezero process only and 2612 * outside of Giant. 2613 */ 2614void 2615pmap_zero_page_idle(vm_page_t m) 2616{ 2617 2618 if (*CMAP3) 2619 panic("pmap_zero_page: CMAP3 busy"); 2620 *CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M; 2621#ifdef I386_CPU 2622 invltlb(); 2623#else 2624#ifdef SMP 2625 curthread->td_switchin = pmap_zpi_switchin3; 2626#endif 2627 invlpg((u_int)CADDR3); 2628#endif 2629#if defined(I686_CPU) 2630 if (cpu_class == CPUCLASS_686) 2631 i686_pagezero(CADDR3); 2632 else 2633#endif 2634 bzero(CADDR3, PAGE_SIZE); 2635#ifdef SMP 2636 curthread->td_switchin = NULL; 2637#endif 2638 *CMAP3 = 0; 2639} 2640 2641/* 2642 * pmap_copy_page copies the specified (machine independent) 2643 * page by mapping the page into virtual memory and using 2644 * bcopy to copy the page, one machine dependent page at a 2645 * time. 2646 */ 2647void 2648pmap_copy_page(vm_page_t src, vm_page_t dst) 2649{ 2650 2651 mtx_lock(&CMAPCADDR12_lock); 2652 if (*CMAP1) 2653 panic("pmap_copy_page: CMAP1 busy"); 2654 if (*CMAP2) 2655 panic("pmap_copy_page: CMAP2 busy"); 2656 *CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A; 2657 *CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M; 2658#ifdef I386_CPU 2659 invltlb(); 2660#else 2661#ifdef SMP 2662 curthread->td_switchin = pmap_zpi_switchin12; 2663#endif 2664 invlpg((u_int)CADDR1); 2665 invlpg((u_int)CADDR2); 2666#endif 2667 bcopy(CADDR1, CADDR2, PAGE_SIZE); 2668#ifdef SMP 2669 curthread->td_switchin = NULL; 2670#endif 2671 *CMAP1 = 0; 2672 *CMAP2 = 0; 2673 mtx_unlock(&CMAPCADDR12_lock); 2674} 2675 2676/* 2677 * Returns true if the pmap's pv is one of the first 2678 * 16 pvs linked to from this page. This count may 2679 * be changed upwards or downwards in the future; it 2680 * is only necessary that true be returned for a small 2681 * subset of pmaps for proper page aging. 2682 */ 2683boolean_t 2684pmap_page_exists_quick(pmap, m) 2685 pmap_t pmap; 2686 vm_page_t m; 2687{ 2688 pv_entry_t pv; 2689 int loops = 0; 2690 int s; 2691 2692 if (!pmap_initialized || (m->flags & PG_FICTITIOUS)) 2693 return FALSE; 2694 2695 s = splvm(); 2696 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2697 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2698 if (pv->pv_pmap == pmap) { 2699 splx(s); 2700 return TRUE; 2701 } 2702 loops++; 2703 if (loops >= 16) 2704 break; 2705 } 2706 splx(s); 2707 return (FALSE); 2708} 2709 2710#define PMAP_REMOVE_PAGES_CURPROC_ONLY 2711/* 2712 * Remove all pages from specified address space 2713 * this aids process exit speeds. Also, this code 2714 * is special cased for current process only, but 2715 * can have the more generic (and slightly slower) 2716 * mode enabled. This is much faster than pmap_remove 2717 * in the case of running down an entire address space. 2718 */ 2719void 2720pmap_remove_pages(pmap, sva, eva) 2721 pmap_t pmap; 2722 vm_offset_t sva, eva; 2723{ 2724 pt_entry_t *pte, tpte; 2725 vm_page_t m; 2726 pv_entry_t pv, npv; 2727 int s; 2728 2729#ifdef PMAP_REMOVE_PAGES_CURPROC_ONLY 2730 if (!curthread || (pmap != vmspace_pmap(curthread->td_proc->p_vmspace))) { 2731 printf("warning: pmap_remove_pages called with non-current pmap\n"); 2732 return; 2733 } 2734#endif 2735 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2736 s = splvm(); 2737 for (pv = TAILQ_FIRST(&pmap->pm_pvlist); pv; pv = npv) { 2738 2739 if (pv->pv_va >= eva || pv->pv_va < sva) { 2740 npv = TAILQ_NEXT(pv, pv_plist); 2741 continue; 2742 } 2743 2744#ifdef PMAP_REMOVE_PAGES_CURPROC_ONLY 2745 pte = vtopte(pv->pv_va); 2746#else 2747 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va); 2748#endif 2749 tpte = *pte; 2750 2751 if (tpte == 0) { 2752 printf("TPTE at %p IS ZERO @ VA %08x\n", 2753 pte, pv->pv_va); 2754 panic("bad pte"); 2755 } 2756 2757/* 2758 * We cannot remove wired pages from a process' mapping at this time 2759 */ 2760 if (tpte & PG_W) { 2761 npv = TAILQ_NEXT(pv, pv_plist); 2762 continue; 2763 } 2764 2765 m = PHYS_TO_VM_PAGE(tpte); 2766 KASSERT(m->phys_addr == (tpte & PG_FRAME), 2767 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 2768 m, (uintmax_t)m->phys_addr, (uintmax_t)tpte)); 2769 2770 KASSERT(m < &vm_page_array[vm_page_array_size], 2771 ("pmap_remove_pages: bad tpte %#jx", (uintmax_t)tpte)); 2772 2773 pv->pv_pmap->pm_stats.resident_count--; 2774 2775 pte_clear(pte); 2776 2777 /* 2778 * Update the vm_page_t clean and reference bits. 2779 */ 2780 if (tpte & PG_M) { 2781 vm_page_dirty(m); 2782 } 2783 2784 npv = TAILQ_NEXT(pv, pv_plist); 2785 TAILQ_REMOVE(&pv->pv_pmap->pm_pvlist, pv, pv_plist); 2786 2787 m->md.pv_list_count--; 2788 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2789 if (TAILQ_FIRST(&m->md.pv_list) == NULL) { 2790 vm_page_flag_clear(m, PG_WRITEABLE); 2791 } 2792 2793 pmap_unuse_pt(pv->pv_pmap, pv->pv_va, pv->pv_ptem); 2794 free_pv_entry(pv); 2795 } 2796 splx(s); 2797 pmap_invalidate_all(pmap); 2798} 2799 2800/* 2801 * pmap_is_modified: 2802 * 2803 * Return whether or not the specified physical page was modified 2804 * in any physical maps. 2805 */ 2806boolean_t 2807pmap_is_modified(vm_page_t m) 2808{ 2809 pv_entry_t pv; 2810 pt_entry_t *pte; 2811 int s; 2812 2813 if (!pmap_initialized || (m->flags & PG_FICTITIOUS)) 2814 return FALSE; 2815 2816 s = splvm(); 2817 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2818 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2819 /* 2820 * if the bit being tested is the modified bit, then 2821 * mark clean_map and ptes as never 2822 * modified. 2823 */ 2824 if (!pmap_track_modified(pv->pv_va)) 2825 continue; 2826#if defined(PMAP_DIAGNOSTIC) 2827 if (!pv->pv_pmap) { 2828 printf("Null pmap (tb) at va: 0x%x\n", pv->pv_va); 2829 continue; 2830 } 2831#endif 2832 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va); 2833 if (*pte & PG_M) { 2834 splx(s); 2835 return TRUE; 2836 } 2837 } 2838 splx(s); 2839 return (FALSE); 2840} 2841 2842/* 2843 * this routine is used to modify bits in ptes 2844 */ 2845static __inline void 2846pmap_changebit(vm_page_t m, int bit, boolean_t setem) 2847{ 2848 register pv_entry_t pv; 2849 register pt_entry_t *pte; 2850 int s; 2851 2852 if (!pmap_initialized || (m->flags & PG_FICTITIOUS) || 2853 (!setem && bit == PG_RW && (m->flags & PG_WRITEABLE) == 0)) 2854 return; 2855 2856 s = splvm(); 2857 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2858 /* 2859 * Loop over all current mappings setting/clearing as appropos If 2860 * setting RO do we need to clear the VAC? 2861 */ 2862 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2863 /* 2864 * don't write protect pager mappings 2865 */ 2866 if (!setem && (bit == PG_RW)) { 2867 if (!pmap_track_modified(pv->pv_va)) 2868 continue; 2869 } 2870 2871#if defined(PMAP_DIAGNOSTIC) 2872 if (!pv->pv_pmap) { 2873 printf("Null pmap (cb) at va: 0x%x\n", pv->pv_va); 2874 continue; 2875 } 2876#endif 2877 2878 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va); 2879 2880 if (setem) { 2881 *pte |= bit; 2882 pmap_invalidate_page(pv->pv_pmap, pv->pv_va); 2883 } else { 2884 pt_entry_t pbits = *pte; 2885 if (pbits & bit) { 2886 if (bit == PG_RW) { 2887 if (pbits & PG_M) { 2888 vm_page_dirty(m); 2889 } 2890 pte_store(pte, pbits & ~(PG_M|PG_RW)); 2891 } else { 2892 pte_store(pte, pbits & ~bit); 2893 } 2894 pmap_invalidate_page(pv->pv_pmap, pv->pv_va); 2895 } 2896 } 2897 } 2898 if (!setem && bit == PG_RW) 2899 vm_page_flag_clear(m, PG_WRITEABLE); 2900 splx(s); 2901} 2902 2903/* 2904 * pmap_page_protect: 2905 * 2906 * Lower the permission for all mappings to a given page. 2907 */ 2908void 2909pmap_page_protect(vm_page_t m, vm_prot_t prot) 2910{ 2911 if ((prot & VM_PROT_WRITE) == 0) { 2912 if (prot & (VM_PROT_READ | VM_PROT_EXECUTE)) { 2913 pmap_changebit(m, PG_RW, FALSE); 2914 } else { 2915 pmap_remove_all(m); 2916 } 2917 } 2918} 2919 2920/* 2921 * pmap_ts_referenced: 2922 * 2923 * Return a count of reference bits for a page, clearing those bits. 2924 * It is not necessary for every reference bit to be cleared, but it 2925 * is necessary that 0 only be returned when there are truly no 2926 * reference bits set. 2927 * 2928 * XXX: The exact number of bits to check and clear is a matter that 2929 * should be tested and standardized at some point in the future for 2930 * optimal aging of shared pages. 2931 */ 2932int 2933pmap_ts_referenced(vm_page_t m) 2934{ 2935 register pv_entry_t pv, pvf, pvn; 2936 pt_entry_t *pte; 2937 pt_entry_t v; 2938 int s; 2939 int rtval = 0; 2940 2941 if (!pmap_initialized || (m->flags & PG_FICTITIOUS)) 2942 return (rtval); 2943 2944 s = splvm(); 2945 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2946 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2947 2948 pvf = pv; 2949 2950 do { 2951 pvn = TAILQ_NEXT(pv, pv_list); 2952 2953 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2954 2955 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2956 2957 if (!pmap_track_modified(pv->pv_va)) 2958 continue; 2959 2960 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va); 2961 2962 if (pte && ((v = pte_load(pte)) & PG_A) != 0) { 2963 pte_store(pte, v & ~PG_A); 2964 pmap_invalidate_page(pv->pv_pmap, pv->pv_va); 2965 2966 rtval++; 2967 if (rtval > 4) { 2968 break; 2969 } 2970 } 2971 } while ((pv = pvn) != NULL && pv != pvf); 2972 } 2973 splx(s); 2974 2975 return (rtval); 2976} 2977 2978/* 2979 * Clear the modify bits on the specified physical page. 2980 */ 2981void 2982pmap_clear_modify(vm_page_t m) 2983{ 2984 pmap_changebit(m, PG_M, FALSE); 2985} 2986 2987/* 2988 * pmap_clear_reference: 2989 * 2990 * Clear the reference bit on the specified physical page. 2991 */ 2992void 2993pmap_clear_reference(vm_page_t m) 2994{ 2995 pmap_changebit(m, PG_A, FALSE); 2996} 2997 2998/* 2999 * Miscellaneous support routines follow 3000 */ 3001 3002static void 3003i386_protection_init() 3004{ 3005 register int *kp, prot; 3006 3007 kp = protection_codes; 3008 for (prot = 0; prot < 8; prot++) { 3009 switch (prot) { 3010 case VM_PROT_NONE | VM_PROT_NONE | VM_PROT_NONE: 3011 /* 3012 * Read access is also 0. There isn't any execute bit, 3013 * so just make it readable. 3014 */ 3015 case VM_PROT_READ | VM_PROT_NONE | VM_PROT_NONE: 3016 case VM_PROT_READ | VM_PROT_NONE | VM_PROT_EXECUTE: 3017 case VM_PROT_NONE | VM_PROT_NONE | VM_PROT_EXECUTE: 3018 *kp++ = 0; 3019 break; 3020 case VM_PROT_NONE | VM_PROT_WRITE | VM_PROT_NONE: 3021 case VM_PROT_NONE | VM_PROT_WRITE | VM_PROT_EXECUTE: 3022 case VM_PROT_READ | VM_PROT_WRITE | VM_PROT_NONE: 3023 case VM_PROT_READ | VM_PROT_WRITE | VM_PROT_EXECUTE: 3024 *kp++ = PG_RW; 3025 break; 3026 } 3027 } 3028} 3029 3030/* 3031 * Map a set of physical memory pages into the kernel virtual 3032 * address space. Return a pointer to where it is mapped. This 3033 * routine is intended to be used for mapping device memory, 3034 * NOT real memory. 3035 */ 3036void * 3037pmap_mapdev(pa, size) 3038 vm_paddr_t pa; 3039 vm_size_t size; 3040{ 3041 vm_offset_t va, tmpva, offset; 3042 3043 offset = pa & PAGE_MASK; 3044 size = roundup(offset + size, PAGE_SIZE); 3045 3046 GIANT_REQUIRED; 3047 3048 va = kmem_alloc_pageable(kernel_map, size); 3049 if (!va) 3050 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 3051 3052 pa = pa & PG_FRAME; 3053 for (tmpva = va; size > 0; ) { 3054 pmap_kenter(tmpva, pa); 3055 size -= PAGE_SIZE; 3056 tmpva += PAGE_SIZE; 3057 pa += PAGE_SIZE; 3058 } 3059 pmap_invalidate_range(kernel_pmap, va, tmpva); 3060 return ((void *)(va + offset)); 3061} 3062 3063void 3064pmap_unmapdev(va, size) 3065 vm_offset_t va; 3066 vm_size_t size; 3067{ 3068 vm_offset_t base, offset, tmpva; 3069 pt_entry_t *pte; 3070 3071 base = va & PG_FRAME; 3072 offset = va & PAGE_MASK; 3073 size = roundup(offset + size, PAGE_SIZE); 3074 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) { 3075 pte = vtopte(tmpva); 3076 pte_clear(pte); 3077 } 3078 pmap_invalidate_range(kernel_pmap, va, tmpva); 3079 kmem_free(kernel_map, base, size); 3080} 3081 3082/* 3083 * perform the pmap work for mincore 3084 */ 3085int 3086pmap_mincore(pmap, addr) 3087 pmap_t pmap; 3088 vm_offset_t addr; 3089{ 3090 pt_entry_t *ptep, pte; 3091 vm_page_t m; 3092 int val = 0; 3093 3094 ptep = pmap_pte_quick(pmap, addr); 3095 if (ptep == 0) { 3096 return 0; 3097 } 3098 3099 if ((pte = *ptep) != 0) { 3100 vm_paddr_t pa; 3101 3102 val = MINCORE_INCORE; 3103 if ((pte & PG_MANAGED) == 0) 3104 return val; 3105 3106 pa = pte & PG_FRAME; 3107 3108 m = PHYS_TO_VM_PAGE(pa); 3109 3110 /* 3111 * Modified by us 3112 */ 3113 if (pte & PG_M) 3114 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 3115 else { 3116 /* 3117 * Modified by someone else 3118 */ 3119 vm_page_lock_queues(); 3120 if (m->dirty || pmap_is_modified(m)) 3121 val |= MINCORE_MODIFIED_OTHER; 3122 vm_page_unlock_queues(); 3123 } 3124 /* 3125 * Referenced by us 3126 */ 3127 if (pte & PG_A) 3128 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 3129 else { 3130 /* 3131 * Referenced by someone else 3132 */ 3133 vm_page_lock_queues(); 3134 if ((m->flags & PG_REFERENCED) || 3135 pmap_ts_referenced(m)) { 3136 val |= MINCORE_REFERENCED_OTHER; 3137 vm_page_flag_set(m, PG_REFERENCED); 3138 } 3139 vm_page_unlock_queues(); 3140 } 3141 } 3142 return val; 3143} 3144 3145void 3146pmap_activate(struct thread *td) 3147{ 3148 struct proc *p = td->td_proc; 3149 pmap_t pmap, oldpmap; 3150 u_int32_t cr3; 3151 3152 critical_enter(); 3153 pmap = vmspace_pmap(td->td_proc->p_vmspace); 3154 oldpmap = PCPU_GET(curpmap); 3155#if defined(SMP) 3156 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 3157 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 3158#else 3159 oldpmap->pm_active &= ~1; 3160 pmap->pm_active |= 1; 3161#endif 3162#ifdef PAE 3163 cr3 = vtophys(pmap->pm_pdpt); 3164#else 3165 cr3 = vtophys(pmap->pm_pdir); 3166#endif 3167 /* XXXKSE this is wrong. 3168 * pmap_activate is for the current thread on the current cpu 3169 */ 3170 if (p->p_flag & P_SA) { 3171 /* Make sure all other cr3 entries are updated. */ 3172 /* what if they are running? XXXKSE (maybe abort them) */ 3173 FOREACH_THREAD_IN_PROC(p, td) { 3174 td->td_pcb->pcb_cr3 = cr3; 3175 } 3176 } else { 3177 td->td_pcb->pcb_cr3 = cr3; 3178 } 3179 load_cr3(cr3); 3180 PCPU_SET(curpmap, pmap); 3181 critical_exit(); 3182} 3183 3184vm_offset_t 3185pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size) 3186{ 3187 3188 if ((obj == NULL) || (size < NBPDR) || (obj->type != OBJT_DEVICE)) { 3189 return addr; 3190 } 3191 3192 addr = (addr + (NBPDR - 1)) & ~(NBPDR - 1); 3193 return addr; 3194} 3195 3196 3197#if defined(PMAP_DEBUG) 3198pmap_pid_dump(int pid) 3199{ 3200 pmap_t pmap; 3201 struct proc *p; 3202 int npte = 0; 3203 int index; 3204 3205 sx_slock(&allproc_lock); 3206 LIST_FOREACH(p, &allproc, p_list) { 3207 if (p->p_pid != pid) 3208 continue; 3209 3210 if (p->p_vmspace) { 3211 int i,j; 3212 index = 0; 3213 pmap = vmspace_pmap(p->p_vmspace); 3214 for (i = 0; i < NPDEPTD; i++) { 3215 pd_entry_t *pde; 3216 pt_entry_t *pte; 3217 vm_offset_t base = i << PDRSHIFT; 3218 3219 pde = &pmap->pm_pdir[i]; 3220 if (pde && pmap_pde_v(pde)) { 3221 for (j = 0; j < NPTEPG; j++) { 3222 vm_offset_t va = base + (j << PAGE_SHIFT); 3223 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 3224 if (index) { 3225 index = 0; 3226 printf("\n"); 3227 } 3228 sx_sunlock(&allproc_lock); 3229 return npte; 3230 } 3231 pte = pmap_pte_quick(pmap, va); 3232 if (pte && pmap_pte_v(pte)) { 3233 pt_entry_t pa; 3234 vm_page_t m; 3235 pa = *pte; 3236 m = PHYS_TO_VM_PAGE(pa); 3237 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 3238 va, pa, m->hold_count, m->wire_count, m->flags); 3239 npte++; 3240 index++; 3241 if (index >= 2) { 3242 index = 0; 3243 printf("\n"); 3244 } else { 3245 printf(" "); 3246 } 3247 } 3248 } 3249 } 3250 } 3251 } 3252 } 3253 sx_sunlock(&allproc_lock); 3254 return npte; 3255} 3256#endif 3257 3258#if defined(DEBUG) 3259 3260static void pads(pmap_t pm); 3261void pmap_pvdump(vm_offset_t pa); 3262 3263/* print address space of pmap*/ 3264static void 3265pads(pm) 3266 pmap_t pm; 3267{ 3268 int i, j; 3269 vm_paddr_t va; 3270 pt_entry_t *ptep; 3271 3272 if (pm == kernel_pmap) 3273 return; 3274 for (i = 0; i < NPDEPTD; i++) 3275 if (pm->pm_pdir[i]) 3276 for (j = 0; j < NPTEPG; j++) { 3277 va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 3278 if (pm == kernel_pmap && va < KERNBASE) 3279 continue; 3280 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 3281 continue; 3282 ptep = pmap_pte_quick(pm, va); 3283 if (pmap_pte_v(ptep)) 3284 printf("%x:%x ", va, *ptep); 3285 }; 3286 3287} 3288 3289void 3290pmap_pvdump(pa) 3291 vm_paddr_t pa; 3292{ 3293 pv_entry_t pv; 3294 vm_page_t m; 3295 3296 printf("pa %x", pa); 3297 m = PHYS_TO_VM_PAGE(pa); 3298 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3299 printf(" -> pmap %p, va %x", (void *)pv->pv_pmap, pv->pv_va); 3300 pads(pv->pv_pmap); 3301 } 3302 printf(" "); 3303} 3304#endif 3305