elan-mmcr.c revision 127039 
1/*-
2 * ----------------------------------------------------------------------------
3 * "THE BEER-WARE LICENSE" (Revision 42):
4 * <phk@FreeBSD.org> wrote this file.  As long as you retain this notice you
5 * can do whatever you want with this stuff. If we meet some day, and you think
6 * this stuff is worth it, you can buy me a beer in return.   Poul-Henning Kamp
7 * ----------------------------------------------------------------------------
8 *
9 *
10 * The AMD Elan sc520 is a system-on-chip gadget which is used in embedded
11 * kind of things, see www.soekris.com for instance, and it has a few quirks
12 * we need to deal with.
13 * Unfortunately we cannot identify the gadget by CPUID output because it
14 * depends on strapping options and only the stepping field may be useful
15 * and those are undocumented from AMDs side.
16 *
17 * So instead we recognize the on-chip host-PCI bridge and call back from
18 * sys/i386/pci/pci_bus.c to here if we find it.
19 *
20 * #ifdef CPU_ELAN_PPS
21 *   The Elan has three general purpose counters, and when two of these
22 *   are used just right they can hardware timestamp external events with
23 *   approx 125 nsec resolution and +/- 125 nsec precision.
24 *
25 *   Connect the signal to TMR1IN and a GPIO pin, and configure the GPIO pin
26 *   with a 'P' in sysctl machdep.elan_gpio_config.
27 *
28 *   The rising edge of the signal will start timer 1 counting up from
29 *   zero, and when the timecounter polls for PPS, both counter 1 & 2 is
30 *   read, as well as the GPIO bit.  If a rising edge has happened, the
31 *   contents of timer 1 which is how long time ago the edge happened,
32 *   is subtracted from timer 2 to give us a "true time stamp".
33 *
34 *   Echoing the PPS signal on any GPIO pin is supported (set it to 'e'
35 *   or 'E' (inverted) in the sysctl)  The echo signal should only be
36 *   used as a visual indication, not for calibration since it suffers
37 *   from 1/hz (or more) jitter which the timestamps are compensated for.
38 * #endif CPU_ELAN_PPS
39 */
40
41#include <sys/cdefs.h>
42__FBSDID("$FreeBSD: head/sys/i386/i386/elan-mmcr.c 127039 2004-03-15 21:47:34Z phk $");
43
44#include "opt_cpu.h"
45#include <sys/param.h>
46#include <sys/systm.h>
47#include <sys/kernel.h>
48#include <sys/conf.h>
49#include <sys/sysctl.h>
50#include <sys/syslog.h>
51#include <sys/timetc.h>
52#include <sys/proc.h>
53#include <sys/uio.h>
54#include <sys/lock.h>
55#include <sys/mutex.h>
56#include <sys/malloc.h>
57#include <sys/sysctl.h>
58#include <sys/timepps.h>
59#include <sys/watchdog.h>
60
61#include <dev/led/led.h>
62#include <machine/md_var.h>
63#include <machine/elan_mmcr.h>
64
65#include <vm/vm.h>
66#include <vm/pmap.h>
67
68static char gpio_config[33];
69
70static volatile uint16_t *mmcrptr;
71volatile struct elan_mmcr *elan_mmcr;
72
73#ifdef CPU_ELAN_PPS
74static struct pps_state elan_pps;
75static volatile uint16_t *pps_ap[3];
76static u_int	pps_a, pps_d;
77static u_int	echo_a, echo_d;
78#endif /* CPU_ELAN_PPS */
79
80#ifdef CPU_SOEKRIS
81static u_int	led_cookie[32];
82static dev_t	led_dev[32];
83
84static void
85gpio_led(void *cookie, int state)
86{
87	u_int u, v;
88
89	u = *(int *)cookie;
90	v = u & 0xffff;
91	u >>= 16;
92	if (!state)
93		v ^= 0xc;
94	mmcrptr[v / 2] = u;
95}
96#endif
97
98static int
99sysctl_machdep_elan_gpio_config(SYSCTL_HANDLER_ARGS)
100{
101	u_int u, v;
102	int i, np, ne;
103	int error;
104	char buf[32];
105#ifdef CPU_SOEKRIS
106	char tmp[10];
107#endif
108
109	error = SYSCTL_OUT(req, gpio_config, 33);
110	if (error != 0 || req->newptr == NULL)
111		return (error);
112	if (req->newlen != 32)
113		return (EINVAL);
114	error = SYSCTL_IN(req, buf, 32);
115	if (error != 0)
116		return (error);
117	/* Disallow any disabled pins and count pps and echo */
118	np = ne = 0;
119	for (i = 0; i < 32; i++) {
120		if (gpio_config[i] == '-' && (buf[i] != '-' && buf[i] != '.'))
121			return (EPERM);
122		if (buf[i] == 'P') {
123			np++;
124			if (np > 1)
125				return (EINVAL);
126		}
127		if (buf[i] == 'e' || buf[i] == 'E') {
128			ne++;
129			if (ne > 1)
130				return (EINVAL);
131		}
132		if (buf[i] != 'L' && buf[i] != 'l'
133#ifdef CPU_ELAN_PPS
134		    && buf[i] != 'P' && buf[i] != 'E' && buf[i] != 'e'
135#endif /* CPU_ELAN_PPS */
136		    && buf[i] != '.' && buf[i] != '-')
137			return (EINVAL);
138	}
139#ifdef CPU_ELAN_PPS
140	if (np == 0)
141		pps_a = pps_d = 0;
142	if (ne == 0)
143		echo_a = echo_d = 0;
144#endif
145	for (i = 0; i < 32; i++) {
146		u = 1 << (i & 0xf);
147		if (i >= 16)
148			v = 2;
149		else
150			v = 0;
151#ifdef CPU_SOEKRIS
152		if (buf[i] != 'l' && buf[i] != 'L' && led_dev[i] != NULL) {
153			led_destroy(led_dev[i]);
154			led_dev[i] = NULL;
155			mmcrptr[(0xc2a + v) / 2] &= ~u;
156		}
157#endif
158		switch (buf[i]) {
159#ifdef CPU_ELAN_PPS
160		case 'P':
161			pps_d = u;
162			pps_a = 0xc30 + v;
163			pps_ap[0] = &mmcrptr[pps_a / 2];
164			pps_ap[1] = &elan_mmcr->GPTMR2CNT;
165			pps_ap[2] = &elan_mmcr->GPTMR1CNT;
166			mmcrptr[(0xc2a + v) / 2] &= ~u;
167			gpio_config[i] = buf[i];
168			break;
169		case 'e':
170		case 'E':
171			echo_d = u;
172			if (buf[i] == 'E')
173				echo_a = 0xc34 + v;
174			else
175				echo_a = 0xc38 + v;
176			mmcrptr[(0xc2a + v) / 2] |= u;
177			gpio_config[i] = buf[i];
178			break;
179#endif /* CPU_ELAN_PPS */
180#ifdef CPU_SOEKRIS
181		case 'l':
182		case 'L':
183			if (buf[i] == 'L')
184				led_cookie[i] = (0xc34 + v) | (u << 16);
185			else
186				led_cookie[i] = (0xc38 + v) | (u << 16);
187			if (led_dev[i])
188				break;
189			sprintf(tmp, "gpio%d", i);
190			led_dev[i] =
191			    led_create(gpio_led, &led_cookie[i], tmp);
192			mmcrptr[(0xc2a + v) / 2] |= u;
193			gpio_config[i] = buf[i];
194			break;
195#endif
196		case '.':
197			gpio_config[i] = buf[i];
198			break;
199		case '-':
200		default:
201			break;
202		}
203	}
204	return (0);
205}
206
207SYSCTL_OID(_machdep, OID_AUTO, elan_gpio_config, CTLTYPE_STRING | CTLFLAG_RW,
208    NULL, 0, sysctl_machdep_elan_gpio_config, "A", "Elan CPU GPIO pin config");
209
210#ifdef CPU_ELAN_PPS
211static void
212elan_poll_pps(struct timecounter *tc)
213{
214	static int state;
215	int i;
216	uint16_t u, x, y, z;
217	u_long eflags;
218
219	/*
220	 * Grab the HW state as quickly and compactly as we can.  Disable
221	 * interrupts to avoid measuring our interrupt service time on
222	 * hw with quality clock sources.
223	 */
224	eflags = read_eflags();
225	disable_intr();
226	x = *pps_ap[0];	/* state, must be first, see below */
227	y = *pps_ap[1]; /* timer2 */
228	z = *pps_ap[2]; /* timer1 */
229	write_eflags(eflags);
230
231	/*
232	 * Order is important here.  We need to check the state of the GPIO
233	 * pin first, in order to avoid reading timer 1 right before the
234	 * state change.  Technically pps_a may be zero in which case we
235	 * harmlessly read the REVID register and the contents of pps_d is
236	 * of no concern.
237	 */
238
239	i = x & pps_d;
240
241	/* If state did not change or we don't have a GPIO pin, return */
242	if (i == state || pps_a == 0)
243		return;
244
245	state = i;
246
247	/* If the state is "low", flip the echo GPIO and return.  */
248	if (!i) {
249		if (echo_a)
250			mmcrptr[(echo_a ^ 0xc) / 2] = echo_d;
251		return;
252	}
253
254	/*
255	 * Subtract timer1 from timer2 to compensate for time from the
256	 * edge until we read the counters.
257	 */
258	u = y - z;
259
260	pps_capture(&elan_pps);
261	elan_pps.capcount = u;
262	pps_event(&elan_pps, PPS_CAPTUREASSERT);
263
264	/* Twiddle echo bit */
265	if (echo_a)
266		mmcrptr[echo_a / 2] = echo_d;
267}
268#endif /* CPU_ELAN_PPS */
269
270static unsigned
271elan_get_timecount(struct timecounter *tc)
272{
273
274	/* Read timer2, end of story */
275	return (elan_mmcr->GPTMR2CNT);
276}
277
278/*
279 * The Elan CPU can be run from a number of clock frequencies, this
280 * allows you to override the default 33.3 MHZ.
281 */
282#ifndef CPU_ELAN_XTAL
283#define CPU_ELAN_XTAL 33333333
284#endif
285
286static struct timecounter elan_timecounter = {
287	elan_get_timecount,
288	NULL,
289	0xffff,
290	CPU_ELAN_XTAL / 4,
291	"ELAN",
292	1000
293};
294
295static int
296sysctl_machdep_elan_freq(SYSCTL_HANDLER_ARGS)
297{
298	u_int f;
299	int error;
300
301	f = elan_timecounter.tc_frequency * 4;
302	error = sysctl_handle_int(oidp, &f, sizeof(f), req);
303	if (error == 0 && req->newptr != NULL)
304		elan_timecounter.tc_frequency = (f + 3) / 4;
305	return (error);
306}
307
308SYSCTL_PROC(_machdep, OID_AUTO, elan_freq, CTLTYPE_UINT | CTLFLAG_RW,
309    0, sizeof (u_int), sysctl_machdep_elan_freq, "IU", "");
310
311/*
312 * Positively identifying the Elan can only be done through the PCI id of
313 * the host-bridge, this function is called from i386/pci/pci_bus.c.
314 */
315void
316init_AMD_Elan_sc520(void)
317{
318	u_int new;
319	int i;
320
321	mmcrptr = pmap_mapdev(0xfffef000, 0x1000);
322	elan_mmcr = (volatile struct elan_mmcr *)mmcrptr;
323
324	/*-
325	 * The i8254 is driven with a nonstandard frequency which is
326	 * derived thusly:
327	 *   f = 32768 * 45 * 25 / 31 = 1189161.29...
328	 * We use the sysctl to get the i8254 (timecounter etc) into whack.
329	 */
330
331	new = 1189161;
332	i = kernel_sysctlbyname(&thread0, "machdep.i8254_freq",
333	    NULL, 0, &new, sizeof new, NULL);
334	if (bootverbose || 1)
335		printf("sysctl machdep.i8254_freq=%d returns %d\n", new, i);
336
337	/* Start GP timer #2 and use it as timecounter, hz permitting */
338	elan_mmcr->GPTMR2MAXCMPA = 0;
339	elan_mmcr->GPTMR2CTL = 0xc001;
340
341#ifdef CPU_ELAN_PPS
342	/* Set up GP timer #1 as pps counter */
343	elan_mmcr->CSPFS &= ~0x10;
344	elan_mmcr->GPTMR1CTL = 0x8000 | 0x4000 | 0x10 | 0x1;
345	elan_mmcr->GPTMR1MAXCMPA = 0x0;
346	elan_mmcr->GPTMR1MAXCMPB = 0x0;
347	elan_pps.ppscap |= PPS_CAPTUREASSERT;
348	pps_init(&elan_pps);
349#endif
350	tc_init(&elan_timecounter);
351}
352
353static void
354elan_watchdog(void *foo __unused, u_int spec, int *error)
355{
356	u_int u, v;
357	static u_int cur;
358
359	u = spec & WD_INTERVAL;
360	if (spec && u <= 35) {
361		u = imax(u - 5, 24);
362		v = 2 << (u - 24);
363		v |= 0xc000;
364
365		/*
366		 * There is a bug in some silicon which prevents us from
367		 * writing to the WDTMRCTL register if the GP echo mode is
368		 * enabled.  GP echo mode on the other hand is desirable
369		 * for other reasons.  Save and restore the GP echo mode
370		 * around our hardware tom-foolery.
371		 */
372		u = elan_mmcr->GPECHO;
373		elan_mmcr->GPECHO = 0;
374		if (v != cur) {
375			/* Clear the ENB bit */
376			elan_mmcr->WDTMRCTL = 0x3333;
377			elan_mmcr->WDTMRCTL = 0xcccc;
378			elan_mmcr->WDTMRCTL = 0;
379
380			/* Set new value */
381			elan_mmcr->WDTMRCTL = 0x3333;
382			elan_mmcr->WDTMRCTL = 0xcccc;
383			elan_mmcr->WDTMRCTL = v;
384			cur = v;
385		} else {
386			/* Just reset timer */
387			elan_mmcr->WDTMRCTL = 0xaaaa;
388			elan_mmcr->WDTMRCTL = 0x5555;
389		}
390		elan_mmcr->GPECHO = u;
391		*error = 0;
392		return;
393	} else {
394		u = elan_mmcr->GPECHO;
395		elan_mmcr->GPECHO = 0;
396		elan_mmcr->WDTMRCTL = 0x3333;
397		elan_mmcr->WDTMRCTL = 0xcccc;
398		elan_mmcr->WDTMRCTL = 0x4080;
399		elan_mmcr->WDTMRCTL = u;
400		elan_mmcr->GPECHO = u;
401		cur = 0;
402		return;
403	}
404}
405
406static int
407elan_mmap(dev_t dev, vm_offset_t offset, vm_paddr_t *paddr, int nprot)
408{
409
410	if (offset >= 0x1000)
411		return (-1);
412	*paddr = 0xfffef000;
413	return (0);
414}
415static int
416elan_ioctl(dev_t dev, u_long cmd, caddr_t arg, int flag, struct  thread *tdr)
417{
418	int error;
419
420	error = ENOIOCTL;
421
422#ifdef CPU_ELAN_PPS
423	if (pps_a != 0)
424		error = pps_ioctl(cmd, arg, &elan_pps);
425	/*
426	 * We only want to incur the overhead of the PPS polling if we
427	 * are actually asked to timestamp.
428	 */
429	if (elan_pps.ppsparam.mode & PPS_CAPTUREASSERT) {
430		elan_timecounter.tc_poll_pps = elan_poll_pps;
431	} else {
432		elan_timecounter.tc_poll_pps = NULL;
433	}
434	if (error != ENOIOCTL)
435		return (error);
436#endif
437
438	return(error);
439}
440
441static struct cdevsw elan_cdevsw = {
442	.d_version =	D_VERSION,
443	.d_flags =	D_NEEDGIANT,
444	.d_ioctl =	elan_ioctl,
445	.d_mmap =	elan_mmap,
446	.d_name =	"elan",
447};
448
449static void
450elan_drvinit(void)
451{
452
453	/* If no elan found, just return */
454	if (mmcrptr == NULL)
455		return;
456
457	printf("Elan-mmcr driver: MMCR at %p.%s\n",
458	    mmcrptr,
459#ifdef CPU_ELAN_PPS
460	    " PPS support."
461#else
462	    ""
463#endif
464	    );
465
466	make_dev(&elan_cdevsw, 0,
467	    UID_ROOT, GID_WHEEL, 0600, "elan-mmcr");
468
469#ifdef CPU_SOEKRIS
470	/* Create the error LED on GPIO9 */
471	led_cookie[9] = 0x02000c34;
472	led_dev[9] = led_create(gpio_led, &led_cookie[9], "error");
473
474	/* Disable the unavailable GPIO pins */
475	strcpy(gpio_config, "-----....--..--------..---------");
476#else /* !CPU_SOEKRIS */
477	/* We don't know which pins are available so enable them all */
478	strcpy(gpio_config, "................................");
479#endif /* CPU_SOEKRIS */
480
481	EVENTHANDLER_REGISTER(watchdog_list, elan_watchdog, NULL, 0);
482}
483
484SYSINIT(elan, SI_SUB_PSEUDO, SI_ORDER_MIDDLE, elan_drvinit, NULL);
485
486