1139749Simp/*- 2121491Simp * Copyright (c) 1993 Herb Peyerl (hpeyerl@novatel.ca) All rights reserved. 3121491Simp * 4121491Simp * Redistribution and use in source and binary forms, with or without 5121491Simp * modification, are permitted provided that the following conditions are 6121491Simp * met: 1. Redistributions of source code must retain the above copyright 7121491Simp * notice, this list of conditions and the following disclaimer. 2. The name 8121491Simp * of the author may not be used to endorse or promote products derived from 9121491Simp * this software without specific prior written permission 10121491Simp * 11121491Simp * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 12121491Simp * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 13121491Simp * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO 14121491Simp * EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 15121491Simp * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 16121491Simp * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 17121491Simp * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 18121491Simp * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 19121491Simp * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 20121491Simp * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 21121491Simp * 22121491Simp * $FreeBSD$ 23121491Simp * 24121491Simp October 2, 1994 25121491Simp 26121491Simp Modified by: Andres Vega Garcia 27121491Simp 28121491Simp INRIA - Sophia Antipolis, France 29121491Simp e-mail: avega@sophia.inria.fr 30121491Simp finger: avega@pax.inria.fr 31121491Simp 32121491Simp */ 33121491Simp 34121491Simp/* 35121491Simp * Ethernet software status per interface. 36121491Simp */ 37121491Simpstruct vx_softc { 38151014Sjhb struct ifnet *vx_ifp; 39151014Sjhb bus_space_tag_t vx_bst; 40151014Sjhb bus_space_handle_t vx_bsh; 41133980Sgibbs void *vx_intrhand; 42133980Sgibbs struct resource *vx_irq; 43133980Sgibbs struct resource *vx_res; 44133980Sgibbs#define MAX_MBS 8 /* # of mbufs we keep around */ 45151014Sjhb struct mbuf *vx_mb[MAX_MBS]; /* spare mbuf storage. */ 46151014Sjhb int vx_next_mb; /* Which mbuf to use next. */ 47151014Sjhb int vx_last_mb; /* Last mbuf. */ 48133980Sgibbs char vx_connectors; /* Connectors on this card. */ 49133980Sgibbs char vx_connector; /* Connector to use. */ 50151014Sjhb short vx_tx_start_thresh; /* Current TX_start_thresh. */ 51151014Sjhb int vx_tx_succ_ok; /* # packets sent in sequence */ 52133980Sgibbs /* w/o underrun */ 53151014Sjhb struct callout vx_callout; /* Callout for timeouts */ 54199559Sjhb struct callout vx_watchdog; 55151014Sjhb struct mtx vx_mtx; 56151014Sjhb int vx_buffill_pending; 57199559Sjhb int vx_timer; 58121491Simp}; 59121491Simp 60121491Simp#define CSR_WRITE_4(sc, reg, val) \ 61151014Sjhb bus_space_write_4(sc->vx_bst, sc->vx_bsh, reg, val) 62121491Simp#define CSR_WRITE_2(sc, reg, val) \ 63151014Sjhb bus_space_write_2(sc->vx_bst, sc->vx_bsh, reg, val) 64121491Simp#define CSR_WRITE_1(sc, reg, val) \ 65151014Sjhb bus_space_write_1(sc->vx_bst, sc->vx_bsh, reg, val) 66121491Simp 67121491Simp#define CSR_READ_4(sc, reg) \ 68151014Sjhb bus_space_read_4(sc->vx_bst, sc->vx_bsh, reg) 69121491Simp#define CSR_READ_2(sc, reg) \ 70151014Sjhb bus_space_read_2(sc->vx_bst, sc->vx_bsh, reg) 71121491Simp#define CSR_READ_1(sc, reg) \ 72151014Sjhb bus_space_read_1(sc->vx_bst, sc->vx_bsh, reg) 73121491Simp 74151014Sjhb#define VX_LOCK(sc) mtx_lock(&(sc)->vx_mtx) 75151014Sjhb#define VX_UNLOCK(sc) mtx_unlock(&(sc)->vx_mtx) 76151014Sjhb#define VX_LOCK_ASSERT(sc) mtx_assert(&(sc)->vx_mtx, MA_OWNED) 77151014Sjhb 78151014Sjhbint vx_attach(device_t); 79151014Sjhbvoid vx_stop(struct vx_softc *); 80151014Sjhbvoid vx_intr(void *); 81151014Sjhbint vx_busy_eeprom(struct vx_softc *); 82