if_ural.c revision 223486
1184610Salfred/* $FreeBSD: head/sys/dev/usb/wlan/if_ural.c 223486 2011-06-24 02:30:02Z hselasky $ */ 2184610Salfred 3184610Salfred/*- 4184610Salfred * Copyright (c) 2005, 2006 5184610Salfred * Damien Bergamini <damien.bergamini@free.fr> 6184610Salfred * 7184610Salfred * Copyright (c) 2006, 2008 8189002Sed * Hans Petter Selasky <hselasky@FreeBSD.org> 9184610Salfred * 10184610Salfred * Permission to use, copy, modify, and distribute this software for any 11184610Salfred * purpose with or without fee is hereby granted, provided that the above 12184610Salfred * copyright notice and this permission notice appear in all copies. 13184610Salfred * 14184610Salfred * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 15184610Salfred * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 16184610Salfred * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 17184610Salfred * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 18184610Salfred * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 19184610Salfred * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 20184610Salfred * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 21184610Salfred */ 22184610Salfred 23184610Salfred#include <sys/cdefs.h> 24184610Salfred__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_ural.c 223486 2011-06-24 02:30:02Z hselasky $"); 25184610Salfred 26184610Salfred/*- 27184610Salfred * Ralink Technology RT2500USB chipset driver 28184610Salfred * http://www.ralinktech.com/ 29184610Salfred */ 30184610Salfred 31191746Sthompsa#include <sys/param.h> 32191746Sthompsa#include <sys/sockio.h> 33191746Sthompsa#include <sys/sysctl.h> 34191746Sthompsa#include <sys/lock.h> 35191746Sthompsa#include <sys/mutex.h> 36191746Sthompsa#include <sys/mbuf.h> 37191746Sthompsa#include <sys/kernel.h> 38191746Sthompsa#include <sys/socket.h> 39191746Sthompsa#include <sys/systm.h> 40191746Sthompsa#include <sys/malloc.h> 41191746Sthompsa#include <sys/module.h> 42191746Sthompsa#include <sys/bus.h> 43191746Sthompsa#include <sys/endian.h> 44191746Sthompsa#include <sys/kdb.h> 45184610Salfred 46191746Sthompsa#include <machine/bus.h> 47191746Sthompsa#include <machine/resource.h> 48191746Sthompsa#include <sys/rman.h> 49191746Sthompsa 50191746Sthompsa#include <net/bpf.h> 51191746Sthompsa#include <net/if.h> 52191746Sthompsa#include <net/if_arp.h> 53191746Sthompsa#include <net/ethernet.h> 54191746Sthompsa#include <net/if_dl.h> 55191746Sthompsa#include <net/if_media.h> 56191746Sthompsa#include <net/if_types.h> 57191746Sthompsa 58191746Sthompsa#ifdef INET 59191746Sthompsa#include <netinet/in.h> 60191746Sthompsa#include <netinet/in_systm.h> 61191746Sthompsa#include <netinet/in_var.h> 62191746Sthompsa#include <netinet/if_ether.h> 63191746Sthompsa#include <netinet/ip.h> 64191746Sthompsa#endif 65191746Sthompsa 66191746Sthompsa#include <net80211/ieee80211_var.h> 67191746Sthompsa#include <net80211/ieee80211_regdomain.h> 68191746Sthompsa#include <net80211/ieee80211_radiotap.h> 69206358Srpaulo#include <net80211/ieee80211_ratectl.h> 70191746Sthompsa 71191746Sthompsa#include <dev/usb/usb.h> 72194677Sthompsa#include <dev/usb/usbdi.h> 73191746Sthompsa#include "usbdevs.h" 74184610Salfred 75194677Sthompsa#define USB_DEBUG_VAR ural_debug 76194677Sthompsa#include <dev/usb/usb_debug.h> 77191746Sthompsa 78188942Sthompsa#include <dev/usb/wlan/if_uralreg.h> 79188942Sthompsa#include <dev/usb/wlan/if_uralvar.h> 80184610Salfred 81207077Sthompsa#ifdef USB_DEBUG 82184610Salfredstatic int ural_debug = 0; 83184610Salfred 84192502SthompsaSYSCTL_NODE(_hw_usb, OID_AUTO, ural, CTLFLAG_RW, 0, "USB ural"); 85192502SthompsaSYSCTL_INT(_hw_usb_ural, OID_AUTO, debug, CTLFLAG_RW, &ural_debug, 0, 86184610Salfred "Debug level"); 87184610Salfred#endif 88184610Salfred 89188417Sthompsa#define URAL_RSSI(rssi) \ 90188417Sthompsa ((rssi) > (RAL_NOISE_FLOOR + RAL_RSSI_CORR) ? \ 91188417Sthompsa ((rssi) - (RAL_NOISE_FLOOR + RAL_RSSI_CORR)) : 0) 92184610Salfred 93188417Sthompsa/* various supported device vendors/products */ 94223486Shselaskystatic const STRUCT_USB_HOST_ID ural_devs[] = { 95201028Sthompsa#define URAL_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 96201028Sthompsa URAL_DEV(ASUS, WL167G), 97201028Sthompsa URAL_DEV(ASUS, RT2570), 98201028Sthompsa URAL_DEV(BELKIN, F5D7050), 99201028Sthompsa URAL_DEV(BELKIN, F5D7051), 100201028Sthompsa URAL_DEV(CISCOLINKSYS, HU200TS), 101201028Sthompsa URAL_DEV(CISCOLINKSYS, WUSB54G), 102201028Sthompsa URAL_DEV(CISCOLINKSYS, WUSB54GP), 103201028Sthompsa URAL_DEV(CONCEPTRONIC2, C54RU), 104201028Sthompsa URAL_DEV(DLINK, DWLG122), 105201028Sthompsa URAL_DEV(GIGABYTE, GN54G), 106201028Sthompsa URAL_DEV(GIGABYTE, GNWBKG), 107201028Sthompsa URAL_DEV(GUILLEMOT, HWGUSB254), 108201028Sthompsa URAL_DEV(MELCO, KG54), 109201028Sthompsa URAL_DEV(MELCO, KG54AI), 110201028Sthompsa URAL_DEV(MELCO, KG54YB), 111201028Sthompsa URAL_DEV(MELCO, NINWIFI), 112201028Sthompsa URAL_DEV(MSI, RT2570), 113201028Sthompsa URAL_DEV(MSI, RT2570_2), 114201028Sthompsa URAL_DEV(MSI, RT2570_3), 115201028Sthompsa URAL_DEV(NOVATECH, NV902), 116201028Sthompsa URAL_DEV(RALINK, RT2570), 117201028Sthompsa URAL_DEV(RALINK, RT2570_2), 118201028Sthompsa URAL_DEV(RALINK, RT2570_3), 119201028Sthompsa URAL_DEV(SIEMENS2, WL54G), 120201028Sthompsa URAL_DEV(SMC, 2862WG), 121201028Sthompsa URAL_DEV(SPHAIRON, UB801R), 122201028Sthompsa URAL_DEV(SURECOM, RT2570), 123201028Sthompsa URAL_DEV(VTECH, RT2570), 124201028Sthompsa URAL_DEV(ZINWELL, RT2570), 125201028Sthompsa#undef URAL_DEV 126188417Sthompsa}; 127184610Salfred 128193045Sthompsastatic usb_callback_t ural_bulk_read_callback; 129193045Sthompsastatic usb_callback_t ural_bulk_write_callback; 130184610Salfred 131193045Sthompsastatic usb_error_t ural_do_request(struct ural_softc *sc, 132192984Sthompsa struct usb_device_request *req, void *data); 133185948Sthompsastatic struct ieee80211vap *ural_vap_create(struct ieee80211com *, 134188417Sthompsa const char name[IFNAMSIZ], int unit, int opmode, 135188417Sthompsa int flags, const uint8_t bssid[IEEE80211_ADDR_LEN], 136188417Sthompsa const uint8_t mac[IEEE80211_ADDR_LEN]); 137188417Sthompsastatic void ural_vap_delete(struct ieee80211vap *); 138188417Sthompsastatic void ural_tx_free(struct ural_tx_data *, int); 139188419Sthompsastatic void ural_setup_tx_list(struct ural_softc *); 140188419Sthompsastatic void ural_unsetup_tx_list(struct ural_softc *); 141188417Sthompsastatic int ural_newstate(struct ieee80211vap *, 142188417Sthompsa enum ieee80211_state, int); 143188417Sthompsastatic void ural_setup_tx_desc(struct ural_softc *, 144188417Sthompsa struct ural_tx_desc *, uint32_t, int, int); 145188417Sthompsastatic int ural_tx_bcn(struct ural_softc *, struct mbuf *, 146188417Sthompsa struct ieee80211_node *); 147188417Sthompsastatic int ural_tx_mgt(struct ural_softc *, struct mbuf *, 148188417Sthompsa struct ieee80211_node *); 149188417Sthompsastatic int ural_tx_data(struct ural_softc *, struct mbuf *, 150188417Sthompsa struct ieee80211_node *); 151188417Sthompsastatic void ural_start(struct ifnet *); 152188417Sthompsastatic int ural_ioctl(struct ifnet *, u_long, caddr_t); 153188417Sthompsastatic void ural_set_testmode(struct ural_softc *); 154188417Sthompsastatic void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 155188417Sthompsa int); 156188417Sthompsastatic uint16_t ural_read(struct ural_softc *, uint16_t); 157188417Sthompsastatic void ural_read_multi(struct ural_softc *, uint16_t, void *, 158188417Sthompsa int); 159188417Sthompsastatic void ural_write(struct ural_softc *, uint16_t, uint16_t); 160188417Sthompsastatic void ural_write_multi(struct ural_softc *, uint16_t, void *, 161188417Sthompsa int) __unused; 162188417Sthompsastatic void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 163188417Sthompsastatic uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 164188417Sthompsastatic void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 165188417Sthompsastatic void ural_scan_start(struct ieee80211com *); 166188417Sthompsastatic void ural_scan_end(struct ieee80211com *); 167188417Sthompsastatic void ural_set_channel(struct ieee80211com *); 168188417Sthompsastatic void ural_set_chan(struct ural_softc *, 169188417Sthompsa struct ieee80211_channel *); 170188417Sthompsastatic void ural_disable_rf_tune(struct ural_softc *); 171188417Sthompsastatic void ural_enable_tsf_sync(struct ural_softc *); 172192468Ssamstatic void ural_enable_tsf(struct ural_softc *); 173188417Sthompsastatic void ural_update_slot(struct ifnet *); 174188417Sthompsastatic void ural_set_txpreamble(struct ural_softc *); 175188417Sthompsastatic void ural_set_basicrates(struct ural_softc *, 176188417Sthompsa const struct ieee80211_channel *); 177188417Sthompsastatic void ural_set_bssid(struct ural_softc *, const uint8_t *); 178188417Sthompsastatic void ural_set_macaddr(struct ural_softc *, uint8_t *); 179189123Sthompsastatic void ural_update_promisc(struct ifnet *); 180191746Sthompsastatic void ural_setpromisc(struct ural_softc *); 181188417Sthompsastatic const char *ural_get_rf(int); 182188417Sthompsastatic void ural_read_eeprom(struct ural_softc *); 183188417Sthompsastatic int ural_bbp_init(struct ural_softc *); 184188417Sthompsastatic void ural_set_txantenna(struct ural_softc *, int); 185188417Sthompsastatic void ural_set_rxantenna(struct ural_softc *, int); 186191746Sthompsastatic void ural_init_locked(struct ural_softc *); 187188417Sthompsastatic void ural_init(void *); 188191746Sthompsastatic void ural_stop(struct ural_softc *); 189188417Sthompsastatic int ural_raw_xmit(struct ieee80211_node *, struct mbuf *, 190188417Sthompsa const struct ieee80211_bpf_params *); 191206358Srpaulostatic void ural_ratectl_start(struct ural_softc *, 192188417Sthompsa struct ieee80211_node *); 193206358Srpaulostatic void ural_ratectl_timeout(void *); 194206358Srpaulostatic void ural_ratectl_task(void *, int); 195188619Sthompsastatic int ural_pause(struct ural_softc *sc, int timeout); 196184610Salfred 197184610Salfred/* 198188417Sthompsa * Default values for MAC registers; values taken from the reference driver. 199184610Salfred */ 200188417Sthompsastatic const struct { 201188417Sthompsa uint16_t reg; 202188417Sthompsa uint16_t val; 203188417Sthompsa} ural_def_mac[] = { 204188417Sthompsa { RAL_TXRX_CSR5, 0x8c8d }, 205188417Sthompsa { RAL_TXRX_CSR6, 0x8b8a }, 206188417Sthompsa { RAL_TXRX_CSR7, 0x8687 }, 207188417Sthompsa { RAL_TXRX_CSR8, 0x0085 }, 208188417Sthompsa { RAL_MAC_CSR13, 0x1111 }, 209188417Sthompsa { RAL_MAC_CSR14, 0x1e11 }, 210188417Sthompsa { RAL_TXRX_CSR21, 0xe78f }, 211188417Sthompsa { RAL_MAC_CSR9, 0xff1d }, 212188417Sthompsa { RAL_MAC_CSR11, 0x0002 }, 213188417Sthompsa { RAL_MAC_CSR22, 0x0053 }, 214188417Sthompsa { RAL_MAC_CSR15, 0x0000 }, 215188417Sthompsa { RAL_MAC_CSR8, RAL_FRAME_SIZE }, 216188417Sthompsa { RAL_TXRX_CSR19, 0x0000 }, 217188417Sthompsa { RAL_TXRX_CSR18, 0x005a }, 218188417Sthompsa { RAL_PHY_CSR2, 0x0000 }, 219188417Sthompsa { RAL_TXRX_CSR0, 0x1ec0 }, 220188417Sthompsa { RAL_PHY_CSR4, 0x000f } 221184610Salfred}; 222184610Salfred 223184610Salfred/* 224184610Salfred * Default values for BBP registers; values taken from the reference driver. 225184610Salfred */ 226188417Sthompsastatic const struct { 227184610Salfred uint8_t reg; 228184610Salfred uint8_t val; 229188417Sthompsa} ural_def_bbp[] = { 230188417Sthompsa { 3, 0x02 }, 231188417Sthompsa { 4, 0x19 }, 232188417Sthompsa { 14, 0x1c }, 233188417Sthompsa { 15, 0x30 }, 234188417Sthompsa { 16, 0xac }, 235188417Sthompsa { 17, 0x48 }, 236188417Sthompsa { 18, 0x18 }, 237188417Sthompsa { 19, 0xff }, 238188417Sthompsa { 20, 0x1e }, 239188417Sthompsa { 21, 0x08 }, 240188417Sthompsa { 22, 0x08 }, 241188417Sthompsa { 23, 0x08 }, 242188417Sthompsa { 24, 0x80 }, 243188417Sthompsa { 25, 0x50 }, 244188417Sthompsa { 26, 0x08 }, 245188417Sthompsa { 27, 0x23 }, 246188417Sthompsa { 30, 0x10 }, 247188417Sthompsa { 31, 0x2b }, 248188417Sthompsa { 32, 0xb9 }, 249188417Sthompsa { 34, 0x12 }, 250188417Sthompsa { 35, 0x50 }, 251188417Sthompsa { 39, 0xc4 }, 252188417Sthompsa { 40, 0x02 }, 253188417Sthompsa { 41, 0x60 }, 254188417Sthompsa { 53, 0x10 }, 255188417Sthompsa { 54, 0x18 }, 256188417Sthompsa { 56, 0x08 }, 257188417Sthompsa { 57, 0x10 }, 258188417Sthompsa { 58, 0x08 }, 259188417Sthompsa { 61, 0x60 }, 260188417Sthompsa { 62, 0x10 }, 261188417Sthompsa { 75, 0xff } 262184610Salfred}; 263184610Salfred 264184610Salfred/* 265184610Salfred * Default values for RF register R2 indexed by channel numbers. 266184610Salfred */ 267184610Salfredstatic const uint32_t ural_rf2522_r2[] = { 268184610Salfred 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 269184610Salfred 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 270184610Salfred}; 271184610Salfred 272184610Salfredstatic const uint32_t ural_rf2523_r2[] = { 273184610Salfred 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 274184610Salfred 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 275184610Salfred}; 276184610Salfred 277184610Salfredstatic const uint32_t ural_rf2524_r2[] = { 278184610Salfred 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 279184610Salfred 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 280184610Salfred}; 281184610Salfred 282184610Salfredstatic const uint32_t ural_rf2525_r2[] = { 283184610Salfred 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 284184610Salfred 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 285184610Salfred}; 286184610Salfred 287184610Salfredstatic const uint32_t ural_rf2525_hi_r2[] = { 288184610Salfred 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 289184610Salfred 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 290184610Salfred}; 291184610Salfred 292184610Salfredstatic const uint32_t ural_rf2525e_r2[] = { 293184610Salfred 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 294184610Salfred 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 295184610Salfred}; 296184610Salfred 297184610Salfredstatic const uint32_t ural_rf2526_hi_r2[] = { 298184610Salfred 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 299184610Salfred 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 300184610Salfred}; 301184610Salfred 302184610Salfredstatic const uint32_t ural_rf2526_r2[] = { 303184610Salfred 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 304184610Salfred 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 305184610Salfred}; 306184610Salfred 307184610Salfred/* 308184610Salfred * For dual-band RF, RF registers R1 and R4 also depend on channel number; 309184610Salfred * values taken from the reference driver. 310184610Salfred */ 311188417Sthompsastatic const struct { 312188417Sthompsa uint8_t chan; 313188417Sthompsa uint32_t r1; 314188417Sthompsa uint32_t r2; 315188417Sthompsa uint32_t r4; 316188417Sthompsa} ural_rf5222[] = { 317188417Sthompsa { 1, 0x08808, 0x0044d, 0x00282 }, 318188417Sthompsa { 2, 0x08808, 0x0044e, 0x00282 }, 319188417Sthompsa { 3, 0x08808, 0x0044f, 0x00282 }, 320188417Sthompsa { 4, 0x08808, 0x00460, 0x00282 }, 321188417Sthompsa { 5, 0x08808, 0x00461, 0x00282 }, 322188417Sthompsa { 6, 0x08808, 0x00462, 0x00282 }, 323188417Sthompsa { 7, 0x08808, 0x00463, 0x00282 }, 324188417Sthompsa { 8, 0x08808, 0x00464, 0x00282 }, 325188417Sthompsa { 9, 0x08808, 0x00465, 0x00282 }, 326188417Sthompsa { 10, 0x08808, 0x00466, 0x00282 }, 327188417Sthompsa { 11, 0x08808, 0x00467, 0x00282 }, 328188417Sthompsa { 12, 0x08808, 0x00468, 0x00282 }, 329188417Sthompsa { 13, 0x08808, 0x00469, 0x00282 }, 330188417Sthompsa { 14, 0x08808, 0x0046b, 0x00286 }, 331184610Salfred 332188417Sthompsa { 36, 0x08804, 0x06225, 0x00287 }, 333188417Sthompsa { 40, 0x08804, 0x06226, 0x00287 }, 334188417Sthompsa { 44, 0x08804, 0x06227, 0x00287 }, 335188417Sthompsa { 48, 0x08804, 0x06228, 0x00287 }, 336188417Sthompsa { 52, 0x08804, 0x06229, 0x00287 }, 337188417Sthompsa { 56, 0x08804, 0x0622a, 0x00287 }, 338188417Sthompsa { 60, 0x08804, 0x0622b, 0x00287 }, 339188417Sthompsa { 64, 0x08804, 0x0622c, 0x00287 }, 340184610Salfred 341188417Sthompsa { 100, 0x08804, 0x02200, 0x00283 }, 342188417Sthompsa { 104, 0x08804, 0x02201, 0x00283 }, 343188417Sthompsa { 108, 0x08804, 0x02202, 0x00283 }, 344188417Sthompsa { 112, 0x08804, 0x02203, 0x00283 }, 345188417Sthompsa { 116, 0x08804, 0x02204, 0x00283 }, 346188417Sthompsa { 120, 0x08804, 0x02205, 0x00283 }, 347188417Sthompsa { 124, 0x08804, 0x02206, 0x00283 }, 348188417Sthompsa { 128, 0x08804, 0x02207, 0x00283 }, 349188417Sthompsa { 132, 0x08804, 0x02208, 0x00283 }, 350188417Sthompsa { 136, 0x08804, 0x02209, 0x00283 }, 351188417Sthompsa { 140, 0x08804, 0x0220a, 0x00283 }, 352184610Salfred 353188417Sthompsa { 149, 0x08808, 0x02429, 0x00281 }, 354188417Sthompsa { 153, 0x08808, 0x0242b, 0x00281 }, 355188417Sthompsa { 157, 0x08808, 0x0242d, 0x00281 }, 356188417Sthompsa { 161, 0x08808, 0x0242f, 0x00281 } 357184610Salfred}; 358184610Salfred 359192984Sthompsastatic const struct usb_config ural_config[URAL_N_TRANSFER] = { 360188417Sthompsa [URAL_BULK_WR] = { 361184610Salfred .type = UE_BULK, 362184610Salfred .endpoint = UE_ADDR_ANY, 363184610Salfred .direction = UE_DIR_OUT, 364190734Sthompsa .bufsize = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE + 4), 365190734Sthompsa .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 366190734Sthompsa .callback = ural_bulk_write_callback, 367190734Sthompsa .timeout = 5000, /* ms */ 368184610Salfred }, 369188417Sthompsa [URAL_BULK_RD] = { 370184610Salfred .type = UE_BULK, 371184610Salfred .endpoint = UE_ADDR_ANY, 372184610Salfred .direction = UE_DIR_IN, 373190734Sthompsa .bufsize = (RAL_FRAME_SIZE + RAL_RX_DESC_SIZE), 374190734Sthompsa .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 375190734Sthompsa .callback = ural_bulk_read_callback, 376184610Salfred }, 377184610Salfred}; 378184610Salfred 379188417Sthompsastatic device_probe_t ural_match; 380188417Sthompsastatic device_attach_t ural_attach; 381188417Sthompsastatic device_detach_t ural_detach; 382184610Salfred 383184610Salfredstatic device_method_t ural_methods[] = { 384188417Sthompsa /* Device interface */ 385188417Sthompsa DEVMETHOD(device_probe, ural_match), 386188417Sthompsa DEVMETHOD(device_attach, ural_attach), 387188417Sthompsa DEVMETHOD(device_detach, ural_detach), 388188417Sthompsa 389188417Sthompsa { 0, 0 } 390184610Salfred}; 391184610Salfred 392184610Salfredstatic driver_t ural_driver = { 393184610Salfred .name = "ural", 394184610Salfred .methods = ural_methods, 395184610Salfred .size = sizeof(struct ural_softc), 396184610Salfred}; 397184610Salfred 398188417Sthompsastatic devclass_t ural_devclass; 399188417Sthompsa 400189275SthompsaDRIVER_MODULE(ural, uhub, ural_driver, ural_devclass, NULL, 0); 401188942SthompsaMODULE_DEPEND(ural, usb, 1, 1, 1); 402184610SalfredMODULE_DEPEND(ural, wlan, 1, 1, 1); 403212122SthompsaMODULE_VERSION(ural, 1); 404184610Salfred 405184610Salfredstatic int 406188417Sthompsaural_match(device_t self) 407184610Salfred{ 408192984Sthompsa struct usb_attach_arg *uaa = device_get_ivars(self); 409184610Salfred 410192499Sthompsa if (uaa->usb_mode != USB_MODE_HOST) 411184610Salfred return (ENXIO); 412188417Sthompsa if (uaa->info.bConfigIndex != 0) 413184610Salfred return (ENXIO); 414188417Sthompsa if (uaa->info.bIfaceIndex != RAL_IFACE_INDEX) 415184610Salfred return (ENXIO); 416188417Sthompsa 417194228Sthompsa return (usbd_lookup_id_by_uaa(ural_devs, sizeof(ural_devs), uaa)); 418184610Salfred} 419184610Salfred 420184610Salfredstatic int 421188417Sthompsaural_attach(device_t self) 422184610Salfred{ 423192984Sthompsa struct usb_attach_arg *uaa = device_get_ivars(self); 424188417Sthompsa struct ural_softc *sc = device_get_softc(self); 425191746Sthompsa struct ifnet *ifp; 426191746Sthompsa struct ieee80211com *ic; 427191746Sthompsa uint8_t iface_index, bands; 428184610Salfred int error; 429184610Salfred 430194228Sthompsa device_set_usb_desc(self); 431184610Salfred sc->sc_udev = uaa->device; 432188417Sthompsa sc->sc_dev = self; 433184610Salfred 434188417Sthompsa mtx_init(&sc->sc_mtx, device_get_nameunit(self), 435188417Sthompsa MTX_NETWORK_LOCK, MTX_DEF); 436184610Salfred 437184610Salfred iface_index = RAL_IFACE_INDEX; 438194228Sthompsa error = usbd_transfer_setup(uaa->device, 439184610Salfred &iface_index, sc->sc_xfer, ural_config, 440184610Salfred URAL_N_TRANSFER, sc, &sc->sc_mtx); 441184610Salfred if (error) { 442188417Sthompsa device_printf(self, "could not allocate USB transfers, " 443194228Sthompsa "err=%s\n", usbd_errstr(error)); 444184610Salfred goto detach; 445184610Salfred } 446184610Salfred 447188419Sthompsa RAL_LOCK(sc); 448188417Sthompsa /* retrieve RT2570 rev. no */ 449188417Sthompsa sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 450184610Salfred 451188417Sthompsa /* retrieve MAC address and various other things from EEPROM */ 452188417Sthompsa ural_read_eeprom(sc); 453188417Sthompsa RAL_UNLOCK(sc); 454184610Salfred 455191746Sthompsa device_printf(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 456188417Sthompsa sc->asic_rev, ural_get_rf(sc->rf_rev)); 457184610Salfred 458188419Sthompsa ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 459188419Sthompsa if (ifp == NULL) { 460188419Sthompsa device_printf(sc->sc_dev, "can not if_alloc()\n"); 461191746Sthompsa goto detach; 462188419Sthompsa } 463188419Sthompsa ic = ifp->if_l2com; 464188419Sthompsa 465188417Sthompsa ifp->if_softc = sc; 466188417Sthompsa if_initname(ifp, "ural", device_get_unit(sc->sc_dev)); 467188417Sthompsa ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 468188417Sthompsa ifp->if_init = ural_init; 469188417Sthompsa ifp->if_ioctl = ural_ioctl; 470188417Sthompsa ifp->if_start = ural_start; 471207554Ssobomax IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 472207554Ssobomax ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 473188417Sthompsa IFQ_SET_READY(&ifp->if_snd); 474184610Salfred 475188417Sthompsa ic->ic_ifp = ifp; 476188417Sthompsa ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 477184610Salfred 478188417Sthompsa /* set device capabilities */ 479188417Sthompsa ic->ic_caps = 480188417Sthompsa IEEE80211_C_STA /* station mode supported */ 481188417Sthompsa | IEEE80211_C_IBSS /* IBSS mode supported */ 482188417Sthompsa | IEEE80211_C_MONITOR /* monitor mode supported */ 483188417Sthompsa | IEEE80211_C_HOSTAP /* HostAp mode supported */ 484188417Sthompsa | IEEE80211_C_TXPMGT /* tx power management */ 485188417Sthompsa | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 486188417Sthompsa | IEEE80211_C_SHSLOT /* short slot time supported */ 487188417Sthompsa | IEEE80211_C_BGSCAN /* bg scanning supported */ 488188417Sthompsa | IEEE80211_C_WPA /* 802.11i */ 489188417Sthompsa ; 490184610Salfred 491188417Sthompsa bands = 0; 492188417Sthompsa setbit(&bands, IEEE80211_MODE_11B); 493188417Sthompsa setbit(&bands, IEEE80211_MODE_11G); 494188417Sthompsa if (sc->rf_rev == RAL_RF_5222) 495188417Sthompsa setbit(&bands, IEEE80211_MODE_11A); 496188417Sthompsa ieee80211_init_channels(ic, NULL, &bands); 497184610Salfred 498190526Ssam ieee80211_ifattach(ic, sc->sc_bssid); 499189123Sthompsa ic->ic_update_promisc = ural_update_promisc; 500188417Sthompsa ic->ic_raw_xmit = ural_raw_xmit; 501188417Sthompsa ic->ic_scan_start = ural_scan_start; 502188417Sthompsa ic->ic_scan_end = ural_scan_end; 503188417Sthompsa ic->ic_set_channel = ural_set_channel; 504184610Salfred 505188417Sthompsa ic->ic_vap_create = ural_vap_create; 506188417Sthompsa ic->ic_vap_delete = ural_vap_delete; 507184610Salfred 508192468Ssam ieee80211_radiotap_attach(ic, 509192468Ssam &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 510192468Ssam RAL_TX_RADIOTAP_PRESENT, 511192468Ssam &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 512192468Ssam RAL_RX_RADIOTAP_PRESENT); 513184610Salfred 514188417Sthompsa if (bootverbose) 515188417Sthompsa ieee80211_announce(ic); 516184610Salfred 517191746Sthompsa return (0); 518191746Sthompsa 519191746Sthompsadetach: 520191746Sthompsa ural_detach(self); 521191746Sthompsa return (ENXIO); /* failure */ 522188417Sthompsa} 523184610Salfred 524188417Sthompsastatic int 525188417Sthompsaural_detach(device_t self) 526188417Sthompsa{ 527188417Sthompsa struct ural_softc *sc = device_get_softc(self); 528188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 529188619Sthompsa struct ieee80211com *ic; 530184610Salfred 531188419Sthompsa /* stop all USB transfers */ 532194228Sthompsa usbd_transfer_unsetup(sc->sc_xfer, URAL_N_TRANSFER); 533184610Salfred 534188419Sthompsa /* free TX list, if any */ 535188419Sthompsa RAL_LOCK(sc); 536188419Sthompsa ural_unsetup_tx_list(sc); 537188419Sthompsa RAL_UNLOCK(sc); 538188419Sthompsa 539188417Sthompsa if (ifp) { 540188619Sthompsa ic = ifp->if_l2com; 541188417Sthompsa ieee80211_ifdetach(ic); 542188417Sthompsa if_free(ifp); 543184610Salfred } 544188417Sthompsa mtx_destroy(&sc->sc_mtx); 545184610Salfred 546188417Sthompsa return (0); 547184610Salfred} 548184610Salfred 549193045Sthompsastatic usb_error_t 550189123Sthompsaural_do_request(struct ural_softc *sc, 551192984Sthompsa struct usb_device_request *req, void *data) 552189123Sthompsa{ 553193045Sthompsa usb_error_t err; 554189123Sthompsa int ntries = 10; 555189123Sthompsa 556189123Sthompsa while (ntries--) { 557194228Sthompsa err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 558189123Sthompsa req, data, 0, NULL, 250 /* ms */); 559189123Sthompsa if (err == 0) 560189123Sthompsa break; 561189123Sthompsa 562189123Sthompsa DPRINTFN(1, "Control request failed, %s (retrying)\n", 563194228Sthompsa usbd_errstr(err)); 564189123Sthompsa if (ural_pause(sc, hz / 100)) 565189123Sthompsa break; 566189123Sthompsa } 567189123Sthompsa return (err); 568189123Sthompsa} 569189123Sthompsa 570188417Sthompsastatic struct ieee80211vap * 571188417Sthompsaural_vap_create(struct ieee80211com *ic, 572188417Sthompsa const char name[IFNAMSIZ], int unit, int opmode, int flags, 573188417Sthompsa const uint8_t bssid[IEEE80211_ADDR_LEN], 574188417Sthompsa const uint8_t mac[IEEE80211_ADDR_LEN]) 575184610Salfred{ 576188417Sthompsa struct ural_softc *sc = ic->ic_ifp->if_softc; 577188417Sthompsa struct ural_vap *uvp; 578188417Sthompsa struct ieee80211vap *vap; 579184610Salfred 580188417Sthompsa if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 581188417Sthompsa return NULL; 582188417Sthompsa uvp = (struct ural_vap *) malloc(sizeof(struct ural_vap), 583188417Sthompsa M_80211_VAP, M_NOWAIT | M_ZERO); 584188417Sthompsa if (uvp == NULL) 585188417Sthompsa return NULL; 586188417Sthompsa vap = &uvp->vap; 587188417Sthompsa /* enable s/w bmiss handling for sta mode */ 588188417Sthompsa ieee80211_vap_setup(ic, vap, name, unit, opmode, 589188417Sthompsa flags | IEEE80211_CLONE_NOBEACONS, bssid, mac); 590184610Salfred 591188417Sthompsa /* override state transition machine */ 592188417Sthompsa uvp->newstate = vap->iv_newstate; 593188417Sthompsa vap->iv_newstate = ural_newstate; 594184610Salfred 595206358Srpaulo usb_callout_init_mtx(&uvp->ratectl_ch, &sc->sc_mtx, 0); 596206358Srpaulo TASK_INIT(&uvp->ratectl_task, 0, ural_ratectl_task, uvp); 597206358Srpaulo ieee80211_ratectl_init(vap); 598206358Srpaulo ieee80211_ratectl_setinterval(vap, 1000 /* 1 sec */); 599184610Salfred 600188417Sthompsa /* complete setup */ 601188417Sthompsa ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status); 602188417Sthompsa ic->ic_opmode = opmode; 603188417Sthompsa return vap; 604184610Salfred} 605184610Salfred 606184610Salfredstatic void 607188417Sthompsaural_vap_delete(struct ieee80211vap *vap) 608184610Salfred{ 609188417Sthompsa struct ural_vap *uvp = URAL_VAP(vap); 610191746Sthompsa struct ieee80211com *ic = vap->iv_ic; 611184610Salfred 612206358Srpaulo usb_callout_drain(&uvp->ratectl_ch); 613206358Srpaulo ieee80211_draintask(ic, &uvp->ratectl_task); 614206358Srpaulo ieee80211_ratectl_deinit(vap); 615188417Sthompsa ieee80211_vap_detach(vap); 616188417Sthompsa free(uvp, M_80211_VAP); 617184610Salfred} 618184610Salfred 619184610Salfredstatic void 620188417Sthompsaural_tx_free(struct ural_tx_data *data, int txerr) 621184610Salfred{ 622188417Sthompsa struct ural_softc *sc = data->sc; 623184610Salfred 624188417Sthompsa if (data->m != NULL) { 625188417Sthompsa if (data->m->m_flags & M_TXCB) 626188417Sthompsa ieee80211_process_callback(data->ni, data->m, 627188417Sthompsa txerr ? ETIMEDOUT : 0); 628188417Sthompsa m_freem(data->m); 629188417Sthompsa data->m = NULL; 630184610Salfred 631188417Sthompsa ieee80211_free_node(data->ni); 632188417Sthompsa data->ni = NULL; 633188417Sthompsa } 634188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_free, data, next); 635188417Sthompsa sc->tx_nfree++; 636184610Salfred} 637184610Salfred 638188419Sthompsastatic void 639188419Sthompsaural_setup_tx_list(struct ural_softc *sc) 640184610Salfred{ 641188417Sthompsa struct ural_tx_data *data; 642188417Sthompsa int i; 643184610Salfred 644188417Sthompsa sc->tx_nfree = 0; 645188417Sthompsa STAILQ_INIT(&sc->tx_q); 646188417Sthompsa STAILQ_INIT(&sc->tx_free); 647184610Salfred 648188417Sthompsa for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 649188417Sthompsa data = &sc->tx_data[i]; 650184610Salfred 651188417Sthompsa data->sc = sc; 652188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_free, data, next); 653188417Sthompsa sc->tx_nfree++; 654184610Salfred } 655184610Salfred} 656184610Salfred 657184610Salfredstatic void 658188419Sthompsaural_unsetup_tx_list(struct ural_softc *sc) 659184610Salfred{ 660188417Sthompsa struct ural_tx_data *data; 661188417Sthompsa int i; 662184610Salfred 663188419Sthompsa /* make sure any subsequent use of the queues will fail */ 664188419Sthompsa sc->tx_nfree = 0; 665188419Sthompsa STAILQ_INIT(&sc->tx_q); 666188419Sthompsa STAILQ_INIT(&sc->tx_free); 667184610Salfred 668188419Sthompsa /* free up all node references and mbufs */ 669188417Sthompsa for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 670188417Sthompsa data = &sc->tx_data[i]; 671184610Salfred 672188417Sthompsa if (data->m != NULL) { 673188417Sthompsa m_freem(data->m); 674188417Sthompsa data->m = NULL; 675188417Sthompsa } 676188417Sthompsa if (data->ni != NULL) { 677188417Sthompsa ieee80211_free_node(data->ni); 678188417Sthompsa data->ni = NULL; 679188417Sthompsa } 680184610Salfred } 681184610Salfred} 682184610Salfred 683191746Sthompsastatic int 684191746Sthompsaural_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 685184610Salfred{ 686188417Sthompsa struct ural_vap *uvp = URAL_VAP(vap); 687191746Sthompsa struct ieee80211com *ic = vap->iv_ic; 688191746Sthompsa struct ural_softc *sc = ic->ic_ifp->if_softc; 689188417Sthompsa const struct ieee80211_txparam *tp; 690188417Sthompsa struct ieee80211_node *ni; 691188417Sthompsa struct mbuf *m; 692184610Salfred 693191746Sthompsa DPRINTF("%s -> %s\n", 694191746Sthompsa ieee80211_state_name[vap->iv_state], 695191746Sthompsa ieee80211_state_name[nstate]); 696184610Salfred 697191746Sthompsa IEEE80211_UNLOCK(ic); 698191746Sthompsa RAL_LOCK(sc); 699206358Srpaulo usb_callout_stop(&uvp->ratectl_ch); 700191746Sthompsa 701191746Sthompsa switch (nstate) { 702188417Sthompsa case IEEE80211_S_INIT: 703191746Sthompsa if (vap->iv_state == IEEE80211_S_RUN) { 704188417Sthompsa /* abort TSF synchronization */ 705188417Sthompsa ural_write(sc, RAL_TXRX_CSR19, 0); 706184610Salfred 707188417Sthompsa /* force tx led to stop blinking */ 708188417Sthompsa ural_write(sc, RAL_MAC_CSR20, 0); 709188417Sthompsa } 710188417Sthompsa break; 711184610Salfred 712188417Sthompsa case IEEE80211_S_RUN: 713212127Sthompsa ni = ieee80211_ref_node(vap->iv_bss); 714188417Sthompsa 715188417Sthompsa if (vap->iv_opmode != IEEE80211_M_MONITOR) { 716188417Sthompsa ural_update_slot(ic->ic_ifp); 717188417Sthompsa ural_set_txpreamble(sc); 718188417Sthompsa ural_set_basicrates(sc, ic->ic_bsschan); 719188419Sthompsa IEEE80211_ADDR_COPY(sc->sc_bssid, ni->ni_bssid); 720188419Sthompsa ural_set_bssid(sc, sc->sc_bssid); 721188417Sthompsa } 722188417Sthompsa 723188417Sthompsa if (vap->iv_opmode == IEEE80211_M_HOSTAP || 724188417Sthompsa vap->iv_opmode == IEEE80211_M_IBSS) { 725188417Sthompsa m = ieee80211_beacon_alloc(ni, &uvp->bo); 726188417Sthompsa if (m == NULL) { 727188417Sthompsa device_printf(sc->sc_dev, 728188417Sthompsa "could not allocate beacon\n"); 729191746Sthompsa RAL_UNLOCK(sc); 730191746Sthompsa IEEE80211_LOCK(ic); 731212127Sthompsa ieee80211_free_node(ni); 732191746Sthompsa return (-1); 733184610Salfred } 734191710Sthompsa ieee80211_ref_node(ni); 735188417Sthompsa if (ural_tx_bcn(sc, m, ni) != 0) { 736188417Sthompsa device_printf(sc->sc_dev, 737188417Sthompsa "could not send beacon\n"); 738191746Sthompsa RAL_UNLOCK(sc); 739191746Sthompsa IEEE80211_LOCK(ic); 740212127Sthompsa ieee80211_free_node(ni); 741191746Sthompsa return (-1); 742184610Salfred } 743184610Salfred } 744184610Salfred 745188417Sthompsa /* make tx led blink on tx (controlled by ASIC) */ 746188417Sthompsa ural_write(sc, RAL_MAC_CSR20, 1); 747184610Salfred 748188417Sthompsa if (vap->iv_opmode != IEEE80211_M_MONITOR) 749188417Sthompsa ural_enable_tsf_sync(sc); 750192468Ssam else 751192468Ssam ural_enable_tsf(sc); 752184610Salfred 753188417Sthompsa /* enable automatic rate adaptation */ 754192468Ssam /* XXX should use ic_bsschan but not valid until after newstate call below */ 755192468Ssam tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 756188417Sthompsa if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) 757206358Srpaulo ural_ratectl_start(sc, ni); 758212127Sthompsa ieee80211_free_node(ni); 759188417Sthompsa break; 760184610Salfred 761188417Sthompsa default: 762188417Sthompsa break; 763188417Sthompsa } 764188417Sthompsa RAL_UNLOCK(sc); 765188417Sthompsa IEEE80211_LOCK(ic); 766191746Sthompsa return (uvp->newstate(vap, nstate, arg)); 767188417Sthompsa} 768184610Salfred 769184610Salfred 770188417Sthompsastatic void 771194677Sthompsaural_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 772188417Sthompsa{ 773194677Sthompsa struct ural_softc *sc = usbd_xfer_softc(xfer); 774188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 775192468Ssam struct ieee80211vap *vap; 776188417Sthompsa struct ural_tx_data *data; 777188417Sthompsa struct mbuf *m; 778194677Sthompsa struct usb_page_cache *pc; 779194677Sthompsa int len; 780184610Salfred 781194677Sthompsa usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 782194677Sthompsa 783188417Sthompsa switch (USB_GET_STATE(xfer)) { 784188417Sthompsa case USB_ST_TRANSFERRED: 785194677Sthompsa DPRINTFN(11, "transfer complete, %d bytes\n", len); 786184610Salfred 787188417Sthompsa /* free resources */ 788194677Sthompsa data = usbd_xfer_get_priv(xfer); 789188417Sthompsa ural_tx_free(data, 0); 790194677Sthompsa usbd_xfer_set_priv(xfer, NULL); 791184610Salfred 792188417Sthompsa ifp->if_opackets++; 793188417Sthompsa ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 794184610Salfred 795188417Sthompsa /* FALLTHROUGH */ 796188417Sthompsa case USB_ST_SETUP: 797188417Sthompsatr_setup: 798188417Sthompsa data = STAILQ_FIRST(&sc->tx_q); 799188417Sthompsa if (data) { 800188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_q, next); 801188417Sthompsa m = data->m; 802184610Salfred 803188417Sthompsa if (m->m_pkthdr.len > (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE)) { 804188417Sthompsa DPRINTFN(0, "data overflow, %u bytes\n", 805188417Sthompsa m->m_pkthdr.len); 806188417Sthompsa m->m_pkthdr.len = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE); 807188417Sthompsa } 808194677Sthompsa pc = usbd_xfer_get_frame(xfer, 0); 809194677Sthompsa usbd_copy_in(pc, 0, &data->desc, RAL_TX_DESC_SIZE); 810194677Sthompsa usbd_m_copy_in(pc, RAL_TX_DESC_SIZE, m, 0, 811188417Sthompsa m->m_pkthdr.len); 812184610Salfred 813192468Ssam vap = data->ni->ni_vap; 814192468Ssam if (ieee80211_radiotap_active_vap(vap)) { 815188417Sthompsa struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 816184610Salfred 817188417Sthompsa tap->wt_flags = 0; 818188417Sthompsa tap->wt_rate = data->rate; 819188417Sthompsa tap->wt_antenna = sc->tx_ant; 820184610Salfred 821192468Ssam ieee80211_radiotap_tx(vap, m); 822188417Sthompsa } 823184610Salfred 824188417Sthompsa /* xfer length needs to be a multiple of two! */ 825188417Sthompsa len = (RAL_TX_DESC_SIZE + m->m_pkthdr.len + 1) & ~1; 826188417Sthompsa if ((len % 64) == 0) 827188417Sthompsa len += 2; 828184610Salfred 829188417Sthompsa DPRINTFN(11, "sending frame len=%u xferlen=%u\n", 830188417Sthompsa m->m_pkthdr.len, len); 831184610Salfred 832194677Sthompsa usbd_xfer_set_frame_len(xfer, 0, len); 833194677Sthompsa usbd_xfer_set_priv(xfer, data); 834184610Salfred 835194228Sthompsa usbd_transfer_submit(xfer); 836188417Sthompsa } 837198099Sweongyo RAL_UNLOCK(sc); 838198099Sweongyo ural_start(ifp); 839198099Sweongyo RAL_LOCK(sc); 840188417Sthompsa break; 841184610Salfred 842188417Sthompsa default: /* Error */ 843188417Sthompsa DPRINTFN(11, "transfer error, %s\n", 844194677Sthompsa usbd_errstr(error)); 845184610Salfred 846188419Sthompsa ifp->if_oerrors++; 847194677Sthompsa data = usbd_xfer_get_priv(xfer); 848188419Sthompsa if (data != NULL) { 849194677Sthompsa ural_tx_free(data, error); 850194677Sthompsa usbd_xfer_set_priv(xfer, NULL); 851188419Sthompsa } 852188419Sthompsa 853194677Sthompsa if (error == USB_ERR_STALLED) { 854188417Sthompsa /* try to clear stall first */ 855194677Sthompsa usbd_xfer_set_stall(xfer); 856188417Sthompsa goto tr_setup; 857188417Sthompsa } 858194677Sthompsa if (error == USB_ERR_TIMEOUT) 859188417Sthompsa device_printf(sc->sc_dev, "device timeout\n"); 860188417Sthompsa break; 861184610Salfred } 862184610Salfred} 863184610Salfred 864184610Salfredstatic void 865194677Sthompsaural_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 866184610Salfred{ 867194677Sthompsa struct ural_softc *sc = usbd_xfer_softc(xfer); 868184610Salfred struct ifnet *ifp = sc->sc_ifp; 869184610Salfred struct ieee80211com *ic = ifp->if_l2com; 870184610Salfred struct ieee80211_node *ni; 871184610Salfred struct mbuf *m = NULL; 872194677Sthompsa struct usb_page_cache *pc; 873184610Salfred uint32_t flags; 874192468Ssam int8_t rssi = 0, nf = 0; 875194677Sthompsa int len; 876184610Salfred 877194677Sthompsa usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 878194677Sthompsa 879184610Salfred switch (USB_GET_STATE(xfer)) { 880184610Salfred case USB_ST_TRANSFERRED: 881184610Salfred 882194677Sthompsa DPRINTFN(15, "rx done, actlen=%d\n", len); 883184610Salfred 884188417Sthompsa if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 885188417Sthompsa DPRINTF("%s: xfer too short %d\n", 886188417Sthompsa device_get_nameunit(sc->sc_dev), len); 887184610Salfred ifp->if_ierrors++; 888184610Salfred goto tr_setup; 889184610Salfred } 890184610Salfred 891188417Sthompsa len -= RAL_RX_DESC_SIZE; 892188417Sthompsa /* rx descriptor is located at the end */ 893194677Sthompsa pc = usbd_xfer_get_frame(xfer, 0); 894194677Sthompsa usbd_copy_out(pc, len, &sc->sc_rx_desc, RAL_RX_DESC_SIZE); 895184610Salfred 896188417Sthompsa rssi = URAL_RSSI(sc->sc_rx_desc.rssi); 897192468Ssam nf = RAL_NOISE_FLOOR; 898184610Salfred flags = le32toh(sc->sc_rx_desc.flags); 899184610Salfred if (flags & (RAL_RX_PHY_ERROR | RAL_RX_CRC_ERROR)) { 900184610Salfred /* 901184610Salfred * This should not happen since we did not 902184610Salfred * request to receive those frames when we 903184610Salfred * filled RAL_TXRX_CSR2: 904184610Salfred */ 905188417Sthompsa DPRINTFN(5, "PHY or CRC error\n"); 906184610Salfred ifp->if_ierrors++; 907184610Salfred goto tr_setup; 908184610Salfred } 909184610Salfred 910184610Salfred m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 911184610Salfred if (m == NULL) { 912184610Salfred DPRINTF("could not allocate mbuf\n"); 913184610Salfred ifp->if_ierrors++; 914184610Salfred goto tr_setup; 915184610Salfred } 916194677Sthompsa usbd_copy_out(pc, 0, mtod(m, uint8_t *), len); 917184610Salfred 918184610Salfred /* finalize mbuf */ 919184610Salfred m->m_pkthdr.rcvif = ifp; 920188417Sthompsa m->m_pkthdr.len = m->m_len = (flags >> 16) & 0xfff; 921184610Salfred 922192468Ssam if (ieee80211_radiotap_active(ic)) { 923184610Salfred struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 924184610Salfred 925192468Ssam /* XXX set once */ 926192468Ssam tap->wr_flags = 0; 927184610Salfred tap->wr_rate = ieee80211_plcp2rate(sc->sc_rx_desc.rate, 928188417Sthompsa (flags & RAL_RX_OFDM) ? 929184610Salfred IEEE80211_T_OFDM : IEEE80211_T_CCK); 930188417Sthompsa tap->wr_antenna = sc->rx_ant; 931192468Ssam tap->wr_antsignal = nf + rssi; 932192468Ssam tap->wr_antnoise = nf; 933184610Salfred } 934184610Salfred /* Strip trailing 802.11 MAC FCS. */ 935184610Salfred m_adj(m, -IEEE80211_CRC_LEN); 936184610Salfred 937188417Sthompsa /* FALLTHROUGH */ 938184610Salfred case USB_ST_SETUP: 939184610Salfredtr_setup: 940194677Sthompsa usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 941194228Sthompsa usbd_transfer_submit(xfer); 942184610Salfred 943184610Salfred /* 944184610Salfred * At the end of a USB callback it is always safe to unlock 945184610Salfred * the private mutex of a device! That is why we do the 946184610Salfred * "ieee80211_input" here, and not some lines up! 947184610Salfred */ 948198099Sweongyo RAL_UNLOCK(sc); 949184610Salfred if (m) { 950188417Sthompsa ni = ieee80211_find_rxnode(ic, 951188417Sthompsa mtod(m, struct ieee80211_frame_min *)); 952188417Sthompsa if (ni != NULL) { 953192468Ssam (void) ieee80211_input(ni, m, rssi, nf); 954184610Salfred ieee80211_free_node(ni); 955188417Sthompsa } else 956192468Ssam (void) ieee80211_input_all(ic, m, rssi, nf); 957184610Salfred } 958198099Sweongyo if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 && 959198099Sweongyo !IFQ_IS_EMPTY(&ifp->if_snd)) 960198099Sweongyo ural_start(ifp); 961198099Sweongyo RAL_LOCK(sc); 962184610Salfred return; 963184610Salfred 964184610Salfred default: /* Error */ 965194677Sthompsa if (error != USB_ERR_CANCELLED) { 966184610Salfred /* try to clear stall first */ 967194677Sthompsa usbd_xfer_set_stall(xfer); 968188417Sthompsa goto tr_setup; 969184610Salfred } 970184610Salfred return; 971184610Salfred } 972184610Salfred} 973184610Salfred 974184610Salfredstatic uint8_t 975188417Sthompsaural_plcp_signal(int rate) 976184610Salfred{ 977184610Salfred switch (rate) { 978188417Sthompsa /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 979188417Sthompsa case 12: return 0xb; 980188417Sthompsa case 18: return 0xf; 981188417Sthompsa case 24: return 0xa; 982188417Sthompsa case 36: return 0xe; 983188417Sthompsa case 48: return 0x9; 984188417Sthompsa case 72: return 0xd; 985188417Sthompsa case 96: return 0x8; 986188417Sthompsa case 108: return 0xc; 987184610Salfred 988188417Sthompsa /* CCK rates (NB: not IEEE std, device-specific) */ 989188417Sthompsa case 2: return 0x0; 990188417Sthompsa case 4: return 0x1; 991188417Sthompsa case 11: return 0x2; 992188417Sthompsa case 22: return 0x3; 993184610Salfred } 994188417Sthompsa return 0xff; /* XXX unsupported/unknown rate */ 995184610Salfred} 996184610Salfred 997184610Salfredstatic void 998188417Sthompsaural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 999188417Sthompsa uint32_t flags, int len, int rate) 1000184610Salfred{ 1001184610Salfred struct ifnet *ifp = sc->sc_ifp; 1002184610Salfred struct ieee80211com *ic = ifp->if_l2com; 1003184610Salfred uint16_t plcp_length; 1004188417Sthompsa int remainder; 1005184610Salfred 1006188417Sthompsa desc->flags = htole32(flags); 1007188417Sthompsa desc->flags |= htole32(RAL_TX_NEWSEQ); 1008188417Sthompsa desc->flags |= htole32(len << 16); 1009184610Salfred 1010188417Sthompsa desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1011188417Sthompsa desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1012184610Salfred 1013188417Sthompsa /* setup PLCP fields */ 1014188417Sthompsa desc->plcp_signal = ural_plcp_signal(rate); 1015188417Sthompsa desc->plcp_service = 4; 1016188417Sthompsa 1017188417Sthompsa len += IEEE80211_CRC_LEN; 1018190532Ssam if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) { 1019188417Sthompsa desc->flags |= htole32(RAL_TX_OFDM); 1020188417Sthompsa 1021188417Sthompsa plcp_length = len & 0xfff; 1022188417Sthompsa desc->plcp_length_hi = plcp_length >> 6; 1023188417Sthompsa desc->plcp_length_lo = plcp_length & 0x3f; 1024188417Sthompsa } else { 1025188417Sthompsa plcp_length = (16 * len + rate - 1) / rate; 1026188417Sthompsa if (rate == 22) { 1027188417Sthompsa remainder = (16 * len) % 22; 1028188417Sthompsa if (remainder != 0 && remainder < 7) 1029188417Sthompsa desc->plcp_service |= RAL_PLCP_LENGEXT; 1030188417Sthompsa } 1031188417Sthompsa desc->plcp_length_hi = plcp_length >> 8; 1032188417Sthompsa desc->plcp_length_lo = plcp_length & 0xff; 1033188417Sthompsa 1034188417Sthompsa if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1035188417Sthompsa desc->plcp_signal |= 0x08; 1036184610Salfred } 1037184610Salfred 1038188417Sthompsa desc->iv = 0; 1039188417Sthompsa desc->eiv = 0; 1040188417Sthompsa} 1041184610Salfred 1042188417Sthompsa#define RAL_TX_TIMEOUT 5000 1043184610Salfred 1044188417Sthompsastatic int 1045188417Sthompsaural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1046188417Sthompsa{ 1047188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 1048188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 1049188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 1050188417Sthompsa const struct ieee80211_txparam *tp; 1051188417Sthompsa struct ural_tx_data *data; 1052188417Sthompsa 1053188417Sthompsa if (sc->tx_nfree == 0) { 1054188417Sthompsa ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1055188417Sthompsa m_freem(m0); 1056188417Sthompsa ieee80211_free_node(ni); 1057188417Sthompsa return EIO; 1058184610Salfred } 1059188417Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1060188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1061188417Sthompsa sc->tx_nfree--; 1062188417Sthompsa tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_bsschan)]; 1063184610Salfred 1064188417Sthompsa data->m = m0; 1065188417Sthompsa data->ni = ni; 1066188417Sthompsa data->rate = tp->mgmtrate; 1067184610Salfred 1068188417Sthompsa ural_setup_tx_desc(sc, &data->desc, 1069188417Sthompsa RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, m0->m_pkthdr.len, 1070188417Sthompsa tp->mgmtrate); 1071184610Salfred 1072188417Sthompsa DPRINTFN(10, "sending beacon frame len=%u rate=%u\n", 1073188417Sthompsa m0->m_pkthdr.len, tp->mgmtrate); 1074184610Salfred 1075188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1076194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1077184610Salfred 1078188417Sthompsa return (0); 1079188417Sthompsa} 1080184610Salfred 1081188417Sthompsastatic int 1082188417Sthompsaural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1083188417Sthompsa{ 1084188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 1085188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 1086188417Sthompsa const struct ieee80211_txparam *tp; 1087188417Sthompsa struct ural_tx_data *data; 1088188417Sthompsa struct ieee80211_frame *wh; 1089188417Sthompsa struct ieee80211_key *k; 1090188417Sthompsa uint32_t flags; 1091188417Sthompsa uint16_t dur; 1092184610Salfred 1093188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 1094184610Salfred 1095188417Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1096188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1097188417Sthompsa sc->tx_nfree--; 1098184610Salfred 1099188417Sthompsa tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 1100188417Sthompsa 1101188417Sthompsa wh = mtod(m0, struct ieee80211_frame *); 1102188417Sthompsa if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1103188417Sthompsa k = ieee80211_crypto_encap(ni, m0); 1104188417Sthompsa if (k == NULL) { 1105188417Sthompsa m_freem(m0); 1106188417Sthompsa return ENOBUFS; 1107184610Salfred } 1108188417Sthompsa wh = mtod(m0, struct ieee80211_frame *); 1109184610Salfred } 1110184610Salfred 1111188417Sthompsa data->m = m0; 1112188417Sthompsa data->ni = ni; 1113188417Sthompsa data->rate = tp->mgmtrate; 1114184610Salfred 1115188417Sthompsa flags = 0; 1116188417Sthompsa if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1117188417Sthompsa flags |= RAL_TX_ACK; 1118188417Sthompsa 1119190532Ssam dur = ieee80211_ack_duration(ic->ic_rt, tp->mgmtrate, 1120188417Sthompsa ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1121188417Sthompsa *(uint16_t *)wh->i_dur = htole16(dur); 1122188417Sthompsa 1123188417Sthompsa /* tell hardware to add timestamp for probe responses */ 1124188417Sthompsa if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1125188417Sthompsa IEEE80211_FC0_TYPE_MGT && 1126188417Sthompsa (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1127188417Sthompsa IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1128188417Sthompsa flags |= RAL_TX_TIMESTAMP; 1129184610Salfred } 1130184610Salfred 1131188417Sthompsa ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, tp->mgmtrate); 1132184610Salfred 1133188417Sthompsa DPRINTFN(10, "sending mgt frame len=%u rate=%u\n", 1134188417Sthompsa m0->m_pkthdr.len, tp->mgmtrate); 1135184610Salfred 1136188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1137194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1138184610Salfred 1139188417Sthompsa return 0; 1140184610Salfred} 1141184610Salfred 1142188417Sthompsastatic int 1143188417Sthompsaural_sendprot(struct ural_softc *sc, 1144188417Sthompsa const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 1145184610Salfred{ 1146188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 1147188417Sthompsa const struct ieee80211_frame *wh; 1148188417Sthompsa struct ural_tx_data *data; 1149188417Sthompsa struct mbuf *mprot; 1150188417Sthompsa int protrate, ackrate, pktlen, flags, isshort; 1151188417Sthompsa uint16_t dur; 1152184610Salfred 1153188417Sthompsa KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY, 1154188417Sthompsa ("protection %d", prot)); 1155184610Salfred 1156188417Sthompsa wh = mtod(m, const struct ieee80211_frame *); 1157188417Sthompsa pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN; 1158184610Salfred 1159190532Ssam protrate = ieee80211_ctl_rate(ic->ic_rt, rate); 1160190532Ssam ackrate = ieee80211_ack_rate(ic->ic_rt, rate); 1161188417Sthompsa 1162188417Sthompsa isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0; 1163209189Sjkim dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort) 1164190532Ssam + ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1165188417Sthompsa flags = RAL_TX_RETRY(7); 1166188417Sthompsa if (prot == IEEE80211_PROT_RTSCTS) { 1167188417Sthompsa /* NB: CTS is the same size as an ACK */ 1168190532Ssam dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1169188417Sthompsa flags |= RAL_TX_ACK; 1170188417Sthompsa mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur); 1171188417Sthompsa } else { 1172188417Sthompsa mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur); 1173188417Sthompsa } 1174188417Sthompsa if (mprot == NULL) { 1175188417Sthompsa /* XXX stat + msg */ 1176188417Sthompsa return ENOBUFS; 1177188417Sthompsa } 1178188417Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1179188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1180188417Sthompsa sc->tx_nfree--; 1181188417Sthompsa 1182188417Sthompsa data->m = mprot; 1183188417Sthompsa data->ni = ieee80211_ref_node(ni); 1184188417Sthompsa data->rate = protrate; 1185188417Sthompsa ural_setup_tx_desc(sc, &data->desc, flags, mprot->m_pkthdr.len, protrate); 1186188417Sthompsa 1187188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1188194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1189188417Sthompsa 1190188417Sthompsa return 0; 1191188417Sthompsa} 1192188417Sthompsa 1193188417Sthompsastatic int 1194188417Sthompsaural_tx_raw(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni, 1195188417Sthompsa const struct ieee80211_bpf_params *params) 1196188417Sthompsa{ 1197193073Ssam struct ieee80211com *ic = ni->ni_ic; 1198188417Sthompsa struct ural_tx_data *data; 1199188417Sthompsa uint32_t flags; 1200188417Sthompsa int error; 1201188417Sthompsa int rate; 1202188417Sthompsa 1203188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 1204188417Sthompsa KASSERT(params != NULL, ("no raw xmit params")); 1205188417Sthompsa 1206193073Ssam rate = params->ibp_rate0; 1207193073Ssam if (!ieee80211_isratevalid(ic->ic_rt, rate)) { 1208188417Sthompsa m_freem(m0); 1209188417Sthompsa return EINVAL; 1210188417Sthompsa } 1211188417Sthompsa flags = 0; 1212188417Sthompsa if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) 1213188417Sthompsa flags |= RAL_TX_ACK; 1214188417Sthompsa if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) { 1215188417Sthompsa error = ural_sendprot(sc, m0, ni, 1216188417Sthompsa params->ibp_flags & IEEE80211_BPF_RTS ? 1217188417Sthompsa IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY, 1218188417Sthompsa rate); 1219188969Sthompsa if (error || sc->tx_nfree == 0) { 1220188417Sthompsa m_freem(m0); 1221188969Sthompsa return ENOBUFS; 1222184610Salfred } 1223188417Sthompsa flags |= RAL_TX_IFS_SIFS; 1224188417Sthompsa } 1225184610Salfred 1226188969Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1227188969Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1228188969Sthompsa sc->tx_nfree--; 1229188969Sthompsa 1230188417Sthompsa data->m = m0; 1231188417Sthompsa data->ni = ni; 1232188417Sthompsa data->rate = rate; 1233184610Salfred 1234188417Sthompsa /* XXX need to setup descriptor ourself */ 1235188417Sthompsa ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate); 1236184610Salfred 1237188417Sthompsa DPRINTFN(10, "sending raw frame len=%u rate=%u\n", 1238188417Sthompsa m0->m_pkthdr.len, rate); 1239184610Salfred 1240188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1241194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1242184610Salfred 1243188417Sthompsa return 0; 1244188417Sthompsa} 1245184610Salfred 1246188417Sthompsastatic int 1247188417Sthompsaural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1248188417Sthompsa{ 1249188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 1250188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 1251188417Sthompsa struct ural_tx_data *data; 1252188417Sthompsa struct ieee80211_frame *wh; 1253188417Sthompsa const struct ieee80211_txparam *tp; 1254188417Sthompsa struct ieee80211_key *k; 1255188417Sthompsa uint32_t flags = 0; 1256188417Sthompsa uint16_t dur; 1257188417Sthompsa int error, rate; 1258184610Salfred 1259188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 1260184610Salfred 1261188417Sthompsa wh = mtod(m0, struct ieee80211_frame *); 1262184610Salfred 1263188417Sthompsa tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1264188417Sthompsa if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1265188417Sthompsa rate = tp->mcastrate; 1266188417Sthompsa else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1267188417Sthompsa rate = tp->ucastrate; 1268188417Sthompsa else 1269188417Sthompsa rate = ni->ni_txrate; 1270188417Sthompsa 1271188417Sthompsa if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1272188417Sthompsa k = ieee80211_crypto_encap(ni, m0); 1273188417Sthompsa if (k == NULL) { 1274188417Sthompsa m_freem(m0); 1275188417Sthompsa return ENOBUFS; 1276184610Salfred } 1277188417Sthompsa /* packet header may have moved, reset our local pointer */ 1278188417Sthompsa wh = mtod(m0, struct ieee80211_frame *); 1279188417Sthompsa } 1280184610Salfred 1281188417Sthompsa if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1282188417Sthompsa int prot = IEEE80211_PROT_NONE; 1283188417Sthompsa if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 1284188417Sthompsa prot = IEEE80211_PROT_RTSCTS; 1285188417Sthompsa else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1286190532Ssam ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) 1287188417Sthompsa prot = ic->ic_protmode; 1288188417Sthompsa if (prot != IEEE80211_PROT_NONE) { 1289188417Sthompsa error = ural_sendprot(sc, m0, ni, prot, rate); 1290188969Sthompsa if (error || sc->tx_nfree == 0) { 1291188417Sthompsa m_freem(m0); 1292188969Sthompsa return ENOBUFS; 1293188417Sthompsa } 1294188417Sthompsa flags |= RAL_TX_IFS_SIFS; 1295184610Salfred } 1296184610Salfred } 1297184610Salfred 1298188417Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1299188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1300188417Sthompsa sc->tx_nfree--; 1301184610Salfred 1302188417Sthompsa data->m = m0; 1303188417Sthompsa data->ni = ni; 1304188417Sthompsa data->rate = rate; 1305188417Sthompsa 1306188417Sthompsa if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1307188417Sthompsa flags |= RAL_TX_ACK; 1308188417Sthompsa flags |= RAL_TX_RETRY(7); 1309188417Sthompsa 1310190532Ssam dur = ieee80211_ack_duration(ic->ic_rt, rate, 1311188417Sthompsa ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1312188417Sthompsa *(uint16_t *)wh->i_dur = htole16(dur); 1313184610Salfred } 1314184610Salfred 1315188417Sthompsa ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate); 1316184610Salfred 1317188417Sthompsa DPRINTFN(10, "sending data frame len=%u rate=%u\n", 1318188417Sthompsa m0->m_pkthdr.len, rate); 1319184610Salfred 1320188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1321194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1322188417Sthompsa 1323188417Sthompsa return 0; 1324184610Salfred} 1325184610Salfred 1326184610Salfredstatic void 1327188417Sthompsaural_start(struct ifnet *ifp) 1328184610Salfred{ 1329188417Sthompsa struct ural_softc *sc = ifp->if_softc; 1330188417Sthompsa struct ieee80211_node *ni; 1331188417Sthompsa struct mbuf *m; 1332184610Salfred 1333188417Sthompsa RAL_LOCK(sc); 1334188417Sthompsa if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1335188417Sthompsa RAL_UNLOCK(sc); 1336188417Sthompsa return; 1337188417Sthompsa } 1338188417Sthompsa for (;;) { 1339188417Sthompsa IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1340188417Sthompsa if (m == NULL) 1341188417Sthompsa break; 1342188969Sthompsa if (sc->tx_nfree < RAL_TX_MINFREE) { 1343188417Sthompsa IFQ_DRV_PREPEND(&ifp->if_snd, m); 1344188417Sthompsa ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1345188417Sthompsa break; 1346188417Sthompsa } 1347188417Sthompsa ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1348188417Sthompsa if (ural_tx_data(sc, m, ni) != 0) { 1349188417Sthompsa ieee80211_free_node(ni); 1350188417Sthompsa ifp->if_oerrors++; 1351188417Sthompsa break; 1352188417Sthompsa } 1353188417Sthompsa } 1354188417Sthompsa RAL_UNLOCK(sc); 1355184610Salfred} 1356184610Salfred 1357184610Salfredstatic int 1358188417Sthompsaural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1359184610Salfred{ 1360184610Salfred struct ural_softc *sc = ifp->if_softc; 1361184610Salfred struct ieee80211com *ic = ifp->if_l2com; 1362188417Sthompsa struct ifreq *ifr = (struct ifreq *) data; 1363188417Sthompsa int error = 0, startall = 0; 1364184610Salfred 1365184610Salfred switch (cmd) { 1366184610Salfred case SIOCSIFFLAGS: 1367188417Sthompsa RAL_LOCK(sc); 1368184610Salfred if (ifp->if_flags & IFF_UP) { 1369188417Sthompsa if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1370191746Sthompsa ural_init_locked(sc); 1371188417Sthompsa startall = 1; 1372188417Sthompsa } else 1373191746Sthompsa ural_setpromisc(sc); 1374184610Salfred } else { 1375191746Sthompsa if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1376191746Sthompsa ural_stop(sc); 1377184610Salfred } 1378188417Sthompsa RAL_UNLOCK(sc); 1379188417Sthompsa if (startall) 1380188417Sthompsa ieee80211_start_all(ic); 1381184610Salfred break; 1382184610Salfred case SIOCGIFMEDIA: 1383184610Salfred case SIOCSIFMEDIA: 1384188417Sthompsa error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1385184610Salfred break; 1386184610Salfred default: 1387184610Salfred error = ether_ioctl(ifp, cmd, data); 1388188417Sthompsa break; 1389184610Salfred } 1390188417Sthompsa return error; 1391184610Salfred} 1392184610Salfred 1393184610Salfredstatic void 1394188417Sthompsaural_set_testmode(struct ural_softc *sc) 1395184610Salfred{ 1396192984Sthompsa struct usb_device_request req; 1397193045Sthompsa usb_error_t error; 1398184610Salfred 1399188417Sthompsa req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1400188417Sthompsa req.bRequest = RAL_VENDOR_REQUEST; 1401188417Sthompsa USETW(req.wValue, 4); 1402188417Sthompsa USETW(req.wIndex, 1); 1403188417Sthompsa USETW(req.wLength, 0); 1404188417Sthompsa 1405188419Sthompsa error = ural_do_request(sc, &req, NULL); 1406188417Sthompsa if (error != 0) { 1407188417Sthompsa device_printf(sc->sc_dev, "could not set test mode: %s\n", 1408194228Sthompsa usbd_errstr(error)); 1409188417Sthompsa } 1410184610Salfred} 1411184610Salfred 1412184610Salfredstatic void 1413188417Sthompsaural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1414184610Salfred{ 1415192984Sthompsa struct usb_device_request req; 1416193045Sthompsa usb_error_t error; 1417184610Salfred 1418188417Sthompsa req.bmRequestType = UT_READ_VENDOR_DEVICE; 1419188417Sthompsa req.bRequest = RAL_READ_EEPROM; 1420188417Sthompsa USETW(req.wValue, 0); 1421188417Sthompsa USETW(req.wIndex, addr); 1422188417Sthompsa USETW(req.wLength, len); 1423184610Salfred 1424188419Sthompsa error = ural_do_request(sc, &req, buf); 1425188417Sthompsa if (error != 0) { 1426188417Sthompsa device_printf(sc->sc_dev, "could not read EEPROM: %s\n", 1427194228Sthompsa usbd_errstr(error)); 1428184610Salfred } 1429188417Sthompsa} 1430184610Salfred 1431188417Sthompsastatic uint16_t 1432188417Sthompsaural_read(struct ural_softc *sc, uint16_t reg) 1433188417Sthompsa{ 1434192984Sthompsa struct usb_device_request req; 1435193045Sthompsa usb_error_t error; 1436188417Sthompsa uint16_t val; 1437184610Salfred 1438188417Sthompsa req.bmRequestType = UT_READ_VENDOR_DEVICE; 1439188417Sthompsa req.bRequest = RAL_READ_MAC; 1440188417Sthompsa USETW(req.wValue, 0); 1441188417Sthompsa USETW(req.wIndex, reg); 1442188417Sthompsa USETW(req.wLength, sizeof (uint16_t)); 1443188417Sthompsa 1444188419Sthompsa error = ural_do_request(sc, &req, &val); 1445188417Sthompsa if (error != 0) { 1446188417Sthompsa device_printf(sc->sc_dev, "could not read MAC register: %s\n", 1447194228Sthompsa usbd_errstr(error)); 1448188417Sthompsa return 0; 1449184610Salfred } 1450184610Salfred 1451188417Sthompsa return le16toh(val); 1452184610Salfred} 1453184610Salfred 1454188417Sthompsastatic void 1455188417Sthompsaural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1456184610Salfred{ 1457192984Sthompsa struct usb_device_request req; 1458193045Sthompsa usb_error_t error; 1459184610Salfred 1460188417Sthompsa req.bmRequestType = UT_READ_VENDOR_DEVICE; 1461188417Sthompsa req.bRequest = RAL_READ_MULTI_MAC; 1462188417Sthompsa USETW(req.wValue, 0); 1463188417Sthompsa USETW(req.wIndex, reg); 1464188417Sthompsa USETW(req.wLength, len); 1465184610Salfred 1466188419Sthompsa error = ural_do_request(sc, &req, buf); 1467188417Sthompsa if (error != 0) { 1468188417Sthompsa device_printf(sc->sc_dev, "could not read MAC register: %s\n", 1469194228Sthompsa usbd_errstr(error)); 1470184610Salfred } 1471188417Sthompsa} 1472188417Sthompsa 1473188417Sthompsastatic void 1474188417Sthompsaural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1475188417Sthompsa{ 1476192984Sthompsa struct usb_device_request req; 1477193045Sthompsa usb_error_t error; 1478188417Sthompsa 1479188417Sthompsa req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1480188417Sthompsa req.bRequest = RAL_WRITE_MAC; 1481188417Sthompsa USETW(req.wValue, val); 1482188417Sthompsa USETW(req.wIndex, reg); 1483188417Sthompsa USETW(req.wLength, 0); 1484188417Sthompsa 1485188419Sthompsa error = ural_do_request(sc, &req, NULL); 1486188417Sthompsa if (error != 0) { 1487188417Sthompsa device_printf(sc->sc_dev, "could not write MAC register: %s\n", 1488194228Sthompsa usbd_errstr(error)); 1489184610Salfred } 1490188417Sthompsa} 1491184610Salfred 1492188417Sthompsastatic void 1493188417Sthompsaural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1494188417Sthompsa{ 1495192984Sthompsa struct usb_device_request req; 1496193045Sthompsa usb_error_t error; 1497184610Salfred 1498188417Sthompsa req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1499188417Sthompsa req.bRequest = RAL_WRITE_MULTI_MAC; 1500188417Sthompsa USETW(req.wValue, 0); 1501188417Sthompsa USETW(req.wIndex, reg); 1502188417Sthompsa USETW(req.wLength, len); 1503184610Salfred 1504188419Sthompsa error = ural_do_request(sc, &req, buf); 1505188417Sthompsa if (error != 0) { 1506188417Sthompsa device_printf(sc->sc_dev, "could not write MAC register: %s\n", 1507194228Sthompsa usbd_errstr(error)); 1508188417Sthompsa } 1509184610Salfred} 1510184610Salfred 1511184610Salfredstatic void 1512188417Sthompsaural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1513184610Salfred{ 1514188417Sthompsa uint16_t tmp; 1515188417Sthompsa int ntries; 1516184610Salfred 1517188619Sthompsa for (ntries = 0; ntries < 100; ntries++) { 1518188417Sthompsa if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1519188417Sthompsa break; 1520188619Sthompsa if (ural_pause(sc, hz / 100)) 1521188619Sthompsa break; 1522188417Sthompsa } 1523188619Sthompsa if (ntries == 100) { 1524188417Sthompsa device_printf(sc->sc_dev, "could not write to BBP\n"); 1525188417Sthompsa return; 1526188417Sthompsa } 1527184610Salfred 1528188417Sthompsa tmp = reg << 8 | val; 1529188417Sthompsa ural_write(sc, RAL_PHY_CSR7, tmp); 1530188417Sthompsa} 1531184610Salfred 1532188417Sthompsastatic uint8_t 1533188417Sthompsaural_bbp_read(struct ural_softc *sc, uint8_t reg) 1534188417Sthompsa{ 1535188417Sthompsa uint16_t val; 1536188417Sthompsa int ntries; 1537184610Salfred 1538188417Sthompsa val = RAL_BBP_WRITE | reg << 8; 1539188417Sthompsa ural_write(sc, RAL_PHY_CSR7, val); 1540188417Sthompsa 1541188619Sthompsa for (ntries = 0; ntries < 100; ntries++) { 1542188417Sthompsa if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1543188417Sthompsa break; 1544188619Sthompsa if (ural_pause(sc, hz / 100)) 1545188619Sthompsa break; 1546188417Sthompsa } 1547188619Sthompsa if (ntries == 100) { 1548188417Sthompsa device_printf(sc->sc_dev, "could not read BBP\n"); 1549188417Sthompsa return 0; 1550188417Sthompsa } 1551188417Sthompsa 1552188417Sthompsa return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1553184610Salfred} 1554184610Salfred 1555184610Salfredstatic void 1556188417Sthompsaural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1557184610Salfred{ 1558188417Sthompsa uint32_t tmp; 1559188417Sthompsa int ntries; 1560188417Sthompsa 1561188619Sthompsa for (ntries = 0; ntries < 100; ntries++) { 1562188417Sthompsa if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1563188417Sthompsa break; 1564188619Sthompsa if (ural_pause(sc, hz / 100)) 1565188619Sthompsa break; 1566188417Sthompsa } 1567188619Sthompsa if (ntries == 100) { 1568188417Sthompsa device_printf(sc->sc_dev, "could not write to RF\n"); 1569188417Sthompsa return; 1570188417Sthompsa } 1571188417Sthompsa 1572188417Sthompsa tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1573188417Sthompsa ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1574188417Sthompsa ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1575188417Sthompsa 1576188417Sthompsa /* remember last written value in sc */ 1577188417Sthompsa sc->rf_regs[reg] = val; 1578188417Sthompsa 1579188417Sthompsa DPRINTFN(15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff); 1580184610Salfred} 1581184610Salfred 1582184610Salfredstatic void 1583188417Sthompsaural_scan_start(struct ieee80211com *ic) 1584184610Salfred{ 1585191746Sthompsa struct ifnet *ifp = ic->ic_ifp; 1586191746Sthompsa struct ural_softc *sc = ifp->if_softc; 1587188417Sthompsa 1588188417Sthompsa RAL_LOCK(sc); 1589191746Sthompsa ural_write(sc, RAL_TXRX_CSR19, 0); 1590191746Sthompsa ural_set_bssid(sc, ifp->if_broadcastaddr); 1591188417Sthompsa RAL_UNLOCK(sc); 1592184610Salfred} 1593184610Salfred 1594184610Salfredstatic void 1595188417Sthompsaural_scan_end(struct ieee80211com *ic) 1596184610Salfred{ 1597188417Sthompsa struct ural_softc *sc = ic->ic_ifp->if_softc; 1598188417Sthompsa 1599188417Sthompsa RAL_LOCK(sc); 1600191746Sthompsa ural_enable_tsf_sync(sc); 1601191746Sthompsa ural_set_bssid(sc, sc->sc_bssid); 1602188417Sthompsa RAL_UNLOCK(sc); 1603188417Sthompsa 1604184610Salfred} 1605184610Salfred 1606184610Salfredstatic void 1607188417Sthompsaural_set_channel(struct ieee80211com *ic) 1608184610Salfred{ 1609188417Sthompsa struct ural_softc *sc = ic->ic_ifp->if_softc; 1610188417Sthompsa 1611188417Sthompsa RAL_LOCK(sc); 1612191746Sthompsa ural_set_chan(sc, ic->ic_curchan); 1613188417Sthompsa RAL_UNLOCK(sc); 1614184610Salfred} 1615184610Salfred 1616184610Salfredstatic void 1617188417Sthompsaural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1618184610Salfred{ 1619188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 1620188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 1621188417Sthompsa uint8_t power, tmp; 1622188619Sthompsa int i, chan; 1623184610Salfred 1624188417Sthompsa chan = ieee80211_chan2ieee(ic, c); 1625188417Sthompsa if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1626188417Sthompsa return; 1627184610Salfred 1628188417Sthompsa if (IEEE80211_IS_CHAN_2GHZ(c)) 1629188417Sthompsa power = min(sc->txpow[chan - 1], 31); 1630184610Salfred else 1631184610Salfred power = 31; 1632184610Salfred 1633184610Salfred /* adjust txpower using ifconfig settings */ 1634188417Sthompsa power -= (100 - ic->ic_txpowlimit) / 8; 1635184610Salfred 1636188417Sthompsa DPRINTFN(2, "setting channel to %u, txpower to %u\n", chan, power); 1637184610Salfred 1638188417Sthompsa switch (sc->rf_rev) { 1639184610Salfred case RAL_RF_2522: 1640188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x00814); 1641188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1642188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1643184610Salfred break; 1644184610Salfred 1645184610Salfred case RAL_RF_2523: 1646188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08804); 1647188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1648188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1649188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1650184610Salfred break; 1651184610Salfred 1652184610Salfred case RAL_RF_2524: 1653188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x0c808); 1654188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1655188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1656188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1657184610Salfred break; 1658184610Salfred 1659184610Salfred case RAL_RF_2525: 1660188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08808); 1661188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1662188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1663188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1664184610Salfred 1665188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08808); 1666188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1667188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1668188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1669184610Salfred break; 1670184610Salfred 1671184610Salfred case RAL_RF_2525E: 1672188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08808); 1673188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1674188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1675188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1676184610Salfred break; 1677184610Salfred 1678184610Salfred case RAL_RF_2526: 1679188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1680188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1681188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08804); 1682184610Salfred 1683188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1684188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1685188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1686184610Salfred break; 1687184610Salfred 1688188417Sthompsa /* dual-band RF */ 1689184610Salfred case RAL_RF_5222: 1690188417Sthompsa for (i = 0; ural_rf5222[i].chan != chan; i++); 1691188417Sthompsa 1692188417Sthompsa ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1693188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1694188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1695188417Sthompsa ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1696184610Salfred break; 1697184610Salfred } 1698184610Salfred 1699188417Sthompsa if (ic->ic_opmode != IEEE80211_M_MONITOR && 1700188417Sthompsa (ic->ic_flags & IEEE80211_F_SCAN) == 0) { 1701184610Salfred /* set Japan filter bit for channel 14 */ 1702188417Sthompsa tmp = ural_bbp_read(sc, 70); 1703184610Salfred 1704188417Sthompsa tmp &= ~RAL_JAPAN_FILTER; 1705188417Sthompsa if (chan == 14) 1706184610Salfred tmp |= RAL_JAPAN_FILTER; 1707184610Salfred 1708188417Sthompsa ural_bbp_write(sc, 70, tmp); 1709184610Salfred 1710184610Salfred /* clear CRC errors */ 1711188417Sthompsa ural_read(sc, RAL_STA_CSR0); 1712184610Salfred 1713188619Sthompsa ural_pause(sc, hz / 100); 1714188417Sthompsa ural_disable_rf_tune(sc); 1715184610Salfred } 1716188417Sthompsa 1717188417Sthompsa /* XXX doesn't belong here */ 1718184610Salfred /* update basic rate set */ 1719188417Sthompsa ural_set_basicrates(sc, c); 1720189123Sthompsa 1721189123Sthompsa /* give the hardware some time to do the switchover */ 1722189123Sthompsa ural_pause(sc, hz / 100); 1723184610Salfred} 1724184610Salfred 1725188417Sthompsa/* 1726188417Sthompsa * Disable RF auto-tuning. 1727188417Sthompsa */ 1728184610Salfredstatic void 1729188417Sthompsaural_disable_rf_tune(struct ural_softc *sc) 1730184610Salfred{ 1731188417Sthompsa uint32_t tmp; 1732184610Salfred 1733188417Sthompsa if (sc->rf_rev != RAL_RF_2523) { 1734188417Sthompsa tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1735188417Sthompsa ural_rf_write(sc, RAL_RF1, tmp); 1736184610Salfred } 1737184610Salfred 1738188417Sthompsa tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1739188417Sthompsa ural_rf_write(sc, RAL_RF3, tmp); 1740184610Salfred 1741188417Sthompsa DPRINTFN(2, "disabling RF autotune\n"); 1742184610Salfred} 1743184610Salfred 1744188417Sthompsa/* 1745188417Sthompsa * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1746188417Sthompsa * synchronization. 1747188417Sthompsa */ 1748184610Salfredstatic void 1749188417Sthompsaural_enable_tsf_sync(struct ural_softc *sc) 1750184610Salfred{ 1751188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 1752188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 1753188417Sthompsa struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1754188417Sthompsa uint16_t logcwmin, preload, tmp; 1755184610Salfred 1756184610Salfred /* first, disable TSF synchronization */ 1757188417Sthompsa ural_write(sc, RAL_TXRX_CSR19, 0); 1758184610Salfred 1759188417Sthompsa tmp = (16 * vap->iv_bss->ni_intval) << 4; 1760188417Sthompsa ural_write(sc, RAL_TXRX_CSR18, tmp); 1761184610Salfred 1762188417Sthompsa logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1763188417Sthompsa preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1764188417Sthompsa tmp = logcwmin << 12 | preload; 1765188417Sthompsa ural_write(sc, RAL_TXRX_CSR20, tmp); 1766184610Salfred 1767184610Salfred /* finally, enable TSF synchronization */ 1768184610Salfred tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1769188417Sthompsa if (ic->ic_opmode == IEEE80211_M_STA) 1770184610Salfred tmp |= RAL_ENABLE_TSF_SYNC(1); 1771184610Salfred else 1772184610Salfred tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1773188417Sthompsa ural_write(sc, RAL_TXRX_CSR19, tmp); 1774184610Salfred 1775184610Salfred DPRINTF("enabling TSF synchronization\n"); 1776184610Salfred} 1777184610Salfred 1778192468Ssamstatic void 1779192468Ssamural_enable_tsf(struct ural_softc *sc) 1780192468Ssam{ 1781192468Ssam /* first, disable TSF synchronization */ 1782192468Ssam ural_write(sc, RAL_TXRX_CSR19, 0); 1783192468Ssam ural_write(sc, RAL_TXRX_CSR19, RAL_ENABLE_TSF | RAL_ENABLE_TSF_SYNC(2)); 1784192468Ssam} 1785192468Ssam 1786188417Sthompsa#define RAL_RXTX_TURNAROUND 5 /* us */ 1787184610Salfredstatic void 1788188417Sthompsaural_update_slot(struct ifnet *ifp) 1789184610Salfred{ 1790188417Sthompsa struct ural_softc *sc = ifp->if_softc; 1791188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 1792188417Sthompsa uint16_t slottime, sifs, eifs; 1793184610Salfred 1794188417Sthompsa slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1795184610Salfred 1796184610Salfred /* 1797184610Salfred * These settings may sound a bit inconsistent but this is what the 1798184610Salfred * reference driver does. 1799184610Salfred */ 1800188417Sthompsa if (ic->ic_curmode == IEEE80211_MODE_11B) { 1801184610Salfred sifs = 16 - RAL_RXTX_TURNAROUND; 1802184610Salfred eifs = 364; 1803184610Salfred } else { 1804184610Salfred sifs = 10 - RAL_RXTX_TURNAROUND; 1805184610Salfred eifs = 64; 1806184610Salfred } 1807184610Salfred 1808188417Sthompsa ural_write(sc, RAL_MAC_CSR10, slottime); 1809188417Sthompsa ural_write(sc, RAL_MAC_CSR11, sifs); 1810188417Sthompsa ural_write(sc, RAL_MAC_CSR12, eifs); 1811184610Salfred} 1812184610Salfred 1813184610Salfredstatic void 1814188417Sthompsaural_set_txpreamble(struct ural_softc *sc) 1815184610Salfred{ 1816188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 1817188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 1818184610Salfred uint16_t tmp; 1819184610Salfred 1820188417Sthompsa tmp = ural_read(sc, RAL_TXRX_CSR10); 1821184610Salfred 1822188417Sthompsa tmp &= ~RAL_SHORT_PREAMBLE; 1823188417Sthompsa if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1824184610Salfred tmp |= RAL_SHORT_PREAMBLE; 1825184610Salfred 1826188417Sthompsa ural_write(sc, RAL_TXRX_CSR10, tmp); 1827184610Salfred} 1828184610Salfred 1829184610Salfredstatic void 1830188417Sthompsaural_set_basicrates(struct ural_softc *sc, const struct ieee80211_channel *c) 1831184610Salfred{ 1832188417Sthompsa /* XXX wrong, take from rate set */ 1833188417Sthompsa /* update basic rate set */ 1834188417Sthompsa if (IEEE80211_IS_CHAN_5GHZ(c)) { 1835188417Sthompsa /* 11a basic rates: 6, 12, 24Mbps */ 1836188417Sthompsa ural_write(sc, RAL_TXRX_CSR11, 0x150); 1837188417Sthompsa } else if (IEEE80211_IS_CHAN_ANYG(c)) { 1838188417Sthompsa /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1839188417Sthompsa ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1840188417Sthompsa } else { 1841188417Sthompsa /* 11b basic rates: 1, 2Mbps */ 1842188417Sthompsa ural_write(sc, RAL_TXRX_CSR11, 0x3); 1843188417Sthompsa } 1844184610Salfred} 1845184610Salfred 1846184610Salfredstatic void 1847188417Sthompsaural_set_bssid(struct ural_softc *sc, const uint8_t *bssid) 1848184610Salfred{ 1849188417Sthompsa uint16_t tmp; 1850184610Salfred 1851188417Sthompsa tmp = bssid[0] | bssid[1] << 8; 1852188417Sthompsa ural_write(sc, RAL_MAC_CSR5, tmp); 1853188417Sthompsa 1854188417Sthompsa tmp = bssid[2] | bssid[3] << 8; 1855188417Sthompsa ural_write(sc, RAL_MAC_CSR6, tmp); 1856188417Sthompsa 1857188417Sthompsa tmp = bssid[4] | bssid[5] << 8; 1858188417Sthompsa ural_write(sc, RAL_MAC_CSR7, tmp); 1859188417Sthompsa 1860188417Sthompsa DPRINTF("setting BSSID to %6D\n", bssid, ":"); 1861184610Salfred} 1862184610Salfred 1863184610Salfredstatic void 1864188417Sthompsaural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1865184610Salfred{ 1866184610Salfred uint16_t tmp; 1867184610Salfred 1868188417Sthompsa tmp = addr[0] | addr[1] << 8; 1869188417Sthompsa ural_write(sc, RAL_MAC_CSR2, tmp); 1870184610Salfred 1871188417Sthompsa tmp = addr[2] | addr[3] << 8; 1872188417Sthompsa ural_write(sc, RAL_MAC_CSR3, tmp); 1873184610Salfred 1874188417Sthompsa tmp = addr[4] | addr[5] << 8; 1875188417Sthompsa ural_write(sc, RAL_MAC_CSR4, tmp); 1876184610Salfred 1877188417Sthompsa DPRINTF("setting MAC address to %6D\n", addr, ":"); 1878184610Salfred} 1879184610Salfred 1880184610Salfredstatic void 1881191746Sthompsaural_setpromisc(struct ural_softc *sc) 1882184610Salfred{ 1883188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 1884188417Sthompsa uint32_t tmp; 1885184610Salfred 1886188417Sthompsa tmp = ural_read(sc, RAL_TXRX_CSR2); 1887184610Salfred 1888188417Sthompsa tmp &= ~RAL_DROP_NOT_TO_ME; 1889188417Sthompsa if (!(ifp->if_flags & IFF_PROMISC)) 1890188417Sthompsa tmp |= RAL_DROP_NOT_TO_ME; 1891184610Salfred 1892188417Sthompsa ural_write(sc, RAL_TXRX_CSR2, tmp); 1893184610Salfred 1894188417Sthompsa DPRINTF("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1895188417Sthompsa "entering" : "leaving"); 1896184610Salfred} 1897184610Salfred 1898189123Sthompsastatic void 1899189123Sthompsaural_update_promisc(struct ifnet *ifp) 1900189123Sthompsa{ 1901189123Sthompsa struct ural_softc *sc = ifp->if_softc; 1902189123Sthompsa 1903189123Sthompsa if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1904189123Sthompsa return; 1905189123Sthompsa 1906189123Sthompsa RAL_LOCK(sc); 1907191746Sthompsa ural_setpromisc(sc); 1908189123Sthompsa RAL_UNLOCK(sc); 1909189123Sthompsa} 1910189123Sthompsa 1911188417Sthompsastatic const char * 1912188417Sthompsaural_get_rf(int rev) 1913184610Salfred{ 1914188417Sthompsa switch (rev) { 1915188417Sthompsa case RAL_RF_2522: return "RT2522"; 1916188417Sthompsa case RAL_RF_2523: return "RT2523"; 1917188417Sthompsa case RAL_RF_2524: return "RT2524"; 1918188417Sthompsa case RAL_RF_2525: return "RT2525"; 1919188417Sthompsa case RAL_RF_2525E: return "RT2525e"; 1920188417Sthompsa case RAL_RF_2526: return "RT2526"; 1921188417Sthompsa case RAL_RF_5222: return "RT5222"; 1922188417Sthompsa default: return "unknown"; 1923184610Salfred } 1924184610Salfred} 1925184610Salfred 1926184610Salfredstatic void 1927188417Sthompsaural_read_eeprom(struct ural_softc *sc) 1928184610Salfred{ 1929184610Salfred uint16_t val; 1930184610Salfred 1931188417Sthompsa ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1932184610Salfred val = le16toh(val); 1933188417Sthompsa sc->rf_rev = (val >> 11) & 0x7; 1934188417Sthompsa sc->hw_radio = (val >> 10) & 0x1; 1935188417Sthompsa sc->led_mode = (val >> 6) & 0x7; 1936188417Sthompsa sc->rx_ant = (val >> 4) & 0x3; 1937188417Sthompsa sc->tx_ant = (val >> 2) & 0x3; 1938188417Sthompsa sc->nb_ant = val & 0x3; 1939184610Salfred 1940184610Salfred /* read MAC address */ 1941188419Sthompsa ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, sc->sc_bssid, 6); 1942184610Salfred 1943184610Salfred /* read default values for BBP registers */ 1944188417Sthompsa ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 1945184610Salfred 1946184610Salfred /* read Tx power for all b/g channels */ 1947188417Sthompsa ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 1948184610Salfred} 1949184610Salfred 1950188417Sthompsastatic int 1951188417Sthompsaural_bbp_init(struct ural_softc *sc) 1952184610Salfred{ 1953188417Sthompsa#define N(a) (sizeof (a) / sizeof ((a)[0])) 1954188417Sthompsa int i, ntries; 1955184610Salfred 1956188417Sthompsa /* wait for BBP to be ready */ 1957188417Sthompsa for (ntries = 0; ntries < 100; ntries++) { 1958188417Sthompsa if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 1959188417Sthompsa break; 1960188619Sthompsa if (ural_pause(sc, hz / 100)) 1961188619Sthompsa break; 1962184610Salfred } 1963188417Sthompsa if (ntries == 100) { 1964188417Sthompsa device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 1965188417Sthompsa return EIO; 1966188417Sthompsa } 1967184610Salfred 1968184610Salfred /* initialize BBP registers to default values */ 1969188417Sthompsa for (i = 0; i < N(ural_def_bbp); i++) 1970188417Sthompsa ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 1971184610Salfred 1972184610Salfred#if 0 1973184610Salfred /* initialize BBP registers to values stored in EEPROM */ 1974184610Salfred for (i = 0; i < 16; i++) { 1975188417Sthompsa if (sc->bbp_prom[i].reg == 0xff) 1976184610Salfred continue; 1977188417Sthompsa ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 1978184610Salfred } 1979184610Salfred#endif 1980188417Sthompsa 1981188417Sthompsa return 0; 1982188417Sthompsa#undef N 1983184610Salfred} 1984184610Salfred 1985184610Salfredstatic void 1986188417Sthompsaural_set_txantenna(struct ural_softc *sc, int antenna) 1987184610Salfred{ 1988188417Sthompsa uint16_t tmp; 1989188417Sthompsa uint8_t tx; 1990184610Salfred 1991188417Sthompsa tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 1992188417Sthompsa if (antenna == 1) 1993188417Sthompsa tx |= RAL_BBP_ANTA; 1994188417Sthompsa else if (antenna == 2) 1995188417Sthompsa tx |= RAL_BBP_ANTB; 1996188417Sthompsa else 1997188417Sthompsa tx |= RAL_BBP_DIVERSITY; 1998184610Salfred 1999188417Sthompsa /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2000188417Sthompsa if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2001188417Sthompsa sc->rf_rev == RAL_RF_5222) 2002188417Sthompsa tx |= RAL_BBP_FLIPIQ; 2003184610Salfred 2004188417Sthompsa ural_bbp_write(sc, RAL_BBP_TX, tx); 2005184610Salfred 2006188417Sthompsa /* update values in PHY_CSR5 and PHY_CSR6 */ 2007188417Sthompsa tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2008188417Sthompsa ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2009184610Salfred 2010188417Sthompsa tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2011188417Sthompsa ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2012184610Salfred} 2013184610Salfred 2014184610Salfredstatic void 2015188417Sthompsaural_set_rxantenna(struct ural_softc *sc, int antenna) 2016184610Salfred{ 2017188417Sthompsa uint8_t rx; 2018188417Sthompsa 2019188417Sthompsa rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2020188417Sthompsa if (antenna == 1) 2021188417Sthompsa rx |= RAL_BBP_ANTA; 2022188417Sthompsa else if (antenna == 2) 2023188417Sthompsa rx |= RAL_BBP_ANTB; 2024188417Sthompsa else 2025188417Sthompsa rx |= RAL_BBP_DIVERSITY; 2026188417Sthompsa 2027188417Sthompsa /* need to force no I/Q flip for RF 2525e and 2526 */ 2028188417Sthompsa if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2029188417Sthompsa rx &= ~RAL_BBP_FLIPIQ; 2030188417Sthompsa 2031188417Sthompsa ural_bbp_write(sc, RAL_BBP_RX, rx); 2032188417Sthompsa} 2033188417Sthompsa 2034188417Sthompsastatic void 2035191746Sthompsaural_init_locked(struct ural_softc *sc) 2036188417Sthompsa{ 2037188417Sthompsa#define N(a) (sizeof (a) / sizeof ((a)[0])) 2038188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 2039188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 2040184610Salfred uint16_t tmp; 2041188417Sthompsa int i, ntries; 2042184610Salfred 2043188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 2044184610Salfred 2045188417Sthompsa ural_set_testmode(sc); 2046188417Sthompsa ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2047184610Salfred 2048191746Sthompsa ural_stop(sc); 2049184610Salfred 2050184610Salfred /* initialize MAC registers to default values */ 2051188417Sthompsa for (i = 0; i < N(ural_def_mac); i++) 2052188417Sthompsa ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2053184610Salfred 2054184610Salfred /* wait for BBP and RF to wake up (this can take a long time!) */ 2055188417Sthompsa for (ntries = 0; ntries < 100; ntries++) { 2056188417Sthompsa tmp = ural_read(sc, RAL_MAC_CSR17); 2057188417Sthompsa if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2058188417Sthompsa (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2059188417Sthompsa break; 2060188619Sthompsa if (ural_pause(sc, hz / 100)) 2061188619Sthompsa break; 2062184610Salfred } 2063188417Sthompsa if (ntries == 100) { 2064188417Sthompsa device_printf(sc->sc_dev, 2065188417Sthompsa "timeout waiting for BBP/RF to wakeup\n"); 2066188417Sthompsa goto fail; 2067188417Sthompsa } 2068184610Salfred 2069184610Salfred /* we're ready! */ 2070188417Sthompsa ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2071184610Salfred 2072184610Salfred /* set basic rate set (will be updated later) */ 2073188417Sthompsa ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2074184610Salfred 2075188417Sthompsa if (ural_bbp_init(sc) != 0) 2076184610Salfred goto fail; 2077184610Salfred 2078188417Sthompsa ural_set_chan(sc, ic->ic_curchan); 2079188417Sthompsa 2080184610Salfred /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2081188417Sthompsa ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2082184610Salfred 2083188417Sthompsa ural_set_txantenna(sc, sc->tx_ant); 2084188417Sthompsa ural_set_rxantenna(sc, sc->rx_ant); 2085184610Salfred 2086190526Ssam ural_set_macaddr(sc, IF_LLADDR(ifp)); 2087184610Salfred 2088184610Salfred /* 2089188417Sthompsa * Allocate Tx and Rx xfer queues. 2090184610Salfred */ 2091188419Sthompsa ural_setup_tx_list(sc); 2092184610Salfred 2093188417Sthompsa /* kick Rx */ 2094184610Salfred tmp = RAL_DROP_PHY | RAL_DROP_CRC; 2095188417Sthompsa if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2096188417Sthompsa tmp |= RAL_DROP_CTL | RAL_DROP_BAD_VERSION; 2097188417Sthompsa if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2098184610Salfred tmp |= RAL_DROP_TODS; 2099188417Sthompsa if (!(ifp->if_flags & IFF_PROMISC)) 2100184610Salfred tmp |= RAL_DROP_NOT_TO_ME; 2101184610Salfred } 2102188417Sthompsa ural_write(sc, RAL_TXRX_CSR2, tmp); 2103184610Salfred 2104188417Sthompsa ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2105188417Sthompsa ifp->if_drv_flags |= IFF_DRV_RUNNING; 2106194677Sthompsa usbd_xfer_set_stall(sc->sc_xfer[URAL_BULK_WR]); 2107194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_RD]); 2108184610Salfred return; 2109184610Salfred 2110191746Sthompsafail: ural_stop(sc); 2111188417Sthompsa#undef N 2112184610Salfred} 2113184610Salfred 2114184610Salfredstatic void 2115188417Sthompsaural_init(void *priv) 2116184610Salfred{ 2117188417Sthompsa struct ural_softc *sc = priv; 2118184610Salfred struct ifnet *ifp = sc->sc_ifp; 2119188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 2120184610Salfred 2121188417Sthompsa RAL_LOCK(sc); 2122191746Sthompsa ural_init_locked(sc); 2123188417Sthompsa RAL_UNLOCK(sc); 2124184610Salfred 2125188417Sthompsa if (ifp->if_drv_flags & IFF_DRV_RUNNING) 2126188417Sthompsa ieee80211_start_all(ic); /* start all vap's */ 2127184610Salfred} 2128184610Salfred 2129184610Salfredstatic void 2130191746Sthompsaural_stop(struct ural_softc *sc) 2131184610Salfred{ 2132184610Salfred struct ifnet *ifp = sc->sc_ifp; 2133184610Salfred 2134188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 2135184610Salfred 2136188417Sthompsa ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2137184610Salfred 2138184610Salfred /* 2139188419Sthompsa * Drain all the transfers, if not already drained: 2140184610Salfred */ 2141188419Sthompsa RAL_UNLOCK(sc); 2142194228Sthompsa usbd_transfer_drain(sc->sc_xfer[URAL_BULK_WR]); 2143194228Sthompsa usbd_transfer_drain(sc->sc_xfer[URAL_BULK_RD]); 2144188419Sthompsa RAL_LOCK(sc); 2145184610Salfred 2146188419Sthompsa ural_unsetup_tx_list(sc); 2147184610Salfred 2148188417Sthompsa /* disable Rx */ 2149188417Sthompsa ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2150188417Sthompsa /* reset ASIC and BBP (but won't reset MAC registers!) */ 2151188417Sthompsa ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2152188619Sthompsa /* wait a little */ 2153188619Sthompsa ural_pause(sc, hz / 10); 2154188417Sthompsa ural_write(sc, RAL_MAC_CSR1, 0); 2155189123Sthompsa /* wait a little */ 2156189123Sthompsa ural_pause(sc, hz / 10); 2157184610Salfred} 2158184610Salfred 2159188417Sthompsastatic int 2160188417Sthompsaural_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2161188417Sthompsa const struct ieee80211_bpf_params *params) 2162184610Salfred{ 2163188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 2164188417Sthompsa struct ifnet *ifp = ic->ic_ifp; 2165188417Sthompsa struct ural_softc *sc = ifp->if_softc; 2166184610Salfred 2167188417Sthompsa RAL_LOCK(sc); 2168188417Sthompsa /* prevent management frames from being sent if we're not ready */ 2169188417Sthompsa if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2170188417Sthompsa RAL_UNLOCK(sc); 2171188417Sthompsa m_freem(m); 2172188417Sthompsa ieee80211_free_node(ni); 2173188417Sthompsa return ENETDOWN; 2174184610Salfred } 2175188969Sthompsa if (sc->tx_nfree < RAL_TX_MINFREE) { 2176188417Sthompsa ifp->if_drv_flags |= IFF_DRV_OACTIVE; 2177188417Sthompsa RAL_UNLOCK(sc); 2178184610Salfred m_freem(m); 2179184610Salfred ieee80211_free_node(ni); 2180188417Sthompsa return EIO; 2181184610Salfred } 2182184610Salfred 2183188417Sthompsa ifp->if_opackets++; 2184184610Salfred 2185188417Sthompsa if (params == NULL) { 2186188417Sthompsa /* 2187188417Sthompsa * Legacy path; interpret frame contents to decide 2188188417Sthompsa * precisely how to send the frame. 2189188417Sthompsa */ 2190188417Sthompsa if (ural_tx_mgt(sc, m, ni) != 0) 2191188417Sthompsa goto bad; 2192188417Sthompsa } else { 2193188417Sthompsa /* 2194188417Sthompsa * Caller supplied explicit parameters to use in 2195188417Sthompsa * sending the frame. 2196188417Sthompsa */ 2197188417Sthompsa if (ural_tx_raw(sc, m, ni, params) != 0) 2198188417Sthompsa goto bad; 2199184610Salfred } 2200188417Sthompsa RAL_UNLOCK(sc); 2201188417Sthompsa return 0; 2202188417Sthompsabad: 2203188417Sthompsa ifp->if_oerrors++; 2204188417Sthompsa RAL_UNLOCK(sc); 2205188417Sthompsa ieee80211_free_node(ni); 2206188417Sthompsa return EIO; /* XXX */ 2207184610Salfred} 2208184610Salfred 2209184610Salfredstatic void 2210206358Srpauloural_ratectl_start(struct ural_softc *sc, struct ieee80211_node *ni) 2211184610Salfred{ 2212188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 2213188417Sthompsa struct ural_vap *uvp = URAL_VAP(vap); 2214184610Salfred 2215188417Sthompsa /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2216188417Sthompsa ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2217184610Salfred 2218206358Srpaulo usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp); 2219184610Salfred} 2220184610Salfred 2221184610Salfredstatic void 2222206358Srpauloural_ratectl_timeout(void *arg) 2223184610Salfred{ 2224188417Sthompsa struct ural_vap *uvp = arg; 2225191746Sthompsa struct ieee80211vap *vap = &uvp->vap; 2226191746Sthompsa struct ieee80211com *ic = vap->iv_ic; 2227184610Salfred 2228206358Srpaulo ieee80211_runtask(ic, &uvp->ratectl_task); 2229184610Salfred} 2230184610Salfred 2231184610Salfredstatic void 2232206358Srpauloural_ratectl_task(void *arg, int pending) 2233184610Salfred{ 2234191746Sthompsa struct ural_vap *uvp = arg; 2235191746Sthompsa struct ieee80211vap *vap = &uvp->vap; 2236191746Sthompsa struct ieee80211com *ic = vap->iv_ic; 2237191746Sthompsa struct ifnet *ifp = ic->ic_ifp; 2238191746Sthompsa struct ural_softc *sc = ifp->if_softc; 2239212127Sthompsa struct ieee80211_node *ni; 2240188417Sthompsa int ok, fail; 2241206358Srpaulo int sum, retrycnt; 2242184610Salfred 2243212127Sthompsa ni = ieee80211_ref_node(vap->iv_bss); 2244191746Sthompsa RAL_LOCK(sc); 2245188417Sthompsa /* read and clear statistic registers (STA_CSR0 to STA_CSR10) */ 2246188417Sthompsa ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2247184610Salfred 2248188417Sthompsa ok = sc->sta[7] + /* TX ok w/o retry */ 2249188417Sthompsa sc->sta[8]; /* TX ok w/ retry */ 2250188417Sthompsa fail = sc->sta[9]; /* TX retry-fail count */ 2251206358Srpaulo sum = ok+fail; 2252206358Srpaulo retrycnt = sc->sta[8] + fail; 2253184610Salfred 2254206358Srpaulo ieee80211_ratectl_tx_update(vap, ni, &sum, &ok, &retrycnt); 2255206358Srpaulo (void) ieee80211_ratectl_rate(ni, NULL, 0); 2256184610Salfred 2257188417Sthompsa ifp->if_oerrors += fail; /* count TX retry-fail as Tx errors */ 2258184610Salfred 2259206358Srpaulo usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp); 2260191746Sthompsa RAL_UNLOCK(sc); 2261212127Sthompsa ieee80211_free_node(ni); 2262184610Salfred} 2263184610Salfred 2264188619Sthompsastatic int 2265188619Sthompsaural_pause(struct ural_softc *sc, int timeout) 2266188619Sthompsa{ 2267188619Sthompsa 2268194228Sthompsa usb_pause_mtx(&sc->sc_mtx, timeout); 2269188619Sthompsa return (0); 2270188619Sthompsa} 2271