if_ural.c revision 212127
1184610Salfred/* $FreeBSD: head/sys/dev/usb/wlan/if_ural.c 212127 2010-09-02 03:28:03Z thompsa $ */ 2184610Salfred 3184610Salfred/*- 4184610Salfred * Copyright (c) 2005, 2006 5184610Salfred * Damien Bergamini <damien.bergamini@free.fr> 6184610Salfred * 7184610Salfred * Copyright (c) 2006, 2008 8189002Sed * Hans Petter Selasky <hselasky@FreeBSD.org> 9184610Salfred * 10184610Salfred * Permission to use, copy, modify, and distribute this software for any 11184610Salfred * purpose with or without fee is hereby granted, provided that the above 12184610Salfred * copyright notice and this permission notice appear in all copies. 13184610Salfred * 14184610Salfred * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 15184610Salfred * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 16184610Salfred * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 17184610Salfred * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 18184610Salfred * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 19184610Salfred * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 20184610Salfred * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 21184610Salfred */ 22184610Salfred 23184610Salfred#include <sys/cdefs.h> 24184610Salfred__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_ural.c 212127 2010-09-02 03:28:03Z thompsa $"); 25184610Salfred 26184610Salfred/*- 27184610Salfred * Ralink Technology RT2500USB chipset driver 28184610Salfred * http://www.ralinktech.com/ 29184610Salfred */ 30184610Salfred 31191746Sthompsa#include <sys/param.h> 32191746Sthompsa#include <sys/sockio.h> 33191746Sthompsa#include <sys/sysctl.h> 34191746Sthompsa#include <sys/lock.h> 35191746Sthompsa#include <sys/mutex.h> 36191746Sthompsa#include <sys/mbuf.h> 37191746Sthompsa#include <sys/kernel.h> 38191746Sthompsa#include <sys/socket.h> 39191746Sthompsa#include <sys/systm.h> 40191746Sthompsa#include <sys/malloc.h> 41191746Sthompsa#include <sys/module.h> 42191746Sthompsa#include <sys/bus.h> 43191746Sthompsa#include <sys/endian.h> 44191746Sthompsa#include <sys/kdb.h> 45184610Salfred 46191746Sthompsa#include <machine/bus.h> 47191746Sthompsa#include <machine/resource.h> 48191746Sthompsa#include <sys/rman.h> 49191746Sthompsa 50191746Sthompsa#include <net/bpf.h> 51191746Sthompsa#include <net/if.h> 52191746Sthompsa#include <net/if_arp.h> 53191746Sthompsa#include <net/ethernet.h> 54191746Sthompsa#include <net/if_dl.h> 55191746Sthompsa#include <net/if_media.h> 56191746Sthompsa#include <net/if_types.h> 57191746Sthompsa 58191746Sthompsa#ifdef INET 59191746Sthompsa#include <netinet/in.h> 60191746Sthompsa#include <netinet/in_systm.h> 61191746Sthompsa#include <netinet/in_var.h> 62191746Sthompsa#include <netinet/if_ether.h> 63191746Sthompsa#include <netinet/ip.h> 64191746Sthompsa#endif 65191746Sthompsa 66191746Sthompsa#include <net80211/ieee80211_var.h> 67191746Sthompsa#include <net80211/ieee80211_regdomain.h> 68191746Sthompsa#include <net80211/ieee80211_radiotap.h> 69206358Srpaulo#include <net80211/ieee80211_ratectl.h> 70191746Sthompsa 71191746Sthompsa#include <dev/usb/usb.h> 72194677Sthompsa#include <dev/usb/usbdi.h> 73191746Sthompsa#include "usbdevs.h" 74184610Salfred 75194677Sthompsa#define USB_DEBUG_VAR ural_debug 76194677Sthompsa#include <dev/usb/usb_debug.h> 77191746Sthompsa 78188942Sthompsa#include <dev/usb/wlan/if_uralreg.h> 79188942Sthompsa#include <dev/usb/wlan/if_uralvar.h> 80184610Salfred 81207077Sthompsa#ifdef USB_DEBUG 82184610Salfredstatic int ural_debug = 0; 83184610Salfred 84192502SthompsaSYSCTL_NODE(_hw_usb, OID_AUTO, ural, CTLFLAG_RW, 0, "USB ural"); 85192502SthompsaSYSCTL_INT(_hw_usb_ural, OID_AUTO, debug, CTLFLAG_RW, &ural_debug, 0, 86184610Salfred "Debug level"); 87184610Salfred#endif 88184610Salfred 89188417Sthompsa#define URAL_RSSI(rssi) \ 90188417Sthompsa ((rssi) > (RAL_NOISE_FLOOR + RAL_RSSI_CORR) ? \ 91188417Sthompsa ((rssi) - (RAL_NOISE_FLOOR + RAL_RSSI_CORR)) : 0) 92184610Salfred 93188417Sthompsa/* various supported device vendors/products */ 94192984Sthompsastatic const struct usb_device_id ural_devs[] = { 95201028Sthompsa#define URAL_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 96201028Sthompsa URAL_DEV(ASUS, WL167G), 97201028Sthompsa URAL_DEV(ASUS, RT2570), 98201028Sthompsa URAL_DEV(BELKIN, F5D7050), 99201028Sthompsa URAL_DEV(BELKIN, F5D7051), 100201028Sthompsa URAL_DEV(CISCOLINKSYS, HU200TS), 101201028Sthompsa URAL_DEV(CISCOLINKSYS, WUSB54G), 102201028Sthompsa URAL_DEV(CISCOLINKSYS, WUSB54GP), 103201028Sthompsa URAL_DEV(CONCEPTRONIC2, C54RU), 104201028Sthompsa URAL_DEV(DLINK, DWLG122), 105201028Sthompsa URAL_DEV(GIGABYTE, GN54G), 106201028Sthompsa URAL_DEV(GIGABYTE, GNWBKG), 107201028Sthompsa URAL_DEV(GUILLEMOT, HWGUSB254), 108201028Sthompsa URAL_DEV(MELCO, KG54), 109201028Sthompsa URAL_DEV(MELCO, KG54AI), 110201028Sthompsa URAL_DEV(MELCO, KG54YB), 111201028Sthompsa URAL_DEV(MELCO, NINWIFI), 112201028Sthompsa URAL_DEV(MSI, RT2570), 113201028Sthompsa URAL_DEV(MSI, RT2570_2), 114201028Sthompsa URAL_DEV(MSI, RT2570_3), 115201028Sthompsa URAL_DEV(NOVATECH, NV902), 116201028Sthompsa URAL_DEV(RALINK, RT2570), 117201028Sthompsa URAL_DEV(RALINK, RT2570_2), 118201028Sthompsa URAL_DEV(RALINK, RT2570_3), 119201028Sthompsa URAL_DEV(SIEMENS2, WL54G), 120201028Sthompsa URAL_DEV(SMC, 2862WG), 121201028Sthompsa URAL_DEV(SPHAIRON, UB801R), 122201028Sthompsa URAL_DEV(SURECOM, RT2570), 123201028Sthompsa URAL_DEV(VTECH, RT2570), 124201028Sthompsa URAL_DEV(ZINWELL, RT2570), 125201028Sthompsa#undef URAL_DEV 126188417Sthompsa}; 127184610Salfred 128193045Sthompsastatic usb_callback_t ural_bulk_read_callback; 129193045Sthompsastatic usb_callback_t ural_bulk_write_callback; 130184610Salfred 131193045Sthompsastatic usb_error_t ural_do_request(struct ural_softc *sc, 132192984Sthompsa struct usb_device_request *req, void *data); 133185948Sthompsastatic struct ieee80211vap *ural_vap_create(struct ieee80211com *, 134188417Sthompsa const char name[IFNAMSIZ], int unit, int opmode, 135188417Sthompsa int flags, const uint8_t bssid[IEEE80211_ADDR_LEN], 136188417Sthompsa const uint8_t mac[IEEE80211_ADDR_LEN]); 137188417Sthompsastatic void ural_vap_delete(struct ieee80211vap *); 138188417Sthompsastatic void ural_tx_free(struct ural_tx_data *, int); 139188419Sthompsastatic void ural_setup_tx_list(struct ural_softc *); 140188419Sthompsastatic void ural_unsetup_tx_list(struct ural_softc *); 141188417Sthompsastatic int ural_newstate(struct ieee80211vap *, 142188417Sthompsa enum ieee80211_state, int); 143188417Sthompsastatic void ural_setup_tx_desc(struct ural_softc *, 144188417Sthompsa struct ural_tx_desc *, uint32_t, int, int); 145188417Sthompsastatic int ural_tx_bcn(struct ural_softc *, struct mbuf *, 146188417Sthompsa struct ieee80211_node *); 147188417Sthompsastatic int ural_tx_mgt(struct ural_softc *, struct mbuf *, 148188417Sthompsa struct ieee80211_node *); 149188417Sthompsastatic int ural_tx_data(struct ural_softc *, struct mbuf *, 150188417Sthompsa struct ieee80211_node *); 151188417Sthompsastatic void ural_start(struct ifnet *); 152188417Sthompsastatic int ural_ioctl(struct ifnet *, u_long, caddr_t); 153188417Sthompsastatic void ural_set_testmode(struct ural_softc *); 154188417Sthompsastatic void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 155188417Sthompsa int); 156188417Sthompsastatic uint16_t ural_read(struct ural_softc *, uint16_t); 157188417Sthompsastatic void ural_read_multi(struct ural_softc *, uint16_t, void *, 158188417Sthompsa int); 159188417Sthompsastatic void ural_write(struct ural_softc *, uint16_t, uint16_t); 160188417Sthompsastatic void ural_write_multi(struct ural_softc *, uint16_t, void *, 161188417Sthompsa int) __unused; 162188417Sthompsastatic void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 163188417Sthompsastatic uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 164188417Sthompsastatic void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 165188417Sthompsastatic void ural_scan_start(struct ieee80211com *); 166188417Sthompsastatic void ural_scan_end(struct ieee80211com *); 167188417Sthompsastatic void ural_set_channel(struct ieee80211com *); 168188417Sthompsastatic void ural_set_chan(struct ural_softc *, 169188417Sthompsa struct ieee80211_channel *); 170188417Sthompsastatic void ural_disable_rf_tune(struct ural_softc *); 171188417Sthompsastatic void ural_enable_tsf_sync(struct ural_softc *); 172192468Ssamstatic void ural_enable_tsf(struct ural_softc *); 173188417Sthompsastatic void ural_update_slot(struct ifnet *); 174188417Sthompsastatic void ural_set_txpreamble(struct ural_softc *); 175188417Sthompsastatic void ural_set_basicrates(struct ural_softc *, 176188417Sthompsa const struct ieee80211_channel *); 177188417Sthompsastatic void ural_set_bssid(struct ural_softc *, const uint8_t *); 178188417Sthompsastatic void ural_set_macaddr(struct ural_softc *, uint8_t *); 179189123Sthompsastatic void ural_update_promisc(struct ifnet *); 180191746Sthompsastatic void ural_setpromisc(struct ural_softc *); 181188417Sthompsastatic const char *ural_get_rf(int); 182188417Sthompsastatic void ural_read_eeprom(struct ural_softc *); 183188417Sthompsastatic int ural_bbp_init(struct ural_softc *); 184188417Sthompsastatic void ural_set_txantenna(struct ural_softc *, int); 185188417Sthompsastatic void ural_set_rxantenna(struct ural_softc *, int); 186191746Sthompsastatic void ural_init_locked(struct ural_softc *); 187188417Sthompsastatic void ural_init(void *); 188191746Sthompsastatic void ural_stop(struct ural_softc *); 189188417Sthompsastatic int ural_raw_xmit(struct ieee80211_node *, struct mbuf *, 190188417Sthompsa const struct ieee80211_bpf_params *); 191206358Srpaulostatic void ural_ratectl_start(struct ural_softc *, 192188417Sthompsa struct ieee80211_node *); 193206358Srpaulostatic void ural_ratectl_timeout(void *); 194206358Srpaulostatic void ural_ratectl_task(void *, int); 195188619Sthompsastatic int ural_pause(struct ural_softc *sc, int timeout); 196184610Salfred 197184610Salfred/* 198188417Sthompsa * Default values for MAC registers; values taken from the reference driver. 199184610Salfred */ 200188417Sthompsastatic const struct { 201188417Sthompsa uint16_t reg; 202188417Sthompsa uint16_t val; 203188417Sthompsa} ural_def_mac[] = { 204188417Sthompsa { RAL_TXRX_CSR5, 0x8c8d }, 205188417Sthompsa { RAL_TXRX_CSR6, 0x8b8a }, 206188417Sthompsa { RAL_TXRX_CSR7, 0x8687 }, 207188417Sthompsa { RAL_TXRX_CSR8, 0x0085 }, 208188417Sthompsa { RAL_MAC_CSR13, 0x1111 }, 209188417Sthompsa { RAL_MAC_CSR14, 0x1e11 }, 210188417Sthompsa { RAL_TXRX_CSR21, 0xe78f }, 211188417Sthompsa { RAL_MAC_CSR9, 0xff1d }, 212188417Sthompsa { RAL_MAC_CSR11, 0x0002 }, 213188417Sthompsa { RAL_MAC_CSR22, 0x0053 }, 214188417Sthompsa { RAL_MAC_CSR15, 0x0000 }, 215188417Sthompsa { RAL_MAC_CSR8, RAL_FRAME_SIZE }, 216188417Sthompsa { RAL_TXRX_CSR19, 0x0000 }, 217188417Sthompsa { RAL_TXRX_CSR18, 0x005a }, 218188417Sthompsa { RAL_PHY_CSR2, 0x0000 }, 219188417Sthompsa { RAL_TXRX_CSR0, 0x1ec0 }, 220188417Sthompsa { RAL_PHY_CSR4, 0x000f } 221184610Salfred}; 222184610Salfred 223184610Salfred/* 224184610Salfred * Default values for BBP registers; values taken from the reference driver. 225184610Salfred */ 226188417Sthompsastatic const struct { 227184610Salfred uint8_t reg; 228184610Salfred uint8_t val; 229188417Sthompsa} ural_def_bbp[] = { 230188417Sthompsa { 3, 0x02 }, 231188417Sthompsa { 4, 0x19 }, 232188417Sthompsa { 14, 0x1c }, 233188417Sthompsa { 15, 0x30 }, 234188417Sthompsa { 16, 0xac }, 235188417Sthompsa { 17, 0x48 }, 236188417Sthompsa { 18, 0x18 }, 237188417Sthompsa { 19, 0xff }, 238188417Sthompsa { 20, 0x1e }, 239188417Sthompsa { 21, 0x08 }, 240188417Sthompsa { 22, 0x08 }, 241188417Sthompsa { 23, 0x08 }, 242188417Sthompsa { 24, 0x80 }, 243188417Sthompsa { 25, 0x50 }, 244188417Sthompsa { 26, 0x08 }, 245188417Sthompsa { 27, 0x23 }, 246188417Sthompsa { 30, 0x10 }, 247188417Sthompsa { 31, 0x2b }, 248188417Sthompsa { 32, 0xb9 }, 249188417Sthompsa { 34, 0x12 }, 250188417Sthompsa { 35, 0x50 }, 251188417Sthompsa { 39, 0xc4 }, 252188417Sthompsa { 40, 0x02 }, 253188417Sthompsa { 41, 0x60 }, 254188417Sthompsa { 53, 0x10 }, 255188417Sthompsa { 54, 0x18 }, 256188417Sthompsa { 56, 0x08 }, 257188417Sthompsa { 57, 0x10 }, 258188417Sthompsa { 58, 0x08 }, 259188417Sthompsa { 61, 0x60 }, 260188417Sthompsa { 62, 0x10 }, 261188417Sthompsa { 75, 0xff } 262184610Salfred}; 263184610Salfred 264184610Salfred/* 265184610Salfred * Default values for RF register R2 indexed by channel numbers. 266184610Salfred */ 267184610Salfredstatic const uint32_t ural_rf2522_r2[] = { 268184610Salfred 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 269184610Salfred 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 270184610Salfred}; 271184610Salfred 272184610Salfredstatic const uint32_t ural_rf2523_r2[] = { 273184610Salfred 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 274184610Salfred 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 275184610Salfred}; 276184610Salfred 277184610Salfredstatic const uint32_t ural_rf2524_r2[] = { 278184610Salfred 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 279184610Salfred 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 280184610Salfred}; 281184610Salfred 282184610Salfredstatic const uint32_t ural_rf2525_r2[] = { 283184610Salfred 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 284184610Salfred 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 285184610Salfred}; 286184610Salfred 287184610Salfredstatic const uint32_t ural_rf2525_hi_r2[] = { 288184610Salfred 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 289184610Salfred 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 290184610Salfred}; 291184610Salfred 292184610Salfredstatic const uint32_t ural_rf2525e_r2[] = { 293184610Salfred 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 294184610Salfred 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 295184610Salfred}; 296184610Salfred 297184610Salfredstatic const uint32_t ural_rf2526_hi_r2[] = { 298184610Salfred 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 299184610Salfred 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 300184610Salfred}; 301184610Salfred 302184610Salfredstatic const uint32_t ural_rf2526_r2[] = { 303184610Salfred 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 304184610Salfred 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 305184610Salfred}; 306184610Salfred 307184610Salfred/* 308184610Salfred * For dual-band RF, RF registers R1 and R4 also depend on channel number; 309184610Salfred * values taken from the reference driver. 310184610Salfred */ 311188417Sthompsastatic const struct { 312188417Sthompsa uint8_t chan; 313188417Sthompsa uint32_t r1; 314188417Sthompsa uint32_t r2; 315188417Sthompsa uint32_t r4; 316188417Sthompsa} ural_rf5222[] = { 317188417Sthompsa { 1, 0x08808, 0x0044d, 0x00282 }, 318188417Sthompsa { 2, 0x08808, 0x0044e, 0x00282 }, 319188417Sthompsa { 3, 0x08808, 0x0044f, 0x00282 }, 320188417Sthompsa { 4, 0x08808, 0x00460, 0x00282 }, 321188417Sthompsa { 5, 0x08808, 0x00461, 0x00282 }, 322188417Sthompsa { 6, 0x08808, 0x00462, 0x00282 }, 323188417Sthompsa { 7, 0x08808, 0x00463, 0x00282 }, 324188417Sthompsa { 8, 0x08808, 0x00464, 0x00282 }, 325188417Sthompsa { 9, 0x08808, 0x00465, 0x00282 }, 326188417Sthompsa { 10, 0x08808, 0x00466, 0x00282 }, 327188417Sthompsa { 11, 0x08808, 0x00467, 0x00282 }, 328188417Sthompsa { 12, 0x08808, 0x00468, 0x00282 }, 329188417Sthompsa { 13, 0x08808, 0x00469, 0x00282 }, 330188417Sthompsa { 14, 0x08808, 0x0046b, 0x00286 }, 331184610Salfred 332188417Sthompsa { 36, 0x08804, 0x06225, 0x00287 }, 333188417Sthompsa { 40, 0x08804, 0x06226, 0x00287 }, 334188417Sthompsa { 44, 0x08804, 0x06227, 0x00287 }, 335188417Sthompsa { 48, 0x08804, 0x06228, 0x00287 }, 336188417Sthompsa { 52, 0x08804, 0x06229, 0x00287 }, 337188417Sthompsa { 56, 0x08804, 0x0622a, 0x00287 }, 338188417Sthompsa { 60, 0x08804, 0x0622b, 0x00287 }, 339188417Sthompsa { 64, 0x08804, 0x0622c, 0x00287 }, 340184610Salfred 341188417Sthompsa { 100, 0x08804, 0x02200, 0x00283 }, 342188417Sthompsa { 104, 0x08804, 0x02201, 0x00283 }, 343188417Sthompsa { 108, 0x08804, 0x02202, 0x00283 }, 344188417Sthompsa { 112, 0x08804, 0x02203, 0x00283 }, 345188417Sthompsa { 116, 0x08804, 0x02204, 0x00283 }, 346188417Sthompsa { 120, 0x08804, 0x02205, 0x00283 }, 347188417Sthompsa { 124, 0x08804, 0x02206, 0x00283 }, 348188417Sthompsa { 128, 0x08804, 0x02207, 0x00283 }, 349188417Sthompsa { 132, 0x08804, 0x02208, 0x00283 }, 350188417Sthompsa { 136, 0x08804, 0x02209, 0x00283 }, 351188417Sthompsa { 140, 0x08804, 0x0220a, 0x00283 }, 352184610Salfred 353188417Sthompsa { 149, 0x08808, 0x02429, 0x00281 }, 354188417Sthompsa { 153, 0x08808, 0x0242b, 0x00281 }, 355188417Sthompsa { 157, 0x08808, 0x0242d, 0x00281 }, 356188417Sthompsa { 161, 0x08808, 0x0242f, 0x00281 } 357184610Salfred}; 358184610Salfred 359192984Sthompsastatic const struct usb_config ural_config[URAL_N_TRANSFER] = { 360188417Sthompsa [URAL_BULK_WR] = { 361184610Salfred .type = UE_BULK, 362184610Salfred .endpoint = UE_ADDR_ANY, 363184610Salfred .direction = UE_DIR_OUT, 364190734Sthompsa .bufsize = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE + 4), 365190734Sthompsa .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 366190734Sthompsa .callback = ural_bulk_write_callback, 367190734Sthompsa .timeout = 5000, /* ms */ 368184610Salfred }, 369188417Sthompsa [URAL_BULK_RD] = { 370184610Salfred .type = UE_BULK, 371184610Salfred .endpoint = UE_ADDR_ANY, 372184610Salfred .direction = UE_DIR_IN, 373190734Sthompsa .bufsize = (RAL_FRAME_SIZE + RAL_RX_DESC_SIZE), 374190734Sthompsa .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 375190734Sthompsa .callback = ural_bulk_read_callback, 376184610Salfred }, 377184610Salfred}; 378184610Salfred 379188417Sthompsastatic device_probe_t ural_match; 380188417Sthompsastatic device_attach_t ural_attach; 381188417Sthompsastatic device_detach_t ural_detach; 382184610Salfred 383184610Salfredstatic device_method_t ural_methods[] = { 384188417Sthompsa /* Device interface */ 385188417Sthompsa DEVMETHOD(device_probe, ural_match), 386188417Sthompsa DEVMETHOD(device_attach, ural_attach), 387188417Sthompsa DEVMETHOD(device_detach, ural_detach), 388188417Sthompsa 389188417Sthompsa { 0, 0 } 390184610Salfred}; 391184610Salfred 392184610Salfredstatic driver_t ural_driver = { 393184610Salfred .name = "ural", 394184610Salfred .methods = ural_methods, 395184610Salfred .size = sizeof(struct ural_softc), 396184610Salfred}; 397184610Salfred 398188417Sthompsastatic devclass_t ural_devclass; 399188417Sthompsa 400189275SthompsaDRIVER_MODULE(ural, uhub, ural_driver, ural_devclass, NULL, 0); 401188942SthompsaMODULE_DEPEND(ural, usb, 1, 1, 1); 402184610SalfredMODULE_DEPEND(ural, wlan, 1, 1, 1); 403212122SthompsaMODULE_VERSION(ural, 1); 404184610Salfred 405184610Salfredstatic int 406188417Sthompsaural_match(device_t self) 407184610Salfred{ 408192984Sthompsa struct usb_attach_arg *uaa = device_get_ivars(self); 409184610Salfred 410192499Sthompsa if (uaa->usb_mode != USB_MODE_HOST) 411184610Salfred return (ENXIO); 412188417Sthompsa if (uaa->info.bConfigIndex != 0) 413184610Salfred return (ENXIO); 414188417Sthompsa if (uaa->info.bIfaceIndex != RAL_IFACE_INDEX) 415184610Salfred return (ENXIO); 416188417Sthompsa 417194228Sthompsa return (usbd_lookup_id_by_uaa(ural_devs, sizeof(ural_devs), uaa)); 418184610Salfred} 419184610Salfred 420184610Salfredstatic int 421188417Sthompsaural_attach(device_t self) 422184610Salfred{ 423192984Sthompsa struct usb_attach_arg *uaa = device_get_ivars(self); 424188417Sthompsa struct ural_softc *sc = device_get_softc(self); 425191746Sthompsa struct ifnet *ifp; 426191746Sthompsa struct ieee80211com *ic; 427191746Sthompsa uint8_t iface_index, bands; 428184610Salfred int error; 429184610Salfred 430194228Sthompsa device_set_usb_desc(self); 431184610Salfred sc->sc_udev = uaa->device; 432188417Sthompsa sc->sc_dev = self; 433184610Salfred 434188417Sthompsa mtx_init(&sc->sc_mtx, device_get_nameunit(self), 435188417Sthompsa MTX_NETWORK_LOCK, MTX_DEF); 436184610Salfred 437184610Salfred iface_index = RAL_IFACE_INDEX; 438194228Sthompsa error = usbd_transfer_setup(uaa->device, 439184610Salfred &iface_index, sc->sc_xfer, ural_config, 440184610Salfred URAL_N_TRANSFER, sc, &sc->sc_mtx); 441184610Salfred if (error) { 442188417Sthompsa device_printf(self, "could not allocate USB transfers, " 443194228Sthompsa "err=%s\n", usbd_errstr(error)); 444184610Salfred goto detach; 445184610Salfred } 446184610Salfred 447188419Sthompsa RAL_LOCK(sc); 448188417Sthompsa /* retrieve RT2570 rev. no */ 449188417Sthompsa sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 450184610Salfred 451188417Sthompsa /* retrieve MAC address and various other things from EEPROM */ 452188417Sthompsa ural_read_eeprom(sc); 453188417Sthompsa RAL_UNLOCK(sc); 454184610Salfred 455191746Sthompsa device_printf(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 456188417Sthompsa sc->asic_rev, ural_get_rf(sc->rf_rev)); 457184610Salfred 458188419Sthompsa ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 459188419Sthompsa if (ifp == NULL) { 460188419Sthompsa device_printf(sc->sc_dev, "can not if_alloc()\n"); 461191746Sthompsa goto detach; 462188419Sthompsa } 463188419Sthompsa ic = ifp->if_l2com; 464188419Sthompsa 465188417Sthompsa ifp->if_softc = sc; 466188417Sthompsa if_initname(ifp, "ural", device_get_unit(sc->sc_dev)); 467188417Sthompsa ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 468188417Sthompsa ifp->if_init = ural_init; 469188417Sthompsa ifp->if_ioctl = ural_ioctl; 470188417Sthompsa ifp->if_start = ural_start; 471207554Ssobomax IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 472207554Ssobomax ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 473188417Sthompsa IFQ_SET_READY(&ifp->if_snd); 474184610Salfred 475188417Sthompsa ic->ic_ifp = ifp; 476188417Sthompsa ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 477184610Salfred 478188417Sthompsa /* set device capabilities */ 479188417Sthompsa ic->ic_caps = 480188417Sthompsa IEEE80211_C_STA /* station mode supported */ 481188417Sthompsa | IEEE80211_C_IBSS /* IBSS mode supported */ 482188417Sthompsa | IEEE80211_C_MONITOR /* monitor mode supported */ 483188417Sthompsa | IEEE80211_C_HOSTAP /* HostAp mode supported */ 484188417Sthompsa | IEEE80211_C_TXPMGT /* tx power management */ 485188417Sthompsa | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 486188417Sthompsa | IEEE80211_C_SHSLOT /* short slot time supported */ 487188417Sthompsa | IEEE80211_C_BGSCAN /* bg scanning supported */ 488188417Sthompsa | IEEE80211_C_WPA /* 802.11i */ 489211314Sbschmidt | IEEE80211_C_RATECTL /* use ratectl */ 490188417Sthompsa ; 491184610Salfred 492188417Sthompsa bands = 0; 493188417Sthompsa setbit(&bands, IEEE80211_MODE_11B); 494188417Sthompsa setbit(&bands, IEEE80211_MODE_11G); 495188417Sthompsa if (sc->rf_rev == RAL_RF_5222) 496188417Sthompsa setbit(&bands, IEEE80211_MODE_11A); 497188417Sthompsa ieee80211_init_channels(ic, NULL, &bands); 498184610Salfred 499190526Ssam ieee80211_ifattach(ic, sc->sc_bssid); 500189123Sthompsa ic->ic_update_promisc = ural_update_promisc; 501188417Sthompsa ic->ic_raw_xmit = ural_raw_xmit; 502188417Sthompsa ic->ic_scan_start = ural_scan_start; 503188417Sthompsa ic->ic_scan_end = ural_scan_end; 504188417Sthompsa ic->ic_set_channel = ural_set_channel; 505184610Salfred 506188417Sthompsa ic->ic_vap_create = ural_vap_create; 507188417Sthompsa ic->ic_vap_delete = ural_vap_delete; 508184610Salfred 509192468Ssam ieee80211_radiotap_attach(ic, 510192468Ssam &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 511192468Ssam RAL_TX_RADIOTAP_PRESENT, 512192468Ssam &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 513192468Ssam RAL_RX_RADIOTAP_PRESENT); 514184610Salfred 515188417Sthompsa if (bootverbose) 516188417Sthompsa ieee80211_announce(ic); 517184610Salfred 518191746Sthompsa return (0); 519191746Sthompsa 520191746Sthompsadetach: 521191746Sthompsa ural_detach(self); 522191746Sthompsa return (ENXIO); /* failure */ 523188417Sthompsa} 524184610Salfred 525188417Sthompsastatic int 526188417Sthompsaural_detach(device_t self) 527188417Sthompsa{ 528188417Sthompsa struct ural_softc *sc = device_get_softc(self); 529188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 530188619Sthompsa struct ieee80211com *ic; 531184610Salfred 532188419Sthompsa /* stop all USB transfers */ 533194228Sthompsa usbd_transfer_unsetup(sc->sc_xfer, URAL_N_TRANSFER); 534184610Salfred 535188419Sthompsa /* free TX list, if any */ 536188419Sthompsa RAL_LOCK(sc); 537188419Sthompsa ural_unsetup_tx_list(sc); 538188419Sthompsa RAL_UNLOCK(sc); 539188419Sthompsa 540188417Sthompsa if (ifp) { 541188619Sthompsa ic = ifp->if_l2com; 542188417Sthompsa ieee80211_ifdetach(ic); 543188417Sthompsa if_free(ifp); 544184610Salfred } 545188417Sthompsa mtx_destroy(&sc->sc_mtx); 546184610Salfred 547188417Sthompsa return (0); 548184610Salfred} 549184610Salfred 550193045Sthompsastatic usb_error_t 551189123Sthompsaural_do_request(struct ural_softc *sc, 552192984Sthompsa struct usb_device_request *req, void *data) 553189123Sthompsa{ 554193045Sthompsa usb_error_t err; 555189123Sthompsa int ntries = 10; 556189123Sthompsa 557189123Sthompsa while (ntries--) { 558194228Sthompsa err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 559189123Sthompsa req, data, 0, NULL, 250 /* ms */); 560189123Sthompsa if (err == 0) 561189123Sthompsa break; 562189123Sthompsa 563189123Sthompsa DPRINTFN(1, "Control request failed, %s (retrying)\n", 564194228Sthompsa usbd_errstr(err)); 565189123Sthompsa if (ural_pause(sc, hz / 100)) 566189123Sthompsa break; 567189123Sthompsa } 568189123Sthompsa return (err); 569189123Sthompsa} 570189123Sthompsa 571188417Sthompsastatic struct ieee80211vap * 572188417Sthompsaural_vap_create(struct ieee80211com *ic, 573188417Sthompsa const char name[IFNAMSIZ], int unit, int opmode, int flags, 574188417Sthompsa const uint8_t bssid[IEEE80211_ADDR_LEN], 575188417Sthompsa const uint8_t mac[IEEE80211_ADDR_LEN]) 576184610Salfred{ 577188417Sthompsa struct ural_softc *sc = ic->ic_ifp->if_softc; 578188417Sthompsa struct ural_vap *uvp; 579188417Sthompsa struct ieee80211vap *vap; 580184610Salfred 581188417Sthompsa if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 582188417Sthompsa return NULL; 583188417Sthompsa uvp = (struct ural_vap *) malloc(sizeof(struct ural_vap), 584188417Sthompsa M_80211_VAP, M_NOWAIT | M_ZERO); 585188417Sthompsa if (uvp == NULL) 586188417Sthompsa return NULL; 587188417Sthompsa vap = &uvp->vap; 588188417Sthompsa /* enable s/w bmiss handling for sta mode */ 589188417Sthompsa ieee80211_vap_setup(ic, vap, name, unit, opmode, 590188417Sthompsa flags | IEEE80211_CLONE_NOBEACONS, bssid, mac); 591184610Salfred 592188417Sthompsa /* override state transition machine */ 593188417Sthompsa uvp->newstate = vap->iv_newstate; 594188417Sthompsa vap->iv_newstate = ural_newstate; 595184610Salfred 596206358Srpaulo usb_callout_init_mtx(&uvp->ratectl_ch, &sc->sc_mtx, 0); 597206358Srpaulo TASK_INIT(&uvp->ratectl_task, 0, ural_ratectl_task, uvp); 598206358Srpaulo ieee80211_ratectl_init(vap); 599206358Srpaulo ieee80211_ratectl_setinterval(vap, 1000 /* 1 sec */); 600184610Salfred 601188417Sthompsa /* complete setup */ 602188417Sthompsa ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status); 603188417Sthompsa ic->ic_opmode = opmode; 604188417Sthompsa return vap; 605184610Salfred} 606184610Salfred 607184610Salfredstatic void 608188417Sthompsaural_vap_delete(struct ieee80211vap *vap) 609184610Salfred{ 610188417Sthompsa struct ural_vap *uvp = URAL_VAP(vap); 611191746Sthompsa struct ieee80211com *ic = vap->iv_ic; 612184610Salfred 613206358Srpaulo usb_callout_drain(&uvp->ratectl_ch); 614206358Srpaulo ieee80211_draintask(ic, &uvp->ratectl_task); 615206358Srpaulo ieee80211_ratectl_deinit(vap); 616188417Sthompsa ieee80211_vap_detach(vap); 617188417Sthompsa free(uvp, M_80211_VAP); 618184610Salfred} 619184610Salfred 620184610Salfredstatic void 621188417Sthompsaural_tx_free(struct ural_tx_data *data, int txerr) 622184610Salfred{ 623188417Sthompsa struct ural_softc *sc = data->sc; 624184610Salfred 625188417Sthompsa if (data->m != NULL) { 626188417Sthompsa if (data->m->m_flags & M_TXCB) 627188417Sthompsa ieee80211_process_callback(data->ni, data->m, 628188417Sthompsa txerr ? ETIMEDOUT : 0); 629188417Sthompsa m_freem(data->m); 630188417Sthompsa data->m = NULL; 631184610Salfred 632188417Sthompsa ieee80211_free_node(data->ni); 633188417Sthompsa data->ni = NULL; 634188417Sthompsa } 635188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_free, data, next); 636188417Sthompsa sc->tx_nfree++; 637184610Salfred} 638184610Salfred 639188419Sthompsastatic void 640188419Sthompsaural_setup_tx_list(struct ural_softc *sc) 641184610Salfred{ 642188417Sthompsa struct ural_tx_data *data; 643188417Sthompsa int i; 644184610Salfred 645188417Sthompsa sc->tx_nfree = 0; 646188417Sthompsa STAILQ_INIT(&sc->tx_q); 647188417Sthompsa STAILQ_INIT(&sc->tx_free); 648184610Salfred 649188417Sthompsa for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 650188417Sthompsa data = &sc->tx_data[i]; 651184610Salfred 652188417Sthompsa data->sc = sc; 653188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_free, data, next); 654188417Sthompsa sc->tx_nfree++; 655184610Salfred } 656184610Salfred} 657184610Salfred 658184610Salfredstatic void 659188419Sthompsaural_unsetup_tx_list(struct ural_softc *sc) 660184610Salfred{ 661188417Sthompsa struct ural_tx_data *data; 662188417Sthompsa int i; 663184610Salfred 664188419Sthompsa /* make sure any subsequent use of the queues will fail */ 665188419Sthompsa sc->tx_nfree = 0; 666188419Sthompsa STAILQ_INIT(&sc->tx_q); 667188419Sthompsa STAILQ_INIT(&sc->tx_free); 668184610Salfred 669188419Sthompsa /* free up all node references and mbufs */ 670188417Sthompsa for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 671188417Sthompsa data = &sc->tx_data[i]; 672184610Salfred 673188417Sthompsa if (data->m != NULL) { 674188417Sthompsa m_freem(data->m); 675188417Sthompsa data->m = NULL; 676188417Sthompsa } 677188417Sthompsa if (data->ni != NULL) { 678188417Sthompsa ieee80211_free_node(data->ni); 679188417Sthompsa data->ni = NULL; 680188417Sthompsa } 681184610Salfred } 682184610Salfred} 683184610Salfred 684191746Sthompsastatic int 685191746Sthompsaural_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 686184610Salfred{ 687188417Sthompsa struct ural_vap *uvp = URAL_VAP(vap); 688191746Sthompsa struct ieee80211com *ic = vap->iv_ic; 689191746Sthompsa struct ural_softc *sc = ic->ic_ifp->if_softc; 690188417Sthompsa const struct ieee80211_txparam *tp; 691188417Sthompsa struct ieee80211_node *ni; 692188417Sthompsa struct mbuf *m; 693184610Salfred 694191746Sthompsa DPRINTF("%s -> %s\n", 695191746Sthompsa ieee80211_state_name[vap->iv_state], 696191746Sthompsa ieee80211_state_name[nstate]); 697184610Salfred 698191746Sthompsa IEEE80211_UNLOCK(ic); 699191746Sthompsa RAL_LOCK(sc); 700206358Srpaulo usb_callout_stop(&uvp->ratectl_ch); 701191746Sthompsa 702191746Sthompsa switch (nstate) { 703188417Sthompsa case IEEE80211_S_INIT: 704191746Sthompsa if (vap->iv_state == IEEE80211_S_RUN) { 705188417Sthompsa /* abort TSF synchronization */ 706188417Sthompsa ural_write(sc, RAL_TXRX_CSR19, 0); 707184610Salfred 708188417Sthompsa /* force tx led to stop blinking */ 709188417Sthompsa ural_write(sc, RAL_MAC_CSR20, 0); 710188417Sthompsa } 711188417Sthompsa break; 712184610Salfred 713188417Sthompsa case IEEE80211_S_RUN: 714212127Sthompsa ni = ieee80211_ref_node(vap->iv_bss); 715188417Sthompsa 716188417Sthompsa if (vap->iv_opmode != IEEE80211_M_MONITOR) { 717188417Sthompsa ural_update_slot(ic->ic_ifp); 718188417Sthompsa ural_set_txpreamble(sc); 719188417Sthompsa ural_set_basicrates(sc, ic->ic_bsschan); 720188419Sthompsa IEEE80211_ADDR_COPY(sc->sc_bssid, ni->ni_bssid); 721188419Sthompsa ural_set_bssid(sc, sc->sc_bssid); 722188417Sthompsa } 723188417Sthompsa 724188417Sthompsa if (vap->iv_opmode == IEEE80211_M_HOSTAP || 725188417Sthompsa vap->iv_opmode == IEEE80211_M_IBSS) { 726188417Sthompsa m = ieee80211_beacon_alloc(ni, &uvp->bo); 727188417Sthompsa if (m == NULL) { 728188417Sthompsa device_printf(sc->sc_dev, 729188417Sthompsa "could not allocate beacon\n"); 730191746Sthompsa RAL_UNLOCK(sc); 731191746Sthompsa IEEE80211_LOCK(ic); 732212127Sthompsa ieee80211_free_node(ni); 733191746Sthompsa return (-1); 734184610Salfred } 735191710Sthompsa ieee80211_ref_node(ni); 736188417Sthompsa if (ural_tx_bcn(sc, m, ni) != 0) { 737188417Sthompsa device_printf(sc->sc_dev, 738188417Sthompsa "could not send beacon\n"); 739191746Sthompsa RAL_UNLOCK(sc); 740191746Sthompsa IEEE80211_LOCK(ic); 741212127Sthompsa ieee80211_free_node(ni); 742191746Sthompsa return (-1); 743184610Salfred } 744184610Salfred } 745184610Salfred 746188417Sthompsa /* make tx led blink on tx (controlled by ASIC) */ 747188417Sthompsa ural_write(sc, RAL_MAC_CSR20, 1); 748184610Salfred 749188417Sthompsa if (vap->iv_opmode != IEEE80211_M_MONITOR) 750188417Sthompsa ural_enable_tsf_sync(sc); 751192468Ssam else 752192468Ssam ural_enable_tsf(sc); 753184610Salfred 754188417Sthompsa /* enable automatic rate adaptation */ 755192468Ssam /* XXX should use ic_bsschan but not valid until after newstate call below */ 756192468Ssam tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 757188417Sthompsa if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) 758206358Srpaulo ural_ratectl_start(sc, ni); 759212127Sthompsa ieee80211_free_node(ni); 760188417Sthompsa break; 761184610Salfred 762188417Sthompsa default: 763188417Sthompsa break; 764188417Sthompsa } 765188417Sthompsa RAL_UNLOCK(sc); 766188417Sthompsa IEEE80211_LOCK(ic); 767191746Sthompsa return (uvp->newstate(vap, nstate, arg)); 768188417Sthompsa} 769184610Salfred 770184610Salfred 771188417Sthompsastatic void 772194677Sthompsaural_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 773188417Sthompsa{ 774194677Sthompsa struct ural_softc *sc = usbd_xfer_softc(xfer); 775188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 776192468Ssam struct ieee80211vap *vap; 777188417Sthompsa struct ural_tx_data *data; 778188417Sthompsa struct mbuf *m; 779194677Sthompsa struct usb_page_cache *pc; 780194677Sthompsa int len; 781184610Salfred 782194677Sthompsa usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 783194677Sthompsa 784188417Sthompsa switch (USB_GET_STATE(xfer)) { 785188417Sthompsa case USB_ST_TRANSFERRED: 786194677Sthompsa DPRINTFN(11, "transfer complete, %d bytes\n", len); 787184610Salfred 788188417Sthompsa /* free resources */ 789194677Sthompsa data = usbd_xfer_get_priv(xfer); 790188417Sthompsa ural_tx_free(data, 0); 791194677Sthompsa usbd_xfer_set_priv(xfer, NULL); 792184610Salfred 793188417Sthompsa ifp->if_opackets++; 794188417Sthompsa ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 795184610Salfred 796188417Sthompsa /* FALLTHROUGH */ 797188417Sthompsa case USB_ST_SETUP: 798188417Sthompsatr_setup: 799188417Sthompsa data = STAILQ_FIRST(&sc->tx_q); 800188417Sthompsa if (data) { 801188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_q, next); 802188417Sthompsa m = data->m; 803184610Salfred 804188417Sthompsa if (m->m_pkthdr.len > (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE)) { 805188417Sthompsa DPRINTFN(0, "data overflow, %u bytes\n", 806188417Sthompsa m->m_pkthdr.len); 807188417Sthompsa m->m_pkthdr.len = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE); 808188417Sthompsa } 809194677Sthompsa pc = usbd_xfer_get_frame(xfer, 0); 810194677Sthompsa usbd_copy_in(pc, 0, &data->desc, RAL_TX_DESC_SIZE); 811194677Sthompsa usbd_m_copy_in(pc, RAL_TX_DESC_SIZE, m, 0, 812188417Sthompsa m->m_pkthdr.len); 813184610Salfred 814192468Ssam vap = data->ni->ni_vap; 815192468Ssam if (ieee80211_radiotap_active_vap(vap)) { 816188417Sthompsa struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 817184610Salfred 818188417Sthompsa tap->wt_flags = 0; 819188417Sthompsa tap->wt_rate = data->rate; 820188417Sthompsa tap->wt_antenna = sc->tx_ant; 821184610Salfred 822192468Ssam ieee80211_radiotap_tx(vap, m); 823188417Sthompsa } 824184610Salfred 825188417Sthompsa /* xfer length needs to be a multiple of two! */ 826188417Sthompsa len = (RAL_TX_DESC_SIZE + m->m_pkthdr.len + 1) & ~1; 827188417Sthompsa if ((len % 64) == 0) 828188417Sthompsa len += 2; 829184610Salfred 830188417Sthompsa DPRINTFN(11, "sending frame len=%u xferlen=%u\n", 831188417Sthompsa m->m_pkthdr.len, len); 832184610Salfred 833194677Sthompsa usbd_xfer_set_frame_len(xfer, 0, len); 834194677Sthompsa usbd_xfer_set_priv(xfer, data); 835184610Salfred 836194228Sthompsa usbd_transfer_submit(xfer); 837188417Sthompsa } 838198099Sweongyo RAL_UNLOCK(sc); 839198099Sweongyo ural_start(ifp); 840198099Sweongyo RAL_LOCK(sc); 841188417Sthompsa break; 842184610Salfred 843188417Sthompsa default: /* Error */ 844188417Sthompsa DPRINTFN(11, "transfer error, %s\n", 845194677Sthompsa usbd_errstr(error)); 846184610Salfred 847188419Sthompsa ifp->if_oerrors++; 848194677Sthompsa data = usbd_xfer_get_priv(xfer); 849188419Sthompsa if (data != NULL) { 850194677Sthompsa ural_tx_free(data, error); 851194677Sthompsa usbd_xfer_set_priv(xfer, NULL); 852188419Sthompsa } 853188419Sthompsa 854194677Sthompsa if (error == USB_ERR_STALLED) { 855188417Sthompsa /* try to clear stall first */ 856194677Sthompsa usbd_xfer_set_stall(xfer); 857188417Sthompsa goto tr_setup; 858188417Sthompsa } 859194677Sthompsa if (error == USB_ERR_TIMEOUT) 860188417Sthompsa device_printf(sc->sc_dev, "device timeout\n"); 861188417Sthompsa break; 862184610Salfred } 863184610Salfred} 864184610Salfred 865184610Salfredstatic void 866194677Sthompsaural_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 867184610Salfred{ 868194677Sthompsa struct ural_softc *sc = usbd_xfer_softc(xfer); 869184610Salfred struct ifnet *ifp = sc->sc_ifp; 870184610Salfred struct ieee80211com *ic = ifp->if_l2com; 871184610Salfred struct ieee80211_node *ni; 872184610Salfred struct mbuf *m = NULL; 873194677Sthompsa struct usb_page_cache *pc; 874184610Salfred uint32_t flags; 875192468Ssam int8_t rssi = 0, nf = 0; 876194677Sthompsa int len; 877184610Salfred 878194677Sthompsa usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 879194677Sthompsa 880184610Salfred switch (USB_GET_STATE(xfer)) { 881184610Salfred case USB_ST_TRANSFERRED: 882184610Salfred 883194677Sthompsa DPRINTFN(15, "rx done, actlen=%d\n", len); 884184610Salfred 885188417Sthompsa if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 886188417Sthompsa DPRINTF("%s: xfer too short %d\n", 887188417Sthompsa device_get_nameunit(sc->sc_dev), len); 888184610Salfred ifp->if_ierrors++; 889184610Salfred goto tr_setup; 890184610Salfred } 891184610Salfred 892188417Sthompsa len -= RAL_RX_DESC_SIZE; 893188417Sthompsa /* rx descriptor is located at the end */ 894194677Sthompsa pc = usbd_xfer_get_frame(xfer, 0); 895194677Sthompsa usbd_copy_out(pc, len, &sc->sc_rx_desc, RAL_RX_DESC_SIZE); 896184610Salfred 897188417Sthompsa rssi = URAL_RSSI(sc->sc_rx_desc.rssi); 898192468Ssam nf = RAL_NOISE_FLOOR; 899184610Salfred flags = le32toh(sc->sc_rx_desc.flags); 900184610Salfred if (flags & (RAL_RX_PHY_ERROR | RAL_RX_CRC_ERROR)) { 901184610Salfred /* 902184610Salfred * This should not happen since we did not 903184610Salfred * request to receive those frames when we 904184610Salfred * filled RAL_TXRX_CSR2: 905184610Salfred */ 906188417Sthompsa DPRINTFN(5, "PHY or CRC error\n"); 907184610Salfred ifp->if_ierrors++; 908184610Salfred goto tr_setup; 909184610Salfred } 910184610Salfred 911184610Salfred m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 912184610Salfred if (m == NULL) { 913184610Salfred DPRINTF("could not allocate mbuf\n"); 914184610Salfred ifp->if_ierrors++; 915184610Salfred goto tr_setup; 916184610Salfred } 917194677Sthompsa usbd_copy_out(pc, 0, mtod(m, uint8_t *), len); 918184610Salfred 919184610Salfred /* finalize mbuf */ 920184610Salfred m->m_pkthdr.rcvif = ifp; 921188417Sthompsa m->m_pkthdr.len = m->m_len = (flags >> 16) & 0xfff; 922184610Salfred 923192468Ssam if (ieee80211_radiotap_active(ic)) { 924184610Salfred struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 925184610Salfred 926192468Ssam /* XXX set once */ 927192468Ssam tap->wr_flags = 0; 928184610Salfred tap->wr_rate = ieee80211_plcp2rate(sc->sc_rx_desc.rate, 929188417Sthompsa (flags & RAL_RX_OFDM) ? 930184610Salfred IEEE80211_T_OFDM : IEEE80211_T_CCK); 931188417Sthompsa tap->wr_antenna = sc->rx_ant; 932192468Ssam tap->wr_antsignal = nf + rssi; 933192468Ssam tap->wr_antnoise = nf; 934184610Salfred } 935184610Salfred /* Strip trailing 802.11 MAC FCS. */ 936184610Salfred m_adj(m, -IEEE80211_CRC_LEN); 937184610Salfred 938188417Sthompsa /* FALLTHROUGH */ 939184610Salfred case USB_ST_SETUP: 940184610Salfredtr_setup: 941194677Sthompsa usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 942194228Sthompsa usbd_transfer_submit(xfer); 943184610Salfred 944184610Salfred /* 945184610Salfred * At the end of a USB callback it is always safe to unlock 946184610Salfred * the private mutex of a device! That is why we do the 947184610Salfred * "ieee80211_input" here, and not some lines up! 948184610Salfred */ 949198099Sweongyo RAL_UNLOCK(sc); 950184610Salfred if (m) { 951188417Sthompsa ni = ieee80211_find_rxnode(ic, 952188417Sthompsa mtod(m, struct ieee80211_frame_min *)); 953188417Sthompsa if (ni != NULL) { 954192468Ssam (void) ieee80211_input(ni, m, rssi, nf); 955184610Salfred ieee80211_free_node(ni); 956188417Sthompsa } else 957192468Ssam (void) ieee80211_input_all(ic, m, rssi, nf); 958184610Salfred } 959198099Sweongyo if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 && 960198099Sweongyo !IFQ_IS_EMPTY(&ifp->if_snd)) 961198099Sweongyo ural_start(ifp); 962198099Sweongyo RAL_LOCK(sc); 963184610Salfred return; 964184610Salfred 965184610Salfred default: /* Error */ 966194677Sthompsa if (error != USB_ERR_CANCELLED) { 967184610Salfred /* try to clear stall first */ 968194677Sthompsa usbd_xfer_set_stall(xfer); 969188417Sthompsa goto tr_setup; 970184610Salfred } 971184610Salfred return; 972184610Salfred } 973184610Salfred} 974184610Salfred 975184610Salfredstatic uint8_t 976188417Sthompsaural_plcp_signal(int rate) 977184610Salfred{ 978184610Salfred switch (rate) { 979188417Sthompsa /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 980188417Sthompsa case 12: return 0xb; 981188417Sthompsa case 18: return 0xf; 982188417Sthompsa case 24: return 0xa; 983188417Sthompsa case 36: return 0xe; 984188417Sthompsa case 48: return 0x9; 985188417Sthompsa case 72: return 0xd; 986188417Sthompsa case 96: return 0x8; 987188417Sthompsa case 108: return 0xc; 988184610Salfred 989188417Sthompsa /* CCK rates (NB: not IEEE std, device-specific) */ 990188417Sthompsa case 2: return 0x0; 991188417Sthompsa case 4: return 0x1; 992188417Sthompsa case 11: return 0x2; 993188417Sthompsa case 22: return 0x3; 994184610Salfred } 995188417Sthompsa return 0xff; /* XXX unsupported/unknown rate */ 996184610Salfred} 997184610Salfred 998184610Salfredstatic void 999188417Sthompsaural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1000188417Sthompsa uint32_t flags, int len, int rate) 1001184610Salfred{ 1002184610Salfred struct ifnet *ifp = sc->sc_ifp; 1003184610Salfred struct ieee80211com *ic = ifp->if_l2com; 1004184610Salfred uint16_t plcp_length; 1005188417Sthompsa int remainder; 1006184610Salfred 1007188417Sthompsa desc->flags = htole32(flags); 1008188417Sthompsa desc->flags |= htole32(RAL_TX_NEWSEQ); 1009188417Sthompsa desc->flags |= htole32(len << 16); 1010184610Salfred 1011188417Sthompsa desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1012188417Sthompsa desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1013184610Salfred 1014188417Sthompsa /* setup PLCP fields */ 1015188417Sthompsa desc->plcp_signal = ural_plcp_signal(rate); 1016188417Sthompsa desc->plcp_service = 4; 1017188417Sthompsa 1018188417Sthompsa len += IEEE80211_CRC_LEN; 1019190532Ssam if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) { 1020188417Sthompsa desc->flags |= htole32(RAL_TX_OFDM); 1021188417Sthompsa 1022188417Sthompsa plcp_length = len & 0xfff; 1023188417Sthompsa desc->plcp_length_hi = plcp_length >> 6; 1024188417Sthompsa desc->plcp_length_lo = plcp_length & 0x3f; 1025188417Sthompsa } else { 1026188417Sthompsa plcp_length = (16 * len + rate - 1) / rate; 1027188417Sthompsa if (rate == 22) { 1028188417Sthompsa remainder = (16 * len) % 22; 1029188417Sthompsa if (remainder != 0 && remainder < 7) 1030188417Sthompsa desc->plcp_service |= RAL_PLCP_LENGEXT; 1031188417Sthompsa } 1032188417Sthompsa desc->plcp_length_hi = plcp_length >> 8; 1033188417Sthompsa desc->plcp_length_lo = plcp_length & 0xff; 1034188417Sthompsa 1035188417Sthompsa if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1036188417Sthompsa desc->plcp_signal |= 0x08; 1037184610Salfred } 1038184610Salfred 1039188417Sthompsa desc->iv = 0; 1040188417Sthompsa desc->eiv = 0; 1041188417Sthompsa} 1042184610Salfred 1043188417Sthompsa#define RAL_TX_TIMEOUT 5000 1044184610Salfred 1045188417Sthompsastatic int 1046188417Sthompsaural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1047188417Sthompsa{ 1048188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 1049188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 1050188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 1051188417Sthompsa const struct ieee80211_txparam *tp; 1052188417Sthompsa struct ural_tx_data *data; 1053188417Sthompsa 1054188417Sthompsa if (sc->tx_nfree == 0) { 1055188417Sthompsa ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1056188417Sthompsa m_freem(m0); 1057188417Sthompsa ieee80211_free_node(ni); 1058188417Sthompsa return EIO; 1059184610Salfred } 1060188417Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1061188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1062188417Sthompsa sc->tx_nfree--; 1063188417Sthompsa tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_bsschan)]; 1064184610Salfred 1065188417Sthompsa data->m = m0; 1066188417Sthompsa data->ni = ni; 1067188417Sthompsa data->rate = tp->mgmtrate; 1068184610Salfred 1069188417Sthompsa ural_setup_tx_desc(sc, &data->desc, 1070188417Sthompsa RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, m0->m_pkthdr.len, 1071188417Sthompsa tp->mgmtrate); 1072184610Salfred 1073188417Sthompsa DPRINTFN(10, "sending beacon frame len=%u rate=%u\n", 1074188417Sthompsa m0->m_pkthdr.len, tp->mgmtrate); 1075184610Salfred 1076188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1077194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1078184610Salfred 1079188417Sthompsa return (0); 1080188417Sthompsa} 1081184610Salfred 1082188417Sthompsastatic int 1083188417Sthompsaural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1084188417Sthompsa{ 1085188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 1086188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 1087188417Sthompsa const struct ieee80211_txparam *tp; 1088188417Sthompsa struct ural_tx_data *data; 1089188417Sthompsa struct ieee80211_frame *wh; 1090188417Sthompsa struct ieee80211_key *k; 1091188417Sthompsa uint32_t flags; 1092188417Sthompsa uint16_t dur; 1093184610Salfred 1094188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 1095184610Salfred 1096188417Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1097188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1098188417Sthompsa sc->tx_nfree--; 1099184610Salfred 1100188417Sthompsa tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 1101188417Sthompsa 1102188417Sthompsa wh = mtod(m0, struct ieee80211_frame *); 1103188417Sthompsa if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1104188417Sthompsa k = ieee80211_crypto_encap(ni, m0); 1105188417Sthompsa if (k == NULL) { 1106188417Sthompsa m_freem(m0); 1107188417Sthompsa return ENOBUFS; 1108184610Salfred } 1109188417Sthompsa wh = mtod(m0, struct ieee80211_frame *); 1110184610Salfred } 1111184610Salfred 1112188417Sthompsa data->m = m0; 1113188417Sthompsa data->ni = ni; 1114188417Sthompsa data->rate = tp->mgmtrate; 1115184610Salfred 1116188417Sthompsa flags = 0; 1117188417Sthompsa if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1118188417Sthompsa flags |= RAL_TX_ACK; 1119188417Sthompsa 1120190532Ssam dur = ieee80211_ack_duration(ic->ic_rt, tp->mgmtrate, 1121188417Sthompsa ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1122188417Sthompsa *(uint16_t *)wh->i_dur = htole16(dur); 1123188417Sthompsa 1124188417Sthompsa /* tell hardware to add timestamp for probe responses */ 1125188417Sthompsa if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1126188417Sthompsa IEEE80211_FC0_TYPE_MGT && 1127188417Sthompsa (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1128188417Sthompsa IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1129188417Sthompsa flags |= RAL_TX_TIMESTAMP; 1130184610Salfred } 1131184610Salfred 1132188417Sthompsa ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, tp->mgmtrate); 1133184610Salfred 1134188417Sthompsa DPRINTFN(10, "sending mgt frame len=%u rate=%u\n", 1135188417Sthompsa m0->m_pkthdr.len, tp->mgmtrate); 1136184610Salfred 1137188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1138194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1139184610Salfred 1140188417Sthompsa return 0; 1141184610Salfred} 1142184610Salfred 1143188417Sthompsastatic int 1144188417Sthompsaural_sendprot(struct ural_softc *sc, 1145188417Sthompsa const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 1146184610Salfred{ 1147188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 1148188417Sthompsa const struct ieee80211_frame *wh; 1149188417Sthompsa struct ural_tx_data *data; 1150188417Sthompsa struct mbuf *mprot; 1151188417Sthompsa int protrate, ackrate, pktlen, flags, isshort; 1152188417Sthompsa uint16_t dur; 1153184610Salfred 1154188417Sthompsa KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY, 1155188417Sthompsa ("protection %d", prot)); 1156184610Salfred 1157188417Sthompsa wh = mtod(m, const struct ieee80211_frame *); 1158188417Sthompsa pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN; 1159184610Salfred 1160190532Ssam protrate = ieee80211_ctl_rate(ic->ic_rt, rate); 1161190532Ssam ackrate = ieee80211_ack_rate(ic->ic_rt, rate); 1162188417Sthompsa 1163188417Sthompsa isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0; 1164209189Sjkim dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort) 1165190532Ssam + ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1166188417Sthompsa flags = RAL_TX_RETRY(7); 1167188417Sthompsa if (prot == IEEE80211_PROT_RTSCTS) { 1168188417Sthompsa /* NB: CTS is the same size as an ACK */ 1169190532Ssam dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1170188417Sthompsa flags |= RAL_TX_ACK; 1171188417Sthompsa mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur); 1172188417Sthompsa } else { 1173188417Sthompsa mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur); 1174188417Sthompsa } 1175188417Sthompsa if (mprot == NULL) { 1176188417Sthompsa /* XXX stat + msg */ 1177188417Sthompsa return ENOBUFS; 1178188417Sthompsa } 1179188417Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1180188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1181188417Sthompsa sc->tx_nfree--; 1182188417Sthompsa 1183188417Sthompsa data->m = mprot; 1184188417Sthompsa data->ni = ieee80211_ref_node(ni); 1185188417Sthompsa data->rate = protrate; 1186188417Sthompsa ural_setup_tx_desc(sc, &data->desc, flags, mprot->m_pkthdr.len, protrate); 1187188417Sthompsa 1188188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1189194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1190188417Sthompsa 1191188417Sthompsa return 0; 1192188417Sthompsa} 1193188417Sthompsa 1194188417Sthompsastatic int 1195188417Sthompsaural_tx_raw(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni, 1196188417Sthompsa const struct ieee80211_bpf_params *params) 1197188417Sthompsa{ 1198193073Ssam struct ieee80211com *ic = ni->ni_ic; 1199188417Sthompsa struct ural_tx_data *data; 1200188417Sthompsa uint32_t flags; 1201188417Sthompsa int error; 1202188417Sthompsa int rate; 1203188417Sthompsa 1204188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 1205188417Sthompsa KASSERT(params != NULL, ("no raw xmit params")); 1206188417Sthompsa 1207193073Ssam rate = params->ibp_rate0; 1208193073Ssam if (!ieee80211_isratevalid(ic->ic_rt, rate)) { 1209188417Sthompsa m_freem(m0); 1210188417Sthompsa return EINVAL; 1211188417Sthompsa } 1212188417Sthompsa flags = 0; 1213188417Sthompsa if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) 1214188417Sthompsa flags |= RAL_TX_ACK; 1215188417Sthompsa if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) { 1216188417Sthompsa error = ural_sendprot(sc, m0, ni, 1217188417Sthompsa params->ibp_flags & IEEE80211_BPF_RTS ? 1218188417Sthompsa IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY, 1219188417Sthompsa rate); 1220188969Sthompsa if (error || sc->tx_nfree == 0) { 1221188417Sthompsa m_freem(m0); 1222188969Sthompsa return ENOBUFS; 1223184610Salfred } 1224188417Sthompsa flags |= RAL_TX_IFS_SIFS; 1225188417Sthompsa } 1226184610Salfred 1227188969Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1228188969Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1229188969Sthompsa sc->tx_nfree--; 1230188969Sthompsa 1231188417Sthompsa data->m = m0; 1232188417Sthompsa data->ni = ni; 1233188417Sthompsa data->rate = rate; 1234184610Salfred 1235188417Sthompsa /* XXX need to setup descriptor ourself */ 1236188417Sthompsa ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate); 1237184610Salfred 1238188417Sthompsa DPRINTFN(10, "sending raw frame len=%u rate=%u\n", 1239188417Sthompsa m0->m_pkthdr.len, rate); 1240184610Salfred 1241188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1242194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1243184610Salfred 1244188417Sthompsa return 0; 1245188417Sthompsa} 1246184610Salfred 1247188417Sthompsastatic int 1248188417Sthompsaural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1249188417Sthompsa{ 1250188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 1251188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 1252188417Sthompsa struct ural_tx_data *data; 1253188417Sthompsa struct ieee80211_frame *wh; 1254188417Sthompsa const struct ieee80211_txparam *tp; 1255188417Sthompsa struct ieee80211_key *k; 1256188417Sthompsa uint32_t flags = 0; 1257188417Sthompsa uint16_t dur; 1258188417Sthompsa int error, rate; 1259184610Salfred 1260188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 1261184610Salfred 1262188417Sthompsa wh = mtod(m0, struct ieee80211_frame *); 1263184610Salfred 1264188417Sthompsa tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1265188417Sthompsa if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1266188417Sthompsa rate = tp->mcastrate; 1267188417Sthompsa else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1268188417Sthompsa rate = tp->ucastrate; 1269188417Sthompsa else 1270188417Sthompsa rate = ni->ni_txrate; 1271188417Sthompsa 1272188417Sthompsa if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1273188417Sthompsa k = ieee80211_crypto_encap(ni, m0); 1274188417Sthompsa if (k == NULL) { 1275188417Sthompsa m_freem(m0); 1276188417Sthompsa return ENOBUFS; 1277184610Salfred } 1278188417Sthompsa /* packet header may have moved, reset our local pointer */ 1279188417Sthompsa wh = mtod(m0, struct ieee80211_frame *); 1280188417Sthompsa } 1281184610Salfred 1282188417Sthompsa if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1283188417Sthompsa int prot = IEEE80211_PROT_NONE; 1284188417Sthompsa if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 1285188417Sthompsa prot = IEEE80211_PROT_RTSCTS; 1286188417Sthompsa else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1287190532Ssam ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) 1288188417Sthompsa prot = ic->ic_protmode; 1289188417Sthompsa if (prot != IEEE80211_PROT_NONE) { 1290188417Sthompsa error = ural_sendprot(sc, m0, ni, prot, rate); 1291188969Sthompsa if (error || sc->tx_nfree == 0) { 1292188417Sthompsa m_freem(m0); 1293188969Sthompsa return ENOBUFS; 1294188417Sthompsa } 1295188417Sthompsa flags |= RAL_TX_IFS_SIFS; 1296184610Salfred } 1297184610Salfred } 1298184610Salfred 1299188417Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1300188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1301188417Sthompsa sc->tx_nfree--; 1302184610Salfred 1303188417Sthompsa data->m = m0; 1304188417Sthompsa data->ni = ni; 1305188417Sthompsa data->rate = rate; 1306188417Sthompsa 1307188417Sthompsa if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1308188417Sthompsa flags |= RAL_TX_ACK; 1309188417Sthompsa flags |= RAL_TX_RETRY(7); 1310188417Sthompsa 1311190532Ssam dur = ieee80211_ack_duration(ic->ic_rt, rate, 1312188417Sthompsa ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1313188417Sthompsa *(uint16_t *)wh->i_dur = htole16(dur); 1314184610Salfred } 1315184610Salfred 1316188417Sthompsa ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate); 1317184610Salfred 1318188417Sthompsa DPRINTFN(10, "sending data frame len=%u rate=%u\n", 1319188417Sthompsa m0->m_pkthdr.len, rate); 1320184610Salfred 1321188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1322194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1323188417Sthompsa 1324188417Sthompsa return 0; 1325184610Salfred} 1326184610Salfred 1327184610Salfredstatic void 1328188417Sthompsaural_start(struct ifnet *ifp) 1329184610Salfred{ 1330188417Sthompsa struct ural_softc *sc = ifp->if_softc; 1331188417Sthompsa struct ieee80211_node *ni; 1332188417Sthompsa struct mbuf *m; 1333184610Salfred 1334188417Sthompsa RAL_LOCK(sc); 1335188417Sthompsa if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1336188417Sthompsa RAL_UNLOCK(sc); 1337188417Sthompsa return; 1338188417Sthompsa } 1339188417Sthompsa for (;;) { 1340188417Sthompsa IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1341188417Sthompsa if (m == NULL) 1342188417Sthompsa break; 1343188969Sthompsa if (sc->tx_nfree < RAL_TX_MINFREE) { 1344188417Sthompsa IFQ_DRV_PREPEND(&ifp->if_snd, m); 1345188417Sthompsa ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1346188417Sthompsa break; 1347188417Sthompsa } 1348188417Sthompsa ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1349188417Sthompsa if (ural_tx_data(sc, m, ni) != 0) { 1350188417Sthompsa ieee80211_free_node(ni); 1351188417Sthompsa ifp->if_oerrors++; 1352188417Sthompsa break; 1353188417Sthompsa } 1354188417Sthompsa } 1355188417Sthompsa RAL_UNLOCK(sc); 1356184610Salfred} 1357184610Salfred 1358184610Salfredstatic int 1359188417Sthompsaural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1360184610Salfred{ 1361184610Salfred struct ural_softc *sc = ifp->if_softc; 1362184610Salfred struct ieee80211com *ic = ifp->if_l2com; 1363188417Sthompsa struct ifreq *ifr = (struct ifreq *) data; 1364188417Sthompsa int error = 0, startall = 0; 1365184610Salfred 1366184610Salfred switch (cmd) { 1367184610Salfred case SIOCSIFFLAGS: 1368188417Sthompsa RAL_LOCK(sc); 1369184610Salfred if (ifp->if_flags & IFF_UP) { 1370188417Sthompsa if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1371191746Sthompsa ural_init_locked(sc); 1372188417Sthompsa startall = 1; 1373188417Sthompsa } else 1374191746Sthompsa ural_setpromisc(sc); 1375184610Salfred } else { 1376191746Sthompsa if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1377191746Sthompsa ural_stop(sc); 1378184610Salfred } 1379188417Sthompsa RAL_UNLOCK(sc); 1380188417Sthompsa if (startall) 1381188417Sthompsa ieee80211_start_all(ic); 1382184610Salfred break; 1383184610Salfred case SIOCGIFMEDIA: 1384184610Salfred case SIOCSIFMEDIA: 1385188417Sthompsa error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1386184610Salfred break; 1387184610Salfred default: 1388184610Salfred error = ether_ioctl(ifp, cmd, data); 1389188417Sthompsa break; 1390184610Salfred } 1391188417Sthompsa return error; 1392184610Salfred} 1393184610Salfred 1394184610Salfredstatic void 1395188417Sthompsaural_set_testmode(struct ural_softc *sc) 1396184610Salfred{ 1397192984Sthompsa struct usb_device_request req; 1398193045Sthompsa usb_error_t error; 1399184610Salfred 1400188417Sthompsa req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1401188417Sthompsa req.bRequest = RAL_VENDOR_REQUEST; 1402188417Sthompsa USETW(req.wValue, 4); 1403188417Sthompsa USETW(req.wIndex, 1); 1404188417Sthompsa USETW(req.wLength, 0); 1405188417Sthompsa 1406188419Sthompsa error = ural_do_request(sc, &req, NULL); 1407188417Sthompsa if (error != 0) { 1408188417Sthompsa device_printf(sc->sc_dev, "could not set test mode: %s\n", 1409194228Sthompsa usbd_errstr(error)); 1410188417Sthompsa } 1411184610Salfred} 1412184610Salfred 1413184610Salfredstatic void 1414188417Sthompsaural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1415184610Salfred{ 1416192984Sthompsa struct usb_device_request req; 1417193045Sthompsa usb_error_t error; 1418184610Salfred 1419188417Sthompsa req.bmRequestType = UT_READ_VENDOR_DEVICE; 1420188417Sthompsa req.bRequest = RAL_READ_EEPROM; 1421188417Sthompsa USETW(req.wValue, 0); 1422188417Sthompsa USETW(req.wIndex, addr); 1423188417Sthompsa USETW(req.wLength, len); 1424184610Salfred 1425188419Sthompsa error = ural_do_request(sc, &req, buf); 1426188417Sthompsa if (error != 0) { 1427188417Sthompsa device_printf(sc->sc_dev, "could not read EEPROM: %s\n", 1428194228Sthompsa usbd_errstr(error)); 1429184610Salfred } 1430188417Sthompsa} 1431184610Salfred 1432188417Sthompsastatic uint16_t 1433188417Sthompsaural_read(struct ural_softc *sc, uint16_t reg) 1434188417Sthompsa{ 1435192984Sthompsa struct usb_device_request req; 1436193045Sthompsa usb_error_t error; 1437188417Sthompsa uint16_t val; 1438184610Salfred 1439188417Sthompsa req.bmRequestType = UT_READ_VENDOR_DEVICE; 1440188417Sthompsa req.bRequest = RAL_READ_MAC; 1441188417Sthompsa USETW(req.wValue, 0); 1442188417Sthompsa USETW(req.wIndex, reg); 1443188417Sthompsa USETW(req.wLength, sizeof (uint16_t)); 1444188417Sthompsa 1445188419Sthompsa error = ural_do_request(sc, &req, &val); 1446188417Sthompsa if (error != 0) { 1447188417Sthompsa device_printf(sc->sc_dev, "could not read MAC register: %s\n", 1448194228Sthompsa usbd_errstr(error)); 1449188417Sthompsa return 0; 1450184610Salfred } 1451184610Salfred 1452188417Sthompsa return le16toh(val); 1453184610Salfred} 1454184610Salfred 1455188417Sthompsastatic void 1456188417Sthompsaural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1457184610Salfred{ 1458192984Sthompsa struct usb_device_request req; 1459193045Sthompsa usb_error_t error; 1460184610Salfred 1461188417Sthompsa req.bmRequestType = UT_READ_VENDOR_DEVICE; 1462188417Sthompsa req.bRequest = RAL_READ_MULTI_MAC; 1463188417Sthompsa USETW(req.wValue, 0); 1464188417Sthompsa USETW(req.wIndex, reg); 1465188417Sthompsa USETW(req.wLength, len); 1466184610Salfred 1467188419Sthompsa error = ural_do_request(sc, &req, buf); 1468188417Sthompsa if (error != 0) { 1469188417Sthompsa device_printf(sc->sc_dev, "could not read MAC register: %s\n", 1470194228Sthompsa usbd_errstr(error)); 1471184610Salfred } 1472188417Sthompsa} 1473188417Sthompsa 1474188417Sthompsastatic void 1475188417Sthompsaural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1476188417Sthompsa{ 1477192984Sthompsa struct usb_device_request req; 1478193045Sthompsa usb_error_t error; 1479188417Sthompsa 1480188417Sthompsa req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1481188417Sthompsa req.bRequest = RAL_WRITE_MAC; 1482188417Sthompsa USETW(req.wValue, val); 1483188417Sthompsa USETW(req.wIndex, reg); 1484188417Sthompsa USETW(req.wLength, 0); 1485188417Sthompsa 1486188419Sthompsa error = ural_do_request(sc, &req, NULL); 1487188417Sthompsa if (error != 0) { 1488188417Sthompsa device_printf(sc->sc_dev, "could not write MAC register: %s\n", 1489194228Sthompsa usbd_errstr(error)); 1490184610Salfred } 1491188417Sthompsa} 1492184610Salfred 1493188417Sthompsastatic void 1494188417Sthompsaural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1495188417Sthompsa{ 1496192984Sthompsa struct usb_device_request req; 1497193045Sthompsa usb_error_t error; 1498184610Salfred 1499188417Sthompsa req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1500188417Sthompsa req.bRequest = RAL_WRITE_MULTI_MAC; 1501188417Sthompsa USETW(req.wValue, 0); 1502188417Sthompsa USETW(req.wIndex, reg); 1503188417Sthompsa USETW(req.wLength, len); 1504184610Salfred 1505188419Sthompsa error = ural_do_request(sc, &req, buf); 1506188417Sthompsa if (error != 0) { 1507188417Sthompsa device_printf(sc->sc_dev, "could not write MAC register: %s\n", 1508194228Sthompsa usbd_errstr(error)); 1509188417Sthompsa } 1510184610Salfred} 1511184610Salfred 1512184610Salfredstatic void 1513188417Sthompsaural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1514184610Salfred{ 1515188417Sthompsa uint16_t tmp; 1516188417Sthompsa int ntries; 1517184610Salfred 1518188619Sthompsa for (ntries = 0; ntries < 100; ntries++) { 1519188417Sthompsa if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1520188417Sthompsa break; 1521188619Sthompsa if (ural_pause(sc, hz / 100)) 1522188619Sthompsa break; 1523188417Sthompsa } 1524188619Sthompsa if (ntries == 100) { 1525188417Sthompsa device_printf(sc->sc_dev, "could not write to BBP\n"); 1526188417Sthompsa return; 1527188417Sthompsa } 1528184610Salfred 1529188417Sthompsa tmp = reg << 8 | val; 1530188417Sthompsa ural_write(sc, RAL_PHY_CSR7, tmp); 1531188417Sthompsa} 1532184610Salfred 1533188417Sthompsastatic uint8_t 1534188417Sthompsaural_bbp_read(struct ural_softc *sc, uint8_t reg) 1535188417Sthompsa{ 1536188417Sthompsa uint16_t val; 1537188417Sthompsa int ntries; 1538184610Salfred 1539188417Sthompsa val = RAL_BBP_WRITE | reg << 8; 1540188417Sthompsa ural_write(sc, RAL_PHY_CSR7, val); 1541188417Sthompsa 1542188619Sthompsa for (ntries = 0; ntries < 100; ntries++) { 1543188417Sthompsa if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1544188417Sthompsa break; 1545188619Sthompsa if (ural_pause(sc, hz / 100)) 1546188619Sthompsa break; 1547188417Sthompsa } 1548188619Sthompsa if (ntries == 100) { 1549188417Sthompsa device_printf(sc->sc_dev, "could not read BBP\n"); 1550188417Sthompsa return 0; 1551188417Sthompsa } 1552188417Sthompsa 1553188417Sthompsa return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1554184610Salfred} 1555184610Salfred 1556184610Salfredstatic void 1557188417Sthompsaural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1558184610Salfred{ 1559188417Sthompsa uint32_t tmp; 1560188417Sthompsa int ntries; 1561188417Sthompsa 1562188619Sthompsa for (ntries = 0; ntries < 100; ntries++) { 1563188417Sthompsa if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1564188417Sthompsa break; 1565188619Sthompsa if (ural_pause(sc, hz / 100)) 1566188619Sthompsa break; 1567188417Sthompsa } 1568188619Sthompsa if (ntries == 100) { 1569188417Sthompsa device_printf(sc->sc_dev, "could not write to RF\n"); 1570188417Sthompsa return; 1571188417Sthompsa } 1572188417Sthompsa 1573188417Sthompsa tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1574188417Sthompsa ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1575188417Sthompsa ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1576188417Sthompsa 1577188417Sthompsa /* remember last written value in sc */ 1578188417Sthompsa sc->rf_regs[reg] = val; 1579188417Sthompsa 1580188417Sthompsa DPRINTFN(15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff); 1581184610Salfred} 1582184610Salfred 1583184610Salfredstatic void 1584188417Sthompsaural_scan_start(struct ieee80211com *ic) 1585184610Salfred{ 1586191746Sthompsa struct ifnet *ifp = ic->ic_ifp; 1587191746Sthompsa struct ural_softc *sc = ifp->if_softc; 1588188417Sthompsa 1589188417Sthompsa RAL_LOCK(sc); 1590191746Sthompsa ural_write(sc, RAL_TXRX_CSR19, 0); 1591191746Sthompsa ural_set_bssid(sc, ifp->if_broadcastaddr); 1592188417Sthompsa RAL_UNLOCK(sc); 1593184610Salfred} 1594184610Salfred 1595184610Salfredstatic void 1596188417Sthompsaural_scan_end(struct ieee80211com *ic) 1597184610Salfred{ 1598188417Sthompsa struct ural_softc *sc = ic->ic_ifp->if_softc; 1599188417Sthompsa 1600188417Sthompsa RAL_LOCK(sc); 1601191746Sthompsa ural_enable_tsf_sync(sc); 1602191746Sthompsa ural_set_bssid(sc, sc->sc_bssid); 1603188417Sthompsa RAL_UNLOCK(sc); 1604188417Sthompsa 1605184610Salfred} 1606184610Salfred 1607184610Salfredstatic void 1608188417Sthompsaural_set_channel(struct ieee80211com *ic) 1609184610Salfred{ 1610188417Sthompsa struct ural_softc *sc = ic->ic_ifp->if_softc; 1611188417Sthompsa 1612188417Sthompsa RAL_LOCK(sc); 1613191746Sthompsa ural_set_chan(sc, ic->ic_curchan); 1614188417Sthompsa RAL_UNLOCK(sc); 1615184610Salfred} 1616184610Salfred 1617184610Salfredstatic void 1618188417Sthompsaural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1619184610Salfred{ 1620188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 1621188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 1622188417Sthompsa uint8_t power, tmp; 1623188619Sthompsa int i, chan; 1624184610Salfred 1625188417Sthompsa chan = ieee80211_chan2ieee(ic, c); 1626188417Sthompsa if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1627188417Sthompsa return; 1628184610Salfred 1629188417Sthompsa if (IEEE80211_IS_CHAN_2GHZ(c)) 1630188417Sthompsa power = min(sc->txpow[chan - 1], 31); 1631184610Salfred else 1632184610Salfred power = 31; 1633184610Salfred 1634184610Salfred /* adjust txpower using ifconfig settings */ 1635188417Sthompsa power -= (100 - ic->ic_txpowlimit) / 8; 1636184610Salfred 1637188417Sthompsa DPRINTFN(2, "setting channel to %u, txpower to %u\n", chan, power); 1638184610Salfred 1639188417Sthompsa switch (sc->rf_rev) { 1640184610Salfred case RAL_RF_2522: 1641188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x00814); 1642188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1643188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1644184610Salfred break; 1645184610Salfred 1646184610Salfred case RAL_RF_2523: 1647188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08804); 1648188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1649188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1650188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1651184610Salfred break; 1652184610Salfred 1653184610Salfred case RAL_RF_2524: 1654188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x0c808); 1655188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1656188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1657188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1658184610Salfred break; 1659184610Salfred 1660184610Salfred case RAL_RF_2525: 1661188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08808); 1662188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1663188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1664188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1665184610Salfred 1666188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08808); 1667188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1668188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1669188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1670184610Salfred break; 1671184610Salfred 1672184610Salfred case RAL_RF_2525E: 1673188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08808); 1674188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1675188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1676188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1677184610Salfred break; 1678184610Salfred 1679184610Salfred case RAL_RF_2526: 1680188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1681188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1682188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08804); 1683184610Salfred 1684188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1685188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1686188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1687184610Salfred break; 1688184610Salfred 1689188417Sthompsa /* dual-band RF */ 1690184610Salfred case RAL_RF_5222: 1691188417Sthompsa for (i = 0; ural_rf5222[i].chan != chan; i++); 1692188417Sthompsa 1693188417Sthompsa ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1694188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1695188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1696188417Sthompsa ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1697184610Salfred break; 1698184610Salfred } 1699184610Salfred 1700188417Sthompsa if (ic->ic_opmode != IEEE80211_M_MONITOR && 1701188417Sthompsa (ic->ic_flags & IEEE80211_F_SCAN) == 0) { 1702184610Salfred /* set Japan filter bit for channel 14 */ 1703188417Sthompsa tmp = ural_bbp_read(sc, 70); 1704184610Salfred 1705188417Sthompsa tmp &= ~RAL_JAPAN_FILTER; 1706188417Sthompsa if (chan == 14) 1707184610Salfred tmp |= RAL_JAPAN_FILTER; 1708184610Salfred 1709188417Sthompsa ural_bbp_write(sc, 70, tmp); 1710184610Salfred 1711184610Salfred /* clear CRC errors */ 1712188417Sthompsa ural_read(sc, RAL_STA_CSR0); 1713184610Salfred 1714188619Sthompsa ural_pause(sc, hz / 100); 1715188417Sthompsa ural_disable_rf_tune(sc); 1716184610Salfred } 1717188417Sthompsa 1718188417Sthompsa /* XXX doesn't belong here */ 1719184610Salfred /* update basic rate set */ 1720188417Sthompsa ural_set_basicrates(sc, c); 1721189123Sthompsa 1722189123Sthompsa /* give the hardware some time to do the switchover */ 1723189123Sthompsa ural_pause(sc, hz / 100); 1724184610Salfred} 1725184610Salfred 1726188417Sthompsa/* 1727188417Sthompsa * Disable RF auto-tuning. 1728188417Sthompsa */ 1729184610Salfredstatic void 1730188417Sthompsaural_disable_rf_tune(struct ural_softc *sc) 1731184610Salfred{ 1732188417Sthompsa uint32_t tmp; 1733184610Salfred 1734188417Sthompsa if (sc->rf_rev != RAL_RF_2523) { 1735188417Sthompsa tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1736188417Sthompsa ural_rf_write(sc, RAL_RF1, tmp); 1737184610Salfred } 1738184610Salfred 1739188417Sthompsa tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1740188417Sthompsa ural_rf_write(sc, RAL_RF3, tmp); 1741184610Salfred 1742188417Sthompsa DPRINTFN(2, "disabling RF autotune\n"); 1743184610Salfred} 1744184610Salfred 1745188417Sthompsa/* 1746188417Sthompsa * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1747188417Sthompsa * synchronization. 1748188417Sthompsa */ 1749184610Salfredstatic void 1750188417Sthompsaural_enable_tsf_sync(struct ural_softc *sc) 1751184610Salfred{ 1752188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 1753188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 1754188417Sthompsa struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1755188417Sthompsa uint16_t logcwmin, preload, tmp; 1756184610Salfred 1757184610Salfred /* first, disable TSF synchronization */ 1758188417Sthompsa ural_write(sc, RAL_TXRX_CSR19, 0); 1759184610Salfred 1760188417Sthompsa tmp = (16 * vap->iv_bss->ni_intval) << 4; 1761188417Sthompsa ural_write(sc, RAL_TXRX_CSR18, tmp); 1762184610Salfred 1763188417Sthompsa logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1764188417Sthompsa preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1765188417Sthompsa tmp = logcwmin << 12 | preload; 1766188417Sthompsa ural_write(sc, RAL_TXRX_CSR20, tmp); 1767184610Salfred 1768184610Salfred /* finally, enable TSF synchronization */ 1769184610Salfred tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1770188417Sthompsa if (ic->ic_opmode == IEEE80211_M_STA) 1771184610Salfred tmp |= RAL_ENABLE_TSF_SYNC(1); 1772184610Salfred else 1773184610Salfred tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1774188417Sthompsa ural_write(sc, RAL_TXRX_CSR19, tmp); 1775184610Salfred 1776184610Salfred DPRINTF("enabling TSF synchronization\n"); 1777184610Salfred} 1778184610Salfred 1779192468Ssamstatic void 1780192468Ssamural_enable_tsf(struct ural_softc *sc) 1781192468Ssam{ 1782192468Ssam /* first, disable TSF synchronization */ 1783192468Ssam ural_write(sc, RAL_TXRX_CSR19, 0); 1784192468Ssam ural_write(sc, RAL_TXRX_CSR19, RAL_ENABLE_TSF | RAL_ENABLE_TSF_SYNC(2)); 1785192468Ssam} 1786192468Ssam 1787188417Sthompsa#define RAL_RXTX_TURNAROUND 5 /* us */ 1788184610Salfredstatic void 1789188417Sthompsaural_update_slot(struct ifnet *ifp) 1790184610Salfred{ 1791188417Sthompsa struct ural_softc *sc = ifp->if_softc; 1792188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 1793188417Sthompsa uint16_t slottime, sifs, eifs; 1794184610Salfred 1795188417Sthompsa slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1796184610Salfred 1797184610Salfred /* 1798184610Salfred * These settings may sound a bit inconsistent but this is what the 1799184610Salfred * reference driver does. 1800184610Salfred */ 1801188417Sthompsa if (ic->ic_curmode == IEEE80211_MODE_11B) { 1802184610Salfred sifs = 16 - RAL_RXTX_TURNAROUND; 1803184610Salfred eifs = 364; 1804184610Salfred } else { 1805184610Salfred sifs = 10 - RAL_RXTX_TURNAROUND; 1806184610Salfred eifs = 64; 1807184610Salfred } 1808184610Salfred 1809188417Sthompsa ural_write(sc, RAL_MAC_CSR10, slottime); 1810188417Sthompsa ural_write(sc, RAL_MAC_CSR11, sifs); 1811188417Sthompsa ural_write(sc, RAL_MAC_CSR12, eifs); 1812184610Salfred} 1813184610Salfred 1814184610Salfredstatic void 1815188417Sthompsaural_set_txpreamble(struct ural_softc *sc) 1816184610Salfred{ 1817188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 1818188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 1819184610Salfred uint16_t tmp; 1820184610Salfred 1821188417Sthompsa tmp = ural_read(sc, RAL_TXRX_CSR10); 1822184610Salfred 1823188417Sthompsa tmp &= ~RAL_SHORT_PREAMBLE; 1824188417Sthompsa if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1825184610Salfred tmp |= RAL_SHORT_PREAMBLE; 1826184610Salfred 1827188417Sthompsa ural_write(sc, RAL_TXRX_CSR10, tmp); 1828184610Salfred} 1829184610Salfred 1830184610Salfredstatic void 1831188417Sthompsaural_set_basicrates(struct ural_softc *sc, const struct ieee80211_channel *c) 1832184610Salfred{ 1833188417Sthompsa /* XXX wrong, take from rate set */ 1834188417Sthompsa /* update basic rate set */ 1835188417Sthompsa if (IEEE80211_IS_CHAN_5GHZ(c)) { 1836188417Sthompsa /* 11a basic rates: 6, 12, 24Mbps */ 1837188417Sthompsa ural_write(sc, RAL_TXRX_CSR11, 0x150); 1838188417Sthompsa } else if (IEEE80211_IS_CHAN_ANYG(c)) { 1839188417Sthompsa /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1840188417Sthompsa ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1841188417Sthompsa } else { 1842188417Sthompsa /* 11b basic rates: 1, 2Mbps */ 1843188417Sthompsa ural_write(sc, RAL_TXRX_CSR11, 0x3); 1844188417Sthompsa } 1845184610Salfred} 1846184610Salfred 1847184610Salfredstatic void 1848188417Sthompsaural_set_bssid(struct ural_softc *sc, const uint8_t *bssid) 1849184610Salfred{ 1850188417Sthompsa uint16_t tmp; 1851184610Salfred 1852188417Sthompsa tmp = bssid[0] | bssid[1] << 8; 1853188417Sthompsa ural_write(sc, RAL_MAC_CSR5, tmp); 1854188417Sthompsa 1855188417Sthompsa tmp = bssid[2] | bssid[3] << 8; 1856188417Sthompsa ural_write(sc, RAL_MAC_CSR6, tmp); 1857188417Sthompsa 1858188417Sthompsa tmp = bssid[4] | bssid[5] << 8; 1859188417Sthompsa ural_write(sc, RAL_MAC_CSR7, tmp); 1860188417Sthompsa 1861188417Sthompsa DPRINTF("setting BSSID to %6D\n", bssid, ":"); 1862184610Salfred} 1863184610Salfred 1864184610Salfredstatic void 1865188417Sthompsaural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1866184610Salfred{ 1867184610Salfred uint16_t tmp; 1868184610Salfred 1869188417Sthompsa tmp = addr[0] | addr[1] << 8; 1870188417Sthompsa ural_write(sc, RAL_MAC_CSR2, tmp); 1871184610Salfred 1872188417Sthompsa tmp = addr[2] | addr[3] << 8; 1873188417Sthompsa ural_write(sc, RAL_MAC_CSR3, tmp); 1874184610Salfred 1875188417Sthompsa tmp = addr[4] | addr[5] << 8; 1876188417Sthompsa ural_write(sc, RAL_MAC_CSR4, tmp); 1877184610Salfred 1878188417Sthompsa DPRINTF("setting MAC address to %6D\n", addr, ":"); 1879184610Salfred} 1880184610Salfred 1881184610Salfredstatic void 1882191746Sthompsaural_setpromisc(struct ural_softc *sc) 1883184610Salfred{ 1884188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 1885188417Sthompsa uint32_t tmp; 1886184610Salfred 1887188417Sthompsa tmp = ural_read(sc, RAL_TXRX_CSR2); 1888184610Salfred 1889188417Sthompsa tmp &= ~RAL_DROP_NOT_TO_ME; 1890188417Sthompsa if (!(ifp->if_flags & IFF_PROMISC)) 1891188417Sthompsa tmp |= RAL_DROP_NOT_TO_ME; 1892184610Salfred 1893188417Sthompsa ural_write(sc, RAL_TXRX_CSR2, tmp); 1894184610Salfred 1895188417Sthompsa DPRINTF("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1896188417Sthompsa "entering" : "leaving"); 1897184610Salfred} 1898184610Salfred 1899189123Sthompsastatic void 1900189123Sthompsaural_update_promisc(struct ifnet *ifp) 1901189123Sthompsa{ 1902189123Sthompsa struct ural_softc *sc = ifp->if_softc; 1903189123Sthompsa 1904189123Sthompsa if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1905189123Sthompsa return; 1906189123Sthompsa 1907189123Sthompsa RAL_LOCK(sc); 1908191746Sthompsa ural_setpromisc(sc); 1909189123Sthompsa RAL_UNLOCK(sc); 1910189123Sthompsa} 1911189123Sthompsa 1912188417Sthompsastatic const char * 1913188417Sthompsaural_get_rf(int rev) 1914184610Salfred{ 1915188417Sthompsa switch (rev) { 1916188417Sthompsa case RAL_RF_2522: return "RT2522"; 1917188417Sthompsa case RAL_RF_2523: return "RT2523"; 1918188417Sthompsa case RAL_RF_2524: return "RT2524"; 1919188417Sthompsa case RAL_RF_2525: return "RT2525"; 1920188417Sthompsa case RAL_RF_2525E: return "RT2525e"; 1921188417Sthompsa case RAL_RF_2526: return "RT2526"; 1922188417Sthompsa case RAL_RF_5222: return "RT5222"; 1923188417Sthompsa default: return "unknown"; 1924184610Salfred } 1925184610Salfred} 1926184610Salfred 1927184610Salfredstatic void 1928188417Sthompsaural_read_eeprom(struct ural_softc *sc) 1929184610Salfred{ 1930184610Salfred uint16_t val; 1931184610Salfred 1932188417Sthompsa ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1933184610Salfred val = le16toh(val); 1934188417Sthompsa sc->rf_rev = (val >> 11) & 0x7; 1935188417Sthompsa sc->hw_radio = (val >> 10) & 0x1; 1936188417Sthompsa sc->led_mode = (val >> 6) & 0x7; 1937188417Sthompsa sc->rx_ant = (val >> 4) & 0x3; 1938188417Sthompsa sc->tx_ant = (val >> 2) & 0x3; 1939188417Sthompsa sc->nb_ant = val & 0x3; 1940184610Salfred 1941184610Salfred /* read MAC address */ 1942188419Sthompsa ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, sc->sc_bssid, 6); 1943184610Salfred 1944184610Salfred /* read default values for BBP registers */ 1945188417Sthompsa ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 1946184610Salfred 1947184610Salfred /* read Tx power for all b/g channels */ 1948188417Sthompsa ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 1949184610Salfred} 1950184610Salfred 1951188417Sthompsastatic int 1952188417Sthompsaural_bbp_init(struct ural_softc *sc) 1953184610Salfred{ 1954188417Sthompsa#define N(a) (sizeof (a) / sizeof ((a)[0])) 1955188417Sthompsa int i, ntries; 1956184610Salfred 1957188417Sthompsa /* wait for BBP to be ready */ 1958188417Sthompsa for (ntries = 0; ntries < 100; ntries++) { 1959188417Sthompsa if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 1960188417Sthompsa break; 1961188619Sthompsa if (ural_pause(sc, hz / 100)) 1962188619Sthompsa break; 1963184610Salfred } 1964188417Sthompsa if (ntries == 100) { 1965188417Sthompsa device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 1966188417Sthompsa return EIO; 1967188417Sthompsa } 1968184610Salfred 1969184610Salfred /* initialize BBP registers to default values */ 1970188417Sthompsa for (i = 0; i < N(ural_def_bbp); i++) 1971188417Sthompsa ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 1972184610Salfred 1973184610Salfred#if 0 1974184610Salfred /* initialize BBP registers to values stored in EEPROM */ 1975184610Salfred for (i = 0; i < 16; i++) { 1976188417Sthompsa if (sc->bbp_prom[i].reg == 0xff) 1977184610Salfred continue; 1978188417Sthompsa ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 1979184610Salfred } 1980184610Salfred#endif 1981188417Sthompsa 1982188417Sthompsa return 0; 1983188417Sthompsa#undef N 1984184610Salfred} 1985184610Salfred 1986184610Salfredstatic void 1987188417Sthompsaural_set_txantenna(struct ural_softc *sc, int antenna) 1988184610Salfred{ 1989188417Sthompsa uint16_t tmp; 1990188417Sthompsa uint8_t tx; 1991184610Salfred 1992188417Sthompsa tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 1993188417Sthompsa if (antenna == 1) 1994188417Sthompsa tx |= RAL_BBP_ANTA; 1995188417Sthompsa else if (antenna == 2) 1996188417Sthompsa tx |= RAL_BBP_ANTB; 1997188417Sthompsa else 1998188417Sthompsa tx |= RAL_BBP_DIVERSITY; 1999184610Salfred 2000188417Sthompsa /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2001188417Sthompsa if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2002188417Sthompsa sc->rf_rev == RAL_RF_5222) 2003188417Sthompsa tx |= RAL_BBP_FLIPIQ; 2004184610Salfred 2005188417Sthompsa ural_bbp_write(sc, RAL_BBP_TX, tx); 2006184610Salfred 2007188417Sthompsa /* update values in PHY_CSR5 and PHY_CSR6 */ 2008188417Sthompsa tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2009188417Sthompsa ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2010184610Salfred 2011188417Sthompsa tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2012188417Sthompsa ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2013184610Salfred} 2014184610Salfred 2015184610Salfredstatic void 2016188417Sthompsaural_set_rxantenna(struct ural_softc *sc, int antenna) 2017184610Salfred{ 2018188417Sthompsa uint8_t rx; 2019188417Sthompsa 2020188417Sthompsa rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2021188417Sthompsa if (antenna == 1) 2022188417Sthompsa rx |= RAL_BBP_ANTA; 2023188417Sthompsa else if (antenna == 2) 2024188417Sthompsa rx |= RAL_BBP_ANTB; 2025188417Sthompsa else 2026188417Sthompsa rx |= RAL_BBP_DIVERSITY; 2027188417Sthompsa 2028188417Sthompsa /* need to force no I/Q flip for RF 2525e and 2526 */ 2029188417Sthompsa if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2030188417Sthompsa rx &= ~RAL_BBP_FLIPIQ; 2031188417Sthompsa 2032188417Sthompsa ural_bbp_write(sc, RAL_BBP_RX, rx); 2033188417Sthompsa} 2034188417Sthompsa 2035188417Sthompsastatic void 2036191746Sthompsaural_init_locked(struct ural_softc *sc) 2037188417Sthompsa{ 2038188417Sthompsa#define N(a) (sizeof (a) / sizeof ((a)[0])) 2039188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 2040188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 2041184610Salfred uint16_t tmp; 2042188417Sthompsa int i, ntries; 2043184610Salfred 2044188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 2045184610Salfred 2046188417Sthompsa ural_set_testmode(sc); 2047188417Sthompsa ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2048184610Salfred 2049191746Sthompsa ural_stop(sc); 2050184610Salfred 2051184610Salfred /* initialize MAC registers to default values */ 2052188417Sthompsa for (i = 0; i < N(ural_def_mac); i++) 2053188417Sthompsa ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2054184610Salfred 2055184610Salfred /* wait for BBP and RF to wake up (this can take a long time!) */ 2056188417Sthompsa for (ntries = 0; ntries < 100; ntries++) { 2057188417Sthompsa tmp = ural_read(sc, RAL_MAC_CSR17); 2058188417Sthompsa if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2059188417Sthompsa (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2060188417Sthompsa break; 2061188619Sthompsa if (ural_pause(sc, hz / 100)) 2062188619Sthompsa break; 2063184610Salfred } 2064188417Sthompsa if (ntries == 100) { 2065188417Sthompsa device_printf(sc->sc_dev, 2066188417Sthompsa "timeout waiting for BBP/RF to wakeup\n"); 2067188417Sthompsa goto fail; 2068188417Sthompsa } 2069184610Salfred 2070184610Salfred /* we're ready! */ 2071188417Sthompsa ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2072184610Salfred 2073184610Salfred /* set basic rate set (will be updated later) */ 2074188417Sthompsa ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2075184610Salfred 2076188417Sthompsa if (ural_bbp_init(sc) != 0) 2077184610Salfred goto fail; 2078184610Salfred 2079188417Sthompsa ural_set_chan(sc, ic->ic_curchan); 2080188417Sthompsa 2081184610Salfred /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2082188417Sthompsa ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2083184610Salfred 2084188417Sthompsa ural_set_txantenna(sc, sc->tx_ant); 2085188417Sthompsa ural_set_rxantenna(sc, sc->rx_ant); 2086184610Salfred 2087190526Ssam ural_set_macaddr(sc, IF_LLADDR(ifp)); 2088184610Salfred 2089184610Salfred /* 2090188417Sthompsa * Allocate Tx and Rx xfer queues. 2091184610Salfred */ 2092188419Sthompsa ural_setup_tx_list(sc); 2093184610Salfred 2094188417Sthompsa /* kick Rx */ 2095184610Salfred tmp = RAL_DROP_PHY | RAL_DROP_CRC; 2096188417Sthompsa if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2097188417Sthompsa tmp |= RAL_DROP_CTL | RAL_DROP_BAD_VERSION; 2098188417Sthompsa if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2099184610Salfred tmp |= RAL_DROP_TODS; 2100188417Sthompsa if (!(ifp->if_flags & IFF_PROMISC)) 2101184610Salfred tmp |= RAL_DROP_NOT_TO_ME; 2102184610Salfred } 2103188417Sthompsa ural_write(sc, RAL_TXRX_CSR2, tmp); 2104184610Salfred 2105188417Sthompsa ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2106188417Sthompsa ifp->if_drv_flags |= IFF_DRV_RUNNING; 2107194677Sthompsa usbd_xfer_set_stall(sc->sc_xfer[URAL_BULK_WR]); 2108194228Sthompsa usbd_transfer_start(sc->sc_xfer[URAL_BULK_RD]); 2109184610Salfred return; 2110184610Salfred 2111191746Sthompsafail: ural_stop(sc); 2112188417Sthompsa#undef N 2113184610Salfred} 2114184610Salfred 2115184610Salfredstatic void 2116188417Sthompsaural_init(void *priv) 2117184610Salfred{ 2118188417Sthompsa struct ural_softc *sc = priv; 2119184610Salfred struct ifnet *ifp = sc->sc_ifp; 2120188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 2121184610Salfred 2122188417Sthompsa RAL_LOCK(sc); 2123191746Sthompsa ural_init_locked(sc); 2124188417Sthompsa RAL_UNLOCK(sc); 2125184610Salfred 2126188417Sthompsa if (ifp->if_drv_flags & IFF_DRV_RUNNING) 2127188417Sthompsa ieee80211_start_all(ic); /* start all vap's */ 2128184610Salfred} 2129184610Salfred 2130184610Salfredstatic void 2131191746Sthompsaural_stop(struct ural_softc *sc) 2132184610Salfred{ 2133184610Salfred struct ifnet *ifp = sc->sc_ifp; 2134184610Salfred 2135188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 2136184610Salfred 2137188417Sthompsa ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2138184610Salfred 2139184610Salfred /* 2140188419Sthompsa * Drain all the transfers, if not already drained: 2141184610Salfred */ 2142188419Sthompsa RAL_UNLOCK(sc); 2143194228Sthompsa usbd_transfer_drain(sc->sc_xfer[URAL_BULK_WR]); 2144194228Sthompsa usbd_transfer_drain(sc->sc_xfer[URAL_BULK_RD]); 2145188419Sthompsa RAL_LOCK(sc); 2146184610Salfred 2147188419Sthompsa ural_unsetup_tx_list(sc); 2148184610Salfred 2149188417Sthompsa /* disable Rx */ 2150188417Sthompsa ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2151188417Sthompsa /* reset ASIC and BBP (but won't reset MAC registers!) */ 2152188417Sthompsa ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2153188619Sthompsa /* wait a little */ 2154188619Sthompsa ural_pause(sc, hz / 10); 2155188417Sthompsa ural_write(sc, RAL_MAC_CSR1, 0); 2156189123Sthompsa /* wait a little */ 2157189123Sthompsa ural_pause(sc, hz / 10); 2158184610Salfred} 2159184610Salfred 2160188417Sthompsastatic int 2161188417Sthompsaural_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2162188417Sthompsa const struct ieee80211_bpf_params *params) 2163184610Salfred{ 2164188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 2165188417Sthompsa struct ifnet *ifp = ic->ic_ifp; 2166188417Sthompsa struct ural_softc *sc = ifp->if_softc; 2167184610Salfred 2168188417Sthompsa RAL_LOCK(sc); 2169188417Sthompsa /* prevent management frames from being sent if we're not ready */ 2170188417Sthompsa if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2171188417Sthompsa RAL_UNLOCK(sc); 2172188417Sthompsa m_freem(m); 2173188417Sthompsa ieee80211_free_node(ni); 2174188417Sthompsa return ENETDOWN; 2175184610Salfred } 2176188969Sthompsa if (sc->tx_nfree < RAL_TX_MINFREE) { 2177188417Sthompsa ifp->if_drv_flags |= IFF_DRV_OACTIVE; 2178188417Sthompsa RAL_UNLOCK(sc); 2179184610Salfred m_freem(m); 2180184610Salfred ieee80211_free_node(ni); 2181188417Sthompsa return EIO; 2182184610Salfred } 2183184610Salfred 2184188417Sthompsa ifp->if_opackets++; 2185184610Salfred 2186188417Sthompsa if (params == NULL) { 2187188417Sthompsa /* 2188188417Sthompsa * Legacy path; interpret frame contents to decide 2189188417Sthompsa * precisely how to send the frame. 2190188417Sthompsa */ 2191188417Sthompsa if (ural_tx_mgt(sc, m, ni) != 0) 2192188417Sthompsa goto bad; 2193188417Sthompsa } else { 2194188417Sthompsa /* 2195188417Sthompsa * Caller supplied explicit parameters to use in 2196188417Sthompsa * sending the frame. 2197188417Sthompsa */ 2198188417Sthompsa if (ural_tx_raw(sc, m, ni, params) != 0) 2199188417Sthompsa goto bad; 2200184610Salfred } 2201188417Sthompsa RAL_UNLOCK(sc); 2202188417Sthompsa return 0; 2203188417Sthompsabad: 2204188417Sthompsa ifp->if_oerrors++; 2205188417Sthompsa RAL_UNLOCK(sc); 2206188417Sthompsa ieee80211_free_node(ni); 2207188417Sthompsa return EIO; /* XXX */ 2208184610Salfred} 2209184610Salfred 2210184610Salfredstatic void 2211206358Srpauloural_ratectl_start(struct ural_softc *sc, struct ieee80211_node *ni) 2212184610Salfred{ 2213188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 2214188417Sthompsa struct ural_vap *uvp = URAL_VAP(vap); 2215184610Salfred 2216188417Sthompsa /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2217188417Sthompsa ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2218184610Salfred 2219206358Srpaulo ieee80211_ratectl_node_init(ni); 2220184610Salfred 2221206358Srpaulo usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp); 2222184610Salfred} 2223184610Salfred 2224184610Salfredstatic void 2225206358Srpauloural_ratectl_timeout(void *arg) 2226184610Salfred{ 2227188417Sthompsa struct ural_vap *uvp = arg; 2228191746Sthompsa struct ieee80211vap *vap = &uvp->vap; 2229191746Sthompsa struct ieee80211com *ic = vap->iv_ic; 2230184610Salfred 2231206358Srpaulo ieee80211_runtask(ic, &uvp->ratectl_task); 2232184610Salfred} 2233184610Salfred 2234184610Salfredstatic void 2235206358Srpauloural_ratectl_task(void *arg, int pending) 2236184610Salfred{ 2237191746Sthompsa struct ural_vap *uvp = arg; 2238191746Sthompsa struct ieee80211vap *vap = &uvp->vap; 2239191746Sthompsa struct ieee80211com *ic = vap->iv_ic; 2240191746Sthompsa struct ifnet *ifp = ic->ic_ifp; 2241191746Sthompsa struct ural_softc *sc = ifp->if_softc; 2242212127Sthompsa struct ieee80211_node *ni; 2243188417Sthompsa int ok, fail; 2244206358Srpaulo int sum, retrycnt; 2245184610Salfred 2246212127Sthompsa ni = ieee80211_ref_node(vap->iv_bss); 2247191746Sthompsa RAL_LOCK(sc); 2248188417Sthompsa /* read and clear statistic registers (STA_CSR0 to STA_CSR10) */ 2249188417Sthompsa ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2250184610Salfred 2251188417Sthompsa ok = sc->sta[7] + /* TX ok w/o retry */ 2252188417Sthompsa sc->sta[8]; /* TX ok w/ retry */ 2253188417Sthompsa fail = sc->sta[9]; /* TX retry-fail count */ 2254206358Srpaulo sum = ok+fail; 2255206358Srpaulo retrycnt = sc->sta[8] + fail; 2256184610Salfred 2257206358Srpaulo ieee80211_ratectl_tx_update(vap, ni, &sum, &ok, &retrycnt); 2258206358Srpaulo (void) ieee80211_ratectl_rate(ni, NULL, 0); 2259184610Salfred 2260188417Sthompsa ifp->if_oerrors += fail; /* count TX retry-fail as Tx errors */ 2261184610Salfred 2262206358Srpaulo usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp); 2263191746Sthompsa RAL_UNLOCK(sc); 2264212127Sthompsa ieee80211_free_node(ni); 2265184610Salfred} 2266184610Salfred 2267188619Sthompsastatic int 2268188619Sthompsaural_pause(struct ural_softc *sc, int timeout) 2269188619Sthompsa{ 2270188619Sthompsa 2271194228Sthompsa usb_pause_mtx(&sc->sc_mtx, timeout); 2272188619Sthompsa return (0); 2273188619Sthompsa} 2274