if_ural.c revision 192468
1184610Salfred/* $FreeBSD: head/sys/dev/usb/wlan/if_ural.c 192468 2009-05-20 20:00:40Z sam $ */ 2184610Salfred 3184610Salfred/*- 4184610Salfred * Copyright (c) 2005, 2006 5184610Salfred * Damien Bergamini <damien.bergamini@free.fr> 6184610Salfred * 7184610Salfred * Copyright (c) 2006, 2008 8189002Sed * Hans Petter Selasky <hselasky@FreeBSD.org> 9184610Salfred * 10184610Salfred * Permission to use, copy, modify, and distribute this software for any 11184610Salfred * purpose with or without fee is hereby granted, provided that the above 12184610Salfred * copyright notice and this permission notice appear in all copies. 13184610Salfred * 14184610Salfred * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 15184610Salfred * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 16184610Salfred * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 17184610Salfred * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 18184610Salfred * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 19184610Salfred * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 20184610Salfred * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 21184610Salfred */ 22184610Salfred 23184610Salfred#include <sys/cdefs.h> 24184610Salfred__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_ural.c 192468 2009-05-20 20:00:40Z sam $"); 25184610Salfred 26184610Salfred/*- 27184610Salfred * Ralink Technology RT2500USB chipset driver 28184610Salfred * http://www.ralinktech.com/ 29184610Salfred */ 30184610Salfred 31191746Sthompsa#include <sys/param.h> 32191746Sthompsa#include <sys/sockio.h> 33191746Sthompsa#include <sys/sysctl.h> 34191746Sthompsa#include <sys/lock.h> 35191746Sthompsa#include <sys/mutex.h> 36191746Sthompsa#include <sys/mbuf.h> 37191746Sthompsa#include <sys/kernel.h> 38191746Sthompsa#include <sys/socket.h> 39191746Sthompsa#include <sys/systm.h> 40191746Sthompsa#include <sys/malloc.h> 41191746Sthompsa#include <sys/module.h> 42191746Sthompsa#include <sys/bus.h> 43191746Sthompsa#include <sys/endian.h> 44191746Sthompsa#include <sys/kdb.h> 45184610Salfred 46191746Sthompsa#include <machine/bus.h> 47191746Sthompsa#include <machine/resource.h> 48191746Sthompsa#include <sys/rman.h> 49191746Sthompsa 50191746Sthompsa#include <net/bpf.h> 51191746Sthompsa#include <net/if.h> 52191746Sthompsa#include <net/if_arp.h> 53191746Sthompsa#include <net/ethernet.h> 54191746Sthompsa#include <net/if_dl.h> 55191746Sthompsa#include <net/if_media.h> 56191746Sthompsa#include <net/if_types.h> 57191746Sthompsa 58191746Sthompsa#ifdef INET 59191746Sthompsa#include <netinet/in.h> 60191746Sthompsa#include <netinet/in_systm.h> 61191746Sthompsa#include <netinet/in_var.h> 62191746Sthompsa#include <netinet/if_ether.h> 63191746Sthompsa#include <netinet/ip.h> 64191746Sthompsa#endif 65191746Sthompsa 66191746Sthompsa#include <net80211/ieee80211_var.h> 67191746Sthompsa#include <net80211/ieee80211_regdomain.h> 68191746Sthompsa#include <net80211/ieee80211_radiotap.h> 69191746Sthompsa#include <net80211/ieee80211_amrr.h> 70191746Sthompsa 71184610Salfred#define USB_DEBUG_VAR ural_debug 72184610Salfred 73191746Sthompsa#include <dev/usb/usb.h> 74191746Sthompsa#include <dev/usb/usb_error.h> 75188942Sthompsa#include <dev/usb/usb_core.h> 76188942Sthompsa#include <dev/usb/usb_lookup.h> 77188942Sthompsa#include <dev/usb/usb_debug.h> 78188942Sthompsa#include <dev/usb/usb_request.h> 79188942Sthompsa#include <dev/usb/usb_busdma.h> 80188942Sthompsa#include <dev/usb/usb_util.h> 81191746Sthompsa#include "usbdevs.h" 82184610Salfred 83191746Sthompsa 84188942Sthompsa#include <dev/usb/wlan/if_uralreg.h> 85188942Sthompsa#include <dev/usb/wlan/if_uralvar.h> 86184610Salfred 87184610Salfred#if USB_DEBUG 88184610Salfredstatic int ural_debug = 0; 89184610Salfred 90184610SalfredSYSCTL_NODE(_hw_usb2, OID_AUTO, ural, CTLFLAG_RW, 0, "USB ural"); 91184610SalfredSYSCTL_INT(_hw_usb2_ural, OID_AUTO, debug, CTLFLAG_RW, &ural_debug, 0, 92184610Salfred "Debug level"); 93184610Salfred#endif 94184610Salfred 95188417Sthompsa#define URAL_RSSI(rssi) \ 96188417Sthompsa ((rssi) > (RAL_NOISE_FLOOR + RAL_RSSI_CORR) ? \ 97188417Sthompsa ((rssi) - (RAL_NOISE_FLOOR + RAL_RSSI_CORR)) : 0) 98184610Salfred 99188417Sthompsa/* various supported device vendors/products */ 100188417Sthompsastatic const struct usb2_device_id ural_devs[] = { 101188417Sthompsa { USB_VP(USB_VENDOR_ASUS, USB_PRODUCT_ASUS_WL167G) }, 102188417Sthompsa { USB_VP(USB_VENDOR_ASUS, USB_PRODUCT_RALINK_RT2570) }, 103188417Sthompsa { USB_VP(USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050) }, 104188417Sthompsa { USB_VP(USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7051) }, 105188417Sthompsa { USB_VP(USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS) }, 106188417Sthompsa { USB_VP(USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G) }, 107188417Sthompsa { USB_VP(USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP) }, 108188417Sthompsa { USB_VP(USB_VENDOR_CONCEPTRONIC2, USB_PRODUCT_CONCEPTRONIC2_C54RU) }, 109188417Sthompsa { USB_VP(USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122) }, 110188417Sthompsa { USB_VP(USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GN54G) }, 111188417Sthompsa { USB_VP(USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG) }, 112188417Sthompsa { USB_VP(USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254) }, 113188417Sthompsa { USB_VP(USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54) }, 114188417Sthompsa { USB_VP(USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI) }, 115188417Sthompsa { USB_VP(USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB) }, 116188417Sthompsa { USB_VP(USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI) }, 117188417Sthompsa { USB_VP(USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570) }, 118188417Sthompsa { USB_VP(USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570_2) }, 119188417Sthompsa { USB_VP(USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570_3) }, 120188417Sthompsa { USB_VP(USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902) }, 121188417Sthompsa { USB_VP(USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570) }, 122188417Sthompsa { USB_VP(USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2) }, 123188417Sthompsa { USB_VP(USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3) }, 124188417Sthompsa { USB_VP(USB_VENDOR_SIEMENS2, USB_PRODUCT_SIEMENS2_WL54G) }, 125188417Sthompsa { USB_VP(USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG) }, 126188417Sthompsa { USB_VP(USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R) }, 127188417Sthompsa { USB_VP(USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_RT2570) }, 128188417Sthompsa { USB_VP(USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570) }, 129188417Sthompsa { USB_VP(USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_RT2570) }, 130188417Sthompsa}; 131184610Salfred 132184610Salfredstatic usb2_callback_t ural_bulk_read_callback; 133184610Salfredstatic usb2_callback_t ural_bulk_write_callback; 134184610Salfred 135189123Sthompsastatic usb2_error_t ural_do_request(struct ural_softc *sc, 136189123Sthompsa struct usb2_device_request *req, void *data); 137185948Sthompsastatic struct ieee80211vap *ural_vap_create(struct ieee80211com *, 138188417Sthompsa const char name[IFNAMSIZ], int unit, int opmode, 139188417Sthompsa int flags, const uint8_t bssid[IEEE80211_ADDR_LEN], 140188417Sthompsa const uint8_t mac[IEEE80211_ADDR_LEN]); 141188417Sthompsastatic void ural_vap_delete(struct ieee80211vap *); 142188417Sthompsastatic void ural_tx_free(struct ural_tx_data *, int); 143188419Sthompsastatic void ural_setup_tx_list(struct ural_softc *); 144188419Sthompsastatic void ural_unsetup_tx_list(struct ural_softc *); 145188417Sthompsastatic int ural_newstate(struct ieee80211vap *, 146188417Sthompsa enum ieee80211_state, int); 147188417Sthompsastatic void ural_setup_tx_desc(struct ural_softc *, 148188417Sthompsa struct ural_tx_desc *, uint32_t, int, int); 149188417Sthompsastatic int ural_tx_bcn(struct ural_softc *, struct mbuf *, 150188417Sthompsa struct ieee80211_node *); 151188417Sthompsastatic int ural_tx_mgt(struct ural_softc *, struct mbuf *, 152188417Sthompsa struct ieee80211_node *); 153188417Sthompsastatic int ural_tx_data(struct ural_softc *, struct mbuf *, 154188417Sthompsa struct ieee80211_node *); 155188417Sthompsastatic void ural_start(struct ifnet *); 156188417Sthompsastatic int ural_ioctl(struct ifnet *, u_long, caddr_t); 157188417Sthompsastatic void ural_set_testmode(struct ural_softc *); 158188417Sthompsastatic void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 159188417Sthompsa int); 160188417Sthompsastatic uint16_t ural_read(struct ural_softc *, uint16_t); 161188417Sthompsastatic void ural_read_multi(struct ural_softc *, uint16_t, void *, 162188417Sthompsa int); 163188417Sthompsastatic void ural_write(struct ural_softc *, uint16_t, uint16_t); 164188417Sthompsastatic void ural_write_multi(struct ural_softc *, uint16_t, void *, 165188417Sthompsa int) __unused; 166188417Sthompsastatic void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 167188417Sthompsastatic uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 168188417Sthompsastatic void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 169185948Sthompsastatic struct ieee80211_node *ural_node_alloc(struct ieee80211vap *, 170188417Sthompsa const uint8_t mac[IEEE80211_ADDR_LEN]); 171188417Sthompsastatic void ural_newassoc(struct ieee80211_node *, int); 172188417Sthompsastatic void ural_scan_start(struct ieee80211com *); 173188417Sthompsastatic void ural_scan_end(struct ieee80211com *); 174188417Sthompsastatic void ural_set_channel(struct ieee80211com *); 175188417Sthompsastatic void ural_set_chan(struct ural_softc *, 176188417Sthompsa struct ieee80211_channel *); 177188417Sthompsastatic void ural_disable_rf_tune(struct ural_softc *); 178188417Sthompsastatic void ural_enable_tsf_sync(struct ural_softc *); 179192468Ssamstatic void ural_enable_tsf(struct ural_softc *); 180188417Sthompsastatic void ural_update_slot(struct ifnet *); 181188417Sthompsastatic void ural_set_txpreamble(struct ural_softc *); 182188417Sthompsastatic void ural_set_basicrates(struct ural_softc *, 183188417Sthompsa const struct ieee80211_channel *); 184188417Sthompsastatic void ural_set_bssid(struct ural_softc *, const uint8_t *); 185188417Sthompsastatic void ural_set_macaddr(struct ural_softc *, uint8_t *); 186189123Sthompsastatic void ural_update_promisc(struct ifnet *); 187191746Sthompsastatic void ural_setpromisc(struct ural_softc *); 188188417Sthompsastatic const char *ural_get_rf(int); 189188417Sthompsastatic void ural_read_eeprom(struct ural_softc *); 190188417Sthompsastatic int ural_bbp_init(struct ural_softc *); 191188417Sthompsastatic void ural_set_txantenna(struct ural_softc *, int); 192188417Sthompsastatic void ural_set_rxantenna(struct ural_softc *, int); 193191746Sthompsastatic void ural_init_locked(struct ural_softc *); 194188417Sthompsastatic void ural_init(void *); 195191746Sthompsastatic void ural_stop(struct ural_softc *); 196188417Sthompsastatic int ural_raw_xmit(struct ieee80211_node *, struct mbuf *, 197188417Sthompsa const struct ieee80211_bpf_params *); 198188417Sthompsastatic void ural_amrr_start(struct ural_softc *, 199188417Sthompsa struct ieee80211_node *); 200188417Sthompsastatic void ural_amrr_timeout(void *); 201191746Sthompsastatic void ural_amrr_task(void *, int); 202188619Sthompsastatic int ural_pause(struct ural_softc *sc, int timeout); 203184610Salfred 204184610Salfred/* 205188417Sthompsa * Default values for MAC registers; values taken from the reference driver. 206184610Salfred */ 207188417Sthompsastatic const struct { 208188417Sthompsa uint16_t reg; 209188417Sthompsa uint16_t val; 210188417Sthompsa} ural_def_mac[] = { 211188417Sthompsa { RAL_TXRX_CSR5, 0x8c8d }, 212188417Sthompsa { RAL_TXRX_CSR6, 0x8b8a }, 213188417Sthompsa { RAL_TXRX_CSR7, 0x8687 }, 214188417Sthompsa { RAL_TXRX_CSR8, 0x0085 }, 215188417Sthompsa { RAL_MAC_CSR13, 0x1111 }, 216188417Sthompsa { RAL_MAC_CSR14, 0x1e11 }, 217188417Sthompsa { RAL_TXRX_CSR21, 0xe78f }, 218188417Sthompsa { RAL_MAC_CSR9, 0xff1d }, 219188417Sthompsa { RAL_MAC_CSR11, 0x0002 }, 220188417Sthompsa { RAL_MAC_CSR22, 0x0053 }, 221188417Sthompsa { RAL_MAC_CSR15, 0x0000 }, 222188417Sthompsa { RAL_MAC_CSR8, RAL_FRAME_SIZE }, 223188417Sthompsa { RAL_TXRX_CSR19, 0x0000 }, 224188417Sthompsa { RAL_TXRX_CSR18, 0x005a }, 225188417Sthompsa { RAL_PHY_CSR2, 0x0000 }, 226188417Sthompsa { RAL_TXRX_CSR0, 0x1ec0 }, 227188417Sthompsa { RAL_PHY_CSR4, 0x000f } 228184610Salfred}; 229184610Salfred 230184610Salfred/* 231184610Salfred * Default values for BBP registers; values taken from the reference driver. 232184610Salfred */ 233188417Sthompsastatic const struct { 234184610Salfred uint8_t reg; 235184610Salfred uint8_t val; 236188417Sthompsa} ural_def_bbp[] = { 237188417Sthompsa { 3, 0x02 }, 238188417Sthompsa { 4, 0x19 }, 239188417Sthompsa { 14, 0x1c }, 240188417Sthompsa { 15, 0x30 }, 241188417Sthompsa { 16, 0xac }, 242188417Sthompsa { 17, 0x48 }, 243188417Sthompsa { 18, 0x18 }, 244188417Sthompsa { 19, 0xff }, 245188417Sthompsa { 20, 0x1e }, 246188417Sthompsa { 21, 0x08 }, 247188417Sthompsa { 22, 0x08 }, 248188417Sthompsa { 23, 0x08 }, 249188417Sthompsa { 24, 0x80 }, 250188417Sthompsa { 25, 0x50 }, 251188417Sthompsa { 26, 0x08 }, 252188417Sthompsa { 27, 0x23 }, 253188417Sthompsa { 30, 0x10 }, 254188417Sthompsa { 31, 0x2b }, 255188417Sthompsa { 32, 0xb9 }, 256188417Sthompsa { 34, 0x12 }, 257188417Sthompsa { 35, 0x50 }, 258188417Sthompsa { 39, 0xc4 }, 259188417Sthompsa { 40, 0x02 }, 260188417Sthompsa { 41, 0x60 }, 261188417Sthompsa { 53, 0x10 }, 262188417Sthompsa { 54, 0x18 }, 263188417Sthompsa { 56, 0x08 }, 264188417Sthompsa { 57, 0x10 }, 265188417Sthompsa { 58, 0x08 }, 266188417Sthompsa { 61, 0x60 }, 267188417Sthompsa { 62, 0x10 }, 268188417Sthompsa { 75, 0xff } 269184610Salfred}; 270184610Salfred 271184610Salfred/* 272184610Salfred * Default values for RF register R2 indexed by channel numbers. 273184610Salfred */ 274184610Salfredstatic const uint32_t ural_rf2522_r2[] = { 275184610Salfred 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 276184610Salfred 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 277184610Salfred}; 278184610Salfred 279184610Salfredstatic const uint32_t ural_rf2523_r2[] = { 280184610Salfred 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 281184610Salfred 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 282184610Salfred}; 283184610Salfred 284184610Salfredstatic const uint32_t ural_rf2524_r2[] = { 285184610Salfred 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 286184610Salfred 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 287184610Salfred}; 288184610Salfred 289184610Salfredstatic const uint32_t ural_rf2525_r2[] = { 290184610Salfred 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 291184610Salfred 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 292184610Salfred}; 293184610Salfred 294184610Salfredstatic const uint32_t ural_rf2525_hi_r2[] = { 295184610Salfred 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 296184610Salfred 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 297184610Salfred}; 298184610Salfred 299184610Salfredstatic const uint32_t ural_rf2525e_r2[] = { 300184610Salfred 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 301184610Salfred 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 302184610Salfred}; 303184610Salfred 304184610Salfredstatic const uint32_t ural_rf2526_hi_r2[] = { 305184610Salfred 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 306184610Salfred 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 307184610Salfred}; 308184610Salfred 309184610Salfredstatic const uint32_t ural_rf2526_r2[] = { 310184610Salfred 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 311184610Salfred 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 312184610Salfred}; 313184610Salfred 314184610Salfred/* 315184610Salfred * For dual-band RF, RF registers R1 and R4 also depend on channel number; 316184610Salfred * values taken from the reference driver. 317184610Salfred */ 318188417Sthompsastatic const struct { 319188417Sthompsa uint8_t chan; 320188417Sthompsa uint32_t r1; 321188417Sthompsa uint32_t r2; 322188417Sthompsa uint32_t r4; 323188417Sthompsa} ural_rf5222[] = { 324188417Sthompsa { 1, 0x08808, 0x0044d, 0x00282 }, 325188417Sthompsa { 2, 0x08808, 0x0044e, 0x00282 }, 326188417Sthompsa { 3, 0x08808, 0x0044f, 0x00282 }, 327188417Sthompsa { 4, 0x08808, 0x00460, 0x00282 }, 328188417Sthompsa { 5, 0x08808, 0x00461, 0x00282 }, 329188417Sthompsa { 6, 0x08808, 0x00462, 0x00282 }, 330188417Sthompsa { 7, 0x08808, 0x00463, 0x00282 }, 331188417Sthompsa { 8, 0x08808, 0x00464, 0x00282 }, 332188417Sthompsa { 9, 0x08808, 0x00465, 0x00282 }, 333188417Sthompsa { 10, 0x08808, 0x00466, 0x00282 }, 334188417Sthompsa { 11, 0x08808, 0x00467, 0x00282 }, 335188417Sthompsa { 12, 0x08808, 0x00468, 0x00282 }, 336188417Sthompsa { 13, 0x08808, 0x00469, 0x00282 }, 337188417Sthompsa { 14, 0x08808, 0x0046b, 0x00286 }, 338184610Salfred 339188417Sthompsa { 36, 0x08804, 0x06225, 0x00287 }, 340188417Sthompsa { 40, 0x08804, 0x06226, 0x00287 }, 341188417Sthompsa { 44, 0x08804, 0x06227, 0x00287 }, 342188417Sthompsa { 48, 0x08804, 0x06228, 0x00287 }, 343188417Sthompsa { 52, 0x08804, 0x06229, 0x00287 }, 344188417Sthompsa { 56, 0x08804, 0x0622a, 0x00287 }, 345188417Sthompsa { 60, 0x08804, 0x0622b, 0x00287 }, 346188417Sthompsa { 64, 0x08804, 0x0622c, 0x00287 }, 347184610Salfred 348188417Sthompsa { 100, 0x08804, 0x02200, 0x00283 }, 349188417Sthompsa { 104, 0x08804, 0x02201, 0x00283 }, 350188417Sthompsa { 108, 0x08804, 0x02202, 0x00283 }, 351188417Sthompsa { 112, 0x08804, 0x02203, 0x00283 }, 352188417Sthompsa { 116, 0x08804, 0x02204, 0x00283 }, 353188417Sthompsa { 120, 0x08804, 0x02205, 0x00283 }, 354188417Sthompsa { 124, 0x08804, 0x02206, 0x00283 }, 355188417Sthompsa { 128, 0x08804, 0x02207, 0x00283 }, 356188417Sthompsa { 132, 0x08804, 0x02208, 0x00283 }, 357188417Sthompsa { 136, 0x08804, 0x02209, 0x00283 }, 358188417Sthompsa { 140, 0x08804, 0x0220a, 0x00283 }, 359184610Salfred 360188417Sthompsa { 149, 0x08808, 0x02429, 0x00281 }, 361188417Sthompsa { 153, 0x08808, 0x0242b, 0x00281 }, 362188417Sthompsa { 157, 0x08808, 0x0242d, 0x00281 }, 363188417Sthompsa { 161, 0x08808, 0x0242f, 0x00281 } 364184610Salfred}; 365184610Salfred 366184610Salfredstatic const struct usb2_config ural_config[URAL_N_TRANSFER] = { 367188417Sthompsa [URAL_BULK_WR] = { 368184610Salfred .type = UE_BULK, 369184610Salfred .endpoint = UE_ADDR_ANY, 370184610Salfred .direction = UE_DIR_OUT, 371190734Sthompsa .bufsize = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE + 4), 372190734Sthompsa .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 373190734Sthompsa .callback = ural_bulk_write_callback, 374190734Sthompsa .timeout = 5000, /* ms */ 375184610Salfred }, 376188417Sthompsa [URAL_BULK_RD] = { 377184610Salfred .type = UE_BULK, 378184610Salfred .endpoint = UE_ADDR_ANY, 379184610Salfred .direction = UE_DIR_IN, 380190734Sthompsa .bufsize = (RAL_FRAME_SIZE + RAL_RX_DESC_SIZE), 381190734Sthompsa .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 382190734Sthompsa .callback = ural_bulk_read_callback, 383184610Salfred }, 384184610Salfred}; 385184610Salfred 386188417Sthompsastatic device_probe_t ural_match; 387188417Sthompsastatic device_attach_t ural_attach; 388188417Sthompsastatic device_detach_t ural_detach; 389184610Salfred 390184610Salfredstatic device_method_t ural_methods[] = { 391188417Sthompsa /* Device interface */ 392188417Sthompsa DEVMETHOD(device_probe, ural_match), 393188417Sthompsa DEVMETHOD(device_attach, ural_attach), 394188417Sthompsa DEVMETHOD(device_detach, ural_detach), 395188417Sthompsa 396188417Sthompsa { 0, 0 } 397184610Salfred}; 398184610Salfred 399184610Salfredstatic driver_t ural_driver = { 400184610Salfred .name = "ural", 401184610Salfred .methods = ural_methods, 402184610Salfred .size = sizeof(struct ural_softc), 403184610Salfred}; 404184610Salfred 405188417Sthompsastatic devclass_t ural_devclass; 406188417Sthompsa 407189275SthompsaDRIVER_MODULE(ural, uhub, ural_driver, ural_devclass, NULL, 0); 408188942SthompsaMODULE_DEPEND(ural, usb, 1, 1, 1); 409184610SalfredMODULE_DEPEND(ural, wlan, 1, 1, 1); 410184610SalfredMODULE_DEPEND(ural, wlan_amrr, 1, 1, 1); 411184610Salfred 412184610Salfredstatic int 413188417Sthompsaural_match(device_t self) 414184610Salfred{ 415188417Sthompsa struct usb2_attach_arg *uaa = device_get_ivars(self); 416184610Salfred 417188417Sthompsa if (uaa->usb2_mode != USB_MODE_HOST) 418184610Salfred return (ENXIO); 419188417Sthompsa if (uaa->info.bConfigIndex != 0) 420184610Salfred return (ENXIO); 421188417Sthompsa if (uaa->info.bIfaceIndex != RAL_IFACE_INDEX) 422184610Salfred return (ENXIO); 423188417Sthompsa 424184610Salfred return (usb2_lookup_id_by_uaa(ural_devs, sizeof(ural_devs), uaa)); 425184610Salfred} 426184610Salfred 427184610Salfredstatic int 428188417Sthompsaural_attach(device_t self) 429184610Salfred{ 430188417Sthompsa struct usb2_attach_arg *uaa = device_get_ivars(self); 431188417Sthompsa struct ural_softc *sc = device_get_softc(self); 432191746Sthompsa struct ifnet *ifp; 433191746Sthompsa struct ieee80211com *ic; 434191746Sthompsa uint8_t iface_index, bands; 435184610Salfred int error; 436184610Salfred 437188417Sthompsa device_set_usb2_desc(self); 438184610Salfred sc->sc_udev = uaa->device; 439188417Sthompsa sc->sc_dev = self; 440184610Salfred 441188417Sthompsa mtx_init(&sc->sc_mtx, device_get_nameunit(self), 442188417Sthompsa MTX_NETWORK_LOCK, MTX_DEF); 443184610Salfred 444184610Salfred iface_index = RAL_IFACE_INDEX; 445184610Salfred error = usb2_transfer_setup(uaa->device, 446184610Salfred &iface_index, sc->sc_xfer, ural_config, 447184610Salfred URAL_N_TRANSFER, sc, &sc->sc_mtx); 448184610Salfred if (error) { 449188417Sthompsa device_printf(self, "could not allocate USB transfers, " 450184610Salfred "err=%s\n", usb2_errstr(error)); 451184610Salfred goto detach; 452184610Salfred } 453184610Salfred 454188419Sthompsa RAL_LOCK(sc); 455188417Sthompsa /* retrieve RT2570 rev. no */ 456188417Sthompsa sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 457184610Salfred 458188417Sthompsa /* retrieve MAC address and various other things from EEPROM */ 459188417Sthompsa ural_read_eeprom(sc); 460188417Sthompsa RAL_UNLOCK(sc); 461184610Salfred 462191746Sthompsa device_printf(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 463188417Sthompsa sc->asic_rev, ural_get_rf(sc->rf_rev)); 464184610Salfred 465188419Sthompsa ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 466188419Sthompsa if (ifp == NULL) { 467188419Sthompsa device_printf(sc->sc_dev, "can not if_alloc()\n"); 468191746Sthompsa goto detach; 469188419Sthompsa } 470188419Sthompsa ic = ifp->if_l2com; 471188419Sthompsa 472188417Sthompsa ifp->if_softc = sc; 473188417Sthompsa if_initname(ifp, "ural", device_get_unit(sc->sc_dev)); 474188417Sthompsa ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 475188417Sthompsa ifp->if_init = ural_init; 476188417Sthompsa ifp->if_ioctl = ural_ioctl; 477188417Sthompsa ifp->if_start = ural_start; 478188417Sthompsa IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 479188417Sthompsa ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 480188417Sthompsa IFQ_SET_READY(&ifp->if_snd); 481184610Salfred 482188417Sthompsa ic->ic_ifp = ifp; 483188417Sthompsa ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 484184610Salfred 485188417Sthompsa /* set device capabilities */ 486188417Sthompsa ic->ic_caps = 487188417Sthompsa IEEE80211_C_STA /* station mode supported */ 488188417Sthompsa | IEEE80211_C_IBSS /* IBSS mode supported */ 489188417Sthompsa | IEEE80211_C_MONITOR /* monitor mode supported */ 490188417Sthompsa | IEEE80211_C_HOSTAP /* HostAp mode supported */ 491188417Sthompsa | IEEE80211_C_TXPMGT /* tx power management */ 492188417Sthompsa | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 493188417Sthompsa | IEEE80211_C_SHSLOT /* short slot time supported */ 494188417Sthompsa | IEEE80211_C_BGSCAN /* bg scanning supported */ 495188417Sthompsa | IEEE80211_C_WPA /* 802.11i */ 496188417Sthompsa ; 497184610Salfred 498188417Sthompsa bands = 0; 499188417Sthompsa setbit(&bands, IEEE80211_MODE_11B); 500188417Sthompsa setbit(&bands, IEEE80211_MODE_11G); 501188417Sthompsa if (sc->rf_rev == RAL_RF_5222) 502188417Sthompsa setbit(&bands, IEEE80211_MODE_11A); 503188417Sthompsa ieee80211_init_channels(ic, NULL, &bands); 504184610Salfred 505190526Ssam ieee80211_ifattach(ic, sc->sc_bssid); 506189123Sthompsa ic->ic_update_promisc = ural_update_promisc; 507188417Sthompsa ic->ic_newassoc = ural_newassoc; 508188417Sthompsa ic->ic_raw_xmit = ural_raw_xmit; 509188417Sthompsa ic->ic_node_alloc = ural_node_alloc; 510188417Sthompsa ic->ic_scan_start = ural_scan_start; 511188417Sthompsa ic->ic_scan_end = ural_scan_end; 512188417Sthompsa ic->ic_set_channel = ural_set_channel; 513184610Salfred 514188417Sthompsa ic->ic_vap_create = ural_vap_create; 515188417Sthompsa ic->ic_vap_delete = ural_vap_delete; 516184610Salfred 517192468Ssam ieee80211_radiotap_attach(ic, 518192468Ssam &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 519192468Ssam RAL_TX_RADIOTAP_PRESENT, 520192468Ssam &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 521192468Ssam RAL_RX_RADIOTAP_PRESENT); 522184610Salfred 523188417Sthompsa if (bootverbose) 524188417Sthompsa ieee80211_announce(ic); 525184610Salfred 526191746Sthompsa return (0); 527191746Sthompsa 528191746Sthompsadetach: 529191746Sthompsa ural_detach(self); 530191746Sthompsa return (ENXIO); /* failure */ 531188417Sthompsa} 532184610Salfred 533188417Sthompsastatic int 534188417Sthompsaural_detach(device_t self) 535188417Sthompsa{ 536188417Sthompsa struct ural_softc *sc = device_get_softc(self); 537188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 538188619Sthompsa struct ieee80211com *ic; 539184610Salfred 540188419Sthompsa /* stop all USB transfers */ 541188417Sthompsa usb2_transfer_unsetup(sc->sc_xfer, URAL_N_TRANSFER); 542184610Salfred 543188419Sthompsa /* free TX list, if any */ 544188419Sthompsa RAL_LOCK(sc); 545188419Sthompsa ural_unsetup_tx_list(sc); 546188419Sthompsa RAL_UNLOCK(sc); 547188419Sthompsa 548188417Sthompsa if (ifp) { 549188619Sthompsa ic = ifp->if_l2com; 550188417Sthompsa ieee80211_ifdetach(ic); 551188417Sthompsa if_free(ifp); 552184610Salfred } 553188417Sthompsa mtx_destroy(&sc->sc_mtx); 554184610Salfred 555188417Sthompsa return (0); 556184610Salfred} 557184610Salfred 558189123Sthompsastatic usb2_error_t 559189123Sthompsaural_do_request(struct ural_softc *sc, 560189123Sthompsa struct usb2_device_request *req, void *data) 561189123Sthompsa{ 562189123Sthompsa usb2_error_t err; 563189123Sthompsa int ntries = 10; 564189123Sthompsa 565189123Sthompsa while (ntries--) { 566191746Sthompsa err = usb2_do_request_flags(sc->sc_udev, &sc->sc_mtx, 567189123Sthompsa req, data, 0, NULL, 250 /* ms */); 568189123Sthompsa if (err == 0) 569189123Sthompsa break; 570189123Sthompsa 571189123Sthompsa DPRINTFN(1, "Control request failed, %s (retrying)\n", 572189123Sthompsa usb2_errstr(err)); 573189123Sthompsa if (ural_pause(sc, hz / 100)) 574189123Sthompsa break; 575189123Sthompsa } 576189123Sthompsa return (err); 577189123Sthompsa} 578189123Sthompsa 579188417Sthompsastatic struct ieee80211vap * 580188417Sthompsaural_vap_create(struct ieee80211com *ic, 581188417Sthompsa const char name[IFNAMSIZ], int unit, int opmode, int flags, 582188417Sthompsa const uint8_t bssid[IEEE80211_ADDR_LEN], 583188417Sthompsa const uint8_t mac[IEEE80211_ADDR_LEN]) 584184610Salfred{ 585188417Sthompsa struct ural_softc *sc = ic->ic_ifp->if_softc; 586188417Sthompsa struct ural_vap *uvp; 587188417Sthompsa struct ieee80211vap *vap; 588184610Salfred 589188417Sthompsa if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 590188417Sthompsa return NULL; 591188417Sthompsa uvp = (struct ural_vap *) malloc(sizeof(struct ural_vap), 592188417Sthompsa M_80211_VAP, M_NOWAIT | M_ZERO); 593188417Sthompsa if (uvp == NULL) 594188417Sthompsa return NULL; 595188417Sthompsa vap = &uvp->vap; 596188417Sthompsa /* enable s/w bmiss handling for sta mode */ 597188417Sthompsa ieee80211_vap_setup(ic, vap, name, unit, opmode, 598188417Sthompsa flags | IEEE80211_CLONE_NOBEACONS, bssid, mac); 599184610Salfred 600188417Sthompsa /* override state transition machine */ 601188417Sthompsa uvp->newstate = vap->iv_newstate; 602188417Sthompsa vap->iv_newstate = ural_newstate; 603184610Salfred 604188417Sthompsa usb2_callout_init_mtx(&uvp->amrr_ch, &sc->sc_mtx, 0); 605191746Sthompsa TASK_INIT(&uvp->amrr_task, 0, ural_amrr_task, uvp); 606188417Sthompsa ieee80211_amrr_init(&uvp->amrr, vap, 607188417Sthompsa IEEE80211_AMRR_MIN_SUCCESS_THRESHOLD, 608188417Sthompsa IEEE80211_AMRR_MAX_SUCCESS_THRESHOLD, 609188417Sthompsa 1000 /* 1 sec */); 610184610Salfred 611188417Sthompsa /* complete setup */ 612188417Sthompsa ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status); 613188417Sthompsa ic->ic_opmode = opmode; 614188417Sthompsa return vap; 615184610Salfred} 616184610Salfred 617184610Salfredstatic void 618188417Sthompsaural_vap_delete(struct ieee80211vap *vap) 619184610Salfred{ 620188417Sthompsa struct ural_vap *uvp = URAL_VAP(vap); 621191746Sthompsa struct ieee80211com *ic = vap->iv_ic; 622184610Salfred 623188419Sthompsa usb2_callout_drain(&uvp->amrr_ch); 624191746Sthompsa ieee80211_draintask(ic, &uvp->amrr_task); 625188417Sthompsa ieee80211_amrr_cleanup(&uvp->amrr); 626188417Sthompsa ieee80211_vap_detach(vap); 627188417Sthompsa free(uvp, M_80211_VAP); 628184610Salfred} 629184610Salfred 630184610Salfredstatic void 631188417Sthompsaural_tx_free(struct ural_tx_data *data, int txerr) 632184610Salfred{ 633188417Sthompsa struct ural_softc *sc = data->sc; 634184610Salfred 635188417Sthompsa if (data->m != NULL) { 636188417Sthompsa if (data->m->m_flags & M_TXCB) 637188417Sthompsa ieee80211_process_callback(data->ni, data->m, 638188417Sthompsa txerr ? ETIMEDOUT : 0); 639188417Sthompsa m_freem(data->m); 640188417Sthompsa data->m = NULL; 641184610Salfred 642188417Sthompsa ieee80211_free_node(data->ni); 643188417Sthompsa data->ni = NULL; 644188417Sthompsa } 645188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_free, data, next); 646188417Sthompsa sc->tx_nfree++; 647184610Salfred} 648184610Salfred 649188419Sthompsastatic void 650188419Sthompsaural_setup_tx_list(struct ural_softc *sc) 651184610Salfred{ 652188417Sthompsa struct ural_tx_data *data; 653188417Sthompsa int i; 654184610Salfred 655188417Sthompsa sc->tx_nfree = 0; 656188417Sthompsa STAILQ_INIT(&sc->tx_q); 657188417Sthompsa STAILQ_INIT(&sc->tx_free); 658184610Salfred 659188417Sthompsa for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 660188417Sthompsa data = &sc->tx_data[i]; 661184610Salfred 662188417Sthompsa data->sc = sc; 663188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_free, data, next); 664188417Sthompsa sc->tx_nfree++; 665184610Salfred } 666184610Salfred} 667184610Salfred 668184610Salfredstatic void 669188419Sthompsaural_unsetup_tx_list(struct ural_softc *sc) 670184610Salfred{ 671188417Sthompsa struct ural_tx_data *data; 672188417Sthompsa int i; 673184610Salfred 674188419Sthompsa /* make sure any subsequent use of the queues will fail */ 675188419Sthompsa sc->tx_nfree = 0; 676188419Sthompsa STAILQ_INIT(&sc->tx_q); 677188419Sthompsa STAILQ_INIT(&sc->tx_free); 678184610Salfred 679188419Sthompsa /* free up all node references and mbufs */ 680188417Sthompsa for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 681188417Sthompsa data = &sc->tx_data[i]; 682184610Salfred 683188417Sthompsa if (data->m != NULL) { 684188417Sthompsa m_freem(data->m); 685188417Sthompsa data->m = NULL; 686188417Sthompsa } 687188417Sthompsa if (data->ni != NULL) { 688188417Sthompsa ieee80211_free_node(data->ni); 689188417Sthompsa data->ni = NULL; 690188417Sthompsa } 691184610Salfred } 692184610Salfred} 693184610Salfred 694191746Sthompsastatic int 695191746Sthompsaural_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 696184610Salfred{ 697188417Sthompsa struct ural_vap *uvp = URAL_VAP(vap); 698191746Sthompsa struct ieee80211com *ic = vap->iv_ic; 699191746Sthompsa struct ural_softc *sc = ic->ic_ifp->if_softc; 700188417Sthompsa const struct ieee80211_txparam *tp; 701188417Sthompsa struct ieee80211_node *ni; 702188417Sthompsa struct mbuf *m; 703184610Salfred 704191746Sthompsa DPRINTF("%s -> %s\n", 705191746Sthompsa ieee80211_state_name[vap->iv_state], 706191746Sthompsa ieee80211_state_name[nstate]); 707184610Salfred 708191746Sthompsa IEEE80211_UNLOCK(ic); 709191746Sthompsa RAL_LOCK(sc); 710191746Sthompsa usb2_callout_stop(&uvp->amrr_ch); 711191746Sthompsa 712191746Sthompsa switch (nstate) { 713188417Sthompsa case IEEE80211_S_INIT: 714191746Sthompsa if (vap->iv_state == IEEE80211_S_RUN) { 715188417Sthompsa /* abort TSF synchronization */ 716188417Sthompsa ural_write(sc, RAL_TXRX_CSR19, 0); 717184610Salfred 718188417Sthompsa /* force tx led to stop blinking */ 719188417Sthompsa ural_write(sc, RAL_MAC_CSR20, 0); 720188417Sthompsa } 721188417Sthompsa break; 722184610Salfred 723188417Sthompsa case IEEE80211_S_RUN: 724188417Sthompsa ni = vap->iv_bss; 725188417Sthompsa 726188417Sthompsa if (vap->iv_opmode != IEEE80211_M_MONITOR) { 727188417Sthompsa ural_update_slot(ic->ic_ifp); 728188417Sthompsa ural_set_txpreamble(sc); 729188417Sthompsa ural_set_basicrates(sc, ic->ic_bsschan); 730188419Sthompsa IEEE80211_ADDR_COPY(sc->sc_bssid, ni->ni_bssid); 731188419Sthompsa ural_set_bssid(sc, sc->sc_bssid); 732188417Sthompsa } 733188417Sthompsa 734188417Sthompsa if (vap->iv_opmode == IEEE80211_M_HOSTAP || 735188417Sthompsa vap->iv_opmode == IEEE80211_M_IBSS) { 736188417Sthompsa m = ieee80211_beacon_alloc(ni, &uvp->bo); 737188417Sthompsa if (m == NULL) { 738188417Sthompsa device_printf(sc->sc_dev, 739188417Sthompsa "could not allocate beacon\n"); 740191746Sthompsa RAL_UNLOCK(sc); 741191746Sthompsa IEEE80211_LOCK(ic); 742191746Sthompsa return (-1); 743184610Salfred } 744191710Sthompsa ieee80211_ref_node(ni); 745188417Sthompsa if (ural_tx_bcn(sc, m, ni) != 0) { 746188417Sthompsa device_printf(sc->sc_dev, 747188417Sthompsa "could not send beacon\n"); 748191746Sthompsa RAL_UNLOCK(sc); 749191746Sthompsa IEEE80211_LOCK(ic); 750191746Sthompsa return (-1); 751184610Salfred } 752184610Salfred } 753184610Salfred 754188417Sthompsa /* make tx led blink on tx (controlled by ASIC) */ 755188417Sthompsa ural_write(sc, RAL_MAC_CSR20, 1); 756184610Salfred 757188417Sthompsa if (vap->iv_opmode != IEEE80211_M_MONITOR) 758188417Sthompsa ural_enable_tsf_sync(sc); 759192468Ssam else 760192468Ssam ural_enable_tsf(sc); 761184610Salfred 762188417Sthompsa /* enable automatic rate adaptation */ 763192468Ssam /* XXX should use ic_bsschan but not valid until after newstate call below */ 764192468Ssam tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 765188417Sthompsa if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) 766188417Sthompsa ural_amrr_start(sc, ni); 767184610Salfred 768188417Sthompsa break; 769184610Salfred 770188417Sthompsa default: 771188417Sthompsa break; 772188417Sthompsa } 773188417Sthompsa RAL_UNLOCK(sc); 774188417Sthompsa IEEE80211_LOCK(ic); 775191746Sthompsa return (uvp->newstate(vap, nstate, arg)); 776188417Sthompsa} 777184610Salfred 778184610Salfred 779188417Sthompsastatic void 780188417Sthompsaural_bulk_write_callback(struct usb2_xfer *xfer) 781188417Sthompsa{ 782188417Sthompsa struct ural_softc *sc = xfer->priv_sc; 783188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 784192468Ssam struct ieee80211vap *vap; 785188417Sthompsa struct ural_tx_data *data; 786188417Sthompsa struct mbuf *m; 787188419Sthompsa unsigned int len; 788184610Salfred 789188417Sthompsa switch (USB_GET_STATE(xfer)) { 790188417Sthompsa case USB_ST_TRANSFERRED: 791188417Sthompsa DPRINTFN(11, "transfer complete, %d bytes\n", xfer->actlen); 792184610Salfred 793188417Sthompsa /* free resources */ 794188417Sthompsa data = xfer->priv_fifo; 795188417Sthompsa ural_tx_free(data, 0); 796188417Sthompsa xfer->priv_fifo = NULL; 797184610Salfred 798188417Sthompsa ifp->if_opackets++; 799188417Sthompsa ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 800184610Salfred 801188417Sthompsa /* FALLTHROUGH */ 802188417Sthompsa case USB_ST_SETUP: 803188417Sthompsatr_setup: 804188417Sthompsa data = STAILQ_FIRST(&sc->tx_q); 805188417Sthompsa if (data) { 806188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_q, next); 807188417Sthompsa m = data->m; 808184610Salfred 809188417Sthompsa if (m->m_pkthdr.len > (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE)) { 810188417Sthompsa DPRINTFN(0, "data overflow, %u bytes\n", 811188417Sthompsa m->m_pkthdr.len); 812188417Sthompsa m->m_pkthdr.len = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE); 813188417Sthompsa } 814188417Sthompsa usb2_copy_in(xfer->frbuffers, 0, &data->desc, 815188417Sthompsa RAL_TX_DESC_SIZE); 816188417Sthompsa usb2_m_copy_in(xfer->frbuffers, RAL_TX_DESC_SIZE, m, 0, 817188417Sthompsa m->m_pkthdr.len); 818184610Salfred 819192468Ssam vap = data->ni->ni_vap; 820192468Ssam if (ieee80211_radiotap_active_vap(vap)) { 821188417Sthompsa struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 822184610Salfred 823188417Sthompsa tap->wt_flags = 0; 824188417Sthompsa tap->wt_rate = data->rate; 825188417Sthompsa tap->wt_antenna = sc->tx_ant; 826184610Salfred 827192468Ssam ieee80211_radiotap_tx(vap, m); 828188417Sthompsa } 829184610Salfred 830188417Sthompsa /* xfer length needs to be a multiple of two! */ 831188417Sthompsa len = (RAL_TX_DESC_SIZE + m->m_pkthdr.len + 1) & ~1; 832188417Sthompsa if ((len % 64) == 0) 833188417Sthompsa len += 2; 834184610Salfred 835188417Sthompsa DPRINTFN(11, "sending frame len=%u xferlen=%u\n", 836188417Sthompsa m->m_pkthdr.len, len); 837184610Salfred 838188417Sthompsa xfer->frlengths[0] = len; 839188417Sthompsa xfer->priv_fifo = data; 840184610Salfred 841188417Sthompsa usb2_start_hardware(xfer); 842188417Sthompsa } 843188417Sthompsa break; 844184610Salfred 845188417Sthompsa default: /* Error */ 846188417Sthompsa DPRINTFN(11, "transfer error, %s\n", 847188417Sthompsa usb2_errstr(xfer->error)); 848184610Salfred 849188419Sthompsa ifp->if_oerrors++; 850188419Sthompsa data = xfer->priv_fifo; 851188419Sthompsa if (data != NULL) { 852188419Sthompsa ural_tx_free(data, xfer->error); 853188419Sthompsa xfer->priv_fifo = NULL; 854188419Sthompsa } 855188419Sthompsa 856188417Sthompsa if (xfer->error == USB_ERR_STALLED) { 857188417Sthompsa /* try to clear stall first */ 858188417Sthompsa xfer->flags.stall_pipe = 1; 859188417Sthompsa goto tr_setup; 860188417Sthompsa } 861188417Sthompsa if (xfer->error == USB_ERR_TIMEOUT) 862188417Sthompsa device_printf(sc->sc_dev, "device timeout\n"); 863188417Sthompsa break; 864184610Salfred } 865184610Salfred} 866184610Salfred 867184610Salfredstatic void 868184610Salfredural_bulk_read_callback(struct usb2_xfer *xfer) 869184610Salfred{ 870184610Salfred struct ural_softc *sc = xfer->priv_sc; 871184610Salfred struct ifnet *ifp = sc->sc_ifp; 872184610Salfred struct ieee80211com *ic = ifp->if_l2com; 873184610Salfred struct ieee80211_node *ni; 874184610Salfred struct mbuf *m = NULL; 875184610Salfred uint32_t flags; 876192468Ssam int8_t rssi = 0, nf = 0; 877188419Sthompsa unsigned int len; 878184610Salfred 879184610Salfred switch (USB_GET_STATE(xfer)) { 880184610Salfred case USB_ST_TRANSFERRED: 881184610Salfred 882184610Salfred DPRINTFN(15, "rx done, actlen=%d\n", xfer->actlen); 883184610Salfred 884188417Sthompsa len = xfer->actlen; 885188417Sthompsa if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 886188417Sthompsa DPRINTF("%s: xfer too short %d\n", 887188417Sthompsa device_get_nameunit(sc->sc_dev), len); 888184610Salfred ifp->if_ierrors++; 889184610Salfred goto tr_setup; 890184610Salfred } 891184610Salfred 892188417Sthompsa len -= RAL_RX_DESC_SIZE; 893188417Sthompsa /* rx descriptor is located at the end */ 894188417Sthompsa usb2_copy_out(xfer->frbuffers, len, &sc->sc_rx_desc, 895188417Sthompsa RAL_RX_DESC_SIZE); 896184610Salfred 897188417Sthompsa rssi = URAL_RSSI(sc->sc_rx_desc.rssi); 898192468Ssam nf = RAL_NOISE_FLOOR; 899184610Salfred flags = le32toh(sc->sc_rx_desc.flags); 900184610Salfred if (flags & (RAL_RX_PHY_ERROR | RAL_RX_CRC_ERROR)) { 901184610Salfred /* 902184610Salfred * This should not happen since we did not 903184610Salfred * request to receive those frames when we 904184610Salfred * filled RAL_TXRX_CSR2: 905184610Salfred */ 906188417Sthompsa DPRINTFN(5, "PHY or CRC error\n"); 907184610Salfred ifp->if_ierrors++; 908184610Salfred goto tr_setup; 909184610Salfred } 910184610Salfred 911184610Salfred m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 912184610Salfred if (m == NULL) { 913184610Salfred DPRINTF("could not allocate mbuf\n"); 914184610Salfred ifp->if_ierrors++; 915184610Salfred goto tr_setup; 916184610Salfred } 917188417Sthompsa usb2_copy_out(xfer->frbuffers, 0, mtod(m, uint8_t *), len); 918184610Salfred 919184610Salfred /* finalize mbuf */ 920184610Salfred m->m_pkthdr.rcvif = ifp; 921188417Sthompsa m->m_pkthdr.len = m->m_len = (flags >> 16) & 0xfff; 922184610Salfred 923192468Ssam if (ieee80211_radiotap_active(ic)) { 924184610Salfred struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 925184610Salfred 926192468Ssam /* XXX set once */ 927192468Ssam tap->wr_flags = 0; 928184610Salfred tap->wr_rate = ieee80211_plcp2rate(sc->sc_rx_desc.rate, 929188417Sthompsa (flags & RAL_RX_OFDM) ? 930184610Salfred IEEE80211_T_OFDM : IEEE80211_T_CCK); 931188417Sthompsa tap->wr_antenna = sc->rx_ant; 932192468Ssam tap->wr_antsignal = nf + rssi; 933192468Ssam tap->wr_antnoise = nf; 934184610Salfred } 935184610Salfred /* Strip trailing 802.11 MAC FCS. */ 936184610Salfred m_adj(m, -IEEE80211_CRC_LEN); 937184610Salfred 938188417Sthompsa /* FALLTHROUGH */ 939184610Salfred case USB_ST_SETUP: 940184610Salfredtr_setup: 941188417Sthompsa xfer->frlengths[0] = xfer->max_data_length; 942188417Sthompsa usb2_start_hardware(xfer); 943184610Salfred 944184610Salfred /* 945184610Salfred * At the end of a USB callback it is always safe to unlock 946184610Salfred * the private mutex of a device! That is why we do the 947184610Salfred * "ieee80211_input" here, and not some lines up! 948184610Salfred */ 949184610Salfred if (m) { 950188417Sthompsa RAL_UNLOCK(sc); 951188417Sthompsa ni = ieee80211_find_rxnode(ic, 952188417Sthompsa mtod(m, struct ieee80211_frame_min *)); 953188417Sthompsa if (ni != NULL) { 954192468Ssam (void) ieee80211_input(ni, m, rssi, nf); 955184610Salfred ieee80211_free_node(ni); 956188417Sthompsa } else 957192468Ssam (void) ieee80211_input_all(ic, m, rssi, nf); 958188417Sthompsa RAL_LOCK(sc); 959184610Salfred } 960184610Salfred return; 961184610Salfred 962184610Salfred default: /* Error */ 963184610Salfred if (xfer->error != USB_ERR_CANCELLED) { 964184610Salfred /* try to clear stall first */ 965188417Sthompsa xfer->flags.stall_pipe = 1; 966188417Sthompsa goto tr_setup; 967184610Salfred } 968184610Salfred return; 969184610Salfred } 970184610Salfred} 971184610Salfred 972184610Salfredstatic uint8_t 973188417Sthompsaural_plcp_signal(int rate) 974184610Salfred{ 975184610Salfred switch (rate) { 976188417Sthompsa /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 977188417Sthompsa case 12: return 0xb; 978188417Sthompsa case 18: return 0xf; 979188417Sthompsa case 24: return 0xa; 980188417Sthompsa case 36: return 0xe; 981188417Sthompsa case 48: return 0x9; 982188417Sthompsa case 72: return 0xd; 983188417Sthompsa case 96: return 0x8; 984188417Sthompsa case 108: return 0xc; 985184610Salfred 986188417Sthompsa /* CCK rates (NB: not IEEE std, device-specific) */ 987188417Sthompsa case 2: return 0x0; 988188417Sthompsa case 4: return 0x1; 989188417Sthompsa case 11: return 0x2; 990188417Sthompsa case 22: return 0x3; 991184610Salfred } 992188417Sthompsa return 0xff; /* XXX unsupported/unknown rate */ 993184610Salfred} 994184610Salfred 995184610Salfredstatic void 996188417Sthompsaural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 997188417Sthompsa uint32_t flags, int len, int rate) 998184610Salfred{ 999184610Salfred struct ifnet *ifp = sc->sc_ifp; 1000184610Salfred struct ieee80211com *ic = ifp->if_l2com; 1001184610Salfred uint16_t plcp_length; 1002188417Sthompsa int remainder; 1003184610Salfred 1004188417Sthompsa desc->flags = htole32(flags); 1005188417Sthompsa desc->flags |= htole32(RAL_TX_NEWSEQ); 1006188417Sthompsa desc->flags |= htole32(len << 16); 1007184610Salfred 1008188417Sthompsa desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1009188417Sthompsa desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1010184610Salfred 1011188417Sthompsa /* setup PLCP fields */ 1012188417Sthompsa desc->plcp_signal = ural_plcp_signal(rate); 1013188417Sthompsa desc->plcp_service = 4; 1014188417Sthompsa 1015188417Sthompsa len += IEEE80211_CRC_LEN; 1016190532Ssam if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) { 1017188417Sthompsa desc->flags |= htole32(RAL_TX_OFDM); 1018188417Sthompsa 1019188417Sthompsa plcp_length = len & 0xfff; 1020188417Sthompsa desc->plcp_length_hi = plcp_length >> 6; 1021188417Sthompsa desc->plcp_length_lo = plcp_length & 0x3f; 1022188417Sthompsa } else { 1023188417Sthompsa plcp_length = (16 * len + rate - 1) / rate; 1024188417Sthompsa if (rate == 22) { 1025188417Sthompsa remainder = (16 * len) % 22; 1026188417Sthompsa if (remainder != 0 && remainder < 7) 1027188417Sthompsa desc->plcp_service |= RAL_PLCP_LENGEXT; 1028188417Sthompsa } 1029188417Sthompsa desc->plcp_length_hi = plcp_length >> 8; 1030188417Sthompsa desc->plcp_length_lo = plcp_length & 0xff; 1031188417Sthompsa 1032188417Sthompsa if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1033188417Sthompsa desc->plcp_signal |= 0x08; 1034184610Salfred } 1035184610Salfred 1036188417Sthompsa desc->iv = 0; 1037188417Sthompsa desc->eiv = 0; 1038188417Sthompsa} 1039184610Salfred 1040188417Sthompsa#define RAL_TX_TIMEOUT 5000 1041184610Salfred 1042188417Sthompsastatic int 1043188417Sthompsaural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1044188417Sthompsa{ 1045188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 1046188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 1047188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 1048188417Sthompsa const struct ieee80211_txparam *tp; 1049188417Sthompsa struct ural_tx_data *data; 1050188417Sthompsa 1051188417Sthompsa if (sc->tx_nfree == 0) { 1052188417Sthompsa ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1053188417Sthompsa m_freem(m0); 1054188417Sthompsa ieee80211_free_node(ni); 1055188417Sthompsa return EIO; 1056184610Salfred } 1057188417Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1058188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1059188417Sthompsa sc->tx_nfree--; 1060188417Sthompsa tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_bsschan)]; 1061184610Salfred 1062188417Sthompsa data->m = m0; 1063188417Sthompsa data->ni = ni; 1064188417Sthompsa data->rate = tp->mgmtrate; 1065184610Salfred 1066188417Sthompsa ural_setup_tx_desc(sc, &data->desc, 1067188417Sthompsa RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, m0->m_pkthdr.len, 1068188417Sthompsa tp->mgmtrate); 1069184610Salfred 1070188417Sthompsa DPRINTFN(10, "sending beacon frame len=%u rate=%u\n", 1071188417Sthompsa m0->m_pkthdr.len, tp->mgmtrate); 1072184610Salfred 1073188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1074188417Sthompsa usb2_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1075184610Salfred 1076188417Sthompsa return (0); 1077188417Sthompsa} 1078184610Salfred 1079188417Sthompsastatic int 1080188417Sthompsaural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1081188417Sthompsa{ 1082188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 1083188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 1084188417Sthompsa const struct ieee80211_txparam *tp; 1085188417Sthompsa struct ural_tx_data *data; 1086188417Sthompsa struct ieee80211_frame *wh; 1087188417Sthompsa struct ieee80211_key *k; 1088188417Sthompsa uint32_t flags; 1089188417Sthompsa uint16_t dur; 1090184610Salfred 1091188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 1092184610Salfred 1093188417Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1094188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1095188417Sthompsa sc->tx_nfree--; 1096184610Salfred 1097188417Sthompsa tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 1098188417Sthompsa 1099188417Sthompsa wh = mtod(m0, struct ieee80211_frame *); 1100188417Sthompsa if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1101188417Sthompsa k = ieee80211_crypto_encap(ni, m0); 1102188417Sthompsa if (k == NULL) { 1103188417Sthompsa m_freem(m0); 1104188417Sthompsa return ENOBUFS; 1105184610Salfred } 1106188417Sthompsa wh = mtod(m0, struct ieee80211_frame *); 1107184610Salfred } 1108184610Salfred 1109188417Sthompsa data->m = m0; 1110188417Sthompsa data->ni = ni; 1111188417Sthompsa data->rate = tp->mgmtrate; 1112184610Salfred 1113188417Sthompsa flags = 0; 1114188417Sthompsa if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1115188417Sthompsa flags |= RAL_TX_ACK; 1116188417Sthompsa 1117190532Ssam dur = ieee80211_ack_duration(ic->ic_rt, tp->mgmtrate, 1118188417Sthompsa ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1119188417Sthompsa *(uint16_t *)wh->i_dur = htole16(dur); 1120188417Sthompsa 1121188417Sthompsa /* tell hardware to add timestamp for probe responses */ 1122188417Sthompsa if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1123188417Sthompsa IEEE80211_FC0_TYPE_MGT && 1124188417Sthompsa (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1125188417Sthompsa IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1126188417Sthompsa flags |= RAL_TX_TIMESTAMP; 1127184610Salfred } 1128184610Salfred 1129188417Sthompsa ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, tp->mgmtrate); 1130184610Salfred 1131188417Sthompsa DPRINTFN(10, "sending mgt frame len=%u rate=%u\n", 1132188417Sthompsa m0->m_pkthdr.len, tp->mgmtrate); 1133184610Salfred 1134188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1135188417Sthompsa usb2_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1136184610Salfred 1137188417Sthompsa return 0; 1138184610Salfred} 1139184610Salfred 1140188417Sthompsastatic int 1141188417Sthompsaural_sendprot(struct ural_softc *sc, 1142188417Sthompsa const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate) 1143184610Salfred{ 1144188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 1145188417Sthompsa const struct ieee80211_frame *wh; 1146188417Sthompsa struct ural_tx_data *data; 1147188417Sthompsa struct mbuf *mprot; 1148188417Sthompsa int protrate, ackrate, pktlen, flags, isshort; 1149188417Sthompsa uint16_t dur; 1150184610Salfred 1151188417Sthompsa KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY, 1152188417Sthompsa ("protection %d", prot)); 1153184610Salfred 1154188417Sthompsa wh = mtod(m, const struct ieee80211_frame *); 1155188417Sthompsa pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN; 1156184610Salfred 1157190532Ssam protrate = ieee80211_ctl_rate(ic->ic_rt, rate); 1158190532Ssam ackrate = ieee80211_ack_rate(ic->ic_rt, rate); 1159188417Sthompsa 1160188417Sthompsa isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0; 1161190532Ssam dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort); 1162190532Ssam + ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1163188417Sthompsa flags = RAL_TX_RETRY(7); 1164188417Sthompsa if (prot == IEEE80211_PROT_RTSCTS) { 1165188417Sthompsa /* NB: CTS is the same size as an ACK */ 1166190532Ssam dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort); 1167188417Sthompsa flags |= RAL_TX_ACK; 1168188417Sthompsa mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur); 1169188417Sthompsa } else { 1170188417Sthompsa mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur); 1171188417Sthompsa } 1172188417Sthompsa if (mprot == NULL) { 1173188417Sthompsa /* XXX stat + msg */ 1174188417Sthompsa return ENOBUFS; 1175188417Sthompsa } 1176188417Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1177188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1178188417Sthompsa sc->tx_nfree--; 1179188417Sthompsa 1180188417Sthompsa data->m = mprot; 1181188417Sthompsa data->ni = ieee80211_ref_node(ni); 1182188417Sthompsa data->rate = protrate; 1183188417Sthompsa ural_setup_tx_desc(sc, &data->desc, flags, mprot->m_pkthdr.len, protrate); 1184188417Sthompsa 1185188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1186188417Sthompsa usb2_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1187188417Sthompsa 1188188417Sthompsa return 0; 1189188417Sthompsa} 1190188417Sthompsa 1191188417Sthompsastatic int 1192188417Sthompsaural_tx_raw(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni, 1193188417Sthompsa const struct ieee80211_bpf_params *params) 1194188417Sthompsa{ 1195188417Sthompsa struct ural_tx_data *data; 1196188417Sthompsa uint32_t flags; 1197188417Sthompsa int error; 1198188417Sthompsa int rate; 1199188417Sthompsa 1200188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 1201188417Sthompsa KASSERT(params != NULL, ("no raw xmit params")); 1202188417Sthompsa 1203188417Sthompsa rate = params->ibp_rate0 & IEEE80211_RATE_VAL; 1204188417Sthompsa /* XXX validate */ 1205188417Sthompsa if (rate == 0) { 1206188417Sthompsa m_freem(m0); 1207188417Sthompsa return EINVAL; 1208188417Sthompsa } 1209188417Sthompsa flags = 0; 1210188417Sthompsa if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) 1211188417Sthompsa flags |= RAL_TX_ACK; 1212188417Sthompsa if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) { 1213188417Sthompsa error = ural_sendprot(sc, m0, ni, 1214188417Sthompsa params->ibp_flags & IEEE80211_BPF_RTS ? 1215188417Sthompsa IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY, 1216188417Sthompsa rate); 1217188969Sthompsa if (error || sc->tx_nfree == 0) { 1218188417Sthompsa m_freem(m0); 1219188969Sthompsa return ENOBUFS; 1220184610Salfred } 1221188417Sthompsa flags |= RAL_TX_IFS_SIFS; 1222188417Sthompsa } 1223184610Salfred 1224188969Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1225188969Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1226188969Sthompsa sc->tx_nfree--; 1227188969Sthompsa 1228188417Sthompsa data->m = m0; 1229188417Sthompsa data->ni = ni; 1230188417Sthompsa data->rate = rate; 1231184610Salfred 1232188417Sthompsa /* XXX need to setup descriptor ourself */ 1233188417Sthompsa ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate); 1234184610Salfred 1235188417Sthompsa DPRINTFN(10, "sending raw frame len=%u rate=%u\n", 1236188417Sthompsa m0->m_pkthdr.len, rate); 1237184610Salfred 1238188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1239188417Sthompsa usb2_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1240184610Salfred 1241188417Sthompsa return 0; 1242188417Sthompsa} 1243184610Salfred 1244188417Sthompsastatic int 1245188417Sthompsaural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1246188417Sthompsa{ 1247188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 1248188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 1249188417Sthompsa struct ural_tx_data *data; 1250188417Sthompsa struct ieee80211_frame *wh; 1251188417Sthompsa const struct ieee80211_txparam *tp; 1252188417Sthompsa struct ieee80211_key *k; 1253188417Sthompsa uint32_t flags = 0; 1254188417Sthompsa uint16_t dur; 1255188417Sthompsa int error, rate; 1256184610Salfred 1257188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 1258184610Salfred 1259188417Sthompsa wh = mtod(m0, struct ieee80211_frame *); 1260184610Salfred 1261188417Sthompsa tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1262188417Sthompsa if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1263188417Sthompsa rate = tp->mcastrate; 1264188417Sthompsa else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1265188417Sthompsa rate = tp->ucastrate; 1266188417Sthompsa else 1267188417Sthompsa rate = ni->ni_txrate; 1268188417Sthompsa 1269188417Sthompsa if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1270188417Sthompsa k = ieee80211_crypto_encap(ni, m0); 1271188417Sthompsa if (k == NULL) { 1272188417Sthompsa m_freem(m0); 1273188417Sthompsa return ENOBUFS; 1274184610Salfred } 1275188417Sthompsa /* packet header may have moved, reset our local pointer */ 1276188417Sthompsa wh = mtod(m0, struct ieee80211_frame *); 1277188417Sthompsa } 1278184610Salfred 1279188417Sthompsa if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1280188417Sthompsa int prot = IEEE80211_PROT_NONE; 1281188417Sthompsa if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) 1282188417Sthompsa prot = IEEE80211_PROT_RTSCTS; 1283188417Sthompsa else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1284190532Ssam ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) 1285188417Sthompsa prot = ic->ic_protmode; 1286188417Sthompsa if (prot != IEEE80211_PROT_NONE) { 1287188417Sthompsa error = ural_sendprot(sc, m0, ni, prot, rate); 1288188969Sthompsa if (error || sc->tx_nfree == 0) { 1289188417Sthompsa m_freem(m0); 1290188969Sthompsa return ENOBUFS; 1291188417Sthompsa } 1292188417Sthompsa flags |= RAL_TX_IFS_SIFS; 1293184610Salfred } 1294184610Salfred } 1295184610Salfred 1296188417Sthompsa data = STAILQ_FIRST(&sc->tx_free); 1297188417Sthompsa STAILQ_REMOVE_HEAD(&sc->tx_free, next); 1298188417Sthompsa sc->tx_nfree--; 1299184610Salfred 1300188417Sthompsa data->m = m0; 1301188417Sthompsa data->ni = ni; 1302188417Sthompsa data->rate = rate; 1303188417Sthompsa 1304188417Sthompsa if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1305188417Sthompsa flags |= RAL_TX_ACK; 1306188417Sthompsa flags |= RAL_TX_RETRY(7); 1307188417Sthompsa 1308190532Ssam dur = ieee80211_ack_duration(ic->ic_rt, rate, 1309188417Sthompsa ic->ic_flags & IEEE80211_F_SHPREAMBLE); 1310188417Sthompsa *(uint16_t *)wh->i_dur = htole16(dur); 1311184610Salfred } 1312184610Salfred 1313188417Sthompsa ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate); 1314184610Salfred 1315188417Sthompsa DPRINTFN(10, "sending data frame len=%u rate=%u\n", 1316188417Sthompsa m0->m_pkthdr.len, rate); 1317184610Salfred 1318188417Sthompsa STAILQ_INSERT_TAIL(&sc->tx_q, data, next); 1319188417Sthompsa usb2_transfer_start(sc->sc_xfer[URAL_BULK_WR]); 1320188417Sthompsa 1321188417Sthompsa return 0; 1322184610Salfred} 1323184610Salfred 1324184610Salfredstatic void 1325188417Sthompsaural_start(struct ifnet *ifp) 1326184610Salfred{ 1327188417Sthompsa struct ural_softc *sc = ifp->if_softc; 1328188417Sthompsa struct ieee80211_node *ni; 1329188417Sthompsa struct mbuf *m; 1330184610Salfred 1331188417Sthompsa RAL_LOCK(sc); 1332188417Sthompsa if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1333188417Sthompsa RAL_UNLOCK(sc); 1334188417Sthompsa return; 1335188417Sthompsa } 1336188417Sthompsa for (;;) { 1337188417Sthompsa IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1338188417Sthompsa if (m == NULL) 1339188417Sthompsa break; 1340188969Sthompsa if (sc->tx_nfree < RAL_TX_MINFREE) { 1341188417Sthompsa IFQ_DRV_PREPEND(&ifp->if_snd, m); 1342188417Sthompsa ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1343188417Sthompsa break; 1344188417Sthompsa } 1345188417Sthompsa ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1346188417Sthompsa if (ural_tx_data(sc, m, ni) != 0) { 1347188417Sthompsa ieee80211_free_node(ni); 1348188417Sthompsa ifp->if_oerrors++; 1349188417Sthompsa break; 1350188417Sthompsa } 1351188417Sthompsa } 1352188417Sthompsa RAL_UNLOCK(sc); 1353184610Salfred} 1354184610Salfred 1355184610Salfredstatic int 1356188417Sthompsaural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1357184610Salfred{ 1358184610Salfred struct ural_softc *sc = ifp->if_softc; 1359184610Salfred struct ieee80211com *ic = ifp->if_l2com; 1360188417Sthompsa struct ifreq *ifr = (struct ifreq *) data; 1361188417Sthompsa int error = 0, startall = 0; 1362184610Salfred 1363184610Salfred switch (cmd) { 1364184610Salfred case SIOCSIFFLAGS: 1365188417Sthompsa RAL_LOCK(sc); 1366184610Salfred if (ifp->if_flags & IFF_UP) { 1367188417Sthompsa if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1368191746Sthompsa ural_init_locked(sc); 1369188417Sthompsa startall = 1; 1370188417Sthompsa } else 1371191746Sthompsa ural_setpromisc(sc); 1372184610Salfred } else { 1373191746Sthompsa if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1374191746Sthompsa ural_stop(sc); 1375184610Salfred } 1376188417Sthompsa RAL_UNLOCK(sc); 1377188417Sthompsa if (startall) 1378188417Sthompsa ieee80211_start_all(ic); 1379184610Salfred break; 1380184610Salfred case SIOCGIFMEDIA: 1381184610Salfred case SIOCSIFMEDIA: 1382188417Sthompsa error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1383184610Salfred break; 1384184610Salfred default: 1385184610Salfred error = ether_ioctl(ifp, cmd, data); 1386188417Sthompsa break; 1387184610Salfred } 1388188417Sthompsa return error; 1389184610Salfred} 1390184610Salfred 1391184610Salfredstatic void 1392188417Sthompsaural_set_testmode(struct ural_softc *sc) 1393184610Salfred{ 1394188417Sthompsa struct usb2_device_request req; 1395188417Sthompsa usb2_error_t error; 1396184610Salfred 1397188417Sthompsa req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1398188417Sthompsa req.bRequest = RAL_VENDOR_REQUEST; 1399188417Sthompsa USETW(req.wValue, 4); 1400188417Sthompsa USETW(req.wIndex, 1); 1401188417Sthompsa USETW(req.wLength, 0); 1402188417Sthompsa 1403188419Sthompsa error = ural_do_request(sc, &req, NULL); 1404188417Sthompsa if (error != 0) { 1405188417Sthompsa device_printf(sc->sc_dev, "could not set test mode: %s\n", 1406188417Sthompsa usb2_errstr(error)); 1407188417Sthompsa } 1408184610Salfred} 1409184610Salfred 1410184610Salfredstatic void 1411188417Sthompsaural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1412184610Salfred{ 1413188417Sthompsa struct usb2_device_request req; 1414188417Sthompsa usb2_error_t error; 1415184610Salfred 1416188417Sthompsa req.bmRequestType = UT_READ_VENDOR_DEVICE; 1417188417Sthompsa req.bRequest = RAL_READ_EEPROM; 1418188417Sthompsa USETW(req.wValue, 0); 1419188417Sthompsa USETW(req.wIndex, addr); 1420188417Sthompsa USETW(req.wLength, len); 1421184610Salfred 1422188419Sthompsa error = ural_do_request(sc, &req, buf); 1423188417Sthompsa if (error != 0) { 1424188417Sthompsa device_printf(sc->sc_dev, "could not read EEPROM: %s\n", 1425188417Sthompsa usb2_errstr(error)); 1426184610Salfred } 1427188417Sthompsa} 1428184610Salfred 1429188417Sthompsastatic uint16_t 1430188417Sthompsaural_read(struct ural_softc *sc, uint16_t reg) 1431188417Sthompsa{ 1432188417Sthompsa struct usb2_device_request req; 1433188417Sthompsa usb2_error_t error; 1434188417Sthompsa uint16_t val; 1435184610Salfred 1436188417Sthompsa req.bmRequestType = UT_READ_VENDOR_DEVICE; 1437188417Sthompsa req.bRequest = RAL_READ_MAC; 1438188417Sthompsa USETW(req.wValue, 0); 1439188417Sthompsa USETW(req.wIndex, reg); 1440188417Sthompsa USETW(req.wLength, sizeof (uint16_t)); 1441188417Sthompsa 1442188419Sthompsa error = ural_do_request(sc, &req, &val); 1443188417Sthompsa if (error != 0) { 1444188417Sthompsa device_printf(sc->sc_dev, "could not read MAC register: %s\n", 1445188417Sthompsa usb2_errstr(error)); 1446188417Sthompsa return 0; 1447184610Salfred } 1448184610Salfred 1449188417Sthompsa return le16toh(val); 1450184610Salfred} 1451184610Salfred 1452188417Sthompsastatic void 1453188417Sthompsaural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1454184610Salfred{ 1455188417Sthompsa struct usb2_device_request req; 1456188417Sthompsa usb2_error_t error; 1457184610Salfred 1458188417Sthompsa req.bmRequestType = UT_READ_VENDOR_DEVICE; 1459188417Sthompsa req.bRequest = RAL_READ_MULTI_MAC; 1460188417Sthompsa USETW(req.wValue, 0); 1461188417Sthompsa USETW(req.wIndex, reg); 1462188417Sthompsa USETW(req.wLength, len); 1463184610Salfred 1464188419Sthompsa error = ural_do_request(sc, &req, buf); 1465188417Sthompsa if (error != 0) { 1466188417Sthompsa device_printf(sc->sc_dev, "could not read MAC register: %s\n", 1467188417Sthompsa usb2_errstr(error)); 1468184610Salfred } 1469188417Sthompsa} 1470188417Sthompsa 1471188417Sthompsastatic void 1472188417Sthompsaural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1473188417Sthompsa{ 1474188417Sthompsa struct usb2_device_request req; 1475188417Sthompsa usb2_error_t error; 1476188417Sthompsa 1477188417Sthompsa req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1478188417Sthompsa req.bRequest = RAL_WRITE_MAC; 1479188417Sthompsa USETW(req.wValue, val); 1480188417Sthompsa USETW(req.wIndex, reg); 1481188417Sthompsa USETW(req.wLength, 0); 1482188417Sthompsa 1483188419Sthompsa error = ural_do_request(sc, &req, NULL); 1484188417Sthompsa if (error != 0) { 1485188417Sthompsa device_printf(sc->sc_dev, "could not write MAC register: %s\n", 1486188417Sthompsa usb2_errstr(error)); 1487184610Salfred } 1488188417Sthompsa} 1489184610Salfred 1490188417Sthompsastatic void 1491188417Sthompsaural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1492188417Sthompsa{ 1493188417Sthompsa struct usb2_device_request req; 1494188417Sthompsa usb2_error_t error; 1495184610Salfred 1496188417Sthompsa req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1497188417Sthompsa req.bRequest = RAL_WRITE_MULTI_MAC; 1498188417Sthompsa USETW(req.wValue, 0); 1499188417Sthompsa USETW(req.wIndex, reg); 1500188417Sthompsa USETW(req.wLength, len); 1501184610Salfred 1502188419Sthompsa error = ural_do_request(sc, &req, buf); 1503188417Sthompsa if (error != 0) { 1504188417Sthompsa device_printf(sc->sc_dev, "could not write MAC register: %s\n", 1505188417Sthompsa usb2_errstr(error)); 1506188417Sthompsa } 1507184610Salfred} 1508184610Salfred 1509184610Salfredstatic void 1510188417Sthompsaural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1511184610Salfred{ 1512188417Sthompsa uint16_t tmp; 1513188417Sthompsa int ntries; 1514184610Salfred 1515188619Sthompsa for (ntries = 0; ntries < 100; ntries++) { 1516188417Sthompsa if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1517188417Sthompsa break; 1518188619Sthompsa if (ural_pause(sc, hz / 100)) 1519188619Sthompsa break; 1520188417Sthompsa } 1521188619Sthompsa if (ntries == 100) { 1522188417Sthompsa device_printf(sc->sc_dev, "could not write to BBP\n"); 1523188417Sthompsa return; 1524188417Sthompsa } 1525184610Salfred 1526188417Sthompsa tmp = reg << 8 | val; 1527188417Sthompsa ural_write(sc, RAL_PHY_CSR7, tmp); 1528188417Sthompsa} 1529184610Salfred 1530188417Sthompsastatic uint8_t 1531188417Sthompsaural_bbp_read(struct ural_softc *sc, uint8_t reg) 1532188417Sthompsa{ 1533188417Sthompsa uint16_t val; 1534188417Sthompsa int ntries; 1535184610Salfred 1536188417Sthompsa val = RAL_BBP_WRITE | reg << 8; 1537188417Sthompsa ural_write(sc, RAL_PHY_CSR7, val); 1538188417Sthompsa 1539188619Sthompsa for (ntries = 0; ntries < 100; ntries++) { 1540188417Sthompsa if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1541188417Sthompsa break; 1542188619Sthompsa if (ural_pause(sc, hz / 100)) 1543188619Sthompsa break; 1544188417Sthompsa } 1545188619Sthompsa if (ntries == 100) { 1546188417Sthompsa device_printf(sc->sc_dev, "could not read BBP\n"); 1547188417Sthompsa return 0; 1548188417Sthompsa } 1549188417Sthompsa 1550188417Sthompsa return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1551184610Salfred} 1552184610Salfred 1553184610Salfredstatic void 1554188417Sthompsaural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1555184610Salfred{ 1556188417Sthompsa uint32_t tmp; 1557188417Sthompsa int ntries; 1558188417Sthompsa 1559188619Sthompsa for (ntries = 0; ntries < 100; ntries++) { 1560188417Sthompsa if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1561188417Sthompsa break; 1562188619Sthompsa if (ural_pause(sc, hz / 100)) 1563188619Sthompsa break; 1564188417Sthompsa } 1565188619Sthompsa if (ntries == 100) { 1566188417Sthompsa device_printf(sc->sc_dev, "could not write to RF\n"); 1567188417Sthompsa return; 1568188417Sthompsa } 1569188417Sthompsa 1570188417Sthompsa tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1571188417Sthompsa ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1572188417Sthompsa ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1573188417Sthompsa 1574188417Sthompsa /* remember last written value in sc */ 1575188417Sthompsa sc->rf_regs[reg] = val; 1576188417Sthompsa 1577188417Sthompsa DPRINTFN(15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff); 1578184610Salfred} 1579184610Salfred 1580188417Sthompsa/* ARGUSED */ 1581188417Sthompsastatic struct ieee80211_node * 1582188417Sthompsaural_node_alloc(struct ieee80211vap *vap __unused, 1583188417Sthompsa const uint8_t mac[IEEE80211_ADDR_LEN] __unused) 1584188417Sthompsa{ 1585188417Sthompsa struct ural_node *un; 1586188417Sthompsa 1587188417Sthompsa un = malloc(sizeof(struct ural_node), M_80211_NODE, M_NOWAIT | M_ZERO); 1588188417Sthompsa return un != NULL ? &un->ni : NULL; 1589188417Sthompsa} 1590188417Sthompsa 1591184610Salfredstatic void 1592188417Sthompsaural_newassoc(struct ieee80211_node *ni, int isnew) 1593184610Salfred{ 1594188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 1595188417Sthompsa 1596188417Sthompsa ieee80211_amrr_node_init(&URAL_VAP(vap)->amrr, &URAL_NODE(ni)->amn, ni); 1597184610Salfred} 1598184610Salfred 1599184610Salfredstatic void 1600188417Sthompsaural_scan_start(struct ieee80211com *ic) 1601184610Salfred{ 1602191746Sthompsa struct ifnet *ifp = ic->ic_ifp; 1603191746Sthompsa struct ural_softc *sc = ifp->if_softc; 1604188417Sthompsa 1605188417Sthompsa RAL_LOCK(sc); 1606191746Sthompsa ural_write(sc, RAL_TXRX_CSR19, 0); 1607191746Sthompsa ural_set_bssid(sc, ifp->if_broadcastaddr); 1608188417Sthompsa RAL_UNLOCK(sc); 1609184610Salfred} 1610184610Salfred 1611184610Salfredstatic void 1612188417Sthompsaural_scan_end(struct ieee80211com *ic) 1613184610Salfred{ 1614188417Sthompsa struct ural_softc *sc = ic->ic_ifp->if_softc; 1615188417Sthompsa 1616188417Sthompsa RAL_LOCK(sc); 1617191746Sthompsa ural_enable_tsf_sync(sc); 1618191746Sthompsa ural_set_bssid(sc, sc->sc_bssid); 1619188417Sthompsa RAL_UNLOCK(sc); 1620188417Sthompsa 1621184610Salfred} 1622184610Salfred 1623184610Salfredstatic void 1624188417Sthompsaural_set_channel(struct ieee80211com *ic) 1625184610Salfred{ 1626188417Sthompsa struct ural_softc *sc = ic->ic_ifp->if_softc; 1627188417Sthompsa 1628188417Sthompsa RAL_LOCK(sc); 1629191746Sthompsa ural_set_chan(sc, ic->ic_curchan); 1630188417Sthompsa RAL_UNLOCK(sc); 1631184610Salfred} 1632184610Salfred 1633184610Salfredstatic void 1634188417Sthompsaural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1635184610Salfred{ 1636188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 1637188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 1638188417Sthompsa uint8_t power, tmp; 1639188619Sthompsa int i, chan; 1640184610Salfred 1641188417Sthompsa chan = ieee80211_chan2ieee(ic, c); 1642188417Sthompsa if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1643188417Sthompsa return; 1644184610Salfred 1645188417Sthompsa if (IEEE80211_IS_CHAN_2GHZ(c)) 1646188417Sthompsa power = min(sc->txpow[chan - 1], 31); 1647184610Salfred else 1648184610Salfred power = 31; 1649184610Salfred 1650184610Salfred /* adjust txpower using ifconfig settings */ 1651188417Sthompsa power -= (100 - ic->ic_txpowlimit) / 8; 1652184610Salfred 1653188417Sthompsa DPRINTFN(2, "setting channel to %u, txpower to %u\n", chan, power); 1654184610Salfred 1655188417Sthompsa switch (sc->rf_rev) { 1656184610Salfred case RAL_RF_2522: 1657188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x00814); 1658188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1659188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1660184610Salfred break; 1661184610Salfred 1662184610Salfred case RAL_RF_2523: 1663188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08804); 1664188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1665188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1666188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1667184610Salfred break; 1668184610Salfred 1669184610Salfred case RAL_RF_2524: 1670188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x0c808); 1671188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1672188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1673188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1674184610Salfred break; 1675184610Salfred 1676184610Salfred case RAL_RF_2525: 1677188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08808); 1678188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1679188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1680188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1681184610Salfred 1682188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08808); 1683188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1684188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1685188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1686184610Salfred break; 1687184610Salfred 1688184610Salfred case RAL_RF_2525E: 1689188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08808); 1690188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1691188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1692188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1693184610Salfred break; 1694184610Salfred 1695184610Salfred case RAL_RF_2526: 1696188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1697188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1698188417Sthompsa ural_rf_write(sc, RAL_RF1, 0x08804); 1699184610Salfred 1700188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1701188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1702188417Sthompsa ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1703184610Salfred break; 1704184610Salfred 1705188417Sthompsa /* dual-band RF */ 1706184610Salfred case RAL_RF_5222: 1707188417Sthompsa for (i = 0; ural_rf5222[i].chan != chan; i++); 1708188417Sthompsa 1709188417Sthompsa ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1710188417Sthompsa ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1711188417Sthompsa ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1712188417Sthompsa ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1713184610Salfred break; 1714184610Salfred } 1715184610Salfred 1716188417Sthompsa if (ic->ic_opmode != IEEE80211_M_MONITOR && 1717188417Sthompsa (ic->ic_flags & IEEE80211_F_SCAN) == 0) { 1718184610Salfred /* set Japan filter bit for channel 14 */ 1719188417Sthompsa tmp = ural_bbp_read(sc, 70); 1720184610Salfred 1721188417Sthompsa tmp &= ~RAL_JAPAN_FILTER; 1722188417Sthompsa if (chan == 14) 1723184610Salfred tmp |= RAL_JAPAN_FILTER; 1724184610Salfred 1725188417Sthompsa ural_bbp_write(sc, 70, tmp); 1726184610Salfred 1727184610Salfred /* clear CRC errors */ 1728188417Sthompsa ural_read(sc, RAL_STA_CSR0); 1729184610Salfred 1730188619Sthompsa ural_pause(sc, hz / 100); 1731188417Sthompsa ural_disable_rf_tune(sc); 1732184610Salfred } 1733188417Sthompsa 1734188417Sthompsa /* XXX doesn't belong here */ 1735184610Salfred /* update basic rate set */ 1736188417Sthompsa ural_set_basicrates(sc, c); 1737189123Sthompsa 1738189123Sthompsa /* give the hardware some time to do the switchover */ 1739189123Sthompsa ural_pause(sc, hz / 100); 1740184610Salfred} 1741184610Salfred 1742188417Sthompsa/* 1743188417Sthompsa * Disable RF auto-tuning. 1744188417Sthompsa */ 1745184610Salfredstatic void 1746188417Sthompsaural_disable_rf_tune(struct ural_softc *sc) 1747184610Salfred{ 1748188417Sthompsa uint32_t tmp; 1749184610Salfred 1750188417Sthompsa if (sc->rf_rev != RAL_RF_2523) { 1751188417Sthompsa tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1752188417Sthompsa ural_rf_write(sc, RAL_RF1, tmp); 1753184610Salfred } 1754184610Salfred 1755188417Sthompsa tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1756188417Sthompsa ural_rf_write(sc, RAL_RF3, tmp); 1757184610Salfred 1758188417Sthompsa DPRINTFN(2, "disabling RF autotune\n"); 1759184610Salfred} 1760184610Salfred 1761188417Sthompsa/* 1762188417Sthompsa * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1763188417Sthompsa * synchronization. 1764188417Sthompsa */ 1765184610Salfredstatic void 1766188417Sthompsaural_enable_tsf_sync(struct ural_softc *sc) 1767184610Salfred{ 1768188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 1769188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 1770188417Sthompsa struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1771188417Sthompsa uint16_t logcwmin, preload, tmp; 1772184610Salfred 1773184610Salfred /* first, disable TSF synchronization */ 1774188417Sthompsa ural_write(sc, RAL_TXRX_CSR19, 0); 1775184610Salfred 1776188417Sthompsa tmp = (16 * vap->iv_bss->ni_intval) << 4; 1777188417Sthompsa ural_write(sc, RAL_TXRX_CSR18, tmp); 1778184610Salfred 1779188417Sthompsa logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1780188417Sthompsa preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1781188417Sthompsa tmp = logcwmin << 12 | preload; 1782188417Sthompsa ural_write(sc, RAL_TXRX_CSR20, tmp); 1783184610Salfred 1784184610Salfred /* finally, enable TSF synchronization */ 1785184610Salfred tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1786188417Sthompsa if (ic->ic_opmode == IEEE80211_M_STA) 1787184610Salfred tmp |= RAL_ENABLE_TSF_SYNC(1); 1788184610Salfred else 1789184610Salfred tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1790188417Sthompsa ural_write(sc, RAL_TXRX_CSR19, tmp); 1791184610Salfred 1792184610Salfred DPRINTF("enabling TSF synchronization\n"); 1793184610Salfred} 1794184610Salfred 1795192468Ssamstatic void 1796192468Ssamural_enable_tsf(struct ural_softc *sc) 1797192468Ssam{ 1798192468Ssam /* first, disable TSF synchronization */ 1799192468Ssam ural_write(sc, RAL_TXRX_CSR19, 0); 1800192468Ssam ural_write(sc, RAL_TXRX_CSR19, RAL_ENABLE_TSF | RAL_ENABLE_TSF_SYNC(2)); 1801192468Ssam} 1802192468Ssam 1803188417Sthompsa#define RAL_RXTX_TURNAROUND 5 /* us */ 1804184610Salfredstatic void 1805188417Sthompsaural_update_slot(struct ifnet *ifp) 1806184610Salfred{ 1807188417Sthompsa struct ural_softc *sc = ifp->if_softc; 1808188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 1809188417Sthompsa uint16_t slottime, sifs, eifs; 1810184610Salfred 1811188417Sthompsa slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1812184610Salfred 1813184610Salfred /* 1814184610Salfred * These settings may sound a bit inconsistent but this is what the 1815184610Salfred * reference driver does. 1816184610Salfred */ 1817188417Sthompsa if (ic->ic_curmode == IEEE80211_MODE_11B) { 1818184610Salfred sifs = 16 - RAL_RXTX_TURNAROUND; 1819184610Salfred eifs = 364; 1820184610Salfred } else { 1821184610Salfred sifs = 10 - RAL_RXTX_TURNAROUND; 1822184610Salfred eifs = 64; 1823184610Salfred } 1824184610Salfred 1825188417Sthompsa ural_write(sc, RAL_MAC_CSR10, slottime); 1826188417Sthompsa ural_write(sc, RAL_MAC_CSR11, sifs); 1827188417Sthompsa ural_write(sc, RAL_MAC_CSR12, eifs); 1828184610Salfred} 1829184610Salfred 1830184610Salfredstatic void 1831188417Sthompsaural_set_txpreamble(struct ural_softc *sc) 1832184610Salfred{ 1833188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 1834188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 1835184610Salfred uint16_t tmp; 1836184610Salfred 1837188417Sthompsa tmp = ural_read(sc, RAL_TXRX_CSR10); 1838184610Salfred 1839188417Sthompsa tmp &= ~RAL_SHORT_PREAMBLE; 1840188417Sthompsa if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1841184610Salfred tmp |= RAL_SHORT_PREAMBLE; 1842184610Salfred 1843188417Sthompsa ural_write(sc, RAL_TXRX_CSR10, tmp); 1844184610Salfred} 1845184610Salfred 1846184610Salfredstatic void 1847188417Sthompsaural_set_basicrates(struct ural_softc *sc, const struct ieee80211_channel *c) 1848184610Salfred{ 1849188417Sthompsa /* XXX wrong, take from rate set */ 1850188417Sthompsa /* update basic rate set */ 1851188417Sthompsa if (IEEE80211_IS_CHAN_5GHZ(c)) { 1852188417Sthompsa /* 11a basic rates: 6, 12, 24Mbps */ 1853188417Sthompsa ural_write(sc, RAL_TXRX_CSR11, 0x150); 1854188417Sthompsa } else if (IEEE80211_IS_CHAN_ANYG(c)) { 1855188417Sthompsa /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1856188417Sthompsa ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1857188417Sthompsa } else { 1858188417Sthompsa /* 11b basic rates: 1, 2Mbps */ 1859188417Sthompsa ural_write(sc, RAL_TXRX_CSR11, 0x3); 1860188417Sthompsa } 1861184610Salfred} 1862184610Salfred 1863184610Salfredstatic void 1864188417Sthompsaural_set_bssid(struct ural_softc *sc, const uint8_t *bssid) 1865184610Salfred{ 1866188417Sthompsa uint16_t tmp; 1867184610Salfred 1868188417Sthompsa tmp = bssid[0] | bssid[1] << 8; 1869188417Sthompsa ural_write(sc, RAL_MAC_CSR5, tmp); 1870188417Sthompsa 1871188417Sthompsa tmp = bssid[2] | bssid[3] << 8; 1872188417Sthompsa ural_write(sc, RAL_MAC_CSR6, tmp); 1873188417Sthompsa 1874188417Sthompsa tmp = bssid[4] | bssid[5] << 8; 1875188417Sthompsa ural_write(sc, RAL_MAC_CSR7, tmp); 1876188417Sthompsa 1877188417Sthompsa DPRINTF("setting BSSID to %6D\n", bssid, ":"); 1878184610Salfred} 1879184610Salfred 1880184610Salfredstatic void 1881188417Sthompsaural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1882184610Salfred{ 1883184610Salfred uint16_t tmp; 1884184610Salfred 1885188417Sthompsa tmp = addr[0] | addr[1] << 8; 1886188417Sthompsa ural_write(sc, RAL_MAC_CSR2, tmp); 1887184610Salfred 1888188417Sthompsa tmp = addr[2] | addr[3] << 8; 1889188417Sthompsa ural_write(sc, RAL_MAC_CSR3, tmp); 1890184610Salfred 1891188417Sthompsa tmp = addr[4] | addr[5] << 8; 1892188417Sthompsa ural_write(sc, RAL_MAC_CSR4, tmp); 1893184610Salfred 1894188417Sthompsa DPRINTF("setting MAC address to %6D\n", addr, ":"); 1895184610Salfred} 1896184610Salfred 1897184610Salfredstatic void 1898191746Sthompsaural_setpromisc(struct ural_softc *sc) 1899184610Salfred{ 1900188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 1901188417Sthompsa uint32_t tmp; 1902184610Salfred 1903188417Sthompsa tmp = ural_read(sc, RAL_TXRX_CSR2); 1904184610Salfred 1905188417Sthompsa tmp &= ~RAL_DROP_NOT_TO_ME; 1906188417Sthompsa if (!(ifp->if_flags & IFF_PROMISC)) 1907188417Sthompsa tmp |= RAL_DROP_NOT_TO_ME; 1908184610Salfred 1909188417Sthompsa ural_write(sc, RAL_TXRX_CSR2, tmp); 1910184610Salfred 1911188417Sthompsa DPRINTF("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1912188417Sthompsa "entering" : "leaving"); 1913184610Salfred} 1914184610Salfred 1915189123Sthompsastatic void 1916189123Sthompsaural_update_promisc(struct ifnet *ifp) 1917189123Sthompsa{ 1918189123Sthompsa struct ural_softc *sc = ifp->if_softc; 1919189123Sthompsa 1920189123Sthompsa if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1921189123Sthompsa return; 1922189123Sthompsa 1923189123Sthompsa RAL_LOCK(sc); 1924191746Sthompsa ural_setpromisc(sc); 1925189123Sthompsa RAL_UNLOCK(sc); 1926189123Sthompsa} 1927189123Sthompsa 1928188417Sthompsastatic const char * 1929188417Sthompsaural_get_rf(int rev) 1930184610Salfred{ 1931188417Sthompsa switch (rev) { 1932188417Sthompsa case RAL_RF_2522: return "RT2522"; 1933188417Sthompsa case RAL_RF_2523: return "RT2523"; 1934188417Sthompsa case RAL_RF_2524: return "RT2524"; 1935188417Sthompsa case RAL_RF_2525: return "RT2525"; 1936188417Sthompsa case RAL_RF_2525E: return "RT2525e"; 1937188417Sthompsa case RAL_RF_2526: return "RT2526"; 1938188417Sthompsa case RAL_RF_5222: return "RT5222"; 1939188417Sthompsa default: return "unknown"; 1940184610Salfred } 1941184610Salfred} 1942184610Salfred 1943184610Salfredstatic void 1944188417Sthompsaural_read_eeprom(struct ural_softc *sc) 1945184610Salfred{ 1946184610Salfred uint16_t val; 1947184610Salfred 1948188417Sthompsa ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1949184610Salfred val = le16toh(val); 1950188417Sthompsa sc->rf_rev = (val >> 11) & 0x7; 1951188417Sthompsa sc->hw_radio = (val >> 10) & 0x1; 1952188417Sthompsa sc->led_mode = (val >> 6) & 0x7; 1953188417Sthompsa sc->rx_ant = (val >> 4) & 0x3; 1954188417Sthompsa sc->tx_ant = (val >> 2) & 0x3; 1955188417Sthompsa sc->nb_ant = val & 0x3; 1956184610Salfred 1957184610Salfred /* read MAC address */ 1958188419Sthompsa ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, sc->sc_bssid, 6); 1959184610Salfred 1960184610Salfred /* read default values for BBP registers */ 1961188417Sthompsa ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 1962184610Salfred 1963184610Salfred /* read Tx power for all b/g channels */ 1964188417Sthompsa ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 1965184610Salfred} 1966184610Salfred 1967188417Sthompsastatic int 1968188417Sthompsaural_bbp_init(struct ural_softc *sc) 1969184610Salfred{ 1970188417Sthompsa#define N(a) (sizeof (a) / sizeof ((a)[0])) 1971188417Sthompsa int i, ntries; 1972184610Salfred 1973188417Sthompsa /* wait for BBP to be ready */ 1974188417Sthompsa for (ntries = 0; ntries < 100; ntries++) { 1975188417Sthompsa if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 1976188417Sthompsa break; 1977188619Sthompsa if (ural_pause(sc, hz / 100)) 1978188619Sthompsa break; 1979184610Salfred } 1980188417Sthompsa if (ntries == 100) { 1981188417Sthompsa device_printf(sc->sc_dev, "timeout waiting for BBP\n"); 1982188417Sthompsa return EIO; 1983188417Sthompsa } 1984184610Salfred 1985184610Salfred /* initialize BBP registers to default values */ 1986188417Sthompsa for (i = 0; i < N(ural_def_bbp); i++) 1987188417Sthompsa ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 1988184610Salfred 1989184610Salfred#if 0 1990184610Salfred /* initialize BBP registers to values stored in EEPROM */ 1991184610Salfred for (i = 0; i < 16; i++) { 1992188417Sthompsa if (sc->bbp_prom[i].reg == 0xff) 1993184610Salfred continue; 1994188417Sthompsa ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 1995184610Salfred } 1996184610Salfred#endif 1997188417Sthompsa 1998188417Sthompsa return 0; 1999188417Sthompsa#undef N 2000184610Salfred} 2001184610Salfred 2002184610Salfredstatic void 2003188417Sthompsaural_set_txantenna(struct ural_softc *sc, int antenna) 2004184610Salfred{ 2005188417Sthompsa uint16_t tmp; 2006188417Sthompsa uint8_t tx; 2007184610Salfred 2008188417Sthompsa tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2009188417Sthompsa if (antenna == 1) 2010188417Sthompsa tx |= RAL_BBP_ANTA; 2011188417Sthompsa else if (antenna == 2) 2012188417Sthompsa tx |= RAL_BBP_ANTB; 2013188417Sthompsa else 2014188417Sthompsa tx |= RAL_BBP_DIVERSITY; 2015184610Salfred 2016188417Sthompsa /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2017188417Sthompsa if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2018188417Sthompsa sc->rf_rev == RAL_RF_5222) 2019188417Sthompsa tx |= RAL_BBP_FLIPIQ; 2020184610Salfred 2021188417Sthompsa ural_bbp_write(sc, RAL_BBP_TX, tx); 2022184610Salfred 2023188417Sthompsa /* update values in PHY_CSR5 and PHY_CSR6 */ 2024188417Sthompsa tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2025188417Sthompsa ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2026184610Salfred 2027188417Sthompsa tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2028188417Sthompsa ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2029184610Salfred} 2030184610Salfred 2031184610Salfredstatic void 2032188417Sthompsaural_set_rxantenna(struct ural_softc *sc, int antenna) 2033184610Salfred{ 2034188417Sthompsa uint8_t rx; 2035188417Sthompsa 2036188417Sthompsa rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2037188417Sthompsa if (antenna == 1) 2038188417Sthompsa rx |= RAL_BBP_ANTA; 2039188417Sthompsa else if (antenna == 2) 2040188417Sthompsa rx |= RAL_BBP_ANTB; 2041188417Sthompsa else 2042188417Sthompsa rx |= RAL_BBP_DIVERSITY; 2043188417Sthompsa 2044188417Sthompsa /* need to force no I/Q flip for RF 2525e and 2526 */ 2045188417Sthompsa if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2046188417Sthompsa rx &= ~RAL_BBP_FLIPIQ; 2047188417Sthompsa 2048188417Sthompsa ural_bbp_write(sc, RAL_BBP_RX, rx); 2049188417Sthompsa} 2050188417Sthompsa 2051188417Sthompsastatic void 2052191746Sthompsaural_init_locked(struct ural_softc *sc) 2053188417Sthompsa{ 2054188417Sthompsa#define N(a) (sizeof (a) / sizeof ((a)[0])) 2055188417Sthompsa struct ifnet *ifp = sc->sc_ifp; 2056188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 2057184610Salfred uint16_t tmp; 2058188417Sthompsa int i, ntries; 2059184610Salfred 2060188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 2061184610Salfred 2062188417Sthompsa ural_set_testmode(sc); 2063188417Sthompsa ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2064184610Salfred 2065191746Sthompsa ural_stop(sc); 2066184610Salfred 2067184610Salfred /* initialize MAC registers to default values */ 2068188417Sthompsa for (i = 0; i < N(ural_def_mac); i++) 2069188417Sthompsa ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2070184610Salfred 2071184610Salfred /* wait for BBP and RF to wake up (this can take a long time!) */ 2072188417Sthompsa for (ntries = 0; ntries < 100; ntries++) { 2073188417Sthompsa tmp = ural_read(sc, RAL_MAC_CSR17); 2074188417Sthompsa if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2075188417Sthompsa (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2076188417Sthompsa break; 2077188619Sthompsa if (ural_pause(sc, hz / 100)) 2078188619Sthompsa break; 2079184610Salfred } 2080188417Sthompsa if (ntries == 100) { 2081188417Sthompsa device_printf(sc->sc_dev, 2082188417Sthompsa "timeout waiting for BBP/RF to wakeup\n"); 2083188417Sthompsa goto fail; 2084188417Sthompsa } 2085184610Salfred 2086184610Salfred /* we're ready! */ 2087188417Sthompsa ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2088184610Salfred 2089184610Salfred /* set basic rate set (will be updated later) */ 2090188417Sthompsa ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2091184610Salfred 2092188417Sthompsa if (ural_bbp_init(sc) != 0) 2093184610Salfred goto fail; 2094184610Salfred 2095188417Sthompsa ural_set_chan(sc, ic->ic_curchan); 2096188417Sthompsa 2097184610Salfred /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2098188417Sthompsa ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2099184610Salfred 2100188417Sthompsa ural_set_txantenna(sc, sc->tx_ant); 2101188417Sthompsa ural_set_rxantenna(sc, sc->rx_ant); 2102184610Salfred 2103190526Ssam ural_set_macaddr(sc, IF_LLADDR(ifp)); 2104184610Salfred 2105184610Salfred /* 2106188417Sthompsa * Allocate Tx and Rx xfer queues. 2107184610Salfred */ 2108188419Sthompsa ural_setup_tx_list(sc); 2109184610Salfred 2110188417Sthompsa /* kick Rx */ 2111184610Salfred tmp = RAL_DROP_PHY | RAL_DROP_CRC; 2112188417Sthompsa if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2113188417Sthompsa tmp |= RAL_DROP_CTL | RAL_DROP_BAD_VERSION; 2114188417Sthompsa if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2115184610Salfred tmp |= RAL_DROP_TODS; 2116188417Sthompsa if (!(ifp->if_flags & IFF_PROMISC)) 2117184610Salfred tmp |= RAL_DROP_NOT_TO_ME; 2118184610Salfred } 2119188417Sthompsa ural_write(sc, RAL_TXRX_CSR2, tmp); 2120184610Salfred 2121188417Sthompsa ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2122188417Sthompsa ifp->if_drv_flags |= IFF_DRV_RUNNING; 2123189123Sthompsa usb2_transfer_set_stall(sc->sc_xfer[URAL_BULK_WR]); 2124188417Sthompsa usb2_transfer_start(sc->sc_xfer[URAL_BULK_RD]); 2125184610Salfred return; 2126184610Salfred 2127191746Sthompsafail: ural_stop(sc); 2128188417Sthompsa#undef N 2129184610Salfred} 2130184610Salfred 2131184610Salfredstatic void 2132188417Sthompsaural_init(void *priv) 2133184610Salfred{ 2134188417Sthompsa struct ural_softc *sc = priv; 2135184610Salfred struct ifnet *ifp = sc->sc_ifp; 2136188417Sthompsa struct ieee80211com *ic = ifp->if_l2com; 2137184610Salfred 2138188417Sthompsa RAL_LOCK(sc); 2139191746Sthompsa ural_init_locked(sc); 2140188417Sthompsa RAL_UNLOCK(sc); 2141184610Salfred 2142188417Sthompsa if (ifp->if_drv_flags & IFF_DRV_RUNNING) 2143188417Sthompsa ieee80211_start_all(ic); /* start all vap's */ 2144184610Salfred} 2145184610Salfred 2146184610Salfredstatic void 2147191746Sthompsaural_stop(struct ural_softc *sc) 2148184610Salfred{ 2149184610Salfred struct ifnet *ifp = sc->sc_ifp; 2150184610Salfred 2151188417Sthompsa RAL_LOCK_ASSERT(sc, MA_OWNED); 2152184610Salfred 2153188417Sthompsa ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2154184610Salfred 2155184610Salfred /* 2156188419Sthompsa * Drain all the transfers, if not already drained: 2157184610Salfred */ 2158188419Sthompsa RAL_UNLOCK(sc); 2159188419Sthompsa usb2_transfer_drain(sc->sc_xfer[URAL_BULK_WR]); 2160188419Sthompsa usb2_transfer_drain(sc->sc_xfer[URAL_BULK_RD]); 2161188419Sthompsa RAL_LOCK(sc); 2162184610Salfred 2163188419Sthompsa ural_unsetup_tx_list(sc); 2164184610Salfred 2165188417Sthompsa /* disable Rx */ 2166188417Sthompsa ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2167188417Sthompsa /* reset ASIC and BBP (but won't reset MAC registers!) */ 2168188417Sthompsa ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2169188619Sthompsa /* wait a little */ 2170188619Sthompsa ural_pause(sc, hz / 10); 2171188417Sthompsa ural_write(sc, RAL_MAC_CSR1, 0); 2172189123Sthompsa /* wait a little */ 2173189123Sthompsa ural_pause(sc, hz / 10); 2174184610Salfred} 2175184610Salfred 2176188417Sthompsastatic int 2177188417Sthompsaural_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2178188417Sthompsa const struct ieee80211_bpf_params *params) 2179184610Salfred{ 2180188417Sthompsa struct ieee80211com *ic = ni->ni_ic; 2181188417Sthompsa struct ifnet *ifp = ic->ic_ifp; 2182188417Sthompsa struct ural_softc *sc = ifp->if_softc; 2183184610Salfred 2184188417Sthompsa RAL_LOCK(sc); 2185188417Sthompsa /* prevent management frames from being sent if we're not ready */ 2186188417Sthompsa if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2187188417Sthompsa RAL_UNLOCK(sc); 2188188417Sthompsa m_freem(m); 2189188417Sthompsa ieee80211_free_node(ni); 2190188417Sthompsa return ENETDOWN; 2191184610Salfred } 2192188969Sthompsa if (sc->tx_nfree < RAL_TX_MINFREE) { 2193188417Sthompsa ifp->if_drv_flags |= IFF_DRV_OACTIVE; 2194188417Sthompsa RAL_UNLOCK(sc); 2195184610Salfred m_freem(m); 2196184610Salfred ieee80211_free_node(ni); 2197188417Sthompsa return EIO; 2198184610Salfred } 2199184610Salfred 2200188417Sthompsa ifp->if_opackets++; 2201184610Salfred 2202188417Sthompsa if (params == NULL) { 2203188417Sthompsa /* 2204188417Sthompsa * Legacy path; interpret frame contents to decide 2205188417Sthompsa * precisely how to send the frame. 2206188417Sthompsa */ 2207188417Sthompsa if (ural_tx_mgt(sc, m, ni) != 0) 2208188417Sthompsa goto bad; 2209188417Sthompsa } else { 2210188417Sthompsa /* 2211188417Sthompsa * Caller supplied explicit parameters to use in 2212188417Sthompsa * sending the frame. 2213188417Sthompsa */ 2214188417Sthompsa if (ural_tx_raw(sc, m, ni, params) != 0) 2215188417Sthompsa goto bad; 2216184610Salfred } 2217188417Sthompsa RAL_UNLOCK(sc); 2218188417Sthompsa return 0; 2219188417Sthompsabad: 2220188417Sthompsa ifp->if_oerrors++; 2221188417Sthompsa RAL_UNLOCK(sc); 2222188417Sthompsa ieee80211_free_node(ni); 2223188417Sthompsa return EIO; /* XXX */ 2224184610Salfred} 2225184610Salfred 2226184610Salfredstatic void 2227188417Sthompsaural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2228184610Salfred{ 2229188417Sthompsa struct ieee80211vap *vap = ni->ni_vap; 2230188417Sthompsa struct ural_vap *uvp = URAL_VAP(vap); 2231184610Salfred 2232188417Sthompsa /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2233188417Sthompsa ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2234184610Salfred 2235188417Sthompsa ieee80211_amrr_node_init(&uvp->amrr, &URAL_NODE(ni)->amn, ni); 2236184610Salfred 2237188417Sthompsa usb2_callout_reset(&uvp->amrr_ch, hz, ural_amrr_timeout, uvp); 2238184610Salfred} 2239184610Salfred 2240184610Salfredstatic void 2241188417Sthompsaural_amrr_timeout(void *arg) 2242184610Salfred{ 2243188417Sthompsa struct ural_vap *uvp = arg; 2244191746Sthompsa struct ieee80211vap *vap = &uvp->vap; 2245191746Sthompsa struct ieee80211com *ic = vap->iv_ic; 2246184610Salfred 2247191746Sthompsa ieee80211_runtask(ic, &uvp->amrr_task); 2248184610Salfred} 2249184610Salfred 2250184610Salfredstatic void 2251191746Sthompsaural_amrr_task(void *arg, int pending) 2252184610Salfred{ 2253191746Sthompsa struct ural_vap *uvp = arg; 2254191746Sthompsa struct ieee80211vap *vap = &uvp->vap; 2255191746Sthompsa struct ieee80211com *ic = vap->iv_ic; 2256191746Sthompsa struct ifnet *ifp = ic->ic_ifp; 2257191746Sthompsa struct ural_softc *sc = ifp->if_softc; 2258188417Sthompsa struct ieee80211_node *ni = vap->iv_bss; 2259188417Sthompsa int ok, fail; 2260184610Salfred 2261191746Sthompsa RAL_LOCK(sc); 2262188417Sthompsa /* read and clear statistic registers (STA_CSR0 to STA_CSR10) */ 2263188417Sthompsa ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2264184610Salfred 2265188417Sthompsa ok = sc->sta[7] + /* TX ok w/o retry */ 2266188417Sthompsa sc->sta[8]; /* TX ok w/ retry */ 2267188417Sthompsa fail = sc->sta[9]; /* TX retry-fail count */ 2268184610Salfred 2269188417Sthompsa ieee80211_amrr_tx_update(&URAL_NODE(ni)->amn, 2270188417Sthompsa ok+fail, ok, sc->sta[8] + fail); 2271188417Sthompsa (void) ieee80211_amrr_choose(ni, &URAL_NODE(ni)->amn); 2272184610Salfred 2273188417Sthompsa ifp->if_oerrors += fail; /* count TX retry-fail as Tx errors */ 2274184610Salfred 2275188417Sthompsa usb2_callout_reset(&uvp->amrr_ch, hz, ural_amrr_timeout, uvp); 2276191746Sthompsa RAL_UNLOCK(sc); 2277184610Salfred} 2278184610Salfred 2279188619Sthompsastatic int 2280188619Sthompsaural_pause(struct ural_softc *sc, int timeout) 2281188619Sthompsa{ 2282188619Sthompsa 2283188619Sthompsa usb2_pause_mtx(&sc->sc_mtx, timeout); 2284188619Sthompsa return (0); 2285188619Sthompsa} 2286