1184610Salfred/*	$FreeBSD$	*/
2184610Salfred
3184610Salfred/*-
4184610Salfred * Copyright (c) 2005, 2006
5184610Salfred *	Damien Bergamini <damien.bergamini@free.fr>
6184610Salfred *
7184610Salfred * Copyright (c) 2006, 2008
8189002Sed *	Hans Petter Selasky <hselasky@FreeBSD.org>
9184610Salfred *
10184610Salfred * Permission to use, copy, modify, and distribute this software for any
11184610Salfred * purpose with or without fee is hereby granted, provided that the above
12184610Salfred * copyright notice and this permission notice appear in all copies.
13184610Salfred *
14184610Salfred * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
15184610Salfred * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
16184610Salfred * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
17184610Salfred * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
18184610Salfred * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
19184610Salfred * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
20184610Salfred * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
21184610Salfred */
22184610Salfred
23184610Salfred#include <sys/cdefs.h>
24184610Salfred__FBSDID("$FreeBSD$");
25184610Salfred
26184610Salfred/*-
27184610Salfred * Ralink Technology RT2500USB chipset driver
28184610Salfred * http://www.ralinktech.com/
29184610Salfred */
30184610Salfred
31191746Sthompsa#include <sys/param.h>
32191746Sthompsa#include <sys/sockio.h>
33191746Sthompsa#include <sys/sysctl.h>
34191746Sthompsa#include <sys/lock.h>
35191746Sthompsa#include <sys/mutex.h>
36191746Sthompsa#include <sys/mbuf.h>
37191746Sthompsa#include <sys/kernel.h>
38191746Sthompsa#include <sys/socket.h>
39191746Sthompsa#include <sys/systm.h>
40191746Sthompsa#include <sys/malloc.h>
41191746Sthompsa#include <sys/module.h>
42191746Sthompsa#include <sys/bus.h>
43191746Sthompsa#include <sys/endian.h>
44191746Sthompsa#include <sys/kdb.h>
45184610Salfred
46191746Sthompsa#include <machine/bus.h>
47191746Sthompsa#include <machine/resource.h>
48191746Sthompsa#include <sys/rman.h>
49191746Sthompsa
50191746Sthompsa#include <net/bpf.h>
51191746Sthompsa#include <net/if.h>
52191746Sthompsa#include <net/if_arp.h>
53191746Sthompsa#include <net/ethernet.h>
54191746Sthompsa#include <net/if_dl.h>
55191746Sthompsa#include <net/if_media.h>
56191746Sthompsa#include <net/if_types.h>
57191746Sthompsa
58191746Sthompsa#ifdef INET
59191746Sthompsa#include <netinet/in.h>
60191746Sthompsa#include <netinet/in_systm.h>
61191746Sthompsa#include <netinet/in_var.h>
62191746Sthompsa#include <netinet/if_ether.h>
63191746Sthompsa#include <netinet/ip.h>
64191746Sthompsa#endif
65191746Sthompsa
66191746Sthompsa#include <net80211/ieee80211_var.h>
67191746Sthompsa#include <net80211/ieee80211_regdomain.h>
68191746Sthompsa#include <net80211/ieee80211_radiotap.h>
69206358Srpaulo#include <net80211/ieee80211_ratectl.h>
70191746Sthompsa
71191746Sthompsa#include <dev/usb/usb.h>
72194677Sthompsa#include <dev/usb/usbdi.h>
73191746Sthompsa#include "usbdevs.h"
74184610Salfred
75194677Sthompsa#define	USB_DEBUG_VAR ural_debug
76194677Sthompsa#include <dev/usb/usb_debug.h>
77191746Sthompsa
78188942Sthompsa#include <dev/usb/wlan/if_uralreg.h>
79188942Sthompsa#include <dev/usb/wlan/if_uralvar.h>
80184610Salfred
81207077Sthompsa#ifdef USB_DEBUG
82184610Salfredstatic int ural_debug = 0;
83184610Salfred
84248085Smariusstatic SYSCTL_NODE(_hw_usb, OID_AUTO, ural, CTLFLAG_RW, 0, "USB ural");
85192502SthompsaSYSCTL_INT(_hw_usb_ural, OID_AUTO, debug, CTLFLAG_RW, &ural_debug, 0,
86184610Salfred    "Debug level");
87184610Salfred#endif
88184610Salfred
89188417Sthompsa#define URAL_RSSI(rssi)					\
90188417Sthompsa	((rssi) > (RAL_NOISE_FLOOR + RAL_RSSI_CORR) ?	\
91188417Sthompsa	 ((rssi) - (RAL_NOISE_FLOOR + RAL_RSSI_CORR)) : 0)
92184610Salfred
93188417Sthompsa/* various supported device vendors/products */
94223486Shselaskystatic const STRUCT_USB_HOST_ID ural_devs[] = {
95201028Sthompsa#define	URAL_DEV(v,p)  { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) }
96201028Sthompsa	URAL_DEV(ASUS, WL167G),
97201028Sthompsa	URAL_DEV(ASUS, RT2570),
98201028Sthompsa	URAL_DEV(BELKIN, F5D7050),
99201028Sthompsa	URAL_DEV(BELKIN, F5D7051),
100201028Sthompsa	URAL_DEV(CISCOLINKSYS, HU200TS),
101201028Sthompsa	URAL_DEV(CISCOLINKSYS, WUSB54G),
102201028Sthompsa	URAL_DEV(CISCOLINKSYS, WUSB54GP),
103201028Sthompsa	URAL_DEV(CONCEPTRONIC2, C54RU),
104201028Sthompsa	URAL_DEV(DLINK, DWLG122),
105201028Sthompsa	URAL_DEV(GIGABYTE, GN54G),
106201028Sthompsa	URAL_DEV(GIGABYTE, GNWBKG),
107201028Sthompsa	URAL_DEV(GUILLEMOT, HWGUSB254),
108201028Sthompsa	URAL_DEV(MELCO, KG54),
109201028Sthompsa	URAL_DEV(MELCO, KG54AI),
110201028Sthompsa	URAL_DEV(MELCO, KG54YB),
111201028Sthompsa	URAL_DEV(MELCO, NINWIFI),
112201028Sthompsa	URAL_DEV(MSI, RT2570),
113201028Sthompsa	URAL_DEV(MSI, RT2570_2),
114201028Sthompsa	URAL_DEV(MSI, RT2570_3),
115201028Sthompsa	URAL_DEV(NOVATECH, NV902),
116201028Sthompsa	URAL_DEV(RALINK, RT2570),
117201028Sthompsa	URAL_DEV(RALINK, RT2570_2),
118201028Sthompsa	URAL_DEV(RALINK, RT2570_3),
119201028Sthompsa	URAL_DEV(SIEMENS2, WL54G),
120201028Sthompsa	URAL_DEV(SMC, 2862WG),
121201028Sthompsa	URAL_DEV(SPHAIRON, UB801R),
122201028Sthompsa	URAL_DEV(SURECOM, RT2570),
123201028Sthompsa	URAL_DEV(VTECH, RT2570),
124201028Sthompsa	URAL_DEV(ZINWELL, RT2570),
125201028Sthompsa#undef URAL_DEV
126188417Sthompsa};
127184610Salfred
128193045Sthompsastatic usb_callback_t ural_bulk_read_callback;
129193045Sthompsastatic usb_callback_t ural_bulk_write_callback;
130184610Salfred
131193045Sthompsastatic usb_error_t	ural_do_request(struct ural_softc *sc,
132192984Sthompsa			    struct usb_device_request *req, void *data);
133185948Sthompsastatic struct ieee80211vap *ural_vap_create(struct ieee80211com *,
134234753Sdim			    const char [IFNAMSIZ], int, enum ieee80211_opmode,
135234753Sdim			    int, const uint8_t [IEEE80211_ADDR_LEN],
136234753Sdim			    const uint8_t [IEEE80211_ADDR_LEN]);
137188417Sthompsastatic void		ural_vap_delete(struct ieee80211vap *);
138188417Sthompsastatic void		ural_tx_free(struct ural_tx_data *, int);
139188419Sthompsastatic void		ural_setup_tx_list(struct ural_softc *);
140188419Sthompsastatic void		ural_unsetup_tx_list(struct ural_softc *);
141188417Sthompsastatic int		ural_newstate(struct ieee80211vap *,
142188417Sthompsa			    enum ieee80211_state, int);
143188417Sthompsastatic void		ural_setup_tx_desc(struct ural_softc *,
144188417Sthompsa			    struct ural_tx_desc *, uint32_t, int, int);
145188417Sthompsastatic int		ural_tx_bcn(struct ural_softc *, struct mbuf *,
146188417Sthompsa			    struct ieee80211_node *);
147188417Sthompsastatic int		ural_tx_mgt(struct ural_softc *, struct mbuf *,
148188417Sthompsa			    struct ieee80211_node *);
149188417Sthompsastatic int		ural_tx_data(struct ural_softc *, struct mbuf *,
150188417Sthompsa			    struct ieee80211_node *);
151188417Sthompsastatic void		ural_start(struct ifnet *);
152188417Sthompsastatic int		ural_ioctl(struct ifnet *, u_long, caddr_t);
153188417Sthompsastatic void		ural_set_testmode(struct ural_softc *);
154188417Sthompsastatic void		ural_eeprom_read(struct ural_softc *, uint16_t, void *,
155188417Sthompsa			    int);
156188417Sthompsastatic uint16_t		ural_read(struct ural_softc *, uint16_t);
157188417Sthompsastatic void		ural_read_multi(struct ural_softc *, uint16_t, void *,
158188417Sthompsa			    int);
159188417Sthompsastatic void		ural_write(struct ural_softc *, uint16_t, uint16_t);
160188417Sthompsastatic void		ural_write_multi(struct ural_softc *, uint16_t, void *,
161188417Sthompsa			    int) __unused;
162188417Sthompsastatic void		ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
163188417Sthompsastatic uint8_t		ural_bbp_read(struct ural_softc *, uint8_t);
164188417Sthompsastatic void		ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
165188417Sthompsastatic void		ural_scan_start(struct ieee80211com *);
166188417Sthompsastatic void		ural_scan_end(struct ieee80211com *);
167188417Sthompsastatic void		ural_set_channel(struct ieee80211com *);
168188417Sthompsastatic void		ural_set_chan(struct ural_softc *,
169188417Sthompsa			    struct ieee80211_channel *);
170188417Sthompsastatic void		ural_disable_rf_tune(struct ural_softc *);
171188417Sthompsastatic void		ural_enable_tsf_sync(struct ural_softc *);
172192468Ssamstatic void 		ural_enable_tsf(struct ural_softc *);
173188417Sthompsastatic void		ural_update_slot(struct ifnet *);
174188417Sthompsastatic void		ural_set_txpreamble(struct ural_softc *);
175188417Sthompsastatic void		ural_set_basicrates(struct ural_softc *,
176188417Sthompsa			    const struct ieee80211_channel *);
177188417Sthompsastatic void		ural_set_bssid(struct ural_softc *, const uint8_t *);
178188417Sthompsastatic void		ural_set_macaddr(struct ural_softc *, uint8_t *);
179189123Sthompsastatic void		ural_update_promisc(struct ifnet *);
180191746Sthompsastatic void		ural_setpromisc(struct ural_softc *);
181188417Sthompsastatic const char	*ural_get_rf(int);
182188417Sthompsastatic void		ural_read_eeprom(struct ural_softc *);
183188417Sthompsastatic int		ural_bbp_init(struct ural_softc *);
184188417Sthompsastatic void		ural_set_txantenna(struct ural_softc *, int);
185188417Sthompsastatic void		ural_set_rxantenna(struct ural_softc *, int);
186191746Sthompsastatic void		ural_init_locked(struct ural_softc *);
187188417Sthompsastatic void		ural_init(void *);
188191746Sthompsastatic void		ural_stop(struct ural_softc *);
189188417Sthompsastatic int		ural_raw_xmit(struct ieee80211_node *, struct mbuf *,
190188417Sthompsa			    const struct ieee80211_bpf_params *);
191206358Srpaulostatic void		ural_ratectl_start(struct ural_softc *,
192188417Sthompsa			    struct ieee80211_node *);
193206358Srpaulostatic void		ural_ratectl_timeout(void *);
194206358Srpaulostatic void		ural_ratectl_task(void *, int);
195188619Sthompsastatic int		ural_pause(struct ural_softc *sc, int timeout);
196184610Salfred
197184610Salfred/*
198188417Sthompsa * Default values for MAC registers; values taken from the reference driver.
199184610Salfred */
200188417Sthompsastatic const struct {
201188417Sthompsa	uint16_t	reg;
202188417Sthompsa	uint16_t	val;
203188417Sthompsa} ural_def_mac[] = {
204188417Sthompsa	{ RAL_TXRX_CSR5,  0x8c8d },
205188417Sthompsa	{ RAL_TXRX_CSR6,  0x8b8a },
206188417Sthompsa	{ RAL_TXRX_CSR7,  0x8687 },
207188417Sthompsa	{ RAL_TXRX_CSR8,  0x0085 },
208188417Sthompsa	{ RAL_MAC_CSR13,  0x1111 },
209188417Sthompsa	{ RAL_MAC_CSR14,  0x1e11 },
210188417Sthompsa	{ RAL_TXRX_CSR21, 0xe78f },
211188417Sthompsa	{ RAL_MAC_CSR9,   0xff1d },
212188417Sthompsa	{ RAL_MAC_CSR11,  0x0002 },
213188417Sthompsa	{ RAL_MAC_CSR22,  0x0053 },
214188417Sthompsa	{ RAL_MAC_CSR15,  0x0000 },
215188417Sthompsa	{ RAL_MAC_CSR8,   RAL_FRAME_SIZE },
216188417Sthompsa	{ RAL_TXRX_CSR19, 0x0000 },
217188417Sthompsa	{ RAL_TXRX_CSR18, 0x005a },
218188417Sthompsa	{ RAL_PHY_CSR2,   0x0000 },
219188417Sthompsa	{ RAL_TXRX_CSR0,  0x1ec0 },
220188417Sthompsa	{ RAL_PHY_CSR4,   0x000f }
221184610Salfred};
222184610Salfred
223184610Salfred/*
224184610Salfred * Default values for BBP registers; values taken from the reference driver.
225184610Salfred */
226188417Sthompsastatic const struct {
227184610Salfred	uint8_t	reg;
228184610Salfred	uint8_t	val;
229188417Sthompsa} ural_def_bbp[] = {
230188417Sthompsa	{  3, 0x02 },
231188417Sthompsa	{  4, 0x19 },
232188417Sthompsa	{ 14, 0x1c },
233188417Sthompsa	{ 15, 0x30 },
234188417Sthompsa	{ 16, 0xac },
235188417Sthompsa	{ 17, 0x48 },
236188417Sthompsa	{ 18, 0x18 },
237188417Sthompsa	{ 19, 0xff },
238188417Sthompsa	{ 20, 0x1e },
239188417Sthompsa	{ 21, 0x08 },
240188417Sthompsa	{ 22, 0x08 },
241188417Sthompsa	{ 23, 0x08 },
242188417Sthompsa	{ 24, 0x80 },
243188417Sthompsa	{ 25, 0x50 },
244188417Sthompsa	{ 26, 0x08 },
245188417Sthompsa	{ 27, 0x23 },
246188417Sthompsa	{ 30, 0x10 },
247188417Sthompsa	{ 31, 0x2b },
248188417Sthompsa	{ 32, 0xb9 },
249188417Sthompsa	{ 34, 0x12 },
250188417Sthompsa	{ 35, 0x50 },
251188417Sthompsa	{ 39, 0xc4 },
252188417Sthompsa	{ 40, 0x02 },
253188417Sthompsa	{ 41, 0x60 },
254188417Sthompsa	{ 53, 0x10 },
255188417Sthompsa	{ 54, 0x18 },
256188417Sthompsa	{ 56, 0x08 },
257188417Sthompsa	{ 57, 0x10 },
258188417Sthompsa	{ 58, 0x08 },
259188417Sthompsa	{ 61, 0x60 },
260188417Sthompsa	{ 62, 0x10 },
261188417Sthompsa	{ 75, 0xff }
262184610Salfred};
263184610Salfred
264184610Salfred/*
265184610Salfred * Default values for RF register R2 indexed by channel numbers.
266184610Salfred */
267184610Salfredstatic const uint32_t ural_rf2522_r2[] = {
268184610Salfred	0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
269184610Salfred	0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
270184610Salfred};
271184610Salfred
272184610Salfredstatic const uint32_t ural_rf2523_r2[] = {
273184610Salfred	0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
274184610Salfred	0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
275184610Salfred};
276184610Salfred
277184610Salfredstatic const uint32_t ural_rf2524_r2[] = {
278184610Salfred	0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
279184610Salfred	0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
280184610Salfred};
281184610Salfred
282184610Salfredstatic const uint32_t ural_rf2525_r2[] = {
283184610Salfred	0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
284184610Salfred	0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
285184610Salfred};
286184610Salfred
287184610Salfredstatic const uint32_t ural_rf2525_hi_r2[] = {
288184610Salfred	0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
289184610Salfred	0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
290184610Salfred};
291184610Salfred
292184610Salfredstatic const uint32_t ural_rf2525e_r2[] = {
293184610Salfred	0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
294184610Salfred	0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
295184610Salfred};
296184610Salfred
297184610Salfredstatic const uint32_t ural_rf2526_hi_r2[] = {
298184610Salfred	0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
299184610Salfred	0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
300184610Salfred};
301184610Salfred
302184610Salfredstatic const uint32_t ural_rf2526_r2[] = {
303184610Salfred	0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
304184610Salfred	0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
305184610Salfred};
306184610Salfred
307184610Salfred/*
308184610Salfred * For dual-band RF, RF registers R1 and R4 also depend on channel number;
309184610Salfred * values taken from the reference driver.
310184610Salfred */
311188417Sthompsastatic const struct {
312188417Sthompsa	uint8_t		chan;
313188417Sthompsa	uint32_t	r1;
314188417Sthompsa	uint32_t	r2;
315188417Sthompsa	uint32_t	r4;
316188417Sthompsa} ural_rf5222[] = {
317188417Sthompsa	{   1, 0x08808, 0x0044d, 0x00282 },
318188417Sthompsa	{   2, 0x08808, 0x0044e, 0x00282 },
319188417Sthompsa	{   3, 0x08808, 0x0044f, 0x00282 },
320188417Sthompsa	{   4, 0x08808, 0x00460, 0x00282 },
321188417Sthompsa	{   5, 0x08808, 0x00461, 0x00282 },
322188417Sthompsa	{   6, 0x08808, 0x00462, 0x00282 },
323188417Sthompsa	{   7, 0x08808, 0x00463, 0x00282 },
324188417Sthompsa	{   8, 0x08808, 0x00464, 0x00282 },
325188417Sthompsa	{   9, 0x08808, 0x00465, 0x00282 },
326188417Sthompsa	{  10, 0x08808, 0x00466, 0x00282 },
327188417Sthompsa	{  11, 0x08808, 0x00467, 0x00282 },
328188417Sthompsa	{  12, 0x08808, 0x00468, 0x00282 },
329188417Sthompsa	{  13, 0x08808, 0x00469, 0x00282 },
330188417Sthompsa	{  14, 0x08808, 0x0046b, 0x00286 },
331184610Salfred
332188417Sthompsa	{  36, 0x08804, 0x06225, 0x00287 },
333188417Sthompsa	{  40, 0x08804, 0x06226, 0x00287 },
334188417Sthompsa	{  44, 0x08804, 0x06227, 0x00287 },
335188417Sthompsa	{  48, 0x08804, 0x06228, 0x00287 },
336188417Sthompsa	{  52, 0x08804, 0x06229, 0x00287 },
337188417Sthompsa	{  56, 0x08804, 0x0622a, 0x00287 },
338188417Sthompsa	{  60, 0x08804, 0x0622b, 0x00287 },
339188417Sthompsa	{  64, 0x08804, 0x0622c, 0x00287 },
340184610Salfred
341188417Sthompsa	{ 100, 0x08804, 0x02200, 0x00283 },
342188417Sthompsa	{ 104, 0x08804, 0x02201, 0x00283 },
343188417Sthompsa	{ 108, 0x08804, 0x02202, 0x00283 },
344188417Sthompsa	{ 112, 0x08804, 0x02203, 0x00283 },
345188417Sthompsa	{ 116, 0x08804, 0x02204, 0x00283 },
346188417Sthompsa	{ 120, 0x08804, 0x02205, 0x00283 },
347188417Sthompsa	{ 124, 0x08804, 0x02206, 0x00283 },
348188417Sthompsa	{ 128, 0x08804, 0x02207, 0x00283 },
349188417Sthompsa	{ 132, 0x08804, 0x02208, 0x00283 },
350188417Sthompsa	{ 136, 0x08804, 0x02209, 0x00283 },
351188417Sthompsa	{ 140, 0x08804, 0x0220a, 0x00283 },
352184610Salfred
353188417Sthompsa	{ 149, 0x08808, 0x02429, 0x00281 },
354188417Sthompsa	{ 153, 0x08808, 0x0242b, 0x00281 },
355188417Sthompsa	{ 157, 0x08808, 0x0242d, 0x00281 },
356188417Sthompsa	{ 161, 0x08808, 0x0242f, 0x00281 }
357184610Salfred};
358184610Salfred
359192984Sthompsastatic const struct usb_config ural_config[URAL_N_TRANSFER] = {
360188417Sthompsa	[URAL_BULK_WR] = {
361184610Salfred		.type = UE_BULK,
362184610Salfred		.endpoint = UE_ADDR_ANY,
363184610Salfred		.direction = UE_DIR_OUT,
364190734Sthompsa		.bufsize = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE + 4),
365190734Sthompsa		.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
366190734Sthompsa		.callback = ural_bulk_write_callback,
367190734Sthompsa		.timeout = 5000,	/* ms */
368184610Salfred	},
369188417Sthompsa	[URAL_BULK_RD] = {
370184610Salfred		.type = UE_BULK,
371184610Salfred		.endpoint = UE_ADDR_ANY,
372184610Salfred		.direction = UE_DIR_IN,
373190734Sthompsa		.bufsize = (RAL_FRAME_SIZE + RAL_RX_DESC_SIZE),
374190734Sthompsa		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
375190734Sthompsa		.callback = ural_bulk_read_callback,
376184610Salfred	},
377184610Salfred};
378184610Salfred
379188417Sthompsastatic device_probe_t ural_match;
380188417Sthompsastatic device_attach_t ural_attach;
381188417Sthompsastatic device_detach_t ural_detach;
382184610Salfred
383184610Salfredstatic device_method_t ural_methods[] = {
384188417Sthompsa	/* Device interface */
385188417Sthompsa	DEVMETHOD(device_probe,		ural_match),
386188417Sthompsa	DEVMETHOD(device_attach,	ural_attach),
387188417Sthompsa	DEVMETHOD(device_detach,	ural_detach),
388259456Shselasky	DEVMETHOD_END
389184610Salfred};
390184610Salfred
391184610Salfredstatic driver_t ural_driver = {
392184610Salfred	.name = "ural",
393184610Salfred	.methods = ural_methods,
394184610Salfred	.size = sizeof(struct ural_softc),
395184610Salfred};
396184610Salfred
397188417Sthompsastatic devclass_t ural_devclass;
398188417Sthompsa
399189275SthompsaDRIVER_MODULE(ural, uhub, ural_driver, ural_devclass, NULL, 0);
400188942SthompsaMODULE_DEPEND(ural, usb, 1, 1, 1);
401184610SalfredMODULE_DEPEND(ural, wlan, 1, 1, 1);
402212122SthompsaMODULE_VERSION(ural, 1);
403184610Salfred
404184610Salfredstatic int
405188417Sthompsaural_match(device_t self)
406184610Salfred{
407192984Sthompsa	struct usb_attach_arg *uaa = device_get_ivars(self);
408184610Salfred
409192499Sthompsa	if (uaa->usb_mode != USB_MODE_HOST)
410184610Salfred		return (ENXIO);
411188417Sthompsa	if (uaa->info.bConfigIndex != 0)
412184610Salfred		return (ENXIO);
413188417Sthompsa	if (uaa->info.bIfaceIndex != RAL_IFACE_INDEX)
414184610Salfred		return (ENXIO);
415188417Sthompsa
416194228Sthompsa	return (usbd_lookup_id_by_uaa(ural_devs, sizeof(ural_devs), uaa));
417184610Salfred}
418184610Salfred
419184610Salfredstatic int
420188417Sthompsaural_attach(device_t self)
421184610Salfred{
422192984Sthompsa	struct usb_attach_arg *uaa = device_get_ivars(self);
423188417Sthompsa	struct ural_softc *sc = device_get_softc(self);
424191746Sthompsa	struct ifnet *ifp;
425191746Sthompsa	struct ieee80211com *ic;
426191746Sthompsa	uint8_t iface_index, bands;
427184610Salfred	int error;
428184610Salfred
429194228Sthompsa	device_set_usb_desc(self);
430184610Salfred	sc->sc_udev = uaa->device;
431188417Sthompsa	sc->sc_dev = self;
432184610Salfred
433188417Sthompsa	mtx_init(&sc->sc_mtx, device_get_nameunit(self),
434188417Sthompsa	    MTX_NETWORK_LOCK, MTX_DEF);
435184610Salfred
436184610Salfred	iface_index = RAL_IFACE_INDEX;
437194228Sthompsa	error = usbd_transfer_setup(uaa->device,
438184610Salfred	    &iface_index, sc->sc_xfer, ural_config,
439184610Salfred	    URAL_N_TRANSFER, sc, &sc->sc_mtx);
440184610Salfred	if (error) {
441188417Sthompsa		device_printf(self, "could not allocate USB transfers, "
442194228Sthompsa		    "err=%s\n", usbd_errstr(error));
443184610Salfred		goto detach;
444184610Salfred	}
445184610Salfred
446188419Sthompsa	RAL_LOCK(sc);
447188417Sthompsa	/* retrieve RT2570 rev. no */
448188417Sthompsa	sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
449184610Salfred
450188417Sthompsa	/* retrieve MAC address and various other things from EEPROM */
451188417Sthompsa	ural_read_eeprom(sc);
452188417Sthompsa	RAL_UNLOCK(sc);
453184610Salfred
454191746Sthompsa	device_printf(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
455188417Sthompsa	    sc->asic_rev, ural_get_rf(sc->rf_rev));
456184610Salfred
457188419Sthompsa	ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
458188419Sthompsa	if (ifp == NULL) {
459188419Sthompsa		device_printf(sc->sc_dev, "can not if_alloc()\n");
460191746Sthompsa		goto detach;
461188419Sthompsa	}
462188419Sthompsa	ic = ifp->if_l2com;
463188419Sthompsa
464188417Sthompsa	ifp->if_softc = sc;
465188417Sthompsa	if_initname(ifp, "ural", device_get_unit(sc->sc_dev));
466188417Sthompsa	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
467188417Sthompsa	ifp->if_init = ural_init;
468188417Sthompsa	ifp->if_ioctl = ural_ioctl;
469188417Sthompsa	ifp->if_start = ural_start;
470207554Ssobomax	IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
471207554Ssobomax	ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
472188417Sthompsa	IFQ_SET_READY(&ifp->if_snd);
473184610Salfred
474188417Sthompsa	ic->ic_ifp = ifp;
475188417Sthompsa	ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
476184610Salfred
477188417Sthompsa	/* set device capabilities */
478188417Sthompsa	ic->ic_caps =
479188417Sthompsa	      IEEE80211_C_STA		/* station mode supported */
480188417Sthompsa	    | IEEE80211_C_IBSS		/* IBSS mode supported */
481188417Sthompsa	    | IEEE80211_C_MONITOR	/* monitor mode supported */
482188417Sthompsa	    | IEEE80211_C_HOSTAP	/* HostAp mode supported */
483188417Sthompsa	    | IEEE80211_C_TXPMGT	/* tx power management */
484188417Sthompsa	    | IEEE80211_C_SHPREAMBLE	/* short preamble supported */
485188417Sthompsa	    | IEEE80211_C_SHSLOT	/* short slot time supported */
486188417Sthompsa	    | IEEE80211_C_BGSCAN	/* bg scanning supported */
487188417Sthompsa	    | IEEE80211_C_WPA		/* 802.11i */
488188417Sthompsa	    ;
489184610Salfred
490188417Sthompsa	bands = 0;
491188417Sthompsa	setbit(&bands, IEEE80211_MODE_11B);
492188417Sthompsa	setbit(&bands, IEEE80211_MODE_11G);
493188417Sthompsa	if (sc->rf_rev == RAL_RF_5222)
494188417Sthompsa		setbit(&bands, IEEE80211_MODE_11A);
495188417Sthompsa	ieee80211_init_channels(ic, NULL, &bands);
496184610Salfred
497190526Ssam	ieee80211_ifattach(ic, sc->sc_bssid);
498189123Sthompsa	ic->ic_update_promisc = ural_update_promisc;
499188417Sthompsa	ic->ic_raw_xmit = ural_raw_xmit;
500188417Sthompsa	ic->ic_scan_start = ural_scan_start;
501188417Sthompsa	ic->ic_scan_end = ural_scan_end;
502188417Sthompsa	ic->ic_set_channel = ural_set_channel;
503184610Salfred
504188417Sthompsa	ic->ic_vap_create = ural_vap_create;
505188417Sthompsa	ic->ic_vap_delete = ural_vap_delete;
506184610Salfred
507192468Ssam	ieee80211_radiotap_attach(ic,
508192468Ssam	    &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
509192468Ssam		RAL_TX_RADIOTAP_PRESENT,
510192468Ssam	    &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
511192468Ssam		RAL_RX_RADIOTAP_PRESENT);
512184610Salfred
513188417Sthompsa	if (bootverbose)
514188417Sthompsa		ieee80211_announce(ic);
515184610Salfred
516191746Sthompsa	return (0);
517191746Sthompsa
518191746Sthompsadetach:
519191746Sthompsa	ural_detach(self);
520191746Sthompsa	return (ENXIO);			/* failure */
521188417Sthompsa}
522184610Salfred
523188417Sthompsastatic int
524188417Sthompsaural_detach(device_t self)
525188417Sthompsa{
526188417Sthompsa	struct ural_softc *sc = device_get_softc(self);
527188417Sthompsa	struct ifnet *ifp = sc->sc_ifp;
528188619Sthompsa	struct ieee80211com *ic;
529184610Salfred
530259456Shselasky	/* prevent further ioctls */
531259456Shselasky	RAL_LOCK(sc);
532259456Shselasky	sc->sc_detached = 1;
533259456Shselasky	RAL_UNLOCK(sc);
534259456Shselasky
535188419Sthompsa	/* stop all USB transfers */
536194228Sthompsa	usbd_transfer_unsetup(sc->sc_xfer, URAL_N_TRANSFER);
537184610Salfred
538188419Sthompsa	/* free TX list, if any */
539188419Sthompsa	RAL_LOCK(sc);
540188419Sthompsa	ural_unsetup_tx_list(sc);
541188419Sthompsa	RAL_UNLOCK(sc);
542188419Sthompsa
543188417Sthompsa	if (ifp) {
544188619Sthompsa		ic = ifp->if_l2com;
545188417Sthompsa		ieee80211_ifdetach(ic);
546188417Sthompsa		if_free(ifp);
547184610Salfred	}
548188417Sthompsa	mtx_destroy(&sc->sc_mtx);
549184610Salfred
550188417Sthompsa	return (0);
551184610Salfred}
552184610Salfred
553193045Sthompsastatic usb_error_t
554189123Sthompsaural_do_request(struct ural_softc *sc,
555192984Sthompsa    struct usb_device_request *req, void *data)
556189123Sthompsa{
557193045Sthompsa	usb_error_t err;
558189123Sthompsa	int ntries = 10;
559189123Sthompsa
560189123Sthompsa	while (ntries--) {
561194228Sthompsa		err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx,
562189123Sthompsa		    req, data, 0, NULL, 250 /* ms */);
563189123Sthompsa		if (err == 0)
564189123Sthompsa			break;
565189123Sthompsa
566189123Sthompsa		DPRINTFN(1, "Control request failed, %s (retrying)\n",
567194228Sthompsa		    usbd_errstr(err));
568189123Sthompsa		if (ural_pause(sc, hz / 100))
569189123Sthompsa			break;
570189123Sthompsa	}
571189123Sthompsa	return (err);
572189123Sthompsa}
573189123Sthompsa
574188417Sthompsastatic struct ieee80211vap *
575234753Sdimural_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
576234753Sdim    enum ieee80211_opmode opmode, int flags,
577234753Sdim    const uint8_t bssid[IEEE80211_ADDR_LEN],
578234753Sdim    const uint8_t mac[IEEE80211_ADDR_LEN])
579184610Salfred{
580188417Sthompsa	struct ural_softc *sc = ic->ic_ifp->if_softc;
581188417Sthompsa	struct ural_vap *uvp;
582188417Sthompsa	struct ieee80211vap *vap;
583184610Salfred
584188417Sthompsa	if (!TAILQ_EMPTY(&ic->ic_vaps))		/* only one at a time */
585188417Sthompsa		return NULL;
586188417Sthompsa	uvp = (struct ural_vap *) malloc(sizeof(struct ural_vap),
587188417Sthompsa	    M_80211_VAP, M_NOWAIT | M_ZERO);
588188417Sthompsa	if (uvp == NULL)
589188417Sthompsa		return NULL;
590188417Sthompsa	vap = &uvp->vap;
591188417Sthompsa	/* enable s/w bmiss handling for sta mode */
592184610Salfred
593259457Shselasky	if (ieee80211_vap_setup(ic, vap, name, unit, opmode,
594259457Shselasky	    flags | IEEE80211_CLONE_NOBEACONS, bssid, mac) != 0) {
595259457Shselasky		/* out of memory */
596259457Shselasky		free(uvp, M_80211_VAP);
597259457Shselasky		return (NULL);
598259457Shselasky	}
599259457Shselasky
600188417Sthompsa	/* override state transition machine */
601188417Sthompsa	uvp->newstate = vap->iv_newstate;
602188417Sthompsa	vap->iv_newstate = ural_newstate;
603184610Salfred
604206358Srpaulo	usb_callout_init_mtx(&uvp->ratectl_ch, &sc->sc_mtx, 0);
605206358Srpaulo	TASK_INIT(&uvp->ratectl_task, 0, ural_ratectl_task, uvp);
606206358Srpaulo	ieee80211_ratectl_init(vap);
607206358Srpaulo	ieee80211_ratectl_setinterval(vap, 1000 /* 1 sec */);
608184610Salfred
609188417Sthompsa	/* complete setup */
610188417Sthompsa	ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status);
611188417Sthompsa	ic->ic_opmode = opmode;
612188417Sthompsa	return vap;
613184610Salfred}
614184610Salfred
615184610Salfredstatic void
616188417Sthompsaural_vap_delete(struct ieee80211vap *vap)
617184610Salfred{
618188417Sthompsa	struct ural_vap *uvp = URAL_VAP(vap);
619191746Sthompsa	struct ieee80211com *ic = vap->iv_ic;
620184610Salfred
621206358Srpaulo	usb_callout_drain(&uvp->ratectl_ch);
622206358Srpaulo	ieee80211_draintask(ic, &uvp->ratectl_task);
623206358Srpaulo	ieee80211_ratectl_deinit(vap);
624188417Sthompsa	ieee80211_vap_detach(vap);
625188417Sthompsa	free(uvp, M_80211_VAP);
626184610Salfred}
627184610Salfred
628184610Salfredstatic void
629188417Sthompsaural_tx_free(struct ural_tx_data *data, int txerr)
630184610Salfred{
631188417Sthompsa	struct ural_softc *sc = data->sc;
632184610Salfred
633188417Sthompsa	if (data->m != NULL) {
634188417Sthompsa		if (data->m->m_flags & M_TXCB)
635188417Sthompsa			ieee80211_process_callback(data->ni, data->m,
636188417Sthompsa			    txerr ? ETIMEDOUT : 0);
637188417Sthompsa		m_freem(data->m);
638188417Sthompsa		data->m = NULL;
639184610Salfred
640188417Sthompsa		ieee80211_free_node(data->ni);
641188417Sthompsa		data->ni = NULL;
642188417Sthompsa	}
643188417Sthompsa	STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
644188417Sthompsa	sc->tx_nfree++;
645184610Salfred}
646184610Salfred
647188419Sthompsastatic void
648188419Sthompsaural_setup_tx_list(struct ural_softc *sc)
649184610Salfred{
650188417Sthompsa	struct ural_tx_data *data;
651188417Sthompsa	int i;
652184610Salfred
653188417Sthompsa	sc->tx_nfree = 0;
654188417Sthompsa	STAILQ_INIT(&sc->tx_q);
655188417Sthompsa	STAILQ_INIT(&sc->tx_free);
656184610Salfred
657188417Sthompsa	for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
658188417Sthompsa		data = &sc->tx_data[i];
659184610Salfred
660188417Sthompsa		data->sc = sc;
661188417Sthompsa		STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
662188417Sthompsa		sc->tx_nfree++;
663184610Salfred	}
664184610Salfred}
665184610Salfred
666184610Salfredstatic void
667188419Sthompsaural_unsetup_tx_list(struct ural_softc *sc)
668184610Salfred{
669188417Sthompsa	struct ural_tx_data *data;
670188417Sthompsa	int i;
671184610Salfred
672188419Sthompsa	/* make sure any subsequent use of the queues will fail */
673188419Sthompsa	sc->tx_nfree = 0;
674188419Sthompsa	STAILQ_INIT(&sc->tx_q);
675188419Sthompsa	STAILQ_INIT(&sc->tx_free);
676184610Salfred
677188419Sthompsa	/* free up all node references and mbufs */
678188417Sthompsa	for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
679188417Sthompsa		data = &sc->tx_data[i];
680184610Salfred
681188417Sthompsa		if (data->m != NULL) {
682188417Sthompsa			m_freem(data->m);
683188417Sthompsa			data->m = NULL;
684188417Sthompsa		}
685188417Sthompsa		if (data->ni != NULL) {
686188417Sthompsa			ieee80211_free_node(data->ni);
687188417Sthompsa			data->ni = NULL;
688188417Sthompsa		}
689184610Salfred	}
690184610Salfred}
691184610Salfred
692191746Sthompsastatic int
693191746Sthompsaural_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
694184610Salfred{
695188417Sthompsa	struct ural_vap *uvp = URAL_VAP(vap);
696191746Sthompsa	struct ieee80211com *ic = vap->iv_ic;
697191746Sthompsa	struct ural_softc *sc = ic->ic_ifp->if_softc;
698188417Sthompsa	const struct ieee80211_txparam *tp;
699188417Sthompsa	struct ieee80211_node *ni;
700188417Sthompsa	struct mbuf *m;
701184610Salfred
702191746Sthompsa	DPRINTF("%s -> %s\n",
703191746Sthompsa		ieee80211_state_name[vap->iv_state],
704191746Sthompsa		ieee80211_state_name[nstate]);
705184610Salfred
706191746Sthompsa	IEEE80211_UNLOCK(ic);
707191746Sthompsa	RAL_LOCK(sc);
708206358Srpaulo	usb_callout_stop(&uvp->ratectl_ch);
709191746Sthompsa
710191746Sthompsa	switch (nstate) {
711188417Sthompsa	case IEEE80211_S_INIT:
712191746Sthompsa		if (vap->iv_state == IEEE80211_S_RUN) {
713188417Sthompsa			/* abort TSF synchronization */
714188417Sthompsa			ural_write(sc, RAL_TXRX_CSR19, 0);
715184610Salfred
716188417Sthompsa			/* force tx led to stop blinking */
717188417Sthompsa			ural_write(sc, RAL_MAC_CSR20, 0);
718188417Sthompsa		}
719188417Sthompsa		break;
720184610Salfred
721188417Sthompsa	case IEEE80211_S_RUN:
722212127Sthompsa		ni = ieee80211_ref_node(vap->iv_bss);
723188417Sthompsa
724188417Sthompsa		if (vap->iv_opmode != IEEE80211_M_MONITOR) {
725236897Shselasky			if (ic->ic_bsschan == IEEE80211_CHAN_ANYC) {
726236897Shselasky				RAL_UNLOCK(sc);
727236897Shselasky				IEEE80211_LOCK(ic);
728236897Shselasky				ieee80211_free_node(ni);
729236897Shselasky				return (-1);
730236897Shselasky			}
731188417Sthompsa			ural_update_slot(ic->ic_ifp);
732188417Sthompsa			ural_set_txpreamble(sc);
733188417Sthompsa			ural_set_basicrates(sc, ic->ic_bsschan);
734188419Sthompsa			IEEE80211_ADDR_COPY(sc->sc_bssid, ni->ni_bssid);
735188419Sthompsa			ural_set_bssid(sc, sc->sc_bssid);
736188417Sthompsa		}
737188417Sthompsa
738188417Sthompsa		if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
739188417Sthompsa		    vap->iv_opmode == IEEE80211_M_IBSS) {
740188417Sthompsa			m = ieee80211_beacon_alloc(ni, &uvp->bo);
741188417Sthompsa			if (m == NULL) {
742188417Sthompsa				device_printf(sc->sc_dev,
743188417Sthompsa				    "could not allocate beacon\n");
744191746Sthompsa				RAL_UNLOCK(sc);
745191746Sthompsa				IEEE80211_LOCK(ic);
746212127Sthompsa				ieee80211_free_node(ni);
747191746Sthompsa				return (-1);
748184610Salfred			}
749191710Sthompsa			ieee80211_ref_node(ni);
750188417Sthompsa			if (ural_tx_bcn(sc, m, ni) != 0) {
751188417Sthompsa				device_printf(sc->sc_dev,
752188417Sthompsa				    "could not send beacon\n");
753191746Sthompsa				RAL_UNLOCK(sc);
754191746Sthompsa				IEEE80211_LOCK(ic);
755212127Sthompsa				ieee80211_free_node(ni);
756191746Sthompsa				return (-1);
757184610Salfred			}
758184610Salfred		}
759184610Salfred
760188417Sthompsa		/* make tx led blink on tx (controlled by ASIC) */
761188417Sthompsa		ural_write(sc, RAL_MAC_CSR20, 1);
762184610Salfred
763188417Sthompsa		if (vap->iv_opmode != IEEE80211_M_MONITOR)
764188417Sthompsa			ural_enable_tsf_sync(sc);
765192468Ssam		else
766192468Ssam			ural_enable_tsf(sc);
767184610Salfred
768188417Sthompsa		/* enable automatic rate adaptation */
769192468Ssam		/* XXX should use ic_bsschan but not valid until after newstate call below */
770192468Ssam		tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
771188417Sthompsa		if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE)
772206358Srpaulo			ural_ratectl_start(sc, ni);
773212127Sthompsa		ieee80211_free_node(ni);
774188417Sthompsa		break;
775184610Salfred
776188417Sthompsa	default:
777188417Sthompsa		break;
778188417Sthompsa	}
779188417Sthompsa	RAL_UNLOCK(sc);
780188417Sthompsa	IEEE80211_LOCK(ic);
781191746Sthompsa	return (uvp->newstate(vap, nstate, arg));
782188417Sthompsa}
783184610Salfred
784184610Salfred
785188417Sthompsastatic void
786194677Sthompsaural_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
787188417Sthompsa{
788194677Sthompsa	struct ural_softc *sc = usbd_xfer_softc(xfer);
789188417Sthompsa	struct ifnet *ifp = sc->sc_ifp;
790192468Ssam	struct ieee80211vap *vap;
791188417Sthompsa	struct ural_tx_data *data;
792188417Sthompsa	struct mbuf *m;
793194677Sthompsa	struct usb_page_cache *pc;
794194677Sthompsa	int len;
795184610Salfred
796194677Sthompsa	usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
797194677Sthompsa
798188417Sthompsa	switch (USB_GET_STATE(xfer)) {
799188417Sthompsa	case USB_ST_TRANSFERRED:
800194677Sthompsa		DPRINTFN(11, "transfer complete, %d bytes\n", len);
801184610Salfred
802188417Sthompsa		/* free resources */
803194677Sthompsa		data = usbd_xfer_get_priv(xfer);
804188417Sthompsa		ural_tx_free(data, 0);
805194677Sthompsa		usbd_xfer_set_priv(xfer, NULL);
806184610Salfred
807188417Sthompsa		ifp->if_opackets++;
808188417Sthompsa		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
809184610Salfred
810188417Sthompsa		/* FALLTHROUGH */
811188417Sthompsa	case USB_ST_SETUP:
812188417Sthompsatr_setup:
813188417Sthompsa		data = STAILQ_FIRST(&sc->tx_q);
814188417Sthompsa		if (data) {
815188417Sthompsa			STAILQ_REMOVE_HEAD(&sc->tx_q, next);
816188417Sthompsa			m = data->m;
817184610Salfred
818235000Shselasky			if (m->m_pkthdr.len > (int)(RAL_FRAME_SIZE + RAL_TX_DESC_SIZE)) {
819188417Sthompsa				DPRINTFN(0, "data overflow, %u bytes\n",
820188417Sthompsa				    m->m_pkthdr.len);
821188417Sthompsa				m->m_pkthdr.len = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE);
822188417Sthompsa			}
823194677Sthompsa			pc = usbd_xfer_get_frame(xfer, 0);
824194677Sthompsa			usbd_copy_in(pc, 0, &data->desc, RAL_TX_DESC_SIZE);
825194677Sthompsa			usbd_m_copy_in(pc, RAL_TX_DESC_SIZE, m, 0,
826188417Sthompsa			    m->m_pkthdr.len);
827184610Salfred
828192468Ssam			vap = data->ni->ni_vap;
829192468Ssam			if (ieee80211_radiotap_active_vap(vap)) {
830188417Sthompsa				struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
831184610Salfred
832188417Sthompsa				tap->wt_flags = 0;
833188417Sthompsa				tap->wt_rate = data->rate;
834188417Sthompsa				tap->wt_antenna = sc->tx_ant;
835184610Salfred
836192468Ssam				ieee80211_radiotap_tx(vap, m);
837188417Sthompsa			}
838184610Salfred
839188417Sthompsa			/* xfer length needs to be a multiple of two! */
840188417Sthompsa			len = (RAL_TX_DESC_SIZE + m->m_pkthdr.len + 1) & ~1;
841188417Sthompsa			if ((len % 64) == 0)
842188417Sthompsa				len += 2;
843184610Salfred
844188417Sthompsa			DPRINTFN(11, "sending frame len=%u xferlen=%u\n",
845188417Sthompsa			    m->m_pkthdr.len, len);
846184610Salfred
847194677Sthompsa			usbd_xfer_set_frame_len(xfer, 0, len);
848194677Sthompsa			usbd_xfer_set_priv(xfer, data);
849184610Salfred
850194228Sthompsa			usbd_transfer_submit(xfer);
851188417Sthompsa		}
852198099Sweongyo		RAL_UNLOCK(sc);
853198099Sweongyo		ural_start(ifp);
854198099Sweongyo		RAL_LOCK(sc);
855188417Sthompsa		break;
856184610Salfred
857188417Sthompsa	default:			/* Error */
858188417Sthompsa		DPRINTFN(11, "transfer error, %s\n",
859194677Sthompsa		    usbd_errstr(error));
860184610Salfred
861188419Sthompsa		ifp->if_oerrors++;
862194677Sthompsa		data = usbd_xfer_get_priv(xfer);
863188419Sthompsa		if (data != NULL) {
864194677Sthompsa			ural_tx_free(data, error);
865194677Sthompsa			usbd_xfer_set_priv(xfer, NULL);
866188419Sthompsa		}
867188419Sthompsa
868194677Sthompsa		if (error == USB_ERR_STALLED) {
869188417Sthompsa			/* try to clear stall first */
870194677Sthompsa			usbd_xfer_set_stall(xfer);
871188417Sthompsa			goto tr_setup;
872188417Sthompsa		}
873194677Sthompsa		if (error == USB_ERR_TIMEOUT)
874188417Sthompsa			device_printf(sc->sc_dev, "device timeout\n");
875188417Sthompsa		break;
876184610Salfred	}
877184610Salfred}
878184610Salfred
879184610Salfredstatic void
880194677Sthompsaural_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
881184610Salfred{
882194677Sthompsa	struct ural_softc *sc = usbd_xfer_softc(xfer);
883184610Salfred	struct ifnet *ifp = sc->sc_ifp;
884184610Salfred	struct ieee80211com *ic = ifp->if_l2com;
885184610Salfred	struct ieee80211_node *ni;
886184610Salfred	struct mbuf *m = NULL;
887194677Sthompsa	struct usb_page_cache *pc;
888184610Salfred	uint32_t flags;
889192468Ssam	int8_t rssi = 0, nf = 0;
890194677Sthompsa	int len;
891184610Salfred
892194677Sthompsa	usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
893194677Sthompsa
894184610Salfred	switch (USB_GET_STATE(xfer)) {
895184610Salfred	case USB_ST_TRANSFERRED:
896184610Salfred
897194677Sthompsa		DPRINTFN(15, "rx done, actlen=%d\n", len);
898184610Salfred
899235000Shselasky		if (len < (int)(RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN)) {
900188417Sthompsa			DPRINTF("%s: xfer too short %d\n",
901188417Sthompsa			    device_get_nameunit(sc->sc_dev), len);
902184610Salfred			ifp->if_ierrors++;
903184610Salfred			goto tr_setup;
904184610Salfred		}
905184610Salfred
906188417Sthompsa		len -= RAL_RX_DESC_SIZE;
907188417Sthompsa		/* rx descriptor is located at the end */
908194677Sthompsa		pc = usbd_xfer_get_frame(xfer, 0);
909194677Sthompsa		usbd_copy_out(pc, len, &sc->sc_rx_desc, RAL_RX_DESC_SIZE);
910184610Salfred
911188417Sthompsa		rssi = URAL_RSSI(sc->sc_rx_desc.rssi);
912192468Ssam		nf = RAL_NOISE_FLOOR;
913184610Salfred		flags = le32toh(sc->sc_rx_desc.flags);
914184610Salfred		if (flags & (RAL_RX_PHY_ERROR | RAL_RX_CRC_ERROR)) {
915184610Salfred			/*
916184610Salfred		         * This should not happen since we did not
917184610Salfred		         * request to receive those frames when we
918184610Salfred		         * filled RAL_TXRX_CSR2:
919184610Salfred		         */
920188417Sthompsa			DPRINTFN(5, "PHY or CRC error\n");
921184610Salfred			ifp->if_ierrors++;
922184610Salfred			goto tr_setup;
923184610Salfred		}
924184610Salfred
925248078Smarius		m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
926184610Salfred		if (m == NULL) {
927184610Salfred			DPRINTF("could not allocate mbuf\n");
928184610Salfred			ifp->if_ierrors++;
929184610Salfred			goto tr_setup;
930184610Salfred		}
931194677Sthompsa		usbd_copy_out(pc, 0, mtod(m, uint8_t *), len);
932184610Salfred
933184610Salfred		/* finalize mbuf */
934184610Salfred		m->m_pkthdr.rcvif = ifp;
935188417Sthompsa		m->m_pkthdr.len = m->m_len = (flags >> 16) & 0xfff;
936184610Salfred
937192468Ssam		if (ieee80211_radiotap_active(ic)) {
938184610Salfred			struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
939184610Salfred
940192468Ssam			/* XXX set once */
941192468Ssam			tap->wr_flags = 0;
942184610Salfred			tap->wr_rate = ieee80211_plcp2rate(sc->sc_rx_desc.rate,
943188417Sthompsa			    (flags & RAL_RX_OFDM) ?
944184610Salfred			    IEEE80211_T_OFDM : IEEE80211_T_CCK);
945188417Sthompsa			tap->wr_antenna = sc->rx_ant;
946192468Ssam			tap->wr_antsignal = nf + rssi;
947192468Ssam			tap->wr_antnoise = nf;
948184610Salfred		}
949184610Salfred		/* Strip trailing 802.11 MAC FCS. */
950184610Salfred		m_adj(m, -IEEE80211_CRC_LEN);
951184610Salfred
952188417Sthompsa		/* FALLTHROUGH */
953184610Salfred	case USB_ST_SETUP:
954184610Salfredtr_setup:
955194677Sthompsa		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
956194228Sthompsa		usbd_transfer_submit(xfer);
957184610Salfred
958184610Salfred		/*
959184610Salfred		 * At the end of a USB callback it is always safe to unlock
960184610Salfred		 * the private mutex of a device! That is why we do the
961184610Salfred		 * "ieee80211_input" here, and not some lines up!
962184610Salfred		 */
963198099Sweongyo		RAL_UNLOCK(sc);
964184610Salfred		if (m) {
965188417Sthompsa			ni = ieee80211_find_rxnode(ic,
966188417Sthompsa			    mtod(m, struct ieee80211_frame_min *));
967188417Sthompsa			if (ni != NULL) {
968192468Ssam				(void) ieee80211_input(ni, m, rssi, nf);
969184610Salfred				ieee80211_free_node(ni);
970188417Sthompsa			} else
971192468Ssam				(void) ieee80211_input_all(ic, m, rssi, nf);
972184610Salfred		}
973198099Sweongyo		if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 &&
974198099Sweongyo		    !IFQ_IS_EMPTY(&ifp->if_snd))
975198099Sweongyo			ural_start(ifp);
976198099Sweongyo		RAL_LOCK(sc);
977184610Salfred		return;
978184610Salfred
979184610Salfred	default:			/* Error */
980194677Sthompsa		if (error != USB_ERR_CANCELLED) {
981184610Salfred			/* try to clear stall first */
982194677Sthompsa			usbd_xfer_set_stall(xfer);
983188417Sthompsa			goto tr_setup;
984184610Salfred		}
985184610Salfred		return;
986184610Salfred	}
987184610Salfred}
988184610Salfred
989184610Salfredstatic uint8_t
990188417Sthompsaural_plcp_signal(int rate)
991184610Salfred{
992184610Salfred	switch (rate) {
993188417Sthompsa	/* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
994188417Sthompsa	case 12:	return 0xb;
995188417Sthompsa	case 18:	return 0xf;
996188417Sthompsa	case 24:	return 0xa;
997188417Sthompsa	case 36:	return 0xe;
998188417Sthompsa	case 48:	return 0x9;
999188417Sthompsa	case 72:	return 0xd;
1000188417Sthompsa	case 96:	return 0x8;
1001188417Sthompsa	case 108:	return 0xc;
1002184610Salfred
1003188417Sthompsa	/* CCK rates (NB: not IEEE std, device-specific) */
1004188417Sthompsa	case 2:		return 0x0;
1005188417Sthompsa	case 4:		return 0x1;
1006188417Sthompsa	case 11:	return 0x2;
1007188417Sthompsa	case 22:	return 0x3;
1008184610Salfred	}
1009188417Sthompsa	return 0xff;		/* XXX unsupported/unknown rate */
1010184610Salfred}
1011184610Salfred
1012184610Salfredstatic void
1013188417Sthompsaural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
1014188417Sthompsa    uint32_t flags, int len, int rate)
1015184610Salfred{
1016184610Salfred	struct ifnet *ifp = sc->sc_ifp;
1017184610Salfred	struct ieee80211com *ic = ifp->if_l2com;
1018184610Salfred	uint16_t plcp_length;
1019188417Sthompsa	int remainder;
1020184610Salfred
1021188417Sthompsa	desc->flags = htole32(flags);
1022188417Sthompsa	desc->flags |= htole32(RAL_TX_NEWSEQ);
1023188417Sthompsa	desc->flags |= htole32(len << 16);
1024184610Salfred
1025188417Sthompsa	desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1026188417Sthompsa	desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame)));
1027184610Salfred
1028188417Sthompsa	/* setup PLCP fields */
1029188417Sthompsa	desc->plcp_signal  = ural_plcp_signal(rate);
1030188417Sthompsa	desc->plcp_service = 4;
1031188417Sthompsa
1032188417Sthompsa	len += IEEE80211_CRC_LEN;
1033190532Ssam	if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1034188417Sthompsa		desc->flags |= htole32(RAL_TX_OFDM);
1035188417Sthompsa
1036188417Sthompsa		plcp_length = len & 0xfff;
1037188417Sthompsa		desc->plcp_length_hi = plcp_length >> 6;
1038188417Sthompsa		desc->plcp_length_lo = plcp_length & 0x3f;
1039188417Sthompsa	} else {
1040188417Sthompsa		plcp_length = (16 * len + rate - 1) / rate;
1041188417Sthompsa		if (rate == 22) {
1042188417Sthompsa			remainder = (16 * len) % 22;
1043188417Sthompsa			if (remainder != 0 && remainder < 7)
1044188417Sthompsa				desc->plcp_service |= RAL_PLCP_LENGEXT;
1045188417Sthompsa		}
1046188417Sthompsa		desc->plcp_length_hi = plcp_length >> 8;
1047188417Sthompsa		desc->plcp_length_lo = plcp_length & 0xff;
1048188417Sthompsa
1049188417Sthompsa		if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1050188417Sthompsa			desc->plcp_signal |= 0x08;
1051184610Salfred	}
1052184610Salfred
1053188417Sthompsa	desc->iv = 0;
1054188417Sthompsa	desc->eiv = 0;
1055188417Sthompsa}
1056184610Salfred
1057188417Sthompsa#define RAL_TX_TIMEOUT	5000
1058184610Salfred
1059188417Sthompsastatic int
1060188417Sthompsaural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1061188417Sthompsa{
1062188417Sthompsa	struct ieee80211vap *vap = ni->ni_vap;
1063188417Sthompsa	struct ieee80211com *ic = ni->ni_ic;
1064188417Sthompsa	struct ifnet *ifp = sc->sc_ifp;
1065188417Sthompsa	const struct ieee80211_txparam *tp;
1066188417Sthompsa	struct ural_tx_data *data;
1067188417Sthompsa
1068188417Sthompsa	if (sc->tx_nfree == 0) {
1069188417Sthompsa		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1070188417Sthompsa		m_freem(m0);
1071188417Sthompsa		ieee80211_free_node(ni);
1072236897Shselasky		return (EIO);
1073184610Salfred	}
1074236897Shselasky	if (ic->ic_bsschan == IEEE80211_CHAN_ANYC) {
1075236897Shselasky		m_freem(m0);
1076236897Shselasky		ieee80211_free_node(ni);
1077236897Shselasky		return (ENXIO);
1078236897Shselasky	}
1079188417Sthompsa	data = STAILQ_FIRST(&sc->tx_free);
1080188417Sthompsa	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1081188417Sthompsa	sc->tx_nfree--;
1082188417Sthompsa	tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_bsschan)];
1083184610Salfred
1084188417Sthompsa	data->m = m0;
1085188417Sthompsa	data->ni = ni;
1086188417Sthompsa	data->rate = tp->mgmtrate;
1087184610Salfred
1088188417Sthompsa	ural_setup_tx_desc(sc, &data->desc,
1089188417Sthompsa	    RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, m0->m_pkthdr.len,
1090188417Sthompsa	    tp->mgmtrate);
1091184610Salfred
1092188417Sthompsa	DPRINTFN(10, "sending beacon frame len=%u rate=%u\n",
1093188417Sthompsa	    m0->m_pkthdr.len, tp->mgmtrate);
1094184610Salfred
1095188417Sthompsa	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1096194228Sthompsa	usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1097184610Salfred
1098188417Sthompsa	return (0);
1099188417Sthompsa}
1100184610Salfred
1101188417Sthompsastatic int
1102188417Sthompsaural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1103188417Sthompsa{
1104188417Sthompsa	struct ieee80211vap *vap = ni->ni_vap;
1105188417Sthompsa	struct ieee80211com *ic = ni->ni_ic;
1106188417Sthompsa	const struct ieee80211_txparam *tp;
1107188417Sthompsa	struct ural_tx_data *data;
1108188417Sthompsa	struct ieee80211_frame *wh;
1109188417Sthompsa	struct ieee80211_key *k;
1110188417Sthompsa	uint32_t flags;
1111188417Sthompsa	uint16_t dur;
1112184610Salfred
1113188417Sthompsa	RAL_LOCK_ASSERT(sc, MA_OWNED);
1114184610Salfred
1115188417Sthompsa	data = STAILQ_FIRST(&sc->tx_free);
1116188417Sthompsa	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1117188417Sthompsa	sc->tx_nfree--;
1118184610Salfred
1119188417Sthompsa	tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
1120188417Sthompsa
1121188417Sthompsa	wh = mtod(m0, struct ieee80211_frame *);
1122188417Sthompsa	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1123188417Sthompsa		k = ieee80211_crypto_encap(ni, m0);
1124188417Sthompsa		if (k == NULL) {
1125188417Sthompsa			m_freem(m0);
1126188417Sthompsa			return ENOBUFS;
1127184610Salfred		}
1128188417Sthompsa		wh = mtod(m0, struct ieee80211_frame *);
1129184610Salfred	}
1130184610Salfred
1131188417Sthompsa	data->m = m0;
1132188417Sthompsa	data->ni = ni;
1133188417Sthompsa	data->rate = tp->mgmtrate;
1134184610Salfred
1135188417Sthompsa	flags = 0;
1136188417Sthompsa	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1137188417Sthompsa		flags |= RAL_TX_ACK;
1138188417Sthompsa
1139190532Ssam		dur = ieee80211_ack_duration(ic->ic_rt, tp->mgmtrate,
1140188417Sthompsa		    ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1141259457Shselasky		USETW(wh->i_dur, dur);
1142188417Sthompsa
1143188417Sthompsa		/* tell hardware to add timestamp for probe responses */
1144188417Sthompsa		if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1145188417Sthompsa		    IEEE80211_FC0_TYPE_MGT &&
1146188417Sthompsa		    (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1147188417Sthompsa		    IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1148188417Sthompsa			flags |= RAL_TX_TIMESTAMP;
1149184610Salfred	}
1150184610Salfred
1151188417Sthompsa	ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, tp->mgmtrate);
1152184610Salfred
1153188417Sthompsa	DPRINTFN(10, "sending mgt frame len=%u rate=%u\n",
1154188417Sthompsa	    m0->m_pkthdr.len, tp->mgmtrate);
1155184610Salfred
1156188417Sthompsa	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1157194228Sthompsa	usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1158184610Salfred
1159188417Sthompsa	return 0;
1160184610Salfred}
1161184610Salfred
1162188417Sthompsastatic int
1163188417Sthompsaural_sendprot(struct ural_softc *sc,
1164188417Sthompsa    const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1165184610Salfred{
1166188417Sthompsa	struct ieee80211com *ic = ni->ni_ic;
1167188417Sthompsa	const struct ieee80211_frame *wh;
1168188417Sthompsa	struct ural_tx_data *data;
1169188417Sthompsa	struct mbuf *mprot;
1170188417Sthompsa	int protrate, ackrate, pktlen, flags, isshort;
1171188417Sthompsa	uint16_t dur;
1172184610Salfred
1173188417Sthompsa	KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1174188417Sthompsa	    ("protection %d", prot));
1175184610Salfred
1176188417Sthompsa	wh = mtod(m, const struct ieee80211_frame *);
1177188417Sthompsa	pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1178184610Salfred
1179190532Ssam	protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1180190532Ssam	ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1181188417Sthompsa
1182188417Sthompsa	isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1183209189Sjkim	dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1184190532Ssam	    + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1185188417Sthompsa	flags = RAL_TX_RETRY(7);
1186188417Sthompsa	if (prot == IEEE80211_PROT_RTSCTS) {
1187188417Sthompsa		/* NB: CTS is the same size as an ACK */
1188190532Ssam		dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1189188417Sthompsa		flags |= RAL_TX_ACK;
1190188417Sthompsa		mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1191188417Sthompsa	} else {
1192188417Sthompsa		mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1193188417Sthompsa	}
1194188417Sthompsa	if (mprot == NULL) {
1195188417Sthompsa		/* XXX stat + msg */
1196188417Sthompsa		return ENOBUFS;
1197188417Sthompsa	}
1198188417Sthompsa	data = STAILQ_FIRST(&sc->tx_free);
1199188417Sthompsa	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1200188417Sthompsa	sc->tx_nfree--;
1201188417Sthompsa
1202188417Sthompsa	data->m = mprot;
1203188417Sthompsa	data->ni = ieee80211_ref_node(ni);
1204188417Sthompsa	data->rate = protrate;
1205188417Sthompsa	ural_setup_tx_desc(sc, &data->desc, flags, mprot->m_pkthdr.len, protrate);
1206188417Sthompsa
1207188417Sthompsa	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1208194228Sthompsa	usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1209188417Sthompsa
1210188417Sthompsa	return 0;
1211188417Sthompsa}
1212188417Sthompsa
1213188417Sthompsastatic int
1214188417Sthompsaural_tx_raw(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni,
1215188417Sthompsa    const struct ieee80211_bpf_params *params)
1216188417Sthompsa{
1217193073Ssam	struct ieee80211com *ic = ni->ni_ic;
1218188417Sthompsa	struct ural_tx_data *data;
1219188417Sthompsa	uint32_t flags;
1220188417Sthompsa	int error;
1221188417Sthompsa	int rate;
1222188417Sthompsa
1223188417Sthompsa	RAL_LOCK_ASSERT(sc, MA_OWNED);
1224188417Sthompsa	KASSERT(params != NULL, ("no raw xmit params"));
1225188417Sthompsa
1226193073Ssam	rate = params->ibp_rate0;
1227193073Ssam	if (!ieee80211_isratevalid(ic->ic_rt, rate)) {
1228188417Sthompsa		m_freem(m0);
1229188417Sthompsa		return EINVAL;
1230188417Sthompsa	}
1231188417Sthompsa	flags = 0;
1232188417Sthompsa	if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
1233188417Sthompsa		flags |= RAL_TX_ACK;
1234188417Sthompsa	if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) {
1235188417Sthompsa		error = ural_sendprot(sc, m0, ni,
1236188417Sthompsa		    params->ibp_flags & IEEE80211_BPF_RTS ?
1237188417Sthompsa			 IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY,
1238188417Sthompsa		    rate);
1239188969Sthompsa		if (error || sc->tx_nfree == 0) {
1240188417Sthompsa			m_freem(m0);
1241188969Sthompsa			return ENOBUFS;
1242184610Salfred		}
1243188417Sthompsa		flags |= RAL_TX_IFS_SIFS;
1244188417Sthompsa	}
1245184610Salfred
1246188969Sthompsa	data = STAILQ_FIRST(&sc->tx_free);
1247188969Sthompsa	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1248188969Sthompsa	sc->tx_nfree--;
1249188969Sthompsa
1250188417Sthompsa	data->m = m0;
1251188417Sthompsa	data->ni = ni;
1252188417Sthompsa	data->rate = rate;
1253184610Salfred
1254188417Sthompsa	/* XXX need to setup descriptor ourself */
1255188417Sthompsa	ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate);
1256184610Salfred
1257188417Sthompsa	DPRINTFN(10, "sending raw frame len=%u rate=%u\n",
1258188417Sthompsa	    m0->m_pkthdr.len, rate);
1259184610Salfred
1260188417Sthompsa	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1261194228Sthompsa	usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1262184610Salfred
1263188417Sthompsa	return 0;
1264188417Sthompsa}
1265184610Salfred
1266188417Sthompsastatic int
1267188417Sthompsaural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1268188417Sthompsa{
1269188417Sthompsa	struct ieee80211vap *vap = ni->ni_vap;
1270188417Sthompsa	struct ieee80211com *ic = ni->ni_ic;
1271188417Sthompsa	struct ural_tx_data *data;
1272188417Sthompsa	struct ieee80211_frame *wh;
1273188417Sthompsa	const struct ieee80211_txparam *tp;
1274188417Sthompsa	struct ieee80211_key *k;
1275188417Sthompsa	uint32_t flags = 0;
1276188417Sthompsa	uint16_t dur;
1277188417Sthompsa	int error, rate;
1278184610Salfred
1279188417Sthompsa	RAL_LOCK_ASSERT(sc, MA_OWNED);
1280184610Salfred
1281188417Sthompsa	wh = mtod(m0, struct ieee80211_frame *);
1282184610Salfred
1283188417Sthompsa	tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1284188417Sthompsa	if (IEEE80211_IS_MULTICAST(wh->i_addr1))
1285188417Sthompsa		rate = tp->mcastrate;
1286188417Sthompsa	else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
1287188417Sthompsa		rate = tp->ucastrate;
1288188417Sthompsa	else
1289188417Sthompsa		rate = ni->ni_txrate;
1290188417Sthompsa
1291188417Sthompsa	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1292188417Sthompsa		k = ieee80211_crypto_encap(ni, m0);
1293188417Sthompsa		if (k == NULL) {
1294188417Sthompsa			m_freem(m0);
1295188417Sthompsa			return ENOBUFS;
1296184610Salfred		}
1297188417Sthompsa		/* packet header may have moved, reset our local pointer */
1298188417Sthompsa		wh = mtod(m0, struct ieee80211_frame *);
1299188417Sthompsa	}
1300184610Salfred
1301188417Sthompsa	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1302188417Sthompsa		int prot = IEEE80211_PROT_NONE;
1303188417Sthompsa		if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1304188417Sthompsa			prot = IEEE80211_PROT_RTSCTS;
1305188417Sthompsa		else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1306190532Ssam		    ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1307188417Sthompsa			prot = ic->ic_protmode;
1308188417Sthompsa		if (prot != IEEE80211_PROT_NONE) {
1309188417Sthompsa			error = ural_sendprot(sc, m0, ni, prot, rate);
1310188969Sthompsa			if (error || sc->tx_nfree == 0) {
1311188417Sthompsa				m_freem(m0);
1312188969Sthompsa				return ENOBUFS;
1313188417Sthompsa			}
1314188417Sthompsa			flags |= RAL_TX_IFS_SIFS;
1315184610Salfred		}
1316184610Salfred	}
1317184610Salfred
1318188417Sthompsa	data = STAILQ_FIRST(&sc->tx_free);
1319188417Sthompsa	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1320188417Sthompsa	sc->tx_nfree--;
1321184610Salfred
1322188417Sthompsa	data->m = m0;
1323188417Sthompsa	data->ni = ni;
1324188417Sthompsa	data->rate = rate;
1325188417Sthompsa
1326188417Sthompsa	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1327188417Sthompsa		flags |= RAL_TX_ACK;
1328188417Sthompsa		flags |= RAL_TX_RETRY(7);
1329188417Sthompsa
1330190532Ssam		dur = ieee80211_ack_duration(ic->ic_rt, rate,
1331188417Sthompsa		    ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1332259457Shselasky		USETW(wh->i_dur, dur);
1333184610Salfred	}
1334184610Salfred
1335188417Sthompsa	ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate);
1336184610Salfred
1337188417Sthompsa	DPRINTFN(10, "sending data frame len=%u rate=%u\n",
1338188417Sthompsa	    m0->m_pkthdr.len, rate);
1339184610Salfred
1340188417Sthompsa	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1341194228Sthompsa	usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1342188417Sthompsa
1343188417Sthompsa	return 0;
1344184610Salfred}
1345184610Salfred
1346184610Salfredstatic void
1347188417Sthompsaural_start(struct ifnet *ifp)
1348184610Salfred{
1349188417Sthompsa	struct ural_softc *sc = ifp->if_softc;
1350188417Sthompsa	struct ieee80211_node *ni;
1351188417Sthompsa	struct mbuf *m;
1352184610Salfred
1353188417Sthompsa	RAL_LOCK(sc);
1354188417Sthompsa	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1355188417Sthompsa		RAL_UNLOCK(sc);
1356188417Sthompsa		return;
1357188417Sthompsa	}
1358188417Sthompsa	for (;;) {
1359188417Sthompsa		IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1360188417Sthompsa		if (m == NULL)
1361188417Sthompsa			break;
1362188969Sthompsa		if (sc->tx_nfree < RAL_TX_MINFREE) {
1363188417Sthompsa			IFQ_DRV_PREPEND(&ifp->if_snd, m);
1364188417Sthompsa			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1365188417Sthompsa			break;
1366188417Sthompsa		}
1367188417Sthompsa		ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1368188417Sthompsa		if (ural_tx_data(sc, m, ni) != 0) {
1369188417Sthompsa			ieee80211_free_node(ni);
1370188417Sthompsa			ifp->if_oerrors++;
1371188417Sthompsa			break;
1372188417Sthompsa		}
1373188417Sthompsa	}
1374188417Sthompsa	RAL_UNLOCK(sc);
1375184610Salfred}
1376184610Salfred
1377184610Salfredstatic int
1378188417Sthompsaural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1379184610Salfred{
1380184610Salfred	struct ural_softc *sc = ifp->if_softc;
1381184610Salfred	struct ieee80211com *ic = ifp->if_l2com;
1382188417Sthompsa	struct ifreq *ifr = (struct ifreq *) data;
1383259456Shselasky	int error;
1384259456Shselasky	int startall = 0;
1385184610Salfred
1386259456Shselasky	RAL_LOCK(sc);
1387259456Shselasky	error = sc->sc_detached ? ENXIO : 0;
1388259456Shselasky	RAL_UNLOCK(sc);
1389259456Shselasky	if (error)
1390259456Shselasky		return (error);
1391259456Shselasky
1392184610Salfred	switch (cmd) {
1393184610Salfred	case SIOCSIFFLAGS:
1394188417Sthompsa		RAL_LOCK(sc);
1395184610Salfred		if (ifp->if_flags & IFF_UP) {
1396188417Sthompsa			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1397191746Sthompsa				ural_init_locked(sc);
1398188417Sthompsa				startall = 1;
1399188417Sthompsa			} else
1400191746Sthompsa				ural_setpromisc(sc);
1401184610Salfred		} else {
1402191746Sthompsa			if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1403191746Sthompsa				ural_stop(sc);
1404184610Salfred		}
1405188417Sthompsa		RAL_UNLOCK(sc);
1406188417Sthompsa		if (startall)
1407188417Sthompsa			ieee80211_start_all(ic);
1408184610Salfred		break;
1409184610Salfred	case SIOCGIFMEDIA:
1410184610Salfred	case SIOCSIFMEDIA:
1411188417Sthompsa		error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1412184610Salfred		break;
1413184610Salfred	default:
1414184610Salfred		error = ether_ioctl(ifp, cmd, data);
1415188417Sthompsa		break;
1416184610Salfred	}
1417188417Sthompsa	return error;
1418184610Salfred}
1419184610Salfred
1420184610Salfredstatic void
1421188417Sthompsaural_set_testmode(struct ural_softc *sc)
1422184610Salfred{
1423192984Sthompsa	struct usb_device_request req;
1424193045Sthompsa	usb_error_t error;
1425184610Salfred
1426188417Sthompsa	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1427188417Sthompsa	req.bRequest = RAL_VENDOR_REQUEST;
1428188417Sthompsa	USETW(req.wValue, 4);
1429188417Sthompsa	USETW(req.wIndex, 1);
1430188417Sthompsa	USETW(req.wLength, 0);
1431188417Sthompsa
1432188419Sthompsa	error = ural_do_request(sc, &req, NULL);
1433188417Sthompsa	if (error != 0) {
1434188417Sthompsa		device_printf(sc->sc_dev, "could not set test mode: %s\n",
1435194228Sthompsa		    usbd_errstr(error));
1436188417Sthompsa	}
1437184610Salfred}
1438184610Salfred
1439184610Salfredstatic void
1440188417Sthompsaural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1441184610Salfred{
1442192984Sthompsa	struct usb_device_request req;
1443193045Sthompsa	usb_error_t error;
1444184610Salfred
1445188417Sthompsa	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1446188417Sthompsa	req.bRequest = RAL_READ_EEPROM;
1447188417Sthompsa	USETW(req.wValue, 0);
1448188417Sthompsa	USETW(req.wIndex, addr);
1449188417Sthompsa	USETW(req.wLength, len);
1450184610Salfred
1451188419Sthompsa	error = ural_do_request(sc, &req, buf);
1452188417Sthompsa	if (error != 0) {
1453188417Sthompsa		device_printf(sc->sc_dev, "could not read EEPROM: %s\n",
1454194228Sthompsa		    usbd_errstr(error));
1455184610Salfred	}
1456188417Sthompsa}
1457184610Salfred
1458188417Sthompsastatic uint16_t
1459188417Sthompsaural_read(struct ural_softc *sc, uint16_t reg)
1460188417Sthompsa{
1461192984Sthompsa	struct usb_device_request req;
1462193045Sthompsa	usb_error_t error;
1463188417Sthompsa	uint16_t val;
1464184610Salfred
1465188417Sthompsa	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1466188417Sthompsa	req.bRequest = RAL_READ_MAC;
1467188417Sthompsa	USETW(req.wValue, 0);
1468188417Sthompsa	USETW(req.wIndex, reg);
1469188417Sthompsa	USETW(req.wLength, sizeof (uint16_t));
1470188417Sthompsa
1471188419Sthompsa	error = ural_do_request(sc, &req, &val);
1472188417Sthompsa	if (error != 0) {
1473188417Sthompsa		device_printf(sc->sc_dev, "could not read MAC register: %s\n",
1474194228Sthompsa		    usbd_errstr(error));
1475188417Sthompsa		return 0;
1476184610Salfred	}
1477184610Salfred
1478188417Sthompsa	return le16toh(val);
1479184610Salfred}
1480184610Salfred
1481188417Sthompsastatic void
1482188417Sthompsaural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1483184610Salfred{
1484192984Sthompsa	struct usb_device_request req;
1485193045Sthompsa	usb_error_t error;
1486184610Salfred
1487188417Sthompsa	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1488188417Sthompsa	req.bRequest = RAL_READ_MULTI_MAC;
1489188417Sthompsa	USETW(req.wValue, 0);
1490188417Sthompsa	USETW(req.wIndex, reg);
1491188417Sthompsa	USETW(req.wLength, len);
1492184610Salfred
1493188419Sthompsa	error = ural_do_request(sc, &req, buf);
1494188417Sthompsa	if (error != 0) {
1495188417Sthompsa		device_printf(sc->sc_dev, "could not read MAC register: %s\n",
1496194228Sthompsa		    usbd_errstr(error));
1497184610Salfred	}
1498188417Sthompsa}
1499188417Sthompsa
1500188417Sthompsastatic void
1501188417Sthompsaural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1502188417Sthompsa{
1503192984Sthompsa	struct usb_device_request req;
1504193045Sthompsa	usb_error_t error;
1505188417Sthompsa
1506188417Sthompsa	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1507188417Sthompsa	req.bRequest = RAL_WRITE_MAC;
1508188417Sthompsa	USETW(req.wValue, val);
1509188417Sthompsa	USETW(req.wIndex, reg);
1510188417Sthompsa	USETW(req.wLength, 0);
1511188417Sthompsa
1512188419Sthompsa	error = ural_do_request(sc, &req, NULL);
1513188417Sthompsa	if (error != 0) {
1514188417Sthompsa		device_printf(sc->sc_dev, "could not write MAC register: %s\n",
1515194228Sthompsa		    usbd_errstr(error));
1516184610Salfred	}
1517188417Sthompsa}
1518184610Salfred
1519188417Sthompsastatic void
1520188417Sthompsaural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1521188417Sthompsa{
1522192984Sthompsa	struct usb_device_request req;
1523193045Sthompsa	usb_error_t error;
1524184610Salfred
1525188417Sthompsa	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1526188417Sthompsa	req.bRequest = RAL_WRITE_MULTI_MAC;
1527188417Sthompsa	USETW(req.wValue, 0);
1528188417Sthompsa	USETW(req.wIndex, reg);
1529188417Sthompsa	USETW(req.wLength, len);
1530184610Salfred
1531188419Sthompsa	error = ural_do_request(sc, &req, buf);
1532188417Sthompsa	if (error != 0) {
1533188417Sthompsa		device_printf(sc->sc_dev, "could not write MAC register: %s\n",
1534194228Sthompsa		    usbd_errstr(error));
1535188417Sthompsa	}
1536184610Salfred}
1537184610Salfred
1538184610Salfredstatic void
1539188417Sthompsaural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1540184610Salfred{
1541188417Sthompsa	uint16_t tmp;
1542188417Sthompsa	int ntries;
1543184610Salfred
1544188619Sthompsa	for (ntries = 0; ntries < 100; ntries++) {
1545188417Sthompsa		if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1546188417Sthompsa			break;
1547188619Sthompsa		if (ural_pause(sc, hz / 100))
1548188619Sthompsa			break;
1549188417Sthompsa	}
1550188619Sthompsa	if (ntries == 100) {
1551188417Sthompsa		device_printf(sc->sc_dev, "could not write to BBP\n");
1552188417Sthompsa		return;
1553188417Sthompsa	}
1554184610Salfred
1555188417Sthompsa	tmp = reg << 8 | val;
1556188417Sthompsa	ural_write(sc, RAL_PHY_CSR7, tmp);
1557188417Sthompsa}
1558184610Salfred
1559188417Sthompsastatic uint8_t
1560188417Sthompsaural_bbp_read(struct ural_softc *sc, uint8_t reg)
1561188417Sthompsa{
1562188417Sthompsa	uint16_t val;
1563188417Sthompsa	int ntries;
1564184610Salfred
1565188417Sthompsa	val = RAL_BBP_WRITE | reg << 8;
1566188417Sthompsa	ural_write(sc, RAL_PHY_CSR7, val);
1567188417Sthompsa
1568188619Sthompsa	for (ntries = 0; ntries < 100; ntries++) {
1569188417Sthompsa		if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1570188417Sthompsa			break;
1571188619Sthompsa		if (ural_pause(sc, hz / 100))
1572188619Sthompsa			break;
1573188417Sthompsa	}
1574188619Sthompsa	if (ntries == 100) {
1575188417Sthompsa		device_printf(sc->sc_dev, "could not read BBP\n");
1576188417Sthompsa		return 0;
1577188417Sthompsa	}
1578188417Sthompsa
1579188417Sthompsa	return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1580184610Salfred}
1581184610Salfred
1582184610Salfredstatic void
1583188417Sthompsaural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1584184610Salfred{
1585188417Sthompsa	uint32_t tmp;
1586188417Sthompsa	int ntries;
1587188417Sthompsa
1588188619Sthompsa	for (ntries = 0; ntries < 100; ntries++) {
1589188417Sthompsa		if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1590188417Sthompsa			break;
1591188619Sthompsa		if (ural_pause(sc, hz / 100))
1592188619Sthompsa			break;
1593188417Sthompsa	}
1594188619Sthompsa	if (ntries == 100) {
1595188417Sthompsa		device_printf(sc->sc_dev, "could not write to RF\n");
1596188417Sthompsa		return;
1597188417Sthompsa	}
1598188417Sthompsa
1599188417Sthompsa	tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1600188417Sthompsa	ural_write(sc, RAL_PHY_CSR9,  tmp & 0xffff);
1601188417Sthompsa	ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1602188417Sthompsa
1603188417Sthompsa	/* remember last written value in sc */
1604188417Sthompsa	sc->rf_regs[reg] = val;
1605188417Sthompsa
1606188417Sthompsa	DPRINTFN(15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff);
1607184610Salfred}
1608184610Salfred
1609184610Salfredstatic void
1610188417Sthompsaural_scan_start(struct ieee80211com *ic)
1611184610Salfred{
1612191746Sthompsa	struct ifnet *ifp = ic->ic_ifp;
1613191746Sthompsa	struct ural_softc *sc = ifp->if_softc;
1614188417Sthompsa
1615188417Sthompsa	RAL_LOCK(sc);
1616191746Sthompsa	ural_write(sc, RAL_TXRX_CSR19, 0);
1617191746Sthompsa	ural_set_bssid(sc, ifp->if_broadcastaddr);
1618188417Sthompsa	RAL_UNLOCK(sc);
1619184610Salfred}
1620184610Salfred
1621184610Salfredstatic void
1622188417Sthompsaural_scan_end(struct ieee80211com *ic)
1623184610Salfred{
1624188417Sthompsa	struct ural_softc *sc = ic->ic_ifp->if_softc;
1625188417Sthompsa
1626188417Sthompsa	RAL_LOCK(sc);
1627191746Sthompsa	ural_enable_tsf_sync(sc);
1628191746Sthompsa	ural_set_bssid(sc, sc->sc_bssid);
1629188417Sthompsa	RAL_UNLOCK(sc);
1630188417Sthompsa
1631184610Salfred}
1632184610Salfred
1633184610Salfredstatic void
1634188417Sthompsaural_set_channel(struct ieee80211com *ic)
1635184610Salfred{
1636188417Sthompsa	struct ural_softc *sc = ic->ic_ifp->if_softc;
1637188417Sthompsa
1638188417Sthompsa	RAL_LOCK(sc);
1639191746Sthompsa	ural_set_chan(sc, ic->ic_curchan);
1640188417Sthompsa	RAL_UNLOCK(sc);
1641184610Salfred}
1642184610Salfred
1643184610Salfredstatic void
1644188417Sthompsaural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1645184610Salfred{
1646188417Sthompsa	struct ifnet *ifp = sc->sc_ifp;
1647188417Sthompsa	struct ieee80211com *ic = ifp->if_l2com;
1648188417Sthompsa	uint8_t power, tmp;
1649188619Sthompsa	int i, chan;
1650184610Salfred
1651188417Sthompsa	chan = ieee80211_chan2ieee(ic, c);
1652188417Sthompsa	if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1653188417Sthompsa		return;
1654184610Salfred
1655188417Sthompsa	if (IEEE80211_IS_CHAN_2GHZ(c))
1656188417Sthompsa		power = min(sc->txpow[chan - 1], 31);
1657184610Salfred	else
1658184610Salfred		power = 31;
1659184610Salfred
1660184610Salfred	/* adjust txpower using ifconfig settings */
1661188417Sthompsa	power -= (100 - ic->ic_txpowlimit) / 8;
1662184610Salfred
1663188417Sthompsa	DPRINTFN(2, "setting channel to %u, txpower to %u\n", chan, power);
1664184610Salfred
1665188417Sthompsa	switch (sc->rf_rev) {
1666184610Salfred	case RAL_RF_2522:
1667188417Sthompsa		ural_rf_write(sc, RAL_RF1, 0x00814);
1668188417Sthompsa		ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1669188417Sthompsa		ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1670184610Salfred		break;
1671184610Salfred
1672184610Salfred	case RAL_RF_2523:
1673188417Sthompsa		ural_rf_write(sc, RAL_RF1, 0x08804);
1674188417Sthompsa		ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1675188417Sthompsa		ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1676188417Sthompsa		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1677184610Salfred		break;
1678184610Salfred
1679184610Salfred	case RAL_RF_2524:
1680188417Sthompsa		ural_rf_write(sc, RAL_RF1, 0x0c808);
1681188417Sthompsa		ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1682188417Sthompsa		ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1683188417Sthompsa		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1684184610Salfred		break;
1685184610Salfred
1686184610Salfred	case RAL_RF_2525:
1687188417Sthompsa		ural_rf_write(sc, RAL_RF1, 0x08808);
1688188417Sthompsa		ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1689188417Sthompsa		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1690188417Sthompsa		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1691184610Salfred
1692188417Sthompsa		ural_rf_write(sc, RAL_RF1, 0x08808);
1693188417Sthompsa		ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1694188417Sthompsa		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1695188417Sthompsa		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1696184610Salfred		break;
1697184610Salfred
1698184610Salfred	case RAL_RF_2525E:
1699188417Sthompsa		ural_rf_write(sc, RAL_RF1, 0x08808);
1700188417Sthompsa		ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1701188417Sthompsa		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1702188417Sthompsa		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1703184610Salfred		break;
1704184610Salfred
1705184610Salfred	case RAL_RF_2526:
1706188417Sthompsa		ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1707188417Sthompsa		ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1708188417Sthompsa		ural_rf_write(sc, RAL_RF1, 0x08804);
1709184610Salfred
1710188417Sthompsa		ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1711188417Sthompsa		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1712188417Sthompsa		ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1713184610Salfred		break;
1714184610Salfred
1715188417Sthompsa	/* dual-band RF */
1716184610Salfred	case RAL_RF_5222:
1717188417Sthompsa		for (i = 0; ural_rf5222[i].chan != chan; i++);
1718188417Sthompsa
1719188417Sthompsa		ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1720188417Sthompsa		ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1721188417Sthompsa		ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1722188417Sthompsa		ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1723184610Salfred		break;
1724184610Salfred	}
1725184610Salfred
1726188417Sthompsa	if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1727188417Sthompsa	    (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
1728184610Salfred		/* set Japan filter bit for channel 14 */
1729188417Sthompsa		tmp = ural_bbp_read(sc, 70);
1730184610Salfred
1731188417Sthompsa		tmp &= ~RAL_JAPAN_FILTER;
1732188417Sthompsa		if (chan == 14)
1733184610Salfred			tmp |= RAL_JAPAN_FILTER;
1734184610Salfred
1735188417Sthompsa		ural_bbp_write(sc, 70, tmp);
1736184610Salfred
1737184610Salfred		/* clear CRC errors */
1738188417Sthompsa		ural_read(sc, RAL_STA_CSR0);
1739184610Salfred
1740188619Sthompsa		ural_pause(sc, hz / 100);
1741188417Sthompsa		ural_disable_rf_tune(sc);
1742184610Salfred	}
1743188417Sthompsa
1744188417Sthompsa	/* XXX doesn't belong here */
1745184610Salfred	/* update basic rate set */
1746188417Sthompsa	ural_set_basicrates(sc, c);
1747189123Sthompsa
1748189123Sthompsa	/* give the hardware some time to do the switchover */
1749189123Sthompsa	ural_pause(sc, hz / 100);
1750184610Salfred}
1751184610Salfred
1752188417Sthompsa/*
1753188417Sthompsa * Disable RF auto-tuning.
1754188417Sthompsa */
1755184610Salfredstatic void
1756188417Sthompsaural_disable_rf_tune(struct ural_softc *sc)
1757184610Salfred{
1758188417Sthompsa	uint32_t tmp;
1759184610Salfred
1760188417Sthompsa	if (sc->rf_rev != RAL_RF_2523) {
1761188417Sthompsa		tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1762188417Sthompsa		ural_rf_write(sc, RAL_RF1, tmp);
1763184610Salfred	}
1764184610Salfred
1765188417Sthompsa	tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1766188417Sthompsa	ural_rf_write(sc, RAL_RF3, tmp);
1767184610Salfred
1768188417Sthompsa	DPRINTFN(2, "disabling RF autotune\n");
1769184610Salfred}
1770184610Salfred
1771188417Sthompsa/*
1772188417Sthompsa * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1773188417Sthompsa * synchronization.
1774188417Sthompsa */
1775184610Salfredstatic void
1776188417Sthompsaural_enable_tsf_sync(struct ural_softc *sc)
1777184610Salfred{
1778188417Sthompsa	struct ifnet *ifp = sc->sc_ifp;
1779188417Sthompsa	struct ieee80211com *ic = ifp->if_l2com;
1780188417Sthompsa	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1781188417Sthompsa	uint16_t logcwmin, preload, tmp;
1782184610Salfred
1783184610Salfred	/* first, disable TSF synchronization */
1784188417Sthompsa	ural_write(sc, RAL_TXRX_CSR19, 0);
1785184610Salfred
1786188417Sthompsa	tmp = (16 * vap->iv_bss->ni_intval) << 4;
1787188417Sthompsa	ural_write(sc, RAL_TXRX_CSR18, tmp);
1788184610Salfred
1789188417Sthompsa	logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1790188417Sthompsa	preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1791188417Sthompsa	tmp = logcwmin << 12 | preload;
1792188417Sthompsa	ural_write(sc, RAL_TXRX_CSR20, tmp);
1793184610Salfred
1794184610Salfred	/* finally, enable TSF synchronization */
1795184610Salfred	tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1796188417Sthompsa	if (ic->ic_opmode == IEEE80211_M_STA)
1797184610Salfred		tmp |= RAL_ENABLE_TSF_SYNC(1);
1798184610Salfred	else
1799184610Salfred		tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1800188417Sthompsa	ural_write(sc, RAL_TXRX_CSR19, tmp);
1801184610Salfred
1802184610Salfred	DPRINTF("enabling TSF synchronization\n");
1803184610Salfred}
1804184610Salfred
1805192468Ssamstatic void
1806192468Ssamural_enable_tsf(struct ural_softc *sc)
1807192468Ssam{
1808192468Ssam	/* first, disable TSF synchronization */
1809192468Ssam	ural_write(sc, RAL_TXRX_CSR19, 0);
1810192468Ssam	ural_write(sc, RAL_TXRX_CSR19, RAL_ENABLE_TSF | RAL_ENABLE_TSF_SYNC(2));
1811192468Ssam}
1812192468Ssam
1813188417Sthompsa#define RAL_RXTX_TURNAROUND	5	/* us */
1814184610Salfredstatic void
1815188417Sthompsaural_update_slot(struct ifnet *ifp)
1816184610Salfred{
1817188417Sthompsa	struct ural_softc *sc = ifp->if_softc;
1818188417Sthompsa	struct ieee80211com *ic = ifp->if_l2com;
1819188417Sthompsa	uint16_t slottime, sifs, eifs;
1820184610Salfred
1821188417Sthompsa	slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1822184610Salfred
1823184610Salfred	/*
1824184610Salfred	 * These settings may sound a bit inconsistent but this is what the
1825184610Salfred	 * reference driver does.
1826184610Salfred	 */
1827188417Sthompsa	if (ic->ic_curmode == IEEE80211_MODE_11B) {
1828184610Salfred		sifs = 16 - RAL_RXTX_TURNAROUND;
1829184610Salfred		eifs = 364;
1830184610Salfred	} else {
1831184610Salfred		sifs = 10 - RAL_RXTX_TURNAROUND;
1832184610Salfred		eifs = 64;
1833184610Salfred	}
1834184610Salfred
1835188417Sthompsa	ural_write(sc, RAL_MAC_CSR10, slottime);
1836188417Sthompsa	ural_write(sc, RAL_MAC_CSR11, sifs);
1837188417Sthompsa	ural_write(sc, RAL_MAC_CSR12, eifs);
1838184610Salfred}
1839184610Salfred
1840184610Salfredstatic void
1841188417Sthompsaural_set_txpreamble(struct ural_softc *sc)
1842184610Salfred{
1843188417Sthompsa	struct ifnet *ifp = sc->sc_ifp;
1844188417Sthompsa	struct ieee80211com *ic = ifp->if_l2com;
1845184610Salfred	uint16_t tmp;
1846184610Salfred
1847188417Sthompsa	tmp = ural_read(sc, RAL_TXRX_CSR10);
1848184610Salfred
1849188417Sthompsa	tmp &= ~RAL_SHORT_PREAMBLE;
1850188417Sthompsa	if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1851184610Salfred		tmp |= RAL_SHORT_PREAMBLE;
1852184610Salfred
1853188417Sthompsa	ural_write(sc, RAL_TXRX_CSR10, tmp);
1854184610Salfred}
1855184610Salfred
1856184610Salfredstatic void
1857188417Sthompsaural_set_basicrates(struct ural_softc *sc, const struct ieee80211_channel *c)
1858184610Salfred{
1859188417Sthompsa	/* XXX wrong, take from rate set */
1860188417Sthompsa	/* update basic rate set */
1861188417Sthompsa	if (IEEE80211_IS_CHAN_5GHZ(c)) {
1862188417Sthompsa		/* 11a basic rates: 6, 12, 24Mbps */
1863188417Sthompsa		ural_write(sc, RAL_TXRX_CSR11, 0x150);
1864188417Sthompsa	} else if (IEEE80211_IS_CHAN_ANYG(c)) {
1865188417Sthompsa		/* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1866188417Sthompsa		ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1867188417Sthompsa	} else {
1868188417Sthompsa		/* 11b basic rates: 1, 2Mbps */
1869188417Sthompsa		ural_write(sc, RAL_TXRX_CSR11, 0x3);
1870188417Sthompsa	}
1871184610Salfred}
1872184610Salfred
1873184610Salfredstatic void
1874188417Sthompsaural_set_bssid(struct ural_softc *sc, const uint8_t *bssid)
1875184610Salfred{
1876188417Sthompsa	uint16_t tmp;
1877184610Salfred
1878188417Sthompsa	tmp = bssid[0] | bssid[1] << 8;
1879188417Sthompsa	ural_write(sc, RAL_MAC_CSR5, tmp);
1880188417Sthompsa
1881188417Sthompsa	tmp = bssid[2] | bssid[3] << 8;
1882188417Sthompsa	ural_write(sc, RAL_MAC_CSR6, tmp);
1883188417Sthompsa
1884188417Sthompsa	tmp = bssid[4] | bssid[5] << 8;
1885188417Sthompsa	ural_write(sc, RAL_MAC_CSR7, tmp);
1886188417Sthompsa
1887188417Sthompsa	DPRINTF("setting BSSID to %6D\n", bssid, ":");
1888184610Salfred}
1889184610Salfred
1890184610Salfredstatic void
1891188417Sthompsaural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1892184610Salfred{
1893184610Salfred	uint16_t tmp;
1894184610Salfred
1895188417Sthompsa	tmp = addr[0] | addr[1] << 8;
1896188417Sthompsa	ural_write(sc, RAL_MAC_CSR2, tmp);
1897184610Salfred
1898188417Sthompsa	tmp = addr[2] | addr[3] << 8;
1899188417Sthompsa	ural_write(sc, RAL_MAC_CSR3, tmp);
1900184610Salfred
1901188417Sthompsa	tmp = addr[4] | addr[5] << 8;
1902188417Sthompsa	ural_write(sc, RAL_MAC_CSR4, tmp);
1903184610Salfred
1904188417Sthompsa	DPRINTF("setting MAC address to %6D\n", addr, ":");
1905184610Salfred}
1906184610Salfred
1907184610Salfredstatic void
1908191746Sthompsaural_setpromisc(struct ural_softc *sc)
1909184610Salfred{
1910188417Sthompsa	struct ifnet *ifp = sc->sc_ifp;
1911188417Sthompsa	uint32_t tmp;
1912184610Salfred
1913188417Sthompsa	tmp = ural_read(sc, RAL_TXRX_CSR2);
1914184610Salfred
1915188417Sthompsa	tmp &= ~RAL_DROP_NOT_TO_ME;
1916188417Sthompsa	if (!(ifp->if_flags & IFF_PROMISC))
1917188417Sthompsa		tmp |= RAL_DROP_NOT_TO_ME;
1918184610Salfred
1919188417Sthompsa	ural_write(sc, RAL_TXRX_CSR2, tmp);
1920184610Salfred
1921188417Sthompsa	DPRINTF("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1922188417Sthompsa	    "entering" : "leaving");
1923184610Salfred}
1924184610Salfred
1925189123Sthompsastatic void
1926189123Sthompsaural_update_promisc(struct ifnet *ifp)
1927189123Sthompsa{
1928189123Sthompsa	struct ural_softc *sc = ifp->if_softc;
1929189123Sthompsa
1930189123Sthompsa	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1931189123Sthompsa		return;
1932189123Sthompsa
1933189123Sthompsa	RAL_LOCK(sc);
1934191746Sthompsa	ural_setpromisc(sc);
1935189123Sthompsa	RAL_UNLOCK(sc);
1936189123Sthompsa}
1937189123Sthompsa
1938188417Sthompsastatic const char *
1939188417Sthompsaural_get_rf(int rev)
1940184610Salfred{
1941188417Sthompsa	switch (rev) {
1942188417Sthompsa	case RAL_RF_2522:	return "RT2522";
1943188417Sthompsa	case RAL_RF_2523:	return "RT2523";
1944188417Sthompsa	case RAL_RF_2524:	return "RT2524";
1945188417Sthompsa	case RAL_RF_2525:	return "RT2525";
1946188417Sthompsa	case RAL_RF_2525E:	return "RT2525e";
1947188417Sthompsa	case RAL_RF_2526:	return "RT2526";
1948188417Sthompsa	case RAL_RF_5222:	return "RT5222";
1949188417Sthompsa	default:		return "unknown";
1950184610Salfred	}
1951184610Salfred}
1952184610Salfred
1953184610Salfredstatic void
1954188417Sthompsaural_read_eeprom(struct ural_softc *sc)
1955184610Salfred{
1956184610Salfred	uint16_t val;
1957184610Salfred
1958188417Sthompsa	ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
1959184610Salfred	val = le16toh(val);
1960188417Sthompsa	sc->rf_rev =   (val >> 11) & 0x7;
1961188417Sthompsa	sc->hw_radio = (val >> 10) & 0x1;
1962188417Sthompsa	sc->led_mode = (val >> 6)  & 0x7;
1963188417Sthompsa	sc->rx_ant =   (val >> 4)  & 0x3;
1964188417Sthompsa	sc->tx_ant =   (val >> 2)  & 0x3;
1965188417Sthompsa	sc->nb_ant =   val & 0x3;
1966184610Salfred
1967184610Salfred	/* read MAC address */
1968188419Sthompsa	ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, sc->sc_bssid, 6);
1969184610Salfred
1970184610Salfred	/* read default values for BBP registers */
1971188417Sthompsa	ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
1972184610Salfred
1973184610Salfred	/* read Tx power for all b/g channels */
1974188417Sthompsa	ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
1975184610Salfred}
1976184610Salfred
1977188417Sthompsastatic int
1978188417Sthompsaural_bbp_init(struct ural_softc *sc)
1979184610Salfred{
1980235000Shselasky#define N(a)	((int)(sizeof (a) / sizeof ((a)[0])))
1981188417Sthompsa	int i, ntries;
1982184610Salfred
1983188417Sthompsa	/* wait for BBP to be ready */
1984188417Sthompsa	for (ntries = 0; ntries < 100; ntries++) {
1985188417Sthompsa		if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
1986188417Sthompsa			break;
1987188619Sthompsa		if (ural_pause(sc, hz / 100))
1988188619Sthompsa			break;
1989184610Salfred	}
1990188417Sthompsa	if (ntries == 100) {
1991188417Sthompsa		device_printf(sc->sc_dev, "timeout waiting for BBP\n");
1992188417Sthompsa		return EIO;
1993188417Sthompsa	}
1994184610Salfred
1995184610Salfred	/* initialize BBP registers to default values */
1996188417Sthompsa	for (i = 0; i < N(ural_def_bbp); i++)
1997188417Sthompsa		ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
1998184610Salfred
1999184610Salfred#if 0
2000184610Salfred	/* initialize BBP registers to values stored in EEPROM */
2001184610Salfred	for (i = 0; i < 16; i++) {
2002188417Sthompsa		if (sc->bbp_prom[i].reg == 0xff)
2003184610Salfred			continue;
2004188417Sthompsa		ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2005184610Salfred	}
2006184610Salfred#endif
2007188417Sthompsa
2008188417Sthompsa	return 0;
2009188417Sthompsa#undef N
2010184610Salfred}
2011184610Salfred
2012184610Salfredstatic void
2013188417Sthompsaural_set_txantenna(struct ural_softc *sc, int antenna)
2014184610Salfred{
2015188417Sthompsa	uint16_t tmp;
2016188417Sthompsa	uint8_t tx;
2017184610Salfred
2018188417Sthompsa	tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
2019188417Sthompsa	if (antenna == 1)
2020188417Sthompsa		tx |= RAL_BBP_ANTA;
2021188417Sthompsa	else if (antenna == 2)
2022188417Sthompsa		tx |= RAL_BBP_ANTB;
2023188417Sthompsa	else
2024188417Sthompsa		tx |= RAL_BBP_DIVERSITY;
2025184610Salfred
2026188417Sthompsa	/* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2027188417Sthompsa	if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
2028188417Sthompsa	    sc->rf_rev == RAL_RF_5222)
2029188417Sthompsa		tx |= RAL_BBP_FLIPIQ;
2030184610Salfred
2031188417Sthompsa	ural_bbp_write(sc, RAL_BBP_TX, tx);
2032184610Salfred
2033188417Sthompsa	/* update values in PHY_CSR5 and PHY_CSR6 */
2034188417Sthompsa	tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2035188417Sthompsa	ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2036184610Salfred
2037188417Sthompsa	tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2038188417Sthompsa	ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2039184610Salfred}
2040184610Salfred
2041184610Salfredstatic void
2042188417Sthompsaural_set_rxantenna(struct ural_softc *sc, int antenna)
2043184610Salfred{
2044188417Sthompsa	uint8_t rx;
2045188417Sthompsa
2046188417Sthompsa	rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2047188417Sthompsa	if (antenna == 1)
2048188417Sthompsa		rx |= RAL_BBP_ANTA;
2049188417Sthompsa	else if (antenna == 2)
2050188417Sthompsa		rx |= RAL_BBP_ANTB;
2051188417Sthompsa	else
2052188417Sthompsa		rx |= RAL_BBP_DIVERSITY;
2053188417Sthompsa
2054188417Sthompsa	/* need to force no I/Q flip for RF 2525e and 2526 */
2055188417Sthompsa	if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2056188417Sthompsa		rx &= ~RAL_BBP_FLIPIQ;
2057188417Sthompsa
2058188417Sthompsa	ural_bbp_write(sc, RAL_BBP_RX, rx);
2059188417Sthompsa}
2060188417Sthompsa
2061188417Sthompsastatic void
2062191746Sthompsaural_init_locked(struct ural_softc *sc)
2063188417Sthompsa{
2064235000Shselasky#define N(a)	((int)(sizeof (a) / sizeof ((a)[0])))
2065188417Sthompsa	struct ifnet *ifp = sc->sc_ifp;
2066188417Sthompsa	struct ieee80211com *ic = ifp->if_l2com;
2067184610Salfred	uint16_t tmp;
2068188417Sthompsa	int i, ntries;
2069184610Salfred
2070188417Sthompsa	RAL_LOCK_ASSERT(sc, MA_OWNED);
2071184610Salfred
2072188417Sthompsa	ural_set_testmode(sc);
2073188417Sthompsa	ural_write(sc, 0x308, 0x00f0);	/* XXX magic */
2074184610Salfred
2075191746Sthompsa	ural_stop(sc);
2076184610Salfred
2077184610Salfred	/* initialize MAC registers to default values */
2078188417Sthompsa	for (i = 0; i < N(ural_def_mac); i++)
2079188417Sthompsa		ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2080184610Salfred
2081184610Salfred	/* wait for BBP and RF to wake up (this can take a long time!) */
2082188417Sthompsa	for (ntries = 0; ntries < 100; ntries++) {
2083188417Sthompsa		tmp = ural_read(sc, RAL_MAC_CSR17);
2084188417Sthompsa		if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2085188417Sthompsa		    (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2086188417Sthompsa			break;
2087188619Sthompsa		if (ural_pause(sc, hz / 100))
2088188619Sthompsa			break;
2089184610Salfred	}
2090188417Sthompsa	if (ntries == 100) {
2091188417Sthompsa		device_printf(sc->sc_dev,
2092188417Sthompsa		    "timeout waiting for BBP/RF to wakeup\n");
2093188417Sthompsa		goto fail;
2094188417Sthompsa	}
2095184610Salfred
2096184610Salfred	/* we're ready! */
2097188417Sthompsa	ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2098184610Salfred
2099184610Salfred	/* set basic rate set (will be updated later) */
2100188417Sthompsa	ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2101184610Salfred
2102188417Sthompsa	if (ural_bbp_init(sc) != 0)
2103184610Salfred		goto fail;
2104184610Salfred
2105188417Sthompsa	ural_set_chan(sc, ic->ic_curchan);
2106188417Sthompsa
2107184610Salfred	/* clear statistic registers (STA_CSR0 to STA_CSR10) */
2108188417Sthompsa	ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2109184610Salfred
2110188417Sthompsa	ural_set_txantenna(sc, sc->tx_ant);
2111188417Sthompsa	ural_set_rxantenna(sc, sc->rx_ant);
2112184610Salfred
2113190526Ssam	ural_set_macaddr(sc, IF_LLADDR(ifp));
2114184610Salfred
2115184610Salfred	/*
2116188417Sthompsa	 * Allocate Tx and Rx xfer queues.
2117184610Salfred	 */
2118188419Sthompsa	ural_setup_tx_list(sc);
2119184610Salfred
2120188417Sthompsa	/* kick Rx */
2121184610Salfred	tmp = RAL_DROP_PHY | RAL_DROP_CRC;
2122188417Sthompsa	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2123188417Sthompsa		tmp |= RAL_DROP_CTL | RAL_DROP_BAD_VERSION;
2124188417Sthompsa		if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2125184610Salfred			tmp |= RAL_DROP_TODS;
2126188417Sthompsa		if (!(ifp->if_flags & IFF_PROMISC))
2127184610Salfred			tmp |= RAL_DROP_NOT_TO_ME;
2128184610Salfred	}
2129188417Sthompsa	ural_write(sc, RAL_TXRX_CSR2, tmp);
2130184610Salfred
2131188417Sthompsa	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2132188417Sthompsa	ifp->if_drv_flags |= IFF_DRV_RUNNING;
2133194677Sthompsa	usbd_xfer_set_stall(sc->sc_xfer[URAL_BULK_WR]);
2134194228Sthompsa	usbd_transfer_start(sc->sc_xfer[URAL_BULK_RD]);
2135184610Salfred	return;
2136184610Salfred
2137191746Sthompsafail:	ural_stop(sc);
2138188417Sthompsa#undef N
2139184610Salfred}
2140184610Salfred
2141184610Salfredstatic void
2142188417Sthompsaural_init(void *priv)
2143184610Salfred{
2144188417Sthompsa	struct ural_softc *sc = priv;
2145184610Salfred	struct ifnet *ifp = sc->sc_ifp;
2146188417Sthompsa	struct ieee80211com *ic = ifp->if_l2com;
2147184610Salfred
2148188417Sthompsa	RAL_LOCK(sc);
2149191746Sthompsa	ural_init_locked(sc);
2150188417Sthompsa	RAL_UNLOCK(sc);
2151184610Salfred
2152188417Sthompsa	if (ifp->if_drv_flags & IFF_DRV_RUNNING)
2153188417Sthompsa		ieee80211_start_all(ic);		/* start all vap's */
2154184610Salfred}
2155184610Salfred
2156184610Salfredstatic void
2157191746Sthompsaural_stop(struct ural_softc *sc)
2158184610Salfred{
2159184610Salfred	struct ifnet *ifp = sc->sc_ifp;
2160184610Salfred
2161188417Sthompsa	RAL_LOCK_ASSERT(sc, MA_OWNED);
2162184610Salfred
2163188417Sthompsa	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2164184610Salfred
2165184610Salfred	/*
2166188419Sthompsa	 * Drain all the transfers, if not already drained:
2167184610Salfred	 */
2168188419Sthompsa	RAL_UNLOCK(sc);
2169194228Sthompsa	usbd_transfer_drain(sc->sc_xfer[URAL_BULK_WR]);
2170194228Sthompsa	usbd_transfer_drain(sc->sc_xfer[URAL_BULK_RD]);
2171188419Sthompsa	RAL_LOCK(sc);
2172184610Salfred
2173188419Sthompsa	ural_unsetup_tx_list(sc);
2174184610Salfred
2175188417Sthompsa	/* disable Rx */
2176188417Sthompsa	ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2177188417Sthompsa	/* reset ASIC and BBP (but won't reset MAC registers!) */
2178188417Sthompsa	ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2179188619Sthompsa	/* wait a little */
2180188619Sthompsa	ural_pause(sc, hz / 10);
2181188417Sthompsa	ural_write(sc, RAL_MAC_CSR1, 0);
2182189123Sthompsa	/* wait a little */
2183189123Sthompsa	ural_pause(sc, hz / 10);
2184184610Salfred}
2185184610Salfred
2186188417Sthompsastatic int
2187188417Sthompsaural_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2188188417Sthompsa	const struct ieee80211_bpf_params *params)
2189184610Salfred{
2190188417Sthompsa	struct ieee80211com *ic = ni->ni_ic;
2191188417Sthompsa	struct ifnet *ifp = ic->ic_ifp;
2192188417Sthompsa	struct ural_softc *sc = ifp->if_softc;
2193184610Salfred
2194188417Sthompsa	RAL_LOCK(sc);
2195188417Sthompsa	/* prevent management frames from being sent if we're not ready */
2196188417Sthompsa	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2197188417Sthompsa		RAL_UNLOCK(sc);
2198188417Sthompsa		m_freem(m);
2199188417Sthompsa		ieee80211_free_node(ni);
2200188417Sthompsa		return ENETDOWN;
2201184610Salfred	}
2202188969Sthompsa	if (sc->tx_nfree < RAL_TX_MINFREE) {
2203188417Sthompsa		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
2204188417Sthompsa		RAL_UNLOCK(sc);
2205184610Salfred		m_freem(m);
2206184610Salfred		ieee80211_free_node(ni);
2207188417Sthompsa		return EIO;
2208184610Salfred	}
2209184610Salfred
2210188417Sthompsa	ifp->if_opackets++;
2211184610Salfred
2212188417Sthompsa	if (params == NULL) {
2213188417Sthompsa		/*
2214188417Sthompsa		 * Legacy path; interpret frame contents to decide
2215188417Sthompsa		 * precisely how to send the frame.
2216188417Sthompsa		 */
2217188417Sthompsa		if (ural_tx_mgt(sc, m, ni) != 0)
2218188417Sthompsa			goto bad;
2219188417Sthompsa	} else {
2220188417Sthompsa		/*
2221188417Sthompsa		 * Caller supplied explicit parameters to use in
2222188417Sthompsa		 * sending the frame.
2223188417Sthompsa		 */
2224188417Sthompsa		if (ural_tx_raw(sc, m, ni, params) != 0)
2225188417Sthompsa			goto bad;
2226184610Salfred	}
2227188417Sthompsa	RAL_UNLOCK(sc);
2228188417Sthompsa	return 0;
2229188417Sthompsabad:
2230188417Sthompsa	ifp->if_oerrors++;
2231188417Sthompsa	RAL_UNLOCK(sc);
2232188417Sthompsa	ieee80211_free_node(ni);
2233188417Sthompsa	return EIO;		/* XXX */
2234184610Salfred}
2235184610Salfred
2236184610Salfredstatic void
2237206358Srpauloural_ratectl_start(struct ural_softc *sc, struct ieee80211_node *ni)
2238184610Salfred{
2239188417Sthompsa	struct ieee80211vap *vap = ni->ni_vap;
2240188417Sthompsa	struct ural_vap *uvp = URAL_VAP(vap);
2241184610Salfred
2242188417Sthompsa	/* clear statistic registers (STA_CSR0 to STA_CSR10) */
2243188417Sthompsa	ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2244184610Salfred
2245206358Srpaulo	usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp);
2246184610Salfred}
2247184610Salfred
2248184610Salfredstatic void
2249206358Srpauloural_ratectl_timeout(void *arg)
2250184610Salfred{
2251188417Sthompsa	struct ural_vap *uvp = arg;
2252191746Sthompsa	struct ieee80211vap *vap = &uvp->vap;
2253191746Sthompsa	struct ieee80211com *ic = vap->iv_ic;
2254184610Salfred
2255206358Srpaulo	ieee80211_runtask(ic, &uvp->ratectl_task);
2256184610Salfred}
2257184610Salfred
2258184610Salfredstatic void
2259206358Srpauloural_ratectl_task(void *arg, int pending)
2260184610Salfred{
2261191746Sthompsa	struct ural_vap *uvp = arg;
2262191746Sthompsa	struct ieee80211vap *vap = &uvp->vap;
2263191746Sthompsa	struct ieee80211com *ic = vap->iv_ic;
2264191746Sthompsa	struct ifnet *ifp = ic->ic_ifp;
2265191746Sthompsa	struct ural_softc *sc = ifp->if_softc;
2266212127Sthompsa	struct ieee80211_node *ni;
2267188417Sthompsa	int ok, fail;
2268206358Srpaulo	int sum, retrycnt;
2269184610Salfred
2270212127Sthompsa	ni = ieee80211_ref_node(vap->iv_bss);
2271191746Sthompsa	RAL_LOCK(sc);
2272188417Sthompsa	/* read and clear statistic registers (STA_CSR0 to STA_CSR10) */
2273188417Sthompsa	ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
2274184610Salfred
2275188417Sthompsa	ok = sc->sta[7] +		/* TX ok w/o retry */
2276188417Sthompsa	     sc->sta[8];		/* TX ok w/ retry */
2277188417Sthompsa	fail = sc->sta[9];		/* TX retry-fail count */
2278206358Srpaulo	sum = ok+fail;
2279206358Srpaulo	retrycnt = sc->sta[8] + fail;
2280184610Salfred
2281206358Srpaulo	ieee80211_ratectl_tx_update(vap, ni, &sum, &ok, &retrycnt);
2282206358Srpaulo	(void) ieee80211_ratectl_rate(ni, NULL, 0);
2283184610Salfred
2284188417Sthompsa	ifp->if_oerrors += fail;	/* count TX retry-fail as Tx errors */
2285184610Salfred
2286206358Srpaulo	usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp);
2287191746Sthompsa	RAL_UNLOCK(sc);
2288212127Sthompsa	ieee80211_free_node(ni);
2289184610Salfred}
2290184610Salfred
2291188619Sthompsastatic int
2292188619Sthompsaural_pause(struct ural_softc *sc, int timeout)
2293188619Sthompsa{
2294188619Sthompsa
2295194228Sthompsa	usb_pause_mtx(&sc->sc_mtx, timeout);
2296188619Sthompsa	return (0);
2297188619Sthompsa}
2298