if_rumreg.h revision 184610
1284990Scy/* $FreeBSD: head/sys/dev/usb2/wlan/if_rum2_reg.h 184610 2008-11-04 02:31:03Z alfred $ */ 2284990Scy 3284990Scy/*- 4284990Scy * Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr> 5284990Scy * Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org> 6284990Scy * 7284990Scy * Permission to use, copy, modify, and distribute this software for any 8284990Scy * purpose with or without fee is hereby granted, provided that the above 9284990Scy * copyright notice and this permission notice appear in all copies. 10284990Scy * 11284990Scy * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12284990Scy * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13284990Scy * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14284990Scy * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15284990Scy * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16284990Scy * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17284990Scy * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18284990Scy */ 19284990Scy 20284990Scy#define RT2573_NOISE_FLOOR -95 21284990Scy 22284990Scy#define RT2573_TX_DESC_SIZE (sizeof (struct rum_tx_desc)) 23284990Scy#define RT2573_RX_DESC_SIZE (sizeof (struct rum_rx_desc)) 24284990Scy 25284990Scy#define RT2573_CONFIG_NO 1 26284990Scy#define RT2573_IFACE_INDEX 0 27284990Scy 28284990Scy#define RT2573_MCU_CNTL 0x01 29284990Scy#define RT2573_WRITE_MAC 0x02 30284990Scy#define RT2573_READ_MAC 0x03 31284990Scy#define RT2573_WRITE_MULTI_MAC 0x06 32284990Scy#define RT2573_READ_MULTI_MAC 0x07 33284990Scy#define RT2573_READ_EEPROM 0x09 34284990Scy#define RT2573_WRITE_LED 0x0a 35284990Scy 36284990Scy/* 37284990Scy * Control and status registers. 38284990Scy */ 39284990Scy#define RT2573_AIFSN_CSR 0x0400 40284990Scy#define RT2573_CWMIN_CSR 0x0404 41284990Scy#define RT2573_CWMAX_CSR 0x0408 42284990Scy#define RT2573_MCU_CODE_BASE 0x0800 43284990Scy#define RT2573_HW_BEACON_BASE0 0x2400 44284990Scy#define RT2573_MAC_CSR0 0x3000 45284990Scy#define RT2573_MAC_CSR1 0x3004 46284990Scy#define RT2573_MAC_CSR2 0x3008 47284990Scy#define RT2573_MAC_CSR3 0x300c 48284990Scy#define RT2573_MAC_CSR4 0x3010 49284990Scy#define RT2573_MAC_CSR5 0x3014 50284990Scy#define RT2573_MAC_CSR6 0x3018 51284990Scy#define RT2573_MAC_CSR7 0x301c 52284990Scy#define RT2573_MAC_CSR8 0x3020 53284990Scy#define RT2573_MAC_CSR9 0x3024 54284990Scy#define RT2573_MAC_CSR10 0x3028 55284990Scy#define RT2573_MAC_CSR11 0x302c 56284990Scy#define RT2573_MAC_CSR12 0x3030 57284990Scy#define RT2573_MAC_CSR13 0x3034 58284990Scy#define RT2573_MAC_CSR14 0x3038 59284990Scy#define RT2573_MAC_CSR15 0x303c 60284990Scy#define RT2573_TXRX_CSR0 0x3040 61284990Scy#define RT2573_TXRX_CSR1 0x3044 62284990Scy#define RT2573_TXRX_CSR2 0x3048 63284990Scy#define RT2573_TXRX_CSR3 0x304c 64284990Scy#define RT2573_TXRX_CSR4 0x3050 65284990Scy#define RT2573_TXRX_CSR5 0x3054 66284990Scy#define RT2573_TXRX_CSR6 0x3058 67284990Scy#define RT2573_TXRX_CSR7 0x305c 68284990Scy#define RT2573_TXRX_CSR8 0x3060 69284990Scy#define RT2573_TXRX_CSR9 0x3064 70284990Scy#define RT2573_TXRX_CSR10 0x3068 71284990Scy#define RT2573_TXRX_CSR11 0x306c 72284990Scy#define RT2573_TXRX_CSR12 0x3070 73284990Scy#define RT2573_TXRX_CSR13 0x3074 74284990Scy#define RT2573_TXRX_CSR14 0x3078 75284990Scy#define RT2573_TXRX_CSR15 0x307c 76284990Scy#define RT2573_PHY_CSR0 0x3080 77284990Scy#define RT2573_PHY_CSR1 0x3084 78284990Scy#define RT2573_PHY_CSR2 0x3088 79284990Scy#define RT2573_PHY_CSR3 0x308c 80284990Scy#define RT2573_PHY_CSR4 0x3090 81284990Scy#define RT2573_PHY_CSR5 0x3094 82284990Scy#define RT2573_PHY_CSR6 0x3098 83284990Scy#define RT2573_PHY_CSR7 0x309c 84284990Scy#define RT2573_SEC_CSR0 0x30a0 85284990Scy#define RT2573_SEC_CSR1 0x30a4 86284990Scy#define RT2573_SEC_CSR2 0x30a8 87284990Scy#define RT2573_SEC_CSR3 0x30ac 88284990Scy#define RT2573_SEC_CSR4 0x30b0 89284990Scy#define RT2573_SEC_CSR5 0x30b4 90284990Scy#define RT2573_STA_CSR0 0x30c0 91284990Scy#define RT2573_STA_CSR1 0x30c4 92284990Scy#define RT2573_STA_CSR2 0x30c8 93284990Scy#define RT2573_STA_CSR3 0x30cc 94284990Scy#define RT2573_STA_CSR4 0x30d0 95284990Scy#define RT2573_STA_CSR5 0x30d4 96284990Scy 97284990Scy 98284990Scy/* possible flags for register RT2573_MAC_CSR1 */ 99284990Scy#define RT2573_RESET_ASIC (1 << 0) 100284990Scy#define RT2573_RESET_BBP (1 << 1) 101284990Scy#define RT2573_HOST_READY (1 << 2) 102284990Scy 103284990Scy/* possible flags for register MAC_CSR5 */ 104284990Scy#define RT2573_ONE_BSSID 3 105284990Scy 106284990Scy/* possible flags for register TXRX_CSR0 */ 107284990Scy/* Tx filter flags are in the low 16 bits */ 108284990Scy#define RT2573_AUTO_TX_SEQ (1 << 15) 109284990Scy/* Rx filter flags are in the high 16 bits */ 110284990Scy#define RT2573_DISABLE_RX (1 << 16) 111284990Scy#define RT2573_DROP_CRC_ERROR (1 << 17) 112284990Scy#define RT2573_DROP_PHY_ERROR (1 << 18) 113284990Scy#define RT2573_DROP_CTL (1 << 19) 114284990Scy#define RT2573_DROP_NOT_TO_ME (1 << 20) 115284990Scy#define RT2573_DROP_TODS (1 << 21) 116284990Scy#define RT2573_DROP_VER_ERROR (1 << 22) 117284990Scy#define RT2573_DROP_MULTICAST (1 << 23) 118284990Scy#define RT2573_DROP_BROADCAST (1 << 24) 119284990Scy#define RT2573_DROP_ACKCTS (1 << 25) 120284990Scy 121284990Scy/* possible flags for register TXRX_CSR4 */ 122284990Scy#define RT2573_SHORT_PREAMBLE (1 << 18) 123284990Scy#define RT2573_MRR_ENABLED (1 << 19) 124284990Scy#define RT2573_MRR_CCK_FALLBACK (1 << 22) 125284990Scy 126284990Scy/* possible flags for register TXRX_CSR9 */ 127284990Scy#define RT2573_TSF_TICKING (1 << 16) 128284990Scy#define RT2573_TSF_MODE(x) (((x) & 0x3) << 17) 129284990Scy/* TBTT stands for Target Beacon Transmission Time */ 130284990Scy#define RT2573_ENABLE_TBTT (1 << 19) 131284990Scy#define RT2573_GENERATE_BEACON (1 << 20) 132284990Scy 133284990Scy/* possible flags for register PHY_CSR0 */ 134284990Scy#define RT2573_PA_PE_2GHZ (1 << 16) 135284990Scy#define RT2573_PA_PE_5GHZ (1 << 17) 136284990Scy 137284990Scy/* possible flags for register PHY_CSR3 */ 138284990Scy#define RT2573_BBP_READ (1 << 15) 139284990Scy#define RT2573_BBP_BUSY (1 << 16) 140284990Scy/* possible flags for register PHY_CSR4 */ 141284990Scy#define RT2573_RF_20BIT (20 << 24) 142284990Scy#define RT2573_RF_BUSY (1 << 31) 143284990Scy 144284990Scy/* LED values */ 145284990Scy#define RT2573_LED_RADIO (1 << 8) 146284990Scy#define RT2573_LED_G (1 << 9) 147284990Scy#define RT2573_LED_A (1 << 10) 148284990Scy#define RT2573_LED_ON 0x1e1e 149284990Scy#define RT2573_LED_OFF 0x0 150284990Scy 151284990Scy#define RT2573_MCU_RUN (1 << 3) 152284990Scy 153284990Scy#define RT2573_SMART_MODE (1 << 0) 154284990Scy 155284990Scy#define RT2573_BBPR94_DEFAULT 6 156284990Scy 157284990Scy#define RT2573_BBP_WRITE (1 << 15) 158284990Scy 159284990Scy/* dual-band RF */ 160284990Scy#define RT2573_RF_5226 1 161284990Scy#define RT2573_RF_5225 3 162284990Scy/* single-band RF */ 163284990Scy#define RT2573_RF_2528 2 164284990Scy#define RT2573_RF_2527 4 165284990Scy 166284990Scy#define RT2573_BBP_VERSION 0 167284990Scy 168284990Scystruct rum_tx_desc { 169284990Scy uint32_t flags; 170284990Scy#define RT2573_TX_BURST (1 << 0) 171284990Scy#define RT2573_TX_VALID (1 << 1) 172284990Scy#define RT2573_TX_MORE_FRAG (1 << 2) 173284990Scy#define RT2573_TX_NEED_ACK (1 << 3) 174284990Scy#define RT2573_TX_TIMESTAMP (1 << 4) 175284990Scy#define RT2573_TX_OFDM (1 << 5) 176284990Scy#define RT2573_TX_IFS_SIFS (1 << 6) 177284990Scy#define RT2573_TX_LONG_RETRY (1 << 7) 178284990Scy uint16_t wme; 179284990Scy#define RT2573_QID(v) (v) 180284990Scy#define RT2573_AIFSN(v) ((v) << 4) 181284990Scy#define RT2573_LOGCWMIN(v) ((v) << 8) 182284990Scy#define RT2573_LOGCWMAX(v) ((v) << 12) 183284990Scy 184284990Scy uint16_t xflags; 185284990Scy#define RT2573_TX_HWSEQ (1 << 12) 186284990Scy#define RT2573_TX_BEACON (1 << 15) /* Internal flag only! */ 187284990Scy 188284990Scy uint8_t plcp_signal; 189284990Scy uint8_t plcp_service; 190284990Scy#define RT2573_PLCP_LENGEXT 0x80 191284990Scy 192284990Scy uint8_t plcp_length_lo; 193284990Scy uint8_t plcp_length_hi; 194284990Scy 195284990Scy uint32_t iv; 196284990Scy uint32_t eiv; 197284990Scy 198284990Scy uint8_t offset; 199284990Scy uint8_t qid; 200284990Scy uint8_t txpower; 201284990Scy#define RT2573_DEFAULT_TXPOWER 0 202284990Scy 203284990Scy uint8_t reserved; 204284990Scy} __packed; 205284990Scy 206284990Scystruct rum_rx_desc { 207284990Scy uint32_t flags; 208284990Scy#define RT2573_RX_BUSY (1 << 0) 209284990Scy#define RT2573_RX_DROP (1 << 1) 210284990Scy#define RT2573_RX_CRC_ERROR (1 << 6) 211284990Scy#define RT2573_RX_OFDM (1 << 7) 212284990Scy 213284990Scy uint8_t rate; 214284990Scy uint8_t rssi; 215284990Scy uint8_t reserved1; 216284990Scy uint8_t offset; 217284990Scy uint32_t iv; 218284990Scy uint32_t eiv; 219284990Scy uint32_t reserved2[2]; 220284990Scy} __packed; 221284990Scy 222284990Scy#define RT2573_RF1 0 223284990Scy#define RT2573_RF2 2 224284990Scy#define RT2573_RF3 1 225284990Scy#define RT2573_RF4 3 226284990Scy 227284990Scy#define RT2573_EEPROM_MACBBP 0x0000 228284990Scy#define RT2573_EEPROM_ADDRESS 0x0004 229284990Scy#define RT2573_EEPROM_ANTENNA 0x0020 230284990Scy#define RT2573_EEPROM_CONFIG2 0x0022 231284990Scy#define RT2573_EEPROM_BBP_BASE 0x0026 232284990Scy#define RT2573_EEPROM_TXPOWER 0x0046 233284990Scy#define RT2573_EEPROM_FREQ_OFFSET 0x005e 234284990Scy#define RT2573_EEPROM_RSSI_2GHZ_OFFSET 0x009a 235284990Scy#define RT2573_EEPROM_RSSI_5GHZ_OFFSET 0x009c 236284990Scy