1184610Salfred/* $FreeBSD$ */ 2184610Salfred 3184610Salfred/*- 4184610Salfred * Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr> 5184610Salfred * Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org> 6184610Salfred * 7184610Salfred * Permission to use, copy, modify, and distribute this software for any 8184610Salfred * purpose with or without fee is hereby granted, provided that the above 9184610Salfred * copyright notice and this permission notice appear in all copies. 10184610Salfred * 11184610Salfred * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12184610Salfred * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13184610Salfred * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14184610Salfred * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15184610Salfred * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16184610Salfred * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17184610Salfred * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18184610Salfred */ 19184610Salfred 20188417Sthompsa#define RT2573_NOISE_FLOOR -95 21184610Salfred 22188417Sthompsa#define RT2573_TX_DESC_SIZE (sizeof (struct rum_tx_desc)) 23188417Sthompsa#define RT2573_RX_DESC_SIZE (sizeof (struct rum_rx_desc)) 24184610Salfred 25188417Sthompsa#define RT2573_CONFIG_NO 1 26188417Sthompsa#define RT2573_IFACE_INDEX 0 27184610Salfred 28188417Sthompsa#define RT2573_MCU_CNTL 0x01 29188417Sthompsa#define RT2573_WRITE_MAC 0x02 30188417Sthompsa#define RT2573_READ_MAC 0x03 31188417Sthompsa#define RT2573_WRITE_MULTI_MAC 0x06 32188417Sthompsa#define RT2573_READ_MULTI_MAC 0x07 33188417Sthompsa#define RT2573_READ_EEPROM 0x09 34188417Sthompsa#define RT2573_WRITE_LED 0x0a 35184610Salfred 36184610Salfred/* 37184610Salfred * Control and status registers. 38184610Salfred */ 39188417Sthompsa#define RT2573_AIFSN_CSR 0x0400 40188417Sthompsa#define RT2573_CWMIN_CSR 0x0404 41188417Sthompsa#define RT2573_CWMAX_CSR 0x0408 42188417Sthompsa#define RT2573_MCU_CODE_BASE 0x0800 43188417Sthompsa#define RT2573_HW_BEACON_BASE0 0x2400 44188417Sthompsa#define RT2573_MAC_CSR0 0x3000 45188417Sthompsa#define RT2573_MAC_CSR1 0x3004 46188417Sthompsa#define RT2573_MAC_CSR2 0x3008 47188417Sthompsa#define RT2573_MAC_CSR3 0x300c 48188417Sthompsa#define RT2573_MAC_CSR4 0x3010 49188417Sthompsa#define RT2573_MAC_CSR5 0x3014 50188417Sthompsa#define RT2573_MAC_CSR6 0x3018 51188417Sthompsa#define RT2573_MAC_CSR7 0x301c 52188417Sthompsa#define RT2573_MAC_CSR8 0x3020 53188417Sthompsa#define RT2573_MAC_CSR9 0x3024 54188417Sthompsa#define RT2573_MAC_CSR10 0x3028 55188417Sthompsa#define RT2573_MAC_CSR11 0x302c 56188417Sthompsa#define RT2573_MAC_CSR12 0x3030 57188417Sthompsa#define RT2573_MAC_CSR13 0x3034 58188417Sthompsa#define RT2573_MAC_CSR14 0x3038 59188417Sthompsa#define RT2573_MAC_CSR15 0x303c 60188417Sthompsa#define RT2573_TXRX_CSR0 0x3040 61188417Sthompsa#define RT2573_TXRX_CSR1 0x3044 62188417Sthompsa#define RT2573_TXRX_CSR2 0x3048 63188417Sthompsa#define RT2573_TXRX_CSR3 0x304c 64188417Sthompsa#define RT2573_TXRX_CSR4 0x3050 65188417Sthompsa#define RT2573_TXRX_CSR5 0x3054 66188417Sthompsa#define RT2573_TXRX_CSR6 0x3058 67188417Sthompsa#define RT2573_TXRX_CSR7 0x305c 68188417Sthompsa#define RT2573_TXRX_CSR8 0x3060 69188417Sthompsa#define RT2573_TXRX_CSR9 0x3064 70188417Sthompsa#define RT2573_TXRX_CSR10 0x3068 71188417Sthompsa#define RT2573_TXRX_CSR11 0x306c 72188417Sthompsa#define RT2573_TXRX_CSR12 0x3070 73188417Sthompsa#define RT2573_TXRX_CSR13 0x3074 74188417Sthompsa#define RT2573_TXRX_CSR14 0x3078 75188417Sthompsa#define RT2573_TXRX_CSR15 0x307c 76188417Sthompsa#define RT2573_PHY_CSR0 0x3080 77188417Sthompsa#define RT2573_PHY_CSR1 0x3084 78188417Sthompsa#define RT2573_PHY_CSR2 0x3088 79188417Sthompsa#define RT2573_PHY_CSR3 0x308c 80188417Sthompsa#define RT2573_PHY_CSR4 0x3090 81188417Sthompsa#define RT2573_PHY_CSR5 0x3094 82188417Sthompsa#define RT2573_PHY_CSR6 0x3098 83188417Sthompsa#define RT2573_PHY_CSR7 0x309c 84188417Sthompsa#define RT2573_SEC_CSR0 0x30a0 85188417Sthompsa#define RT2573_SEC_CSR1 0x30a4 86188417Sthompsa#define RT2573_SEC_CSR2 0x30a8 87188417Sthompsa#define RT2573_SEC_CSR3 0x30ac 88188417Sthompsa#define RT2573_SEC_CSR4 0x30b0 89188417Sthompsa#define RT2573_SEC_CSR5 0x30b4 90188417Sthompsa#define RT2573_STA_CSR0 0x30c0 91188417Sthompsa#define RT2573_STA_CSR1 0x30c4 92188417Sthompsa#define RT2573_STA_CSR2 0x30c8 93188417Sthompsa#define RT2573_STA_CSR3 0x30cc 94188417Sthompsa#define RT2573_STA_CSR4 0x30d0 95188417Sthompsa#define RT2573_STA_CSR5 0x30d4 96184610Salfred 97184610Salfred 98184610Salfred/* possible flags for register RT2573_MAC_CSR1 */ 99188417Sthompsa#define RT2573_RESET_ASIC (1 << 0) 100188417Sthompsa#define RT2573_RESET_BBP (1 << 1) 101188417Sthompsa#define RT2573_HOST_READY (1 << 2) 102184610Salfred 103184610Salfred/* possible flags for register MAC_CSR5 */ 104188417Sthompsa#define RT2573_ONE_BSSID 3 105184610Salfred 106184610Salfred/* possible flags for register TXRX_CSR0 */ 107184610Salfred/* Tx filter flags are in the low 16 bits */ 108188417Sthompsa#define RT2573_AUTO_TX_SEQ (1 << 15) 109184610Salfred/* Rx filter flags are in the high 16 bits */ 110188417Sthompsa#define RT2573_DISABLE_RX (1 << 16) 111188417Sthompsa#define RT2573_DROP_CRC_ERROR (1 << 17) 112188417Sthompsa#define RT2573_DROP_PHY_ERROR (1 << 18) 113188417Sthompsa#define RT2573_DROP_CTL (1 << 19) 114188417Sthompsa#define RT2573_DROP_NOT_TO_ME (1 << 20) 115188417Sthompsa#define RT2573_DROP_TODS (1 << 21) 116188417Sthompsa#define RT2573_DROP_VER_ERROR (1 << 22) 117188417Sthompsa#define RT2573_DROP_MULTICAST (1 << 23) 118188417Sthompsa#define RT2573_DROP_BROADCAST (1 << 24) 119188417Sthompsa#define RT2573_DROP_ACKCTS (1 << 25) 120184610Salfred 121184610Salfred/* possible flags for register TXRX_CSR4 */ 122188417Sthompsa#define RT2573_SHORT_PREAMBLE (1 << 18) 123188417Sthompsa#define RT2573_MRR_ENABLED (1 << 19) 124188417Sthompsa#define RT2573_MRR_CCK_FALLBACK (1 << 22) 125184610Salfred 126184610Salfred/* possible flags for register TXRX_CSR9 */ 127188417Sthompsa#define RT2573_TSF_TICKING (1 << 16) 128188417Sthompsa#define RT2573_TSF_MODE(x) (((x) & 0x3) << 17) 129184610Salfred/* TBTT stands for Target Beacon Transmission Time */ 130188417Sthompsa#define RT2573_ENABLE_TBTT (1 << 19) 131188417Sthompsa#define RT2573_GENERATE_BEACON (1 << 20) 132184610Salfred 133184610Salfred/* possible flags for register PHY_CSR0 */ 134188417Sthompsa#define RT2573_PA_PE_2GHZ (1 << 16) 135188417Sthompsa#define RT2573_PA_PE_5GHZ (1 << 17) 136184610Salfred 137184610Salfred/* possible flags for register PHY_CSR3 */ 138188417Sthompsa#define RT2573_BBP_READ (1 << 15) 139188417Sthompsa#define RT2573_BBP_BUSY (1 << 16) 140184610Salfred/* possible flags for register PHY_CSR4 */ 141188417Sthompsa#define RT2573_RF_20BIT (20 << 24) 142196970Sphk#define RT2573_RF_BUSY (1 << 31) 143184610Salfred 144184610Salfred/* LED values */ 145188417Sthompsa#define RT2573_LED_RADIO (1 << 8) 146188417Sthompsa#define RT2573_LED_G (1 << 9) 147188417Sthompsa#define RT2573_LED_A (1 << 10) 148188417Sthompsa#define RT2573_LED_ON 0x1e1e 149188417Sthompsa#define RT2573_LED_OFF 0x0 150184610Salfred 151188417Sthompsa#define RT2573_MCU_RUN (1 << 3) 152184610Salfred 153188417Sthompsa#define RT2573_SMART_MODE (1 << 0) 154184610Salfred 155188417Sthompsa#define RT2573_BBPR94_DEFAULT 6 156184610Salfred 157188417Sthompsa#define RT2573_BBP_WRITE (1 << 15) 158184610Salfred 159184610Salfred/* dual-band RF */ 160188417Sthompsa#define RT2573_RF_5226 1 161188417Sthompsa#define RT2573_RF_5225 3 162184610Salfred/* single-band RF */ 163188417Sthompsa#define RT2573_RF_2528 2 164188417Sthompsa#define RT2573_RF_2527 4 165184610Salfred 166188417Sthompsa#define RT2573_BBP_VERSION 0 167184610Salfred 168184610Salfredstruct rum_tx_desc { 169188417Sthompsa uint32_t flags; 170188417Sthompsa#define RT2573_TX_BURST (1 << 0) 171188417Sthompsa#define RT2573_TX_VALID (1 << 1) 172188417Sthompsa#define RT2573_TX_MORE_FRAG (1 << 2) 173188417Sthompsa#define RT2573_TX_NEED_ACK (1 << 3) 174188417Sthompsa#define RT2573_TX_TIMESTAMP (1 << 4) 175188417Sthompsa#define RT2573_TX_OFDM (1 << 5) 176188417Sthompsa#define RT2573_TX_IFS_SIFS (1 << 6) 177188417Sthompsa#define RT2573_TX_LONG_RETRY (1 << 7) 178184610Salfred 179188417Sthompsa uint16_t wme; 180188417Sthompsa#define RT2573_QID(v) (v) 181188417Sthompsa#define RT2573_AIFSN(v) ((v) << 4) 182188417Sthompsa#define RT2573_LOGCWMIN(v) ((v) << 8) 183188417Sthompsa#define RT2573_LOGCWMAX(v) ((v) << 12) 184184610Salfred 185188417Sthompsa uint16_t xflags; 186188417Sthompsa#define RT2573_TX_HWSEQ (1 << 12) 187184610Salfred 188188417Sthompsa uint8_t plcp_signal; 189188417Sthompsa uint8_t plcp_service; 190188417Sthompsa#define RT2573_PLCP_LENGEXT 0x80 191184610Salfred 192188417Sthompsa uint8_t plcp_length_lo; 193188417Sthompsa uint8_t plcp_length_hi; 194184610Salfred 195188417Sthompsa uint32_t iv; 196188417Sthompsa uint32_t eiv; 197184610Salfred 198188417Sthompsa uint8_t offset; 199188417Sthompsa uint8_t qid; 200188417Sthompsa uint8_t txpower; 201188417Sthompsa#define RT2573_DEFAULT_TXPOWER 0 202188417Sthompsa 203188417Sthompsa uint8_t reserved; 204184610Salfred} __packed; 205184610Salfred 206184610Salfredstruct rum_rx_desc { 207188417Sthompsa uint32_t flags; 208188417Sthompsa#define RT2573_RX_BUSY (1 << 0) 209188417Sthompsa#define RT2573_RX_DROP (1 << 1) 210188417Sthompsa#define RT2573_RX_CRC_ERROR (1 << 6) 211188417Sthompsa#define RT2573_RX_OFDM (1 << 7) 212184610Salfred 213188417Sthompsa uint8_t rate; 214188417Sthompsa uint8_t rssi; 215188417Sthompsa uint8_t reserved1; 216188417Sthompsa uint8_t offset; 217188417Sthompsa uint32_t iv; 218188417Sthompsa uint32_t eiv; 219188417Sthompsa uint32_t reserved2[2]; 220184610Salfred} __packed; 221184610Salfred 222188417Sthompsa#define RT2573_RF1 0 223188417Sthompsa#define RT2573_RF2 2 224188417Sthompsa#define RT2573_RF3 1 225188417Sthompsa#define RT2573_RF4 3 226184610Salfred 227188417Sthompsa#define RT2573_EEPROM_MACBBP 0x0000 228188417Sthompsa#define RT2573_EEPROM_ADDRESS 0x0004 229188417Sthompsa#define RT2573_EEPROM_ANTENNA 0x0020 230188417Sthompsa#define RT2573_EEPROM_CONFIG2 0x0022 231188417Sthompsa#define RT2573_EEPROM_BBP_BASE 0x0026 232188417Sthompsa#define RT2573_EEPROM_TXPOWER 0x0046 233188417Sthompsa#define RT2573_EEPROM_FREQ_OFFSET 0x005e 234188417Sthompsa#define RT2573_EEPROM_RSSI_2GHZ_OFFSET 0x009a 235188417Sthompsa#define RT2573_EEPROM_RSSI_5GHZ_OFFSET 0x009c 236