if_rum.c revision 192468
1183234Ssimon/*	$FreeBSD: head/sys/dev/usb/wlan/if_rum.c 192468 2009-05-20 20:00:40Z sam $	*/
2296341Sdelphij
3296341Sdelphij/*-
4183234Ssimon * Copyright (c) 2005-2007 Damien Bergamini <damien.bergamini@free.fr>
5183234Ssimon * Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org>
6183234Ssimon * Copyright (c) 2007-2008 Hans Petter Selasky <hselasky@FreeBSD.org>
7183234Ssimon *
8183234Ssimon * Permission to use, copy, modify, and distribute this software for any
9183234Ssimon * purpose with or without fee is hereby granted, provided that the above
10183234Ssimon * copyright notice and this permission notice appear in all copies.
11183234Ssimon *
12183234Ssimon * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13183234Ssimon * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14296341Sdelphij * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15183234Ssimon * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16183234Ssimon * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17183234Ssimon * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18183234Ssimon * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19183234Ssimon */
20183234Ssimon
21183234Ssimon#include <sys/cdefs.h>
22183234Ssimon__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_rum.c 192468 2009-05-20 20:00:40Z sam $");
23183234Ssimon
24183234Ssimon/*-
25183234Ssimon * Ralink Technology RT2501USB/RT2601USB chipset driver
26183234Ssimon * http://www.ralinktech.com.tw/
27183234Ssimon */
28183234Ssimon
29183234Ssimon#include <sys/param.h>
30183234Ssimon#include <sys/sockio.h>
31183234Ssimon#include <sys/sysctl.h>
32183234Ssimon#include <sys/lock.h>
33183234Ssimon#include <sys/mutex.h>
34183234Ssimon#include <sys/mbuf.h>
35183234Ssimon#include <sys/kernel.h>
36183234Ssimon#include <sys/socket.h>
37183234Ssimon#include <sys/systm.h>
38183234Ssimon#include <sys/malloc.h>
39183234Ssimon#include <sys/module.h>
40183234Ssimon#include <sys/bus.h>
41183234Ssimon#include <sys/endian.h>
42183234Ssimon#include <sys/kdb.h>
43183234Ssimon
44183234Ssimon#include <machine/bus.h>
45183234Ssimon#include <machine/resource.h>
46183234Ssimon#include <sys/rman.h>
47183234Ssimon
48183234Ssimon#include <net/bpf.h>
49183234Ssimon#include <net/if.h>
50183234Ssimon#include <net/if_arp.h>
51183234Ssimon#include <net/ethernet.h>
52183234Ssimon#include <net/if_dl.h>
53183234Ssimon#include <net/if_media.h>
54183234Ssimon#include <net/if_types.h>
55183234Ssimon
56183234Ssimon#ifdef INET
57183234Ssimon#include <netinet/in.h>
58183234Ssimon#include <netinet/in_systm.h>
59183234Ssimon#include <netinet/in_var.h>
60183234Ssimon#include <netinet/if_ether.h>
61183234Ssimon#include <netinet/ip.h>
62183234Ssimon#endif
63296341Sdelphij
64296341Sdelphij#include <net80211/ieee80211_var.h>
65296341Sdelphij#include <net80211/ieee80211_regdomain.h>
66296341Sdelphij#include <net80211/ieee80211_radiotap.h>
67296341Sdelphij#include <net80211/ieee80211_amrr.h>
68296341Sdelphij
69183234Ssimon#define	USB_DEBUG_VAR rum_debug
70296341Sdelphij
71296341Sdelphij#include <dev/usb/usb.h>
72183234Ssimon#include <dev/usb/usb_error.h>
73183234Ssimon#include <dev/usb/usb_core.h>
74183234Ssimon#include <dev/usb/usb_lookup.h>
75296341Sdelphij#include <dev/usb/usb_debug.h>
76296341Sdelphij#include <dev/usb/usb_request.h>
77296341Sdelphij#include <dev/usb/usb_busdma.h>
78183234Ssimon#include <dev/usb/usb_util.h>
79296341Sdelphij#include "usbdevs.h"
80296341Sdelphij
81296341Sdelphij#include <dev/usb/wlan/if_rumreg.h>
82296341Sdelphij#include <dev/usb/wlan/if_rumvar.h>
83296341Sdelphij#include <dev/usb/wlan/if_rumfw.h>
84296341Sdelphij
85296341Sdelphij#if USB_DEBUG
86296341Sdelphijstatic int rum_debug = 0;
87296341Sdelphij
88296341SdelphijSYSCTL_NODE(_hw_usb2, OID_AUTO, rum, CTLFLAG_RW, 0, "USB rum");
89296341SdelphijSYSCTL_INT(_hw_usb2_rum, OID_AUTO, debug, CTLFLAG_RW, &rum_debug, 0,
90296341Sdelphij    "Debug level");
91296341Sdelphij#endif
92296341Sdelphij
93296341Sdelphijstatic const struct usb2_device_id rum_devs[] = {
94296341Sdelphij    { USB_VP(USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_HWU54DM) },
95296341Sdelphij    { USB_VP(USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_RT2573_2) },
96296341Sdelphij    { USB_VP(USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_RT2573_3) },
97296341Sdelphij    { USB_VP(USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_RT2573_4) },
98183234Ssimon    { USB_VP(USB_VENDOR_ABOCOM,		USB_PRODUCT_ABOCOM_WUG2700) },
99238405Sjkim    { USB_VP(USB_VENDOR_AMIT,		USB_PRODUCT_AMIT_CGWLUSB2GO) },
100238405Sjkim    { USB_VP(USB_VENDOR_ASUS,		USB_PRODUCT_ASUS_RT2573_1) },
101183234Ssimon    { USB_VP(USB_VENDOR_ASUS,		USB_PRODUCT_ASUS_RT2573_2) },
102183234Ssimon    { USB_VP(USB_VENDOR_BELKIN,		USB_PRODUCT_BELKIN_F5D7050A) },
103183234Ssimon    { USB_VP(USB_VENDOR_BELKIN,		USB_PRODUCT_BELKIN_F5D9050V3) },
104296341Sdelphij    { USB_VP(USB_VENDOR_CISCOLINKSYS,	USB_PRODUCT_CISCOLINKSYS_WUSB54GC) },
105296341Sdelphij    { USB_VP(USB_VENDOR_CISCOLINKSYS,	USB_PRODUCT_CISCOLINKSYS_WUSB54GR) },
106296341Sdelphij    { USB_VP(USB_VENDOR_CONCEPTRONIC2,	USB_PRODUCT_CONCEPTRONIC2_C54RU2) },
107296341Sdelphij    { USB_VP(USB_VENDOR_COREGA,		USB_PRODUCT_COREGA_CGWLUSB2GL) },
108296341Sdelphij    { USB_VP(USB_VENDOR_COREGA,		USB_PRODUCT_COREGA_CGWLUSB2GPX) },
109296341Sdelphij    { USB_VP(USB_VENDOR_DICKSMITH,	USB_PRODUCT_DICKSMITH_CWD854F) },
110296341Sdelphij    { USB_VP(USB_VENDOR_DICKSMITH,	USB_PRODUCT_DICKSMITH_RT2573) },
111296341Sdelphij    { USB_VP(USB_VENDOR_DLINK2,		USB_PRODUCT_DLINK2_DWLG122C1) },
112296341Sdelphij    { USB_VP(USB_VENDOR_DLINK2,		USB_PRODUCT_DLINK2_WUA1340) },
113296341Sdelphij    { USB_VP(USB_VENDOR_DLINK2,		USB_PRODUCT_DLINK2_DWA111) },
114296341Sdelphij    { USB_VP(USB_VENDOR_DLINK2,		USB_PRODUCT_DLINK2_DWA110) },
115296341Sdelphij    { USB_VP(USB_VENDOR_GIGABYTE,	USB_PRODUCT_GIGABYTE_GNWB01GS) },
116296341Sdelphij    { USB_VP(USB_VENDOR_GIGABYTE,	USB_PRODUCT_GIGABYTE_GNWI05GS) },
117296341Sdelphij    { USB_VP(USB_VENDOR_GIGASET,	USB_PRODUCT_GIGASET_RT2573) },
118296341Sdelphij    { USB_VP(USB_VENDOR_GOODWAY,	USB_PRODUCT_GOODWAY_RT2573) },
119296341Sdelphij    { USB_VP(USB_VENDOR_GUILLEMOT,	USB_PRODUCT_GUILLEMOT_HWGUSB254LB) },
120296341Sdelphij    { USB_VP(USB_VENDOR_GUILLEMOT,	USB_PRODUCT_GUILLEMOT_HWGUSB254V2AP) },
121296341Sdelphij    { USB_VP(USB_VENDOR_HUAWEI3COM,	USB_PRODUCT_HUAWEI3COM_WUB320G) },
122296341Sdelphij    { USB_VP(USB_VENDOR_MELCO,		USB_PRODUCT_MELCO_G54HP) },
123296341Sdelphij    { USB_VP(USB_VENDOR_MELCO,		USB_PRODUCT_MELCO_SG54HP) },
124296341Sdelphij    { USB_VP(USB_VENDOR_MSI,		USB_PRODUCT_MSI_RT2573_1) },
125296341Sdelphij    { USB_VP(USB_VENDOR_MSI,		USB_PRODUCT_MSI_RT2573_2) },
126296341Sdelphij    { USB_VP(USB_VENDOR_MSI,		USB_PRODUCT_MSI_RT2573_3) },
127296341Sdelphij    { USB_VP(USB_VENDOR_MSI,		USB_PRODUCT_MSI_RT2573_4) },
128296341Sdelphij    { USB_VP(USB_VENDOR_NOVATECH,	USB_PRODUCT_NOVATECH_RT2573) },
129296341Sdelphij    { USB_VP(USB_VENDOR_PLANEX2,	USB_PRODUCT_PLANEX2_GWUS54HP) },
130296341Sdelphij    { USB_VP(USB_VENDOR_PLANEX2,	USB_PRODUCT_PLANEX2_GWUS54MINI2) },
131296341Sdelphij    { USB_VP(USB_VENDOR_PLANEX2,	USB_PRODUCT_PLANEX2_GWUSMM) },
132296341Sdelphij    { USB_VP(USB_VENDOR_QCOM,		USB_PRODUCT_QCOM_RT2573) },
133296341Sdelphij    { USB_VP(USB_VENDOR_QCOM,		USB_PRODUCT_QCOM_RT2573_2) },
134296341Sdelphij    { USB_VP(USB_VENDOR_QCOM,		USB_PRODUCT_QCOM_RT2573_3) },
135296341Sdelphij    { USB_VP(USB_VENDOR_RALINK,		USB_PRODUCT_RALINK_RT2573) },
136296341Sdelphij    { USB_VP(USB_VENDOR_RALINK,		USB_PRODUCT_RALINK_RT2573_2) },
137296341Sdelphij    { USB_VP(USB_VENDOR_RALINK,		USB_PRODUCT_RALINK_RT2671) },
138296341Sdelphij    { USB_VP(USB_VENDOR_SITECOMEU,	USB_PRODUCT_SITECOMEU_WL113R2) },
139296341Sdelphij    { USB_VP(USB_VENDOR_SITECOMEU,	USB_PRODUCT_SITECOMEU_WL172) },
140296341Sdelphij    { USB_VP(USB_VENDOR_SPARKLAN,	USB_PRODUCT_SPARKLAN_RT2573) },
141296341Sdelphij    { USB_VP(USB_VENDOR_SURECOM,	USB_PRODUCT_SURECOM_RT2573) },
142183234Ssimon};
143296341Sdelphij
144183234SsimonMODULE_DEPEND(rum, wlan, 1, 1, 1);
145296341SdelphijMODULE_DEPEND(rum, wlan_amrr, 1, 1, 1);
146183234SsimonMODULE_DEPEND(rum, usb, 1, 1, 1);
147296341Sdelphij
148296341Sdelphijstatic device_probe_t rum_match;
149183234Ssimonstatic device_attach_t rum_attach;
150296341Sdelphijstatic device_detach_t rum_detach;
151183234Ssimon
152296341Sdelphijstatic usb2_callback_t rum_bulk_read_callback;
153296341Sdelphijstatic usb2_callback_t rum_bulk_write_callback;
154296341Sdelphij
155296341Sdelphijstatic usb2_error_t	rum_do_request(struct rum_softc *sc,
156183234Ssimon			    struct usb2_device_request *req, void *data);
157296341Sdelphijstatic struct ieee80211vap *rum_vap_create(struct ieee80211com *,
158296341Sdelphij			    const char name[IFNAMSIZ], int unit, int opmode,
159183234Ssimon			    int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
160296341Sdelphij			    const uint8_t mac[IEEE80211_ADDR_LEN]);
161296341Sdelphijstatic void		rum_vap_delete(struct ieee80211vap *);
162296341Sdelphijstatic void		rum_tx_free(struct rum_tx_data *, int);
163296341Sdelphijstatic void		rum_setup_tx_list(struct rum_softc *);
164296341Sdelphijstatic void		rum_unsetup_tx_list(struct rum_softc *);
165296341Sdelphijstatic int		rum_newstate(struct ieee80211vap *,
166296341Sdelphij			    enum ieee80211_state, int);
167296341Sdelphijstatic void		rum_setup_tx_desc(struct rum_softc *,
168296341Sdelphij			    struct rum_tx_desc *, uint32_t, uint16_t, int,
169296341Sdelphij			    int);
170296341Sdelphijstatic int		rum_tx_mgt(struct rum_softc *, struct mbuf *,
171296341Sdelphij			    struct ieee80211_node *);
172296341Sdelphijstatic int		rum_tx_raw(struct rum_softc *, struct mbuf *,
173296341Sdelphij			    struct ieee80211_node *,
174296341Sdelphij			    const struct ieee80211_bpf_params *);
175296341Sdelphijstatic int		rum_tx_data(struct rum_softc *, struct mbuf *,
176296341Sdelphij			    struct ieee80211_node *);
177296341Sdelphijstatic void		rum_start(struct ifnet *);
178296341Sdelphijstatic int		rum_ioctl(struct ifnet *, u_long, caddr_t);
179296341Sdelphijstatic void		rum_eeprom_read(struct rum_softc *, uint16_t, void *,
180296341Sdelphij			    int);
181296341Sdelphijstatic uint32_t		rum_read(struct rum_softc *, uint16_t);
182296341Sdelphijstatic void		rum_read_multi(struct rum_softc *, uint16_t, void *,
183296341Sdelphij			    int);
184296341Sdelphijstatic usb2_error_t	rum_write(struct rum_softc *, uint16_t, uint32_t);
185296341Sdelphijstatic usb2_error_t	rum_write_multi(struct rum_softc *, uint16_t, void *,
186296341Sdelphij			    size_t);
187296341Sdelphijstatic void		rum_bbp_write(struct rum_softc *, uint8_t, uint8_t);
188296341Sdelphijstatic uint8_t		rum_bbp_read(struct rum_softc *, uint8_t);
189296341Sdelphijstatic void		rum_rf_write(struct rum_softc *, uint8_t, uint32_t);
190296341Sdelphijstatic void		rum_select_antenna(struct rum_softc *);
191296341Sdelphijstatic void		rum_enable_mrr(struct rum_softc *);
192296341Sdelphijstatic void		rum_set_txpreamble(struct rum_softc *);
193296341Sdelphijstatic void		rum_set_basicrates(struct rum_softc *);
194296341Sdelphijstatic void		rum_select_band(struct rum_softc *,
195296341Sdelphij			    struct ieee80211_channel *);
196296341Sdelphijstatic void		rum_set_chan(struct rum_softc *,
197296341Sdelphij			    struct ieee80211_channel *);
198296341Sdelphijstatic void		rum_enable_tsf_sync(struct rum_softc *);
199296341Sdelphijstatic void		rum_enable_tsf(struct rum_softc *);
200296341Sdelphijstatic void		rum_update_slot(struct ifnet *);
201296341Sdelphijstatic void		rum_set_bssid(struct rum_softc *, const uint8_t *);
202296341Sdelphijstatic void		rum_set_macaddr(struct rum_softc *, const uint8_t *);
203296341Sdelphijstatic void		rum_update_promisc(struct ifnet *);
204296341Sdelphijstatic void		rum_setpromisc(struct rum_softc *);
205296341Sdelphijstatic const char	*rum_get_rf(int);
206296341Sdelphijstatic void		rum_read_eeprom(struct rum_softc *);
207296341Sdelphijstatic int		rum_bbp_init(struct rum_softc *);
208296341Sdelphijstatic void		rum_init_locked(struct rum_softc *);
209296341Sdelphijstatic void		rum_init(void *);
210296341Sdelphijstatic void		rum_stop(struct rum_softc *);
211296341Sdelphijstatic void		rum_load_microcode(struct rum_softc *, const uint8_t *,
212296341Sdelphij			    size_t);
213296341Sdelphijstatic int		rum_prepare_beacon(struct rum_softc *,
214296341Sdelphij			    struct ieee80211vap *);
215296341Sdelphijstatic int		rum_raw_xmit(struct ieee80211_node *, struct mbuf *,
216296341Sdelphij			    const struct ieee80211_bpf_params *);
217296341Sdelphijstatic struct ieee80211_node *rum_node_alloc(struct ieee80211vap *,
218296341Sdelphij			    const uint8_t mac[IEEE80211_ADDR_LEN]);
219296341Sdelphijstatic void		rum_newassoc(struct ieee80211_node *, int);
220296341Sdelphijstatic void		rum_scan_start(struct ieee80211com *);
221296341Sdelphijstatic void		rum_scan_end(struct ieee80211com *);
222296341Sdelphijstatic void		rum_set_channel(struct ieee80211com *);
223296341Sdelphijstatic int		rum_get_rssi(struct rum_softc *, uint8_t);
224296341Sdelphijstatic void		rum_amrr_start(struct rum_softc *,
225296341Sdelphij			    struct ieee80211_node *);
226296341Sdelphijstatic void		rum_amrr_timeout(void *);
227296341Sdelphijstatic void		rum_amrr_task(void *, int);
228296341Sdelphijstatic int		rum_pause(struct rum_softc *, int);
229296341Sdelphij
230296341Sdelphijstatic const struct {
231296341Sdelphij	uint32_t	reg;
232296341Sdelphij	uint32_t	val;
233296341Sdelphij} rum_def_mac[] = {
234296341Sdelphij	{ RT2573_TXRX_CSR0,  0x025fb032 },
235296341Sdelphij	{ RT2573_TXRX_CSR1,  0x9eaa9eaf },
236296341Sdelphij	{ RT2573_TXRX_CSR2,  0x8a8b8c8d },
237296341Sdelphij	{ RT2573_TXRX_CSR3,  0x00858687 },
238296341Sdelphij	{ RT2573_TXRX_CSR7,  0x2e31353b },
239296341Sdelphij	{ RT2573_TXRX_CSR8,  0x2a2a2a2c },
240296341Sdelphij	{ RT2573_TXRX_CSR15, 0x0000000f },
241296341Sdelphij	{ RT2573_MAC_CSR6,   0x00000fff },
242296341Sdelphij	{ RT2573_MAC_CSR8,   0x016c030a },
243296341Sdelphij	{ RT2573_MAC_CSR10,  0x00000718 },
244296341Sdelphij	{ RT2573_MAC_CSR12,  0x00000004 },
245296341Sdelphij	{ RT2573_MAC_CSR13,  0x00007f00 },
246296341Sdelphij	{ RT2573_SEC_CSR0,   0x00000000 },
247296341Sdelphij	{ RT2573_SEC_CSR1,   0x00000000 },
248296341Sdelphij	{ RT2573_SEC_CSR5,   0x00000000 },
249296341Sdelphij	{ RT2573_PHY_CSR1,   0x000023b0 },
250296341Sdelphij	{ RT2573_PHY_CSR5,   0x00040a06 },
251296341Sdelphij	{ RT2573_PHY_CSR6,   0x00080606 },
252296341Sdelphij	{ RT2573_PHY_CSR7,   0x00000408 },
253296341Sdelphij	{ RT2573_AIFSN_CSR,  0x00002273 },
254296341Sdelphij	{ RT2573_CWMIN_CSR,  0x00002344 },
255296341Sdelphij	{ RT2573_CWMAX_CSR,  0x000034aa }
256296341Sdelphij};
257296341Sdelphij
258296341Sdelphijstatic const struct {
259296341Sdelphij	uint8_t	reg;
260296341Sdelphij	uint8_t	val;
261296341Sdelphij} rum_def_bbp[] = {
262296341Sdelphij	{   3, 0x80 },
263296341Sdelphij	{  15, 0x30 },
264296341Sdelphij	{  17, 0x20 },
265296341Sdelphij	{  21, 0xc8 },
266296341Sdelphij	{  22, 0x38 },
267296341Sdelphij	{  23, 0x06 },
268296341Sdelphij	{  24, 0xfe },
269296341Sdelphij	{  25, 0x0a },
270296341Sdelphij	{  26, 0x0d },
271296341Sdelphij	{  32, 0x0b },
272296341Sdelphij	{  34, 0x12 },
273296341Sdelphij	{  37, 0x07 },
274296341Sdelphij	{  39, 0xf8 },
275296341Sdelphij	{  41, 0x60 },
276296341Sdelphij	{  53, 0x10 },
277296341Sdelphij	{  54, 0x18 },
278296341Sdelphij	{  60, 0x10 },
279296341Sdelphij	{  61, 0x04 },
280296341Sdelphij	{  62, 0x04 },
281296341Sdelphij	{  75, 0xfe },
282296341Sdelphij	{  86, 0xfe },
283296341Sdelphij	{  88, 0xfe },
284296341Sdelphij	{  90, 0x0f },
285296341Sdelphij	{  99, 0x00 },
286296341Sdelphij	{ 102, 0x16 },
287296341Sdelphij	{ 107, 0x04 }
288296341Sdelphij};
289296341Sdelphij
290296341Sdelphijstatic const struct rfprog {
291296341Sdelphij	uint8_t		chan;
292296341Sdelphij	uint32_t	r1, r2, r3, r4;
293296341Sdelphij}  rum_rf5226[] = {
294296341Sdelphij	{   1, 0x00b03, 0x001e1, 0x1a014, 0x30282 },
295296341Sdelphij	{   2, 0x00b03, 0x001e1, 0x1a014, 0x30287 },
296296341Sdelphij	{   3, 0x00b03, 0x001e2, 0x1a014, 0x30282 },
297296341Sdelphij	{   4, 0x00b03, 0x001e2, 0x1a014, 0x30287 },
298296341Sdelphij	{   5, 0x00b03, 0x001e3, 0x1a014, 0x30282 },
299296341Sdelphij	{   6, 0x00b03, 0x001e3, 0x1a014, 0x30287 },
300296341Sdelphij	{   7, 0x00b03, 0x001e4, 0x1a014, 0x30282 },
301296341Sdelphij	{   8, 0x00b03, 0x001e4, 0x1a014, 0x30287 },
302296341Sdelphij	{   9, 0x00b03, 0x001e5, 0x1a014, 0x30282 },
303296341Sdelphij	{  10, 0x00b03, 0x001e5, 0x1a014, 0x30287 },
304296341Sdelphij	{  11, 0x00b03, 0x001e6, 0x1a014, 0x30282 },
305296341Sdelphij	{  12, 0x00b03, 0x001e6, 0x1a014, 0x30287 },
306296341Sdelphij	{  13, 0x00b03, 0x001e7, 0x1a014, 0x30282 },
307296341Sdelphij	{  14, 0x00b03, 0x001e8, 0x1a014, 0x30284 },
308296341Sdelphij
309296341Sdelphij	{  34, 0x00b03, 0x20266, 0x36014, 0x30282 },
310296341Sdelphij	{  38, 0x00b03, 0x20267, 0x36014, 0x30284 },
311296341Sdelphij	{  42, 0x00b03, 0x20268, 0x36014, 0x30286 },
312296341Sdelphij	{  46, 0x00b03, 0x20269, 0x36014, 0x30288 },
313296341Sdelphij
314296341Sdelphij	{  36, 0x00b03, 0x00266, 0x26014, 0x30288 },
315296341Sdelphij	{  40, 0x00b03, 0x00268, 0x26014, 0x30280 },
316296341Sdelphij	{  44, 0x00b03, 0x00269, 0x26014, 0x30282 },
317296341Sdelphij	{  48, 0x00b03, 0x0026a, 0x26014, 0x30284 },
318296341Sdelphij	{  52, 0x00b03, 0x0026b, 0x26014, 0x30286 },
319296341Sdelphij	{  56, 0x00b03, 0x0026c, 0x26014, 0x30288 },
320296341Sdelphij	{  60, 0x00b03, 0x0026e, 0x26014, 0x30280 },
321296341Sdelphij	{  64, 0x00b03, 0x0026f, 0x26014, 0x30282 },
322296341Sdelphij
323296341Sdelphij	{ 100, 0x00b03, 0x0028a, 0x2e014, 0x30280 },
324296341Sdelphij	{ 104, 0x00b03, 0x0028b, 0x2e014, 0x30282 },
325296341Sdelphij	{ 108, 0x00b03, 0x0028c, 0x2e014, 0x30284 },
326296341Sdelphij	{ 112, 0x00b03, 0x0028d, 0x2e014, 0x30286 },
327296341Sdelphij	{ 116, 0x00b03, 0x0028e, 0x2e014, 0x30288 },
328296341Sdelphij	{ 120, 0x00b03, 0x002a0, 0x2e014, 0x30280 },
329296341Sdelphij	{ 124, 0x00b03, 0x002a1, 0x2e014, 0x30282 },
330296341Sdelphij	{ 128, 0x00b03, 0x002a2, 0x2e014, 0x30284 },
331296341Sdelphij	{ 132, 0x00b03, 0x002a3, 0x2e014, 0x30286 },
332296341Sdelphij	{ 136, 0x00b03, 0x002a4, 0x2e014, 0x30288 },
333296341Sdelphij	{ 140, 0x00b03, 0x002a6, 0x2e014, 0x30280 },
334296341Sdelphij
335296341Sdelphij	{ 149, 0x00b03, 0x002a8, 0x2e014, 0x30287 },
336296341Sdelphij	{ 153, 0x00b03, 0x002a9, 0x2e014, 0x30289 },
337296341Sdelphij	{ 157, 0x00b03, 0x002ab, 0x2e014, 0x30281 },
338296341Sdelphij	{ 161, 0x00b03, 0x002ac, 0x2e014, 0x30283 },
339296341Sdelphij	{ 165, 0x00b03, 0x002ad, 0x2e014, 0x30285 }
340296341Sdelphij}, rum_rf5225[] = {
341296341Sdelphij	{   1, 0x00b33, 0x011e1, 0x1a014, 0x30282 },
342296341Sdelphij	{   2, 0x00b33, 0x011e1, 0x1a014, 0x30287 },
343296341Sdelphij	{   3, 0x00b33, 0x011e2, 0x1a014, 0x30282 },
344296341Sdelphij	{   4, 0x00b33, 0x011e2, 0x1a014, 0x30287 },
345296341Sdelphij	{   5, 0x00b33, 0x011e3, 0x1a014, 0x30282 },
346296341Sdelphij	{   6, 0x00b33, 0x011e3, 0x1a014, 0x30287 },
347296341Sdelphij	{   7, 0x00b33, 0x011e4, 0x1a014, 0x30282 },
348296341Sdelphij	{   8, 0x00b33, 0x011e4, 0x1a014, 0x30287 },
349296341Sdelphij	{   9, 0x00b33, 0x011e5, 0x1a014, 0x30282 },
350296341Sdelphij	{  10, 0x00b33, 0x011e5, 0x1a014, 0x30287 },
351296341Sdelphij	{  11, 0x00b33, 0x011e6, 0x1a014, 0x30282 },
352296341Sdelphij	{  12, 0x00b33, 0x011e6, 0x1a014, 0x30287 },
353296341Sdelphij	{  13, 0x00b33, 0x011e7, 0x1a014, 0x30282 },
354296341Sdelphij	{  14, 0x00b33, 0x011e8, 0x1a014, 0x30284 },
355296341Sdelphij
356296341Sdelphij	{  34, 0x00b33, 0x01266, 0x26014, 0x30282 },
357296341Sdelphij	{  38, 0x00b33, 0x01267, 0x26014, 0x30284 },
358296341Sdelphij	{  42, 0x00b33, 0x01268, 0x26014, 0x30286 },
359296341Sdelphij	{  46, 0x00b33, 0x01269, 0x26014, 0x30288 },
360296341Sdelphij
361296341Sdelphij	{  36, 0x00b33, 0x01266, 0x26014, 0x30288 },
362296341Sdelphij	{  40, 0x00b33, 0x01268, 0x26014, 0x30280 },
363296341Sdelphij	{  44, 0x00b33, 0x01269, 0x26014, 0x30282 },
364296341Sdelphij	{  48, 0x00b33, 0x0126a, 0x26014, 0x30284 },
365183234Ssimon	{  52, 0x00b33, 0x0126b, 0x26014, 0x30286 },
366296341Sdelphij	{  56, 0x00b33, 0x0126c, 0x26014, 0x30288 },
367296341Sdelphij	{  60, 0x00b33, 0x0126e, 0x26014, 0x30280 },
368296341Sdelphij	{  64, 0x00b33, 0x0126f, 0x26014, 0x30282 },
369296341Sdelphij
370296341Sdelphij	{ 100, 0x00b33, 0x0128a, 0x2e014, 0x30280 },
371296341Sdelphij	{ 104, 0x00b33, 0x0128b, 0x2e014, 0x30282 },
372296341Sdelphij	{ 108, 0x00b33, 0x0128c, 0x2e014, 0x30284 },
373296341Sdelphij	{ 112, 0x00b33, 0x0128d, 0x2e014, 0x30286 },
374296341Sdelphij	{ 116, 0x00b33, 0x0128e, 0x2e014, 0x30288 },
375296341Sdelphij	{ 120, 0x00b33, 0x012a0, 0x2e014, 0x30280 },
376296341Sdelphij	{ 124, 0x00b33, 0x012a1, 0x2e014, 0x30282 },
377296341Sdelphij	{ 128, 0x00b33, 0x012a2, 0x2e014, 0x30284 },
378296341Sdelphij	{ 132, 0x00b33, 0x012a3, 0x2e014, 0x30286 },
379296341Sdelphij	{ 136, 0x00b33, 0x012a4, 0x2e014, 0x30288 },
380296341Sdelphij	{ 140, 0x00b33, 0x012a6, 0x2e014, 0x30280 },
381296341Sdelphij
382296341Sdelphij	{ 149, 0x00b33, 0x012a8, 0x2e014, 0x30287 },
383296341Sdelphij	{ 153, 0x00b33, 0x012a9, 0x2e014, 0x30289 },
384296341Sdelphij	{ 157, 0x00b33, 0x012ab, 0x2e014, 0x30281 },
385296341Sdelphij	{ 161, 0x00b33, 0x012ac, 0x2e014, 0x30283 },
386296341Sdelphij	{ 165, 0x00b33, 0x012ad, 0x2e014, 0x30285 }
387296341Sdelphij};
388296341Sdelphij
389296341Sdelphijstatic const struct usb2_config rum_config[RUM_N_TRANSFER] = {
390296341Sdelphij	[RUM_BULK_WR] = {
391296341Sdelphij		.type = UE_BULK,
392296341Sdelphij		.endpoint = UE_ADDR_ANY,
393296341Sdelphij		.direction = UE_DIR_OUT,
394296341Sdelphij		.bufsize = (MCLBYTES + RT2573_TX_DESC_SIZE + 8),
395296341Sdelphij		.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
396296341Sdelphij		.callback = rum_bulk_write_callback,
397296341Sdelphij		.timeout = 5000,	/* ms */
398296341Sdelphij	},
399296341Sdelphij	[RUM_BULK_RD] = {
400296341Sdelphij		.type = UE_BULK,
401296341Sdelphij		.endpoint = UE_ADDR_ANY,
402296341Sdelphij		.direction = UE_DIR_IN,
403296341Sdelphij		.bufsize = (MCLBYTES + RT2573_RX_DESC_SIZE),
404296341Sdelphij		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
405296341Sdelphij		.callback = rum_bulk_read_callback,
406296341Sdelphij	},
407296341Sdelphij};
408296341Sdelphij
409296341Sdelphijstatic int
410296341Sdelphijrum_match(device_t self)
411296341Sdelphij{
412296341Sdelphij	struct usb2_attach_arg *uaa = device_get_ivars(self);
413296341Sdelphij
414296341Sdelphij	if (uaa->usb2_mode != USB_MODE_HOST)
415296341Sdelphij		return (ENXIO);
416296341Sdelphij	if (uaa->info.bConfigIndex != 0)
417296341Sdelphij		return (ENXIO);
418296341Sdelphij	if (uaa->info.bIfaceIndex != RT2573_IFACE_INDEX)
419296341Sdelphij		return (ENXIO);
420296341Sdelphij
421296341Sdelphij	return (usb2_lookup_id_by_uaa(rum_devs, sizeof(rum_devs), uaa));
422296341Sdelphij}
423296341Sdelphij
424296341Sdelphijstatic int
425296341Sdelphijrum_attach(device_t self)
426296341Sdelphij{
427296341Sdelphij	struct usb2_attach_arg *uaa = device_get_ivars(self);
428296341Sdelphij	struct rum_softc *sc = device_get_softc(self);
429296341Sdelphij	struct ieee80211com *ic;
430296341Sdelphij	struct ifnet *ifp;
431296341Sdelphij	uint8_t iface_index, bands;
432296341Sdelphij	uint32_t tmp;
433296341Sdelphij	int error, ntries;
434296341Sdelphij
435296341Sdelphij	device_set_usb2_desc(self);
436296341Sdelphij	sc->sc_udev = uaa->device;
437296341Sdelphij	sc->sc_dev = self;
438296341Sdelphij
439296341Sdelphij	mtx_init(&sc->sc_mtx, device_get_nameunit(self),
440296341Sdelphij	    MTX_NETWORK_LOCK, MTX_DEF);
441296341Sdelphij
442296341Sdelphij	iface_index = RT2573_IFACE_INDEX;
443296341Sdelphij	error = usb2_transfer_setup(uaa->device, &iface_index,
444296341Sdelphij	    sc->sc_xfer, rum_config, RUM_N_TRANSFER, sc, &sc->sc_mtx);
445296341Sdelphij	if (error) {
446296341Sdelphij		device_printf(self, "could not allocate USB transfers, "
447296341Sdelphij		    "err=%s\n", usb2_errstr(error));
448296341Sdelphij		goto detach;
449296341Sdelphij	}
450296341Sdelphij
451296341Sdelphij	RUM_LOCK(sc);
452296341Sdelphij	/* retrieve RT2573 rev. no */
453296341Sdelphij	for (ntries = 0; ntries < 100; ntries++) {
454296341Sdelphij		if ((tmp = rum_read(sc, RT2573_MAC_CSR0)) != 0)
455296341Sdelphij			break;
456296341Sdelphij		if (rum_pause(sc, hz / 100))
457296341Sdelphij			break;
458183234Ssimon	}
459296341Sdelphij	if (ntries == 100) {
460296341Sdelphij		device_printf(sc->sc_dev, "timeout waiting for chip to settle\n");
461296341Sdelphij		RUM_UNLOCK(sc);
462296341Sdelphij		goto detach;
463183234Ssimon	}
464296341Sdelphij
465296341Sdelphij	/* retrieve MAC address and various other things from EEPROM */
466296341Sdelphij	rum_read_eeprom(sc);
467296341Sdelphij
468296341Sdelphij	device_printf(sc->sc_dev, "MAC/BBP RT2573 (rev 0x%05x), RF %s\n",
469296341Sdelphij	    tmp, rum_get_rf(sc->rf_rev));
470296341Sdelphij
471296341Sdelphij	rum_load_microcode(sc, rt2573_ucode, sizeof(rt2573_ucode));
472183234Ssimon	RUM_UNLOCK(sc);
473296341Sdelphij
474296341Sdelphij	ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
475296341Sdelphij	if (ifp == NULL) {
476296341Sdelphij		device_printf(sc->sc_dev, "can not if_alloc()\n");
477296341Sdelphij		goto detach;
478296341Sdelphij	}
479296341Sdelphij	ic = ifp->if_l2com;
480296341Sdelphij
481296341Sdelphij	ifp->if_softc = sc;
482296341Sdelphij	if_initname(ifp, "rum", device_get_unit(sc->sc_dev));
483296341Sdelphij	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
484296341Sdelphij	ifp->if_init = rum_init;
485296341Sdelphij	ifp->if_ioctl = rum_ioctl;
486296341Sdelphij	ifp->if_start = rum_start;
487296341Sdelphij	IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
488296341Sdelphij	ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
489296341Sdelphij	IFQ_SET_READY(&ifp->if_snd);
490296341Sdelphij
491296341Sdelphij	ic->ic_ifp = ifp;
492296341Sdelphij	ic->ic_phytype = IEEE80211_T_OFDM;	/* not only, but not used */
493296341Sdelphij
494296341Sdelphij	/* set device capabilities */
495296341Sdelphij	ic->ic_caps =
496296341Sdelphij	      IEEE80211_C_STA		/* station mode supported */
497183234Ssimon	    | IEEE80211_C_IBSS		/* IBSS mode supported */
498296341Sdelphij	    | IEEE80211_C_MONITOR	/* monitor mode supported */
499296341Sdelphij	    | IEEE80211_C_HOSTAP	/* HostAp mode supported */
500296341Sdelphij	    | IEEE80211_C_TXPMGT	/* tx power management */
501296341Sdelphij	    | IEEE80211_C_SHPREAMBLE	/* short preamble supported */
502296341Sdelphij	    | IEEE80211_C_SHSLOT	/* short slot time supported */
503296341Sdelphij	    | IEEE80211_C_BGSCAN	/* bg scanning supported */
504296341Sdelphij	    | IEEE80211_C_WPA		/* 802.11i */
505296341Sdelphij	    ;
506296341Sdelphij
507296341Sdelphij	bands = 0;
508296341Sdelphij	setbit(&bands, IEEE80211_MODE_11B);
509296341Sdelphij	setbit(&bands, IEEE80211_MODE_11G);
510296341Sdelphij	if (sc->rf_rev == RT2573_RF_5225 || sc->rf_rev == RT2573_RF_5226)
511296341Sdelphij		setbit(&bands, IEEE80211_MODE_11A);
512183234Ssimon	ieee80211_init_channels(ic, NULL, &bands);
513296341Sdelphij
514296341Sdelphij	ieee80211_ifattach(ic, sc->sc_bssid);
515296341Sdelphij	ic->ic_update_promisc = rum_update_promisc;
516296341Sdelphij	ic->ic_newassoc = rum_newassoc;
517296341Sdelphij	ic->ic_raw_xmit = rum_raw_xmit;
518296341Sdelphij	ic->ic_node_alloc = rum_node_alloc;
519296341Sdelphij	ic->ic_scan_start = rum_scan_start;
520296341Sdelphij	ic->ic_scan_end = rum_scan_end;
521296341Sdelphij	ic->ic_set_channel = rum_set_channel;
522296341Sdelphij
523296341Sdelphij	ic->ic_vap_create = rum_vap_create;
524296341Sdelphij	ic->ic_vap_delete = rum_vap_delete;
525296341Sdelphij
526296341Sdelphij	ieee80211_radiotap_attach(ic,
527296341Sdelphij	    &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
528296341Sdelphij		RT2573_TX_RADIOTAP_PRESENT,
529296341Sdelphij	    &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
530296341Sdelphij		RT2573_RX_RADIOTAP_PRESENT);
531296341Sdelphij
532296341Sdelphij	if (bootverbose)
533296341Sdelphij		ieee80211_announce(ic);
534296341Sdelphij
535296341Sdelphij	return (0);
536296341Sdelphij
537296341Sdelphijdetach:
538296341Sdelphij	rum_detach(self);
539296341Sdelphij	return (ENXIO);			/* failure */
540296341Sdelphij}
541296341Sdelphij
542296341Sdelphijstatic int
543296341Sdelphijrum_detach(device_t self)
544296341Sdelphij{
545296341Sdelphij	struct rum_softc *sc = device_get_softc(self);
546296341Sdelphij	struct ifnet *ifp = sc->sc_ifp;
547296341Sdelphij	struct ieee80211com *ic;
548296341Sdelphij
549296341Sdelphij	/* stop all USB transfers */
550296341Sdelphij	usb2_transfer_unsetup(sc->sc_xfer, RUM_N_TRANSFER);
551296341Sdelphij
552296341Sdelphij	/* free TX list, if any */
553296341Sdelphij	RUM_LOCK(sc);
554296341Sdelphij	rum_unsetup_tx_list(sc);
555296341Sdelphij	RUM_UNLOCK(sc);
556296341Sdelphij
557296341Sdelphij	if (ifp) {
558296341Sdelphij		ic = ifp->if_l2com;
559296341Sdelphij		ieee80211_ifdetach(ic);
560296341Sdelphij		if_free(ifp);
561296341Sdelphij	}
562296341Sdelphij	mtx_destroy(&sc->sc_mtx);
563296341Sdelphij
564296341Sdelphij	return (0);
565296341Sdelphij}
566296341Sdelphij
567296341Sdelphijstatic usb2_error_t
568296341Sdelphijrum_do_request(struct rum_softc *sc,
569296341Sdelphij    struct usb2_device_request *req, void *data)
570296341Sdelphij{
571296341Sdelphij	usb2_error_t err;
572296341Sdelphij	int ntries = 10;
573296341Sdelphij
574296341Sdelphij	while (ntries--) {
575296341Sdelphij		err = usb2_do_request_flags(sc->sc_udev, &sc->sc_mtx,
576296341Sdelphij		    req, data, 0, NULL, 250 /* ms */);
577296341Sdelphij		if (err == 0)
578296341Sdelphij			break;
579296341Sdelphij
580296341Sdelphij		DPRINTFN(1, "Control request failed, %s (retrying)\n",
581296341Sdelphij		    usb2_errstr(err));
582296341Sdelphij		if (rum_pause(sc, hz / 100))
583296341Sdelphij			break;
584296341Sdelphij	}
585296341Sdelphij	return (err);
586296341Sdelphij}
587296341Sdelphij
588296341Sdelphijstatic struct ieee80211vap *
589296341Sdelphijrum_vap_create(struct ieee80211com *ic,
590296341Sdelphij	const char name[IFNAMSIZ], int unit, int opmode, int flags,
591296341Sdelphij	const uint8_t bssid[IEEE80211_ADDR_LEN],
592296341Sdelphij	const uint8_t mac[IEEE80211_ADDR_LEN])
593296341Sdelphij{
594296341Sdelphij	struct rum_softc *sc = ic->ic_ifp->if_softc;
595296341Sdelphij	struct rum_vap *rvp;
596296341Sdelphij	struct ieee80211vap *vap;
597296341Sdelphij
598296341Sdelphij	if (!TAILQ_EMPTY(&ic->ic_vaps))		/* only one at a time */
599296341Sdelphij		return NULL;
600296341Sdelphij	rvp = (struct rum_vap *) malloc(sizeof(struct rum_vap),
601296341Sdelphij	    M_80211_VAP, M_NOWAIT | M_ZERO);
602296341Sdelphij	if (rvp == NULL)
603296341Sdelphij		return NULL;
604296341Sdelphij	vap = &rvp->vap;
605296341Sdelphij	/* enable s/w bmiss handling for sta mode */
606183234Ssimon	ieee80211_vap_setup(ic, vap, name, unit, opmode,
607296341Sdelphij	    flags | IEEE80211_CLONE_NOBEACONS, bssid, mac);
608296341Sdelphij
609296341Sdelphij	/* override state transition machine */
610296341Sdelphij	rvp->newstate = vap->iv_newstate;
611183234Ssimon	vap->iv_newstate = rum_newstate;
612296341Sdelphij
613296341Sdelphij	usb2_callout_init_mtx(&rvp->amrr_ch, &sc->sc_mtx, 0);
614296341Sdelphij	TASK_INIT(&rvp->amrr_task, 0, rum_amrr_task, rvp);
615296341Sdelphij	ieee80211_amrr_init(&rvp->amrr, vap,
616296341Sdelphij	    IEEE80211_AMRR_MIN_SUCCESS_THRESHOLD,
617296341Sdelphij	    IEEE80211_AMRR_MAX_SUCCESS_THRESHOLD,
618183234Ssimon	    1000 /* 1 sec */);
619296341Sdelphij
620183234Ssimon	/* complete setup */
621296341Sdelphij	ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status);
622296341Sdelphij	ic->ic_opmode = opmode;
623183234Ssimon	return vap;
624296341Sdelphij}
625296341Sdelphij
626296341Sdelphijstatic void
627296341Sdelphijrum_vap_delete(struct ieee80211vap *vap)
628296341Sdelphij{
629296341Sdelphij	struct rum_vap *rvp = RUM_VAP(vap);
630296341Sdelphij	struct ieee80211com *ic = vap->iv_ic;
631183234Ssimon
632296341Sdelphij	usb2_callout_drain(&rvp->amrr_ch);
633296341Sdelphij	ieee80211_draintask(ic, &rvp->amrr_task);
634296341Sdelphij	ieee80211_amrr_cleanup(&rvp->amrr);
635296341Sdelphij	ieee80211_vap_detach(vap);
636296341Sdelphij	free(rvp, M_80211_VAP);
637296341Sdelphij}
638296341Sdelphij
639183234Ssimonstatic void
640296341Sdelphijrum_tx_free(struct rum_tx_data *data, int txerr)
641296341Sdelphij{
642296341Sdelphij	struct rum_softc *sc = data->sc;
643296341Sdelphij
644296341Sdelphij	if (data->m != NULL) {
645296341Sdelphij		if (data->m->m_flags & M_TXCB)
646296341Sdelphij			ieee80211_process_callback(data->ni, data->m,
647296341Sdelphij			    txerr ? ETIMEDOUT : 0);
648296341Sdelphij		m_freem(data->m);
649183234Ssimon		data->m = NULL;
650296341Sdelphij
651296341Sdelphij		ieee80211_free_node(data->ni);
652296341Sdelphij		data->ni = NULL;
653296341Sdelphij	}
654183234Ssimon	STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
655296341Sdelphij	sc->tx_nfree++;
656296341Sdelphij}
657296341Sdelphij
658296341Sdelphijstatic void
659296341Sdelphijrum_setup_tx_list(struct rum_softc *sc)
660296341Sdelphij{
661296341Sdelphij	struct rum_tx_data *data;
662296341Sdelphij	int i;
663296341Sdelphij
664296341Sdelphij	sc->tx_nfree = 0;
665296341Sdelphij	STAILQ_INIT(&sc->tx_q);
666183234Ssimon	STAILQ_INIT(&sc->tx_free);
667296341Sdelphij
668296341Sdelphij	for (i = 0; i < RUM_TX_LIST_COUNT; i++) {
669296341Sdelphij		data = &sc->tx_data[i];
670296341Sdelphij
671296341Sdelphij		data->sc = sc;
672296341Sdelphij		STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
673296341Sdelphij		sc->tx_nfree++;
674183234Ssimon	}
675296341Sdelphij}
676296341Sdelphij
677296341Sdelphijstatic void
678296341Sdelphijrum_unsetup_tx_list(struct rum_softc *sc)
679296341Sdelphij{
680296341Sdelphij	struct rum_tx_data *data;
681296341Sdelphij	int i;
682183234Ssimon
683296341Sdelphij	/* make sure any subsequent use of the queues will fail */
684296341Sdelphij	sc->tx_nfree = 0;
685296341Sdelphij	STAILQ_INIT(&sc->tx_q);
686296341Sdelphij	STAILQ_INIT(&sc->tx_free);
687296341Sdelphij
688296341Sdelphij	/* free up all node references and mbufs */
689296341Sdelphij	for (i = 0; i < RUM_TX_LIST_COUNT; i++) {
690183234Ssimon		data = &sc->tx_data[i];
691296341Sdelphij
692296341Sdelphij		if (data->m != NULL) {
693296341Sdelphij			m_freem(data->m);
694296341Sdelphij			data->m = NULL;
695296341Sdelphij		}
696296341Sdelphij		if (data->ni != NULL) {
697296341Sdelphij			ieee80211_free_node(data->ni);
698296341Sdelphij			data->ni = NULL;
699183234Ssimon		}
700296341Sdelphij	}
701296341Sdelphij}
702296341Sdelphij
703296341Sdelphijstatic int
704296341Sdelphijrum_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
705296341Sdelphij{
706183234Ssimon	struct rum_vap *rvp = RUM_VAP(vap);
707296341Sdelphij	struct ieee80211com *ic = vap->iv_ic;
708296341Sdelphij	struct rum_softc *sc = ic->ic_ifp->if_softc;
709296341Sdelphij	const struct ieee80211_txparam *tp;
710296341Sdelphij	enum ieee80211_state ostate;
711296341Sdelphij	struct ieee80211_node *ni;
712296341Sdelphij	uint32_t tmp;
713296341Sdelphij
714183234Ssimon	ostate = vap->iv_state;
715296341Sdelphij	DPRINTF("%s -> %s\n",
716296341Sdelphij		ieee80211_state_name[ostate],
717296341Sdelphij		ieee80211_state_name[nstate]);
718296341Sdelphij
719296341Sdelphij	IEEE80211_UNLOCK(ic);
720296341Sdelphij	RUM_LOCK(sc);
721296341Sdelphij	usb2_callout_stop(&rvp->amrr_ch);
722296341Sdelphij
723296341Sdelphij	switch (nstate) {
724296341Sdelphij	case IEEE80211_S_INIT:
725296341Sdelphij		if (ostate == IEEE80211_S_RUN) {
726183234Ssimon			/* abort TSF synchronization */
727296341Sdelphij			tmp = rum_read(sc, RT2573_TXRX_CSR9);
728296341Sdelphij			rum_write(sc, RT2573_TXRX_CSR9, tmp & ~0x00ffffff);
729296341Sdelphij		}
730296341Sdelphij		break;
731296341Sdelphij
732296341Sdelphij	case IEEE80211_S_RUN:
733296341Sdelphij		ni = vap->iv_bss;
734296341Sdelphij
735296341Sdelphij		if (vap->iv_opmode != IEEE80211_M_MONITOR) {
736296341Sdelphij			rum_update_slot(ic->ic_ifp);
737296341Sdelphij			rum_enable_mrr(sc);
738296341Sdelphij			rum_set_txpreamble(sc);
739296341Sdelphij			rum_set_basicrates(sc);
740296341Sdelphij			IEEE80211_ADDR_COPY(sc->sc_bssid, ni->ni_bssid);
741296341Sdelphij			rum_set_bssid(sc, sc->sc_bssid);
742296341Sdelphij		}
743296341Sdelphij
744296341Sdelphij		if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
745296341Sdelphij		    vap->iv_opmode == IEEE80211_M_IBSS)
746296341Sdelphij			rum_prepare_beacon(sc, vap);
747296341Sdelphij
748296341Sdelphij		if (vap->iv_opmode != IEEE80211_M_MONITOR)
749296341Sdelphij			rum_enable_tsf_sync(sc);
750183234Ssimon		else
751296341Sdelphij			rum_enable_tsf(sc);
752296341Sdelphij
753296341Sdelphij		/* enable automatic rate adaptation */
754296341Sdelphij		tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
755296341Sdelphij		if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE)
756296341Sdelphij			rum_amrr_start(sc, ni);
757183234Ssimon		break;
758296341Sdelphij	default:
759296341Sdelphij		break;
760296341Sdelphij	}
761296341Sdelphij	RUM_UNLOCK(sc);
762296341Sdelphij	IEEE80211_LOCK(ic);
763296341Sdelphij	return (rvp->newstate(vap, nstate, arg));
764296341Sdelphij}
765296341Sdelphij
766296341Sdelphijstatic void
767296341Sdelphijrum_bulk_write_callback(struct usb2_xfer *xfer)
768183234Ssimon{
769296341Sdelphij	struct rum_softc *sc = xfer->priv_sc;
770296341Sdelphij	struct ifnet *ifp = sc->sc_ifp;
771296341Sdelphij	struct ieee80211vap *vap;
772296341Sdelphij	struct rum_tx_data *data;
773296341Sdelphij	struct mbuf *m;
774183234Ssimon	unsigned int len;
775296341Sdelphij
776296341Sdelphij	switch (USB_GET_STATE(xfer)) {
777296341Sdelphij	case USB_ST_TRANSFERRED:
778296341Sdelphij		DPRINTFN(11, "transfer complete, %d bytes\n", xfer->actlen);
779296341Sdelphij
780296341Sdelphij		/* free resources */
781296341Sdelphij		data = xfer->priv_fifo;
782296341Sdelphij		rum_tx_free(data, 0);
783296341Sdelphij		xfer->priv_fifo = NULL;
784296341Sdelphij
785296341Sdelphij		ifp->if_opackets++;
786296341Sdelphij		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
787296341Sdelphij
788296341Sdelphij		/* FALLTHROUGH */
789183234Ssimon	case USB_ST_SETUP:
790296341Sdelphijtr_setup:
791296341Sdelphij		data = STAILQ_FIRST(&sc->tx_q);
792296341Sdelphij		if (data) {
793296341Sdelphij			STAILQ_REMOVE_HEAD(&sc->tx_q, next);
794296341Sdelphij			m = data->m;
795296341Sdelphij
796296341Sdelphij			if (m->m_pkthdr.len > (MCLBYTES + RT2573_TX_DESC_SIZE)) {
797183234Ssimon				DPRINTFN(0, "data overflow, %u bytes\n",
798296341Sdelphij				    m->m_pkthdr.len);
799183234Ssimon				m->m_pkthdr.len = (MCLBYTES + RT2573_TX_DESC_SIZE);
800296341Sdelphij			}
801296341Sdelphij			usb2_copy_in(xfer->frbuffers, 0, &data->desc,
802296341Sdelphij			    RT2573_TX_DESC_SIZE);
803296341Sdelphij			usb2_m_copy_in(xfer->frbuffers, RT2573_TX_DESC_SIZE, m,
804296341Sdelphij			    0, m->m_pkthdr.len);
805296341Sdelphij
806296341Sdelphij			vap = data->ni->ni_vap;
807296341Sdelphij			if (ieee80211_radiotap_active_vap(vap)) {
808296341Sdelphij				struct rum_tx_radiotap_header *tap = &sc->sc_txtap;
809296341Sdelphij
810296341Sdelphij				tap->wt_flags = 0;
811296341Sdelphij				tap->wt_rate = data->rate;
812296341Sdelphij				tap->wt_antenna = sc->tx_ant;
813296341Sdelphij
814296341Sdelphij				ieee80211_radiotap_tx(vap, m);
815296341Sdelphij			}
816296341Sdelphij
817296341Sdelphij			/* align end on a 4-bytes boundary */
818296341Sdelphij			len = (RT2573_TX_DESC_SIZE + m->m_pkthdr.len + 3) & ~3;
819296341Sdelphij			if ((len % 64) == 0)
820296341Sdelphij				len += 4;
821296341Sdelphij
822296341Sdelphij			DPRINTFN(11, "sending frame len=%u xferlen=%u\n",
823296341Sdelphij			    m->m_pkthdr.len, len);
824296341Sdelphij
825296341Sdelphij			xfer->frlengths[0] = len;
826296341Sdelphij			xfer->priv_fifo = data;
827296341Sdelphij
828296341Sdelphij			usb2_start_hardware(xfer);
829296341Sdelphij		}
830296341Sdelphij		break;
831296341Sdelphij
832296341Sdelphij	default:			/* Error */
833296341Sdelphij		DPRINTFN(11, "transfer error, %s\n",
834296341Sdelphij		    usb2_errstr(xfer->error));
835296341Sdelphij
836296341Sdelphij		ifp->if_oerrors++;
837296341Sdelphij		data = xfer->priv_fifo;
838183234Ssimon		if (data != NULL) {
839296341Sdelphij			rum_tx_free(data, xfer->error);
840296341Sdelphij			xfer->priv_fifo = NULL;
841296341Sdelphij		}
842296341Sdelphij
843296341Sdelphij		if (xfer->error == USB_ERR_STALLED) {
844296341Sdelphij			/* try to clear stall first */
845296341Sdelphij			xfer->flags.stall_pipe = 1;
846296341Sdelphij			goto tr_setup;
847296341Sdelphij		}
848296341Sdelphij		if (xfer->error == USB_ERR_TIMEOUT)
849296341Sdelphij			device_printf(sc->sc_dev, "device timeout\n");
850296341Sdelphij		break;
851296341Sdelphij	}
852296341Sdelphij}
853296341Sdelphij
854296341Sdelphijstatic void
855296341Sdelphijrum_bulk_read_callback(struct usb2_xfer *xfer)
856296341Sdelphij{
857296341Sdelphij	struct rum_softc *sc = xfer->priv_sc;
858296341Sdelphij	struct ifnet *ifp = sc->sc_ifp;
859183234Ssimon	struct ieee80211com *ic = ifp->if_l2com;
860296341Sdelphij	struct ieee80211_node *ni;
861296341Sdelphij	struct mbuf *m = NULL;
862296341Sdelphij	uint32_t flags;
863296341Sdelphij	uint8_t rssi = 0;
864296341Sdelphij	unsigned int len;
865296341Sdelphij
866296341Sdelphij	switch (USB_GET_STATE(xfer)) {
867296341Sdelphij	case USB_ST_TRANSFERRED:
868296341Sdelphij
869296341Sdelphij		DPRINTFN(15, "rx done, actlen=%d\n", xfer->actlen);
870183234Ssimon
871296341Sdelphij		len = xfer->actlen;
872296341Sdelphij		if (len < RT2573_RX_DESC_SIZE + IEEE80211_MIN_LEN) {
873296341Sdelphij			DPRINTF("%s: xfer too short %d\n",
874296341Sdelphij			    device_get_nameunit(sc->sc_dev), len);
875296341Sdelphij			ifp->if_ierrors++;
876296341Sdelphij			goto tr_setup;
877296341Sdelphij		}
878296341Sdelphij
879296341Sdelphij		len -= RT2573_RX_DESC_SIZE;
880296341Sdelphij		usb2_copy_out(xfer->frbuffers, 0, &sc->sc_rx_desc,
881296341Sdelphij		    RT2573_RX_DESC_SIZE);
882296341Sdelphij
883296341Sdelphij		rssi = rum_get_rssi(sc, sc->sc_rx_desc.rssi);
884296341Sdelphij		flags = le32toh(sc->sc_rx_desc.flags);
885296341Sdelphij		if (flags & RT2573_RX_CRC_ERROR) {
886296341Sdelphij			/*
887296341Sdelphij		         * This should not happen since we did not
888296341Sdelphij		         * request to receive those frames when we
889296341Sdelphij		         * filled RUM_TXRX_CSR2:
890296341Sdelphij		         */
891296341Sdelphij			DPRINTFN(5, "PHY or CRC error\n");
892296341Sdelphij			ifp->if_ierrors++;
893296341Sdelphij			goto tr_setup;
894296341Sdelphij		}
895296341Sdelphij
896296341Sdelphij		m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
897296341Sdelphij		if (m == NULL) {
898296341Sdelphij			DPRINTF("could not allocate mbuf\n");
899296341Sdelphij			ifp->if_ierrors++;
900296341Sdelphij			goto tr_setup;
901296341Sdelphij		}
902296341Sdelphij		usb2_copy_out(xfer->frbuffers, RT2573_RX_DESC_SIZE,
903296341Sdelphij		    mtod(m, uint8_t *), len);
904296341Sdelphij
905296341Sdelphij		/* finalize mbuf */
906296341Sdelphij		m->m_pkthdr.rcvif = ifp;
907296341Sdelphij		m->m_pkthdr.len = m->m_len = (flags >> 16) & 0xfff;
908296341Sdelphij
909183234Ssimon		if (ieee80211_radiotap_active(ic)) {
910296341Sdelphij			struct rum_rx_radiotap_header *tap = &sc->sc_rxtap;
911296341Sdelphij
912296341Sdelphij			/* XXX read tsf */
913296341Sdelphij			tap->wr_flags = 0;
914183234Ssimon			tap->wr_rate = ieee80211_plcp2rate(sc->sc_rx_desc.rate,
915296341Sdelphij			    (flags & RT2573_RX_OFDM) ?
916296341Sdelphij			    IEEE80211_T_OFDM : IEEE80211_T_CCK);
917296341Sdelphij			tap->wr_antsignal = RT2573_NOISE_FLOOR + rssi;
918296341Sdelphij			tap->wr_antnoise = RT2573_NOISE_FLOOR;
919183234Ssimon			tap->wr_antenna = sc->rx_ant;
920296341Sdelphij		}
921296341Sdelphij		/* FALLTHROUGH */
922296341Sdelphij	case USB_ST_SETUP:
923296341Sdelphijtr_setup:
924296341Sdelphij		xfer->frlengths[0] = xfer->max_data_length;
925296341Sdelphij		usb2_start_hardware(xfer);
926296341Sdelphij
927296341Sdelphij		/*
928183234Ssimon		 * At the end of a USB callback it is always safe to unlock
929296341Sdelphij		 * the private mutex of a device! That is why we do the
930296341Sdelphij		 * "ieee80211_input" here, and not some lines up!
931296341Sdelphij		 */
932296341Sdelphij		if (m) {
933296341Sdelphij			RUM_UNLOCK(sc);
934296341Sdelphij			ni = ieee80211_find_rxnode(ic,
935183234Ssimon			    mtod(m, struct ieee80211_frame_min *));
936296341Sdelphij			if (ni != NULL) {
937296341Sdelphij				(void) ieee80211_input(ni, m, rssi,
938296341Sdelphij				    RT2573_NOISE_FLOOR);
939296341Sdelphij				ieee80211_free_node(ni);
940296341Sdelphij			} else
941296341Sdelphij				(void) ieee80211_input_all(ic, m, rssi,
942238405Sjkim				    RT2573_NOISE_FLOOR);
943296341Sdelphij			RUM_LOCK(sc);
944296341Sdelphij		}
945296341Sdelphij		return;
946296341Sdelphij
947296341Sdelphij	default:			/* Error */
948296341Sdelphij		if (xfer->error != USB_ERR_CANCELLED) {
949296341Sdelphij			/* try to clear stall first */
950296341Sdelphij			xfer->flags.stall_pipe = 1;
951296341Sdelphij			goto tr_setup;
952296341Sdelphij		}
953296341Sdelphij		return;
954296341Sdelphij	}
955296341Sdelphij}
956296341Sdelphij
957296341Sdelphijstatic uint8_t
958296341Sdelphijrum_plcp_signal(int rate)
959296341Sdelphij{
960296341Sdelphij	switch (rate) {
961296341Sdelphij	/* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
962296341Sdelphij	case 12:	return 0xb;
963296341Sdelphij	case 18:	return 0xf;
964296341Sdelphij	case 24:	return 0xa;
965296341Sdelphij	case 36:	return 0xe;
966296341Sdelphij	case 48:	return 0x9;
967296341Sdelphij	case 72:	return 0xd;
968296341Sdelphij	case 96:	return 0x8;
969296341Sdelphij	case 108:	return 0xc;
970296341Sdelphij
971296341Sdelphij	/* CCK rates (NB: not IEEE std, device-specific) */
972296341Sdelphij	case 2:		return 0x0;
973296341Sdelphij	case 4:		return 0x1;
974296341Sdelphij	case 11:	return 0x2;
975296341Sdelphij	case 22:	return 0x3;
976296341Sdelphij	}
977296341Sdelphij	return 0xff;		/* XXX unsupported/unknown rate */
978296341Sdelphij}
979296341Sdelphij
980296341Sdelphijstatic void
981296341Sdelphijrum_setup_tx_desc(struct rum_softc *sc, struct rum_tx_desc *desc,
982296341Sdelphij    uint32_t flags, uint16_t xflags, int len, int rate)
983296341Sdelphij{
984296341Sdelphij	struct ifnet *ifp = sc->sc_ifp;
985296341Sdelphij	struct ieee80211com *ic = ifp->if_l2com;
986296341Sdelphij	uint16_t plcp_length;
987296341Sdelphij	int remainder;
988296341Sdelphij
989296341Sdelphij	desc->flags = htole32(flags);
990296341Sdelphij	desc->flags |= htole32(RT2573_TX_VALID);
991296341Sdelphij	desc->flags |= htole32(len << 16);
992296341Sdelphij
993296341Sdelphij	desc->xflags = htole16(xflags);
994296341Sdelphij
995296341Sdelphij	desc->wme = htole16(RT2573_QID(0) | RT2573_AIFSN(2) |
996296341Sdelphij	    RT2573_LOGCWMIN(4) | RT2573_LOGCWMAX(10));
997296341Sdelphij
998296341Sdelphij	/* setup PLCP fields */
999296341Sdelphij	desc->plcp_signal  = rum_plcp_signal(rate);
1000296341Sdelphij	desc->plcp_service = 4;
1001296341Sdelphij
1002296341Sdelphij	len += IEEE80211_CRC_LEN;
1003296341Sdelphij	if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1004296341Sdelphij		desc->flags |= htole32(RT2573_TX_OFDM);
1005296341Sdelphij
1006296341Sdelphij		plcp_length = len & 0xfff;
1007296341Sdelphij		desc->plcp_length_hi = plcp_length >> 6;
1008296341Sdelphij		desc->plcp_length_lo = plcp_length & 0x3f;
1009296341Sdelphij	} else {
1010296341Sdelphij		plcp_length = (16 * len + rate - 1) / rate;
1011296341Sdelphij		if (rate == 22) {
1012296341Sdelphij			remainder = (16 * len) % 22;
1013296341Sdelphij			if (remainder != 0 && remainder < 7)
1014296341Sdelphij				desc->plcp_service |= RT2573_PLCP_LENGEXT;
1015296341Sdelphij		}
1016296341Sdelphij		desc->plcp_length_hi = plcp_length >> 8;
1017296341Sdelphij		desc->plcp_length_lo = plcp_length & 0xff;
1018296341Sdelphij
1019296341Sdelphij		if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1020296341Sdelphij			desc->plcp_signal |= 0x08;
1021296341Sdelphij	}
1022296341Sdelphij}
1023296341Sdelphij
1024296341Sdelphijstatic int
1025296341Sdelphijrum_sendprot(struct rum_softc *sc,
1026296341Sdelphij    const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1027296341Sdelphij{
1028296341Sdelphij	struct ieee80211com *ic = ni->ni_ic;
1029296341Sdelphij	const struct ieee80211_frame *wh;
1030296341Sdelphij	struct rum_tx_data *data;
1031296341Sdelphij	struct mbuf *mprot;
1032296341Sdelphij	int protrate, ackrate, pktlen, flags, isshort;
1033296341Sdelphij	uint16_t dur;
1034296341Sdelphij
1035296341Sdelphij	RUM_LOCK_ASSERT(sc, MA_OWNED);
1036296341Sdelphij	KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1037296341Sdelphij	    ("protection %d", prot));
1038296341Sdelphij
1039296341Sdelphij	wh = mtod(m, const struct ieee80211_frame *);
1040296341Sdelphij	pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1041296341Sdelphij
1042296341Sdelphij	protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1043296341Sdelphij	ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1044296341Sdelphij
1045296341Sdelphij	isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1046296341Sdelphij	dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort);
1047296341Sdelphij	    + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1048296341Sdelphij	flags = RT2573_TX_MORE_FRAG;
1049296341Sdelphij	if (prot == IEEE80211_PROT_RTSCTS) {
1050296341Sdelphij		/* NB: CTS is the same size as an ACK */
1051296341Sdelphij		dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1052296341Sdelphij		flags |= RT2573_TX_NEED_ACK;
1053296341Sdelphij		mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1054296341Sdelphij	} else {
1055296341Sdelphij		mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1056296341Sdelphij	}
1057296341Sdelphij	if (mprot == NULL) {
1058296341Sdelphij		/* XXX stat + msg */
1059296341Sdelphij		return (ENOBUFS);
1060296341Sdelphij	}
1061296341Sdelphij	data = STAILQ_FIRST(&sc->tx_free);
1062296341Sdelphij	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1063296341Sdelphij	sc->tx_nfree--;
1064183234Ssimon
1065183234Ssimon	data->m = mprot;
1066183234Ssimon	data->ni = ieee80211_ref_node(ni);
1067296341Sdelphij	data->rate = protrate;
1068296341Sdelphij	rum_setup_tx_desc(sc, &data->desc, flags, 0, mprot->m_pkthdr.len, protrate);
1069296341Sdelphij
1070296341Sdelphij	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1071296341Sdelphij	usb2_transfer_start(sc->sc_xfer[RUM_BULK_WR]);
1072296341Sdelphij
1073296341Sdelphij	return 0;
1074296341Sdelphij}
1075296341Sdelphij
1076296341Sdelphijstatic int
1077296341Sdelphijrum_tx_mgt(struct rum_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1078296341Sdelphij{
1079296341Sdelphij	struct ieee80211vap *vap = ni->ni_vap;
1080183234Ssimon	struct ifnet *ifp = sc->sc_ifp;
1081183234Ssimon	struct ieee80211com *ic = ifp->if_l2com;
1082183234Ssimon	struct rum_tx_data *data;
1083183234Ssimon	struct ieee80211_frame *wh;
1084296341Sdelphij	const struct ieee80211_txparam *tp;
1085296341Sdelphij	struct ieee80211_key *k;
1086183234Ssimon	uint32_t flags = 0;
1087296341Sdelphij	uint16_t dur;
1088183234Ssimon
1089296341Sdelphij	RUM_LOCK_ASSERT(sc, MA_OWNED);
1090238405Sjkim
1091296341Sdelphij	data = STAILQ_FIRST(&sc->tx_free);
1092296341Sdelphij	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1093296341Sdelphij	sc->tx_nfree--;
1094183234Ssimon
1095296341Sdelphij	wh = mtod(m0, struct ieee80211_frame *);
1096183234Ssimon	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1097296341Sdelphij		k = ieee80211_crypto_encap(ni, m0);
1098183234Ssimon		if (k == NULL) {
1099296341Sdelphij			m_freem(m0);
1100183234Ssimon			return ENOBUFS;
1101183234Ssimon		}
1102296341Sdelphij		wh = mtod(m0, struct ieee80211_frame *);
1103296341Sdelphij	}
1104296341Sdelphij
1105296341Sdelphij	tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
1106296341Sdelphij
1107296341Sdelphij	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1108296341Sdelphij		flags |= RT2573_TX_NEED_ACK;
1109296341Sdelphij
1110296341Sdelphij		dur = ieee80211_ack_duration(ic->ic_rt, tp->mgmtrate,
1111296341Sdelphij		    ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1112296341Sdelphij		*(uint16_t *)wh->i_dur = htole16(dur);
1113296341Sdelphij
1114296341Sdelphij		/* tell hardware to add timestamp for probe responses */
1115296341Sdelphij		if ((wh->i_fc[0] &
1116296341Sdelphij		    (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1117183234Ssimon		    (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1118183234Ssimon			flags |= RT2573_TX_TIMESTAMP;
1119296341Sdelphij	}
1120296341Sdelphij
1121296341Sdelphij	data->m = m0;
1122296341Sdelphij	data->ni = ni;
1123296341Sdelphij	data->rate = tp->mgmtrate;
1124296341Sdelphij
1125296341Sdelphij	rum_setup_tx_desc(sc, &data->desc, flags, 0, m0->m_pkthdr.len, tp->mgmtrate);
1126296341Sdelphij
1127296341Sdelphij	DPRINTFN(10, "sending mgt frame len=%d rate=%d\n",
1128296341Sdelphij	    m0->m_pkthdr.len + (int)RT2573_TX_DESC_SIZE, tp->mgmtrate);
1129296341Sdelphij
1130296341Sdelphij	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1131296341Sdelphij	usb2_transfer_start(sc->sc_xfer[RUM_BULK_WR]);
1132296341Sdelphij
1133296341Sdelphij	return (0);
1134296341Sdelphij}
1135296341Sdelphij
1136296341Sdelphijstatic int
1137296341Sdelphijrum_tx_raw(struct rum_softc *sc, struct mbuf *m0, struct ieee80211_node *ni,
1138296341Sdelphij    const struct ieee80211_bpf_params *params)
1139296341Sdelphij{
1140296341Sdelphij	struct rum_tx_data *data;
1141296341Sdelphij	uint32_t flags;
1142296341Sdelphij	int rate, error;
1143296341Sdelphij
1144296341Sdelphij	RUM_LOCK_ASSERT(sc, MA_OWNED);
1145296341Sdelphij	KASSERT(params != NULL, ("no raw xmit params"));
1146296341Sdelphij
1147296341Sdelphij	rate = params->ibp_rate0 & IEEE80211_RATE_VAL;
1148296341Sdelphij	/* XXX validate */
1149296341Sdelphij	if (rate == 0) {
1150296341Sdelphij		m_freem(m0);
1151296341Sdelphij		return EINVAL;
1152296341Sdelphij	}
1153296341Sdelphij	flags = 0;
1154296341Sdelphij	if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
1155296341Sdelphij		flags |= RT2573_TX_NEED_ACK;
1156296341Sdelphij	if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) {
1157296341Sdelphij		error = rum_sendprot(sc, m0, ni,
1158296341Sdelphij		    params->ibp_flags & IEEE80211_BPF_RTS ?
1159296341Sdelphij			 IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY,
1160296341Sdelphij		    rate);
1161296341Sdelphij		if (error || sc->tx_nfree == 0) {
1162296341Sdelphij			m_freem(m0);
1163183234Ssimon			return ENOBUFS;
1164238405Sjkim		}
1165296341Sdelphij		flags |= RT2573_TX_LONG_RETRY | RT2573_TX_IFS_SIFS;
1166296341Sdelphij	}
1167296341Sdelphij
1168296341Sdelphij	data = STAILQ_FIRST(&sc->tx_free);
1169296341Sdelphij	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1170296341Sdelphij	sc->tx_nfree--;
1171296341Sdelphij
1172296341Sdelphij	data->m = m0;
1173296341Sdelphij	data->ni = ni;
1174296341Sdelphij	data->rate = rate;
1175296341Sdelphij
1176296341Sdelphij	/* XXX need to setup descriptor ourself */
1177296341Sdelphij	rum_setup_tx_desc(sc, &data->desc, flags, 0, m0->m_pkthdr.len, rate);
1178296341Sdelphij
1179296341Sdelphij	DPRINTFN(10, "sending raw frame len=%u rate=%u\n",
1180296341Sdelphij	    m0->m_pkthdr.len, rate);
1181296341Sdelphij
1182296341Sdelphij	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1183296341Sdelphij	usb2_transfer_start(sc->sc_xfer[RUM_BULK_WR]);
1184296341Sdelphij
1185296341Sdelphij	return 0;
1186296341Sdelphij}
1187296341Sdelphij
1188183234Ssimonstatic int
1189296341Sdelphijrum_tx_data(struct rum_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1190183234Ssimon{
1191296341Sdelphij	struct ieee80211vap *vap = ni->ni_vap;
1192296341Sdelphij	struct ifnet *ifp = sc->sc_ifp;
1193296341Sdelphij	struct ieee80211com *ic = ifp->if_l2com;
1194296341Sdelphij	struct rum_tx_data *data;
1195296341Sdelphij	struct ieee80211_frame *wh;
1196296341Sdelphij	const struct ieee80211_txparam *tp;
1197296341Sdelphij	struct ieee80211_key *k;
1198296341Sdelphij	uint32_t flags = 0;
1199296341Sdelphij	uint16_t dur;
1200183234Ssimon	int error, rate;
1201296341Sdelphij
1202296341Sdelphij	RUM_LOCK_ASSERT(sc, MA_OWNED);
1203296341Sdelphij
1204296341Sdelphij	wh = mtod(m0, struct ieee80211_frame *);
1205296341Sdelphij
1206296341Sdelphij	tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1207296341Sdelphij	if (IEEE80211_IS_MULTICAST(wh->i_addr1))
1208296341Sdelphij		rate = tp->mcastrate;
1209296341Sdelphij	else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
1210296341Sdelphij		rate = tp->ucastrate;
1211296341Sdelphij	else
1212296341Sdelphij		rate = ni->ni_txrate;
1213296341Sdelphij
1214296341Sdelphij	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1215296341Sdelphij		k = ieee80211_crypto_encap(ni, m0);
1216296341Sdelphij		if (k == NULL) {
1217296341Sdelphij			m_freem(m0);
1218296341Sdelphij			return ENOBUFS;
1219296341Sdelphij		}
1220296341Sdelphij
1221296341Sdelphij		/* packet header may have moved, reset our local pointer */
1222183234Ssimon		wh = mtod(m0, struct ieee80211_frame *);
1223183234Ssimon	}
1224
1225	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1226		int prot = IEEE80211_PROT_NONE;
1227		if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1228			prot = IEEE80211_PROT_RTSCTS;
1229		else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1230		    ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1231			prot = ic->ic_protmode;
1232		if (prot != IEEE80211_PROT_NONE) {
1233			error = rum_sendprot(sc, m0, ni, prot, rate);
1234			if (error || sc->tx_nfree == 0) {
1235				m_freem(m0);
1236				return ENOBUFS;
1237			}
1238			flags |= RT2573_TX_LONG_RETRY | RT2573_TX_IFS_SIFS;
1239		}
1240	}
1241
1242	data = STAILQ_FIRST(&sc->tx_free);
1243	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1244	sc->tx_nfree--;
1245
1246	data->m = m0;
1247	data->ni = ni;
1248	data->rate = rate;
1249
1250	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1251		flags |= RT2573_TX_NEED_ACK;
1252		flags |= RT2573_TX_MORE_FRAG;
1253
1254		dur = ieee80211_ack_duration(ic->ic_rt, rate,
1255		    ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1256		*(uint16_t *)wh->i_dur = htole16(dur);
1257	}
1258
1259	rum_setup_tx_desc(sc, &data->desc, flags, 0, m0->m_pkthdr.len, rate);
1260
1261	DPRINTFN(10, "sending frame len=%d rate=%d\n",
1262	    m0->m_pkthdr.len + (int)RT2573_TX_DESC_SIZE, rate);
1263
1264	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1265	usb2_transfer_start(sc->sc_xfer[RUM_BULK_WR]);
1266
1267	return 0;
1268}
1269
1270static void
1271rum_start(struct ifnet *ifp)
1272{
1273	struct rum_softc *sc = ifp->if_softc;
1274	struct ieee80211_node *ni;
1275	struct mbuf *m;
1276
1277	RUM_LOCK(sc);
1278	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1279		RUM_UNLOCK(sc);
1280		return;
1281	}
1282	for (;;) {
1283		IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1284		if (m == NULL)
1285			break;
1286		if (sc->tx_nfree < RUM_TX_MINFREE) {
1287			IFQ_DRV_PREPEND(&ifp->if_snd, m);
1288			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1289			break;
1290		}
1291		ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1292		if (rum_tx_data(sc, m, ni) != 0) {
1293			ieee80211_free_node(ni);
1294			ifp->if_oerrors++;
1295			break;
1296		}
1297	}
1298	RUM_UNLOCK(sc);
1299}
1300
1301static int
1302rum_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1303{
1304	struct rum_softc *sc = ifp->if_softc;
1305	struct ieee80211com *ic = ifp->if_l2com;
1306	struct ifreq *ifr = (struct ifreq *) data;
1307	int error = 0, startall = 0;
1308
1309	switch (cmd) {
1310	case SIOCSIFFLAGS:
1311		RUM_LOCK(sc);
1312		if (ifp->if_flags & IFF_UP) {
1313			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1314				rum_init_locked(sc);
1315				startall = 1;
1316			} else
1317				rum_setpromisc(sc);
1318		} else {
1319			if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1320				rum_stop(sc);
1321		}
1322		RUM_UNLOCK(sc);
1323		if (startall)
1324			ieee80211_start_all(ic);
1325		break;
1326	case SIOCGIFMEDIA:
1327		error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1328		break;
1329	case SIOCGIFADDR:
1330		error = ether_ioctl(ifp, cmd, data);
1331		break;
1332	default:
1333		error = EINVAL;
1334		break;
1335	}
1336	return error;
1337}
1338
1339static void
1340rum_eeprom_read(struct rum_softc *sc, uint16_t addr, void *buf, int len)
1341{
1342	struct usb2_device_request req;
1343	usb2_error_t error;
1344
1345	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1346	req.bRequest = RT2573_READ_EEPROM;
1347	USETW(req.wValue, 0);
1348	USETW(req.wIndex, addr);
1349	USETW(req.wLength, len);
1350
1351	error = rum_do_request(sc, &req, buf);
1352	if (error != 0) {
1353		device_printf(sc->sc_dev, "could not read EEPROM: %s\n",
1354		    usb2_errstr(error));
1355	}
1356}
1357
1358static uint32_t
1359rum_read(struct rum_softc *sc, uint16_t reg)
1360{
1361	uint32_t val;
1362
1363	rum_read_multi(sc, reg, &val, sizeof val);
1364
1365	return le32toh(val);
1366}
1367
1368static void
1369rum_read_multi(struct rum_softc *sc, uint16_t reg, void *buf, int len)
1370{
1371	struct usb2_device_request req;
1372	usb2_error_t error;
1373
1374	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1375	req.bRequest = RT2573_READ_MULTI_MAC;
1376	USETW(req.wValue, 0);
1377	USETW(req.wIndex, reg);
1378	USETW(req.wLength, len);
1379
1380	error = rum_do_request(sc, &req, buf);
1381	if (error != 0) {
1382		device_printf(sc->sc_dev,
1383		    "could not multi read MAC register: %s\n",
1384		    usb2_errstr(error));
1385	}
1386}
1387
1388static usb2_error_t
1389rum_write(struct rum_softc *sc, uint16_t reg, uint32_t val)
1390{
1391	uint32_t tmp = htole32(val);
1392
1393	return (rum_write_multi(sc, reg, &tmp, sizeof tmp));
1394}
1395
1396static usb2_error_t
1397rum_write_multi(struct rum_softc *sc, uint16_t reg, void *buf, size_t len)
1398{
1399	struct usb2_device_request req;
1400	usb2_error_t error;
1401
1402	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1403	req.bRequest = RT2573_WRITE_MULTI_MAC;
1404	USETW(req.wValue, 0);
1405	USETW(req.wIndex, reg);
1406	USETW(req.wLength, len);
1407
1408	error = rum_do_request(sc, &req, buf);
1409	if (error != 0) {
1410		device_printf(sc->sc_dev,
1411		    "could not multi write MAC register: %s\n",
1412		    usb2_errstr(error));
1413	}
1414	return (error);
1415}
1416
1417static void
1418rum_bbp_write(struct rum_softc *sc, uint8_t reg, uint8_t val)
1419{
1420	uint32_t tmp;
1421	int ntries;
1422
1423	DPRINTFN(2, "reg=0x%08x\n", reg);
1424
1425	for (ntries = 0; ntries < 100; ntries++) {
1426		if (!(rum_read(sc, RT2573_PHY_CSR3) & RT2573_BBP_BUSY))
1427			break;
1428		if (rum_pause(sc, hz / 100))
1429			break;
1430	}
1431	if (ntries == 100) {
1432		device_printf(sc->sc_dev, "could not write to BBP\n");
1433		return;
1434	}
1435
1436	tmp = RT2573_BBP_BUSY | (reg & 0x7f) << 8 | val;
1437	rum_write(sc, RT2573_PHY_CSR3, tmp);
1438}
1439
1440static uint8_t
1441rum_bbp_read(struct rum_softc *sc, uint8_t reg)
1442{
1443	uint32_t val;
1444	int ntries;
1445
1446	DPRINTFN(2, "reg=0x%08x\n", reg);
1447
1448	for (ntries = 0; ntries < 100; ntries++) {
1449		if (!(rum_read(sc, RT2573_PHY_CSR3) & RT2573_BBP_BUSY))
1450			break;
1451		if (rum_pause(sc, hz / 100))
1452			break;
1453	}
1454	if (ntries == 100) {
1455		device_printf(sc->sc_dev, "could not read BBP\n");
1456		return 0;
1457	}
1458
1459	val = RT2573_BBP_BUSY | RT2573_BBP_READ | reg << 8;
1460	rum_write(sc, RT2573_PHY_CSR3, val);
1461
1462	for (ntries = 0; ntries < 100; ntries++) {
1463		val = rum_read(sc, RT2573_PHY_CSR3);
1464		if (!(val & RT2573_BBP_BUSY))
1465			return val & 0xff;
1466		if (rum_pause(sc, hz / 100))
1467			break;
1468	}
1469
1470	device_printf(sc->sc_dev, "could not read BBP\n");
1471	return 0;
1472}
1473
1474static void
1475rum_rf_write(struct rum_softc *sc, uint8_t reg, uint32_t val)
1476{
1477	uint32_t tmp;
1478	int ntries;
1479
1480	for (ntries = 0; ntries < 100; ntries++) {
1481		if (!(rum_read(sc, RT2573_PHY_CSR4) & RT2573_RF_BUSY))
1482			break;
1483		if (rum_pause(sc, hz / 100))
1484			break;
1485	}
1486	if (ntries == 100) {
1487		device_printf(sc->sc_dev, "could not write to RF\n");
1488		return;
1489	}
1490
1491	tmp = RT2573_RF_BUSY | RT2573_RF_20BIT | (val & 0xfffff) << 2 |
1492	    (reg & 3);
1493	rum_write(sc, RT2573_PHY_CSR4, tmp);
1494
1495	/* remember last written value in sc */
1496	sc->rf_regs[reg] = val;
1497
1498	DPRINTFN(15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0xfffff);
1499}
1500
1501static void
1502rum_select_antenna(struct rum_softc *sc)
1503{
1504	uint8_t bbp4, bbp77;
1505	uint32_t tmp;
1506
1507	bbp4  = rum_bbp_read(sc, 4);
1508	bbp77 = rum_bbp_read(sc, 77);
1509
1510	/* TBD */
1511
1512	/* make sure Rx is disabled before switching antenna */
1513	tmp = rum_read(sc, RT2573_TXRX_CSR0);
1514	rum_write(sc, RT2573_TXRX_CSR0, tmp | RT2573_DISABLE_RX);
1515
1516	rum_bbp_write(sc,  4, bbp4);
1517	rum_bbp_write(sc, 77, bbp77);
1518
1519	rum_write(sc, RT2573_TXRX_CSR0, tmp);
1520}
1521
1522/*
1523 * Enable multi-rate retries for frames sent at OFDM rates.
1524 * In 802.11b/g mode, allow fallback to CCK rates.
1525 */
1526static void
1527rum_enable_mrr(struct rum_softc *sc)
1528{
1529	struct ifnet *ifp = sc->sc_ifp;
1530	struct ieee80211com *ic = ifp->if_l2com;
1531	uint32_t tmp;
1532
1533	tmp = rum_read(sc, RT2573_TXRX_CSR4);
1534
1535	tmp &= ~RT2573_MRR_CCK_FALLBACK;
1536	if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan))
1537		tmp |= RT2573_MRR_CCK_FALLBACK;
1538	tmp |= RT2573_MRR_ENABLED;
1539
1540	rum_write(sc, RT2573_TXRX_CSR4, tmp);
1541}
1542
1543static void
1544rum_set_txpreamble(struct rum_softc *sc)
1545{
1546	struct ifnet *ifp = sc->sc_ifp;
1547	struct ieee80211com *ic = ifp->if_l2com;
1548	uint32_t tmp;
1549
1550	tmp = rum_read(sc, RT2573_TXRX_CSR4);
1551
1552	tmp &= ~RT2573_SHORT_PREAMBLE;
1553	if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1554		tmp |= RT2573_SHORT_PREAMBLE;
1555
1556	rum_write(sc, RT2573_TXRX_CSR4, tmp);
1557}
1558
1559static void
1560rum_set_basicrates(struct rum_softc *sc)
1561{
1562	struct ifnet *ifp = sc->sc_ifp;
1563	struct ieee80211com *ic = ifp->if_l2com;
1564
1565	/* update basic rate set */
1566	if (ic->ic_curmode == IEEE80211_MODE_11B) {
1567		/* 11b basic rates: 1, 2Mbps */
1568		rum_write(sc, RT2573_TXRX_CSR5, 0x3);
1569	} else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan)) {
1570		/* 11a basic rates: 6, 12, 24Mbps */
1571		rum_write(sc, RT2573_TXRX_CSR5, 0x150);
1572	} else {
1573		/* 11b/g basic rates: 1, 2, 5.5, 11Mbps */
1574		rum_write(sc, RT2573_TXRX_CSR5, 0xf);
1575	}
1576}
1577
1578/*
1579 * Reprogram MAC/BBP to switch to a new band.  Values taken from the reference
1580 * driver.
1581 */
1582static void
1583rum_select_band(struct rum_softc *sc, struct ieee80211_channel *c)
1584{
1585	uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104;
1586	uint32_t tmp;
1587
1588	/* update all BBP registers that depend on the band */
1589	bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c;
1590	bbp35 = 0x50; bbp97 = 0x48; bbp98  = 0x48;
1591	if (IEEE80211_IS_CHAN_5GHZ(c)) {
1592		bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c;
1593		bbp35 += 0x10; bbp97 += 0x10; bbp98  += 0x10;
1594	}
1595	if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1596	    (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1597		bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10;
1598	}
1599
1600	sc->bbp17 = bbp17;
1601	rum_bbp_write(sc,  17, bbp17);
1602	rum_bbp_write(sc,  96, bbp96);
1603	rum_bbp_write(sc, 104, bbp104);
1604
1605	if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1606	    (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1607		rum_bbp_write(sc, 75, 0x80);
1608		rum_bbp_write(sc, 86, 0x80);
1609		rum_bbp_write(sc, 88, 0x80);
1610	}
1611
1612	rum_bbp_write(sc, 35, bbp35);
1613	rum_bbp_write(sc, 97, bbp97);
1614	rum_bbp_write(sc, 98, bbp98);
1615
1616	tmp = rum_read(sc, RT2573_PHY_CSR0);
1617	tmp &= ~(RT2573_PA_PE_2GHZ | RT2573_PA_PE_5GHZ);
1618	if (IEEE80211_IS_CHAN_2GHZ(c))
1619		tmp |= RT2573_PA_PE_2GHZ;
1620	else
1621		tmp |= RT2573_PA_PE_5GHZ;
1622	rum_write(sc, RT2573_PHY_CSR0, tmp);
1623}
1624
1625static void
1626rum_set_chan(struct rum_softc *sc, struct ieee80211_channel *c)
1627{
1628	struct ifnet *ifp = sc->sc_ifp;
1629	struct ieee80211com *ic = ifp->if_l2com;
1630	const struct rfprog *rfprog;
1631	uint8_t bbp3, bbp94 = RT2573_BBPR94_DEFAULT;
1632	int8_t power;
1633	int i, chan;
1634
1635	chan = ieee80211_chan2ieee(ic, c);
1636	if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1637		return;
1638
1639	/* select the appropriate RF settings based on what EEPROM says */
1640	rfprog = (sc->rf_rev == RT2573_RF_5225 ||
1641		  sc->rf_rev == RT2573_RF_2527) ? rum_rf5225 : rum_rf5226;
1642
1643	/* find the settings for this channel (we know it exists) */
1644	for (i = 0; rfprog[i].chan != chan; i++);
1645
1646	power = sc->txpow[i];
1647	if (power < 0) {
1648		bbp94 += power;
1649		power = 0;
1650	} else if (power > 31) {
1651		bbp94 += power - 31;
1652		power = 31;
1653	}
1654
1655	/*
1656	 * If we are switching from the 2GHz band to the 5GHz band or
1657	 * vice-versa, BBP registers need to be reprogrammed.
1658	 */
1659	if (c->ic_flags != ic->ic_curchan->ic_flags) {
1660		rum_select_band(sc, c);
1661		rum_select_antenna(sc);
1662	}
1663	ic->ic_curchan = c;
1664
1665	rum_rf_write(sc, RT2573_RF1, rfprog[i].r1);
1666	rum_rf_write(sc, RT2573_RF2, rfprog[i].r2);
1667	rum_rf_write(sc, RT2573_RF3, rfprog[i].r3 | power << 7);
1668	rum_rf_write(sc, RT2573_RF4, rfprog[i].r4 | sc->rffreq << 10);
1669
1670	rum_rf_write(sc, RT2573_RF1, rfprog[i].r1);
1671	rum_rf_write(sc, RT2573_RF2, rfprog[i].r2);
1672	rum_rf_write(sc, RT2573_RF3, rfprog[i].r3 | power << 7 | 1);
1673	rum_rf_write(sc, RT2573_RF4, rfprog[i].r4 | sc->rffreq << 10);
1674
1675	rum_rf_write(sc, RT2573_RF1, rfprog[i].r1);
1676	rum_rf_write(sc, RT2573_RF2, rfprog[i].r2);
1677	rum_rf_write(sc, RT2573_RF3, rfprog[i].r3 | power << 7);
1678	rum_rf_write(sc, RT2573_RF4, rfprog[i].r4 | sc->rffreq << 10);
1679
1680	rum_pause(sc, hz / 100);
1681
1682	/* enable smart mode for MIMO-capable RFs */
1683	bbp3 = rum_bbp_read(sc, 3);
1684
1685	bbp3 &= ~RT2573_SMART_MODE;
1686	if (sc->rf_rev == RT2573_RF_5225 || sc->rf_rev == RT2573_RF_2527)
1687		bbp3 |= RT2573_SMART_MODE;
1688
1689	rum_bbp_write(sc, 3, bbp3);
1690
1691	if (bbp94 != RT2573_BBPR94_DEFAULT)
1692		rum_bbp_write(sc, 94, bbp94);
1693
1694	/* give the chip some extra time to do the switchover */
1695	rum_pause(sc, hz / 100);
1696}
1697
1698/*
1699 * Enable TSF synchronization and tell h/w to start sending beacons for IBSS
1700 * and HostAP operating modes.
1701 */
1702static void
1703rum_enable_tsf_sync(struct rum_softc *sc)
1704{
1705	struct ifnet *ifp = sc->sc_ifp;
1706	struct ieee80211com *ic = ifp->if_l2com;
1707	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1708	uint32_t tmp;
1709
1710	if (vap->iv_opmode != IEEE80211_M_STA) {
1711		/*
1712		 * Change default 16ms TBTT adjustment to 8ms.
1713		 * Must be done before enabling beacon generation.
1714		 */
1715		rum_write(sc, RT2573_TXRX_CSR10, 1 << 12 | 8);
1716	}
1717
1718	tmp = rum_read(sc, RT2573_TXRX_CSR9) & 0xff000000;
1719
1720	/* set beacon interval (in 1/16ms unit) */
1721	tmp |= vap->iv_bss->ni_intval * 16;
1722
1723	tmp |= RT2573_TSF_TICKING | RT2573_ENABLE_TBTT;
1724	if (vap->iv_opmode == IEEE80211_M_STA)
1725		tmp |= RT2573_TSF_MODE(1);
1726	else
1727		tmp |= RT2573_TSF_MODE(2) | RT2573_GENERATE_BEACON;
1728
1729	rum_write(sc, RT2573_TXRX_CSR9, tmp);
1730}
1731
1732static void
1733rum_enable_tsf(struct rum_softc *sc)
1734{
1735	rum_write(sc, RT2573_TXRX_CSR9,
1736	    (rum_read(sc, RT2573_TXRX_CSR9) & 0xff000000) |
1737	    RT2573_TSF_TICKING | RT2573_TSF_MODE(2));
1738}
1739
1740static void
1741rum_update_slot(struct ifnet *ifp)
1742{
1743	struct rum_softc *sc = ifp->if_softc;
1744	struct ieee80211com *ic = ifp->if_l2com;
1745	uint8_t slottime;
1746	uint32_t tmp;
1747
1748	slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1749
1750	tmp = rum_read(sc, RT2573_MAC_CSR9);
1751	tmp = (tmp & ~0xff) | slottime;
1752	rum_write(sc, RT2573_MAC_CSR9, tmp);
1753
1754	DPRINTF("setting slot time to %uus\n", slottime);
1755}
1756
1757static void
1758rum_set_bssid(struct rum_softc *sc, const uint8_t *bssid)
1759{
1760	uint32_t tmp;
1761
1762	tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
1763	rum_write(sc, RT2573_MAC_CSR4, tmp);
1764
1765	tmp = bssid[4] | bssid[5] << 8 | RT2573_ONE_BSSID << 16;
1766	rum_write(sc, RT2573_MAC_CSR5, tmp);
1767}
1768
1769static void
1770rum_set_macaddr(struct rum_softc *sc, const uint8_t *addr)
1771{
1772	uint32_t tmp;
1773
1774	tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
1775	rum_write(sc, RT2573_MAC_CSR2, tmp);
1776
1777	tmp = addr[4] | addr[5] << 8 | 0xff << 16;
1778	rum_write(sc, RT2573_MAC_CSR3, tmp);
1779}
1780
1781static void
1782rum_setpromisc(struct rum_softc *sc)
1783{
1784	struct ifnet *ifp = sc->sc_ifp;
1785	uint32_t tmp;
1786
1787	tmp = rum_read(sc, RT2573_TXRX_CSR0);
1788
1789	tmp &= ~RT2573_DROP_NOT_TO_ME;
1790	if (!(ifp->if_flags & IFF_PROMISC))
1791		tmp |= RT2573_DROP_NOT_TO_ME;
1792
1793	rum_write(sc, RT2573_TXRX_CSR0, tmp);
1794
1795	DPRINTF("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1796	    "entering" : "leaving");
1797}
1798
1799static void
1800rum_update_promisc(struct ifnet *ifp)
1801{
1802	struct rum_softc *sc = ifp->if_softc;
1803
1804	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1805		return;
1806
1807	RUM_LOCK(sc);
1808	rum_setpromisc(sc);
1809	RUM_UNLOCK(sc);
1810}
1811
1812static const char *
1813rum_get_rf(int rev)
1814{
1815	switch (rev) {
1816	case RT2573_RF_2527:	return "RT2527 (MIMO XR)";
1817	case RT2573_RF_2528:	return "RT2528";
1818	case RT2573_RF_5225:	return "RT5225 (MIMO XR)";
1819	case RT2573_RF_5226:	return "RT5226";
1820	default:		return "unknown";
1821	}
1822}
1823
1824static void
1825rum_read_eeprom(struct rum_softc *sc)
1826{
1827	uint16_t val;
1828#ifdef RUM_DEBUG
1829	int i;
1830#endif
1831
1832	/* read MAC address */
1833	rum_eeprom_read(sc, RT2573_EEPROM_ADDRESS, sc->sc_bssid, 6);
1834
1835	rum_eeprom_read(sc, RT2573_EEPROM_ANTENNA, &val, 2);
1836	val = le16toh(val);
1837	sc->rf_rev =   (val >> 11) & 0x1f;
1838	sc->hw_radio = (val >> 10) & 0x1;
1839	sc->rx_ant =   (val >> 4)  & 0x3;
1840	sc->tx_ant =   (val >> 2)  & 0x3;
1841	sc->nb_ant =   val & 0x3;
1842
1843	DPRINTF("RF revision=%d\n", sc->rf_rev);
1844
1845	rum_eeprom_read(sc, RT2573_EEPROM_CONFIG2, &val, 2);
1846	val = le16toh(val);
1847	sc->ext_5ghz_lna = (val >> 6) & 0x1;
1848	sc->ext_2ghz_lna = (val >> 4) & 0x1;
1849
1850	DPRINTF("External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n",
1851	    sc->ext_2ghz_lna, sc->ext_5ghz_lna);
1852
1853	rum_eeprom_read(sc, RT2573_EEPROM_RSSI_2GHZ_OFFSET, &val, 2);
1854	val = le16toh(val);
1855	if ((val & 0xff) != 0xff)
1856		sc->rssi_2ghz_corr = (int8_t)(val & 0xff);	/* signed */
1857
1858	/* Only [-10, 10] is valid */
1859	if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10)
1860		sc->rssi_2ghz_corr = 0;
1861
1862	rum_eeprom_read(sc, RT2573_EEPROM_RSSI_5GHZ_OFFSET, &val, 2);
1863	val = le16toh(val);
1864	if ((val & 0xff) != 0xff)
1865		sc->rssi_5ghz_corr = (int8_t)(val & 0xff);	/* signed */
1866
1867	/* Only [-10, 10] is valid */
1868	if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10)
1869		sc->rssi_5ghz_corr = 0;
1870
1871	if (sc->ext_2ghz_lna)
1872		sc->rssi_2ghz_corr -= 14;
1873	if (sc->ext_5ghz_lna)
1874		sc->rssi_5ghz_corr -= 14;
1875
1876	DPRINTF("RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n",
1877	    sc->rssi_2ghz_corr, sc->rssi_5ghz_corr);
1878
1879	rum_eeprom_read(sc, RT2573_EEPROM_FREQ_OFFSET, &val, 2);
1880	val = le16toh(val);
1881	if ((val & 0xff) != 0xff)
1882		sc->rffreq = val & 0xff;
1883
1884	DPRINTF("RF freq=%d\n", sc->rffreq);
1885
1886	/* read Tx power for all a/b/g channels */
1887	rum_eeprom_read(sc, RT2573_EEPROM_TXPOWER, sc->txpow, 14);
1888	/* XXX default Tx power for 802.11a channels */
1889	memset(sc->txpow + 14, 24, sizeof (sc->txpow) - 14);
1890#ifdef RUM_DEBUG
1891	for (i = 0; i < 14; i++)
1892		DPRINTF("Channel=%d Tx power=%d\n", i + 1,  sc->txpow[i]);
1893#endif
1894
1895	/* read default values for BBP registers */
1896	rum_eeprom_read(sc, RT2573_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
1897#ifdef RUM_DEBUG
1898	for (i = 0; i < 14; i++) {
1899		if (sc->bbp_prom[i].reg == 0 || sc->bbp_prom[i].reg == 0xff)
1900			continue;
1901		DPRINTF("BBP R%d=%02x\n", sc->bbp_prom[i].reg,
1902		    sc->bbp_prom[i].val);
1903	}
1904#endif
1905}
1906
1907static int
1908rum_bbp_init(struct rum_softc *sc)
1909{
1910#define N(a)	(sizeof (a) / sizeof ((a)[0]))
1911	int i, ntries;
1912
1913	/* wait for BBP to be ready */
1914	for (ntries = 0; ntries < 100; ntries++) {
1915		const uint8_t val = rum_bbp_read(sc, 0);
1916		if (val != 0 && val != 0xff)
1917			break;
1918		if (rum_pause(sc, hz / 100))
1919			break;
1920	}
1921	if (ntries == 100) {
1922		device_printf(sc->sc_dev, "timeout waiting for BBP\n");
1923		return EIO;
1924	}
1925
1926	/* initialize BBP registers to default values */
1927	for (i = 0; i < N(rum_def_bbp); i++)
1928		rum_bbp_write(sc, rum_def_bbp[i].reg, rum_def_bbp[i].val);
1929
1930	/* write vendor-specific BBP values (from EEPROM) */
1931	for (i = 0; i < 16; i++) {
1932		if (sc->bbp_prom[i].reg == 0 || sc->bbp_prom[i].reg == 0xff)
1933			continue;
1934		rum_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
1935	}
1936
1937	return 0;
1938#undef N
1939}
1940
1941static void
1942rum_init_locked(struct rum_softc *sc)
1943{
1944#define N(a)	(sizeof (a) / sizeof ((a)[0]))
1945	struct ifnet *ifp = sc->sc_ifp;
1946	struct ieee80211com *ic = ifp->if_l2com;
1947	uint32_t tmp;
1948	usb2_error_t error;
1949	int i, ntries;
1950
1951	RUM_LOCK_ASSERT(sc, MA_OWNED);
1952
1953	rum_stop(sc);
1954
1955	/* initialize MAC registers to default values */
1956	for (i = 0; i < N(rum_def_mac); i++)
1957		rum_write(sc, rum_def_mac[i].reg, rum_def_mac[i].val);
1958
1959	/* set host ready */
1960	rum_write(sc, RT2573_MAC_CSR1, 3);
1961	rum_write(sc, RT2573_MAC_CSR1, 0);
1962
1963	/* wait for BBP/RF to wakeup */
1964	for (ntries = 0; ntries < 100; ntries++) {
1965		if (rum_read(sc, RT2573_MAC_CSR12) & 8)
1966			break;
1967		rum_write(sc, RT2573_MAC_CSR12, 4);	/* force wakeup */
1968		if (rum_pause(sc, hz / 100))
1969			break;
1970	}
1971	if (ntries == 100) {
1972		device_printf(sc->sc_dev,
1973		    "timeout waiting for BBP/RF to wakeup\n");
1974		goto fail;
1975	}
1976
1977	if ((error = rum_bbp_init(sc)) != 0)
1978		goto fail;
1979
1980	/* select default channel */
1981	rum_select_band(sc, ic->ic_curchan);
1982	rum_select_antenna(sc);
1983	rum_set_chan(sc, ic->ic_curchan);
1984
1985	/* clear STA registers */
1986	rum_read_multi(sc, RT2573_STA_CSR0, sc->sta, sizeof sc->sta);
1987
1988	rum_set_macaddr(sc, IF_LLADDR(ifp));
1989
1990	/* initialize ASIC */
1991	rum_write(sc, RT2573_MAC_CSR1, 4);
1992
1993	/*
1994	 * Allocate Tx and Rx xfer queues.
1995	 */
1996	rum_setup_tx_list(sc);
1997
1998	/* update Rx filter */
1999	tmp = rum_read(sc, RT2573_TXRX_CSR0) & 0xffff;
2000
2001	tmp |= RT2573_DROP_PHY_ERROR | RT2573_DROP_CRC_ERROR;
2002	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2003		tmp |= RT2573_DROP_CTL | RT2573_DROP_VER_ERROR |
2004		       RT2573_DROP_ACKCTS;
2005		if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2006			tmp |= RT2573_DROP_TODS;
2007		if (!(ifp->if_flags & IFF_PROMISC))
2008			tmp |= RT2573_DROP_NOT_TO_ME;
2009	}
2010	rum_write(sc, RT2573_TXRX_CSR0, tmp);
2011
2012	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2013	ifp->if_drv_flags |= IFF_DRV_RUNNING;
2014	usb2_transfer_set_stall(sc->sc_xfer[RUM_BULK_WR]);
2015	usb2_transfer_start(sc->sc_xfer[RUM_BULK_RD]);
2016	return;
2017
2018fail:	rum_stop(sc);
2019#undef N
2020}
2021
2022static void
2023rum_init(void *priv)
2024{
2025	struct rum_softc *sc = priv;
2026	struct ifnet *ifp = sc->sc_ifp;
2027	struct ieee80211com *ic = ifp->if_l2com;
2028
2029	RUM_LOCK(sc);
2030	rum_init_locked(sc);
2031	RUM_UNLOCK(sc);
2032
2033	if (ifp->if_drv_flags & IFF_DRV_RUNNING)
2034		ieee80211_start_all(ic);		/* start all vap's */
2035}
2036
2037static void
2038rum_stop(struct rum_softc *sc)
2039{
2040	struct ifnet *ifp = sc->sc_ifp;
2041	uint32_t tmp;
2042
2043	RUM_LOCK_ASSERT(sc, MA_OWNED);
2044
2045	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2046
2047	RUM_UNLOCK(sc);
2048
2049	/*
2050	 * Drain the USB transfers, if not already drained:
2051	 */
2052	usb2_transfer_drain(sc->sc_xfer[RUM_BULK_WR]);
2053	usb2_transfer_drain(sc->sc_xfer[RUM_BULK_RD]);
2054
2055	RUM_LOCK(sc);
2056
2057	rum_unsetup_tx_list(sc);
2058
2059	/* disable Rx */
2060	tmp = rum_read(sc, RT2573_TXRX_CSR0);
2061	rum_write(sc, RT2573_TXRX_CSR0, tmp | RT2573_DISABLE_RX);
2062
2063	/* reset ASIC */
2064	rum_write(sc, RT2573_MAC_CSR1, 3);
2065	rum_write(sc, RT2573_MAC_CSR1, 0);
2066}
2067
2068static void
2069rum_load_microcode(struct rum_softc *sc, const uint8_t *ucode, size_t size)
2070{
2071	struct usb2_device_request req;
2072	uint16_t reg = RT2573_MCU_CODE_BASE;
2073	usb2_error_t err;
2074
2075	/* copy firmware image into NIC */
2076	for (; size >= 4; reg += 4, ucode += 4, size -= 4) {
2077		err = rum_write(sc, reg, UGETDW(ucode));
2078		if (err) {
2079			/* firmware already loaded ? */
2080			device_printf(sc->sc_dev, "Firmware load "
2081			    "failure! (ignored)\n");
2082			break;
2083		}
2084	}
2085
2086	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2087	req.bRequest = RT2573_MCU_CNTL;
2088	USETW(req.wValue, RT2573_MCU_RUN);
2089	USETW(req.wIndex, 0);
2090	USETW(req.wLength, 0);
2091
2092	err = rum_do_request(sc, &req, NULL);
2093	if (err != 0) {
2094		device_printf(sc->sc_dev, "could not run firmware: %s\n",
2095		    usb2_errstr(err));
2096	}
2097
2098	/* give the chip some time to boot */
2099	rum_pause(sc, hz / 8);
2100}
2101
2102static int
2103rum_prepare_beacon(struct rum_softc *sc, struct ieee80211vap *vap)
2104{
2105	struct ieee80211com *ic = vap->iv_ic;
2106	const struct ieee80211_txparam *tp;
2107	struct rum_tx_desc desc;
2108	struct mbuf *m0;
2109
2110	m0 = ieee80211_beacon_alloc(vap->iv_bss, &RUM_VAP(vap)->bo);
2111	if (m0 == NULL) {
2112		return ENOBUFS;
2113	}
2114
2115	tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_bsschan)];
2116	rum_setup_tx_desc(sc, &desc, RT2573_TX_TIMESTAMP, RT2573_TX_HWSEQ,
2117	    m0->m_pkthdr.len, tp->mgmtrate);
2118
2119	/* copy the first 24 bytes of Tx descriptor into NIC memory */
2120	rum_write_multi(sc, RT2573_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
2121
2122	/* copy beacon header and payload into NIC memory */
2123	rum_write_multi(sc, RT2573_HW_BEACON_BASE0 + 24, mtod(m0, uint8_t *),
2124	    m0->m_pkthdr.len);
2125
2126	m_freem(m0);
2127
2128	return 0;
2129}
2130
2131static int
2132rum_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2133    const struct ieee80211_bpf_params *params)
2134{
2135	struct ifnet *ifp = ni->ni_ic->ic_ifp;
2136	struct rum_softc *sc = ifp->if_softc;
2137
2138	RUM_LOCK(sc);
2139	/* prevent management frames from being sent if we're not ready */
2140	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2141		RUM_UNLOCK(sc);
2142		m_freem(m);
2143		ieee80211_free_node(ni);
2144		return ENETDOWN;
2145	}
2146	if (sc->tx_nfree < RUM_TX_MINFREE) {
2147		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
2148		RUM_UNLOCK(sc);
2149		m_freem(m);
2150		ieee80211_free_node(ni);
2151		return EIO;
2152	}
2153
2154	ifp->if_opackets++;
2155
2156	if (params == NULL) {
2157		/*
2158		 * Legacy path; interpret frame contents to decide
2159		 * precisely how to send the frame.
2160		 */
2161		if (rum_tx_mgt(sc, m, ni) != 0)
2162			goto bad;
2163	} else {
2164		/*
2165		 * Caller supplied explicit parameters to use in
2166		 * sending the frame.
2167		 */
2168		if (rum_tx_raw(sc, m, ni, params) != 0)
2169			goto bad;
2170	}
2171	RUM_UNLOCK(sc);
2172
2173	return 0;
2174bad:
2175	ifp->if_oerrors++;
2176	RUM_UNLOCK(sc);
2177	ieee80211_free_node(ni);
2178	return EIO;
2179}
2180
2181static void
2182rum_amrr_start(struct rum_softc *sc, struct ieee80211_node *ni)
2183{
2184	struct ieee80211vap *vap = ni->ni_vap;
2185	struct rum_vap *rvp = RUM_VAP(vap);
2186
2187	/* clear statistic registers (STA_CSR0 to STA_CSR5) */
2188	rum_read_multi(sc, RT2573_STA_CSR0, sc->sta, sizeof sc->sta);
2189
2190	ieee80211_amrr_node_init(&rvp->amrr, &RUM_NODE(ni)->amn, ni);
2191
2192	usb2_callout_reset(&rvp->amrr_ch, hz, rum_amrr_timeout, rvp);
2193}
2194
2195static void
2196rum_amrr_timeout(void *arg)
2197{
2198	struct rum_vap *rvp = arg;
2199	struct ieee80211vap *vap = &rvp->vap;
2200	struct ieee80211com *ic = vap->iv_ic;
2201
2202	ieee80211_runtask(ic, &rvp->amrr_task);
2203}
2204
2205static void
2206rum_amrr_task(void *arg, int pending)
2207{
2208	struct rum_vap *rvp = arg;
2209	struct ieee80211vap *vap = &rvp->vap;
2210	struct ieee80211com *ic = vap->iv_ic;
2211	struct ifnet *ifp = ic->ic_ifp;
2212	struct rum_softc *sc = ifp->if_softc;
2213	struct ieee80211_node *ni = vap->iv_bss;
2214	int ok, fail;
2215
2216	RUM_LOCK(sc);
2217	/* read and clear statistic registers (STA_CSR0 to STA_CSR10) */
2218	rum_read_multi(sc, RT2573_STA_CSR0, sc->sta, sizeof(sc->sta));
2219
2220	ok = (le32toh(sc->sta[4]) >> 16) +	/* TX ok w/o retry */
2221	    (le32toh(sc->sta[5]) & 0xffff);	/* TX ok w/ retry */
2222	fail = (le32toh(sc->sta[5]) >> 16);	/* TX retry-fail count */
2223
2224	ieee80211_amrr_tx_update(&RUM_NODE(ni)->amn,
2225	    ok+fail, ok, (le32toh(sc->sta[5]) & 0xffff) + fail);
2226	(void) ieee80211_amrr_choose(ni, &RUM_NODE(ni)->amn);
2227
2228	ifp->if_oerrors += fail;	/* count TX retry-fail as Tx errors */
2229
2230	usb2_callout_reset(&rvp->amrr_ch, hz, rum_amrr_timeout, rvp);
2231	RUM_UNLOCK(sc);
2232}
2233
2234/* ARGUSED */
2235static struct ieee80211_node *
2236rum_node_alloc(struct ieee80211vap *vap __unused,
2237	const uint8_t mac[IEEE80211_ADDR_LEN] __unused)
2238{
2239	struct rum_node *rn;
2240
2241	rn = malloc(sizeof(struct rum_node), M_80211_NODE, M_NOWAIT | M_ZERO);
2242	return rn != NULL ? &rn->ni : NULL;
2243}
2244
2245static void
2246rum_newassoc(struct ieee80211_node *ni, int isnew)
2247{
2248	struct ieee80211vap *vap = ni->ni_vap;
2249
2250	ieee80211_amrr_node_init(&RUM_VAP(vap)->amrr, &RUM_NODE(ni)->amn, ni);
2251}
2252
2253static void
2254rum_scan_start(struct ieee80211com *ic)
2255{
2256	struct ifnet *ifp = ic->ic_ifp;
2257	struct rum_softc *sc = ifp->if_softc;
2258	uint32_t tmp;
2259
2260	RUM_LOCK(sc);
2261	/* abort TSF synchronization */
2262	tmp = rum_read(sc, RT2573_TXRX_CSR9);
2263	rum_write(sc, RT2573_TXRX_CSR9, tmp & ~0x00ffffff);
2264	rum_set_bssid(sc, ifp->if_broadcastaddr);
2265	RUM_UNLOCK(sc);
2266
2267}
2268
2269static void
2270rum_scan_end(struct ieee80211com *ic)
2271{
2272	struct rum_softc *sc = ic->ic_ifp->if_softc;
2273
2274	RUM_LOCK(sc);
2275	rum_enable_tsf_sync(sc);
2276	rum_set_bssid(sc, sc->sc_bssid);
2277	RUM_UNLOCK(sc);
2278
2279}
2280
2281static void
2282rum_set_channel(struct ieee80211com *ic)
2283{
2284	struct rum_softc *sc = ic->ic_ifp->if_softc;
2285
2286	RUM_LOCK(sc);
2287	rum_set_chan(sc, ic->ic_curchan);
2288	RUM_UNLOCK(sc);
2289}
2290
2291static int
2292rum_get_rssi(struct rum_softc *sc, uint8_t raw)
2293{
2294	struct ifnet *ifp = sc->sc_ifp;
2295	struct ieee80211com *ic = ifp->if_l2com;
2296	int lna, agc, rssi;
2297
2298	lna = (raw >> 5) & 0x3;
2299	agc = raw & 0x1f;
2300
2301	if (lna == 0) {
2302		/*
2303		 * No RSSI mapping
2304		 *
2305		 * NB: Since RSSI is relative to noise floor, -1 is
2306		 *     adequate for caller to know error happened.
2307		 */
2308		return -1;
2309	}
2310
2311	rssi = (2 * agc) - RT2573_NOISE_FLOOR;
2312
2313	if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan)) {
2314		rssi += sc->rssi_2ghz_corr;
2315
2316		if (lna == 1)
2317			rssi -= 64;
2318		else if (lna == 2)
2319			rssi -= 74;
2320		else if (lna == 3)
2321			rssi -= 90;
2322	} else {
2323		rssi += sc->rssi_5ghz_corr;
2324
2325		if (!sc->ext_5ghz_lna && lna != 1)
2326			rssi += 4;
2327
2328		if (lna == 1)
2329			rssi -= 64;
2330		else if (lna == 2)
2331			rssi -= 86;
2332		else if (lna == 3)
2333			rssi -= 100;
2334	}
2335	return rssi;
2336}
2337
2338static int
2339rum_pause(struct rum_softc *sc, int timeout)
2340{
2341
2342	usb2_pause_mtx(&sc->sc_mtx, timeout);
2343	return (0);
2344}
2345
2346static device_method_t rum_methods[] = {
2347	/* Device interface */
2348	DEVMETHOD(device_probe,		rum_match),
2349	DEVMETHOD(device_attach,	rum_attach),
2350	DEVMETHOD(device_detach,	rum_detach),
2351
2352	{ 0, 0 }
2353};
2354
2355static driver_t rum_driver = {
2356	.name = "rum",
2357	.methods = rum_methods,
2358	.size = sizeof(struct rum_softc),
2359};
2360
2361static devclass_t rum_devclass;
2362
2363DRIVER_MODULE(rum, uhub, rum_driver, rum_devclass, NULL, 0);
2364