uchcom.c revision 187970
1/* $NetBSD: uchcom.c,v 1.1 2007/09/03 17:57:37 tshiozak Exp $ */ 2 3/*- 4 * Copyright (c) 2007, Takanori Watanabe 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2007 The NetBSD Foundation, Inc. 31 * All rights reserved. 32 * 33 * This code is derived from software contributed to The NetBSD Foundation 34 * by Takuya SHIOZAKI (tshiozak@netbsd.org). 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed by the NetBSD 47 * Foundation, Inc. and its contributors. 48 * 4. Neither the name of The NetBSD Foundation nor the names of its 49 * contributors may be used to endorse or promote products derived 50 * from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 53 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 54 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 55 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 56 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 62 * POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65#include <sys/cdefs.h> 66__FBSDID("$FreeBSD: head/sys/dev/usb2/serial/uchcom2.c 187970 2009-02-01 00:51:25Z thompsa $"); 67 68/* 69 * driver for WinChipHead CH341/340, the worst USB-serial chip in the world. 70 */ 71 72#include <dev/usb2/include/usb2_devid.h> 73#include <dev/usb2/include/usb2_standard.h> 74#include <dev/usb2/include/usb2_mfunc.h> 75#include <dev/usb2/include/usb2_error.h> 76#include <dev/usb2/include/usb2_cdc.h> 77#include <dev/usb2/include/usb2_ioctl.h> 78 79#define USB_DEBUG_VAR uchcom_debug 80 81#include <dev/usb2/core/usb2_core.h> 82#include <dev/usb2/core/usb2_debug.h> 83#include <dev/usb2/core/usb2_process.h> 84#include <dev/usb2/core/usb2_request.h> 85#include <dev/usb2/core/usb2_lookup.h> 86#include <dev/usb2/core/usb2_util.h> 87#include <dev/usb2/core/usb2_busdma.h> 88 89#include <dev/usb2/serial/usb2_serial.h> 90 91#if USB_DEBUG 92static int uchcom_debug = 0; 93 94SYSCTL_NODE(_hw_usb2, OID_AUTO, uchcom, CTLFLAG_RW, 0, "USB uchcom"); 95SYSCTL_INT(_hw_usb2_uchcom, OID_AUTO, debug, CTLFLAG_RW, 96 &uchcom_debug, 0, "uchcom debug level"); 97#endif 98 99#define UCHCOM_IFACE_INDEX 0 100#define UCHCOM_CONFIG_INDEX 0 101 102#define UCHCOM_REV_CH340 0x0250 103#define UCHCOM_INPUT_BUF_SIZE 8 104 105#define UCHCOM_REQ_GET_VERSION 0x5F 106#define UCHCOM_REQ_READ_REG 0x95 107#define UCHCOM_REQ_WRITE_REG 0x9A 108#define UCHCOM_REQ_RESET 0xA1 109#define UCHCOM_REQ_SET_DTRRTS 0xA4 110 111#define UCHCOM_REG_STAT1 0x06 112#define UCHCOM_REG_STAT2 0x07 113#define UCHCOM_REG_BPS_PRE 0x12 114#define UCHCOM_REG_BPS_DIV 0x13 115#define UCHCOM_REG_BPS_MOD 0x14 116#define UCHCOM_REG_BPS_PAD 0x0F 117#define UCHCOM_REG_BREAK1 0x05 118#define UCHCOM_REG_BREAK2 0x18 119#define UCHCOM_REG_LCR1 0x18 120#define UCHCOM_REG_LCR2 0x25 121 122#define UCHCOM_VER_20 0x20 123 124#define UCHCOM_BASE_UNKNOWN 0 125#define UCHCOM_BPS_MOD_BASE 20000000 126#define UCHCOM_BPS_MOD_BASE_OFS 1100 127 128#define UCHCOM_DTR_MASK 0x20 129#define UCHCOM_RTS_MASK 0x40 130 131#define UCHCOM_BRK1_MASK 0x01 132#define UCHCOM_BRK2_MASK 0x40 133 134#define UCHCOM_LCR1_MASK 0xAF 135#define UCHCOM_LCR2_MASK 0x07 136#define UCHCOM_LCR1_PARENB 0x80 137#define UCHCOM_LCR2_PAREVEN 0x07 138#define UCHCOM_LCR2_PARODD 0x06 139#define UCHCOM_LCR2_PARMARK 0x05 140#define UCHCOM_LCR2_PARSPACE 0x04 141 142#define UCHCOM_INTR_STAT1 0x02 143#define UCHCOM_INTR_STAT2 0x03 144#define UCHCOM_INTR_LEAST 4 145 146#define UCHCOM_BULK_BUF_SIZE 1024 /* bytes */ 147 148enum { 149 UCHCOM_BULK_DT_WR, 150 UCHCOM_BULK_DT_RD, 151 UCHCOM_BULK_CS_WR, 152 UCHCOM_BULK_CS_RD, 153 UCHCOM_INTR_DT_RD, 154 UCHCOM_INTR_CS_RD, 155 UCHCOM_N_TRANSFER = 6, 156}; 157 158struct uchcom_softc { 159 struct usb2_com_super_softc sc_super_ucom; 160 struct usb2_com_softc sc_ucom; 161 162 struct usb2_xfer *sc_xfer[UCHCOM_N_TRANSFER]; 163 struct usb2_device *sc_udev; 164 165 uint8_t sc_dtr; /* local copy */ 166 uint8_t sc_rts; /* local copy */ 167 uint8_t sc_version; 168 uint8_t sc_msr; 169 uint8_t sc_lsr; /* local status register */ 170 uint8_t sc_flag; 171#define UCHCOM_FLAG_INTR_STALL 0x01 172#define UCHCOM_FLAG_READ_STALL 0x02 173#define UCHCOM_FLAG_WRITE_STALL 0x04 174}; 175 176struct uchcom_divider { 177 uint8_t dv_prescaler; 178 uint8_t dv_div; 179 uint8_t dv_mod; 180}; 181 182struct uchcom_divider_record { 183 uint32_t dvr_high; 184 uint32_t dvr_low; 185 uint32_t dvr_base_clock; 186 struct uchcom_divider dvr_divider; 187}; 188 189static const struct uchcom_divider_record dividers[] = 190{ 191 {307200, 307200, UCHCOM_BASE_UNKNOWN, {7, 0xD9, 0}}, 192 {921600, 921600, UCHCOM_BASE_UNKNOWN, {7, 0xF3, 0}}, 193 {2999999, 23530, 6000000, {3, 0, 0}}, 194 {23529, 2942, 750000, {2, 0, 0}}, 195 {2941, 368, 93750, {1, 0, 0}}, 196 {367, 1, 11719, {0, 0, 0}}, 197}; 198 199#define NUM_DIVIDERS (sizeof (dividers) / sizeof (dividers[0])) 200 201static const struct usb2_device_id uchcom_devs[] = { 202 {USB_VPI(USB_VENDOR_WCH, USB_PRODUCT_WCH_CH341SER, 0)}, 203}; 204 205/* protypes */ 206 207static int uchcom_pre_param(struct usb2_com_softc *, struct termios *); 208static void uchcom_cfg_get_status(struct usb2_com_softc *, uint8_t *, 209 uint8_t *); 210static void uchcom_cfg_param(struct usb2_com_softc *, struct termios *); 211static void uchcom_cfg_set_break(struct usb2_com_softc *, uint8_t); 212static void uchcom_cfg_set_dtr(struct usb2_com_softc *, uint8_t); 213static void uchcom_cfg_set_rts(struct usb2_com_softc *, uint8_t); 214static void uchcom_start_read(struct usb2_com_softc *); 215static void uchcom_start_write(struct usb2_com_softc *); 216static void uchcom_stop_read(struct usb2_com_softc *); 217static void uchcom_stop_write(struct usb2_com_softc *); 218static void uchcom_update_version(struct uchcom_softc *); 219static void uchcom_convert_status(struct uchcom_softc *, uint8_t); 220static void uchcom_update_status(struct uchcom_softc *); 221static void uchcom_set_dtrrts(struct uchcom_softc *); 222static int uchcom_calc_divider_settings(struct uchcom_divider *, uint32_t); 223static void uchcom_set_dte_rate(struct uchcom_softc *, uint32_t); 224static void uchcom_set_line_control(struct uchcom_softc *, tcflag_t); 225static void uchcom_clear_chip(struct uchcom_softc *); 226static void uchcom_reset_chip(struct uchcom_softc *); 227 228static device_probe_t uchcom_probe; 229static device_attach_t uchcom_attach; 230static device_detach_t uchcom_detach; 231 232static usb2_callback_t uchcom_intr_callback; 233static usb2_callback_t uchcom_intr_clear_stall_callback; 234static usb2_callback_t uchcom_write_callback; 235static usb2_callback_t uchcom_write_clear_stall_callback; 236static usb2_callback_t uchcom_read_callback; 237static usb2_callback_t uchcom_read_clear_stall_callback; 238 239static const struct usb2_config uchcom_config_data[UCHCOM_N_TRANSFER] = { 240 241 [UCHCOM_BULK_DT_WR] = { 242 .type = UE_BULK, 243 .endpoint = UE_ADDR_ANY, 244 .direction = UE_DIR_OUT, 245 .mh.bufsize = UCHCOM_BULK_BUF_SIZE, 246 .mh.flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 247 .mh.callback = &uchcom_write_callback, 248 }, 249 250 [UCHCOM_BULK_DT_RD] = { 251 .type = UE_BULK, 252 .endpoint = UE_ADDR_ANY, 253 .direction = UE_DIR_IN, 254 .mh.bufsize = UCHCOM_BULK_BUF_SIZE, 255 .mh.flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 256 .mh.callback = &uchcom_read_callback, 257 }, 258 259 [UCHCOM_BULK_CS_WR] = { 260 .type = UE_CONTROL, 261 .endpoint = 0x00, /* Control pipe */ 262 .direction = UE_DIR_ANY, 263 .mh.bufsize = sizeof(struct usb2_device_request), 264 .mh.callback = &uchcom_write_clear_stall_callback, 265 .mh.timeout = 1000, /* 1 second */ 266 .mh.interval = 50, /* 50ms */ 267 }, 268 269 [UCHCOM_BULK_CS_RD] = { 270 .type = UE_CONTROL, 271 .endpoint = 0x00, /* Control pipe */ 272 .direction = UE_DIR_ANY, 273 .mh.bufsize = sizeof(struct usb2_device_request), 274 .mh.callback = &uchcom_read_clear_stall_callback, 275 .mh.timeout = 1000, /* 1 second */ 276 .mh.interval = 50, /* 50ms */ 277 }, 278 279 [UCHCOM_INTR_DT_RD] = { 280 .type = UE_INTERRUPT, 281 .endpoint = UE_ADDR_ANY, 282 .direction = UE_DIR_IN, 283 .mh.flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 284 .mh.bufsize = 0, /* use wMaxPacketSize */ 285 .mh.callback = &uchcom_intr_callback, 286 }, 287 288 [UCHCOM_INTR_CS_RD] = { 289 .type = UE_CONTROL, 290 .endpoint = 0x00, /* Control pipe */ 291 .direction = UE_DIR_ANY, 292 .mh.bufsize = sizeof(struct usb2_device_request), 293 .mh.callback = &uchcom_intr_clear_stall_callback, 294 .mh.timeout = 1000, /* 1 second */ 295 .mh.interval = 50, /* 50ms */ 296 }, 297}; 298 299struct usb2_com_callback uchcom_callback = { 300 .usb2_com_cfg_get_status = &uchcom_cfg_get_status, 301 .usb2_com_cfg_set_dtr = &uchcom_cfg_set_dtr, 302 .usb2_com_cfg_set_rts = &uchcom_cfg_set_rts, 303 .usb2_com_cfg_set_break = &uchcom_cfg_set_break, 304 .usb2_com_cfg_param = &uchcom_cfg_param, 305 .usb2_com_pre_param = &uchcom_pre_param, 306 .usb2_com_start_read = &uchcom_start_read, 307 .usb2_com_stop_read = &uchcom_stop_read, 308 .usb2_com_start_write = &uchcom_start_write, 309 .usb2_com_stop_write = &uchcom_stop_write, 310}; 311 312/* ---------------------------------------------------------------------- 313 * driver entry points 314 */ 315 316static int 317uchcom_probe(device_t dev) 318{ 319 struct usb2_attach_arg *uaa = device_get_ivars(dev); 320 321 DPRINTFN(11, "\n"); 322 323 if (uaa->usb2_mode != USB_MODE_HOST) { 324 return (ENXIO); 325 } 326 if (uaa->info.bConfigIndex != UCHCOM_CONFIG_INDEX) { 327 return (ENXIO); 328 } 329 if (uaa->info.bIfaceIndex != UCHCOM_IFACE_INDEX) { 330 return (ENXIO); 331 } 332 return (usb2_lookup_id_by_uaa(uchcom_devs, sizeof(uchcom_devs), uaa)); 333} 334 335static int 336uchcom_attach(device_t dev) 337{ 338 struct uchcom_softc *sc = device_get_softc(dev); 339 struct usb2_attach_arg *uaa = device_get_ivars(dev); 340 int error; 341 uint8_t iface_index; 342 343 DPRINTFN(11, "\n"); 344 345 device_set_usb2_desc(dev); 346 347 sc->sc_udev = uaa->device; 348 349 switch (uaa->info.bcdDevice) { 350 case UCHCOM_REV_CH340: 351 device_printf(dev, "CH340 detected\n"); 352 break; 353 default: 354 device_printf(dev, "CH341 detected\n"); 355 break; 356 } 357 358 iface_index = UCHCOM_IFACE_INDEX; 359 error = usb2_transfer_setup(uaa->device, 360 &iface_index, sc->sc_xfer, uchcom_config_data, 361 UCHCOM_N_TRANSFER, sc, &Giant); 362 363 if (error) { 364 DPRINTF("one or more missing USB endpoints, " 365 "error=%s\n", usb2_errstr(error)); 366 goto detach; 367 } 368 /* 369 * Do the initialization during attach so that the system does not 370 * sleep during open: 371 */ 372 uchcom_update_version(sc); 373 uchcom_clear_chip(sc); 374 uchcom_reset_chip(sc); 375 uchcom_update_status(sc); 376 377 sc->sc_dtr = 1; 378 sc->sc_rts = 1; 379 380 /* clear stall at first run */ 381 sc->sc_flag |= (UCHCOM_FLAG_READ_STALL | 382 UCHCOM_FLAG_WRITE_STALL); 383 384 error = usb2_com_attach(&sc->sc_super_ucom, &sc->sc_ucom, 1, sc, 385 &uchcom_callback, &Giant); 386 if (error) { 387 goto detach; 388 } 389 return (0); 390 391detach: 392 uchcom_detach(dev); 393 return (ENXIO); 394} 395 396static int 397uchcom_detach(device_t dev) 398{ 399 struct uchcom_softc *sc = device_get_softc(dev); 400 401 DPRINTFN(11, "\n"); 402 403 usb2_com_detach(&sc->sc_super_ucom, &sc->sc_ucom, 1); 404 405 usb2_transfer_unsetup(sc->sc_xfer, UCHCOM_N_TRANSFER); 406 407 return (0); 408} 409 410/* ---------------------------------------------------------------------- 411 * low level i/o 412 */ 413 414static void 415uchcom_do_request(struct uchcom_softc *sc, 416 struct usb2_device_request *req, void *data) 417{ 418 uint16_t length; 419 uint16_t actlen; 420 usb2_error_t err; 421 422 length = UGETW(req->wLength); 423 actlen = 0; 424 425 if (usb2_com_cfg_is_gone(&sc->sc_ucom)) { 426 goto done; 427 } 428 err = usb2_do_request_flags(sc->sc_udev, &Giant, req, 429 data, USB_SHORT_XFER_OK, &actlen, 1000); 430 431 if (err) { 432 DPRINTFN(0, "device request failed, err=%s " 433 "(ignored)\n", usb2_errstr(err)); 434 } 435done: 436 if (length != actlen) { 437 if (req->bmRequestType & UT_READ) { 438 bzero(USB_ADD_BYTES(data, actlen), length - actlen); 439 } 440 } 441} 442 443static void 444uchcom_ctrl_write(struct uchcom_softc *sc, uint8_t reqno, 445 uint16_t value, uint16_t index) 446{ 447 struct usb2_device_request req; 448 449 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 450 req.bRequest = reqno; 451 USETW(req.wValue, value); 452 USETW(req.wIndex, index); 453 USETW(req.wLength, 0); 454 455 uchcom_do_request(sc, &req, NULL); 456} 457 458static void 459uchcom_ctrl_read(struct uchcom_softc *sc, uint8_t reqno, 460 uint16_t value, uint16_t index, void *buf, uint16_t buflen) 461{ 462 struct usb2_device_request req; 463 464 req.bmRequestType = UT_READ_VENDOR_DEVICE; 465 req.bRequest = reqno; 466 USETW(req.wValue, value); 467 USETW(req.wIndex, index); 468 USETW(req.wLength, buflen); 469 470 uchcom_do_request(sc, &req, buf); 471} 472 473static void 474uchcom_write_reg(struct uchcom_softc *sc, 475 uint8_t reg1, uint8_t val1, uint8_t reg2, uint8_t val2) 476{ 477 DPRINTF("0x%02X<-0x%02X, 0x%02X<-0x%02X\n", 478 (unsigned)reg1, (unsigned)val1, 479 (unsigned)reg2, (unsigned)val2); 480 uchcom_ctrl_write( 481 sc, UCHCOM_REQ_WRITE_REG, 482 reg1 | ((uint16_t)reg2 << 8), val1 | ((uint16_t)val2 << 8)); 483} 484 485static void 486uchcom_read_reg(struct uchcom_softc *sc, 487 uint8_t reg1, uint8_t *rval1, uint8_t reg2, uint8_t *rval2) 488{ 489 uint8_t buf[UCHCOM_INPUT_BUF_SIZE]; 490 491 uchcom_ctrl_read( 492 sc, UCHCOM_REQ_READ_REG, 493 reg1 | ((uint16_t)reg2 << 8), 0, buf, sizeof(buf)); 494 495 DPRINTF("0x%02X->0x%02X, 0x%02X->0x%02X\n", 496 (unsigned)reg1, (unsigned)buf[0], 497 (unsigned)reg2, (unsigned)buf[1]); 498 499 if (rval1) 500 *rval1 = buf[0]; 501 if (rval2) 502 *rval2 = buf[1]; 503} 504 505static void 506uchcom_get_version(struct uchcom_softc *sc, uint8_t *rver) 507{ 508 uint8_t buf[UCHCOM_INPUT_BUF_SIZE]; 509 510 uchcom_ctrl_read( 511 sc, UCHCOM_REQ_GET_VERSION, 0, 0, buf, sizeof(buf)); 512 513 if (rver) 514 *rver = buf[0]; 515} 516 517static void 518uchcom_get_status(struct uchcom_softc *sc, uint8_t *rval) 519{ 520 uchcom_read_reg(sc, UCHCOM_REG_STAT1, rval, UCHCOM_REG_STAT2, NULL); 521} 522 523static void 524uchcom_set_dtrrts_10(struct uchcom_softc *sc, uint8_t val) 525{ 526 uchcom_write_reg(sc, UCHCOM_REG_STAT1, val, UCHCOM_REG_STAT1, val); 527} 528 529static void 530uchcom_set_dtrrts_20(struct uchcom_softc *sc, uint8_t val) 531{ 532 uchcom_ctrl_write(sc, UCHCOM_REQ_SET_DTRRTS, val, 0); 533} 534 535 536/* ---------------------------------------------------------------------- 537 * middle layer 538 */ 539 540static void 541uchcom_update_version(struct uchcom_softc *sc) 542{ 543 uchcom_get_version(sc, &sc->sc_version); 544} 545 546static void 547uchcom_convert_status(struct uchcom_softc *sc, uint8_t cur) 548{ 549 sc->sc_dtr = !(cur & UCHCOM_DTR_MASK); 550 sc->sc_rts = !(cur & UCHCOM_RTS_MASK); 551 552 cur = ~cur & 0x0F; 553 sc->sc_msr = (cur << 4) | ((sc->sc_msr >> 4) ^ cur); 554} 555 556static void 557uchcom_update_status(struct uchcom_softc *sc) 558{ 559 uint8_t cur; 560 561 uchcom_get_status(sc, &cur); 562 uchcom_convert_status(sc, cur); 563} 564 565 566static void 567uchcom_set_dtrrts(struct uchcom_softc *sc) 568{ 569 uint8_t val = 0; 570 571 if (sc->sc_dtr) 572 val |= UCHCOM_DTR_MASK; 573 if (sc->sc_rts) 574 val |= UCHCOM_RTS_MASK; 575 576 if (sc->sc_version < UCHCOM_VER_20) 577 uchcom_set_dtrrts_10(sc, ~val); 578 else 579 uchcom_set_dtrrts_20(sc, ~val); 580} 581 582static void 583uchcom_cfg_set_break(struct usb2_com_softc *ucom, uint8_t onoff) 584{ 585 struct uchcom_softc *sc = ucom->sc_parent; 586 uint8_t brk1; 587 uint8_t brk2; 588 589 uchcom_read_reg(sc, UCHCOM_REG_BREAK1, &brk1, UCHCOM_REG_BREAK2, &brk2); 590 if (onoff) { 591 /* on - clear bits */ 592 brk1 &= ~UCHCOM_BRK1_MASK; 593 brk2 &= ~UCHCOM_BRK2_MASK; 594 } else { 595 /* off - set bits */ 596 brk1 |= UCHCOM_BRK1_MASK; 597 brk2 |= UCHCOM_BRK2_MASK; 598 } 599 uchcom_write_reg(sc, UCHCOM_REG_BREAK1, brk1, UCHCOM_REG_BREAK2, brk2); 600} 601 602static int 603uchcom_calc_divider_settings(struct uchcom_divider *dp, uint32_t rate) 604{ 605 const struct uchcom_divider_record *rp; 606 uint32_t div; 607 uint32_t rem; 608 uint32_t mod; 609 uint8_t i; 610 611 /* find record */ 612 for (i = 0; i != NUM_DIVIDERS; i++) { 613 if (dividers[i].dvr_high >= rate && 614 dividers[i].dvr_low <= rate) { 615 rp = ÷rs[i]; 616 goto found; 617 } 618 } 619 return (-1); 620 621found: 622 dp->dv_prescaler = rp->dvr_divider.dv_prescaler; 623 if (rp->dvr_base_clock == UCHCOM_BASE_UNKNOWN) 624 dp->dv_div = rp->dvr_divider.dv_div; 625 else { 626 div = rp->dvr_base_clock / rate; 627 rem = rp->dvr_base_clock % rate; 628 if (div == 0 || div >= 0xFF) 629 return (-1); 630 if ((rem << 1) >= rate) 631 div += 1; 632 dp->dv_div = (uint8_t)-div; 633 } 634 635 mod = UCHCOM_BPS_MOD_BASE / rate + UCHCOM_BPS_MOD_BASE_OFS; 636 mod = mod + mod / 2; 637 638 dp->dv_mod = mod / 0x100; 639 640 return (0); 641} 642 643static void 644uchcom_set_dte_rate(struct uchcom_softc *sc, uint32_t rate) 645{ 646 struct uchcom_divider dv; 647 648 if (uchcom_calc_divider_settings(&dv, rate)) 649 return; 650 651 uchcom_write_reg(sc, 652 UCHCOM_REG_BPS_PRE, dv.dv_prescaler, 653 UCHCOM_REG_BPS_DIV, dv.dv_div); 654 uchcom_write_reg(sc, 655 UCHCOM_REG_BPS_MOD, dv.dv_mod, 656 UCHCOM_REG_BPS_PAD, 0); 657} 658 659static void 660uchcom_set_line_control(struct uchcom_softc *sc, tcflag_t cflag) 661{ 662 uint8_t lcr1 = 0; 663 uint8_t lcr2 = 0; 664 665 uchcom_read_reg(sc, UCHCOM_REG_LCR1, &lcr1, UCHCOM_REG_LCR2, &lcr2); 666 667 lcr1 &= ~UCHCOM_LCR1_MASK; 668 lcr2 &= ~UCHCOM_LCR2_MASK; 669 670 /* 671 * XXX: it is difficult to handle the line control appropriately: 672 * - CS8, !CSTOPB and any parity mode seems ok, but 673 * - the chip doesn't have the function to calculate parity 674 * in !CS8 mode. 675 * - it is unclear that the chip supports CS5,6 mode. 676 * - it is unclear how to handle stop bits. 677 */ 678 679 if (cflag & PARENB) { 680 lcr1 |= UCHCOM_LCR1_PARENB; 681 if (cflag & PARODD) 682 lcr2 |= UCHCOM_LCR2_PARODD; 683 else 684 lcr2 |= UCHCOM_LCR2_PAREVEN; 685 } 686 uchcom_write_reg(sc, UCHCOM_REG_LCR1, lcr1, UCHCOM_REG_LCR2, lcr2); 687} 688 689static void 690uchcom_clear_chip(struct uchcom_softc *sc) 691{ 692 DPRINTF("\n"); 693 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0, 0); 694} 695 696static void 697uchcom_reset_chip(struct uchcom_softc *sc) 698{ 699 uint16_t val; 700 uint16_t idx; 701 uint8_t lcr1; 702 uint8_t lcr2; 703 uint8_t pre; 704 uint8_t div; 705 uint8_t mod; 706 707 uchcom_read_reg(sc, UCHCOM_REG_LCR1, &lcr1, UCHCOM_REG_LCR2, &lcr2); 708 uchcom_read_reg(sc, UCHCOM_REG_BPS_PRE, &pre, UCHCOM_REG_BPS_DIV, &div); 709 uchcom_read_reg(sc, UCHCOM_REG_BPS_MOD, &mod, UCHCOM_REG_BPS_PAD, NULL); 710 711 val = 0; 712 idx = 0; 713 val |= (uint16_t)(lcr1 & 0xF0) << 8; 714 val |= 0x01; 715 val |= (uint16_t)(lcr2 & 0x0F) << 8; 716 val |= 0x02; 717 idx |= pre & 0x07; 718 val |= 0x04; 719 idx |= (uint16_t)div << 8; 720 val |= 0x08; 721 idx |= mod & 0xF8; 722 val |= 0x10; 723 724 DPRINTF("reset v=0x%04X, i=0x%04X\n", val, idx); 725 726 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, val, idx); 727} 728 729/* ---------------------------------------------------------------------- 730 * methods for ucom 731 */ 732static void 733uchcom_cfg_get_status(struct usb2_com_softc *ucom, uint8_t *lsr, uint8_t *msr) 734{ 735 struct uchcom_softc *sc = ucom->sc_parent; 736 737 DPRINTF("\n"); 738 739 *lsr = sc->sc_lsr; 740 *msr = sc->sc_msr; 741} 742 743static void 744uchcom_cfg_set_dtr(struct usb2_com_softc *ucom, uint8_t onoff) 745{ 746 struct uchcom_softc *sc = ucom->sc_parent; 747 748 DPRINTF("onoff = %d\n", onoff); 749 750 sc->sc_dtr = onoff; 751 uchcom_set_dtrrts(sc); 752} 753 754static void 755uchcom_cfg_set_rts(struct usb2_com_softc *ucom, uint8_t onoff) 756{ 757 struct uchcom_softc *sc = ucom->sc_parent; 758 759 DPRINTF("onoff = %d\n", onoff); 760 761 sc->sc_rts = onoff; 762 uchcom_set_dtrrts(sc); 763} 764 765static int 766uchcom_pre_param(struct usb2_com_softc *ucom, struct termios *t) 767{ 768 struct uchcom_divider dv; 769 770 switch (t->c_cflag & CSIZE) { 771 case CS5: 772 case CS6: 773 case CS7: 774 return (EIO); 775 default: 776 break; 777 } 778 779 if (uchcom_calc_divider_settings(&dv, t->c_ospeed)) { 780 return (EIO); 781 } 782 return (0); /* success */ 783} 784 785static void 786uchcom_cfg_param(struct usb2_com_softc *ucom, struct termios *t) 787{ 788 struct uchcom_softc *sc = ucom->sc_parent; 789 790 uchcom_set_line_control(sc, t->c_cflag); 791 uchcom_set_dte_rate(sc, t->c_ospeed); 792} 793 794static void 795uchcom_start_read(struct usb2_com_softc *ucom) 796{ 797 struct uchcom_softc *sc = ucom->sc_parent; 798 799 /* start interrupt endpoint */ 800 usb2_transfer_start(sc->sc_xfer[UCHCOM_INTR_DT_RD]); 801 802 /* start read endpoint */ 803 usb2_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_RD]); 804} 805 806static void 807uchcom_stop_read(struct usb2_com_softc *ucom) 808{ 809 struct uchcom_softc *sc = ucom->sc_parent; 810 811 /* stop interrupt endpoint */ 812 usb2_transfer_stop(sc->sc_xfer[UCHCOM_INTR_DT_RD]); 813 814 /* stop read endpoint */ 815 usb2_transfer_stop(sc->sc_xfer[UCHCOM_BULK_CS_RD]); 816 usb2_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_RD]); 817} 818 819static void 820uchcom_start_write(struct usb2_com_softc *ucom) 821{ 822 struct uchcom_softc *sc = ucom->sc_parent; 823 824 usb2_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_WR]); 825} 826 827static void 828uchcom_stop_write(struct usb2_com_softc *ucom) 829{ 830 struct uchcom_softc *sc = ucom->sc_parent; 831 832 usb2_transfer_stop(sc->sc_xfer[UCHCOM_BULK_CS_WR]); 833 usb2_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_WR]); 834} 835 836/* ---------------------------------------------------------------------- 837 * callback when the modem status is changed. 838 */ 839static void 840uchcom_intr_callback(struct usb2_xfer *xfer) 841{ 842 struct uchcom_softc *sc = xfer->priv_sc; 843 uint8_t buf[UCHCOM_INTR_LEAST]; 844 845 switch (USB_GET_STATE(xfer)) { 846 case USB_ST_TRANSFERRED: 847 848 DPRINTF("actlen = %u\n", xfer->actlen); 849 850 if (xfer->actlen >= UCHCOM_INTR_LEAST) { 851 usb2_copy_out(xfer->frbuffers, 0, buf, 852 UCHCOM_INTR_LEAST); 853 854 DPRINTF("data = 0x%02X 0x%02X 0x%02X 0x%02X\n", 855 (unsigned)buf[0], (unsigned)buf[1], 856 (unsigned)buf[2], (unsigned)buf[3]); 857 858 uchcom_convert_status(sc, buf[UCHCOM_INTR_STAT1]); 859 usb2_com_status_change(&sc->sc_ucom); 860 } 861 case USB_ST_SETUP: 862 if (sc->sc_flag & UCHCOM_FLAG_INTR_STALL) { 863 usb2_transfer_start(sc->sc_xfer[UCHCOM_INTR_CS_RD]); 864 } else { 865 xfer->frlengths[0] = xfer->max_data_length; 866 usb2_start_hardware(xfer); 867 } 868 break; 869 870 default: /* Error */ 871 if (xfer->error != USB_ERR_CANCELLED) { 872 sc->sc_flag |= UCHCOM_FLAG_INTR_STALL; 873 usb2_transfer_start(sc->sc_xfer[UCHCOM_INTR_CS_RD]); 874 } 875 break; 876 } 877} 878 879static void 880uchcom_intr_clear_stall_callback(struct usb2_xfer *xfer) 881{ 882 struct uchcom_softc *sc = xfer->priv_sc; 883 struct usb2_xfer *xfer_other = sc->sc_xfer[UCHCOM_INTR_DT_RD]; 884 885 if (usb2_clear_stall_callback(xfer, xfer_other)) { 886 DPRINTF("stall cleared\n"); 887 sc->sc_flag &= ~UCHCOM_FLAG_INTR_STALL; 888 usb2_transfer_start(xfer_other); 889 } 890} 891 892static void 893uchcom_write_callback(struct usb2_xfer *xfer) 894{ 895 struct uchcom_softc *sc = xfer->priv_sc; 896 uint32_t actlen; 897 898 switch (USB_GET_STATE(xfer)) { 899 case USB_ST_SETUP: 900 case USB_ST_TRANSFERRED: 901 if (sc->sc_flag & UCHCOM_FLAG_WRITE_STALL) { 902 usb2_transfer_start(sc->sc_xfer[UCHCOM_BULK_CS_WR]); 903 return; 904 } 905 if (usb2_com_get_data(&sc->sc_ucom, xfer->frbuffers, 0, 906 UCHCOM_BULK_BUF_SIZE, &actlen)) { 907 908 DPRINTF("actlen = %d\n", actlen); 909 910 xfer->frlengths[0] = actlen; 911 usb2_start_hardware(xfer); 912 } 913 return; 914 915 default: /* Error */ 916 if (xfer->error != USB_ERR_CANCELLED) { 917 sc->sc_flag |= UCHCOM_FLAG_WRITE_STALL; 918 usb2_transfer_start(sc->sc_xfer[UCHCOM_BULK_CS_WR]); 919 } 920 return; 921 922 } 923} 924 925static void 926uchcom_write_clear_stall_callback(struct usb2_xfer *xfer) 927{ 928 struct uchcom_softc *sc = xfer->priv_sc; 929 struct usb2_xfer *xfer_other = sc->sc_xfer[UCHCOM_BULK_DT_WR]; 930 931 if (usb2_clear_stall_callback(xfer, xfer_other)) { 932 DPRINTF("stall cleared\n"); 933 sc->sc_flag &= ~UCHCOM_FLAG_WRITE_STALL; 934 usb2_transfer_start(xfer_other); 935 } 936} 937 938static void 939uchcom_read_callback(struct usb2_xfer *xfer) 940{ 941 struct uchcom_softc *sc = xfer->priv_sc; 942 943 switch (USB_GET_STATE(xfer)) { 944 case USB_ST_TRANSFERRED: 945 usb2_com_put_data(&sc->sc_ucom, xfer->frbuffers, 0, xfer->actlen); 946 947 case USB_ST_SETUP: 948 if (sc->sc_flag & UCHCOM_FLAG_READ_STALL) { 949 usb2_transfer_start(sc->sc_xfer[UCHCOM_BULK_CS_RD]); 950 } else { 951 xfer->frlengths[0] = xfer->max_data_length; 952 usb2_start_hardware(xfer); 953 } 954 return; 955 956 default: /* Error */ 957 if (xfer->error != USB_ERR_CANCELLED) { 958 sc->sc_flag |= UCHCOM_FLAG_READ_STALL; 959 usb2_transfer_start(sc->sc_xfer[UCHCOM_BULK_CS_RD]); 960 } 961 return; 962 963 } 964} 965 966static void 967uchcom_read_clear_stall_callback(struct usb2_xfer *xfer) 968{ 969 struct uchcom_softc *sc = xfer->priv_sc; 970 struct usb2_xfer *xfer_other = sc->sc_xfer[UCHCOM_BULK_DT_RD]; 971 972 if (usb2_clear_stall_callback(xfer, xfer_other)) { 973 DPRINTF("stall cleared\n"); 974 sc->sc_flag &= ~UCHCOM_FLAG_READ_STALL; 975 usb2_transfer_start(xfer_other); 976 } 977} 978 979static device_method_t uchcom_methods[] = { 980 /* Device interface */ 981 DEVMETHOD(device_probe, uchcom_probe), 982 DEVMETHOD(device_attach, uchcom_attach), 983 DEVMETHOD(device_detach, uchcom_detach), 984 985 {0, 0} 986}; 987 988static driver_t uchcom_driver = { 989 "ucom", 990 uchcom_methods, 991 sizeof(struct uchcom_softc) 992}; 993 994static devclass_t uchcom_devclass; 995 996DRIVER_MODULE(uchcom, ushub, uchcom_driver, uchcom_devclass, NULL, 0); 997MODULE_DEPEND(uchcom, usb2_serial, 1, 1, 1); 998MODULE_DEPEND(uchcom, usb2_core, 1, 1, 1); 999