uchcom.c revision 187259
1/* $NetBSD: uchcom.c,v 1.1 2007/09/03 17:57:37 tshiozak Exp $ */ 2 3/*- 4 * Copyright (c) 2007, Takanori Watanabe 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29/* 30 * Copyright (c) 2007 The NetBSD Foundation, Inc. 31 * All rights reserved. 32 * 33 * This code is derived from software contributed to The NetBSD Foundation 34 * by Takuya SHIOZAKI (tshiozak@netbsd.org). 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed by the NetBSD 47 * Foundation, Inc. and its contributors. 48 * 4. Neither the name of The NetBSD Foundation nor the names of its 49 * contributors may be used to endorse or promote products derived 50 * from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 53 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 54 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 55 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 56 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 62 * POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65#include <sys/cdefs.h> 66__FBSDID("$FreeBSD: head/sys/dev/usb2/serial/uchcom2.c 187259 2009-01-15 02:35:40Z thompsa $"); 67 68/* 69 * driver for WinChipHead CH341/340, the worst USB-serial chip in the world. 70 */ 71 72#include <dev/usb2/include/usb2_devid.h> 73#include <dev/usb2/include/usb2_standard.h> 74#include <dev/usb2/include/usb2_mfunc.h> 75#include <dev/usb2/include/usb2_error.h> 76#include <dev/usb2/include/usb2_cdc.h> 77#include <dev/usb2/include/usb2_ioctl.h> 78 79#define USB_DEBUG_VAR uchcom_debug 80 81#include <dev/usb2/core/usb2_core.h> 82#include <dev/usb2/core/usb2_debug.h> 83#include <dev/usb2/core/usb2_process.h> 84#include <dev/usb2/core/usb2_request.h> 85#include <dev/usb2/core/usb2_lookup.h> 86#include <dev/usb2/core/usb2_util.h> 87#include <dev/usb2/core/usb2_busdma.h> 88 89#include <dev/usb2/serial/usb2_serial.h> 90 91#if USB_DEBUG 92static int uchcom_debug = 0; 93 94SYSCTL_NODE(_hw_usb2, OID_AUTO, uchcom, CTLFLAG_RW, 0, "USB uchcom"); 95SYSCTL_INT(_hw_usb2_uchcom, OID_AUTO, debug, CTLFLAG_RW, 96 &uchcom_debug, 0, "uchcom debug level"); 97#endif 98 99#define UCHCOM_IFACE_INDEX 0 100#define UCHCOM_CONFIG_INDEX 0 101 102#define UCHCOM_REV_CH340 0x0250 103#define UCHCOM_INPUT_BUF_SIZE 8 104 105#define UCHCOM_REQ_GET_VERSION 0x5F 106#define UCHCOM_REQ_READ_REG 0x95 107#define UCHCOM_REQ_WRITE_REG 0x9A 108#define UCHCOM_REQ_RESET 0xA1 109#define UCHCOM_REQ_SET_DTRRTS 0xA4 110 111#define UCHCOM_REG_STAT1 0x06 112#define UCHCOM_REG_STAT2 0x07 113#define UCHCOM_REG_BPS_PRE 0x12 114#define UCHCOM_REG_BPS_DIV 0x13 115#define UCHCOM_REG_BPS_MOD 0x14 116#define UCHCOM_REG_BPS_PAD 0x0F 117#define UCHCOM_REG_BREAK1 0x05 118#define UCHCOM_REG_BREAK2 0x18 119#define UCHCOM_REG_LCR1 0x18 120#define UCHCOM_REG_LCR2 0x25 121 122#define UCHCOM_VER_20 0x20 123 124#define UCHCOM_BASE_UNKNOWN 0 125#define UCHCOM_BPS_MOD_BASE 20000000 126#define UCHCOM_BPS_MOD_BASE_OFS 1100 127 128#define UCHCOM_DTR_MASK 0x20 129#define UCHCOM_RTS_MASK 0x40 130 131#define UCHCOM_BRK1_MASK 0x01 132#define UCHCOM_BRK2_MASK 0x40 133 134#define UCHCOM_LCR1_MASK 0xAF 135#define UCHCOM_LCR2_MASK 0x07 136#define UCHCOM_LCR1_PARENB 0x80 137#define UCHCOM_LCR2_PAREVEN 0x07 138#define UCHCOM_LCR2_PARODD 0x06 139#define UCHCOM_LCR2_PARMARK 0x05 140#define UCHCOM_LCR2_PARSPACE 0x04 141 142#define UCHCOM_INTR_STAT1 0x02 143#define UCHCOM_INTR_STAT2 0x03 144#define UCHCOM_INTR_LEAST 4 145 146#define UCHCOM_BULK_BUF_SIZE 1024 /* bytes */ 147 148enum { 149 UCHCOM_BULK_DT_WR, 150 UCHCOM_BULK_DT_RD, 151 UCHCOM_BULK_CS_WR, 152 UCHCOM_BULK_CS_RD, 153 UCHCOM_INTR_DT_RD, 154 UCHCOM_INTR_CS_RD, 155 UCHCOM_N_TRANSFER = 6, 156}; 157 158struct uchcom_softc { 159 struct usb2_com_super_softc sc_super_ucom; 160 struct usb2_com_softc sc_ucom; 161 162 struct usb2_xfer *sc_xfer[UCHCOM_N_TRANSFER]; 163 struct usb2_device *sc_udev; 164 165 uint8_t sc_dtr; /* local copy */ 166 uint8_t sc_rts; /* local copy */ 167 uint8_t sc_version; 168 uint8_t sc_msr; 169 uint8_t sc_lsr; /* local status register */ 170 uint8_t sc_flag; 171#define UCHCOM_FLAG_INTR_STALL 0x01 172#define UCHCOM_FLAG_READ_STALL 0x02 173#define UCHCOM_FLAG_WRITE_STALL 0x04 174}; 175 176struct uchcom_divider { 177 uint8_t dv_prescaler; 178 uint8_t dv_div; 179 uint8_t dv_mod; 180}; 181 182struct uchcom_divider_record { 183 uint32_t dvr_high; 184 uint32_t dvr_low; 185 uint32_t dvr_base_clock; 186 struct uchcom_divider dvr_divider; 187}; 188 189static const struct uchcom_divider_record dividers[] = 190{ 191 {307200, 307200, UCHCOM_BASE_UNKNOWN, {7, 0xD9, 0}}, 192 {921600, 921600, UCHCOM_BASE_UNKNOWN, {7, 0xF3, 0}}, 193 {2999999, 23530, 6000000, {3, 0, 0}}, 194 {23529, 2942, 750000, {2, 0, 0}}, 195 {2941, 368, 93750, {1, 0, 0}}, 196 {367, 1, 11719, {0, 0, 0}}, 197}; 198 199#define NUM_DIVIDERS (sizeof (dividers) / sizeof (dividers[0])) 200 201static const struct usb2_device_id uchcom_devs[] = { 202 {USB_VPI(USB_VENDOR_WCH, USB_PRODUCT_WCH_CH341SER, 0)}, 203}; 204 205/* protypes */ 206 207static int uchcom_pre_param(struct usb2_com_softc *, struct termios *); 208static void uchcom_cfg_get_status(struct usb2_com_softc *, uint8_t *, 209 uint8_t *); 210static void uchcom_cfg_param(struct usb2_com_softc *, struct termios *); 211static void uchcom_cfg_set_break(struct usb2_com_softc *, uint8_t); 212static void uchcom_cfg_set_dtr(struct usb2_com_softc *, uint8_t); 213static void uchcom_cfg_set_rts(struct usb2_com_softc *, uint8_t); 214static void uchcom_start_read(struct usb2_com_softc *); 215static void uchcom_start_write(struct usb2_com_softc *); 216static void uchcom_stop_read(struct usb2_com_softc *); 217static void uchcom_stop_write(struct usb2_com_softc *); 218static void uchcom_update_version(struct uchcom_softc *); 219static void uchcom_convert_status(struct uchcom_softc *, uint8_t); 220static void uchcom_update_status(struct uchcom_softc *); 221static void uchcom_set_dtrrts(struct uchcom_softc *); 222static int uchcom_calc_divider_settings(struct uchcom_divider *, uint32_t); 223static void uchcom_set_dte_rate(struct uchcom_softc *, uint32_t); 224static void uchcom_set_line_control(struct uchcom_softc *, tcflag_t); 225static void uchcom_clear_chip(struct uchcom_softc *); 226static void uchcom_reset_chip(struct uchcom_softc *); 227 228static device_probe_t uchcom_probe; 229static device_attach_t uchcom_attach; 230static device_detach_t uchcom_detach; 231 232static usb2_callback_t uchcom_intr_callback; 233static usb2_callback_t uchcom_intr_clear_stall_callback; 234static usb2_callback_t uchcom_write_callback; 235static usb2_callback_t uchcom_write_clear_stall_callback; 236static usb2_callback_t uchcom_read_callback; 237static usb2_callback_t uchcom_read_clear_stall_callback; 238 239static const struct usb2_config uchcom_config_data[UCHCOM_N_TRANSFER] = { 240 241 [UCHCOM_BULK_DT_WR] = { 242 .type = UE_BULK, 243 .endpoint = UE_ADDR_ANY, 244 .direction = UE_DIR_OUT, 245 .mh.bufsize = UCHCOM_BULK_BUF_SIZE, 246 .mh.flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 247 .mh.callback = &uchcom_write_callback, 248 }, 249 250 [UCHCOM_BULK_DT_RD] = { 251 .type = UE_BULK, 252 .endpoint = UE_ADDR_ANY, 253 .direction = UE_DIR_IN, 254 .mh.bufsize = UCHCOM_BULK_BUF_SIZE, 255 .mh.flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 256 .mh.callback = &uchcom_read_callback, 257 }, 258 259 [UCHCOM_BULK_CS_WR] = { 260 .type = UE_CONTROL, 261 .endpoint = 0x00, /* Control pipe */ 262 .direction = UE_DIR_ANY, 263 .mh.bufsize = sizeof(struct usb2_device_request), 264 .mh.callback = &uchcom_write_clear_stall_callback, 265 .mh.timeout = 1000, /* 1 second */ 266 .mh.interval = 50, /* 50ms */ 267 }, 268 269 [UCHCOM_BULK_CS_RD] = { 270 .type = UE_CONTROL, 271 .endpoint = 0x00, /* Control pipe */ 272 .direction = UE_DIR_ANY, 273 .mh.bufsize = sizeof(struct usb2_device_request), 274 .mh.callback = &uchcom_read_clear_stall_callback, 275 .mh.timeout = 1000, /* 1 second */ 276 .mh.interval = 50, /* 50ms */ 277 }, 278 279 [UCHCOM_INTR_DT_RD] = { 280 .type = UE_INTERRUPT, 281 .endpoint = UE_ADDR_ANY, 282 .direction = UE_DIR_IN, 283 .mh.flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 284 .mh.bufsize = 0, /* use wMaxPacketSize */ 285 .mh.callback = &uchcom_intr_callback, 286 }, 287 288 [UCHCOM_INTR_CS_RD] = { 289 .type = UE_CONTROL, 290 .endpoint = 0x00, /* Control pipe */ 291 .direction = UE_DIR_ANY, 292 .mh.bufsize = sizeof(struct usb2_device_request), 293 .mh.callback = &uchcom_intr_clear_stall_callback, 294 .mh.timeout = 1000, /* 1 second */ 295 .mh.interval = 50, /* 50ms */ 296 }, 297}; 298 299struct usb2_com_callback uchcom_callback = { 300 .usb2_com_cfg_get_status = &uchcom_cfg_get_status, 301 .usb2_com_cfg_set_dtr = &uchcom_cfg_set_dtr, 302 .usb2_com_cfg_set_rts = &uchcom_cfg_set_rts, 303 .usb2_com_cfg_set_break = &uchcom_cfg_set_break, 304 .usb2_com_cfg_param = &uchcom_cfg_param, 305 .usb2_com_pre_param = &uchcom_pre_param, 306 .usb2_com_start_read = &uchcom_start_read, 307 .usb2_com_stop_read = &uchcom_stop_read, 308 .usb2_com_start_write = &uchcom_start_write, 309 .usb2_com_stop_write = &uchcom_stop_write, 310}; 311 312/* ---------------------------------------------------------------------- 313 * driver entry points 314 */ 315 316static int 317uchcom_probe(device_t dev) 318{ 319 struct usb2_attach_arg *uaa = device_get_ivars(dev); 320 321 DPRINTFN(11, "\n"); 322 323 if (uaa->usb2_mode != USB_MODE_HOST) { 324 return (ENXIO); 325 } 326 if (uaa->info.bConfigIndex != UCHCOM_CONFIG_INDEX) { 327 return (ENXIO); 328 } 329 if (uaa->info.bIfaceIndex != UCHCOM_IFACE_INDEX) { 330 return (ENXIO); 331 } 332 return (usb2_lookup_id_by_uaa(uchcom_devs, sizeof(uchcom_devs), uaa)); 333} 334 335static int 336uchcom_attach(device_t dev) 337{ 338 struct uchcom_softc *sc = device_get_softc(dev); 339 struct usb2_attach_arg *uaa = device_get_ivars(dev); 340 int error; 341 uint8_t iface_index; 342 343 DPRINTFN(11, "\n"); 344 345 if (sc == NULL) { 346 return (ENOMEM); 347 } 348 device_set_usb2_desc(dev); 349 350 sc->sc_udev = uaa->device; 351 352 switch (uaa->info.bcdDevice) { 353 case UCHCOM_REV_CH340: 354 device_printf(dev, "CH340 detected\n"); 355 break; 356 default: 357 device_printf(dev, "CH341 detected\n"); 358 break; 359 } 360 361 iface_index = UCHCOM_IFACE_INDEX; 362 error = usb2_transfer_setup(uaa->device, 363 &iface_index, sc->sc_xfer, uchcom_config_data, 364 UCHCOM_N_TRANSFER, sc, &Giant); 365 366 if (error) { 367 DPRINTF("one or more missing USB endpoints, " 368 "error=%s\n", usb2_errstr(error)); 369 goto detach; 370 } 371 /* 372 * Do the initialization during attach so that the system does not 373 * sleep during open: 374 */ 375 uchcom_update_version(sc); 376 uchcom_clear_chip(sc); 377 uchcom_reset_chip(sc); 378 uchcom_update_status(sc); 379 380 sc->sc_dtr = 1; 381 sc->sc_rts = 1; 382 383 /* clear stall at first run */ 384 sc->sc_flag |= (UCHCOM_FLAG_READ_STALL | 385 UCHCOM_FLAG_WRITE_STALL); 386 387 error = usb2_com_attach(&sc->sc_super_ucom, &sc->sc_ucom, 1, sc, 388 &uchcom_callback, &Giant); 389 if (error) { 390 goto detach; 391 } 392 return (0); 393 394detach: 395 uchcom_detach(dev); 396 return (ENXIO); 397} 398 399static int 400uchcom_detach(device_t dev) 401{ 402 struct uchcom_softc *sc = device_get_softc(dev); 403 404 DPRINTFN(11, "\n"); 405 406 usb2_com_detach(&sc->sc_super_ucom, &sc->sc_ucom, 1); 407 408 usb2_transfer_unsetup(sc->sc_xfer, UCHCOM_N_TRANSFER); 409 410 return (0); 411} 412 413/* ---------------------------------------------------------------------- 414 * low level i/o 415 */ 416 417static void 418uchcom_do_request(struct uchcom_softc *sc, 419 struct usb2_device_request *req, void *data) 420{ 421 uint16_t length; 422 uint16_t actlen; 423 usb2_error_t err; 424 425 length = UGETW(req->wLength); 426 actlen = 0; 427 428 if (usb2_com_cfg_is_gone(&sc->sc_ucom)) { 429 goto done; 430 } 431 err = usb2_do_request_flags(sc->sc_udev, &Giant, req, 432 data, USB_SHORT_XFER_OK, &actlen, 1000); 433 434 if (err) { 435 DPRINTFN(0, "device request failed, err=%s " 436 "(ignored)\n", usb2_errstr(err)); 437 } 438done: 439 if (length != actlen) { 440 if (req->bmRequestType & UT_READ) { 441 bzero(USB_ADD_BYTES(data, actlen), length - actlen); 442 } 443 } 444} 445 446static void 447uchcom_ctrl_write(struct uchcom_softc *sc, uint8_t reqno, 448 uint16_t value, uint16_t index) 449{ 450 struct usb2_device_request req; 451 452 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 453 req.bRequest = reqno; 454 USETW(req.wValue, value); 455 USETW(req.wIndex, index); 456 USETW(req.wLength, 0); 457 458 uchcom_do_request(sc, &req, NULL); 459} 460 461static void 462uchcom_ctrl_read(struct uchcom_softc *sc, uint8_t reqno, 463 uint16_t value, uint16_t index, void *buf, uint16_t buflen) 464{ 465 struct usb2_device_request req; 466 467 req.bmRequestType = UT_READ_VENDOR_DEVICE; 468 req.bRequest = reqno; 469 USETW(req.wValue, value); 470 USETW(req.wIndex, index); 471 USETW(req.wLength, buflen); 472 473 uchcom_do_request(sc, &req, buf); 474} 475 476static void 477uchcom_write_reg(struct uchcom_softc *sc, 478 uint8_t reg1, uint8_t val1, uint8_t reg2, uint8_t val2) 479{ 480 DPRINTF("0x%02X<-0x%02X, 0x%02X<-0x%02X\n", 481 (unsigned)reg1, (unsigned)val1, 482 (unsigned)reg2, (unsigned)val2); 483 uchcom_ctrl_write( 484 sc, UCHCOM_REQ_WRITE_REG, 485 reg1 | ((uint16_t)reg2 << 8), val1 | ((uint16_t)val2 << 8)); 486} 487 488static void 489uchcom_read_reg(struct uchcom_softc *sc, 490 uint8_t reg1, uint8_t *rval1, uint8_t reg2, uint8_t *rval2) 491{ 492 uint8_t buf[UCHCOM_INPUT_BUF_SIZE]; 493 494 uchcom_ctrl_read( 495 sc, UCHCOM_REQ_READ_REG, 496 reg1 | ((uint16_t)reg2 << 8), 0, buf, sizeof(buf)); 497 498 DPRINTF("0x%02X->0x%02X, 0x%02X->0x%02X\n", 499 (unsigned)reg1, (unsigned)buf[0], 500 (unsigned)reg2, (unsigned)buf[1]); 501 502 if (rval1) 503 *rval1 = buf[0]; 504 if (rval2) 505 *rval2 = buf[1]; 506} 507 508static void 509uchcom_get_version(struct uchcom_softc *sc, uint8_t *rver) 510{ 511 uint8_t buf[UCHCOM_INPUT_BUF_SIZE]; 512 513 uchcom_ctrl_read( 514 sc, UCHCOM_REQ_GET_VERSION, 0, 0, buf, sizeof(buf)); 515 516 if (rver) 517 *rver = buf[0]; 518} 519 520static void 521uchcom_get_status(struct uchcom_softc *sc, uint8_t *rval) 522{ 523 uchcom_read_reg(sc, UCHCOM_REG_STAT1, rval, UCHCOM_REG_STAT2, NULL); 524} 525 526static void 527uchcom_set_dtrrts_10(struct uchcom_softc *sc, uint8_t val) 528{ 529 uchcom_write_reg(sc, UCHCOM_REG_STAT1, val, UCHCOM_REG_STAT1, val); 530} 531 532static void 533uchcom_set_dtrrts_20(struct uchcom_softc *sc, uint8_t val) 534{ 535 uchcom_ctrl_write(sc, UCHCOM_REQ_SET_DTRRTS, val, 0); 536} 537 538 539/* ---------------------------------------------------------------------- 540 * middle layer 541 */ 542 543static void 544uchcom_update_version(struct uchcom_softc *sc) 545{ 546 uchcom_get_version(sc, &sc->sc_version); 547} 548 549static void 550uchcom_convert_status(struct uchcom_softc *sc, uint8_t cur) 551{ 552 sc->sc_dtr = !(cur & UCHCOM_DTR_MASK); 553 sc->sc_rts = !(cur & UCHCOM_RTS_MASK); 554 555 cur = ~cur & 0x0F; 556 sc->sc_msr = (cur << 4) | ((sc->sc_msr >> 4) ^ cur); 557} 558 559static void 560uchcom_update_status(struct uchcom_softc *sc) 561{ 562 uint8_t cur; 563 564 uchcom_get_status(sc, &cur); 565 uchcom_convert_status(sc, cur); 566} 567 568 569static void 570uchcom_set_dtrrts(struct uchcom_softc *sc) 571{ 572 uint8_t val = 0; 573 574 if (sc->sc_dtr) 575 val |= UCHCOM_DTR_MASK; 576 if (sc->sc_rts) 577 val |= UCHCOM_RTS_MASK; 578 579 if (sc->sc_version < UCHCOM_VER_20) 580 uchcom_set_dtrrts_10(sc, ~val); 581 else 582 uchcom_set_dtrrts_20(sc, ~val); 583} 584 585static void 586uchcom_cfg_set_break(struct usb2_com_softc *ucom, uint8_t onoff) 587{ 588 struct uchcom_softc *sc = ucom->sc_parent; 589 uint8_t brk1; 590 uint8_t brk2; 591 592 uchcom_read_reg(sc, UCHCOM_REG_BREAK1, &brk1, UCHCOM_REG_BREAK2, &brk2); 593 if (onoff) { 594 /* on - clear bits */ 595 brk1 &= ~UCHCOM_BRK1_MASK; 596 brk2 &= ~UCHCOM_BRK2_MASK; 597 } else { 598 /* off - set bits */ 599 brk1 |= UCHCOM_BRK1_MASK; 600 brk2 |= UCHCOM_BRK2_MASK; 601 } 602 uchcom_write_reg(sc, UCHCOM_REG_BREAK1, brk1, UCHCOM_REG_BREAK2, brk2); 603} 604 605static int 606uchcom_calc_divider_settings(struct uchcom_divider *dp, uint32_t rate) 607{ 608 const struct uchcom_divider_record *rp; 609 uint32_t div; 610 uint32_t rem; 611 uint32_t mod; 612 uint8_t i; 613 614 /* find record */ 615 for (i = 0; i != NUM_DIVIDERS; i++) { 616 if (dividers[i].dvr_high >= rate && 617 dividers[i].dvr_low <= rate) { 618 rp = ÷rs[i]; 619 goto found; 620 } 621 } 622 return (-1); 623 624found: 625 dp->dv_prescaler = rp->dvr_divider.dv_prescaler; 626 if (rp->dvr_base_clock == UCHCOM_BASE_UNKNOWN) 627 dp->dv_div = rp->dvr_divider.dv_div; 628 else { 629 div = rp->dvr_base_clock / rate; 630 rem = rp->dvr_base_clock % rate; 631 if (div == 0 || div >= 0xFF) 632 return (-1); 633 if ((rem << 1) >= rate) 634 div += 1; 635 dp->dv_div = (uint8_t)-div; 636 } 637 638 mod = UCHCOM_BPS_MOD_BASE / rate + UCHCOM_BPS_MOD_BASE_OFS; 639 mod = mod + mod / 2; 640 641 dp->dv_mod = mod / 0x100; 642 643 return (0); 644} 645 646static void 647uchcom_set_dte_rate(struct uchcom_softc *sc, uint32_t rate) 648{ 649 struct uchcom_divider dv; 650 651 if (uchcom_calc_divider_settings(&dv, rate)) 652 return; 653 654 uchcom_write_reg(sc, 655 UCHCOM_REG_BPS_PRE, dv.dv_prescaler, 656 UCHCOM_REG_BPS_DIV, dv.dv_div); 657 uchcom_write_reg(sc, 658 UCHCOM_REG_BPS_MOD, dv.dv_mod, 659 UCHCOM_REG_BPS_PAD, 0); 660} 661 662static void 663uchcom_set_line_control(struct uchcom_softc *sc, tcflag_t cflag) 664{ 665 uint8_t lcr1 = 0; 666 uint8_t lcr2 = 0; 667 668 uchcom_read_reg(sc, UCHCOM_REG_LCR1, &lcr1, UCHCOM_REG_LCR2, &lcr2); 669 670 lcr1 &= ~UCHCOM_LCR1_MASK; 671 lcr2 &= ~UCHCOM_LCR2_MASK; 672 673 /* 674 * XXX: it is difficult to handle the line control appropriately: 675 * - CS8, !CSTOPB and any parity mode seems ok, but 676 * - the chip doesn't have the function to calculate parity 677 * in !CS8 mode. 678 * - it is unclear that the chip supports CS5,6 mode. 679 * - it is unclear how to handle stop bits. 680 */ 681 682 if (cflag & PARENB) { 683 lcr1 |= UCHCOM_LCR1_PARENB; 684 if (cflag & PARODD) 685 lcr2 |= UCHCOM_LCR2_PARODD; 686 else 687 lcr2 |= UCHCOM_LCR2_PAREVEN; 688 } 689 uchcom_write_reg(sc, UCHCOM_REG_LCR1, lcr1, UCHCOM_REG_LCR2, lcr2); 690} 691 692static void 693uchcom_clear_chip(struct uchcom_softc *sc) 694{ 695 DPRINTF("\n"); 696 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, 0, 0); 697} 698 699static void 700uchcom_reset_chip(struct uchcom_softc *sc) 701{ 702 uint16_t val; 703 uint16_t idx; 704 uint8_t lcr1; 705 uint8_t lcr2; 706 uint8_t pre; 707 uint8_t div; 708 uint8_t mod; 709 710 uchcom_read_reg(sc, UCHCOM_REG_LCR1, &lcr1, UCHCOM_REG_LCR2, &lcr2); 711 uchcom_read_reg(sc, UCHCOM_REG_BPS_PRE, &pre, UCHCOM_REG_BPS_DIV, &div); 712 uchcom_read_reg(sc, UCHCOM_REG_BPS_MOD, &mod, UCHCOM_REG_BPS_PAD, NULL); 713 714 val = 0; 715 idx = 0; 716 val |= (uint16_t)(lcr1 & 0xF0) << 8; 717 val |= 0x01; 718 val |= (uint16_t)(lcr2 & 0x0F) << 8; 719 val |= 0x02; 720 idx |= pre & 0x07; 721 val |= 0x04; 722 idx |= (uint16_t)div << 8; 723 val |= 0x08; 724 idx |= mod & 0xF8; 725 val |= 0x10; 726 727 DPRINTF("reset v=0x%04X, i=0x%04X\n", val, idx); 728 729 uchcom_ctrl_write(sc, UCHCOM_REQ_RESET, val, idx); 730} 731 732/* ---------------------------------------------------------------------- 733 * methods for ucom 734 */ 735static void 736uchcom_cfg_get_status(struct usb2_com_softc *ucom, uint8_t *lsr, uint8_t *msr) 737{ 738 struct uchcom_softc *sc = ucom->sc_parent; 739 740 DPRINTF("\n"); 741 742 *lsr = sc->sc_lsr; 743 *msr = sc->sc_msr; 744} 745 746static void 747uchcom_cfg_set_dtr(struct usb2_com_softc *ucom, uint8_t onoff) 748{ 749 struct uchcom_softc *sc = ucom->sc_parent; 750 751 DPRINTF("onoff = %d\n", onoff); 752 753 sc->sc_dtr = onoff; 754 uchcom_set_dtrrts(sc); 755} 756 757static void 758uchcom_cfg_set_rts(struct usb2_com_softc *ucom, uint8_t onoff) 759{ 760 struct uchcom_softc *sc = ucom->sc_parent; 761 762 DPRINTF("onoff = %d\n", onoff); 763 764 sc->sc_rts = onoff; 765 uchcom_set_dtrrts(sc); 766} 767 768static int 769uchcom_pre_param(struct usb2_com_softc *ucom, struct termios *t) 770{ 771 struct uchcom_divider dv; 772 773 switch (t->c_cflag & CSIZE) { 774 case CS5: 775 case CS6: 776 case CS7: 777 return (EIO); 778 default: 779 break; 780 } 781 782 if (uchcom_calc_divider_settings(&dv, t->c_ospeed)) { 783 return (EIO); 784 } 785 return (0); /* success */ 786} 787 788static void 789uchcom_cfg_param(struct usb2_com_softc *ucom, struct termios *t) 790{ 791 struct uchcom_softc *sc = ucom->sc_parent; 792 793 uchcom_set_line_control(sc, t->c_cflag); 794 uchcom_set_dte_rate(sc, t->c_ospeed); 795} 796 797static void 798uchcom_start_read(struct usb2_com_softc *ucom) 799{ 800 struct uchcom_softc *sc = ucom->sc_parent; 801 802 /* start interrupt endpoint */ 803 usb2_transfer_start(sc->sc_xfer[UCHCOM_INTR_DT_RD]); 804 805 /* start read endpoint */ 806 usb2_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_RD]); 807} 808 809static void 810uchcom_stop_read(struct usb2_com_softc *ucom) 811{ 812 struct uchcom_softc *sc = ucom->sc_parent; 813 814 /* stop interrupt endpoint */ 815 usb2_transfer_stop(sc->sc_xfer[UCHCOM_INTR_DT_RD]); 816 817 /* stop read endpoint */ 818 usb2_transfer_stop(sc->sc_xfer[UCHCOM_BULK_CS_RD]); 819 usb2_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_RD]); 820} 821 822static void 823uchcom_start_write(struct usb2_com_softc *ucom) 824{ 825 struct uchcom_softc *sc = ucom->sc_parent; 826 827 usb2_transfer_start(sc->sc_xfer[UCHCOM_BULK_DT_WR]); 828} 829 830static void 831uchcom_stop_write(struct usb2_com_softc *ucom) 832{ 833 struct uchcom_softc *sc = ucom->sc_parent; 834 835 usb2_transfer_stop(sc->sc_xfer[UCHCOM_BULK_CS_WR]); 836 usb2_transfer_stop(sc->sc_xfer[UCHCOM_BULK_DT_WR]); 837} 838 839/* ---------------------------------------------------------------------- 840 * callback when the modem status is changed. 841 */ 842static void 843uchcom_intr_callback(struct usb2_xfer *xfer) 844{ 845 struct uchcom_softc *sc = xfer->priv_sc; 846 uint8_t buf[UCHCOM_INTR_LEAST]; 847 848 switch (USB_GET_STATE(xfer)) { 849 case USB_ST_TRANSFERRED: 850 851 DPRINTF("actlen = %u\n", xfer->actlen); 852 853 if (xfer->actlen >= UCHCOM_INTR_LEAST) { 854 usb2_copy_out(xfer->frbuffers, 0, buf, 855 UCHCOM_INTR_LEAST); 856 857 DPRINTF("data = 0x%02X 0x%02X 0x%02X 0x%02X\n", 858 (unsigned)buf[0], (unsigned)buf[1], 859 (unsigned)buf[2], (unsigned)buf[3]); 860 861 uchcom_convert_status(sc, buf[UCHCOM_INTR_STAT1]); 862 usb2_com_status_change(&sc->sc_ucom); 863 } 864 case USB_ST_SETUP: 865 if (sc->sc_flag & UCHCOM_FLAG_INTR_STALL) { 866 usb2_transfer_start(sc->sc_xfer[UCHCOM_INTR_CS_RD]); 867 } else { 868 xfer->frlengths[0] = xfer->max_data_length; 869 usb2_start_hardware(xfer); 870 } 871 break; 872 873 default: /* Error */ 874 if (xfer->error != USB_ERR_CANCELLED) { 875 sc->sc_flag |= UCHCOM_FLAG_INTR_STALL; 876 usb2_transfer_start(sc->sc_xfer[UCHCOM_INTR_CS_RD]); 877 } 878 break; 879 } 880} 881 882static void 883uchcom_intr_clear_stall_callback(struct usb2_xfer *xfer) 884{ 885 struct uchcom_softc *sc = xfer->priv_sc; 886 struct usb2_xfer *xfer_other = sc->sc_xfer[UCHCOM_INTR_DT_RD]; 887 888 if (usb2_clear_stall_callback(xfer, xfer_other)) { 889 DPRINTF("stall cleared\n"); 890 sc->sc_flag &= ~UCHCOM_FLAG_INTR_STALL; 891 usb2_transfer_start(xfer_other); 892 } 893} 894 895static void 896uchcom_write_callback(struct usb2_xfer *xfer) 897{ 898 struct uchcom_softc *sc = xfer->priv_sc; 899 uint32_t actlen; 900 901 switch (USB_GET_STATE(xfer)) { 902 case USB_ST_SETUP: 903 case USB_ST_TRANSFERRED: 904 if (sc->sc_flag & UCHCOM_FLAG_WRITE_STALL) { 905 usb2_transfer_start(sc->sc_xfer[UCHCOM_BULK_CS_WR]); 906 return; 907 } 908 if (usb2_com_get_data(&sc->sc_ucom, xfer->frbuffers, 0, 909 UCHCOM_BULK_BUF_SIZE, &actlen)) { 910 911 DPRINTF("actlen = %d\n", actlen); 912 913 xfer->frlengths[0] = actlen; 914 usb2_start_hardware(xfer); 915 } 916 return; 917 918 default: /* Error */ 919 if (xfer->error != USB_ERR_CANCELLED) { 920 sc->sc_flag |= UCHCOM_FLAG_WRITE_STALL; 921 usb2_transfer_start(sc->sc_xfer[UCHCOM_BULK_CS_WR]); 922 } 923 return; 924 925 } 926} 927 928static void 929uchcom_write_clear_stall_callback(struct usb2_xfer *xfer) 930{ 931 struct uchcom_softc *sc = xfer->priv_sc; 932 struct usb2_xfer *xfer_other = sc->sc_xfer[UCHCOM_BULK_DT_WR]; 933 934 if (usb2_clear_stall_callback(xfer, xfer_other)) { 935 DPRINTF("stall cleared\n"); 936 sc->sc_flag &= ~UCHCOM_FLAG_WRITE_STALL; 937 usb2_transfer_start(xfer_other); 938 } 939} 940 941static void 942uchcom_read_callback(struct usb2_xfer *xfer) 943{ 944 struct uchcom_softc *sc = xfer->priv_sc; 945 946 switch (USB_GET_STATE(xfer)) { 947 case USB_ST_TRANSFERRED: 948 usb2_com_put_data(&sc->sc_ucom, xfer->frbuffers, 0, xfer->actlen); 949 950 case USB_ST_SETUP: 951 if (sc->sc_flag & UCHCOM_FLAG_READ_STALL) { 952 usb2_transfer_start(sc->sc_xfer[UCHCOM_BULK_CS_RD]); 953 } else { 954 xfer->frlengths[0] = xfer->max_data_length; 955 usb2_start_hardware(xfer); 956 } 957 return; 958 959 default: /* Error */ 960 if (xfer->error != USB_ERR_CANCELLED) { 961 sc->sc_flag |= UCHCOM_FLAG_READ_STALL; 962 usb2_transfer_start(sc->sc_xfer[UCHCOM_BULK_CS_RD]); 963 } 964 return; 965 966 } 967} 968 969static void 970uchcom_read_clear_stall_callback(struct usb2_xfer *xfer) 971{ 972 struct uchcom_softc *sc = xfer->priv_sc; 973 struct usb2_xfer *xfer_other = sc->sc_xfer[UCHCOM_BULK_DT_RD]; 974 975 if (usb2_clear_stall_callback(xfer, xfer_other)) { 976 DPRINTF("stall cleared\n"); 977 sc->sc_flag &= ~UCHCOM_FLAG_READ_STALL; 978 usb2_transfer_start(xfer_other); 979 } 980} 981 982static device_method_t uchcom_methods[] = { 983 /* Device interface */ 984 DEVMETHOD(device_probe, uchcom_probe), 985 DEVMETHOD(device_attach, uchcom_attach), 986 DEVMETHOD(device_detach, uchcom_detach), 987 988 {0, 0} 989}; 990 991static driver_t uchcom_driver = { 992 "ucom", 993 uchcom_methods, 994 sizeof(struct uchcom_softc) 995}; 996 997static devclass_t uchcom_devclass; 998 999DRIVER_MODULE(uchcom, ushub, uchcom_driver, uchcom_devclass, NULL, 0); 1000MODULE_DEPEND(uchcom, usb2_serial, 1, 1, 1); 1001MODULE_DEPEND(uchcom, usb2_core, 1, 1, 1); 1002