ehci_pci.c revision 236475
1/*-
2 * Copyright (c) 1998 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Lennart Augustsson (augustss@carlstedt.se) at
7 * Carlstedt Research & Technology.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: stable/9/sys/dev/usb/controller/ehci_pci.c 236475 2012-06-02 19:08:47Z marius $");
33
34/*
35 * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
36 *
37 * The EHCI 1.0 spec can be found at
38 * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
39 * and the USB 2.0 spec at
40 * http://www.usb.org/developers/docs/usb_20.zip
41 */
42
43/* The low level controller code for EHCI has been split into
44 * PCI probes and EHCI specific code. This was done to facilitate the
45 * sharing of code between *BSD's
46 */
47
48#include <sys/stdint.h>
49#include <sys/stddef.h>
50#include <sys/param.h>
51#include <sys/queue.h>
52#include <sys/types.h>
53#include <sys/systm.h>
54#include <sys/kernel.h>
55#include <sys/bus.h>
56#include <sys/module.h>
57#include <sys/lock.h>
58#include <sys/mutex.h>
59#include <sys/condvar.h>
60#include <sys/sysctl.h>
61#include <sys/sx.h>
62#include <sys/unistd.h>
63#include <sys/callout.h>
64#include <sys/malloc.h>
65#include <sys/priv.h>
66
67#include <dev/usb/usb.h>
68#include <dev/usb/usbdi.h>
69
70#include <dev/usb/usb_core.h>
71#include <dev/usb/usb_busdma.h>
72#include <dev/usb/usb_process.h>
73#include <dev/usb/usb_util.h>
74
75#include <dev/usb/usb_controller.h>
76#include <dev/usb/usb_bus.h>
77#include <dev/usb/usb_pci.h>
78#include <dev/usb/controller/ehci.h>
79#include <dev/usb/controller/ehcireg.h>
80#include "usb_if.h"
81
82#define	PCI_EHCI_VENDORID_ACERLABS	0x10b9
83#define	PCI_EHCI_VENDORID_AMD		0x1022
84#define	PCI_EHCI_VENDORID_APPLE		0x106b
85#define	PCI_EHCI_VENDORID_ATI		0x1002
86#define	PCI_EHCI_VENDORID_CMDTECH	0x1095
87#define	PCI_EHCI_VENDORID_INTEL		0x8086
88#define	PCI_EHCI_VENDORID_NEC		0x1033
89#define	PCI_EHCI_VENDORID_OPTI		0x1045
90#define	PCI_EHCI_VENDORID_PHILIPS	0x1131
91#define	PCI_EHCI_VENDORID_SIS		0x1039
92#define	PCI_EHCI_VENDORID_NVIDIA	0x12D2
93#define	PCI_EHCI_VENDORID_NVIDIA2	0x10DE
94#define	PCI_EHCI_VENDORID_VIA		0x1106
95
96static device_probe_t ehci_pci_probe;
97static device_attach_t ehci_pci_attach;
98static device_detach_t ehci_pci_detach;
99static usb_take_controller_t ehci_pci_take_controller;
100
101static const char *
102ehci_pci_match(device_t self)
103{
104	uint32_t device_id = pci_get_devid(self);
105
106	switch (device_id) {
107	case 0x268c8086:
108		return ("Intel 63XXESB USB 2.0 controller");
109
110	case 0x523910b9:
111		return "ALi M5239 USB 2.0 controller";
112
113	case 0x10227463:
114		return "AMD 8111 USB 2.0 controller";
115
116	case 0x20951022:
117		return ("AMD CS5536 (Geode) USB 2.0 controller");
118
119	case 0x43451002:
120		return "ATI SB200 USB 2.0 controller";
121	case 0x43731002:
122		return "ATI SB400 USB 2.0 controller";
123
124	case 0x25ad8086:
125		return "Intel 6300ESB USB 2.0 controller";
126	case 0x24cd8086:
127		return "Intel 82801DB/L/M (ICH4) USB 2.0 controller";
128	case 0x24dd8086:
129		return "Intel 82801EB/R (ICH5) USB 2.0 controller";
130	case 0x265c8086:
131		return "Intel 82801FB (ICH6) USB 2.0 controller";
132	case 0x27cc8086:
133		return "Intel 82801GB/R (ICH7) USB 2.0 controller";
134
135	case 0x28368086:
136		return "Intel 82801H (ICH8) USB 2.0 controller USB2-A";
137	case 0x283a8086:
138		return "Intel 82801H (ICH8) USB 2.0 controller USB2-B";
139	case 0x293a8086:
140		return "Intel 82801I (ICH9) USB 2.0 controller";
141	case 0x293c8086:
142		return "Intel 82801I (ICH9) USB 2.0 controller";
143	case 0x3a3a8086:
144		return "Intel 82801JI (ICH10) USB 2.0 controller USB-A";
145	case 0x3a3c8086:
146		return "Intel 82801JI (ICH10) USB 2.0 controller USB-B";
147	case 0x3b348086:
148		return ("Intel PCH USB 2.0 controller USB-A");
149	case 0x3b3c8086:
150		return ("Intel PCH USB 2.0 controller USB-B");
151
152	case 0x00e01033:
153		return ("NEC uPD 720100 USB 2.0 controller");
154
155	case 0x006810de:
156		return "NVIDIA nForce2 USB 2.0 controller";
157	case 0x008810de:
158		return "NVIDIA nForce2 Ultra 400 USB 2.0 controller";
159	case 0x00d810de:
160		return "NVIDIA nForce3 USB 2.0 controller";
161	case 0x00e810de:
162		return "NVIDIA nForce3 250 USB 2.0 controller";
163	case 0x005b10de:
164		return "NVIDIA nForce4 USB 2.0 controller";
165	case 0x036d10de:
166		return "NVIDIA nForce MCP55 USB 2.0 controller";
167	case 0x03f210de:
168		return "NVIDIA nForce MCP61 USB 2.0 controller";
169	case 0x0aa610de:
170		return "NVIDIA nForce MCP79 USB 2.0 controller";
171	case 0x0aa910de:
172		return "NVIDIA nForce MCP79 USB 2.0 controller";
173	case 0x0aaa10de:
174		return "NVIDIA nForce MCP79 USB 2.0 controller";
175
176	case 0x15621131:
177		return "Philips ISP156x USB 2.0 controller";
178
179	case 0x31041106:
180		return ("VIA VT6202 USB 2.0 controller");
181
182	default:
183		break;
184	}
185
186	if ((pci_get_class(self) == PCIC_SERIALBUS)
187	    && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
188	    && (pci_get_progif(self) == PCI_INTERFACE_EHCI)) {
189		return ("EHCI (generic) USB 2.0 controller");
190	}
191	return (NULL);			/* dunno */
192}
193
194static int
195ehci_pci_probe(device_t self)
196{
197	const char *desc = ehci_pci_match(self);
198
199	if (desc) {
200		device_set_desc(self, desc);
201		return (0);
202	} else {
203		return (ENXIO);
204	}
205}
206
207static void
208ehci_pci_ati_quirk(device_t self, uint8_t is_sb700)
209{
210	device_t smbdev;
211	uint32_t val;
212
213	if (is_sb700) {
214		/* Lookup SMBUS PCI device */
215		smbdev = pci_find_device(PCI_EHCI_VENDORID_ATI, 0x4385);
216		if (smbdev == NULL)
217			return;
218		val = pci_get_revid(smbdev);
219		if (val != 0x3a && val != 0x3b)
220			return;
221	}
222
223	/*
224	 * Note: this bit is described as reserved in SB700
225	 * Register Reference Guide.
226	 */
227	val = pci_read_config(self, 0x53, 1);
228	if (!(val & 0x8)) {
229		val |= 0x8;
230		pci_write_config(self, 0x53, val, 1);
231		device_printf(self, "AMD SB600/700 quirk applied\n");
232	}
233}
234
235static void
236ehci_pci_via_quirk(device_t self)
237{
238	uint32_t val;
239
240	if ((pci_get_device(self) == 0x3104) &&
241	    ((pci_get_revid(self) & 0xf0) == 0x60)) {
242		/* Correct schedule sleep time to 10us */
243		val = pci_read_config(self, 0x4b, 1);
244		if (val & 0x20)
245			return;
246		val |= 0x20;
247		pci_write_config(self, 0x4b, val, 1);
248		device_printf(self, "VIA-quirk applied\n");
249	}
250}
251
252static int
253ehci_pci_attach(device_t self)
254{
255	ehci_softc_t *sc = device_get_softc(self);
256	int err;
257	int rid;
258
259	/* initialise some bus fields */
260	sc->sc_bus.parent = self;
261	sc->sc_bus.devices = sc->sc_devices;
262	sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
263
264	/* get all DMA memory */
265	if (usb_bus_mem_alloc_all(&sc->sc_bus,
266	    USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
267		return (ENOMEM);
268	}
269
270	pci_enable_busmaster(self);
271
272	switch (pci_read_config(self, PCI_USBREV, 1) & PCI_USB_REV_MASK) {
273	case PCI_USB_REV_PRE_1_0:
274	case PCI_USB_REV_1_0:
275	case PCI_USB_REV_1_1:
276		/*
277		 * NOTE: some EHCI USB controllers have the wrong USB
278		 * revision number. It appears those controllers are
279		 * fully compliant so we just ignore this value in
280		 * some common cases.
281		 */
282		device_printf(self, "pre-2.0 USB revision (ignored)\n");
283		/* fallthrough */
284	case PCI_USB_REV_2_0:
285		break;
286	default:
287		/* Quirk for Parallels Desktop 4.0 */
288		device_printf(self, "USB revision is unknown. Assuming v2.0.\n");
289		break;
290	}
291
292	rid = PCI_CBMEM;
293	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
294	    RF_ACTIVE);
295	if (!sc->sc_io_res) {
296		device_printf(self, "Could not map memory\n");
297		goto error;
298	}
299	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
300	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
301	sc->sc_io_size = rman_get_size(sc->sc_io_res);
302
303	rid = 0;
304	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
305	    RF_SHAREABLE | RF_ACTIVE);
306	if (sc->sc_irq_res == NULL) {
307		device_printf(self, "Could not allocate irq\n");
308		goto error;
309	}
310	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
311	if (!sc->sc_bus.bdev) {
312		device_printf(self, "Could not add USB device\n");
313		goto error;
314	}
315	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
316
317	/*
318	 * ehci_pci_match will never return NULL if ehci_pci_probe
319	 * succeeded
320	 */
321	device_set_desc(sc->sc_bus.bdev, ehci_pci_match(self));
322	switch (pci_get_vendor(self)) {
323	case PCI_EHCI_VENDORID_ACERLABS:
324		sprintf(sc->sc_vendor, "AcerLabs");
325		break;
326	case PCI_EHCI_VENDORID_AMD:
327		sprintf(sc->sc_vendor, "AMD");
328		break;
329	case PCI_EHCI_VENDORID_APPLE:
330		sprintf(sc->sc_vendor, "Apple");
331		break;
332	case PCI_EHCI_VENDORID_ATI:
333		sprintf(sc->sc_vendor, "ATI");
334		break;
335	case PCI_EHCI_VENDORID_CMDTECH:
336		sprintf(sc->sc_vendor, "CMDTECH");
337		break;
338	case PCI_EHCI_VENDORID_INTEL:
339		sprintf(sc->sc_vendor, "Intel");
340		break;
341	case PCI_EHCI_VENDORID_NEC:
342		sprintf(sc->sc_vendor, "NEC");
343		break;
344	case PCI_EHCI_VENDORID_OPTI:
345		sprintf(sc->sc_vendor, "OPTi");
346		break;
347	case PCI_EHCI_VENDORID_PHILIPS:
348		sprintf(sc->sc_vendor, "Philips");
349		break;
350	case PCI_EHCI_VENDORID_SIS:
351		sprintf(sc->sc_vendor, "SiS");
352		break;
353	case PCI_EHCI_VENDORID_NVIDIA:
354	case PCI_EHCI_VENDORID_NVIDIA2:
355		sprintf(sc->sc_vendor, "nVidia");
356		break;
357	case PCI_EHCI_VENDORID_VIA:
358		sprintf(sc->sc_vendor, "VIA");
359		break;
360	default:
361		if (bootverbose)
362			device_printf(self, "(New EHCI DeviceId=0x%08x)\n",
363			    pci_get_devid(self));
364		sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
365	}
366
367#if (__FreeBSD_version >= 700031)
368	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
369	    NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
370#else
371	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
372	    (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
373#endif
374	if (err) {
375		device_printf(self, "Could not setup irq, %d\n", err);
376		sc->sc_intr_hdl = NULL;
377		goto error;
378	}
379	ehci_pci_take_controller(self);
380
381	/* Undocumented quirks taken from Linux */
382
383	switch (pci_get_vendor(self)) {
384	case PCI_EHCI_VENDORID_ATI:
385		/* SB600 and SB700 EHCI quirk */
386		switch (pci_get_device(self)) {
387		case 0x4386:
388			ehci_pci_ati_quirk(self, 0);
389			break;
390		case 0x4396:
391			ehci_pci_ati_quirk(self, 1);
392			break;
393		default:
394			break;
395		}
396		break;
397
398	case PCI_EHCI_VENDORID_VIA:
399		ehci_pci_via_quirk(self);
400		break;
401
402	default:
403		break;
404	}
405
406	/* Dropped interrupts workaround */
407	switch (pci_get_vendor(self)) {
408	case PCI_EHCI_VENDORID_ATI:
409	case PCI_EHCI_VENDORID_VIA:
410		sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG;
411		if (bootverbose)
412			device_printf(self,
413			    "Dropped interrupts workaround enabled\n");
414		break;
415	default:
416		break;
417	}
418
419	/* Doorbell feature workaround */
420	switch (pci_get_vendor(self)) {
421	case PCI_EHCI_VENDORID_NVIDIA:
422	case PCI_EHCI_VENDORID_NVIDIA2:
423		sc->sc_flags |= EHCI_SCFLG_IAADBUG;
424		if (bootverbose)
425			device_printf(self,
426			    "Doorbell workaround enabled\n");
427		break;
428	default:
429		break;
430	}
431
432	err = ehci_init(sc);
433	if (!err) {
434		err = device_probe_and_attach(sc->sc_bus.bdev);
435	}
436	if (err) {
437		device_printf(self, "USB init failed err=%d\n", err);
438		goto error;
439	}
440	return (0);
441
442error:
443	ehci_pci_detach(self);
444	return (ENXIO);
445}
446
447static int
448ehci_pci_detach(device_t self)
449{
450	ehci_softc_t *sc = device_get_softc(self);
451	device_t bdev;
452
453	if (sc->sc_bus.bdev) {
454		bdev = sc->sc_bus.bdev;
455		device_detach(bdev);
456		device_delete_child(self, bdev);
457	}
458	/* during module unload there are lots of children leftover */
459	device_delete_children(self);
460
461	pci_disable_busmaster(self);
462
463	if (sc->sc_irq_res && sc->sc_intr_hdl) {
464		/*
465		 * only call ehci_detach() after ehci_init()
466		 */
467		ehci_detach(sc);
468
469		int err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
470
471		if (err)
472			/* XXX or should we panic? */
473			device_printf(self, "Could not tear down irq, %d\n",
474			    err);
475		sc->sc_intr_hdl = NULL;
476	}
477	if (sc->sc_irq_res) {
478		bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
479		sc->sc_irq_res = NULL;
480	}
481	if (sc->sc_io_res) {
482		bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM,
483		    sc->sc_io_res);
484		sc->sc_io_res = NULL;
485	}
486	usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
487
488	return (0);
489}
490
491static int
492ehci_pci_take_controller(device_t self)
493{
494	ehci_softc_t *sc = device_get_softc(self);
495	uint32_t cparams;
496	uint32_t eec;
497	uint16_t to;
498	uint8_t eecp;
499	uint8_t bios_sem;
500
501	cparams = EREAD4(sc, EHCI_HCCPARAMS);
502
503	/* Synchronise with the BIOS if it owns the controller. */
504	for (eecp = EHCI_HCC_EECP(cparams); eecp != 0;
505	    eecp = EHCI_EECP_NEXT(eec)) {
506		eec = pci_read_config(self, eecp, 4);
507		if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP) {
508			continue;
509		}
510		bios_sem = pci_read_config(self, eecp +
511		    EHCI_LEGSUP_BIOS_SEM, 1);
512		if (bios_sem == 0) {
513			continue;
514		}
515		device_printf(sc->sc_bus.bdev, "waiting for BIOS "
516		    "to give up control\n");
517		pci_write_config(self, eecp +
518		    EHCI_LEGSUP_OS_SEM, 1, 1);
519		to = 500;
520		while (1) {
521			bios_sem = pci_read_config(self, eecp +
522			    EHCI_LEGSUP_BIOS_SEM, 1);
523			if (bios_sem == 0)
524				break;
525
526			if (--to == 0) {
527				device_printf(sc->sc_bus.bdev,
528				    "timed out waiting for BIOS\n");
529				break;
530			}
531			usb_pause_mtx(NULL, hz / 100);	/* wait 10ms */
532		}
533	}
534	return (0);
535}
536
537static device_method_t ehci_pci_methods[] = {
538	/* Device interface */
539	DEVMETHOD(device_probe, ehci_pci_probe),
540	DEVMETHOD(device_attach, ehci_pci_attach),
541	DEVMETHOD(device_detach, ehci_pci_detach),
542	DEVMETHOD(device_suspend, bus_generic_suspend),
543	DEVMETHOD(device_resume, bus_generic_resume),
544	DEVMETHOD(device_shutdown, bus_generic_shutdown),
545	DEVMETHOD(usb_take_controller, ehci_pci_take_controller),
546
547	DEVMETHOD_END
548};
549
550static driver_t ehci_driver = {
551	.name = "ehci",
552	.methods = ehci_pci_methods,
553	.size = sizeof(struct ehci_softc),
554};
555
556static devclass_t ehci_devclass;
557
558DRIVER_MODULE(ehci, pci, ehci_driver, ehci_devclass, 0, 0);
559MODULE_DEPEND(ehci, usb, 1, 1, 1);
560