sio.c revision 60674
1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Berkeley and its contributors. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $FreeBSD: head/sys/dev/sio/sio.c 60674 2000-05-18 02:06:24Z tanimura $ 34 * from: @(#)com.c 7.5 (Berkeley) 5/16/91 35 * from: i386/isa sio.c,v 1.234 36 */ 37 38#include "opt_comconsole.h" 39#include "opt_compat.h" 40#include "opt_ddb.h" 41#include "opt_sio.h" 42#include "card.h" 43#include "pci.h" 44#include "sio.h" 45 46/* 47 * Serial driver, based on 386BSD-0.1 com driver. 48 * Mostly rewritten to use pseudo-DMA. 49 * Works for National Semiconductor NS8250-NS16550AF UARTs. 50 * COM driver, based on HP dca driver. 51 * 52 * Changes for PC-Card integration: 53 * - Added PC-Card driver table and handlers 54 */ 55#include <sys/param.h> 56#include <sys/systm.h> 57#include <sys/reboot.h> 58#include <sys/malloc.h> 59#include <sys/tty.h> 60#include <sys/proc.h> 61#include <sys/module.h> 62#include <sys/conf.h> 63#include <sys/dkstat.h> 64#include <sys/fcntl.h> 65#include <sys/interrupt.h> 66#include <sys/kernel.h> 67#include <sys/syslog.h> 68#include <sys/sysctl.h> 69#include <sys/bus.h> 70#include <machine/bus_pio.h> 71#include <machine/bus.h> 72#include <sys/rman.h> 73#include <sys/timetc.h> 74#include <sys/timepps.h> 75 76#include <isa/isareg.h> 77#include <isa/isavar.h> 78#if NPCI > 0 79#include <pci/pcireg.h> 80#include <pci/pcivar.h> 81#endif 82#include <machine/lock.h> 83 84#include <machine/clock.h> 85#include <machine/ipl.h> 86#ifndef SMP 87#include <machine/lock.h> 88#endif 89#include <machine/resource.h> 90 91#include <isa/sioreg.h> 92 93#ifdef COM_ESP 94#include <isa/ic/esp.h> 95#endif 96#include <isa/ic/ns16550.h> 97 98#ifndef __i386__ 99#define disable_intr() 100#define enable_intr() 101#endif 102 103#ifdef SMP 104#define disable_intr() COM_DISABLE_INTR() 105#define enable_intr() COM_ENABLE_INTR() 106#endif /* SMP */ 107 108#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 109 110#define CALLOUT_MASK 0x80 111#define CONTROL_MASK 0x60 112#define CONTROL_INIT_STATE 0x20 113#define CONTROL_LOCK_STATE 0x40 114#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 115#define MINOR_MAGIC_MASK (CALLOUT_MASK | CONTROL_MASK) 116#define MINOR_TO_UNIT(mynor) ((mynor) & ~MINOR_MAGIC_MASK) 117 118#ifdef COM_MULTIPORT 119/* checks in flags for multiport and which is multiport "master chip" 120 * for a given card 121 */ 122#define COM_ISMULTIPORT(flags) ((flags) & 0x01) 123#define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff) 124#define COM_NOTAST4(flags) ((flags) & 0x04) 125#endif /* COM_MULTIPORT */ 126 127#define COM_CONSOLE(flags) ((flags) & 0x10) 128#define COM_FORCECONSOLE(flags) ((flags) & 0x20) 129#define COM_LLCONSOLE(flags) ((flags) & 0x40) 130#define COM_DEBUGGER(flags) ((flags) & 0x80) 131#define COM_LOSESOUTINTS(flags) ((flags) & 0x08) 132#define COM_NOFIFO(flags) ((flags) & 0x02) 133#define COM_ST16650A(flags) ((flags) & 0x20000) 134#define COM_C_NOPROBE (0x40000) 135#define COM_NOPROBE(flags) ((flags) & COM_C_NOPROBE) 136#define COM_C_IIR_TXRDYBUG (0x80000) 137#define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG) 138#define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24) 139 140#define com_scr 7 /* scratch register for 16450-16550 (R/W) */ 141 142#define sio_getreg(com, off) \ 143 (bus_space_read_1((com)->bst, (com)->bsh, (off))) 144#define sio_setreg(com, off, value) \ 145 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 146 147/* 148 * com state bits. 149 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 150 * than the other bits so that they can be tested as a group without masking 151 * off the low bits. 152 * 153 * The following com and tty flags correspond closely: 154 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 155 * comstop()) 156 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 157 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 158 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 159 * TS_FLUSH is not used. 160 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 161 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 162 */ 163#define CS_BUSY 0x80 /* output in progress */ 164#define CS_TTGO 0x40 /* output not stopped by XOFF */ 165#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 166#define CS_CHECKMSR 1 /* check of MSR scheduled */ 167#define CS_CTS_OFLOW 2 /* use CTS output flow control */ 168#define CS_DTR_OFF 0x10 /* DTR held off */ 169#define CS_ODONE 4 /* output completed */ 170#define CS_RTS_IFLOW 8 /* use RTS input flow control */ 171#define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 172 173static char const * const error_desc[] = { 174#define CE_OVERRUN 0 175 "silo overflow", 176#define CE_INTERRUPT_BUF_OVERFLOW 1 177 "interrupt-level buffer overflow", 178#define CE_TTY_BUF_OVERFLOW 2 179 "tty-level buffer overflow", 180}; 181 182#define CE_NTYPES 3 183#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum]) 184 185/* types. XXX - should be elsewhere */ 186typedef u_int Port_t; /* hardware port */ 187typedef u_char bool_t; /* boolean */ 188 189/* queue of linear buffers */ 190struct lbq { 191 u_char *l_head; /* next char to process */ 192 u_char *l_tail; /* one past the last char to process */ 193 struct lbq *l_next; /* next in queue */ 194 bool_t l_queued; /* nonzero if queued */ 195}; 196 197/* com device structure */ 198struct com_s { 199 u_int flags; /* Copy isa device flags */ 200 u_char state; /* miscellaneous flag bits */ 201 bool_t active_out; /* nonzero if the callout device is open */ 202 u_char cfcr_image; /* copy of value written to CFCR */ 203#ifdef COM_ESP 204 bool_t esp; /* is this unit a hayes esp board? */ 205#endif 206 u_char extra_state; /* more flag bits, separate for order trick */ 207 u_char fifo_image; /* copy of value written to FIFO */ 208 bool_t hasfifo; /* nonzero for 16550 UARTs */ 209 bool_t st16650a; /* Is a Startech 16650A or RTS/CTS compat */ 210 bool_t loses_outints; /* nonzero if device loses output interrupts */ 211 u_char mcr_image; /* copy of value written to MCR */ 212#ifdef COM_MULTIPORT 213 bool_t multiport; /* is this unit part of a multiport device? */ 214#endif /* COM_MULTIPORT */ 215 bool_t no_irq; /* nonzero if irq is not attached */ 216 bool_t gone; /* hardware disappeared */ 217 bool_t poll; /* nonzero if polling is required */ 218 bool_t poll_output; /* nonzero if polling for output is required */ 219 int unit; /* unit number */ 220 int dtr_wait; /* time to hold DTR down on close (* 1/hz) */ 221 u_int tx_fifo_size; 222 u_int wopeners; /* # processes waiting for DCD in open() */ 223 224 /* 225 * The high level of the driver never reads status registers directly 226 * because there would be too many side effects to handle conveniently. 227 * Instead, it reads copies of the registers stored here by the 228 * interrupt handler. 229 */ 230 u_char last_modem_status; /* last MSR read by intr handler */ 231 u_char prev_modem_status; /* last MSR handled by high level */ 232 233 u_char hotchar; /* ldisc-specific char to be handled ASAP */ 234 u_char *ibuf; /* start of input buffer */ 235 u_char *ibufend; /* end of input buffer */ 236 u_char *ibufold; /* old input buffer, to be freed */ 237 u_char *ihighwater; /* threshold in input buffer */ 238 u_char *iptr; /* next free spot in input buffer */ 239 int ibufsize; /* size of ibuf (not include error bytes) */ 240 int ierroff; /* offset of error bytes in ibuf */ 241 242 struct lbq obufq; /* head of queue of output buffers */ 243 struct lbq obufs[2]; /* output buffers */ 244 245 bus_space_tag_t bst; 246 bus_space_handle_t bsh; 247 248 Port_t data_port; /* i/o ports */ 249#ifdef COM_ESP 250 Port_t esp_port; 251#endif 252 Port_t int_id_port; 253 Port_t modem_ctl_port; 254 Port_t line_status_port; 255 Port_t modem_status_port; 256 Port_t intr_ctl_port; /* Ports of IIR register */ 257 258 struct tty *tp; /* cross reference */ 259 260 /* Initial state. */ 261 struct termios it_in; /* should be in struct tty */ 262 struct termios it_out; 263 264 /* Lock state. */ 265 struct termios lt_in; /* should be in struct tty */ 266 struct termios lt_out; 267 268 bool_t do_timestamp; 269 bool_t do_dcd_timestamp; 270 struct timeval timestamp; 271 struct timeval dcd_timestamp; 272 struct pps_state pps; 273 274 u_long bytes_in; /* statistics */ 275 u_long bytes_out; 276 u_int delta_error_counts[CE_NTYPES]; 277 u_long error_counts[CE_NTYPES]; 278 279 struct resource *irqres; 280 struct resource *ioportres; 281 void *cookie; 282 283 /* 284 * Data area for output buffers. Someday we should build the output 285 * buffer queue without copying data. 286 */ 287 u_char obuf1[256]; 288 u_char obuf2[256]; 289}; 290 291#ifdef COM_ESP 292static int espattach __P((struct com_s *com, Port_t esp_port)); 293#endif 294static int sioattach __P((device_t dev, int rid)); 295static int sio_isa_attach __P((device_t dev)); 296 297static timeout_t siobusycheck; 298static timeout_t siodtrwakeup; 299static void comhardclose __P((struct com_s *com)); 300static void sioinput __P((struct com_s *com)); 301static void siointr1 __P((struct com_s *com)); 302static void siointr __P((void *arg)); 303static int commctl __P((struct com_s *com, int bits, int how)); 304static int comparam __P((struct tty *tp, struct termios *t)); 305static swihand_t siopoll; 306static int sioprobe __P((device_t dev, int xrid)); 307static int sio_isa_probe __P((device_t dev)); 308static void siosettimeout __P((void)); 309static int siosetwater __P((struct com_s *com, speed_t speed)); 310static void comstart __P((struct tty *tp)); 311static void comstop __P((struct tty *tp, int rw)); 312static timeout_t comwakeup; 313static void disc_optim __P((struct tty *tp, struct termios *t, 314 struct com_s *com)); 315 316#if NCARD > 0 317static int sio_pccard_attach __P((device_t dev)); 318static int sio_pccard_detach __P((device_t dev)); 319static int sio_pccard_probe __P((device_t dev)); 320#endif /* NCARD > 0 */ 321 322#if NPCI > 0 323static int sio_pci_attach __P((device_t dev)); 324static void sio_pci_kludge_unit __P((device_t dev)); 325static int sio_pci_probe __P((device_t dev)); 326#endif /* NPCI > 0 */ 327 328static char driver_name[] = "sio"; 329 330/* table and macro for fast conversion from a unit number to its com struct */ 331static devclass_t sio_devclass; 332#define com_addr(unit) ((struct com_s *) \ 333 devclass_get_softc(sio_devclass, unit)) 334 335static device_method_t sio_isa_methods[] = { 336 /* Device interface */ 337 DEVMETHOD(device_probe, sio_isa_probe), 338 DEVMETHOD(device_attach, sio_isa_attach), 339 340 { 0, 0 } 341}; 342 343static driver_t sio_isa_driver = { 344 driver_name, 345 sio_isa_methods, 346 sizeof(struct com_s), 347}; 348 349#if NCARD > 0 350static device_method_t sio_pccard_methods[] = { 351 /* Device interface */ 352 DEVMETHOD(device_probe, sio_pccard_probe), 353 DEVMETHOD(device_attach, sio_pccard_attach), 354 DEVMETHOD(device_detach, sio_pccard_detach), 355 356 { 0, 0 } 357}; 358 359static driver_t sio_pccard_driver = { 360 driver_name, 361 sio_pccard_methods, 362 sizeof(struct com_s), 363}; 364#endif /* NCARD > 0 */ 365 366#if NPCI > 0 367static device_method_t sio_pci_methods[] = { 368 /* Device interface */ 369 DEVMETHOD(device_probe, sio_pci_probe), 370 DEVMETHOD(device_attach, sio_pci_attach), 371 372 { 0, 0 } 373}; 374 375static driver_t sio_pci_driver = { 376 driver_name, 377 sio_pci_methods, 378 sizeof(struct com_s), 379}; 380#endif /* NPCI > 0 */ 381 382static d_open_t sioopen; 383static d_close_t sioclose; 384static d_read_t sioread; 385static d_write_t siowrite; 386static d_ioctl_t sioioctl; 387 388#define CDEV_MAJOR 28 389static struct cdevsw sio_cdevsw = { 390 /* open */ sioopen, 391 /* close */ sioclose, 392 /* read */ sioread, 393 /* write */ siowrite, 394 /* ioctl */ sioioctl, 395 /* poll */ ttypoll, 396 /* mmap */ nommap, 397 /* strategy */ nostrategy, 398 /* name */ driver_name, 399 /* maj */ CDEV_MAJOR, 400 /* dump */ nodump, 401 /* psize */ nopsize, 402 /* flags */ D_TTY, 403 /* bmaj */ -1 404}; 405 406int comconsole = -1; 407static volatile speed_t comdefaultrate = CONSPEED; 408#ifdef __alpha__ 409static volatile speed_t gdbdefaultrate = CONSPEED; 410#endif 411static u_int com_events; /* input chars + weighted output completions */ 412static Port_t siocniobase; 413static int siocnunit; 414static Port_t siogdbiobase; 415static int siogdbunit = -1; 416static bool_t sio_registered; 417static int sio_timeout; 418static int sio_timeouts_until_log; 419static struct callout_handle sio_timeout_handle 420 = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 421static int sio_numunits; 422 423static struct speedtab comspeedtab[] = { 424 { 0, 0 }, 425 { 50, COMBRD(50) }, 426 { 75, COMBRD(75) }, 427 { 110, COMBRD(110) }, 428 { 134, COMBRD(134) }, 429 { 150, COMBRD(150) }, 430 { 200, COMBRD(200) }, 431 { 300, COMBRD(300) }, 432 { 600, COMBRD(600) }, 433 { 1200, COMBRD(1200) }, 434 { 1800, COMBRD(1800) }, 435 { 2400, COMBRD(2400) }, 436 { 4800, COMBRD(4800) }, 437 { 9600, COMBRD(9600) }, 438 { 19200, COMBRD(19200) }, 439 { 38400, COMBRD(38400) }, 440 { 57600, COMBRD(57600) }, 441 { 115200, COMBRD(115200) }, 442 { -1, -1 } 443}; 444 445#ifdef COM_ESP 446/* XXX configure this properly. */ 447static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 448static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 449#endif 450 451/* 452 * handle sysctl read/write requests for console speed 453 * 454 * In addition to setting comdefaultrate for I/O through /dev/console, 455 * also set the initial and lock values for the /dev/ttyXX device 456 * if there is one associated with the console. Finally, if the /dev/tty 457 * device has already been open, change the speed on the open running port 458 * itself. 459 */ 460 461static int 462sysctl_machdep_comdefaultrate SYSCTL_HANDLER_ARGS 463{ 464 int error, s; 465 speed_t newspeed; 466 struct com_s *com; 467 struct tty *tp; 468 469 newspeed = comdefaultrate; 470 471 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 472 if (error || !req->newptr) 473 return (error); 474 475 comdefaultrate = newspeed; 476 477 if (comconsole < 0) /* serial console not selected? */ 478 return (0); 479 480 com = com_addr(comconsole); 481 if (com == NULL) 482 return (ENXIO); 483 484 /* 485 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 486 * (note, the lock rates really are boolean -- if non-zero, disallow 487 * speed changes) 488 */ 489 com->it_in.c_ispeed = com->it_in.c_ospeed = 490 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 491 com->it_out.c_ispeed = com->it_out.c_ospeed = 492 com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 493 494 /* 495 * if we're open, change the running rate too 496 */ 497 tp = com->tp; 498 if (tp && (tp->t_state & TS_ISOPEN)) { 499 tp->t_termios.c_ispeed = 500 tp->t_termios.c_ospeed = comdefaultrate; 501 s = spltty(); 502 error = comparam(tp, &tp->t_termios); 503 splx(s); 504 } 505 return error; 506} 507 508SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 509 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 510 511#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit)) 512#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit)) 513 514#if NCARD > 0 515static int 516sio_pccard_probe(dev) 517 device_t dev; 518{ 519 /* Do not probe IRQ - pccard doesn't turn on the interrupt line */ 520 /* until bus_setup_intr */ 521 SET_FLAG(dev, COM_C_NOPROBE); 522 523 return (sioprobe(dev, 0)); 524} 525 526static int 527sio_pccard_attach(dev) 528 device_t dev; 529{ 530 return (sioattach(dev, 0)); 531} 532 533/* 534 * sio_detach - unload the driver and clear the table. 535 * XXX TODO: 536 * This is usually called when the card is ejected, but 537 * can be caused by a modunload of a controller driver. 538 * The idea is to reset the driver's view of the device 539 * and ensure that any driver entry points such as 540 * read and write do not hang. 541 */ 542static int 543sio_pccard_detach(dev) 544 device_t dev; 545{ 546 struct com_s *com; 547 548 com = (struct com_s *) device_get_softc(dev); 549 if (com == NULL) { 550 device_printf(dev, "NULL com in siounload\n"); 551 return (0); 552 } 553 com->gone = 1; 554 if (com->irqres) { 555 bus_teardown_intr(dev, com->irqres, com->cookie); 556 bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres); 557 } 558 if (com->ioportres) 559 bus_release_resource(dev, SYS_RES_IOPORT, 0, com->ioportres); 560 if (com->tp && (com->tp->t_state & TS_ISOPEN)) { 561 device_printf(dev, "still open, forcing close\n"); 562 com->tp->t_gen++; 563 ttyclose(com->tp); 564 ttwakeup(com->tp); 565 ttwwakeup(com->tp); 566 } else { 567 if (com->ibuf != NULL) 568 free(com->ibuf, M_DEVBUF); 569 } 570 device_printf(dev, "unloaded\n"); 571 return (0); 572} 573#endif /* NCARD > 0 */ 574 575#if NPCI > 0 576struct pci_ids { 577 u_int32_t type; 578 const char *desc; 579 int rid; 580}; 581 582static struct pci_ids pci_ids[] = { 583 { 0x100812b9, "3COM PCI FaxModem", 0x10 }, 584 { 0x048011c1, "ActionTec 56k FAX PCI Modem", 0x14 }, 585 { 0x00000000, NULL, 0 } 586}; 587 588static int 589sio_pci_attach(dev) 590 device_t dev; 591{ 592 u_int32_t type; 593 struct pci_ids *id; 594 595 type = pci_get_devid(dev); 596 id = pci_ids; 597 while (id->type && id->type != type) 598 id++; 599 if (id->desc == NULL) 600 return (ENXIO); 601 sio_pci_kludge_unit(dev); 602 return (sioattach(dev, id->rid)); 603} 604 605/* 606 * Don't cut and paste this to other drivers. It is a horrible kludge 607 * which will fail to work and also be unnecessary in future versions. 608 */ 609static void 610sio_pci_kludge_unit(dev) 611 device_t dev; 612{ 613 devclass_t dc; 614 int err; 615 int start; 616 int unit; 617 618 unit = 0; 619 start = 0; 620 while (resource_int_value("sio", unit, "port", &start) == 0 && 621 start > 0) 622 unit++; 623 if (device_get_unit(dev) < unit) { 624 dc = device_get_devclass(dev); 625 while (devclass_get_device(dc, unit)) 626 unit++; 627 device_printf(dev, "moving to sio%d\n", unit); 628 err = device_set_unit(dev, unit); /* EVIL DO NOT COPY */ 629 if (err) 630 device_printf(dev, "error moving device %d\n", err); 631 } 632} 633 634static int 635sio_pci_probe(dev) 636 device_t dev; 637{ 638 u_int32_t type; 639 struct pci_ids *id; 640 641 type = pci_get_devid(dev); 642 id = pci_ids; 643 while (id->type && id->type != type) 644 id++; 645 if (id->desc == NULL) 646 return (ENXIO); 647 device_set_desc(dev, id->desc); 648 return (sioprobe(dev, id->rid)); 649} 650#endif /* NPCI > 0 */ 651 652static struct isa_pnp_id sio_ids[] = { 653 {0x0005d041, "Standard PC COM port"}, /* PNP0500 */ 654 {0x0105d041, "16550A-compatible COM port"}, /* PNP0501 */ 655 {0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */ 656 {0x1005d041, "Generic IRDA-compatible device"}, /* PNP0510 */ 657 {0x1105d041, "Generic IRDA-compatible device"}, /* PNP0511 */ 658 /* Devices that do not have a compatid */ 659 {0x7602a904, NULL}, /* AEI0276 - 56K v.90 Fax Modem (LKT) */ 660 {0x00007905, NULL}, /* AKY0000 - 56K Plug&Play Modem */ 661 {0x01405407, NULL}, /* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */ 662 {0x56039008, NULL}, /* BDP0356 - Best Data 56x2 */ 663 {0x36339008, NULL}, /* BDP3336 - Best Data Prods. 336F */ 664 {0x0014490a, NULL}, /* BRI1400 - Boca 33.6 PnP */ 665 {0x0015490a, NULL}, /* BRI1500 - Internal Fax Data */ 666 {0x0034490a, NULL}, /* BRI3400 - Internal ACF Modem */ 667 {0x00b4490a, NULL}, /* BRIB400 - Boca 56k PnP */ 668 {0x0030320d, NULL}, /* CIR3000 - Cirrus Logic V43 */ 669 {0x0100440e, NULL}, /* CRD0001 - Cardinal MVP288IV ? */ 670 {0x36033610, NULL}, /* DAV0336 - DAVICOM 336PNP MODEM */ 671 {0x0000aa1a, NULL}, /* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */ 672 {0x1200c31e, NULL}, /* GVC0012 - VF1128HV-R9 (win modem?) */ 673 {0x0303c31e, NULL}, /* GVC0303 - MaxTech 33.6 PnP D/F/V */ 674 {0x0505c31e, NULL}, /* GVC0505 - GVC 56k Faxmodem */ 675 {0x0050c31e, NULL}, /* GVC5000 - some GVC modem */ 676 {0x3800f91e, NULL}, /* GWY0038 - Telepath with v.90 */ 677 {0x9062f91e, NULL}, /* GWY6290 - Telepath with x2 Technology */ 678 {0x0000f435, NULL}, /* MOT0000 - Motorola ModemSURFR 33.6 Intern */ 679 {0x5015f435, NULL}, /* MOT1550 - Motorola ModemSURFR 56K Modem */ 680 {0xf015f435, NULL}, /* MOT15F0 - Motorola VoiceSURFR 56K Modem */ 681 {0x6045f435, NULL}, /* MOT4560 - Motorola ? */ 682 {0x61e7a338, NULL}, /* NECE761 - 33.6Modem */ 683 {0x0f804f3f, NULL}, /* OZO800f - Zoom 2812 (56k Modem) */ 684 {0x39804f3f, NULL}, /* OZO8039 - Zoom 56k flex */ 685 {0x3024a341, NULL}, /* PMC2430 - Pace 56 Voice Internal Modem */ 686 {0x1000eb49, NULL}, /* ROK0010 - Rockwell ? */ 687 {0x5002734a, NULL}, /* RSS0250 - 5614Jx3(G) Internal Modem */ 688 {0xc100ad4d, NULL}, /* SMM00C1 - Leopard 56k PnP */ 689 {0x9012b04e, NULL}, /* SUP1290 - Supra ? */ 690 {0x1013b04e, NULL}, /* SUP1310 - SupraExpress 336i PnP */ 691 {0x8013b04e, NULL}, /* SUP1380 - SupraExpress 288i PnP Voice */ 692 {0x8113b04e, NULL}, /* SUP1381 - SupraExpress 336i PnP Voice */ 693 {0x5016b04e, NULL}, /* SUP1650 - Supra 336i Sp Intl */ 694 {0x7420b04e, NULL}, /* SUP2070 - Supra ? */ 695 {0x8020b04e, NULL}, /* SUP2080 - Supra ? */ 696 {0x8420b04e, NULL}, /* SUP2084 - SupraExpress 56i PnP */ 697 {0x7121b04e, NULL}, /* SUP2171 - SupraExpress 56i Sp? */ 698 {0x8024b04e, NULL}, /* SUP2480 - Supra ? */ 699 {0x01007256, NULL}, /* USR0001 - U.S. Robotics Inc., Sportster W */ 700 {0x02007256, NULL}, /* USR0002 - U.S. Robotics Inc. Sportster 33. */ 701 {0x04007256, NULL}, /* USR0004 - USR Sportster 14.4k */ 702 {0x06007256, NULL}, /* USR0006 - USR Sportster 33.6k */ 703 {0x11007256, NULL}, /* USR0011 - USR ? */ 704 {0x01017256, NULL}, /* USR0101 - USR ? */ 705 {0x30207256, NULL}, /* USR2030 - U.S.Robotics Inc. Sportster 560 */ 706 {0x50207256, NULL}, /* USR2050 - U.S.Robotics Inc. Sportster 33. */ 707 {0x70207256, NULL}, /* USR2070 - U.S.Robotics Inc. Sportster 560 */ 708 {0x30307256, NULL}, /* USR3030 - U.S. Robotics 56K FAX INT */ 709 {0x31307256, NULL}, /* USR3031 - U.S. Robotics 56K FAX INT */ 710 {0x50307256, NULL}, /* USR3050 - U.S. Robotics 56K FAX INT */ 711 {0x70307256, NULL}, /* USR3070 - U.S. Robotics 56K Voice INT */ 712 {0x90307256, NULL}, /* USR3090 - USR ? */ 713 {0x90917256, NULL}, /* USR9190 - USR 56k Voice INT */ 714 {0x0300695c, NULL}, /* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */ 715 {0x61f7896a, NULL}, /* ZTIF761 - Zoom ComStar 33.6 */ 716 {0} 717}; 718 719 720 721static int 722sio_isa_probe(dev) 723 device_t dev; 724{ 725 /* Check isapnp ids */ 726 if (ISA_PNP_PROBE(device_get_parent(dev), dev, sio_ids) == ENXIO) 727 return (ENXIO); 728 return (sioprobe(dev, 0)); 729} 730 731static int 732sioprobe(dev, xrid) 733 device_t dev; 734 int xrid; 735{ 736#if 0 737 static bool_t already_init; 738 device_t xdev; 739#endif 740 struct com_s *com; 741 bool_t failures[10]; 742 int fn; 743 device_t idev; 744 Port_t iobase; 745 intrmask_t irqmap[4]; 746 intrmask_t irqs; 747 u_char mcr_image; 748 int result; 749 u_long xirq; 750 u_int flags = device_get_flags(dev); 751 int rid; 752 struct resource *port; 753 754 rid = xrid; 755 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 756 0, ~0, IO_COMSIZE, RF_ACTIVE); 757 if (!port) 758 return (ENXIO); 759 760 com = device_get_softc(dev); 761 com->bst = rman_get_bustag(port); 762 com->bsh = rman_get_bushandle(port); 763 764#if 0 765 /* 766 * XXX this is broken - when we are first called, there are no 767 * previously configured IO ports. We could hard code 768 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 769 * This code has been doing nothing since the conversion since 770 * "count" is zero the first time around. 771 */ 772 if (!already_init) { 773 /* 774 * Turn off MCR_IENABLE for all likely serial ports. An unused 775 * port with its MCR_IENABLE gate open will inhibit interrupts 776 * from any used port that shares the interrupt vector. 777 * XXX the gate enable is elsewhere for some multiports. 778 */ 779 device_t *devs; 780 int count, i, xioport; 781 782 devclass_get_devices(sio_devclass, &devs, &count); 783 for (i = 0; i < count; i++) { 784 xdev = devs[i]; 785 if (device_is_enabled(xdev) && 786 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 787 NULL) == 0) 788 outb(xioport + com_mcr, 0); 789 } 790 free(devs, M_TEMP); 791 already_init = TRUE; 792 } 793#endif 794 795 if (COM_LLCONSOLE(flags)) { 796 printf("sio%d: reserved for low-level i/o\n", 797 device_get_unit(dev)); 798 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 799 return (ENXIO); 800 } 801 802 /* 803 * If the device is on a multiport card and has an AST/4 804 * compatible interrupt control register, initialize this 805 * register and prepare to leave MCR_IENABLE clear in the mcr. 806 * Otherwise, prepare to set MCR_IENABLE in the mcr. 807 * Point idev to the device struct giving the correct id_irq. 808 * This is the struct for the master device if there is one. 809 */ 810 idev = dev; 811 mcr_image = MCR_IENABLE; 812#ifdef COM_MULTIPORT 813 if (COM_ISMULTIPORT(flags)) { 814 Port_t xiobase; 815 u_long io; 816 817 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 818 if (idev == NULL) { 819 printf("sio%d: master device %d not configured\n", 820 device_get_unit(dev), COM_MPMASTER(flags)); 821 idev = dev; 822 } 823 if (!COM_NOTAST4(flags)) { 824 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 825 NULL) == 0) { 826 xiobase = io; 827 if (bus_get_resource(idev, SYS_RES_IRQ, 0, 828 NULL, NULL) == 0) 829 outb(xiobase + com_scr, 0x80); 830 else 831 outb(xiobase + com_scr, 0); 832 } 833 mcr_image = 0; 834 } 835 } 836#endif /* COM_MULTIPORT */ 837 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 838 mcr_image = 0; 839 840 bzero(failures, sizeof failures); 841 iobase = rman_get_start(port); 842 843 /* 844 * We don't want to get actual interrupts, just masked ones. 845 * Interrupts from this line should already be masked in the ICU, 846 * but mask them in the processor as well in case there are some 847 * (misconfigured) shared interrupts. 848 */ 849 disable_intr(); 850/* EXTRA DELAY? */ 851 852 /* 853 * Initialize the speed and the word size and wait long enough to 854 * drain the maximum of 16 bytes of junk in device output queues. 855 * The speed is undefined after a master reset and must be set 856 * before relying on anything related to output. There may be 857 * junk after a (very fast) soft reboot and (apparently) after 858 * master reset. 859 * XXX what about the UART bug avoided by waiting in comparam()? 860 * We don't want to to wait long enough to drain at 2 bps. 861 */ 862 if (iobase == siocniobase) 863 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 864 else { 865 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 866 sio_setreg(com, com_dlbl, COMBRD(SIO_TEST_SPEED) & 0xff); 867 sio_setreg(com, com_dlbh, (u_int) COMBRD(SIO_TEST_SPEED) >> 8); 868 sio_setreg(com, com_cfcr, CFCR_8BITS); 869 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 870 } 871 872 /* 873 * Enable the interrupt gate and disable device interupts. This 874 * should leave the device driving the interrupt line low and 875 * guarantee an edge trigger if an interrupt can be generated. 876 */ 877/* EXTRA DELAY? */ 878 sio_setreg(com, com_mcr, mcr_image); 879 sio_setreg(com, com_ier, 0); 880 DELAY(1000); /* XXX */ 881 irqmap[0] = isa_irq_pending(); 882 883 /* 884 * Attempt to set loopback mode so that we can send a null byte 885 * without annoying any external device. 886 */ 887/* EXTRA DELAY? */ 888 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 889 890 /* 891 * Attempt to generate an output interrupt. On 8250's, setting 892 * IER_ETXRDY generates an interrupt independent of the current 893 * setting and independent of whether the THR is empty. On 16450's, 894 * setting IER_ETXRDY generates an interrupt independent of the 895 * current setting. On 16550A's, setting IER_ETXRDY only 896 * generates an interrupt when IER_ETXRDY is not already set. 897 */ 898 sio_setreg(com, com_ier, IER_ETXRDY); 899 900 /* 901 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 902 * an interrupt. They'd better generate one for actually doing 903 * output. Loopback may be broken on the same incompatibles but 904 * it's unlikely to do more than allow the null byte out. 905 */ 906 sio_setreg(com, com_data, 0); 907 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 908 909 /* 910 * Turn off loopback mode so that the interrupt gate works again 911 * (MCR_IENABLE was hidden). This should leave the device driving 912 * an interrupt line high. It doesn't matter if the interrupt 913 * line oscillates while we are not looking at it, since interrupts 914 * are disabled. 915 */ 916/* EXTRA DELAY? */ 917 sio_setreg(com, com_mcr, mcr_image); 918 919 /* 920 * Some pcmcia cards have the "TXRDY bug", so we check everyone 921 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 922 */ 923 if (COM_NOPROBE(flags)) { 924 /* Reading IIR register twice */ 925 for (fn = 0; fn < 2; fn ++) { 926 DELAY(10000); 927 failures[6] = sio_getreg(com, com_iir); 928 } 929 /* Check IIR_TXRDY clear ? */ 930 result = 0; 931 if (failures[6] & IIR_TXRDY) { 932 /* Nop, Double check with clearing IER */ 933 sio_setreg(com, com_ier, 0); 934 if (sio_getreg(com, com_iir) & IIR_NOPEND) { 935 /* Ok. we're familia this gang */ 936 SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 937 } else { 938 /* Unknown, Just omit this chip.. XXX */ 939 result = ENXIO; 940 } 941 } else { 942 /* OK. this is well-known guys */ 943 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 944 } 945 sio_setreg(com, com_cfcr, CFCR_8BITS); 946 enable_intr(); 947 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 948 return (iobase == siocniobase ? 0 : result); 949 } 950 951 /* 952 * Check that 953 * o the CFCR, IER and MCR in UART hold the values written to them 954 * (the values happen to be all distinct - this is good for 955 * avoiding false positive tests from bus echoes). 956 * o an output interrupt is generated and its vector is correct. 957 * o the interrupt goes away when the IIR in the UART is read. 958 */ 959/* EXTRA DELAY? */ 960 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 961 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 962 failures[2] = sio_getreg(com, com_mcr) - mcr_image; 963 DELAY(10000); /* Some internal modems need this time */ 964 irqmap[1] = isa_irq_pending(); 965 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 966 DELAY(1000); /* XXX */ 967 irqmap[2] = isa_irq_pending(); 968 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 969 970 /* 971 * Turn off all device interrupts and check that they go off properly. 972 * Leave MCR_IENABLE alone. For ports without a master port, it gates 973 * the OUT2 output of the UART to 974 * the ICU input. Closing the gate would give a floating ICU input 975 * (unless there is another device driving it) and spurious interrupts. 976 * (On the system that this was first tested on, the input floats high 977 * and gives a (masked) interrupt as soon as the gate is closed.) 978 */ 979 sio_setreg(com, com_ier, 0); 980 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 981 failures[7] = sio_getreg(com, com_ier); 982 DELAY(1000); /* XXX */ 983 irqmap[3] = isa_irq_pending(); 984 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 985 986 enable_intr(); 987 988 irqs = irqmap[1] & ~irqmap[0]; 989 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 990 ((1 << xirq) & irqs) == 0) 991 printf( 992 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 993 device_get_unit(dev), xirq, irqs); 994 if (bootverbose) 995 printf("sio%d: irq maps: %#x %#x %#x %#x\n", 996 device_get_unit(dev), 997 irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 998 999 result = 0; 1000 for (fn = 0; fn < sizeof failures; ++fn) 1001 if (failures[fn]) { 1002 sio_setreg(com, com_mcr, 0); 1003 result = ENXIO; 1004 if (bootverbose) { 1005 printf("sio%d: probe failed test(s):", 1006 device_get_unit(dev)); 1007 for (fn = 0; fn < sizeof failures; ++fn) 1008 if (failures[fn]) 1009 printf(" %d", fn); 1010 printf("\n"); 1011 } 1012 break; 1013 } 1014 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 1015 return (iobase == siocniobase ? 0 : result); 1016} 1017 1018#ifdef COM_ESP 1019static int 1020espattach(com, esp_port) 1021 struct com_s *com; 1022 Port_t esp_port; 1023{ 1024 u_char dips; 1025 u_char val; 1026 1027 /* 1028 * Check the ESP-specific I/O port to see if we're an ESP 1029 * card. If not, return failure immediately. 1030 */ 1031 if ((inb(esp_port) & 0xf3) == 0) { 1032 printf(" port 0x%x is not an ESP board?\n", esp_port); 1033 return (0); 1034 } 1035 1036 /* 1037 * We've got something that claims to be a Hayes ESP card. 1038 * Let's hope so. 1039 */ 1040 1041 /* Get the dip-switch configuration */ 1042 outb(esp_port + ESP_CMD1, ESP_GETDIPS); 1043 dips = inb(esp_port + ESP_STATUS1); 1044 1045 /* 1046 * Bits 0,1 of dips say which COM port we are. 1047 */ 1048 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 1049 printf(" : ESP"); 1050 else { 1051 printf(" esp_port has com %d\n", dips & 0x03); 1052 return (0); 1053 } 1054 1055 /* 1056 * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 1057 */ 1058 outb(esp_port + ESP_CMD1, ESP_GETTEST); 1059 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 1060 val = inb(esp_port + ESP_STATUS2); 1061 if ((val & 0x70) < 0x20) { 1062 printf("-old (%o)", val & 0x70); 1063 return (0); 1064 } 1065 1066 /* 1067 * Check for ability to emulate 16550: bit 7 == 1 1068 */ 1069 if ((dips & 0x80) == 0) { 1070 printf(" slave"); 1071 return (0); 1072 } 1073 1074 /* 1075 * Okay, we seem to be a Hayes ESP card. Whee. 1076 */ 1077 com->esp = TRUE; 1078 com->esp_port = esp_port; 1079 return (1); 1080} 1081#endif /* COM_ESP */ 1082 1083static int 1084sio_isa_attach(dev) 1085 device_t dev; 1086{ 1087 return (sioattach(dev, 0)); 1088} 1089 1090static int 1091sioattach(dev, xrid) 1092 device_t dev; 1093 int xrid; 1094{ 1095 struct com_s *com; 1096#ifdef COM_ESP 1097 Port_t *espp; 1098#endif 1099 Port_t iobase; 1100 int unit; 1101 u_int flags; 1102 int rid; 1103 struct resource *port; 1104 int ret; 1105 1106 rid = xrid; 1107 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 1108 0, ~0, IO_COMSIZE, RF_ACTIVE); 1109 if (!port) 1110 return (ENXIO); 1111 1112 iobase = rman_get_start(port); 1113 unit = device_get_unit(dev); 1114 com = device_get_softc(dev); 1115 flags = device_get_flags(dev); 1116 1117 if (unit >= sio_numunits) 1118 sio_numunits = unit + 1; 1119 /* 1120 * sioprobe() has initialized the device registers as follows: 1121 * o cfcr = CFCR_8BITS. 1122 * It is most important that CFCR_DLAB is off, so that the 1123 * data port is not hidden when we enable interrupts. 1124 * o ier = 0. 1125 * Interrupts are only enabled when the line is open. 1126 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 1127 * interrupt control register or the config specifies no irq. 1128 * Keeping MCR_DTR and MCR_RTS off might stop the external 1129 * device from sending before we are ready. 1130 */ 1131 bzero(com, sizeof *com); 1132 com->unit = unit; 1133 com->ioportres = port; 1134 com->bst = rman_get_bustag(port); 1135 com->bsh = rman_get_bushandle(port); 1136 com->cfcr_image = CFCR_8BITS; 1137 com->dtr_wait = 3 * hz; 1138 com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 1139 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 1140 com->tx_fifo_size = 1; 1141 com->obufs[0].l_head = com->obuf1; 1142 com->obufs[1].l_head = com->obuf2; 1143 1144 com->data_port = iobase + com_data; 1145 com->int_id_port = iobase + com_iir; 1146 com->modem_ctl_port = iobase + com_mcr; 1147 com->mcr_image = inb(com->modem_ctl_port); 1148 com->line_status_port = iobase + com_lsr; 1149 com->modem_status_port = iobase + com_msr; 1150 com->intr_ctl_port = iobase + com_ier; 1151 1152 /* 1153 * We don't use all the flags from <sys/ttydefaults.h> since they 1154 * are only relevant for logins. It's important to have echo off 1155 * initially so that the line doesn't start blathering before the 1156 * echo flag can be turned off. 1157 */ 1158 com->it_in.c_iflag = 0; 1159 com->it_in.c_oflag = 0; 1160 com->it_in.c_cflag = TTYDEF_CFLAG; 1161 com->it_in.c_lflag = 0; 1162 if (unit == comconsole) { 1163 com->it_in.c_iflag = TTYDEF_IFLAG; 1164 com->it_in.c_oflag = TTYDEF_OFLAG; 1165 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 1166 com->it_in.c_lflag = TTYDEF_LFLAG; 1167 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 1168 com->lt_out.c_ispeed = com->lt_out.c_ospeed = 1169 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 1170 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 1171 } else 1172 com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 1173 if (siosetwater(com, com->it_in.c_ispeed) != 0) { 1174 enable_intr(); 1175 /* 1176 * Leave i/o resources allocated if this is a `cn'-level 1177 * console, so that other devices can't snarf them. 1178 */ 1179 if (iobase != siocniobase) 1180 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 1181 return (ENOMEM); 1182 } 1183 enable_intr(); 1184 termioschars(&com->it_in); 1185 com->it_out = com->it_in; 1186 1187 /* attempt to determine UART type */ 1188 printf("sio%d: type", unit); 1189 1190 1191#ifdef COM_MULTIPORT 1192 if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags)) 1193#else 1194 if (!COM_IIR_TXRDYBUG(flags)) 1195#endif 1196 { 1197 u_char scr; 1198 u_char scr1; 1199 u_char scr2; 1200 1201 scr = sio_getreg(com, com_scr); 1202 sio_setreg(com, com_scr, 0xa5); 1203 scr1 = sio_getreg(com, com_scr); 1204 sio_setreg(com, com_scr, 0x5a); 1205 scr2 = sio_getreg(com, com_scr); 1206 sio_setreg(com, com_scr, scr); 1207 if (scr1 != 0xa5 || scr2 != 0x5a) { 1208 printf(" 8250"); 1209 goto determined_type; 1210 } 1211 } 1212 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 1213 DELAY(100); 1214 com->st16650a = 0; 1215 switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 1216 case FIFO_RX_LOW: 1217 printf(" 16450"); 1218 break; 1219 case FIFO_RX_MEDL: 1220 printf(" 16450?"); 1221 break; 1222 case FIFO_RX_MEDH: 1223 printf(" 16550?"); 1224 break; 1225 case FIFO_RX_HIGH: 1226 if (COM_NOFIFO(flags)) { 1227 printf(" 16550A fifo disabled"); 1228 } else { 1229 com->hasfifo = TRUE; 1230 if (COM_ST16650A(flags)) { 1231 com->st16650a = 1; 1232 com->tx_fifo_size = 32; 1233 printf(" ST16650A"); 1234 } else { 1235 com->tx_fifo_size = COM_FIFOSIZE(flags); 1236 printf(" 16550A"); 1237 } 1238 } 1239#ifdef COM_ESP 1240 for (espp = likely_esp_ports; *espp != 0; espp++) 1241 if (espattach(com, *espp)) { 1242 com->tx_fifo_size = 1024; 1243 break; 1244 } 1245#endif 1246 if (!com->st16650a) { 1247 if (!com->tx_fifo_size) 1248 com->tx_fifo_size = 16; 1249 else 1250 printf(" lookalike with %d bytes FIFO", 1251 com->tx_fifo_size); 1252 } 1253 1254 break; 1255 } 1256 1257#ifdef COM_ESP 1258 if (com->esp) { 1259 /* 1260 * Set 16550 compatibility mode. 1261 * We don't use the ESP_MODE_SCALE bit to increase the 1262 * fifo trigger levels because we can't handle large 1263 * bursts of input. 1264 * XXX flow control should be set in comparam(), not here. 1265 */ 1266 outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 1267 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 1268 1269 /* Set RTS/CTS flow control. */ 1270 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 1271 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 1272 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 1273 1274 /* Set flow-control levels. */ 1275 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 1276 outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 1277 outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 1278 outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 1279 outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 1280 } 1281#endif /* COM_ESP */ 1282 sio_setreg(com, com_fifo, 0); 1283determined_type: ; 1284 1285#ifdef COM_MULTIPORT 1286 if (COM_ISMULTIPORT(flags)) { 1287 device_t masterdev; 1288 1289 com->multiport = TRUE; 1290 printf(" (multiport"); 1291 if (unit == COM_MPMASTER(flags)) 1292 printf(" master"); 1293 printf(")"); 1294 masterdev = devclass_get_device(sio_devclass, 1295 COM_MPMASTER(flags)); 1296 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 1297 SYS_RES_IRQ, 0, NULL, NULL) != 0); 1298 } 1299#endif /* COM_MULTIPORT */ 1300 if (unit == comconsole) 1301 printf(", console"); 1302 if (COM_IIR_TXRDYBUG(flags)) 1303 printf(" with a bogus IIR_TXRDY register"); 1304 printf("\n"); 1305 1306 if (!sio_registered) { 1307 register_swi(SWI_TTY, siopoll); 1308 sio_registered = TRUE; 1309 } 1310 make_dev(&sio_cdevsw, unit, 1311 UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 1312 make_dev(&sio_cdevsw, unit | CONTROL_INIT_STATE, 1313 UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 1314 make_dev(&sio_cdevsw, unit | CONTROL_LOCK_STATE, 1315 UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 1316 make_dev(&sio_cdevsw, unit | CALLOUT_MASK, 1317 UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 1318 make_dev(&sio_cdevsw, unit | CALLOUT_MASK | CONTROL_INIT_STATE, 1319 UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 1320 make_dev(&sio_cdevsw, unit | CALLOUT_MASK | CONTROL_LOCK_STATE, 1321 UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1322 com->flags = flags; 1323 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1324 pps_init(&com->pps); 1325 1326 rid = 0; 1327 com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 1328 RF_ACTIVE); 1329 if (com->irqres) { 1330 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 1331 INTR_TYPE_TTY | INTR_TYPE_FAST, 1332 siointr, com, &com->cookie); 1333 if (ret) { 1334 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 1335 com->irqres, INTR_TYPE_TTY, 1336 siointr, com, &com->cookie); 1337 if (ret == 0) 1338 device_printf(dev, "unable to activate interrupt in fast mode - using normal mode"); 1339 } 1340 if (ret) 1341 device_printf(dev, "could not activate interrupt\n"); 1342 } 1343 1344 return (0); 1345} 1346 1347static int 1348sioopen(dev, flag, mode, p) 1349 dev_t dev; 1350 int flag; 1351 int mode; 1352 struct proc *p; 1353{ 1354 struct com_s *com; 1355 int error; 1356 int mynor; 1357 int s; 1358 struct tty *tp; 1359 int unit; 1360 1361 mynor = minor(dev); 1362 unit = MINOR_TO_UNIT(mynor); 1363 com = com_addr(unit); 1364 if (com == NULL) 1365 return (ENXIO); 1366 if (com->gone) 1367 return (ENXIO); 1368 if (mynor & CONTROL_MASK) 1369 return (0); 1370 tp = dev->si_tty = com->tp = ttymalloc(com->tp); 1371 s = spltty(); 1372 /* 1373 * We jump to this label after all non-interrupted sleeps to pick 1374 * up any changes of the device state. 1375 */ 1376open_top: 1377 while (com->state & CS_DTR_OFF) { 1378 error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0); 1379 if (com_addr(unit) == NULL) 1380 return (ENXIO); 1381 if (error != 0 || com->gone) 1382 goto out; 1383 } 1384 if (tp->t_state & TS_ISOPEN) { 1385 /* 1386 * The device is open, so everything has been initialized. 1387 * Handle conflicts. 1388 */ 1389 if (mynor & CALLOUT_MASK) { 1390 if (!com->active_out) { 1391 error = EBUSY; 1392 goto out; 1393 } 1394 } else { 1395 if (com->active_out) { 1396 if (flag & O_NONBLOCK) { 1397 error = EBUSY; 1398 goto out; 1399 } 1400 error = tsleep(&com->active_out, 1401 TTIPRI | PCATCH, "siobi", 0); 1402 if (com_addr(unit) == NULL) 1403 return (ENXIO); 1404 if (error != 0 || com->gone) 1405 goto out; 1406 goto open_top; 1407 } 1408 } 1409 if (tp->t_state & TS_XCLUDE && 1410 suser(p)) { 1411 error = EBUSY; 1412 goto out; 1413 } 1414 } else { 1415 /* 1416 * The device isn't open, so there are no conflicts. 1417 * Initialize it. Initialization is done twice in many 1418 * cases: to preempt sleeping callin opens if we are 1419 * callout, and to complete a callin open after DCD rises. 1420 */ 1421 tp->t_oproc = comstart; 1422 tp->t_param = comparam; 1423 tp->t_stop = comstop; 1424 tp->t_dev = dev; 1425 tp->t_termios = mynor & CALLOUT_MASK 1426 ? com->it_out : com->it_in; 1427 (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 1428 com->poll = com->no_irq; 1429 com->poll_output = com->loses_outints; 1430 ++com->wopeners; 1431 error = comparam(tp, &tp->t_termios); 1432 --com->wopeners; 1433 if (error != 0) 1434 goto out; 1435 /* 1436 * XXX we should goto open_top if comparam() slept. 1437 */ 1438 if (com->hasfifo) { 1439 /* 1440 * (Re)enable and drain fifos. 1441 * 1442 * Certain SMC chips cause problems if the fifos 1443 * are enabled while input is ready. Turn off the 1444 * fifo if necessary to clear the input. We test 1445 * the input ready bit after enabling the fifos 1446 * since we've already enabled them in comparam() 1447 * and to handle races between enabling and fresh 1448 * input. 1449 */ 1450 while (TRUE) { 1451 sio_setreg(com, com_fifo, 1452 FIFO_RCV_RST | FIFO_XMT_RST 1453 | com->fifo_image); 1454 /* 1455 * XXX the delays are for superstitious 1456 * historical reasons. It must be less than 1457 * the character time at the maximum 1458 * supported speed (87 usec at 115200 bps 1459 * 8N1). Otherwise we might loop endlessly 1460 * if data is streaming in. We used to use 1461 * delays of 100. That usually worked 1462 * because DELAY(100) used to usually delay 1463 * for about 85 usec instead of 100. 1464 */ 1465 DELAY(50); 1466 if (!(inb(com->line_status_port) & LSR_RXRDY)) 1467 break; 1468 sio_setreg(com, com_fifo, 0); 1469 DELAY(50); 1470 (void) inb(com->data_port); 1471 } 1472 } 1473 1474 disable_intr(); 1475 (void) inb(com->line_status_port); 1476 (void) inb(com->data_port); 1477 com->prev_modem_status = com->last_modem_status 1478 = inb(com->modem_status_port); 1479 if (COM_IIR_TXRDYBUG(com->flags)) { 1480 outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 1481 | IER_EMSC); 1482 } else { 1483 outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 1484 | IER_ERLS | IER_EMSC); 1485 } 1486 enable_intr(); 1487 /* 1488 * Handle initial DCD. Callout devices get a fake initial 1489 * DCD (trapdoor DCD). If we are callout, then any sleeping 1490 * callin opens get woken up and resume sleeping on "siobi" 1491 * instead of "siodcd". 1492 */ 1493 /* 1494 * XXX `mynor & CALLOUT_MASK' should be 1495 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 1496 * TRAPDOOR_CARRIER is the default initial state for callout 1497 * devices and SOFT_CARRIER is like CLOCAL except it hides 1498 * the true carrier. 1499 */ 1500 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 1501 (*linesw[tp->t_line].l_modem)(tp, 1); 1502 } 1503 /* 1504 * Wait for DCD if necessary. 1505 */ 1506 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 1507 && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 1508 ++com->wopeners; 1509 error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0); 1510 if (com_addr(unit) == NULL) 1511 return (ENXIO); 1512 --com->wopeners; 1513 if (error != 0 || com->gone) 1514 goto out; 1515 goto open_top; 1516 } 1517 error = (*linesw[tp->t_line].l_open)(dev, tp); 1518 disc_optim(tp, &tp->t_termios, com); 1519 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 1520 com->active_out = TRUE; 1521 siosettimeout(); 1522out: 1523 splx(s); 1524 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 1525 comhardclose(com); 1526 return (error); 1527} 1528 1529static int 1530sioclose(dev, flag, mode, p) 1531 dev_t dev; 1532 int flag; 1533 int mode; 1534 struct proc *p; 1535{ 1536 struct com_s *com; 1537 int mynor; 1538 int s; 1539 struct tty *tp; 1540 1541 mynor = minor(dev); 1542 if (mynor & CONTROL_MASK) 1543 return (0); 1544 com = com_addr(MINOR_TO_UNIT(mynor)); 1545 if (com == NULL) 1546 return (ENODEV); 1547 tp = com->tp; 1548 s = spltty(); 1549 (*linesw[tp->t_line].l_close)(tp, flag); 1550 disc_optim(tp, &tp->t_termios, com); 1551 comstop(tp, FREAD | FWRITE); 1552 comhardclose(com); 1553 ttyclose(tp); 1554 siosettimeout(); 1555 splx(s); 1556 if (com->gone) { 1557 printf("sio%d: gone\n", com->unit); 1558 s = spltty(); 1559 if (com->ibuf != NULL) 1560 free(com->ibuf, M_DEVBUF); 1561 bzero(tp, sizeof *tp); 1562 splx(s); 1563 } 1564 return (0); 1565} 1566 1567static void 1568comhardclose(com) 1569 struct com_s *com; 1570{ 1571 int s; 1572 struct tty *tp; 1573 int unit; 1574 1575 unit = com->unit; 1576 s = spltty(); 1577 com->poll = FALSE; 1578 com->poll_output = FALSE; 1579 com->do_timestamp = FALSE; 1580 com->do_dcd_timestamp = FALSE; 1581 com->pps.ppsparam.mode = 0; 1582 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 1583 { 1584 sio_setreg(com, com_ier, 0); 1585 tp = com->tp; 1586 if (tp->t_cflag & HUPCL 1587 /* 1588 * XXX we will miss any carrier drop between here and the 1589 * next open. Perhaps we should watch DCD even when the 1590 * port is closed; it is not sufficient to check it at 1591 * the next open because it might go up and down while 1592 * we're not watching. 1593 */ 1594 || (!com->active_out 1595 && !(com->prev_modem_status & MSR_DCD) 1596 && !(com->it_in.c_cflag & CLOCAL)) 1597 || !(tp->t_state & TS_ISOPEN)) { 1598 (void)commctl(com, TIOCM_DTR, DMBIC); 1599 if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 1600 timeout(siodtrwakeup, com, com->dtr_wait); 1601 com->state |= CS_DTR_OFF; 1602 } 1603 } 1604 } 1605 if (com->hasfifo) { 1606 /* 1607 * Disable fifos so that they are off after controlled 1608 * reboots. Some BIOSes fail to detect 16550s when the 1609 * fifos are enabled. 1610 */ 1611 sio_setreg(com, com_fifo, 0); 1612 } 1613 com->active_out = FALSE; 1614 wakeup(&com->active_out); 1615 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 1616 splx(s); 1617} 1618 1619static int 1620sioread(dev, uio, flag) 1621 dev_t dev; 1622 struct uio *uio; 1623 int flag; 1624{ 1625 int mynor; 1626 struct com_s *com; 1627 1628 mynor = minor(dev); 1629 if (mynor & CONTROL_MASK) 1630 return (ENODEV); 1631 com = com_addr(MINOR_TO_UNIT(mynor)); 1632 if (com == NULL || com->gone) 1633 return (ENODEV); 1634 return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 1635} 1636 1637static int 1638siowrite(dev, uio, flag) 1639 dev_t dev; 1640 struct uio *uio; 1641 int flag; 1642{ 1643 int mynor; 1644 struct com_s *com; 1645 int unit; 1646 1647 mynor = minor(dev); 1648 if (mynor & CONTROL_MASK) 1649 return (ENODEV); 1650 1651 unit = MINOR_TO_UNIT(mynor); 1652 com = com_addr(unit); 1653 if (com == NULL || com->gone) 1654 return (ENODEV); 1655 /* 1656 * (XXX) We disallow virtual consoles if the physical console is 1657 * a serial port. This is in case there is a display attached that 1658 * is not the console. In that situation we don't need/want the X 1659 * server taking over the console. 1660 */ 1661 if (constty != NULL && unit == comconsole) 1662 constty = NULL; 1663 return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 1664} 1665 1666static void 1667siobusycheck(chan) 1668 void *chan; 1669{ 1670 struct com_s *com; 1671 int s; 1672 1673 com = (struct com_s *)chan; 1674 1675 /* 1676 * Clear TS_BUSY if low-level output is complete. 1677 * spl locking is sufficient because siointr1() does not set CS_BUSY. 1678 * If siointr1() clears CS_BUSY after we look at it, then we'll get 1679 * called again. Reading the line status port outside of siointr1() 1680 * is safe because CS_BUSY is clear so there are no output interrupts 1681 * to lose. 1682 */ 1683 s = spltty(); 1684 if (com->state & CS_BUSY) 1685 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 1686 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 1687 == (LSR_TSRE | LSR_TXRDY)) { 1688 com->tp->t_state &= ~TS_BUSY; 1689 ttwwakeup(com->tp); 1690 com->extra_state &= ~CSE_BUSYCHECK; 1691 } else 1692 timeout(siobusycheck, com, hz / 100); 1693 splx(s); 1694} 1695 1696static void 1697siodtrwakeup(chan) 1698 void *chan; 1699{ 1700 struct com_s *com; 1701 1702 com = (struct com_s *)chan; 1703 com->state &= ~CS_DTR_OFF; 1704 wakeup(&com->dtr_wait); 1705} 1706 1707static void 1708sioinput(com) 1709 struct com_s *com; 1710{ 1711 u_char *buf; 1712 int incc; 1713 u_char line_status; 1714 int recv_data; 1715 struct tty *tp; 1716 1717 buf = com->ibuf; 1718 tp = com->tp; 1719 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 1720 com_events -= (com->iptr - com->ibuf); 1721 com->iptr = com->ibuf; 1722 return; 1723 } 1724 if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 1725 /* 1726 * Avoid the grotesquely inefficient lineswitch routine 1727 * (ttyinput) in "raw" mode. It usually takes about 450 1728 * instructions (that's without canonical processing or echo!). 1729 * slinput is reasonably fast (usually 40 instructions plus 1730 * call overhead). 1731 */ 1732 do { 1733 enable_intr(); 1734 incc = com->iptr - buf; 1735 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 1736 && (com->state & CS_RTS_IFLOW 1737 || tp->t_iflag & IXOFF) 1738 && !(tp->t_state & TS_TBLOCK)) 1739 ttyblock(tp); 1740 com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 1741 += b_to_q((char *)buf, incc, &tp->t_rawq); 1742 buf += incc; 1743 tk_nin += incc; 1744 tk_rawcc += incc; 1745 tp->t_rawcc += incc; 1746 ttwakeup(tp); 1747 if (tp->t_state & TS_TTSTOP 1748 && (tp->t_iflag & IXANY 1749 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 1750 tp->t_state &= ~TS_TTSTOP; 1751 tp->t_lflag &= ~FLUSHO; 1752 comstart(tp); 1753 } 1754 disable_intr(); 1755 } while (buf < com->iptr); 1756 } else { 1757 do { 1758 enable_intr(); 1759 line_status = buf[com->ierroff]; 1760 recv_data = *buf++; 1761 if (line_status 1762 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 1763 if (line_status & LSR_BI) 1764 recv_data |= TTY_BI; 1765 if (line_status & LSR_FE) 1766 recv_data |= TTY_FE; 1767 if (line_status & LSR_OE) 1768 recv_data |= TTY_OE; 1769 if (line_status & LSR_PE) 1770 recv_data |= TTY_PE; 1771 } 1772 (*linesw[tp->t_line].l_rint)(recv_data, tp); 1773 disable_intr(); 1774 } while (buf < com->iptr); 1775 } 1776 com_events -= (com->iptr - com->ibuf); 1777 com->iptr = com->ibuf; 1778 1779 /* 1780 * There is now room for another low-level buffer full of input, 1781 * so enable RTS if it is now disabled and there is room in the 1782 * high-level buffer. 1783 */ 1784 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 1785 !(tp->t_state & TS_TBLOCK)) 1786 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 1787} 1788 1789void 1790siointr(arg) 1791 void *arg; 1792{ 1793#ifndef COM_MULTIPORT 1794 COM_LOCK(); 1795 siointr1((struct com_s *) arg); 1796 COM_UNLOCK(); 1797#else /* COM_MULTIPORT */ 1798 bool_t possibly_more_intrs; 1799 int unit; 1800 struct com_s *com; 1801 1802 /* 1803 * Loop until there is no activity on any port. This is necessary 1804 * to get an interrupt edge more than to avoid another interrupt. 1805 * If the IRQ signal is just an OR of the IRQ signals from several 1806 * devices, then the edge from one may be lost because another is 1807 * on. 1808 */ 1809 COM_LOCK(); 1810 do { 1811 possibly_more_intrs = FALSE; 1812 for (unit = 0; unit < sio_numunits; ++unit) { 1813 com = com_addr(unit); 1814 /* 1815 * XXX COM_LOCK(); 1816 * would it work here, or be counter-productive? 1817 */ 1818 if (com != NULL 1819 && !com->gone 1820 && (inb(com->int_id_port) & IIR_IMASK) 1821 != IIR_NOPEND) { 1822 siointr1(com); 1823 possibly_more_intrs = TRUE; 1824 } 1825 /* XXX COM_UNLOCK(); */ 1826 } 1827 } while (possibly_more_intrs); 1828 COM_UNLOCK(); 1829#endif /* COM_MULTIPORT */ 1830} 1831 1832static void 1833siointr1(com) 1834 struct com_s *com; 1835{ 1836 u_char line_status; 1837 u_char modem_status; 1838 u_char *ioptr; 1839 u_char recv_data; 1840 u_char int_ctl; 1841 u_char int_ctl_new; 1842 struct timecounter *tc; 1843 u_int count; 1844 1845 int_ctl = inb(com->intr_ctl_port); 1846 int_ctl_new = int_ctl; 1847 1848 while (!com->gone) { 1849 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 1850 modem_status = inb(com->modem_status_port); 1851 if ((modem_status ^ com->last_modem_status) & MSR_DCD) { 1852 tc = timecounter; 1853 count = tc->tc_get_timecount(tc); 1854 pps_event(&com->pps, tc, count, 1855 (modem_status & MSR_DCD) ? 1856 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 1857 } 1858 } 1859 line_status = inb(com->line_status_port); 1860 1861 /* input event? (check first to help avoid overruns) */ 1862 while (line_status & LSR_RCV_MASK) { 1863 /* break/unnattached error bits or real input? */ 1864 if (!(line_status & LSR_RXRDY)) 1865 recv_data = 0; 1866 else 1867 recv_data = inb(com->data_port); 1868 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 1869 /* 1870 * Don't store BI if IGNBRK or FE/PE if IGNPAR. 1871 * Otherwise, push the work to a higher level 1872 * (to handle PARMRK) if we're bypassing. 1873 * Otherwise, convert BI/FE and PE+INPCK to 0. 1874 * 1875 * This makes bypassing work right in the 1876 * usual "raw" case (IGNBRK set, and IGNPAR 1877 * and INPCK clear). 1878 * 1879 * Note: BI together with FE/PE means just BI. 1880 */ 1881 if (line_status & LSR_BI) { 1882#if defined(DDB) && defined(BREAK_TO_DEBUGGER) 1883 if (com->unit == comconsole) { 1884 breakpoint(); 1885 goto cont; 1886 } 1887#endif 1888 if (com->tp == NULL 1889 || com->tp->t_iflag & IGNBRK) 1890 goto cont; 1891 } else { 1892 if (com->tp == NULL 1893 || com->tp->t_iflag & IGNPAR) 1894 goto cont; 1895 } 1896 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 1897 && (line_status & (LSR_BI | LSR_FE) 1898 || com->tp->t_iflag & INPCK)) 1899 recv_data = 0; 1900 } 1901 ++com->bytes_in; 1902 if (com->hotchar != 0 && recv_data == com->hotchar) 1903 setsofttty(); 1904 ioptr = com->iptr; 1905 if (ioptr >= com->ibufend) 1906 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 1907 else { 1908 if (com->do_timestamp) 1909 microtime(&com->timestamp); 1910 ++com_events; 1911 schedsofttty(); 1912#if 0 /* for testing input latency vs efficiency */ 1913if (com->iptr - com->ibuf == 8) 1914 setsofttty(); 1915#endif 1916 ioptr[0] = recv_data; 1917 ioptr[com->ierroff] = line_status; 1918 com->iptr = ++ioptr; 1919 if (ioptr == com->ihighwater 1920 && com->state & CS_RTS_IFLOW) 1921 outb(com->modem_ctl_port, 1922 com->mcr_image &= ~MCR_RTS); 1923 if (line_status & LSR_OE) 1924 CE_RECORD(com, CE_OVERRUN); 1925 } 1926cont: 1927 /* 1928 * "& 0x7F" is to avoid the gcc-1.40 generating a slow 1929 * jump from the top of the loop to here 1930 */ 1931 line_status = inb(com->line_status_port) & 0x7F; 1932 } 1933 1934 /* modem status change? (always check before doing output) */ 1935 modem_status = inb(com->modem_status_port); 1936 if (modem_status != com->last_modem_status) { 1937 if (com->do_dcd_timestamp 1938 && !(com->last_modem_status & MSR_DCD) 1939 && modem_status & MSR_DCD) 1940 microtime(&com->dcd_timestamp); 1941 1942 /* 1943 * Schedule high level to handle DCD changes. Note 1944 * that we don't use the delta bits anywhere. Some 1945 * UARTs mess them up, and it's easy to remember the 1946 * previous bits and calculate the delta. 1947 */ 1948 com->last_modem_status = modem_status; 1949 if (!(com->state & CS_CHECKMSR)) { 1950 com_events += LOTS_OF_EVENTS; 1951 com->state |= CS_CHECKMSR; 1952 setsofttty(); 1953 } 1954 1955 /* handle CTS change immediately for crisp flow ctl */ 1956 if (com->state & CS_CTS_OFLOW) { 1957 if (modem_status & MSR_CTS) 1958 com->state |= CS_ODEVREADY; 1959 else 1960 com->state &= ~CS_ODEVREADY; 1961 } 1962 } 1963 1964 /* output queued and everything ready? */ 1965 if (line_status & LSR_TXRDY 1966 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 1967 ioptr = com->obufq.l_head; 1968 if (com->tx_fifo_size > 1) { 1969 u_int ocount; 1970 1971 ocount = com->obufq.l_tail - ioptr; 1972 if (ocount > com->tx_fifo_size) 1973 ocount = com->tx_fifo_size; 1974 com->bytes_out += ocount; 1975 do 1976 outb(com->data_port, *ioptr++); 1977 while (--ocount != 0); 1978 } else { 1979 outb(com->data_port, *ioptr++); 1980 ++com->bytes_out; 1981 } 1982 com->obufq.l_head = ioptr; 1983 if (COM_IIR_TXRDYBUG(com->flags)) { 1984 int_ctl_new = int_ctl | IER_ETXRDY; 1985 } 1986 if (ioptr >= com->obufq.l_tail) { 1987 struct lbq *qp; 1988 1989 qp = com->obufq.l_next; 1990 qp->l_queued = FALSE; 1991 qp = qp->l_next; 1992 if (qp != NULL) { 1993 com->obufq.l_head = qp->l_head; 1994 com->obufq.l_tail = qp->l_tail; 1995 com->obufq.l_next = qp; 1996 } else { 1997 /* output just completed */ 1998 if (COM_IIR_TXRDYBUG(com->flags)) { 1999 int_ctl_new = int_ctl & ~IER_ETXRDY; 2000 } 2001 com->state &= ~CS_BUSY; 2002 } 2003 if (!(com->state & CS_ODONE)) { 2004 com_events += LOTS_OF_EVENTS; 2005 com->state |= CS_ODONE; 2006 setsofttty(); /* handle at high level ASAP */ 2007 } 2008 } 2009 if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 2010 outb(com->intr_ctl_port, int_ctl_new); 2011 } 2012 } 2013 2014 /* finished? */ 2015#ifndef COM_MULTIPORT 2016 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 2017#endif /* COM_MULTIPORT */ 2018 return; 2019 } 2020} 2021 2022static int 2023sioioctl(dev, cmd, data, flag, p) 2024 dev_t dev; 2025 u_long cmd; 2026 caddr_t data; 2027 int flag; 2028 struct proc *p; 2029{ 2030 struct com_s *com; 2031 int error; 2032 int mynor; 2033 int s; 2034 struct tty *tp; 2035#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 2036 u_long oldcmd; 2037 struct termios term; 2038#endif 2039 2040 mynor = minor(dev); 2041 com = com_addr(MINOR_TO_UNIT(mynor)); 2042 if (com == NULL || com->gone) 2043 return (ENODEV); 2044 if (mynor & CONTROL_MASK) { 2045 struct termios *ct; 2046 2047 switch (mynor & CONTROL_MASK) { 2048 case CONTROL_INIT_STATE: 2049 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 2050 break; 2051 case CONTROL_LOCK_STATE: 2052 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 2053 break; 2054 default: 2055 return (ENODEV); /* /dev/nodev */ 2056 } 2057 switch (cmd) { 2058 case TIOCSETA: 2059 error = suser(p); 2060 if (error != 0) 2061 return (error); 2062 *ct = *(struct termios *)data; 2063 return (0); 2064 case TIOCGETA: 2065 *(struct termios *)data = *ct; 2066 return (0); 2067 case TIOCGETD: 2068 *(int *)data = TTYDISC; 2069 return (0); 2070 case TIOCGWINSZ: 2071 bzero(data, sizeof(struct winsize)); 2072 return (0); 2073 default: 2074 return (ENOTTY); 2075 } 2076 } 2077 tp = com->tp; 2078#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 2079 term = tp->t_termios; 2080 oldcmd = cmd; 2081 error = ttsetcompat(tp, &cmd, data, &term); 2082 if (error != 0) 2083 return (error); 2084 if (cmd != oldcmd) 2085 data = (caddr_t)&term; 2086#endif 2087 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 2088 int cc; 2089 struct termios *dt = (struct termios *)data; 2090 struct termios *lt = mynor & CALLOUT_MASK 2091 ? &com->lt_out : &com->lt_in; 2092 2093 dt->c_iflag = (tp->t_iflag & lt->c_iflag) 2094 | (dt->c_iflag & ~lt->c_iflag); 2095 dt->c_oflag = (tp->t_oflag & lt->c_oflag) 2096 | (dt->c_oflag & ~lt->c_oflag); 2097 dt->c_cflag = (tp->t_cflag & lt->c_cflag) 2098 | (dt->c_cflag & ~lt->c_cflag); 2099 dt->c_lflag = (tp->t_lflag & lt->c_lflag) 2100 | (dt->c_lflag & ~lt->c_lflag); 2101 for (cc = 0; cc < NCCS; ++cc) 2102 if (lt->c_cc[cc] != 0) 2103 dt->c_cc[cc] = tp->t_cc[cc]; 2104 if (lt->c_ispeed != 0) 2105 dt->c_ispeed = tp->t_ispeed; 2106 if (lt->c_ospeed != 0) 2107 dt->c_ospeed = tp->t_ospeed; 2108 } 2109 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 2110 if (error != ENOIOCTL) 2111 return (error); 2112 s = spltty(); 2113 error = ttioctl(tp, cmd, data, flag); 2114 disc_optim(tp, &tp->t_termios, com); 2115 if (error != ENOIOCTL) { 2116 splx(s); 2117 return (error); 2118 } 2119 switch (cmd) { 2120 case TIOCSBRK: 2121 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 2122 break; 2123 case TIOCCBRK: 2124 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 2125 break; 2126 case TIOCSDTR: 2127 (void)commctl(com, TIOCM_DTR, DMBIS); 2128 break; 2129 case TIOCCDTR: 2130 (void)commctl(com, TIOCM_DTR, DMBIC); 2131 break; 2132 /* 2133 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 2134 * changes get undone on the next call to comparam(). 2135 */ 2136 case TIOCMSET: 2137 (void)commctl(com, *(int *)data, DMSET); 2138 break; 2139 case TIOCMBIS: 2140 (void)commctl(com, *(int *)data, DMBIS); 2141 break; 2142 case TIOCMBIC: 2143 (void)commctl(com, *(int *)data, DMBIC); 2144 break; 2145 case TIOCMGET: 2146 *(int *)data = commctl(com, 0, DMGET); 2147 break; 2148 case TIOCMSDTRWAIT: 2149 /* must be root since the wait applies to following logins */ 2150 error = suser(p); 2151 if (error != 0) { 2152 splx(s); 2153 return (error); 2154 } 2155 com->dtr_wait = *(int *)data * hz / 100; 2156 break; 2157 case TIOCMGDTRWAIT: 2158 *(int *)data = com->dtr_wait * 100 / hz; 2159 break; 2160 case TIOCTIMESTAMP: 2161 com->do_timestamp = TRUE; 2162 *(struct timeval *)data = com->timestamp; 2163 break; 2164 case TIOCDCDTIMESTAMP: 2165 com->do_dcd_timestamp = TRUE; 2166 *(struct timeval *)data = com->dcd_timestamp; 2167 break; 2168 default: 2169 splx(s); 2170 error = pps_ioctl(cmd, data, &com->pps); 2171 if (error == ENODEV) 2172 error = ENOTTY; 2173 return (error); 2174 } 2175 splx(s); 2176 return (0); 2177} 2178 2179static void 2180siopoll() 2181{ 2182 int unit; 2183 2184 if (com_events == 0) 2185 return; 2186repeat: 2187 for (unit = 0; unit < sio_numunits; ++unit) { 2188 struct com_s *com; 2189 int incc; 2190 struct tty *tp; 2191 2192 com = com_addr(unit); 2193 if (com == NULL) 2194 continue; 2195 tp = com->tp; 2196 if (tp == NULL || com->gone) { 2197 /* 2198 * Discard any events related to never-opened or 2199 * going-away devices. 2200 */ 2201 disable_intr(); 2202 incc = com->iptr - com->ibuf; 2203 com->iptr = com->ibuf; 2204 if (com->state & CS_CHECKMSR) { 2205 incc += LOTS_OF_EVENTS; 2206 com->state &= ~CS_CHECKMSR; 2207 } 2208 com_events -= incc; 2209 enable_intr(); 2210 continue; 2211 } 2212 if (com->iptr != com->ibuf) { 2213 disable_intr(); 2214 sioinput(com); 2215 enable_intr(); 2216 } 2217 if (com->state & CS_CHECKMSR) { 2218 u_char delta_modem_status; 2219 2220 disable_intr(); 2221 delta_modem_status = com->last_modem_status 2222 ^ com->prev_modem_status; 2223 com->prev_modem_status = com->last_modem_status; 2224 com_events -= LOTS_OF_EVENTS; 2225 com->state &= ~CS_CHECKMSR; 2226 enable_intr(); 2227 if (delta_modem_status & MSR_DCD) 2228 (*linesw[tp->t_line].l_modem) 2229 (tp, com->prev_modem_status & MSR_DCD); 2230 } 2231 if (com->state & CS_ODONE) { 2232 disable_intr(); 2233 com_events -= LOTS_OF_EVENTS; 2234 com->state &= ~CS_ODONE; 2235 enable_intr(); 2236 if (!(com->state & CS_BUSY) 2237 && !(com->extra_state & CSE_BUSYCHECK)) { 2238 timeout(siobusycheck, com, hz / 100); 2239 com->extra_state |= CSE_BUSYCHECK; 2240 } 2241 (*linesw[tp->t_line].l_start)(tp); 2242 } 2243 if (com_events == 0) 2244 break; 2245 } 2246 if (com_events >= LOTS_OF_EVENTS) 2247 goto repeat; 2248} 2249 2250static int 2251comparam(tp, t) 2252 struct tty *tp; 2253 struct termios *t; 2254{ 2255 u_int cfcr; 2256 int cflag; 2257 struct com_s *com; 2258 int divisor; 2259 u_char dlbh; 2260 u_char dlbl; 2261 int s; 2262 int unit; 2263 2264 /* do historical conversions */ 2265 if (t->c_ispeed == 0) 2266 t->c_ispeed = t->c_ospeed; 2267 2268 /* check requested parameters */ 2269 divisor = ttspeedtab(t->c_ospeed, comspeedtab); 2270 if (divisor < 0 || (divisor > 0 && t->c_ispeed != t->c_ospeed)) 2271 return (EINVAL); 2272 2273 /* parameters are OK, convert them to the com struct and the device */ 2274 unit = DEV_TO_UNIT(tp->t_dev); 2275 com = com_addr(unit); 2276 if (com == NULL) 2277 return (ENODEV); 2278 s = spltty(); 2279 if (divisor == 0) 2280 (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 2281 else 2282 (void)commctl(com, TIOCM_DTR, DMBIS); 2283 cflag = t->c_cflag; 2284 switch (cflag & CSIZE) { 2285 case CS5: 2286 cfcr = CFCR_5BITS; 2287 break; 2288 case CS6: 2289 cfcr = CFCR_6BITS; 2290 break; 2291 case CS7: 2292 cfcr = CFCR_7BITS; 2293 break; 2294 default: 2295 cfcr = CFCR_8BITS; 2296 break; 2297 } 2298 if (cflag & PARENB) { 2299 cfcr |= CFCR_PENAB; 2300 if (!(cflag & PARODD)) 2301 cfcr |= CFCR_PEVEN; 2302 } 2303 if (cflag & CSTOPB) 2304 cfcr |= CFCR_STOPB; 2305 2306 if (com->hasfifo && divisor != 0) { 2307 /* 2308 * Use a fifo trigger level low enough so that the input 2309 * latency from the fifo is less than about 16 msec and 2310 * the total latency is less than about 30 msec. These 2311 * latencies are reasonable for humans. Serial comms 2312 * protocols shouldn't expect anything better since modem 2313 * latencies are larger. 2314 */ 2315 com->fifo_image = t->c_ospeed <= 4800 2316 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_HIGH; 2317#ifdef COM_ESP 2318 /* 2319 * The Hayes ESP card needs the fifo DMA mode bit set 2320 * in compatibility mode. If not, it will interrupt 2321 * for each character received. 2322 */ 2323 if (com->esp) 2324 com->fifo_image |= FIFO_DMA_MODE; 2325#endif 2326 sio_setreg(com, com_fifo, com->fifo_image); 2327 } 2328 2329 /* 2330 * This returns with interrupts disabled so that we can complete 2331 * the speed change atomically. Keeping interrupts disabled is 2332 * especially important while com_data is hidden. 2333 */ 2334 (void) siosetwater(com, t->c_ispeed); 2335 2336 if (divisor != 0) { 2337 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 2338 /* 2339 * Only set the divisor registers if they would change, 2340 * since on some 16550 incompatibles (UMC8669F), setting 2341 * them while input is arriving them loses sync until 2342 * data stops arriving. 2343 */ 2344 dlbl = divisor & 0xFF; 2345 if (sio_getreg(com, com_dlbl) != dlbl) 2346 sio_setreg(com, com_dlbl, dlbl); 2347 dlbh = (u_int) divisor >> 8; 2348 if (sio_getreg(com, com_dlbh) != dlbh) 2349 sio_setreg(com, com_dlbh, dlbh); 2350 } 2351 2352 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 2353 2354 if (!(tp->t_state & TS_TTSTOP)) 2355 com->state |= CS_TTGO; 2356 2357 if (cflag & CRTS_IFLOW) { 2358 if (com->st16650a) { 2359 sio_setreg(com, com_cfcr, 0xbf); 2360 sio_setreg(com, com_fifo, 2361 sio_getreg(com, com_fifo) | 0x40); 2362 } 2363 com->state |= CS_RTS_IFLOW; 2364 /* 2365 * If CS_RTS_IFLOW just changed from off to on, the change 2366 * needs to be propagated to MCR_RTS. This isn't urgent, 2367 * so do it later by calling comstart() instead of repeating 2368 * a lot of code from comstart() here. 2369 */ 2370 } else if (com->state & CS_RTS_IFLOW) { 2371 com->state &= ~CS_RTS_IFLOW; 2372 /* 2373 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 2374 * on here, since comstart() won't do it later. 2375 */ 2376 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2377 if (com->st16650a) { 2378 sio_setreg(com, com_cfcr, 0xbf); 2379 sio_setreg(com, com_fifo, 2380 sio_getreg(com, com_fifo) & ~0x40); 2381 } 2382 } 2383 2384 2385 /* 2386 * Set up state to handle output flow control. 2387 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 2388 * Now has 10+ msec latency, while CTS flow has 50- usec latency. 2389 */ 2390 com->state |= CS_ODEVREADY; 2391 com->state &= ~CS_CTS_OFLOW; 2392 if (cflag & CCTS_OFLOW) { 2393 com->state |= CS_CTS_OFLOW; 2394 if (!(com->last_modem_status & MSR_CTS)) 2395 com->state &= ~CS_ODEVREADY; 2396 if (com->st16650a) { 2397 sio_setreg(com, com_cfcr, 0xbf); 2398 sio_setreg(com, com_fifo, 2399 sio_getreg(com, com_fifo) | 0x80); 2400 } 2401 } else { 2402 if (com->st16650a) { 2403 sio_setreg(com, com_cfcr, 0xbf); 2404 sio_setreg(com, com_fifo, 2405 sio_getreg(com, com_fifo) & ~0x80); 2406 } 2407 } 2408 2409 sio_setreg(com, com_cfcr, com->cfcr_image); 2410 2411 /* XXX shouldn't call functions while intrs are disabled. */ 2412 disc_optim(tp, t, com); 2413 /* 2414 * Recover from fiddling with CS_TTGO. We used to call siointr1() 2415 * unconditionally, but that defeated the careful discarding of 2416 * stale input in sioopen(). 2417 */ 2418 if (com->state >= (CS_BUSY | CS_TTGO)) 2419 siointr1(com); 2420 2421 enable_intr(); 2422 splx(s); 2423 comstart(tp); 2424 if (com->ibufold != NULL) { 2425 free(com->ibufold, M_DEVBUF); 2426 com->ibufold = NULL; 2427 } 2428 return (0); 2429} 2430 2431static int 2432siosetwater(com, speed) 2433 struct com_s *com; 2434 speed_t speed; 2435{ 2436 int cp4ticks; 2437 u_char *ibuf; 2438 int ibufsize; 2439 struct tty *tp; 2440 2441 /* 2442 * Make the buffer size large enough to handle a softtty interrupt 2443 * latency of about 2 ticks without loss of throughput or data 2444 * (about 3 ticks if input flow control is not used or not honoured, 2445 * but a bit less for CS5-CS7 modes). 2446 */ 2447 cp4ticks = speed / 10 / hz * 4; 2448 for (ibufsize = 128; ibufsize < cp4ticks;) 2449 ibufsize <<= 1; 2450 if (ibufsize == com->ibufsize) { 2451 disable_intr(); 2452 return (0); 2453 } 2454 2455 /* 2456 * Allocate input buffer. The extra factor of 2 in the size is 2457 * to allow for an error byte for each input byte. 2458 */ 2459 ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 2460 if (ibuf == NULL) { 2461 disable_intr(); 2462 return (ENOMEM); 2463 } 2464 2465 /* Initialize non-critical variables. */ 2466 com->ibufold = com->ibuf; 2467 com->ibufsize = ibufsize; 2468 tp = com->tp; 2469 if (tp != NULL) { 2470 tp->t_ififosize = 2 * ibufsize; 2471 tp->t_ispeedwat = (speed_t)-1; 2472 tp->t_ospeedwat = (speed_t)-1; 2473 } 2474 2475 /* 2476 * Read current input buffer, if any. Continue with interrupts 2477 * disabled. 2478 */ 2479 disable_intr(); 2480 if (com->iptr != com->ibuf) 2481 sioinput(com); 2482 2483 /*- 2484 * Initialize critical variables, including input buffer watermarks. 2485 * The external device is asked to stop sending when the buffer 2486 * exactly reaches high water, or when the high level requests it. 2487 * The high level is notified immediately (rather than at a later 2488 * clock tick) when this watermark is reached. 2489 * The buffer size is chosen so the watermark should almost never 2490 * be reached. 2491 * The low watermark is invisibly 0 since the buffer is always 2492 * emptied all at once. 2493 */ 2494 com->iptr = com->ibuf = ibuf; 2495 com->ibufend = ibuf + ibufsize; 2496 com->ierroff = ibufsize; 2497 com->ihighwater = ibuf + 3 * ibufsize / 4; 2498 return (0); 2499} 2500 2501static void 2502comstart(tp) 2503 struct tty *tp; 2504{ 2505 struct com_s *com; 2506 int s; 2507 int unit; 2508 2509 unit = DEV_TO_UNIT(tp->t_dev); 2510 com = com_addr(unit); 2511 if (com == NULL) 2512 return; 2513 s = spltty(); 2514 disable_intr(); 2515 if (tp->t_state & TS_TTSTOP) 2516 com->state &= ~CS_TTGO; 2517 else 2518 com->state |= CS_TTGO; 2519 if (tp->t_state & TS_TBLOCK) { 2520 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 2521 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 2522 } else { 2523 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 2524 && com->state & CS_RTS_IFLOW) 2525 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2526 } 2527 enable_intr(); 2528 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 2529 ttwwakeup(tp); 2530 splx(s); 2531 return; 2532 } 2533 if (tp->t_outq.c_cc != 0) { 2534 struct lbq *qp; 2535 struct lbq *next; 2536 2537 if (!com->obufs[0].l_queued) { 2538 com->obufs[0].l_tail 2539 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 2540 sizeof com->obuf1); 2541 com->obufs[0].l_next = NULL; 2542 com->obufs[0].l_queued = TRUE; 2543 disable_intr(); 2544 if (com->state & CS_BUSY) { 2545 qp = com->obufq.l_next; 2546 while ((next = qp->l_next) != NULL) 2547 qp = next; 2548 qp->l_next = &com->obufs[0]; 2549 } else { 2550 com->obufq.l_head = com->obufs[0].l_head; 2551 com->obufq.l_tail = com->obufs[0].l_tail; 2552 com->obufq.l_next = &com->obufs[0]; 2553 com->state |= CS_BUSY; 2554 } 2555 enable_intr(); 2556 } 2557 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 2558 com->obufs[1].l_tail 2559 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 2560 sizeof com->obuf2); 2561 com->obufs[1].l_next = NULL; 2562 com->obufs[1].l_queued = TRUE; 2563 disable_intr(); 2564 if (com->state & CS_BUSY) { 2565 qp = com->obufq.l_next; 2566 while ((next = qp->l_next) != NULL) 2567 qp = next; 2568 qp->l_next = &com->obufs[1]; 2569 } else { 2570 com->obufq.l_head = com->obufs[1].l_head; 2571 com->obufq.l_tail = com->obufs[1].l_tail; 2572 com->obufq.l_next = &com->obufs[1]; 2573 com->state |= CS_BUSY; 2574 } 2575 enable_intr(); 2576 } 2577 tp->t_state |= TS_BUSY; 2578 } 2579 disable_intr(); 2580 if (com->state >= (CS_BUSY | CS_TTGO)) 2581 siointr1(com); /* fake interrupt to start output */ 2582 enable_intr(); 2583 ttwwakeup(tp); 2584 splx(s); 2585} 2586 2587static void 2588comstop(tp, rw) 2589 struct tty *tp; 2590 int rw; 2591{ 2592 struct com_s *com; 2593 2594 com = com_addr(DEV_TO_UNIT(tp->t_dev)); 2595 if (com == NULL || com->gone) 2596 return; 2597 disable_intr(); 2598 if (rw & FWRITE) { 2599 if (com->hasfifo) 2600#ifdef COM_ESP 2601 /* XXX avoid h/w bug. */ 2602 if (!com->esp) 2603#endif 2604 sio_setreg(com, com_fifo, 2605 FIFO_XMT_RST | com->fifo_image); 2606 com->obufs[0].l_queued = FALSE; 2607 com->obufs[1].l_queued = FALSE; 2608 if (com->state & CS_ODONE) 2609 com_events -= LOTS_OF_EVENTS; 2610 com->state &= ~(CS_ODONE | CS_BUSY); 2611 com->tp->t_state &= ~TS_BUSY; 2612 } 2613 if (rw & FREAD) { 2614 if (com->hasfifo) 2615#ifdef COM_ESP 2616 /* XXX avoid h/w bug. */ 2617 if (!com->esp) 2618#endif 2619 sio_setreg(com, com_fifo, 2620 FIFO_RCV_RST | com->fifo_image); 2621 com_events -= (com->iptr - com->ibuf); 2622 com->iptr = com->ibuf; 2623 } 2624 enable_intr(); 2625 comstart(tp); 2626} 2627 2628static int 2629commctl(com, bits, how) 2630 struct com_s *com; 2631 int bits; 2632 int how; 2633{ 2634 int mcr; 2635 int msr; 2636 2637 if (how == DMGET) { 2638 bits = TIOCM_LE; /* XXX - always enabled while open */ 2639 mcr = com->mcr_image; 2640 if (mcr & MCR_DTR) 2641 bits |= TIOCM_DTR; 2642 if (mcr & MCR_RTS) 2643 bits |= TIOCM_RTS; 2644 msr = com->prev_modem_status; 2645 if (msr & MSR_CTS) 2646 bits |= TIOCM_CTS; 2647 if (msr & MSR_DCD) 2648 bits |= TIOCM_CD; 2649 if (msr & MSR_DSR) 2650 bits |= TIOCM_DSR; 2651 /* 2652 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 2653 * more volatile by reading the modem status a lot. Perhaps 2654 * we should latch both bits until the status is read here. 2655 */ 2656 if (msr & (MSR_RI | MSR_TERI)) 2657 bits |= TIOCM_RI; 2658 return (bits); 2659 } 2660 mcr = 0; 2661 if (bits & TIOCM_DTR) 2662 mcr |= MCR_DTR; 2663 if (bits & TIOCM_RTS) 2664 mcr |= MCR_RTS; 2665 if (com->gone) 2666 return(0); 2667 disable_intr(); 2668 switch (how) { 2669 case DMSET: 2670 outb(com->modem_ctl_port, 2671 com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 2672 break; 2673 case DMBIS: 2674 outb(com->modem_ctl_port, com->mcr_image |= mcr); 2675 break; 2676 case DMBIC: 2677 outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 2678 break; 2679 } 2680 enable_intr(); 2681 return (0); 2682} 2683 2684static void 2685siosettimeout() 2686{ 2687 struct com_s *com; 2688 bool_t someopen; 2689 int unit; 2690 2691 /* 2692 * Set our timeout period to 1 second if no polled devices are open. 2693 * Otherwise set it to max(1/200, 1/hz). 2694 * Enable timeouts iff some device is open. 2695 */ 2696 untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 2697 sio_timeout = hz; 2698 someopen = FALSE; 2699 for (unit = 0; unit < sio_numunits; ++unit) { 2700 com = com_addr(unit); 2701 if (com != NULL && com->tp != NULL 2702 && com->tp->t_state & TS_ISOPEN && !com->gone) { 2703 someopen = TRUE; 2704 if (com->poll || com->poll_output) { 2705 sio_timeout = hz > 200 ? hz / 200 : 1; 2706 break; 2707 } 2708 } 2709 } 2710 if (someopen) { 2711 sio_timeouts_until_log = hz / sio_timeout; 2712 sio_timeout_handle = timeout(comwakeup, (void *)NULL, 2713 sio_timeout); 2714 } else { 2715 /* Flush error messages, if any. */ 2716 sio_timeouts_until_log = 1; 2717 comwakeup((void *)NULL); 2718 untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 2719 } 2720} 2721 2722static void 2723comwakeup(chan) 2724 void *chan; 2725{ 2726 struct com_s *com; 2727 int unit; 2728 2729 sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 2730 2731 /* 2732 * Recover from lost output interrupts. 2733 * Poll any lines that don't use interrupts. 2734 */ 2735 for (unit = 0; unit < sio_numunits; ++unit) { 2736 com = com_addr(unit); 2737 if (com != NULL && !com->gone 2738 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 2739 disable_intr(); 2740 siointr1(com); 2741 enable_intr(); 2742 } 2743 } 2744 2745 /* 2746 * Check for and log errors, but not too often. 2747 */ 2748 if (--sio_timeouts_until_log > 0) 2749 return; 2750 sio_timeouts_until_log = hz / sio_timeout; 2751 for (unit = 0; unit < sio_numunits; ++unit) { 2752 int errnum; 2753 2754 com = com_addr(unit); 2755 if (com == NULL) 2756 continue; 2757 if (com->gone) 2758 continue; 2759 for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 2760 u_int delta; 2761 u_long total; 2762 2763 disable_intr(); 2764 delta = com->delta_error_counts[errnum]; 2765 com->delta_error_counts[errnum] = 0; 2766 enable_intr(); 2767 if (delta == 0) 2768 continue; 2769 total = com->error_counts[errnum] += delta; 2770 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 2771 unit, delta, error_desc[errnum], 2772 delta == 1 ? "" : "s", total); 2773 } 2774 } 2775} 2776 2777static void 2778disc_optim(tp, t, com) 2779 struct tty *tp; 2780 struct termios *t; 2781 struct com_s *com; 2782{ 2783 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 2784 && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 2785 && (!(t->c_iflag & PARMRK) 2786 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 2787 && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 2788 && linesw[tp->t_line].l_rint == ttyinput) 2789 tp->t_state |= TS_CAN_BYPASS_L_RINT; 2790 else 2791 tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 2792 com->hotchar = linesw[tp->t_line].l_hotchar; 2793} 2794 2795/* 2796 * Following are all routines needed for SIO to act as console 2797 */ 2798#include <sys/cons.h> 2799 2800struct siocnstate { 2801 u_char dlbl; 2802 u_char dlbh; 2803 u_char ier; 2804 u_char cfcr; 2805 u_char mcr; 2806}; 2807 2808static speed_t siocngetspeed __P((Port_t, struct speedtab *)); 2809static void siocnclose __P((struct siocnstate *sp, Port_t iobase)); 2810static void siocnopen __P((struct siocnstate *sp, Port_t iobase, int speed)); 2811static void siocntxwait __P((Port_t iobase)); 2812 2813static cn_probe_t siocnprobe; 2814static cn_init_t siocninit; 2815static cn_checkc_t siocncheckc; 2816static cn_getc_t siocngetc; 2817static cn_putc_t siocnputc; 2818 2819#ifdef __i386__ 2820CONS_DRIVER(sio, siocnprobe, siocninit, NULL, siocngetc, siocncheckc, 2821 siocnputc, NULL); 2822#endif 2823 2824/* To get the GDB related variables */ 2825#if DDB > 0 2826#include <ddb/ddb.h> 2827#endif 2828 2829static void 2830siocntxwait(iobase) 2831 Port_t iobase; 2832{ 2833 int timo; 2834 2835 /* 2836 * Wait for any pending transmission to finish. Required to avoid 2837 * the UART lockup bug when the speed is changed, and for normal 2838 * transmits. 2839 */ 2840 timo = 100000; 2841 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 2842 != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 2843 ; 2844} 2845 2846/* 2847 * Read the serial port specified and try to figure out what speed 2848 * it's currently running at. We're assuming the serial port has 2849 * been initialized and is basicly idle. This routine is only intended 2850 * to be run at system startup. 2851 * 2852 * If the value read from the serial port doesn't make sense, return 0. 2853 */ 2854 2855static speed_t 2856siocngetspeed(iobase, table) 2857 Port_t iobase; 2858 struct speedtab *table; 2859{ 2860 int code; 2861 u_char dlbh; 2862 u_char dlbl; 2863 u_char cfcr; 2864 2865 cfcr = inb(iobase + com_cfcr); 2866 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2867 2868 dlbl = inb(iobase + com_dlbl); 2869 dlbh = inb(iobase + com_dlbh); 2870 2871 outb(iobase + com_cfcr, cfcr); 2872 2873 code = dlbh << 8 | dlbl; 2874 2875 for (; table->sp_speed != -1; table++) 2876 if (table->sp_code == code) 2877 return (table->sp_speed); 2878 2879 return (0); /* didn't match anything sane */ 2880} 2881 2882static void 2883siocnopen(sp, iobase, speed) 2884 struct siocnstate *sp; 2885 Port_t iobase; 2886 int speed; 2887{ 2888 int divisor; 2889 u_char dlbh; 2890 u_char dlbl; 2891 2892 /* 2893 * Save all the device control registers except the fifo register 2894 * and set our default ones (cs8 -parenb speed=comdefaultrate). 2895 * We can't save the fifo register since it is read-only. 2896 */ 2897 sp->ier = inb(iobase + com_ier); 2898 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 2899 siocntxwait(iobase); 2900 sp->cfcr = inb(iobase + com_cfcr); 2901 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2902 sp->dlbl = inb(iobase + com_dlbl); 2903 sp->dlbh = inb(iobase + com_dlbh); 2904 /* 2905 * Only set the divisor registers if they would change, since on 2906 * some 16550 incompatibles (Startech), setting them clears the 2907 * data input register. This also reduces the effects of the 2908 * UMC8669F bug. 2909 */ 2910 divisor = ttspeedtab(speed, comspeedtab); 2911 dlbl = divisor & 0xFF; 2912 if (sp->dlbl != dlbl) 2913 outb(iobase + com_dlbl, dlbl); 2914 dlbh = (u_int) divisor >> 8; 2915 if (sp->dlbh != dlbh) 2916 outb(iobase + com_dlbh, dlbh); 2917 outb(iobase + com_cfcr, CFCR_8BITS); 2918 sp->mcr = inb(iobase + com_mcr); 2919 /* 2920 * We don't want interrupts, but must be careful not to "disable" 2921 * them by clearing the MCR_IENABLE bit, since that might cause 2922 * an interrupt by floating the IRQ line. 2923 */ 2924 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 2925} 2926 2927static void 2928siocnclose(sp, iobase) 2929 struct siocnstate *sp; 2930 Port_t iobase; 2931{ 2932 /* 2933 * Restore the device control registers. 2934 */ 2935 siocntxwait(iobase); 2936 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2937 if (sp->dlbl != inb(iobase + com_dlbl)) 2938 outb(iobase + com_dlbl, sp->dlbl); 2939 if (sp->dlbh != inb(iobase + com_dlbh)) 2940 outb(iobase + com_dlbh, sp->dlbh); 2941 outb(iobase + com_cfcr, sp->cfcr); 2942 /* 2943 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 2944 */ 2945 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 2946 outb(iobase + com_ier, sp->ier); 2947} 2948 2949static void 2950siocnprobe(cp) 2951 struct consdev *cp; 2952{ 2953 speed_t boot_speed; 2954 u_char cfcr; 2955 int s, unit; 2956 struct siocnstate sp; 2957 2958 /* 2959 * Find our first enabled console, if any. If it is a high-level 2960 * console device, then initialize it and return successfully. 2961 * If it is a low-level console device, then initialize it and 2962 * return unsuccessfully. It must be initialized in both cases 2963 * for early use by console drivers and debuggers. Initializing 2964 * the hardware is not necessary in all cases, since the i/o 2965 * routines initialize it on the fly, but it is necessary if 2966 * input might arrive while the hardware is switched back to an 2967 * uninitialized state. We can't handle multiple console devices 2968 * yet because our low-level routines don't take a device arg. 2969 * We trust the user to set the console flags properly so that we 2970 * don't need to probe. 2971 */ 2972 cp->cn_pri = CN_DEAD; 2973 2974 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 2975 int flags; 2976 int disabled; 2977 if (resource_int_value("sio", unit, "disabled", &disabled) == 0) { 2978 if (disabled) 2979 continue; 2980 } 2981 if (resource_int_value("sio", unit, "flags", &flags)) 2982 continue; 2983 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 2984 int port; 2985 Port_t iobase; 2986 2987 if (resource_int_value("sio", unit, "port", &port)) 2988 continue; 2989 iobase = port; 2990 s = spltty(); 2991 if (boothowto & RB_SERIAL) { 2992 boot_speed = siocngetspeed(iobase, comspeedtab); 2993 if (boot_speed) 2994 comdefaultrate = boot_speed; 2995 } 2996 2997 /* 2998 * Initialize the divisor latch. We can't rely on 2999 * siocnopen() to do this the first time, since it 3000 * avoids writing to the latch if the latch appears 3001 * to have the correct value. Also, if we didn't 3002 * just read the speed from the hardware, then we 3003 * need to set the speed in hardware so that 3004 * switching it later is null. 3005 */ 3006 cfcr = inb(iobase + com_cfcr); 3007 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 3008 outb(iobase + com_dlbl, 3009 COMBRD(comdefaultrate) & 0xff); 3010 outb(iobase + com_dlbh, 3011 (u_int) COMBRD(comdefaultrate) >> 8); 3012 outb(iobase + com_cfcr, cfcr); 3013 3014 siocnopen(&sp, iobase, comdefaultrate); 3015 3016 splx(s); 3017 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 3018 cp->cn_dev = makedev(CDEV_MAJOR, unit); 3019 cp->cn_pri = COM_FORCECONSOLE(flags) 3020 || boothowto & RB_SERIAL 3021 ? CN_REMOTE : CN_NORMAL; 3022 siocniobase = iobase; 3023 siocnunit = unit; 3024 } 3025 if (COM_DEBUGGER(flags)) { 3026 printf("sio%d: gdb debugging port\n", unit); 3027 siogdbiobase = iobase; 3028 siogdbunit = unit; 3029#if DDB > 0 3030 gdbdev = makedev(CDEV_MAJOR, unit); 3031 gdb_getc = siocngetc; 3032 gdb_putc = siocnputc; 3033#endif 3034 } 3035 } 3036 } 3037#ifdef __i386__ 3038#if DDB > 0 3039 /* 3040 * XXX Ugly Compatability. 3041 * If no gdb port has been specified, set it to be the console 3042 * as some configuration files don't specify the gdb port. 3043 */ 3044 if (gdbdev == NODEV && (boothowto & RB_GDB)) { 3045 printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 3046 siocnunit); 3047 printf("Set flag 0x80 on desired GDB port in your\n"); 3048 printf("configuration file (currently sio only).\n"); 3049 siogdbiobase = siocniobase; 3050 siogdbunit = siocnunit; 3051 gdbdev = makedev(CDEV_MAJOR, siocnunit); 3052 gdb_getc = siocngetc; 3053 gdb_putc = siocnputc; 3054 } 3055#endif 3056#endif 3057} 3058 3059#ifdef __alpha__ 3060 3061CONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL); 3062 3063int 3064siocnattach(port, speed) 3065 int port; 3066 int speed; 3067{ 3068 int s; 3069 u_char cfcr; 3070 struct siocnstate sp; 3071 3072 siocniobase = port; 3073 comdefaultrate = speed; 3074 sio_consdev.cn_pri = CN_NORMAL; 3075 sio_consdev.cn_dev = makedev(CDEV_MAJOR, 0); 3076 3077 s = spltty(); 3078 3079 /* 3080 * Initialize the divisor latch. We can't rely on 3081 * siocnopen() to do this the first time, since it 3082 * avoids writing to the latch if the latch appears 3083 * to have the correct value. Also, if we didn't 3084 * just read the speed from the hardware, then we 3085 * need to set the speed in hardware so that 3086 * switching it later is null. 3087 */ 3088 cfcr = inb(siocniobase + com_cfcr); 3089 outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr); 3090 outb(siocniobase + com_dlbl, 3091 COMBRD(comdefaultrate) & 0xff); 3092 outb(siocniobase + com_dlbh, 3093 (u_int) COMBRD(comdefaultrate) >> 8); 3094 outb(siocniobase + com_cfcr, cfcr); 3095 3096 siocnopen(&sp, siocniobase, comdefaultrate); 3097 splx(s); 3098 3099 cn_tab = &sio_consdev; 3100 return (0); 3101} 3102 3103int 3104siogdbattach(port, speed) 3105 int port; 3106 int speed; 3107{ 3108 int s; 3109 u_char cfcr; 3110 struct siocnstate sp; 3111 3112 siogdbiobase = port; 3113 gdbdefaultrate = speed; 3114 3115 s = spltty(); 3116 3117 /* 3118 * Initialize the divisor latch. We can't rely on 3119 * siocnopen() to do this the first time, since it 3120 * avoids writing to the latch if the latch appears 3121 * to have the correct value. Also, if we didn't 3122 * just read the speed from the hardware, then we 3123 * need to set the speed in hardware so that 3124 * switching it later is null. 3125 */ 3126 cfcr = inb(siogdbiobase + com_cfcr); 3127 outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr); 3128 outb(siogdbiobase + com_dlbl, 3129 COMBRD(gdbdefaultrate) & 0xff); 3130 outb(siogdbiobase + com_dlbh, 3131 (u_int) COMBRD(gdbdefaultrate) >> 8); 3132 outb(siogdbiobase + com_cfcr, cfcr); 3133 3134 siocnopen(&sp, siogdbiobase, gdbdefaultrate); 3135 splx(s); 3136 3137 return (0); 3138} 3139 3140#endif 3141 3142static void 3143siocninit(cp) 3144 struct consdev *cp; 3145{ 3146 comconsole = DEV_TO_UNIT(cp->cn_dev); 3147} 3148 3149static int 3150siocncheckc(dev) 3151 dev_t dev; 3152{ 3153 int c; 3154 Port_t iobase; 3155 int s; 3156 struct siocnstate sp; 3157 3158 if (minor(dev) == siogdbunit) 3159 iobase = siogdbiobase; 3160 else 3161 iobase = siocniobase; 3162 s = spltty(); 3163 siocnopen(&sp, iobase, comdefaultrate); 3164 if (inb(iobase + com_lsr) & LSR_RXRDY) 3165 c = inb(iobase + com_data); 3166 else 3167 c = -1; 3168 siocnclose(&sp, iobase); 3169 splx(s); 3170 return (c); 3171} 3172 3173 3174int 3175siocngetc(dev) 3176 dev_t dev; 3177{ 3178 int c; 3179 Port_t iobase; 3180 int s; 3181 struct siocnstate sp; 3182 3183 if (minor(dev) == siogdbunit) 3184 iobase = siogdbiobase; 3185 else 3186 iobase = siocniobase; 3187 s = spltty(); 3188 siocnopen(&sp, iobase, comdefaultrate); 3189 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3190 ; 3191 c = inb(iobase + com_data); 3192 siocnclose(&sp, iobase); 3193 splx(s); 3194 return (c); 3195} 3196 3197void 3198siocnputc(dev, c) 3199 dev_t dev; 3200 int c; 3201{ 3202 int s; 3203 struct siocnstate sp; 3204 Port_t iobase; 3205 3206 if (minor(dev) == siogdbunit) 3207 iobase = siogdbiobase; 3208 else 3209 iobase = siocniobase; 3210 s = spltty(); 3211 siocnopen(&sp, iobase, comdefaultrate); 3212 siocntxwait(iobase); 3213 outb(iobase + com_data, c); 3214 siocnclose(&sp, iobase); 3215 splx(s); 3216} 3217 3218#ifdef __alpha__ 3219int 3220siogdbgetc() 3221{ 3222 int c; 3223 Port_t iobase; 3224 int s; 3225 struct siocnstate sp; 3226 3227 iobase = siogdbiobase; 3228 s = spltty(); 3229 siocnopen(&sp, iobase, gdbdefaultrate); 3230 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3231 ; 3232 c = inb(iobase + com_data); 3233 siocnclose(&sp, iobase); 3234 splx(s); 3235 return (c); 3236} 3237 3238void 3239siogdbputc(c) 3240 int c; 3241{ 3242 int s; 3243 struct siocnstate sp; 3244 3245 s = spltty(); 3246 siocnopen(&sp, siogdbiobase, gdbdefaultrate); 3247 siocntxwait(siogdbiobase); 3248 outb(siogdbiobase + com_data, c); 3249 siocnclose(&sp, siogdbiobase); 3250 splx(s); 3251} 3252#endif 3253 3254DRIVER_MODULE(sio, isa, sio_isa_driver, sio_devclass, 0, 0); 3255#if NCARD > 0 3256DRIVER_MODULE(sio, pccard, sio_pccard_driver, sio_devclass, 0, 0); 3257#endif 3258#if NPCI > 0 3259DRIVER_MODULE(sio, pci, sio_pci_driver, sio_devclass, 0, 0); 3260#endif 3261