sio.c revision 135516
1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 4. Neither the name of the University nor the names of its contributors 14 * may be used to endorse or promote products derived from this software 15 * without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: @(#)com.c 7.5 (Berkeley) 5/16/91 30 * from: i386/isa sio.c,v 1.234 31 */ 32 33#include <sys/cdefs.h> 34__FBSDID("$FreeBSD: head/sys/dev/sio/sio.c 135516 2004-09-20 13:55:26Z nyan $"); 35 36#include "opt_comconsole.h" 37#include "opt_compat.h" 38#include "opt_gdb.h" 39#include "opt_kdb.h" 40#include "opt_sio.h" 41 42/* 43 * Serial driver, based on 386BSD-0.1 com driver. 44 * Mostly rewritten to use pseudo-DMA. 45 * Works for National Semiconductor NS8250-NS16550AF UARTs. 46 * COM driver, based on HP dca driver. 47 * 48 * Changes for PC-Card integration: 49 * - Added PC-Card driver table and handlers 50 */ 51#include <sys/param.h> 52#include <sys/systm.h> 53#include <sys/bus.h> 54#include <sys/conf.h> 55#include <sys/fcntl.h> 56#include <sys/interrupt.h> 57#include <sys/kdb.h> 58#include <sys/kernel.h> 59#include <sys/limits.h> 60#include <sys/lock.h> 61#include <sys/malloc.h> 62#include <sys/module.h> 63#include <sys/mutex.h> 64#include <sys/proc.h> 65#include <sys/reboot.h> 66#include <sys/serial.h> 67#include <sys/sysctl.h> 68#include <sys/syslog.h> 69#include <sys/tty.h> 70#include <machine/bus_pio.h> 71#include <machine/bus.h> 72#include <sys/rman.h> 73#include <sys/timepps.h> 74#include <sys/uio.h> 75#include <sys/cons.h> 76 77#include <isa/isavar.h> 78 79#include <machine/resource.h> 80 81#include <dev/sio/sioreg.h> 82#include <dev/sio/siovar.h> 83 84#ifdef COM_ESP 85#include <dev/ic/esp.h> 86#endif 87#include <dev/ic/ns16550.h> 88 89#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 90 91#define CALLOUT_MASK 0x80 92#define CONTROL_MASK 0x60 93#define CONTROL_INIT_STATE 0x20 94#define CONTROL_LOCK_STATE 0x40 95#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 96#define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 97 | ((mynor) & 0x1f)) 98#define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 99 | ((unit) & 0x1f)) 100 101#ifdef COM_MULTIPORT 102/* checks in flags for multiport and which is multiport "master chip" 103 * for a given card 104 */ 105#define COM_ISMULTIPORT(flags) ((flags) & 0x01) 106#define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff) 107#define COM_NOTAST4(flags) ((flags) & 0x04) 108#else 109#define COM_ISMULTIPORT(flags) (0) 110#endif /* COM_MULTIPORT */ 111 112#define COM_C_IIR_TXRDYBUG 0x80000 113#define COM_CONSOLE(flags) ((flags) & 0x10) 114#define COM_DEBUGGER(flags) ((flags) & 0x80) 115#define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24) 116#define COM_FORCECONSOLE(flags) ((flags) & 0x20) 117#define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG) 118#define COM_LLCONSOLE(flags) ((flags) & 0x40) 119#define COM_LOSESOUTINTS(flags) ((flags) & 0x08) 120#define COM_NOFIFO(flags) ((flags) & 0x02) 121#define COM_NOPROBE(flags) ((flags) & 0x40000) 122#define COM_NOSCR(flags) ((flags) & 0x100000) 123#define COM_PPSCTS(flags) ((flags) & 0x10000) 124#define COM_ST16650A(flags) ((flags) & 0x20000) 125#define COM_TI16754(flags) ((flags) & 0x200000) 126 127#define sio_getreg(com, off) \ 128 (bus_space_read_1((com)->bst, (com)->bsh, (off))) 129#define sio_setreg(com, off, value) \ 130 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 131 132/* 133 * com state bits. 134 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 135 * than the other bits so that they can be tested as a group without masking 136 * off the low bits. 137 * 138 * The following com and tty flags correspond closely: 139 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 140 * comstop()) 141 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 142 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 143 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 144 * TS_FLUSH is not used. 145 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 146 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 147 */ 148#define CS_BUSY 0x80 /* output in progress */ 149#define CS_TTGO 0x40 /* output not stopped by XOFF */ 150#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 151#define CS_CHECKMSR 1 /* check of MSR scheduled */ 152#define CS_CTS_OFLOW 2 /* use CTS output flow control */ 153#define CS_ODONE 4 /* output completed */ 154#define CS_RTS_IFLOW 8 /* use RTS input flow control */ 155#define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 156 157static char const * const error_desc[] = { 158#define CE_OVERRUN 0 159 "silo overflow", 160#define CE_INTERRUPT_BUF_OVERFLOW 1 161 "interrupt-level buffer overflow", 162#define CE_TTY_BUF_OVERFLOW 2 163 "tty-level buffer overflow", 164}; 165 166#define CE_NTYPES 3 167#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum]) 168 169/* types. XXX - should be elsewhere */ 170typedef u_int Port_t; /* hardware port */ 171typedef u_char bool_t; /* boolean */ 172 173/* queue of linear buffers */ 174struct lbq { 175 u_char *l_head; /* next char to process */ 176 u_char *l_tail; /* one past the last char to process */ 177 struct lbq *l_next; /* next in queue */ 178 bool_t l_queued; /* nonzero if queued */ 179}; 180 181/* com device structure */ 182struct com_s { 183 u_char state; /* miscellaneous flag bits */ 184 bool_t active_out; /* nonzero if the callout device is open */ 185 u_char cfcr_image; /* copy of value written to CFCR */ 186#ifdef COM_ESP 187 bool_t esp; /* is this unit a hayes esp board? */ 188#endif 189 u_char extra_state; /* more flag bits, separate for order trick */ 190 u_char fifo_image; /* copy of value written to FIFO */ 191 bool_t hasfifo; /* nonzero for 16550 UARTs */ 192 bool_t loses_outints; /* nonzero if device loses output interrupts */ 193 u_char mcr_image; /* copy of value written to MCR */ 194#ifdef COM_MULTIPORT 195 bool_t multiport; /* is this unit part of a multiport device? */ 196#endif /* COM_MULTIPORT */ 197 bool_t no_irq; /* nonzero if irq is not attached */ 198 bool_t gone; /* hardware disappeared */ 199 bool_t poll; /* nonzero if polling is required */ 200 bool_t poll_output; /* nonzero if polling for output is required */ 201 bool_t st16650a; /* nonzero if Startech 16650A compatible */ 202 int unit; /* unit number */ 203 u_int flags; /* copy of device flags */ 204 u_int tx_fifo_size; 205 u_int wopeners; /* # processes waiting for DCD in open() */ 206 207 /* 208 * The high level of the driver never reads status registers directly 209 * because there would be too many side effects to handle conveniently. 210 * Instead, it reads copies of the registers stored here by the 211 * interrupt handler. 212 */ 213 u_char last_modem_status; /* last MSR read by intr handler */ 214 u_char prev_modem_status; /* last MSR handled by high level */ 215 216 u_char *ibuf; /* start of input buffer */ 217 u_char *ibufend; /* end of input buffer */ 218 u_char *ibufold; /* old input buffer, to be freed */ 219 u_char *ihighwater; /* threshold in input buffer */ 220 u_char *iptr; /* next free spot in input buffer */ 221 int ibufsize; /* size of ibuf (not include error bytes) */ 222 int ierroff; /* offset of error bytes in ibuf */ 223 224 struct lbq obufq; /* head of queue of output buffers */ 225 struct lbq obufs[2]; /* output buffers */ 226 227 bus_space_tag_t bst; 228 bus_space_handle_t bsh; 229 230 Port_t data_port; /* i/o ports */ 231#ifdef COM_ESP 232 Port_t esp_port; 233#endif 234 Port_t int_ctl_port; 235 Port_t int_id_port; 236 Port_t modem_ctl_port; 237 Port_t line_status_port; 238 Port_t modem_status_port; 239 240 struct tty *tp; /* cross reference */ 241 242 bool_t do_timestamp; 243 struct timeval timestamp; 244 struct pps_state pps; 245 int pps_bit; 246#ifdef ALT_BREAK_TO_DEBUGGER 247 int alt_brk_state; 248#endif 249 250 u_long bytes_in; /* statistics */ 251 u_long bytes_out; 252 u_int delta_error_counts[CE_NTYPES]; 253 u_long error_counts[CE_NTYPES]; 254 255 u_long rclk; 256 257 struct resource *irqres; 258 struct resource *ioportres; 259 int ioportrid; 260 void *cookie; 261 struct cdev *devs[6]; 262 263 /* 264 * Data area for output buffers. Someday we should build the output 265 * buffer queue without copying data. 266 */ 267 u_char obuf1[256]; 268 u_char obuf2[256]; 269}; 270 271#ifdef COM_ESP 272static int espattach(struct com_s *com, Port_t esp_port); 273#endif 274 275static void combreak(struct tty *tp, int sig); 276static timeout_t siobusycheck; 277static u_int siodivisor(u_long rclk, speed_t speed); 278static void comhardclose(struct com_s *com); 279static void sioinput(struct com_s *com); 280static void siointr1(struct com_s *com); 281static void siointr(void *arg); 282static int commodem(struct tty *tp, int sigon, int sigoff); 283static int comparam(struct tty *tp, struct termios *t); 284static void siopoll(void *); 285static void siosettimeout(void); 286static int siosetwater(struct com_s *com, speed_t speed); 287static void comstart(struct tty *tp); 288static void comstop(struct tty *tp, int rw); 289static timeout_t comwakeup; 290 291char sio_driver_name[] = "sio"; 292static struct mtx sio_lock; 293static int sio_inited; 294 295/* table and macro for fast conversion from a unit number to its com struct */ 296devclass_t sio_devclass; 297#define com_addr(unit) ((struct com_s *) \ 298 devclass_get_softc(sio_devclass, unit)) /* XXX */ 299 300static d_open_t sioopen; 301static d_close_t sioclose; 302static d_read_t sioread; 303static d_write_t siowrite; 304static d_ioctl_t sioioctl; 305 306static struct cdevsw sio_cdevsw = { 307 .d_version = D_VERSION, 308 .d_open = sioopen, 309 .d_close = sioclose, 310 .d_read = sioread, 311 .d_write = siowrite, 312 .d_ioctl = sioioctl, 313 .d_name = sio_driver_name, 314 .d_flags = D_TTY | D_NEEDGIANT, 315}; 316 317static d_open_t siocopen; 318static d_close_t siocclose; 319static d_read_t siocrdwr; 320static d_ioctl_t siocioctl; 321 322static struct cdevsw sioc_cdevsw = { 323 .d_version = D_VERSION, 324 .d_open = siocopen, 325 .d_close = siocclose, 326 .d_read = siocrdwr, 327 .d_write = siocrdwr, 328 .d_ioctl = siocioctl, 329 .d_name = sio_driver_name, 330 .d_flags = D_TTY | D_NEEDGIANT, 331}; 332 333int comconsole = -1; 334static volatile speed_t comdefaultrate = CONSPEED; 335static u_long comdefaultrclk = DEFAULT_RCLK; 336SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 337static speed_t gdbdefaultrate = GDBSPEED; 338SYSCTL_UINT(_machdep, OID_AUTO, gdbspeed, CTLFLAG_RW, 339 &gdbdefaultrate, GDBSPEED, ""); 340static u_int com_events; /* input chars + weighted output completions */ 341static Port_t siocniobase; 342static int siocnunit = -1; 343static void *sio_slow_ih; 344static void *sio_fast_ih; 345static int sio_timeout; 346static int sio_timeouts_until_log; 347static struct callout_handle sio_timeout_handle 348 = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 349static int sio_numunits; 350 351#ifdef GDB 352static Port_t siogdbiobase = 0; 353#endif 354 355#ifdef COM_ESP 356/* XXX configure this properly. */ 357/* XXX quite broken for new-bus. */ 358static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 359static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 360#endif 361 362/* 363 * handle sysctl read/write requests for console speed 364 * 365 * In addition to setting comdefaultrate for I/O through /dev/console, 366 * also set the initial and lock values for the /dev/ttyXX device 367 * if there is one associated with the console. Finally, if the /dev/tty 368 * device has already been open, change the speed on the open running port 369 * itself. 370 */ 371 372static int 373sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 374{ 375 int error, s; 376 speed_t newspeed; 377 struct com_s *com; 378 struct tty *tp; 379 380 newspeed = comdefaultrate; 381 382 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 383 if (error || !req->newptr) 384 return (error); 385 386 comdefaultrate = newspeed; 387 388 if (comconsole < 0) /* serial console not selected? */ 389 return (0); 390 391 com = com_addr(comconsole); 392 if (com == NULL) 393 return (ENXIO); 394 395 tp = com->tp; 396 if (tp == NULL) 397 return (ENXIO); 398 399 /* 400 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 401 * (note, the lock rates really are boolean -- if non-zero, disallow 402 * speed changes) 403 */ 404 tp->t_init_in.c_ispeed = tp->t_init_in.c_ospeed = 405 tp->t_lock_in.c_ispeed = tp->t_lock_in.c_ospeed = 406 tp->t_init_out.c_ispeed = tp->t_init_out.c_ospeed = 407 tp->t_lock_out.c_ispeed = tp->t_lock_out.c_ospeed = comdefaultrate; 408 409 /* 410 * if we're open, change the running rate too 411 */ 412 if (tp->t_state & TS_ISOPEN) { 413 tp->t_termios.c_ispeed = 414 tp->t_termios.c_ospeed = comdefaultrate; 415 s = spltty(); 416 error = comparam(tp, &tp->t_termios); 417 splx(s); 418 } 419 return error; 420} 421 422SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 423 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 424/* TUNABLE_INT("machdep.conspeed", &comdefaultrate); */ 425 426#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit)) 427#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit)) 428 429/* 430 * Unload the driver and clear the table. 431 * XXX this is mostly wrong. 432 * XXX TODO: 433 * This is usually called when the card is ejected, but 434 * can be caused by a kldunload of a controller driver. 435 * The idea is to reset the driver's view of the device 436 * and ensure that any driver entry points such as 437 * read and write do not hang. 438 */ 439int 440siodetach(dev) 441 device_t dev; 442{ 443 struct com_s *com; 444 int i; 445 446 com = (struct com_s *) device_get_softc(dev); 447 if (com == NULL) { 448 device_printf(dev, "NULL com in siounload\n"); 449 return (0); 450 } 451 com->gone = TRUE; 452 if (com->tp) 453 ttygone(com->tp); 454 for (i = 0 ; i < 6; i++) 455 destroy_dev(com->devs[i]); 456 if (com->irqres) { 457 bus_teardown_intr(dev, com->irqres, com->cookie); 458 bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres); 459 } 460 if (com->ioportres) 461 bus_release_resource(dev, SYS_RES_IOPORT, com->ioportrid, 462 com->ioportres); 463 if (com->tp && (com->tp->t_state & TS_ISOPEN)) { 464 device_printf(dev, "still open, forcing close\n"); 465 ttyld_close(com->tp, 0); 466 tty_close(com->tp); 467 } else { 468 if (com->ibuf != NULL) 469 free(com->ibuf, M_DEVBUF); 470 device_set_softc(dev, NULL); 471 free(com, M_DEVBUF); 472 } 473 return (0); 474} 475 476int 477sioprobe(dev, xrid, rclk, noprobe) 478 device_t dev; 479 int xrid; 480 u_long rclk; 481 int noprobe; 482{ 483#if 0 484 static bool_t already_init; 485 device_t xdev; 486#endif 487 struct com_s *com; 488 u_int divisor; 489 bool_t failures[10]; 490 int fn; 491 device_t idev; 492 Port_t iobase; 493 intrmask_t irqmap[4]; 494 intrmask_t irqs; 495 u_char mcr_image; 496 int result; 497 u_long xirq; 498 u_int flags = device_get_flags(dev); 499 int rid; 500 struct resource *port; 501 502 rid = xrid; 503 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 504 0, ~0, IO_COMSIZE, RF_ACTIVE); 505 if (!port) 506 return (ENXIO); 507 508 com = malloc(sizeof(*com), M_DEVBUF, M_NOWAIT | M_ZERO); 509 if (com == NULL) { 510 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 511 return (ENOMEM); 512 } 513 device_set_softc(dev, com); 514 com->bst = rman_get_bustag(port); 515 com->bsh = rman_get_bushandle(port); 516 if (rclk == 0) 517 rclk = DEFAULT_RCLK; 518 com->rclk = rclk; 519 520 while (sio_inited != 2) 521 if (atomic_cmpset_int(&sio_inited, 0, 1)) { 522 mtx_init(&sio_lock, sio_driver_name, NULL, 523 (comconsole != -1) ? 524 MTX_SPIN | MTX_QUIET : MTX_SPIN); 525 atomic_store_rel_int(&sio_inited, 2); 526 } 527 528#if 0 529 /* 530 * XXX this is broken - when we are first called, there are no 531 * previously configured IO ports. We could hard code 532 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 533 * This code has been doing nothing since the conversion since 534 * "count" is zero the first time around. 535 */ 536 if (!already_init) { 537 /* 538 * Turn off MCR_IENABLE for all likely serial ports. An unused 539 * port with its MCR_IENABLE gate open will inhibit interrupts 540 * from any used port that shares the interrupt vector. 541 * XXX the gate enable is elsewhere for some multiports. 542 */ 543 device_t *devs; 544 int count, i, xioport; 545 546 devclass_get_devices(sio_devclass, &devs, &count); 547 for (i = 0; i < count; i++) { 548 xdev = devs[i]; 549 if (device_is_enabled(xdev) && 550 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 551 NULL) == 0) 552 outb(xioport + com_mcr, 0); 553 } 554 free(devs, M_TEMP); 555 already_init = TRUE; 556 } 557#endif 558 559 if (COM_LLCONSOLE(flags)) { 560 printf("sio%d: reserved for low-level i/o\n", 561 device_get_unit(dev)); 562 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 563 device_set_softc(dev, NULL); 564 free(com, M_DEVBUF); 565 return (ENXIO); 566 } 567 568 /* 569 * If the device is on a multiport card and has an AST/4 570 * compatible interrupt control register, initialize this 571 * register and prepare to leave MCR_IENABLE clear in the mcr. 572 * Otherwise, prepare to set MCR_IENABLE in the mcr. 573 * Point idev to the device struct giving the correct id_irq. 574 * This is the struct for the master device if there is one. 575 */ 576 idev = dev; 577 mcr_image = MCR_IENABLE; 578#ifdef COM_MULTIPORT 579 if (COM_ISMULTIPORT(flags)) { 580 Port_t xiobase; 581 u_long io; 582 583 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 584 if (idev == NULL) { 585 printf("sio%d: master device %d not configured\n", 586 device_get_unit(dev), COM_MPMASTER(flags)); 587 idev = dev; 588 } 589 if (!COM_NOTAST4(flags)) { 590 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 591 NULL) == 0) { 592 xiobase = io; 593 if (bus_get_resource(idev, SYS_RES_IRQ, 0, 594 NULL, NULL) == 0) 595 outb(xiobase + com_scr, 0x80); 596 else 597 outb(xiobase + com_scr, 0); 598 } 599 mcr_image = 0; 600 } 601 } 602#endif /* COM_MULTIPORT */ 603 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 604 mcr_image = 0; 605 606 bzero(failures, sizeof failures); 607 iobase = rman_get_start(port); 608 609 /* 610 * We don't want to get actual interrupts, just masked ones. 611 * Interrupts from this line should already be masked in the ICU, 612 * but mask them in the processor as well in case there are some 613 * (misconfigured) shared interrupts. 614 */ 615 mtx_lock_spin(&sio_lock); 616/* EXTRA DELAY? */ 617 618 /* 619 * For the TI16754 chips, set prescaler to 1 (4 is often the 620 * default after-reset value) as otherwise it's impossible to 621 * get highest baudrates. 622 */ 623 if (COM_TI16754(flags)) { 624 u_char cfcr, efr; 625 626 cfcr = sio_getreg(com, com_cfcr); 627 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 628 efr = sio_getreg(com, com_efr); 629 /* Unlock extended features to turn off prescaler. */ 630 sio_setreg(com, com_efr, efr | EFR_EFE); 631 /* Disable EFR. */ 632 sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0); 633 /* Turn off prescaler. */ 634 sio_setreg(com, com_mcr, 635 sio_getreg(com, com_mcr) & ~MCR_PRESCALE); 636 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 637 sio_setreg(com, com_efr, efr); 638 sio_setreg(com, com_cfcr, cfcr); 639 } 640 641 /* 642 * Initialize the speed and the word size and wait long enough to 643 * drain the maximum of 16 bytes of junk in device output queues. 644 * The speed is undefined after a master reset and must be set 645 * before relying on anything related to output. There may be 646 * junk after a (very fast) soft reboot and (apparently) after 647 * master reset. 648 * XXX what about the UART bug avoided by waiting in comparam()? 649 * We don't want to to wait long enough to drain at 2 bps. 650 */ 651 if (iobase == siocniobase) 652 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 653 else { 654 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 655 divisor = siodivisor(rclk, SIO_TEST_SPEED); 656 sio_setreg(com, com_dlbl, divisor & 0xff); 657 sio_setreg(com, com_dlbh, divisor >> 8); 658 sio_setreg(com, com_cfcr, CFCR_8BITS); 659 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 660 } 661 662 /* 663 * Enable the interrupt gate and disable device interupts. This 664 * should leave the device driving the interrupt line low and 665 * guarantee an edge trigger if an interrupt can be generated. 666 */ 667/* EXTRA DELAY? */ 668 sio_setreg(com, com_mcr, mcr_image); 669 sio_setreg(com, com_ier, 0); 670 DELAY(1000); /* XXX */ 671 irqmap[0] = isa_irq_pending(); 672 673 /* 674 * Attempt to set loopback mode so that we can send a null byte 675 * without annoying any external device. 676 */ 677/* EXTRA DELAY? */ 678 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 679 680 /* 681 * Attempt to generate an output interrupt. On 8250's, setting 682 * IER_ETXRDY generates an interrupt independent of the current 683 * setting and independent of whether the THR is empty. On 16450's, 684 * setting IER_ETXRDY generates an interrupt independent of the 685 * current setting. On 16550A's, setting IER_ETXRDY only 686 * generates an interrupt when IER_ETXRDY is not already set. 687 */ 688 sio_setreg(com, com_ier, IER_ETXRDY); 689 690 /* 691 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 692 * an interrupt. They'd better generate one for actually doing 693 * output. Loopback may be broken on the same incompatibles but 694 * it's unlikely to do more than allow the null byte out. 695 */ 696 sio_setreg(com, com_data, 0); 697 if (iobase == siocniobase) 698 DELAY((1 + 2) * 1000000 / (comdefaultrate / 10)); 699 else 700 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 701 702 /* 703 * Turn off loopback mode so that the interrupt gate works again 704 * (MCR_IENABLE was hidden). This should leave the device driving 705 * an interrupt line high. It doesn't matter if the interrupt 706 * line oscillates while we are not looking at it, since interrupts 707 * are disabled. 708 */ 709/* EXTRA DELAY? */ 710 sio_setreg(com, com_mcr, mcr_image); 711 712 /* 713 * It seems my Xircom CBEM56G Cardbus modem wants to be reset 714 * to 8 bits *again*, or else probe test 0 will fail. 715 * gwk@sgi.com, 4/19/2001 716 */ 717 sio_setreg(com, com_cfcr, CFCR_8BITS); 718 719 /* 720 * Some PCMCIA cards (Palido 321s, DC-1S, ...) have the "TXRDY bug", 721 * so we probe for a buggy IIR_TXRDY implementation even in the 722 * noprobe case. We don't probe for it in the !noprobe case because 723 * noprobe is always set for PCMCIA cards and the problem is not 724 * known to affect any other cards. 725 */ 726 if (noprobe) { 727 /* Read IIR a few times. */ 728 for (fn = 0; fn < 2; fn ++) { 729 DELAY(10000); 730 failures[6] = sio_getreg(com, com_iir); 731 } 732 733 /* IIR_TXRDY should be clear. Is it? */ 734 result = 0; 735 if (failures[6] & IIR_TXRDY) { 736 /* 737 * No. We seem to have the bug. Does our fix for 738 * it work? 739 */ 740 sio_setreg(com, com_ier, 0); 741 if (sio_getreg(com, com_iir) & IIR_NOPEND) { 742 /* Yes. We discovered the TXRDY bug! */ 743 SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 744 } else { 745 /* No. Just fail. XXX */ 746 result = ENXIO; 747 sio_setreg(com, com_mcr, 0); 748 } 749 } else { 750 /* Yes. No bug. */ 751 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 752 } 753 sio_setreg(com, com_ier, 0); 754 sio_setreg(com, com_cfcr, CFCR_8BITS); 755 mtx_unlock_spin(&sio_lock); 756 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 757 if (iobase == siocniobase) 758 result = 0; 759 if (result != 0) { 760 device_set_softc(dev, NULL); 761 free(com, M_DEVBUF); 762 } 763 return (result); 764 } 765 766 /* 767 * Check that 768 * o the CFCR, IER and MCR in UART hold the values written to them 769 * (the values happen to be all distinct - this is good for 770 * avoiding false positive tests from bus echoes). 771 * o an output interrupt is generated and its vector is correct. 772 * o the interrupt goes away when the IIR in the UART is read. 773 */ 774/* EXTRA DELAY? */ 775 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 776 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 777 failures[2] = sio_getreg(com, com_mcr) - mcr_image; 778 DELAY(10000); /* Some internal modems need this time */ 779 irqmap[1] = isa_irq_pending(); 780 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 781 DELAY(1000); /* XXX */ 782 irqmap[2] = isa_irq_pending(); 783 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 784 785 /* 786 * Turn off all device interrupts and check that they go off properly. 787 * Leave MCR_IENABLE alone. For ports without a master port, it gates 788 * the OUT2 output of the UART to 789 * the ICU input. Closing the gate would give a floating ICU input 790 * (unless there is another device driving it) and spurious interrupts. 791 * (On the system that this was first tested on, the input floats high 792 * and gives a (masked) interrupt as soon as the gate is closed.) 793 */ 794 sio_setreg(com, com_ier, 0); 795 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 796 failures[7] = sio_getreg(com, com_ier); 797 DELAY(1000); /* XXX */ 798 irqmap[3] = isa_irq_pending(); 799 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 800 801 mtx_unlock_spin(&sio_lock); 802 803 irqs = irqmap[1] & ~irqmap[0]; 804 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 805 ((1 << xirq) & irqs) == 0) { 806 printf( 807 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 808 device_get_unit(dev), xirq, irqs); 809 printf( 810 "sio%d: port may not be enabled\n", 811 device_get_unit(dev)); 812 } 813 if (bootverbose) 814 printf("sio%d: irq maps: %#x %#x %#x %#x\n", 815 device_get_unit(dev), 816 irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 817 818 result = 0; 819 for (fn = 0; fn < sizeof failures; ++fn) 820 if (failures[fn]) { 821 sio_setreg(com, com_mcr, 0); 822 result = ENXIO; 823 if (bootverbose) { 824 printf("sio%d: probe failed test(s):", 825 device_get_unit(dev)); 826 for (fn = 0; fn < sizeof failures; ++fn) 827 if (failures[fn]) 828 printf(" %d", fn); 829 printf("\n"); 830 } 831 break; 832 } 833 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 834 if (iobase == siocniobase) 835 result = 0; 836 if (result != 0) { 837 device_set_softc(dev, NULL); 838 free(com, M_DEVBUF); 839 } 840 return (result); 841} 842 843#ifdef COM_ESP 844static int 845espattach(com, esp_port) 846 struct com_s *com; 847 Port_t esp_port; 848{ 849 u_char dips; 850 u_char val; 851 852 /* 853 * Check the ESP-specific I/O port to see if we're an ESP 854 * card. If not, return failure immediately. 855 */ 856 if ((inb(esp_port) & 0xf3) == 0) { 857 printf(" port 0x%x is not an ESP board?\n", esp_port); 858 return (0); 859 } 860 861 /* 862 * We've got something that claims to be a Hayes ESP card. 863 * Let's hope so. 864 */ 865 866 /* Get the dip-switch configuration */ 867 outb(esp_port + ESP_CMD1, ESP_GETDIPS); 868 dips = inb(esp_port + ESP_STATUS1); 869 870 /* 871 * Bits 0,1 of dips say which COM port we are. 872 */ 873 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 874 printf(" : ESP"); 875 else { 876 printf(" esp_port has com %d\n", dips & 0x03); 877 return (0); 878 } 879 880 /* 881 * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 882 */ 883 outb(esp_port + ESP_CMD1, ESP_GETTEST); 884 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 885 val = inb(esp_port + ESP_STATUS2); 886 if ((val & 0x70) < 0x20) { 887 printf("-old (%o)", val & 0x70); 888 return (0); 889 } 890 891 /* 892 * Check for ability to emulate 16550: bit 7 == 1 893 */ 894 if ((dips & 0x80) == 0) { 895 printf(" slave"); 896 return (0); 897 } 898 899 /* 900 * Okay, we seem to be a Hayes ESP card. Whee. 901 */ 902 com->esp = TRUE; 903 com->esp_port = esp_port; 904 return (1); 905} 906#endif /* COM_ESP */ 907 908int 909sioattach(dev, xrid, rclk) 910 device_t dev; 911 int xrid; 912 u_long rclk; 913{ 914 struct com_s *com; 915#ifdef COM_ESP 916 Port_t *espp; 917#endif 918 Port_t iobase; 919 int minorbase; 920 int unit; 921 u_int flags; 922 int rid; 923 struct resource *port; 924 int ret; 925 struct tty *tp; 926 927 rid = xrid; 928 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 929 0, ~0, IO_COMSIZE, RF_ACTIVE); 930 if (!port) 931 return (ENXIO); 932 933 iobase = rman_get_start(port); 934 unit = device_get_unit(dev); 935 com = device_get_softc(dev); 936 flags = device_get_flags(dev); 937 938 if (unit >= sio_numunits) 939 sio_numunits = unit + 1; 940 /* 941 * sioprobe() has initialized the device registers as follows: 942 * o cfcr = CFCR_8BITS. 943 * It is most important that CFCR_DLAB is off, so that the 944 * data port is not hidden when we enable interrupts. 945 * o ier = 0. 946 * Interrupts are only enabled when the line is open. 947 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 948 * interrupt control register or the config specifies no irq. 949 * Keeping MCR_DTR and MCR_RTS off might stop the external 950 * device from sending before we are ready. 951 */ 952 bzero(com, sizeof *com); 953 com->unit = unit; 954 com->ioportres = port; 955 com->ioportrid = rid; 956 com->bst = rman_get_bustag(port); 957 com->bsh = rman_get_bushandle(port); 958 com->cfcr_image = CFCR_8BITS; 959 com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 960 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 961 com->tx_fifo_size = 1; 962 com->obufs[0].l_head = com->obuf1; 963 com->obufs[1].l_head = com->obuf2; 964 965 com->data_port = iobase + com_data; 966 com->int_ctl_port = iobase + com_ier; 967 com->int_id_port = iobase + com_iir; 968 com->modem_ctl_port = iobase + com_mcr; 969 com->mcr_image = inb(com->modem_ctl_port); 970 com->line_status_port = iobase + com_lsr; 971 com->modem_status_port = iobase + com_msr; 972 973 tp = com->tp = ttyalloc(); 974 tp->t_oproc = comstart; 975 tp->t_param = comparam; 976 tp->t_stop = comstop; 977 tp->t_modem = commodem; 978 tp->t_break = combreak; 979 tp->t_sc = com; 980 981 if (rclk == 0) 982 rclk = DEFAULT_RCLK; 983 com->rclk = rclk; 984 985 /* 986 * We don't use all the flags from <sys/ttydefaults.h> since they 987 * are only relevant for logins. It's important to have echo off 988 * initially so that the line doesn't start blathering before the 989 * echo flag can be turned off. 990 */ 991 tp->t_init_in.c_iflag = 0; 992 tp->t_init_in.c_oflag = 0; 993 tp->t_init_in.c_cflag = TTYDEF_CFLAG; 994 tp->t_init_in.c_lflag = 0; 995 if (unit == comconsole) { 996 tp->t_init_in.c_iflag = TTYDEF_IFLAG; 997 tp->t_init_in.c_oflag = TTYDEF_OFLAG; 998 tp->t_init_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 999 tp->t_init_in.c_lflag = TTYDEF_LFLAG; 1000 tp->t_lock_out.c_cflag = tp->t_lock_in.c_cflag = CLOCAL; 1001 tp->t_lock_out.c_ispeed = tp->t_lock_out.c_ospeed = 1002 tp->t_lock_in.c_ispeed = tp->t_lock_in.c_ospeed = 1003 tp->t_init_in.c_ispeed = tp->t_init_in.c_ospeed = comdefaultrate; 1004 } else 1005 tp->t_init_in.c_ispeed = tp->t_init_in.c_ospeed = TTYDEF_SPEED; 1006 if (siosetwater(com, tp->t_init_in.c_ispeed) != 0) { 1007 mtx_unlock_spin(&sio_lock); 1008 /* 1009 * Leave i/o resources allocated if this is a `cn'-level 1010 * console, so that other devices can't snarf them. 1011 */ 1012 if (iobase != siocniobase) 1013 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 1014 return (ENOMEM); 1015 } 1016 mtx_unlock_spin(&sio_lock); 1017 termioschars(&tp->t_init_in); 1018 tp->t_init_out = tp->t_init_in; 1019 1020 /* attempt to determine UART type */ 1021 printf("sio%d: type", unit); 1022 1023 1024 if (!COM_ISMULTIPORT(flags) && 1025 !COM_IIR_TXRDYBUG(flags) && !COM_NOSCR(flags)) { 1026 u_char scr; 1027 u_char scr1; 1028 u_char scr2; 1029 1030 scr = sio_getreg(com, com_scr); 1031 sio_setreg(com, com_scr, 0xa5); 1032 scr1 = sio_getreg(com, com_scr); 1033 sio_setreg(com, com_scr, 0x5a); 1034 scr2 = sio_getreg(com, com_scr); 1035 sio_setreg(com, com_scr, scr); 1036 if (scr1 != 0xa5 || scr2 != 0x5a) { 1037 printf(" 8250 or not responding"); 1038 goto determined_type; 1039 } 1040 } 1041 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 1042 DELAY(100); 1043 switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 1044 case FIFO_RX_LOW: 1045 printf(" 16450"); 1046 break; 1047 case FIFO_RX_MEDL: 1048 printf(" 16450?"); 1049 break; 1050 case FIFO_RX_MEDH: 1051 printf(" 16550?"); 1052 break; 1053 case FIFO_RX_HIGH: 1054 if (COM_NOFIFO(flags)) { 1055 printf(" 16550A fifo disabled"); 1056 break; 1057 } 1058 com->hasfifo = TRUE; 1059 if (COM_ST16650A(flags)) { 1060 printf(" ST16650A"); 1061 com->st16650a = TRUE; 1062 com->tx_fifo_size = 32; 1063 break; 1064 } 1065 if (COM_TI16754(flags)) { 1066 printf(" TI16754"); 1067 com->tx_fifo_size = 64; 1068 break; 1069 } 1070 printf(" 16550A"); 1071#ifdef COM_ESP 1072 for (espp = likely_esp_ports; *espp != 0; espp++) 1073 if (espattach(com, *espp)) { 1074 com->tx_fifo_size = 1024; 1075 break; 1076 } 1077 if (com->esp) 1078 break; 1079#endif 1080 com->tx_fifo_size = COM_FIFOSIZE(flags); 1081 if (com->tx_fifo_size == 0) 1082 com->tx_fifo_size = 16; 1083 else 1084 printf(" lookalike with %u bytes FIFO", 1085 com->tx_fifo_size); 1086 break; 1087 } 1088#ifdef COM_ESP 1089 if (com->esp) { 1090 /* 1091 * Set 16550 compatibility mode. 1092 * We don't use the ESP_MODE_SCALE bit to increase the 1093 * fifo trigger levels because we can't handle large 1094 * bursts of input. 1095 * XXX flow control should be set in comparam(), not here. 1096 */ 1097 outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 1098 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 1099 1100 /* Set RTS/CTS flow control. */ 1101 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 1102 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 1103 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 1104 1105 /* Set flow-control levels. */ 1106 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 1107 outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 1108 outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 1109 outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 1110 outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 1111 } 1112#endif /* COM_ESP */ 1113 sio_setreg(com, com_fifo, 0); 1114determined_type: ; 1115 1116#ifdef COM_MULTIPORT 1117 if (COM_ISMULTIPORT(flags)) { 1118 device_t masterdev; 1119 1120 com->multiport = TRUE; 1121 printf(" (multiport"); 1122 if (unit == COM_MPMASTER(flags)) 1123 printf(" master"); 1124 printf(")"); 1125 masterdev = devclass_get_device(sio_devclass, 1126 COM_MPMASTER(flags)); 1127 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 1128 SYS_RES_IRQ, 0, NULL, NULL) != 0); 1129 } 1130#endif /* COM_MULTIPORT */ 1131 if (unit == comconsole) 1132 printf(", console"); 1133 if (COM_IIR_TXRDYBUG(flags)) 1134 printf(" with a buggy IIR_TXRDY implementation"); 1135 printf("\n"); 1136 1137 if (sio_fast_ih == NULL) { 1138 swi_add(&tty_ithd, "sio", siopoll, NULL, SWI_TTY, 0, 1139 &sio_fast_ih); 1140 swi_add(&clk_ithd, "sio", siopoll, NULL, SWI_CLOCK, 0, 1141 &sio_slow_ih); 1142 } 1143 minorbase = UNIT_TO_MINOR(unit); 1144 com->devs[0] = make_dev(&sio_cdevsw, minorbase, 1145 UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 1146 com->devs[1] = make_dev(&sioc_cdevsw, minorbase | CONTROL_INIT_STATE, 1147 UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 1148 com->devs[2] = make_dev(&sioc_cdevsw, minorbase | CONTROL_LOCK_STATE, 1149 UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 1150 com->devs[3] = make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK, 1151 UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 1152 com->devs[4] = make_dev(&sioc_cdevsw, 1153 minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 1154 UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 1155 com->devs[5] = make_dev(&sioc_cdevsw, 1156 minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 1157 UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1158 for (rid = 0; rid < 6; rid++) { 1159 com->devs[rid]->si_drv1 = com; 1160 com->devs[rid]->si_tty = tp; 1161 } 1162 com->flags = flags; 1163 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1164 1165 if (COM_PPSCTS(flags)) 1166 com->pps_bit = MSR_CTS; 1167 else 1168 com->pps_bit = MSR_DCD; 1169 pps_init(&com->pps); 1170 1171 rid = 0; 1172 com->irqres = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE); 1173 if (com->irqres) { 1174 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 1175 INTR_TYPE_TTY | INTR_FAST, 1176 siointr, com, &com->cookie); 1177 if (ret) { 1178 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 1179 com->irqres, INTR_TYPE_TTY, 1180 siointr, com, &com->cookie); 1181 if (ret == 0) 1182 device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 1183 } 1184 if (ret) 1185 device_printf(dev, "could not activate interrupt\n"); 1186#if defined(KDB) && (defined(BREAK_TO_DEBUGGER) || \ 1187 defined(ALT_BREAK_TO_DEBUGGER)) 1188 /* 1189 * Enable interrupts for early break-to-debugger support 1190 * on the console. 1191 */ 1192 if (ret == 0 && unit == comconsole) 1193 outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 1194 IER_EMSC); 1195#endif 1196 } 1197 1198 return (0); 1199} 1200 1201static int 1202siocopen(dev, flag, mode, td) 1203 struct cdev *dev; 1204 int flag; 1205 int mode; 1206 struct thread *td; 1207{ 1208 struct com_s *com; 1209 1210 com = dev->si_drv1; 1211 if (com == NULL) 1212 return (ENXIO); 1213 if (com->gone) 1214 return (ENXIO); 1215 return (0); 1216} 1217 1218static int 1219sioopen(dev, flag, mode, td) 1220 struct cdev *dev; 1221 int flag; 1222 int mode; 1223 struct thread *td; 1224{ 1225 struct com_s *com; 1226 int error; 1227 int mynor; 1228 int s; 1229 struct tty *tp; 1230 int unit; 1231 1232 mynor = minor(dev); 1233 unit = MINOR_TO_UNIT(mynor); 1234 com = dev->si_drv1; 1235 if (com == NULL) 1236 return (ENXIO); 1237 if (com->gone) 1238 return (ENXIO); 1239 tp = dev->si_tty = com->tp; 1240 s = spltty(); 1241 /* 1242 * We jump to this label after all non-interrupted sleeps to pick 1243 * up any changes of the device state. 1244 */ 1245open_top: 1246 error = ttydtrwaitsleep(tp); 1247 if (error != 0) 1248 goto out; 1249 if (tp->t_state & TS_ISOPEN) { 1250 /* 1251 * The device is open, so everything has been initialized. 1252 * Handle conflicts. 1253 */ 1254 if (mynor & CALLOUT_MASK) { 1255 if (!com->active_out) { 1256 error = EBUSY; 1257 goto out; 1258 } 1259 } else { 1260 if (com->active_out) { 1261 if (flag & O_NONBLOCK) { 1262 error = EBUSY; 1263 goto out; 1264 } 1265 error = tsleep(&com->active_out, 1266 TTIPRI | PCATCH, "siobi", 0); 1267 if (com_addr(unit) == NULL) 1268 return (ENXIO); 1269 if (error != 0 || com->gone) 1270 goto out; 1271 goto open_top; 1272 } 1273 } 1274 if (tp->t_state & TS_XCLUDE && 1275 suser(td)) { 1276 error = EBUSY; 1277 goto out; 1278 } 1279 } else { 1280 /* 1281 * The device isn't open, so there are no conflicts. 1282 * Initialize it. Initialization is done twice in many 1283 * cases: to preempt sleeping callin opens if we are 1284 * callout, and to complete a callin open after DCD rises. 1285 */ 1286 tp->t_dev = dev; 1287 tp->t_termios = mynor & CALLOUT_MASK 1288 ? tp->t_init_out : tp->t_init_in; 1289 (void)commodem(tp, SER_DTR | SER_RTS, 0); 1290 com->poll = com->no_irq; 1291 com->poll_output = com->loses_outints; 1292 ++com->wopeners; 1293 error = comparam(tp, &tp->t_termios); 1294 --com->wopeners; 1295 if (error != 0) 1296 goto out; 1297 /* 1298 * XXX we should goto open_top if comparam() slept. 1299 */ 1300 if (com->hasfifo) { 1301 int i; 1302 /* 1303 * (Re)enable and drain fifos. 1304 * 1305 * Certain SMC chips cause problems if the fifos 1306 * are enabled while input is ready. Turn off the 1307 * fifo if necessary to clear the input. We test 1308 * the input ready bit after enabling the fifos 1309 * since we've already enabled them in comparam() 1310 * and to handle races between enabling and fresh 1311 * input. 1312 */ 1313 for (i = 0; i < 500; i++) { 1314 sio_setreg(com, com_fifo, 1315 FIFO_RCV_RST | FIFO_XMT_RST 1316 | com->fifo_image); 1317 /* 1318 * XXX the delays are for superstitious 1319 * historical reasons. It must be less than 1320 * the character time at the maximum 1321 * supported speed (87 usec at 115200 bps 1322 * 8N1). Otherwise we might loop endlessly 1323 * if data is streaming in. We used to use 1324 * delays of 100. That usually worked 1325 * because DELAY(100) used to usually delay 1326 * for about 85 usec instead of 100. 1327 */ 1328 DELAY(50); 1329 if (!(inb(com->line_status_port) & LSR_RXRDY)) 1330 break; 1331 sio_setreg(com, com_fifo, 0); 1332 DELAY(50); 1333 (void) inb(com->data_port); 1334 } 1335 if (i == 500) { 1336 error = EIO; 1337 goto out; 1338 } 1339 } 1340 1341 mtx_lock_spin(&sio_lock); 1342 (void) inb(com->line_status_port); 1343 (void) inb(com->data_port); 1344 com->prev_modem_status = com->last_modem_status 1345 = inb(com->modem_status_port); 1346 outb(com->int_ctl_port, 1347 IER_ERXRDY | IER_ERLS | IER_EMSC 1348 | (COM_IIR_TXRDYBUG(com->flags) ? 0 : IER_ETXRDY)); 1349 mtx_unlock_spin(&sio_lock); 1350 /* 1351 * Handle initial DCD. Callout devices get a fake initial 1352 * DCD (trapdoor DCD). If we are callout, then any sleeping 1353 * callin opens get woken up and resume sleeping on "siobi" 1354 * instead of "siodcd". 1355 */ 1356 /* 1357 * XXX `mynor & CALLOUT_MASK' should be 1358 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 1359 * TRAPDOOR_CARRIER is the default initial state for callout 1360 * devices and SOFT_CARRIER is like CLOCAL except it hides 1361 * the true carrier. 1362 */ 1363 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 1364 ttyld_modem(tp, 1); 1365 } 1366 /* 1367 * Wait for DCD if necessary. 1368 */ 1369 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 1370 && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 1371 ++com->wopeners; 1372 error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0); 1373 if (com_addr(unit) == NULL) 1374 return (ENXIO); 1375 --com->wopeners; 1376 if (error != 0 || com->gone) 1377 goto out; 1378 goto open_top; 1379 } 1380 error = ttyld_open(tp, dev); 1381 ttyldoptim(tp); 1382 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 1383 com->active_out = TRUE; 1384 siosettimeout(); 1385out: 1386 splx(s); 1387 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 1388 comhardclose(com); 1389 return (error); 1390} 1391 1392static int 1393siocclose(dev, flag, mode, td) 1394 struct cdev *dev; 1395 int flag; 1396 int mode; 1397 struct thread *td; 1398{ 1399 1400 return (0); 1401} 1402 1403static int 1404sioclose(dev, flag, mode, td) 1405 struct cdev *dev; 1406 int flag; 1407 int mode; 1408 struct thread *td; 1409{ 1410 struct com_s *com; 1411 int s; 1412 struct tty *tp; 1413 1414 com = dev->si_drv1; 1415 if (com == NULL) 1416 return (ENODEV); 1417 tp = com->tp; 1418 s = spltty(); 1419 ttyld_close(tp, flag); 1420 ttyldoptim(tp); 1421 comhardclose(com); 1422 tty_close(tp); 1423 siosettimeout(); 1424 splx(s); 1425 if (com->gone) { 1426 printf("sio%d: gone\n", com->unit); 1427 s = spltty(); 1428 if (com->ibuf != NULL) 1429 free(com->ibuf, M_DEVBUF); 1430 bzero(tp, sizeof *tp); 1431 splx(s); 1432 } 1433 return (0); 1434} 1435 1436static void 1437comhardclose(com) 1438 struct com_s *com; 1439{ 1440 int s; 1441 struct tty *tp; 1442 1443 s = spltty(); 1444 com->poll = FALSE; 1445 com->poll_output = FALSE; 1446 com->do_timestamp = FALSE; 1447 com->pps.ppsparam.mode = 0; 1448 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 1449 tp = com->tp; 1450 1451#if defined(KDB) && (defined(BREAK_TO_DEBUGGER) || \ 1452 defined(ALT_BREAK_TO_DEBUGGER)) 1453 /* 1454 * Leave interrupts enabled and don't clear DTR if this is the 1455 * console. This allows us to detect break-to-debugger events 1456 * while the console device is closed. 1457 */ 1458 if (com->unit != comconsole) 1459#endif 1460 { 1461 sio_setreg(com, com_ier, 0); 1462 if (tp->t_cflag & HUPCL 1463 /* 1464 * XXX we will miss any carrier drop between here and the 1465 * next open. Perhaps we should watch DCD even when the 1466 * port is closed; it is not sufficient to check it at 1467 * the next open because it might go up and down while 1468 * we're not watching. 1469 */ 1470 || (!com->active_out 1471 && !(com->prev_modem_status & MSR_DCD) 1472 && !(tp->t_init_in.c_cflag & CLOCAL)) 1473 || !(tp->t_state & TS_ISOPEN)) { 1474 (void)commodem(tp, 0, SER_DTR); 1475 ttydtrwaitstart(tp); 1476 } 1477 } 1478 if (com->hasfifo) { 1479 /* 1480 * Disable fifos so that they are off after controlled 1481 * reboots. Some BIOSes fail to detect 16550s when the 1482 * fifos are enabled. 1483 */ 1484 sio_setreg(com, com_fifo, 0); 1485 } 1486 com->active_out = FALSE; 1487 wakeup(&com->active_out); 1488 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 1489 splx(s); 1490} 1491 1492static int 1493siocrdwr(dev, uio, flag) 1494 struct cdev *dev; 1495 struct uio *uio; 1496 int flag; 1497{ 1498 1499 return (ENODEV); 1500} 1501 1502static int 1503sioread(dev, uio, flag) 1504 struct cdev *dev; 1505 struct uio *uio; 1506 int flag; 1507{ 1508 struct com_s *com; 1509 1510 com = dev->si_drv1; 1511 if (com == NULL || com->gone) 1512 return (ENODEV); 1513 return (ttyld_read(com->tp, uio, flag)); 1514} 1515 1516static int 1517siowrite(dev, uio, flag) 1518 struct cdev *dev; 1519 struct uio *uio; 1520 int flag; 1521{ 1522 int mynor; 1523 struct com_s *com; 1524 int unit; 1525 1526 mynor = minor(dev); 1527 1528 unit = MINOR_TO_UNIT(mynor); 1529 com = dev->si_drv1; 1530 if (com == NULL || com->gone) 1531 return (ENODEV); 1532 /* 1533 * (XXX) We disallow virtual consoles if the physical console is 1534 * a serial port. This is in case there is a display attached that 1535 * is not the console. In that situation we don't need/want the X 1536 * server taking over the console. 1537 */ 1538 if (constty != NULL && unit == comconsole) 1539 constty = NULL; 1540 return (ttyld_write(com->tp, uio, flag)); 1541} 1542 1543static void 1544siobusycheck(chan) 1545 void *chan; 1546{ 1547 struct com_s *com; 1548 int s; 1549 1550 com = (struct com_s *)chan; 1551 1552 /* 1553 * Clear TS_BUSY if low-level output is complete. 1554 * spl locking is sufficient because siointr1() does not set CS_BUSY. 1555 * If siointr1() clears CS_BUSY after we look at it, then we'll get 1556 * called again. Reading the line status port outside of siointr1() 1557 * is safe because CS_BUSY is clear so there are no output interrupts 1558 * to lose. 1559 */ 1560 s = spltty(); 1561 if (com->state & CS_BUSY) 1562 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 1563 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 1564 == (LSR_TSRE | LSR_TXRDY)) { 1565 com->tp->t_state &= ~TS_BUSY; 1566 ttwwakeup(com->tp); 1567 com->extra_state &= ~CSE_BUSYCHECK; 1568 } else 1569 timeout(siobusycheck, com, hz / 100); 1570 splx(s); 1571} 1572 1573static u_int 1574siodivisor(rclk, speed) 1575 u_long rclk; 1576 speed_t speed; 1577{ 1578 long actual_speed; 1579 u_int divisor; 1580 int error; 1581 1582 if (speed == 0) 1583 return (0); 1584#if UINT_MAX > (ULONG_MAX - 1) / 8 1585 if (speed > (ULONG_MAX - 1) / 8) 1586 return (0); 1587#endif 1588 divisor = (rclk / (8UL * speed) + 1) / 2; 1589 if (divisor == 0 || divisor >= 65536) 1590 return (0); 1591 actual_speed = rclk / (16UL * divisor); 1592 1593 /* 10 times error in percent: */ 1594 error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 1595 1596 /* 3.0% maximum error tolerance: */ 1597 if (error < -30 || error > 30) 1598 return (0); 1599 1600 return (divisor); 1601} 1602 1603/* 1604 * Call this function with the sio_lock mutex held. It will return with the 1605 * lock still held. 1606 */ 1607static void 1608sioinput(com) 1609 struct com_s *com; 1610{ 1611 u_char *buf; 1612 int incc; 1613 u_char line_status; 1614 int recv_data; 1615 struct tty *tp; 1616 1617 buf = com->ibuf; 1618 tp = com->tp; 1619 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 1620 com_events -= (com->iptr - com->ibuf); 1621 com->iptr = com->ibuf; 1622 return; 1623 } 1624 if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 1625 /* 1626 * Avoid the grotesquely inefficient lineswitch routine 1627 * (ttyinput) in "raw" mode. It usually takes about 450 1628 * instructions (that's without canonical processing or echo!). 1629 * slinput is reasonably fast (usually 40 instructions plus 1630 * call overhead). 1631 */ 1632 do { 1633 /* 1634 * This may look odd, but it is using save-and-enable 1635 * semantics instead of the save-and-disable semantics 1636 * that are used everywhere else. 1637 */ 1638 mtx_unlock_spin(&sio_lock); 1639 incc = com->iptr - buf; 1640 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 1641 && (com->state & CS_RTS_IFLOW 1642 || tp->t_iflag & IXOFF) 1643 && !(tp->t_state & TS_TBLOCK)) 1644 ttyblock(tp); 1645 com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 1646 += b_to_q((char *)buf, incc, &tp->t_rawq); 1647 buf += incc; 1648 tk_nin += incc; 1649 tk_rawcc += incc; 1650 tp->t_rawcc += incc; 1651 ttwakeup(tp); 1652 if (tp->t_state & TS_TTSTOP 1653 && (tp->t_iflag & IXANY 1654 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 1655 tp->t_state &= ~TS_TTSTOP; 1656 tp->t_lflag &= ~FLUSHO; 1657 comstart(tp); 1658 } 1659 mtx_lock_spin(&sio_lock); 1660 } while (buf < com->iptr); 1661 } else { 1662 do { 1663 /* 1664 * This may look odd, but it is using save-and-enable 1665 * semantics instead of the save-and-disable semantics 1666 * that are used everywhere else. 1667 */ 1668 mtx_unlock_spin(&sio_lock); 1669 line_status = buf[com->ierroff]; 1670 recv_data = *buf++; 1671 if (line_status 1672 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 1673 if (line_status & LSR_BI) 1674 recv_data |= TTY_BI; 1675 if (line_status & LSR_FE) 1676 recv_data |= TTY_FE; 1677 if (line_status & LSR_OE) 1678 recv_data |= TTY_OE; 1679 if (line_status & LSR_PE) 1680 recv_data |= TTY_PE; 1681 } 1682 ttyld_rint(tp, recv_data); 1683 mtx_lock_spin(&sio_lock); 1684 } while (buf < com->iptr); 1685 } 1686 com_events -= (com->iptr - com->ibuf); 1687 com->iptr = com->ibuf; 1688 1689 /* 1690 * There is now room for another low-level buffer full of input, 1691 * so enable RTS if it is now disabled and there is room in the 1692 * high-level buffer. 1693 */ 1694 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 1695 !(tp->t_state & TS_TBLOCK)) 1696 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 1697} 1698 1699static void 1700siointr(arg) 1701 void *arg; 1702{ 1703 struct com_s *com; 1704 1705#ifndef COM_MULTIPORT 1706 com = (struct com_s *)arg; 1707 1708 mtx_lock_spin(&sio_lock); 1709 siointr1(com); 1710 mtx_unlock_spin(&sio_lock); 1711#else /* COM_MULTIPORT */ 1712 bool_t possibly_more_intrs; 1713 int unit; 1714 1715 /* 1716 * Loop until there is no activity on any port. This is necessary 1717 * to get an interrupt edge more than to avoid another interrupt. 1718 * If the IRQ signal is just an OR of the IRQ signals from several 1719 * devices, then the edge from one may be lost because another is 1720 * on. 1721 */ 1722 mtx_lock_spin(&sio_lock); 1723 do { 1724 possibly_more_intrs = FALSE; 1725 for (unit = 0; unit < sio_numunits; ++unit) { 1726 com = com_addr(unit); 1727 /* 1728 * XXX COM_LOCK(); 1729 * would it work here, or be counter-productive? 1730 */ 1731 if (com != NULL 1732 && !com->gone 1733 && (inb(com->int_id_port) & IIR_IMASK) 1734 != IIR_NOPEND) { 1735 siointr1(com); 1736 possibly_more_intrs = TRUE; 1737 } 1738 /* XXX COM_UNLOCK(); */ 1739 } 1740 } while (possibly_more_intrs); 1741 mtx_unlock_spin(&sio_lock); 1742#endif /* COM_MULTIPORT */ 1743} 1744 1745static struct timespec siots[8]; 1746static int siotso; 1747static int volatile siotsunit = -1; 1748 1749static int 1750sysctl_siots(SYSCTL_HANDLER_ARGS) 1751{ 1752 char buf[128]; 1753 long long delta; 1754 size_t len; 1755 int error, i, tso; 1756 1757 for (i = 1, tso = siotso; i < tso; i++) { 1758 delta = (long long)(siots[i].tv_sec - siots[i - 1].tv_sec) * 1759 1000000000 + 1760 (siots[i].tv_nsec - siots[i - 1].tv_nsec); 1761 len = sprintf(buf, "%lld\n", delta); 1762 if (delta >= 110000) 1763 len += sprintf(buf + len - 1, ": *** %ld.%09ld\n", 1764 (long)siots[i].tv_sec, siots[i].tv_nsec) - 1; 1765 if (i == tso - 1) 1766 buf[len - 1] = '\0'; 1767 error = SYSCTL_OUT(req, buf, len); 1768 if (error != 0) 1769 return (error); 1770 uio_yield(); 1771 } 1772 return (0); 1773} 1774 1775SYSCTL_PROC(_machdep, OID_AUTO, siots, CTLTYPE_STRING | CTLFLAG_RD, 1776 0, 0, sysctl_siots, "A", "sio timestamps"); 1777 1778static void 1779siointr1(com) 1780 struct com_s *com; 1781{ 1782 u_char int_ctl; 1783 u_char int_ctl_new; 1784 u_char line_status; 1785 u_char modem_status; 1786 u_char *ioptr; 1787 u_char recv_data; 1788 1789 if (COM_IIR_TXRDYBUG(com->flags)) { 1790 int_ctl = inb(com->int_ctl_port); 1791 int_ctl_new = int_ctl; 1792 } else { 1793 int_ctl = 0; 1794 int_ctl_new = 0; 1795 } 1796 1797 while (!com->gone) { 1798 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 1799 modem_status = inb(com->modem_status_port); 1800 if ((modem_status ^ com->last_modem_status) & 1801 com->pps_bit) { 1802 pps_capture(&com->pps); 1803 pps_event(&com->pps, 1804 (modem_status & com->pps_bit) ? 1805 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 1806 } 1807 } 1808 line_status = inb(com->line_status_port); 1809 1810 /* input event? (check first to help avoid overruns) */ 1811 while (line_status & LSR_RCV_MASK) { 1812 /* break/unnattached error bits or real input? */ 1813 if (!(line_status & LSR_RXRDY)) 1814 recv_data = 0; 1815 else 1816 recv_data = inb(com->data_port); 1817#ifdef KDB 1818#ifdef ALT_BREAK_TO_DEBUGGER 1819 if (com->unit == comconsole && 1820 kdb_alt_break(recv_data, &com->alt_brk_state) != 0) 1821 kdb_enter("Break sequence on console"); 1822#endif /* ALT_BREAK_TO_DEBUGGER */ 1823#endif /* KDB */ 1824 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 1825 /* 1826 * Don't store BI if IGNBRK or FE/PE if IGNPAR. 1827 * Otherwise, push the work to a higher level 1828 * (to handle PARMRK) if we're bypassing. 1829 * Otherwise, convert BI/FE and PE+INPCK to 0. 1830 * 1831 * This makes bypassing work right in the 1832 * usual "raw" case (IGNBRK set, and IGNPAR 1833 * and INPCK clear). 1834 * 1835 * Note: BI together with FE/PE means just BI. 1836 */ 1837 if (line_status & LSR_BI) { 1838#if defined(KDB) && defined(BREAK_TO_DEBUGGER) 1839 if (com->unit == comconsole) { 1840 kdb_enter("Line break on console"); 1841 goto cont; 1842 } 1843#endif 1844 if (com->tp == NULL 1845 || com->tp->t_iflag & IGNBRK) 1846 goto cont; 1847 } else { 1848 if (com->tp == NULL 1849 || com->tp->t_iflag & IGNPAR) 1850 goto cont; 1851 } 1852 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 1853 && (line_status & (LSR_BI | LSR_FE) 1854 || com->tp->t_iflag & INPCK)) 1855 recv_data = 0; 1856 } 1857 ++com->bytes_in; 1858 if (com->tp != NULL && 1859 com->tp->t_hotchar != 0 && recv_data == com->tp->t_hotchar) 1860 swi_sched(sio_fast_ih, 0); 1861 ioptr = com->iptr; 1862 if (ioptr >= com->ibufend) 1863 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 1864 else { 1865 if (com->do_timestamp) 1866 microtime(&com->timestamp); 1867 ++com_events; 1868 swi_sched(sio_slow_ih, SWI_DELAY); 1869#if 0 /* for testing input latency vs efficiency */ 1870if (com->iptr - com->ibuf == 8) 1871 swi_sched(sio_fast_ih, 0); 1872#endif 1873 ioptr[0] = recv_data; 1874 ioptr[com->ierroff] = line_status; 1875 com->iptr = ++ioptr; 1876 if (ioptr == com->ihighwater 1877 && com->state & CS_RTS_IFLOW) 1878 outb(com->modem_ctl_port, 1879 com->mcr_image &= ~MCR_RTS); 1880 if (line_status & LSR_OE) 1881 CE_RECORD(com, CE_OVERRUN); 1882 } 1883cont: 1884 if (line_status & LSR_TXRDY 1885 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) 1886 goto txrdy; 1887 1888 /* 1889 * "& 0x7F" is to avoid the gcc-1.40 generating a slow 1890 * jump from the top of the loop to here 1891 */ 1892 line_status = inb(com->line_status_port) & 0x7F; 1893 } 1894 1895 /* modem status change? (always check before doing output) */ 1896 modem_status = inb(com->modem_status_port); 1897 if (modem_status != com->last_modem_status) { 1898 /* 1899 * Schedule high level to handle DCD changes. Note 1900 * that we don't use the delta bits anywhere. Some 1901 * UARTs mess them up, and it's easy to remember the 1902 * previous bits and calculate the delta. 1903 */ 1904 com->last_modem_status = modem_status; 1905 if (!(com->state & CS_CHECKMSR)) { 1906 com_events += LOTS_OF_EVENTS; 1907 com->state |= CS_CHECKMSR; 1908 swi_sched(sio_fast_ih, 0); 1909 } 1910 1911 /* handle CTS change immediately for crisp flow ctl */ 1912 if (com->state & CS_CTS_OFLOW) { 1913 if (modem_status & MSR_CTS) 1914 com->state |= CS_ODEVREADY; 1915 else 1916 com->state &= ~CS_ODEVREADY; 1917 } 1918 } 1919 1920txrdy: 1921 /* output queued and everything ready? */ 1922 if (line_status & LSR_TXRDY 1923 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 1924 ioptr = com->obufq.l_head; 1925 if (com->tx_fifo_size > 1 && com->unit != siotsunit) { 1926 u_int ocount; 1927 1928 ocount = com->obufq.l_tail - ioptr; 1929 if (ocount > com->tx_fifo_size) 1930 ocount = com->tx_fifo_size; 1931 com->bytes_out += ocount; 1932 do 1933 outb(com->data_port, *ioptr++); 1934 while (--ocount != 0); 1935 } else { 1936 outb(com->data_port, *ioptr++); 1937 ++com->bytes_out; 1938 if (com->unit == siotsunit 1939 && siotso < sizeof siots / sizeof siots[0]) 1940 nanouptime(&siots[siotso++]); 1941 } 1942 com->obufq.l_head = ioptr; 1943 if (COM_IIR_TXRDYBUG(com->flags)) 1944 int_ctl_new = int_ctl | IER_ETXRDY; 1945 if (ioptr >= com->obufq.l_tail) { 1946 struct lbq *qp; 1947 1948 qp = com->obufq.l_next; 1949 qp->l_queued = FALSE; 1950 qp = qp->l_next; 1951 if (qp != NULL) { 1952 com->obufq.l_head = qp->l_head; 1953 com->obufq.l_tail = qp->l_tail; 1954 com->obufq.l_next = qp; 1955 } else { 1956 /* output just completed */ 1957 if (COM_IIR_TXRDYBUG(com->flags)) 1958 int_ctl_new = int_ctl 1959 & ~IER_ETXRDY; 1960 com->state &= ~CS_BUSY; 1961 } 1962 if (!(com->state & CS_ODONE)) { 1963 com_events += LOTS_OF_EVENTS; 1964 com->state |= CS_ODONE; 1965 /* handle at high level ASAP */ 1966 swi_sched(sio_fast_ih, 0); 1967 } 1968 } 1969 if (COM_IIR_TXRDYBUG(com->flags) 1970 && int_ctl != int_ctl_new) 1971 outb(com->int_ctl_port, int_ctl_new); 1972 } 1973 1974 /* finished? */ 1975#ifndef COM_MULTIPORT 1976 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 1977#endif /* COM_MULTIPORT */ 1978 return; 1979 } 1980} 1981 1982static int 1983siocioctl(dev, cmd, data, flag, td) 1984 struct cdev *dev; 1985 u_long cmd; 1986 caddr_t data; 1987 int flag; 1988 struct thread *td; 1989{ 1990 struct com_s *com; 1991 struct tty *tp; 1992 int error; 1993 int mynor; 1994 struct termios *ct; 1995 1996 mynor = minor(dev); 1997 com = dev->si_drv1; 1998 if (com == NULL || com->gone) 1999 return (ENODEV); 2000 tp = com->tp; 2001 2002 switch (mynor & CONTROL_MASK) { 2003 case CONTROL_INIT_STATE: 2004 ct = mynor & CALLOUT_MASK ? &tp->t_init_out : &tp->t_init_in; 2005 break; 2006 case CONTROL_LOCK_STATE: 2007 ct = mynor & CALLOUT_MASK ? &tp->t_lock_out : &tp->t_lock_in; 2008 break; 2009 default: 2010 return (ENODEV); /* /dev/nodev */ 2011 } 2012 switch (cmd) { 2013 case TIOCSETA: 2014 error = suser(td); 2015 if (error != 0) 2016 return (error); 2017 *ct = *(struct termios *)data; 2018 return (0); 2019 case TIOCGETA: 2020 *(struct termios *)data = *ct; 2021 return (0); 2022 case TIOCGETD: 2023 *(int *)data = TTYDISC; 2024 return (0); 2025 case TIOCGWINSZ: 2026 bzero(data, sizeof(struct winsize)); 2027 return (0); 2028 default: 2029 return (ENOTTY); 2030 } 2031} 2032 2033static int 2034sioioctl(dev, cmd, data, flag, td) 2035 struct cdev *dev; 2036 u_long cmd; 2037 caddr_t data; 2038 int flag; 2039 struct thread *td; 2040{ 2041 struct com_s *com; 2042 int error; 2043 int mynor; 2044 int s; 2045 struct tty *tp; 2046#ifndef BURN_BRIDGES 2047#if defined(COMPAT_43) 2048 u_long oldcmd; 2049 struct termios term; 2050#endif 2051#endif 2052 2053 mynor = minor(dev); 2054 com = dev->si_drv1; 2055 if (com == NULL || com->gone) 2056 return (ENODEV); 2057 tp = com->tp; 2058#ifndef BURN_BRIDGES 2059#if defined(COMPAT_43) 2060 term = tp->t_termios; 2061 oldcmd = cmd; 2062 error = ttsetcompat(tp, &cmd, data, &term); 2063 if (error != 0) 2064 return (error); 2065 if (cmd != oldcmd) 2066 data = (caddr_t)&term; 2067#endif 2068#endif 2069 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 2070 int cc; 2071 struct termios *dt = (struct termios *)data; 2072 struct termios *lt = mynor & CALLOUT_MASK 2073 ? &tp->t_lock_out : &tp->t_lock_in; 2074 2075 dt->c_iflag = (tp->t_iflag & lt->c_iflag) 2076 | (dt->c_iflag & ~lt->c_iflag); 2077 dt->c_oflag = (tp->t_oflag & lt->c_oflag) 2078 | (dt->c_oflag & ~lt->c_oflag); 2079 dt->c_cflag = (tp->t_cflag & lt->c_cflag) 2080 | (dt->c_cflag & ~lt->c_cflag); 2081 dt->c_lflag = (tp->t_lflag & lt->c_lflag) 2082 | (dt->c_lflag & ~lt->c_lflag); 2083 for (cc = 0; cc < NCCS; ++cc) 2084 if (lt->c_cc[cc] != 0) 2085 dt->c_cc[cc] = tp->t_cc[cc]; 2086 if (lt->c_ispeed != 0) 2087 dt->c_ispeed = tp->t_ispeed; 2088 if (lt->c_ospeed != 0) 2089 dt->c_ospeed = tp->t_ospeed; 2090 } 2091 error = ttyioctl(dev, cmd, data, flag, td); 2092 ttyldoptim(tp); 2093 if (error != ENOTTY) 2094 return (error); 2095 s = spltty(); 2096 switch (cmd) { 2097 case TIOCTIMESTAMP: 2098 com->do_timestamp = TRUE; 2099 *(struct timeval *)data = com->timestamp; 2100 break; 2101 default: 2102 splx(s); 2103 error = pps_ioctl(cmd, data, &com->pps); 2104 if (error == ENODEV) 2105 error = ENOTTY; 2106 return (error); 2107 } 2108 splx(s); 2109 return (0); 2110} 2111 2112/* software interrupt handler for SWI_TTY */ 2113static void 2114siopoll(void *dummy) 2115{ 2116 int unit; 2117 2118 if (com_events == 0) 2119 return; 2120repeat: 2121 for (unit = 0; unit < sio_numunits; ++unit) { 2122 struct com_s *com; 2123 int incc; 2124 struct tty *tp; 2125 2126 com = com_addr(unit); 2127 if (com == NULL) 2128 continue; 2129 tp = com->tp; 2130 if (tp == NULL || com->gone) { 2131 /* 2132 * Discard any events related to never-opened or 2133 * going-away devices. 2134 */ 2135 mtx_lock_spin(&sio_lock); 2136 incc = com->iptr - com->ibuf; 2137 com->iptr = com->ibuf; 2138 if (com->state & CS_CHECKMSR) { 2139 incc += LOTS_OF_EVENTS; 2140 com->state &= ~CS_CHECKMSR; 2141 } 2142 com_events -= incc; 2143 mtx_unlock_spin(&sio_lock); 2144 continue; 2145 } 2146 if (com->iptr != com->ibuf) { 2147 mtx_lock_spin(&sio_lock); 2148 sioinput(com); 2149 mtx_unlock_spin(&sio_lock); 2150 } 2151 if (com->state & CS_CHECKMSR) { 2152 u_char delta_modem_status; 2153 2154 mtx_lock_spin(&sio_lock); 2155 delta_modem_status = com->last_modem_status 2156 ^ com->prev_modem_status; 2157 com->prev_modem_status = com->last_modem_status; 2158 com_events -= LOTS_OF_EVENTS; 2159 com->state &= ~CS_CHECKMSR; 2160 mtx_unlock_spin(&sio_lock); 2161 if (delta_modem_status & MSR_DCD) 2162 ttyld_modem(tp, 2163 com->prev_modem_status & MSR_DCD); 2164 } 2165 if (com->state & CS_ODONE) { 2166 mtx_lock_spin(&sio_lock); 2167 com_events -= LOTS_OF_EVENTS; 2168 com->state &= ~CS_ODONE; 2169 mtx_unlock_spin(&sio_lock); 2170 if (!(com->state & CS_BUSY) 2171 && !(com->extra_state & CSE_BUSYCHECK)) { 2172 timeout(siobusycheck, com, hz / 100); 2173 com->extra_state |= CSE_BUSYCHECK; 2174 } 2175 ttyld_start(tp); 2176 } 2177 if (com_events == 0) 2178 break; 2179 } 2180 if (com_events >= LOTS_OF_EVENTS) 2181 goto repeat; 2182} 2183 2184static void 2185combreak(tp, sig) 2186 struct tty *tp; 2187 int sig; 2188{ 2189 struct com_s *com; 2190 2191 com = tp->t_sc; 2192 2193 if (sig) 2194 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 2195 else 2196 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 2197} 2198 2199static int 2200comparam(tp, t) 2201 struct tty *tp; 2202 struct termios *t; 2203{ 2204 u_int cfcr; 2205 int cflag; 2206 struct com_s *com; 2207 u_int divisor; 2208 u_char dlbh; 2209 u_char dlbl; 2210 u_char efr_flowbits; 2211 int s; 2212 2213 com = tp->t_sc; 2214 if (com == NULL) 2215 return (ENODEV); 2216 2217 /* check requested parameters */ 2218 if (t->c_ispeed != (t->c_ospeed != 0 ? t->c_ospeed : tp->t_ospeed)) 2219 return (EINVAL); 2220 divisor = siodivisor(com->rclk, t->c_ispeed); 2221 if (divisor == 0) 2222 return (EINVAL); 2223 2224 /* parameters are OK, convert them to the com struct and the device */ 2225 s = spltty(); 2226 if (t->c_ospeed == 0) 2227 (void)commodem(tp, 0, SER_DTR); /* hang up line */ 2228 else 2229 (void)commodem(tp, SER_DTR, 0); 2230 cflag = t->c_cflag; 2231 switch (cflag & CSIZE) { 2232 case CS5: 2233 cfcr = CFCR_5BITS; 2234 break; 2235 case CS6: 2236 cfcr = CFCR_6BITS; 2237 break; 2238 case CS7: 2239 cfcr = CFCR_7BITS; 2240 break; 2241 default: 2242 cfcr = CFCR_8BITS; 2243 break; 2244 } 2245 if (cflag & PARENB) { 2246 cfcr |= CFCR_PENAB; 2247 if (!(cflag & PARODD)) 2248 cfcr |= CFCR_PEVEN; 2249 } 2250 if (cflag & CSTOPB) 2251 cfcr |= CFCR_STOPB; 2252 2253 if (com->hasfifo) { 2254 /* 2255 * Use a fifo trigger level low enough so that the input 2256 * latency from the fifo is less than about 16 msec and 2257 * the total latency is less than about 30 msec. These 2258 * latencies are reasonable for humans. Serial comms 2259 * protocols shouldn't expect anything better since modem 2260 * latencies are larger. 2261 * 2262 * The fifo trigger level cannot be set at RX_HIGH for high 2263 * speed connections without further work on reducing 2264 * interrupt disablement times in other parts of the system, 2265 * without producing silo overflow errors. 2266 */ 2267 com->fifo_image = com->unit == siotsunit ? 0 2268 : t->c_ispeed <= 4800 2269 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 2270#ifdef COM_ESP 2271 /* 2272 * The Hayes ESP card needs the fifo DMA mode bit set 2273 * in compatibility mode. If not, it will interrupt 2274 * for each character received. 2275 */ 2276 if (com->esp) 2277 com->fifo_image |= FIFO_DMA_MODE; 2278#endif 2279 sio_setreg(com, com_fifo, com->fifo_image); 2280 } 2281 2282 /* 2283 * This returns with interrupts disabled so that we can complete 2284 * the speed change atomically. Keeping interrupts disabled is 2285 * especially important while com_data is hidden. 2286 */ 2287 (void) siosetwater(com, t->c_ispeed); 2288 2289 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 2290 /* 2291 * Only set the divisor registers if they would change, since on 2292 * some 16550 incompatibles (UMC8669F), setting them while input 2293 * is arriving loses sync until data stops arriving. 2294 */ 2295 dlbl = divisor & 0xFF; 2296 if (sio_getreg(com, com_dlbl) != dlbl) 2297 sio_setreg(com, com_dlbl, dlbl); 2298 dlbh = divisor >> 8; 2299 if (sio_getreg(com, com_dlbh) != dlbh) 2300 sio_setreg(com, com_dlbh, dlbh); 2301 2302 efr_flowbits = 0; 2303 2304 if (cflag & CRTS_IFLOW) { 2305 com->state |= CS_RTS_IFLOW; 2306 efr_flowbits |= EFR_AUTORTS; 2307 /* 2308 * If CS_RTS_IFLOW just changed from off to on, the change 2309 * needs to be propagated to MCR_RTS. This isn't urgent, 2310 * so do it later by calling comstart() instead of repeating 2311 * a lot of code from comstart() here. 2312 */ 2313 } else if (com->state & CS_RTS_IFLOW) { 2314 com->state &= ~CS_RTS_IFLOW; 2315 /* 2316 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 2317 * on here, since comstart() won't do it later. 2318 */ 2319 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2320 } 2321 2322 /* 2323 * Set up state to handle output flow control. 2324 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 2325 * Now has 10+ msec latency, while CTS flow has 50- usec latency. 2326 */ 2327 com->state |= CS_ODEVREADY; 2328 com->state &= ~CS_CTS_OFLOW; 2329 if (cflag & CCTS_OFLOW) { 2330 com->state |= CS_CTS_OFLOW; 2331 efr_flowbits |= EFR_AUTOCTS; 2332 if (!(com->last_modem_status & MSR_CTS)) 2333 com->state &= ~CS_ODEVREADY; 2334 } 2335 2336 if (com->st16650a) { 2337 sio_setreg(com, com_lcr, LCR_EFR_ENABLE); 2338 sio_setreg(com, com_efr, 2339 (sio_getreg(com, com_efr) 2340 & ~(EFR_AUTOCTS | EFR_AUTORTS)) | efr_flowbits); 2341 } 2342 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 2343 2344 /* XXX shouldn't call functions while intrs are disabled. */ 2345 ttyldoptim(tp); 2346 2347 mtx_unlock_spin(&sio_lock); 2348 splx(s); 2349 comstart(tp); 2350 if (com->ibufold != NULL) { 2351 free(com->ibufold, M_DEVBUF); 2352 com->ibufold = NULL; 2353 } 2354 return (0); 2355} 2356 2357/* 2358 * This function must be called with the sio_lock mutex released and will 2359 * return with it obtained. 2360 */ 2361static int 2362siosetwater(com, speed) 2363 struct com_s *com; 2364 speed_t speed; 2365{ 2366 int cp4ticks; 2367 u_char *ibuf; 2368 int ibufsize; 2369 struct tty *tp; 2370 2371 /* 2372 * Make the buffer size large enough to handle a softtty interrupt 2373 * latency of about 2 ticks without loss of throughput or data 2374 * (about 3 ticks if input flow control is not used or not honoured, 2375 * but a bit less for CS5-CS7 modes). 2376 */ 2377 cp4ticks = speed / 10 / hz * 4; 2378 for (ibufsize = 128; ibufsize < cp4ticks;) 2379 ibufsize <<= 1; 2380 if (ibufsize == com->ibufsize) { 2381 mtx_lock_spin(&sio_lock); 2382 return (0); 2383 } 2384 2385 /* 2386 * Allocate input buffer. The extra factor of 2 in the size is 2387 * to allow for an error byte for each input byte. 2388 */ 2389 ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 2390 if (ibuf == NULL) { 2391 mtx_lock_spin(&sio_lock); 2392 return (ENOMEM); 2393 } 2394 2395 /* Initialize non-critical variables. */ 2396 com->ibufold = com->ibuf; 2397 com->ibufsize = ibufsize; 2398 tp = com->tp; 2399 if (tp != NULL) { 2400 tp->t_ififosize = 2 * ibufsize; 2401 tp->t_ispeedwat = (speed_t)-1; 2402 tp->t_ospeedwat = (speed_t)-1; 2403 } 2404 2405 /* 2406 * Read current input buffer, if any. Continue with interrupts 2407 * disabled. 2408 */ 2409 mtx_lock_spin(&sio_lock); 2410 if (com->iptr != com->ibuf) 2411 sioinput(com); 2412 2413 /*- 2414 * Initialize critical variables, including input buffer watermarks. 2415 * The external device is asked to stop sending when the buffer 2416 * exactly reaches high water, or when the high level requests it. 2417 * The high level is notified immediately (rather than at a later 2418 * clock tick) when this watermark is reached. 2419 * The buffer size is chosen so the watermark should almost never 2420 * be reached. 2421 * The low watermark is invisibly 0 since the buffer is always 2422 * emptied all at once. 2423 */ 2424 com->iptr = com->ibuf = ibuf; 2425 com->ibufend = ibuf + ibufsize; 2426 com->ierroff = ibufsize; 2427 com->ihighwater = ibuf + 3 * ibufsize / 4; 2428 return (0); 2429} 2430 2431static void 2432comstart(tp) 2433 struct tty *tp; 2434{ 2435 struct com_s *com; 2436 int s; 2437 2438 com = tp->t_sc; 2439 if (com == NULL) 2440 return; 2441 s = spltty(); 2442 mtx_lock_spin(&sio_lock); 2443 if (tp->t_state & TS_TTSTOP) 2444 com->state &= ~CS_TTGO; 2445 else 2446 com->state |= CS_TTGO; 2447 if (tp->t_state & TS_TBLOCK) { 2448 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 2449 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 2450 } else { 2451 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 2452 && com->state & CS_RTS_IFLOW) 2453 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2454 } 2455 mtx_unlock_spin(&sio_lock); 2456 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 2457 ttwwakeup(tp); 2458 splx(s); 2459 return; 2460 } 2461 if (tp->t_outq.c_cc != 0) { 2462 struct lbq *qp; 2463 struct lbq *next; 2464 2465 if (!com->obufs[0].l_queued) { 2466 com->obufs[0].l_tail 2467 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 2468 sizeof com->obuf1); 2469 com->obufs[0].l_next = NULL; 2470 com->obufs[0].l_queued = TRUE; 2471 mtx_lock_spin(&sio_lock); 2472 if (com->state & CS_BUSY) { 2473 qp = com->obufq.l_next; 2474 while ((next = qp->l_next) != NULL) 2475 qp = next; 2476 qp->l_next = &com->obufs[0]; 2477 } else { 2478 com->obufq.l_head = com->obufs[0].l_head; 2479 com->obufq.l_tail = com->obufs[0].l_tail; 2480 com->obufq.l_next = &com->obufs[0]; 2481 com->state |= CS_BUSY; 2482 } 2483 mtx_unlock_spin(&sio_lock); 2484 } 2485 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 2486 com->obufs[1].l_tail 2487 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 2488 sizeof com->obuf2); 2489 com->obufs[1].l_next = NULL; 2490 com->obufs[1].l_queued = TRUE; 2491 mtx_lock_spin(&sio_lock); 2492 if (com->state & CS_BUSY) { 2493 qp = com->obufq.l_next; 2494 while ((next = qp->l_next) != NULL) 2495 qp = next; 2496 qp->l_next = &com->obufs[1]; 2497 } else { 2498 com->obufq.l_head = com->obufs[1].l_head; 2499 com->obufq.l_tail = com->obufs[1].l_tail; 2500 com->obufq.l_next = &com->obufs[1]; 2501 com->state |= CS_BUSY; 2502 } 2503 mtx_unlock_spin(&sio_lock); 2504 } 2505 tp->t_state |= TS_BUSY; 2506 } 2507 mtx_lock_spin(&sio_lock); 2508 if (com->state >= (CS_BUSY | CS_TTGO)) 2509 siointr1(com); /* fake interrupt to start output */ 2510 mtx_unlock_spin(&sio_lock); 2511 ttwwakeup(tp); 2512 splx(s); 2513} 2514 2515static void 2516comstop(tp, rw) 2517 struct tty *tp; 2518 int rw; 2519{ 2520 struct com_s *com; 2521 2522 com = tp->t_sc; 2523 if (com == NULL || com->gone) 2524 return; 2525 mtx_lock_spin(&sio_lock); 2526 if (rw & FWRITE) { 2527 if (com->hasfifo) 2528#ifdef COM_ESP 2529 /* XXX avoid h/w bug. */ 2530 if (!com->esp) 2531#endif 2532 sio_setreg(com, com_fifo, 2533 FIFO_XMT_RST | com->fifo_image); 2534 com->obufs[0].l_queued = FALSE; 2535 com->obufs[1].l_queued = FALSE; 2536 if (com->state & CS_ODONE) 2537 com_events -= LOTS_OF_EVENTS; 2538 com->state &= ~(CS_ODONE | CS_BUSY); 2539 com->tp->t_state &= ~TS_BUSY; 2540 } 2541 if (rw & FREAD) { 2542 if (com->hasfifo) 2543#ifdef COM_ESP 2544 /* XXX avoid h/w bug. */ 2545 if (!com->esp) 2546#endif 2547 sio_setreg(com, com_fifo, 2548 FIFO_RCV_RST | com->fifo_image); 2549 com_events -= (com->iptr - com->ibuf); 2550 com->iptr = com->ibuf; 2551 } 2552 mtx_unlock_spin(&sio_lock); 2553 comstart(tp); 2554} 2555 2556static int 2557commodem(tp, sigon, sigoff) 2558 struct tty *tp; 2559 int sigon, sigoff; 2560{ 2561 struct com_s *com; 2562 int bitand, bitor, msr; 2563 2564 com = tp->t_sc; 2565 if (com->gone) 2566 return(0); 2567 if (sigon != 0 || sigoff != 0) { 2568 bitand = bitor = 0; 2569 if (sigoff & SER_DTR) 2570 bitand |= MCR_DTR; 2571 if (sigoff & SER_RTS) 2572 bitand |= MCR_RTS; 2573 if (sigon & SER_DTR) 2574 bitor |= MCR_DTR; 2575 if (sigon & SER_RTS) 2576 bitor |= MCR_RTS; 2577 bitand = ~bitand; 2578 mtx_lock_spin(&sio_lock); 2579 com->mcr_image &= bitand; 2580 com->mcr_image |= bitor; 2581 outb(com->modem_ctl_port, com->mcr_image); 2582 mtx_unlock_spin(&sio_lock); 2583 return (0); 2584 } else { 2585 bitor = 0; 2586 if (com->mcr_image & MCR_DTR) 2587 bitor |= SER_DTR; 2588 if (com->mcr_image & MCR_RTS) 2589 bitor |= SER_RTS; 2590 msr = com->prev_modem_status; 2591 if (msr & MSR_CTS) 2592 bitor |= SER_CTS; 2593 if (msr & MSR_DCD) 2594 bitor |= SER_DCD; 2595 if (msr & MSR_DSR) 2596 bitor |= SER_DSR; 2597 if (msr & MSR_DSR) 2598 bitor |= SER_DSR; 2599 if (msr & (MSR_RI | MSR_TERI)) 2600 bitor |= SER_RI; 2601 return (bitor); 2602 } 2603} 2604 2605static void 2606siosettimeout() 2607{ 2608 struct com_s *com; 2609 bool_t someopen; 2610 int unit; 2611 2612 /* 2613 * Set our timeout period to 1 second if no polled devices are open. 2614 * Otherwise set it to max(1/200, 1/hz). 2615 * Enable timeouts iff some device is open. 2616 */ 2617 untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 2618 sio_timeout = hz; 2619 someopen = FALSE; 2620 for (unit = 0; unit < sio_numunits; ++unit) { 2621 com = com_addr(unit); 2622 if (com != NULL && com->tp != NULL 2623 && com->tp->t_state & TS_ISOPEN && !com->gone) { 2624 someopen = TRUE; 2625 if (com->poll || com->poll_output) { 2626 sio_timeout = hz > 200 ? hz / 200 : 1; 2627 break; 2628 } 2629 } 2630 } 2631 if (someopen) { 2632 sio_timeouts_until_log = hz / sio_timeout; 2633 sio_timeout_handle = timeout(comwakeup, (void *)NULL, 2634 sio_timeout); 2635 } else { 2636 /* Flush error messages, if any. */ 2637 sio_timeouts_until_log = 1; 2638 comwakeup((void *)NULL); 2639 untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 2640 } 2641} 2642 2643static void 2644comwakeup(chan) 2645 void *chan; 2646{ 2647 struct com_s *com; 2648 int unit; 2649 2650 sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 2651 2652 /* 2653 * Recover from lost output interrupts. 2654 * Poll any lines that don't use interrupts. 2655 */ 2656 for (unit = 0; unit < sio_numunits; ++unit) { 2657 com = com_addr(unit); 2658 if (com != NULL && !com->gone 2659 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 2660 mtx_lock_spin(&sio_lock); 2661 siointr1(com); 2662 mtx_unlock_spin(&sio_lock); 2663 } 2664 } 2665 2666 /* 2667 * Check for and log errors, but not too often. 2668 */ 2669 if (--sio_timeouts_until_log > 0) 2670 return; 2671 sio_timeouts_until_log = hz / sio_timeout; 2672 for (unit = 0; unit < sio_numunits; ++unit) { 2673 int errnum; 2674 2675 com = com_addr(unit); 2676 if (com == NULL) 2677 continue; 2678 if (com->gone) 2679 continue; 2680 for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 2681 u_int delta; 2682 u_long total; 2683 2684 mtx_lock_spin(&sio_lock); 2685 delta = com->delta_error_counts[errnum]; 2686 com->delta_error_counts[errnum] = 0; 2687 mtx_unlock_spin(&sio_lock); 2688 if (delta == 0) 2689 continue; 2690 total = com->error_counts[errnum] += delta; 2691 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 2692 unit, delta, error_desc[errnum], 2693 delta == 1 ? "" : "s", total); 2694 } 2695 } 2696} 2697 2698/* 2699 * Following are all routines needed for SIO to act as console 2700 */ 2701struct siocnstate { 2702 u_char dlbl; 2703 u_char dlbh; 2704 u_char ier; 2705 u_char cfcr; 2706 u_char mcr; 2707}; 2708 2709/* 2710 * This is a function in order to not replicate "ttyd%d" more 2711 * places than absolutely necessary. 2712 */ 2713static void 2714siocnset(struct consdev *cd, int unit) 2715{ 2716 2717 cd->cn_unit = unit; 2718 sprintf(cd->cn_name, "ttyd%d", unit); 2719} 2720 2721static speed_t siocngetspeed(Port_t, u_long rclk); 2722static void siocnclose(struct siocnstate *sp, Port_t iobase); 2723static void siocnopen(struct siocnstate *sp, Port_t iobase, int speed); 2724static void siocntxwait(Port_t iobase); 2725 2726static cn_probe_t siocnprobe; 2727static cn_init_t siocninit; 2728static cn_term_t siocnterm; 2729static cn_checkc_t siocncheckc; 2730static cn_getc_t siocngetc; 2731static cn_putc_t siocnputc; 2732 2733CONS_DRIVER(sio, siocnprobe, siocninit, siocnterm, siocngetc, siocncheckc, 2734 siocnputc, NULL); 2735 2736static void 2737siocntxwait(iobase) 2738 Port_t iobase; 2739{ 2740 int timo; 2741 2742 /* 2743 * Wait for any pending transmission to finish. Required to avoid 2744 * the UART lockup bug when the speed is changed, and for normal 2745 * transmits. 2746 */ 2747 timo = 100000; 2748 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 2749 != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 2750 ; 2751} 2752 2753/* 2754 * Read the serial port specified and try to figure out what speed 2755 * it's currently running at. We're assuming the serial port has 2756 * been initialized and is basicly idle. This routine is only intended 2757 * to be run at system startup. 2758 * 2759 * If the value read from the serial port doesn't make sense, return 0. 2760 */ 2761 2762static speed_t 2763siocngetspeed(iobase, rclk) 2764 Port_t iobase; 2765 u_long rclk; 2766{ 2767 u_int divisor; 2768 u_char dlbh; 2769 u_char dlbl; 2770 u_char cfcr; 2771 2772 cfcr = inb(iobase + com_cfcr); 2773 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2774 2775 dlbl = inb(iobase + com_dlbl); 2776 dlbh = inb(iobase + com_dlbh); 2777 2778 outb(iobase + com_cfcr, cfcr); 2779 2780 divisor = dlbh << 8 | dlbl; 2781 2782 /* XXX there should be more sanity checking. */ 2783 if (divisor == 0) 2784 return (CONSPEED); 2785 return (rclk / (16UL * divisor)); 2786} 2787 2788static void 2789siocnopen(sp, iobase, speed) 2790 struct siocnstate *sp; 2791 Port_t iobase; 2792 int speed; 2793{ 2794 u_int divisor; 2795 u_char dlbh; 2796 u_char dlbl; 2797 2798 /* 2799 * Save all the device control registers except the fifo register 2800 * and set our default ones (cs8 -parenb speed=comdefaultrate). 2801 * We can't save the fifo register since it is read-only. 2802 */ 2803 sp->ier = inb(iobase + com_ier); 2804 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 2805 siocntxwait(iobase); 2806 sp->cfcr = inb(iobase + com_cfcr); 2807 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2808 sp->dlbl = inb(iobase + com_dlbl); 2809 sp->dlbh = inb(iobase + com_dlbh); 2810 /* 2811 * Only set the divisor registers if they would change, since on 2812 * some 16550 incompatibles (Startech), setting them clears the 2813 * data input register. This also reduces the effects of the 2814 * UMC8669F bug. 2815 */ 2816 divisor = siodivisor(comdefaultrclk, speed); 2817 dlbl = divisor & 0xFF; 2818 if (sp->dlbl != dlbl) 2819 outb(iobase + com_dlbl, dlbl); 2820 dlbh = divisor >> 8; 2821 if (sp->dlbh != dlbh) 2822 outb(iobase + com_dlbh, dlbh); 2823 outb(iobase + com_cfcr, CFCR_8BITS); 2824 sp->mcr = inb(iobase + com_mcr); 2825 /* 2826 * We don't want interrupts, but must be careful not to "disable" 2827 * them by clearing the MCR_IENABLE bit, since that might cause 2828 * an interrupt by floating the IRQ line. 2829 */ 2830 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 2831} 2832 2833static void 2834siocnclose(sp, iobase) 2835 struct siocnstate *sp; 2836 Port_t iobase; 2837{ 2838 /* 2839 * Restore the device control registers. 2840 */ 2841 siocntxwait(iobase); 2842 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2843 if (sp->dlbl != inb(iobase + com_dlbl)) 2844 outb(iobase + com_dlbl, sp->dlbl); 2845 if (sp->dlbh != inb(iobase + com_dlbh)) 2846 outb(iobase + com_dlbh, sp->dlbh); 2847 outb(iobase + com_cfcr, sp->cfcr); 2848 /* 2849 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 2850 */ 2851 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 2852 outb(iobase + com_ier, sp->ier); 2853} 2854 2855static void 2856siocnprobe(cp) 2857 struct consdev *cp; 2858{ 2859 speed_t boot_speed; 2860 u_char cfcr; 2861 u_int divisor; 2862 int s, unit; 2863 struct siocnstate sp; 2864 2865 /* 2866 * Find our first enabled console, if any. If it is a high-level 2867 * console device, then initialize it and return successfully. 2868 * If it is a low-level console device, then initialize it and 2869 * return unsuccessfully. It must be initialized in both cases 2870 * for early use by console drivers and debuggers. Initializing 2871 * the hardware is not necessary in all cases, since the i/o 2872 * routines initialize it on the fly, but it is necessary if 2873 * input might arrive while the hardware is switched back to an 2874 * uninitialized state. We can't handle multiple console devices 2875 * yet because our low-level routines don't take a device arg. 2876 * We trust the user to set the console flags properly so that we 2877 * don't need to probe. 2878 */ 2879 cp->cn_pri = CN_DEAD; 2880 2881 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 2882 int flags; 2883 2884 if (resource_disabled("sio", unit)) 2885 continue; 2886 if (resource_int_value("sio", unit, "flags", &flags)) 2887 continue; 2888 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 2889 int port; 2890 Port_t iobase; 2891 2892 if (resource_int_value("sio", unit, "port", &port)) 2893 continue; 2894 iobase = port; 2895 s = spltty(); 2896 if (boothowto & RB_SERIAL) { 2897 boot_speed = 2898 siocngetspeed(iobase, comdefaultrclk); 2899 if (boot_speed) 2900 comdefaultrate = boot_speed; 2901 } 2902 2903 /* 2904 * Initialize the divisor latch. We can't rely on 2905 * siocnopen() to do this the first time, since it 2906 * avoids writing to the latch if the latch appears 2907 * to have the correct value. Also, if we didn't 2908 * just read the speed from the hardware, then we 2909 * need to set the speed in hardware so that 2910 * switching it later is null. 2911 */ 2912 cfcr = inb(iobase + com_cfcr); 2913 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2914 divisor = siodivisor(comdefaultrclk, comdefaultrate); 2915 outb(iobase + com_dlbl, divisor & 0xff); 2916 outb(iobase + com_dlbh, divisor >> 8); 2917 outb(iobase + com_cfcr, cfcr); 2918 2919 siocnopen(&sp, iobase, comdefaultrate); 2920 2921 splx(s); 2922 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 2923 siocnset(cp, unit); 2924 cp->cn_pri = COM_FORCECONSOLE(flags) 2925 || boothowto & RB_SERIAL 2926 ? CN_REMOTE : CN_NORMAL; 2927 siocniobase = iobase; 2928 siocnunit = unit; 2929 } 2930#ifdef GDB 2931 if (COM_DEBUGGER(flags)) 2932 siogdbiobase = iobase; 2933#endif 2934 } 2935 } 2936} 2937 2938static void 2939siocninit(cp) 2940 struct consdev *cp; 2941{ 2942 comconsole = cp->cn_unit; 2943} 2944 2945static void 2946siocnterm(cp) 2947 struct consdev *cp; 2948{ 2949 comconsole = -1; 2950} 2951 2952static int 2953siocncheckc(struct consdev *cd) 2954{ 2955 int c; 2956 Port_t iobase; 2957 int s; 2958 struct siocnstate sp; 2959 speed_t speed; 2960 2961 if (cd != NULL && cd->cn_unit == siocnunit) { 2962 iobase = siocniobase; 2963 speed = comdefaultrate; 2964 } else { 2965#ifdef GDB 2966 iobase = siogdbiobase; 2967 speed = gdbdefaultrate; 2968#else 2969 return (-1); 2970#endif 2971 } 2972 s = spltty(); 2973 siocnopen(&sp, iobase, speed); 2974 if (inb(iobase + com_lsr) & LSR_RXRDY) 2975 c = inb(iobase + com_data); 2976 else 2977 c = -1; 2978 siocnclose(&sp, iobase); 2979 splx(s); 2980 return (c); 2981} 2982 2983static int 2984siocngetc(struct consdev *cd) 2985{ 2986 int c; 2987 Port_t iobase; 2988 int s; 2989 struct siocnstate sp; 2990 speed_t speed; 2991 2992 if (cd != NULL && cd->cn_unit == siocnunit) { 2993 iobase = siocniobase; 2994 speed = comdefaultrate; 2995 } else { 2996#ifdef GDB 2997 iobase = siogdbiobase; 2998 speed = gdbdefaultrate; 2999#else 3000 return (-1); 3001#endif 3002 } 3003 s = spltty(); 3004 siocnopen(&sp, iobase, speed); 3005 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3006 ; 3007 c = inb(iobase + com_data); 3008 siocnclose(&sp, iobase); 3009 splx(s); 3010 return (c); 3011} 3012 3013static void 3014siocnputc(struct consdev *cd, int c) 3015{ 3016 int need_unlock; 3017 int s; 3018 struct siocnstate sp; 3019 Port_t iobase; 3020 speed_t speed; 3021 3022 if (cd != NULL && cd->cn_unit == siocnunit) { 3023 iobase = siocniobase; 3024 speed = comdefaultrate; 3025 } else { 3026#ifdef GDB 3027 iobase = siogdbiobase; 3028 speed = gdbdefaultrate; 3029#else 3030 return; 3031#endif 3032 } 3033 s = spltty(); 3034 need_unlock = 0; 3035 if (sio_inited == 2 && !mtx_owned(&sio_lock)) { 3036 mtx_lock_spin(&sio_lock); 3037 need_unlock = 1; 3038 } 3039 siocnopen(&sp, iobase, speed); 3040 siocntxwait(iobase); 3041 outb(iobase + com_data, c); 3042 siocnclose(&sp, iobase); 3043 if (need_unlock) 3044 mtx_unlock_spin(&sio_lock); 3045 splx(s); 3046} 3047 3048/* 3049 * Remote gdb(1) support. 3050 */ 3051 3052#if defined(GDB) 3053 3054#include <gdb/gdb.h> 3055 3056static gdb_probe_f siogdbprobe; 3057static gdb_init_f siogdbinit; 3058static gdb_term_f siogdbterm; 3059static gdb_getc_f siogdbgetc; 3060static gdb_checkc_f siogdbcheckc; 3061static gdb_putc_f siogdbputc; 3062 3063GDB_DBGPORT(sio, siogdbprobe, siogdbinit, siogdbterm, siogdbcheckc, 3064 siogdbgetc, siogdbputc); 3065 3066static int 3067siogdbprobe(void) 3068{ 3069 return ((siogdbiobase != 0) ? 0 : -1); 3070} 3071 3072static void 3073siogdbinit(void) 3074{ 3075} 3076 3077static void 3078siogdbterm(void) 3079{ 3080} 3081 3082static void 3083siogdbputc(int c) 3084{ 3085 siocnputc(NULL, c); 3086} 3087 3088static int 3089siogdbcheckc(void) 3090{ 3091 return (siocncheckc(NULL)); 3092} 3093 3094static int 3095siogdbgetc(void) 3096{ 3097 return (siocngetc(NULL)); 3098} 3099 3100#endif 3101