sio.c revision 135329
1169691Skan/*-
2169691Skan * Copyright (c) 1991 The Regents of the University of California.
3169691Skan * All rights reserved.
4169691Skan *
5169691Skan * Redistribution and use in source and binary forms, with or without
6169691Skan * modification, are permitted provided that the following conditions
7169691Skan * are met:
8169691Skan * 1. Redistributions of source code must retain the above copyright
9169691Skan *    notice, this list of conditions and the following disclaimer.
10169691Skan * 2. Redistributions in binary form must reproduce the above copyright
11169691Skan *    notice, this list of conditions and the following disclaimer in the
12169691Skan *    documentation and/or other materials provided with the distribution.
13169691Skan * 4. Neither the name of the University nor the names of its contributors
14169691Skan *    may be used to endorse or promote products derived from this software
15169691Skan *    without specific prior written permission.
16169691Skan *
17169691Skan * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
18169691Skan * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19169691Skan * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20169691Skan * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
21169691Skan * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22169691Skan * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23169691Skan * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24169691Skan * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25169691Skan * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26169691Skan * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27169691Skan * SUCH DAMAGE.
28169691Skan *
29169691Skan *	from: @(#)com.c	7.5 (Berkeley) 5/16/91
30169691Skan *	from: i386/isa sio.c,v 1.234
31169691Skan */
32169691Skan
33169691Skan#include <sys/cdefs.h>
34169691Skan__FBSDID("$FreeBSD: head/sys/dev/sio/sio.c 135329 2004-09-16 19:46:23Z phk $");
35169691Skan
36169691Skan#include "opt_comconsole.h"
37169691Skan#include "opt_compat.h"
38169691Skan#include "opt_gdb.h"
39169691Skan#include "opt_kdb.h"
40169691Skan#include "opt_sio.h"
41169691Skan
42169691Skan/*
43169691Skan * Serial driver, based on 386BSD-0.1 com driver.
44169691Skan * Mostly rewritten to use pseudo-DMA.
45169691Skan * Works for National Semiconductor NS8250-NS16550AF UARTs.
46169691Skan * COM driver, based on HP dca driver.
47169691Skan *
48169691Skan * Changes for PC-Card integration:
49169691Skan *	- Added PC-Card driver table and handlers
50169691Skan */
51169691Skan#include <sys/param.h>
52169691Skan#include <sys/systm.h>
53169691Skan#include <sys/bus.h>
54169691Skan#include <sys/conf.h>
55169691Skan#include <sys/fcntl.h>
56169691Skan#include <sys/interrupt.h>
57169691Skan#include <sys/kdb.h>
58169691Skan#include <sys/kernel.h>
59169691Skan#include <sys/limits.h>
60169691Skan#include <sys/lock.h>
61169691Skan#include <sys/malloc.h>
62169691Skan#include <sys/module.h>
63169691Skan#include <sys/mutex.h>
64169691Skan#include <sys/proc.h>
65169691Skan#include <sys/reboot.h>
66169691Skan#include <sys/serial.h>
67169691Skan#include <sys/sysctl.h>
68169691Skan#include <sys/syslog.h>
69169691Skan#include <sys/tty.h>
70169691Skan#include <machine/bus_pio.h>
71169691Skan#include <machine/bus.h>
72169691Skan#include <sys/rman.h>
73169691Skan#include <sys/timepps.h>
74169691Skan#include <sys/uio.h>
75169691Skan#include <sys/cons.h>
76169691Skan
77169691Skan#include <isa/isavar.h>
78169691Skan
79169691Skan#include <machine/resource.h>
80169691Skan
81169691Skan#include <dev/sio/sioreg.h>
82169691Skan#include <dev/sio/siovar.h>
83169691Skan
84169691Skan#ifdef COM_ESP
85169691Skan#include <dev/ic/esp.h>
86169691Skan#endif
87169691Skan#include <dev/ic/ns16550.h>
88169691Skan
89169691Skan#define	LOTS_OF_EVENTS	64	/* helps separate urgent events from input */
90169691Skan
91169691Skan#define	CALLOUT_MASK		0x80
92169691Skan#define	CONTROL_MASK		0x60
93169691Skan#define	CONTROL_INIT_STATE	0x20
94169691Skan#define	CONTROL_LOCK_STATE	0x40
95169691Skan#define	DEV_TO_UNIT(dev)	(MINOR_TO_UNIT(minor(dev)))
96169691Skan#define	MINOR_TO_UNIT(mynor)	((((mynor) & ~0xffffU) >> (8 + 3)) \
97169691Skan				 | ((mynor) & 0x1f))
98169691Skan#define	UNIT_TO_MINOR(unit)	((((unit) & ~0x1fU) << (8 + 3)) \
99169691Skan				 | ((unit) & 0x1f))
100169691Skan
101169691Skan#ifdef COM_MULTIPORT
102169691Skan/* checks in flags for multiport and which is multiport "master chip"
103169691Skan * for a given card
104169691Skan */
105169691Skan#define	COM_ISMULTIPORT(flags)	((flags) & 0x01)
106169691Skan#define	COM_MPMASTER(flags)	(((flags) >> 8) & 0x0ff)
107169691Skan#define	COM_NOTAST4(flags)	((flags) & 0x04)
108169691Skan#else
109169691Skan#define	COM_ISMULTIPORT(flags)	(0)
110169691Skan#endif /* COM_MULTIPORT */
111169691Skan
112169691Skan#define	COM_C_IIR_TXRDYBUG	0x80000
113169691Skan#define	COM_CONSOLE(flags)	((flags) & 0x10)
114169691Skan#define	COM_DEBUGGER(flags)	((flags) & 0x80)
115169691Skan#define	COM_FIFOSIZE(flags)	(((flags) & 0xff000000) >> 24)
116169691Skan#define	COM_FORCECONSOLE(flags)	((flags) & 0x20)
117169691Skan#define	COM_IIR_TXRDYBUG(flags)	((flags) & COM_C_IIR_TXRDYBUG)
118169691Skan#define	COM_LLCONSOLE(flags)	((flags) & 0x40)
119169691Skan#define	COM_LOSESOUTINTS(flags)	((flags) & 0x08)
120169691Skan#define	COM_NOFIFO(flags)	((flags) & 0x02)
121169691Skan#define	COM_NOPROBE(flags)	((flags) & 0x40000)
122169691Skan#define	COM_NOSCR(flags)	((flags) & 0x100000)
123169691Skan#define	COM_PPSCTS(flags)	((flags) & 0x10000)
124169691Skan#define	COM_ST16650A(flags)	((flags) & 0x20000)
125169691Skan#define	COM_TI16754(flags)	((flags) & 0x200000)
126169691Skan
127169691Skan#define	sio_getreg(com, off) \
128169691Skan	(bus_space_read_1((com)->bst, (com)->bsh, (off)))
129169691Skan#define	sio_setreg(com, off, value) \
130169691Skan	(bus_space_write_1((com)->bst, (com)->bsh, (off), (value)))
131169691Skan
132169691Skan/*
133169691Skan * com state bits.
134169691Skan * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
135169691Skan * than the other bits so that they can be tested as a group without masking
136169691Skan * off the low bits.
137169691Skan *
138169691Skan * The following com and tty flags correspond closely:
139169691Skan *	CS_BUSY		= TS_BUSY (maintained by comstart(), siopoll() and
140169691Skan *				   comstop())
141169691Skan *	CS_TTGO		= ~TS_TTSTOP (maintained by comparam() and comstart())
142169691Skan *	CS_CTS_OFLOW	= CCTS_OFLOW (maintained by comparam())
143169691Skan *	CS_RTS_IFLOW	= CRTS_IFLOW (maintained by comparam())
144169691Skan * TS_FLUSH is not used.
145169691Skan * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
146169691Skan * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
147169691Skan */
148169691Skan#define	CS_BUSY		0x80	/* output in progress */
149169691Skan#define	CS_TTGO		0x40	/* output not stopped by XOFF */
150169691Skan#define	CS_ODEVREADY	0x20	/* external device h/w ready (CTS) */
151169691Skan#define	CS_CHECKMSR	1	/* check of MSR scheduled */
152169691Skan#define	CS_CTS_OFLOW	2	/* use CTS output flow control */
153169691Skan#define	CS_ODONE	4	/* output completed */
154169691Skan#define	CS_RTS_IFLOW	8	/* use RTS input flow control */
155169691Skan#define	CSE_BUSYCHECK	1	/* siobusycheck() scheduled */
156169691Skan
157169691Skanstatic	char const * const	error_desc[] = {
158169691Skan#define	CE_OVERRUN			0
159169691Skan	"silo overflow",
160169691Skan#define	CE_INTERRUPT_BUF_OVERFLOW	1
161169691Skan	"interrupt-level buffer overflow",
162169691Skan#define	CE_TTY_BUF_OVERFLOW		2
163169691Skan	"tty-level buffer overflow",
164169691Skan};
165169691Skan
166169691Skan#define	CE_NTYPES			3
167169691Skan#define	CE_RECORD(com, errnum)		(++(com)->delta_error_counts[errnum])
168169691Skan
169169691Skan/* types.  XXX - should be elsewhere */
170169691Skantypedef u_int	Port_t;		/* hardware port */
171169691Skantypedef u_char	bool_t;		/* boolean */
172169691Skan
173169691Skan/* queue of linear buffers */
174169691Skanstruct lbq {
175169691Skan	u_char	*l_head;	/* next char to process */
176169691Skan	u_char	*l_tail;	/* one past the last char to process */
177169691Skan	struct lbq *l_next;	/* next in queue */
178169691Skan	bool_t	l_queued;	/* nonzero if queued */
179169691Skan};
180169691Skan
181169691Skan/* com device structure */
182169691Skanstruct com_s {
183169691Skan	u_char	state;		/* miscellaneous flag bits */
184169691Skan	bool_t  active_out;	/* nonzero if the callout device is open */
185169691Skan	u_char	cfcr_image;	/* copy of value written to CFCR */
186169691Skan#ifdef COM_ESP
187169691Skan	bool_t	esp;		/* is this unit a hayes esp board? */
188169691Skan#endif
189169691Skan	u_char	extra_state;	/* more flag bits, separate for order trick */
190169691Skan	u_char	fifo_image;	/* copy of value written to FIFO */
191169691Skan	bool_t	hasfifo;	/* nonzero for 16550 UARTs */
192169691Skan	bool_t	loses_outints;	/* nonzero if device loses output interrupts */
193169691Skan	u_char	mcr_image;	/* copy of value written to MCR */
194169691Skan#ifdef COM_MULTIPORT
195169691Skan	bool_t	multiport;	/* is this unit part of a multiport device? */
196169691Skan#endif /* COM_MULTIPORT */
197169691Skan	bool_t	no_irq;		/* nonzero if irq is not attached */
198169691Skan	bool_t  gone;		/* hardware disappeared */
199169691Skan	bool_t	poll;		/* nonzero if polling is required */
200169691Skan	bool_t	poll_output;	/* nonzero if polling for output is required */
201169691Skan	bool_t	st16650a;	/* nonzero if Startech 16650A compatible */
202169691Skan	int	unit;		/* unit	number */
203169691Skan	u_int	flags;		/* copy of device flags */
204169691Skan	u_int	tx_fifo_size;
205169691Skan	u_int	wopeners;	/* # processes waiting for DCD in open() */
206169691Skan
207169691Skan	/*
208169691Skan	 * The high level of the driver never reads status registers directly
209169691Skan	 * because there would be too many side effects to handle conveniently.
210169691Skan	 * Instead, it reads copies of the registers stored here by the
211169691Skan	 * interrupt handler.
212169691Skan	 */
213169691Skan	u_char	last_modem_status;	/* last MSR read by intr handler */
214169691Skan	u_char	prev_modem_status;	/* last MSR handled by high level */
215169691Skan
216169691Skan	u_char	*ibuf;		/* start of input buffer */
217169691Skan	u_char	*ibufend;	/* end of input buffer */
218169691Skan	u_char	*ibufold;	/* old input buffer, to be freed */
219169691Skan	u_char	*ihighwater;	/* threshold in input buffer */
220169691Skan	u_char	*iptr;		/* next free spot in input buffer */
221169691Skan	int	ibufsize;	/* size of ibuf (not include error bytes) */
222169691Skan	int	ierroff;	/* offset of error bytes in ibuf */
223169691Skan
224169691Skan	struct lbq	obufq;	/* head of queue of output buffers */
225169691Skan	struct lbq	obufs[2];	/* output buffers */
226169691Skan
227169691Skan	bus_space_tag_t		bst;
228169691Skan	bus_space_handle_t	bsh;
229169691Skan
230169691Skan	Port_t	data_port;	/* i/o ports */
231169691Skan#ifdef COM_ESP
232169691Skan	Port_t	esp_port;
233169691Skan#endif
234169691Skan	Port_t	int_ctl_port;
235169691Skan	Port_t	int_id_port;
236169691Skan	Port_t	modem_ctl_port;
237169691Skan	Port_t	line_status_port;
238169691Skan	Port_t	modem_status_port;
239169691Skan
240169691Skan	struct tty	*tp;	/* cross reference */
241169691Skan
242169691Skan	bool_t	do_timestamp;
243169691Skan	struct timeval	timestamp;
244169691Skan	struct	pps_state pps;
245169691Skan	int	pps_bit;
246169691Skan#ifdef ALT_BREAK_TO_DEBUGGER
247169691Skan	int	alt_brk_state;
248169691Skan#endif
249169691Skan
250169691Skan	u_long	bytes_in;	/* statistics */
251169691Skan	u_long	bytes_out;
252169691Skan	u_int	delta_error_counts[CE_NTYPES];
253169691Skan	u_long	error_counts[CE_NTYPES];
254169691Skan
255169691Skan	u_long	rclk;
256169691Skan
257169691Skan	struct resource *irqres;
258169691Skan	struct resource *ioportres;
259169691Skan	int	ioportrid;
260169691Skan	void	*cookie;
261169691Skan	struct cdev *devs[6];
262169691Skan
263169691Skan	/*
264169691Skan	 * Data area for output buffers.  Someday we should build the output
265169691Skan	 * buffer queue without copying data.
266169691Skan	 */
267169691Skan	u_char	obuf1[256];
268169691Skan	u_char	obuf2[256];
269169691Skan};
270169691Skan
271169691Skan#ifdef COM_ESP
272169691Skanstatic	int	espattach(struct com_s *com, Port_t esp_port);
273169691Skan#endif
274169691Skan
275169691Skanstatic	void	combreak(struct tty *tp, int sig);
276169691Skanstatic	timeout_t siobusycheck;
277169691Skanstatic	u_int	siodivisor(u_long rclk, speed_t speed);
278169691Skanstatic	void	comhardclose(struct com_s *com);
279169691Skanstatic	void	sioinput(struct com_s *com);
280169691Skanstatic	void	siointr1(struct com_s *com);
281169691Skanstatic	void	siointr(void *arg);
282169691Skanstatic	int	commodem(struct tty *tp, int sigon, int sigoff);
283169691Skanstatic	int	comparam(struct tty *tp, struct termios *t);
284169691Skanstatic	void	siopoll(void *);
285169691Skanstatic	void	siosettimeout(void);
286169691Skanstatic	int	siosetwater(struct com_s *com, speed_t speed);
287169691Skanstatic	void	comstart(struct tty *tp);
288169691Skanstatic	void	comstop(struct tty *tp, int rw);
289169691Skanstatic	timeout_t comwakeup;
290169691Skan
291169691Skanchar		sio_driver_name[] = "sio";
292169691Skanstatic struct	mtx sio_lock;
293169691Skanstatic int	sio_inited;
294169691Skan
295169691Skan/* table and macro for fast conversion from a unit number to its com struct */
296169691Skandevclass_t	sio_devclass;
297169691Skan#define	com_addr(unit)	((struct com_s *) \
298169691Skan			 devclass_get_softc(sio_devclass, unit)) /* XXX */
299169691Skan
300169691Skanstatic	d_open_t	sioopen;
301169691Skanstatic	d_close_t	sioclose;
302169691Skanstatic	d_read_t	sioread;
303169691Skanstatic	d_write_t	siowrite;
304169691Skanstatic	d_ioctl_t	sioioctl;
305169691Skan
306169691Skanstatic struct cdevsw sio_cdevsw = {
307169691Skan	.d_version =	D_VERSION,
308169691Skan	.d_open =	sioopen,
309169691Skan	.d_close =	sioclose,
310169691Skan	.d_read =	sioread,
311169691Skan	.d_write =	siowrite,
312169691Skan	.d_ioctl =	sioioctl,
313169691Skan	.d_name =	sio_driver_name,
314169691Skan	.d_flags =	D_TTY | D_NEEDGIANT,
315169691Skan};
316169691Skan
317169691Skanstatic	d_open_t	siocopen;
318169691Skanstatic	d_close_t	siocclose;
319169691Skanstatic	d_read_t	siocrdwr;
320169691Skanstatic	d_ioctl_t	siocioctl;
321169691Skan
322169691Skanstatic struct cdevsw sioc_cdevsw = {
323169691Skan	.d_version =	D_VERSION,
324169691Skan	.d_open =	siocopen,
325169691Skan	.d_close =	siocclose,
326169691Skan	.d_read =	siocrdwr,
327169691Skan	.d_write =	siocrdwr,
328169691Skan	.d_ioctl =	siocioctl,
329169691Skan	.d_name =	sio_driver_name,
330169691Skan	.d_flags =	D_TTY | D_NEEDGIANT,
331169691Skan};
332169691Skan
333169691Skanint	comconsole = -1;
334169691Skanstatic	volatile speed_t	comdefaultrate = CONSPEED;
335169691Skanstatic	u_long			comdefaultrclk = DEFAULT_RCLK;
336169691SkanSYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, "");
337169691Skanstatic	speed_t			gdbdefaultrate = GDBSPEED;
338169691SkanSYSCTL_UINT(_machdep, OID_AUTO, gdbspeed, CTLFLAG_RW,
339169691Skan	    &gdbdefaultrate, GDBSPEED, "");
340169691Skanstatic	u_int	com_events;	/* input chars + weighted output completions */
341169691Skanstatic	Port_t	siocniobase;
342169691Skanstatic	int	siocnunit = -1;
343169691Skanstatic	void	*sio_slow_ih;
344169691Skanstatic	void	*sio_fast_ih;
345169691Skanstatic	int	sio_timeout;
346169691Skanstatic	int	sio_timeouts_until_log;
347169691Skanstatic	struct	callout_handle sio_timeout_handle
348169691Skan    = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle);
349169691Skanstatic	int	sio_numunits;
350169691Skan
351169691Skan#ifdef GDB
352169691Skanstatic	Port_t	siogdbiobase = 0;
353169691Skan#endif
354169691Skan
355169691Skan#ifdef COM_ESP
356169691Skan/* XXX configure this properly. */
357/* XXX quite broken for new-bus. */
358static	Port_t	likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, };
359static	Port_t	likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 };
360#endif
361
362/*
363 * handle sysctl read/write requests for console speed
364 *
365 * In addition to setting comdefaultrate for I/O through /dev/console,
366 * also set the initial and lock values for the /dev/ttyXX device
367 * if there is one associated with the console.  Finally, if the /dev/tty
368 * device has already been open, change the speed on the open running port
369 * itself.
370 */
371
372static int
373sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS)
374{
375	int error, s;
376	speed_t newspeed;
377	struct com_s *com;
378	struct tty *tp;
379
380	newspeed = comdefaultrate;
381
382	error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req);
383	if (error || !req->newptr)
384		return (error);
385
386	comdefaultrate = newspeed;
387
388	if (comconsole < 0)		/* serial console not selected? */
389		return (0);
390
391	com = com_addr(comconsole);
392	if (com == NULL)
393		return (ENXIO);
394
395	tp = com->tp;
396	/*
397	 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX
398	 * (note, the lock rates really are boolean -- if non-zero, disallow
399	 *  speed changes)
400	 */
401	tp->t_init_in.c_ispeed  = tp->t_init_in.c_ospeed =
402	tp->t_lock_in.c_ispeed  = tp->t_lock_in.c_ospeed =
403	tp->t_init_out.c_ispeed = tp->t_init_out.c_ospeed =
404	tp->t_lock_out.c_ispeed = tp->t_lock_out.c_ospeed = comdefaultrate;
405
406	/*
407	 * if we're open, change the running rate too
408	 */
409	if (tp && (tp->t_state & TS_ISOPEN)) {
410		tp->t_termios.c_ispeed =
411		tp->t_termios.c_ospeed = comdefaultrate;
412		s = spltty();
413		error = comparam(tp, &tp->t_termios);
414		splx(s);
415	}
416	return error;
417}
418
419SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW,
420	    0, 0, sysctl_machdep_comdefaultrate, "I", "");
421/* TUNABLE_INT("machdep.conspeed", &comdefaultrate); */
422
423#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit))
424#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit))
425
426/*
427 *	Unload the driver and clear the table.
428 *	XXX this is mostly wrong.
429 *	XXX TODO:
430 *	This is usually called when the card is ejected, but
431 *	can be caused by a kldunload of a controller driver.
432 *	The idea is to reset the driver's view of the device
433 *	and ensure that any driver entry points such as
434 *	read and write do not hang.
435 */
436int
437siodetach(dev)
438	device_t	dev;
439{
440	struct com_s	*com;
441	int i;
442
443	com = (struct com_s *) device_get_softc(dev);
444	if (com == NULL) {
445		device_printf(dev, "NULL com in siounload\n");
446		return (0);
447	}
448	com->gone = TRUE;
449	if (com->tp)
450		ttygone(com->tp);
451	for (i = 0 ; i < 6; i++)
452		destroy_dev(com->devs[i]);
453	if (com->irqres) {
454		bus_teardown_intr(dev, com->irqres, com->cookie);
455		bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres);
456	}
457	if (com->ioportres)
458		bus_release_resource(dev, SYS_RES_IOPORT, com->ioportrid,
459				     com->ioportres);
460	if (com->tp && (com->tp->t_state & TS_ISOPEN)) {
461		device_printf(dev, "still open, forcing close\n");
462		ttyld_close(com->tp, 0);
463		tty_close(com->tp);
464	} else {
465		if (com->ibuf != NULL)
466			free(com->ibuf, M_DEVBUF);
467		device_set_softc(dev, NULL);
468		free(com, M_DEVBUF);
469	}
470	return (0);
471}
472
473int
474sioprobe(dev, xrid, rclk, noprobe)
475	device_t	dev;
476	int		xrid;
477	u_long		rclk;
478	int		noprobe;
479{
480#if 0
481	static bool_t	already_init;
482	device_t	xdev;
483#endif
484	struct com_s	*com;
485	u_int		divisor;
486	bool_t		failures[10];
487	int		fn;
488	device_t	idev;
489	Port_t		iobase;
490	intrmask_t	irqmap[4];
491	intrmask_t	irqs;
492	u_char		mcr_image;
493	int		result;
494	u_long		xirq;
495	u_int		flags = device_get_flags(dev);
496	int		rid;
497	struct resource *port;
498
499	rid = xrid;
500	port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
501				  0, ~0, IO_COMSIZE, RF_ACTIVE);
502	if (!port)
503		return (ENXIO);
504
505	com = malloc(sizeof(*com), M_DEVBUF, M_NOWAIT | M_ZERO);
506	if (com == NULL) {
507		bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
508		return (ENOMEM);
509	}
510	device_set_softc(dev, com);
511	com->bst = rman_get_bustag(port);
512	com->bsh = rman_get_bushandle(port);
513	if (rclk == 0)
514		rclk = DEFAULT_RCLK;
515	com->rclk = rclk;
516
517	while (sio_inited != 2)
518		if (atomic_cmpset_int(&sio_inited, 0, 1)) {
519			mtx_init(&sio_lock, sio_driver_name, NULL,
520			    (comconsole != -1) ?
521			    MTX_SPIN | MTX_QUIET : MTX_SPIN);
522			atomic_store_rel_int(&sio_inited, 2);
523		}
524
525#if 0
526	/*
527	 * XXX this is broken - when we are first called, there are no
528	 * previously configured IO ports.  We could hard code
529	 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse.
530	 * This code has been doing nothing since the conversion since
531	 * "count" is zero the first time around.
532	 */
533	if (!already_init) {
534		/*
535		 * Turn off MCR_IENABLE for all likely serial ports.  An unused
536		 * port with its MCR_IENABLE gate open will inhibit interrupts
537		 * from any used port that shares the interrupt vector.
538		 * XXX the gate enable is elsewhere for some multiports.
539		 */
540		device_t *devs;
541		int count, i, xioport;
542
543		devclass_get_devices(sio_devclass, &devs, &count);
544		for (i = 0; i < count; i++) {
545			xdev = devs[i];
546			if (device_is_enabled(xdev) &&
547			    bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport,
548					     NULL) == 0)
549				outb(xioport + com_mcr, 0);
550		}
551		free(devs, M_TEMP);
552		already_init = TRUE;
553	}
554#endif
555
556	if (COM_LLCONSOLE(flags)) {
557		printf("sio%d: reserved for low-level i/o\n",
558		       device_get_unit(dev));
559		bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
560		device_set_softc(dev, NULL);
561		free(com, M_DEVBUF);
562		return (ENXIO);
563	}
564
565	/*
566	 * If the device is on a multiport card and has an AST/4
567	 * compatible interrupt control register, initialize this
568	 * register and prepare to leave MCR_IENABLE clear in the mcr.
569	 * Otherwise, prepare to set MCR_IENABLE in the mcr.
570	 * Point idev to the device struct giving the correct id_irq.
571	 * This is the struct for the master device if there is one.
572	 */
573	idev = dev;
574	mcr_image = MCR_IENABLE;
575#ifdef COM_MULTIPORT
576	if (COM_ISMULTIPORT(flags)) {
577		Port_t xiobase;
578		u_long io;
579
580		idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags));
581		if (idev == NULL) {
582			printf("sio%d: master device %d not configured\n",
583			       device_get_unit(dev), COM_MPMASTER(flags));
584			idev = dev;
585		}
586		if (!COM_NOTAST4(flags)) {
587			if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io,
588					     NULL) == 0) {
589				xiobase = io;
590				if (bus_get_resource(idev, SYS_RES_IRQ, 0,
591				    NULL, NULL) == 0)
592					outb(xiobase + com_scr, 0x80);
593				else
594					outb(xiobase + com_scr, 0);
595			}
596			mcr_image = 0;
597		}
598	}
599#endif /* COM_MULTIPORT */
600	if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0)
601		mcr_image = 0;
602
603	bzero(failures, sizeof failures);
604	iobase = rman_get_start(port);
605
606	/*
607	 * We don't want to get actual interrupts, just masked ones.
608	 * Interrupts from this line should already be masked in the ICU,
609	 * but mask them in the processor as well in case there are some
610	 * (misconfigured) shared interrupts.
611	 */
612	mtx_lock_spin(&sio_lock);
613/* EXTRA DELAY? */
614
615	/*
616	 * For the TI16754 chips, set prescaler to 1 (4 is often the
617	 * default after-reset value) as otherwise it's impossible to
618	 * get highest baudrates.
619	 */
620	if (COM_TI16754(flags)) {
621		u_char cfcr, efr;
622
623		cfcr = sio_getreg(com, com_cfcr);
624		sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
625		efr = sio_getreg(com, com_efr);
626		/* Unlock extended features to turn off prescaler. */
627		sio_setreg(com, com_efr, efr | EFR_EFE);
628		/* Disable EFR. */
629		sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0);
630		/* Turn off prescaler. */
631		sio_setreg(com, com_mcr,
632			   sio_getreg(com, com_mcr) & ~MCR_PRESCALE);
633		sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
634		sio_setreg(com, com_efr, efr);
635		sio_setreg(com, com_cfcr, cfcr);
636	}
637
638	/*
639	 * Initialize the speed and the word size and wait long enough to
640	 * drain the maximum of 16 bytes of junk in device output queues.
641	 * The speed is undefined after a master reset and must be set
642	 * before relying on anything related to output.  There may be
643	 * junk after a (very fast) soft reboot and (apparently) after
644	 * master reset.
645	 * XXX what about the UART bug avoided by waiting in comparam()?
646	 * We don't want to to wait long enough to drain at 2 bps.
647	 */
648	if (iobase == siocniobase)
649		DELAY((16 + 1) * 1000000 / (comdefaultrate / 10));
650	else {
651		sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS);
652		divisor = siodivisor(rclk, SIO_TEST_SPEED);
653		sio_setreg(com, com_dlbl, divisor & 0xff);
654		sio_setreg(com, com_dlbh, divisor >> 8);
655		sio_setreg(com, com_cfcr, CFCR_8BITS);
656		DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10));
657	}
658
659	/*
660	 * Enable the interrupt gate and disable device interupts.  This
661	 * should leave the device driving the interrupt line low and
662	 * guarantee an edge trigger if an interrupt can be generated.
663	 */
664/* EXTRA DELAY? */
665	sio_setreg(com, com_mcr, mcr_image);
666	sio_setreg(com, com_ier, 0);
667	DELAY(1000);		/* XXX */
668	irqmap[0] = isa_irq_pending();
669
670	/*
671	 * Attempt to set loopback mode so that we can send a null byte
672	 * without annoying any external device.
673	 */
674/* EXTRA DELAY? */
675	sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK);
676
677	/*
678	 * Attempt to generate an output interrupt.  On 8250's, setting
679	 * IER_ETXRDY generates an interrupt independent of the current
680	 * setting and independent of whether the THR is empty.  On 16450's,
681	 * setting IER_ETXRDY generates an interrupt independent of the
682	 * current setting.  On 16550A's, setting IER_ETXRDY only
683	 * generates an interrupt when IER_ETXRDY is not already set.
684	 */
685	sio_setreg(com, com_ier, IER_ETXRDY);
686
687	/*
688	 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate
689	 * an interrupt.  They'd better generate one for actually doing
690	 * output.  Loopback may be broken on the same incompatibles but
691	 * it's unlikely to do more than allow the null byte out.
692	 */
693	sio_setreg(com, com_data, 0);
694	if (iobase == siocniobase)
695		DELAY((1 + 2) * 1000000 / (comdefaultrate / 10));
696	else
697		DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10));
698
699	/*
700	 * Turn off loopback mode so that the interrupt gate works again
701	 * (MCR_IENABLE was hidden).  This should leave the device driving
702	 * an interrupt line high.  It doesn't matter if the interrupt
703	 * line oscillates while we are not looking at it, since interrupts
704	 * are disabled.
705	 */
706/* EXTRA DELAY? */
707	sio_setreg(com, com_mcr, mcr_image);
708
709	/*
710	 * It seems my Xircom CBEM56G Cardbus modem wants to be reset
711	 * to 8 bits *again*, or else probe test 0 will fail.
712	 * gwk@sgi.com, 4/19/2001
713	 */
714	sio_setreg(com, com_cfcr, CFCR_8BITS);
715
716	/*
717	 * Some PCMCIA cards (Palido 321s, DC-1S, ...) have the "TXRDY bug",
718	 * so we probe for a buggy IIR_TXRDY implementation even in the
719	 * noprobe case.  We don't probe for it in the !noprobe case because
720	 * noprobe is always set for PCMCIA cards and the problem is not
721	 * known to affect any other cards.
722	 */
723	if (noprobe) {
724		/* Read IIR a few times. */
725		for (fn = 0; fn < 2; fn ++) {
726			DELAY(10000);
727			failures[6] = sio_getreg(com, com_iir);
728		}
729
730		/* IIR_TXRDY should be clear.  Is it? */
731		result = 0;
732		if (failures[6] & IIR_TXRDY) {
733			/*
734			 * No.  We seem to have the bug.  Does our fix for
735			 * it work?
736			 */
737			sio_setreg(com, com_ier, 0);
738			if (sio_getreg(com, com_iir) & IIR_NOPEND) {
739				/* Yes.  We discovered the TXRDY bug! */
740				SET_FLAG(dev, COM_C_IIR_TXRDYBUG);
741			} else {
742				/* No.  Just fail.  XXX */
743				result = ENXIO;
744				sio_setreg(com, com_mcr, 0);
745			}
746		} else {
747			/* Yes.  No bug. */
748			CLR_FLAG(dev, COM_C_IIR_TXRDYBUG);
749		}
750		sio_setreg(com, com_ier, 0);
751		sio_setreg(com, com_cfcr, CFCR_8BITS);
752		mtx_unlock_spin(&sio_lock);
753		bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
754		if (iobase == siocniobase)
755			result = 0;
756		if (result != 0) {
757			device_set_softc(dev, NULL);
758			free(com, M_DEVBUF);
759		}
760		return (result);
761	}
762
763	/*
764	 * Check that
765	 *	o the CFCR, IER and MCR in UART hold the values written to them
766	 *	  (the values happen to be all distinct - this is good for
767	 *	  avoiding false positive tests from bus echoes).
768	 *	o an output interrupt is generated and its vector is correct.
769	 *	o the interrupt goes away when the IIR in the UART is read.
770	 */
771/* EXTRA DELAY? */
772	failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS;
773	failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY;
774	failures[2] = sio_getreg(com, com_mcr) - mcr_image;
775	DELAY(10000);		/* Some internal modems need this time */
776	irqmap[1] = isa_irq_pending();
777	failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY;
778	DELAY(1000);		/* XXX */
779	irqmap[2] = isa_irq_pending();
780	failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
781
782	/*
783	 * Turn off all device interrupts and check that they go off properly.
784	 * Leave MCR_IENABLE alone.  For ports without a master port, it gates
785	 * the OUT2 output of the UART to
786	 * the ICU input.  Closing the gate would give a floating ICU input
787	 * (unless there is another device driving it) and spurious interrupts.
788	 * (On the system that this was first tested on, the input floats high
789	 * and gives a (masked) interrupt as soon as the gate is closed.)
790	 */
791	sio_setreg(com, com_ier, 0);
792	sio_setreg(com, com_cfcr, CFCR_8BITS);	/* dummy to avoid bus echo */
793	failures[7] = sio_getreg(com, com_ier);
794	DELAY(1000);		/* XXX */
795	irqmap[3] = isa_irq_pending();
796	failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
797
798	mtx_unlock_spin(&sio_lock);
799
800	irqs = irqmap[1] & ~irqmap[0];
801	if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 &&
802	    ((1 << xirq) & irqs) == 0) {
803		printf(
804		"sio%d: configured irq %ld not in bitmap of probed irqs %#x\n",
805		    device_get_unit(dev), xirq, irqs);
806		printf(
807		"sio%d: port may not be enabled\n",
808		    device_get_unit(dev));
809	}
810	if (bootverbose)
811		printf("sio%d: irq maps: %#x %#x %#x %#x\n",
812		    device_get_unit(dev),
813		    irqmap[0], irqmap[1], irqmap[2], irqmap[3]);
814
815	result = 0;
816	for (fn = 0; fn < sizeof failures; ++fn)
817		if (failures[fn]) {
818			sio_setreg(com, com_mcr, 0);
819			result = ENXIO;
820			if (bootverbose) {
821				printf("sio%d: probe failed test(s):",
822				    device_get_unit(dev));
823				for (fn = 0; fn < sizeof failures; ++fn)
824					if (failures[fn])
825						printf(" %d", fn);
826				printf("\n");
827			}
828			break;
829		}
830	bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
831	if (iobase == siocniobase)
832		result = 0;
833	if (result != 0) {
834		device_set_softc(dev, NULL);
835		free(com, M_DEVBUF);
836	}
837	return (result);
838}
839
840#ifdef COM_ESP
841static int
842espattach(com, esp_port)
843	struct com_s		*com;
844	Port_t			esp_port;
845{
846	u_char	dips;
847	u_char	val;
848
849	/*
850	 * Check the ESP-specific I/O port to see if we're an ESP
851	 * card.  If not, return failure immediately.
852	 */
853	if ((inb(esp_port) & 0xf3) == 0) {
854		printf(" port 0x%x is not an ESP board?\n", esp_port);
855		return (0);
856	}
857
858	/*
859	 * We've got something that claims to be a Hayes ESP card.
860	 * Let's hope so.
861	 */
862
863	/* Get the dip-switch configuration */
864	outb(esp_port + ESP_CMD1, ESP_GETDIPS);
865	dips = inb(esp_port + ESP_STATUS1);
866
867	/*
868	 * Bits 0,1 of dips say which COM port we are.
869	 */
870	if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03])
871		printf(" : ESP");
872	else {
873		printf(" esp_port has com %d\n", dips & 0x03);
874		return (0);
875	}
876
877	/*
878	 * Check for ESP version 2.0 or later:  bits 4,5,6 = 010.
879	 */
880	outb(esp_port + ESP_CMD1, ESP_GETTEST);
881	val = inb(esp_port + ESP_STATUS1);	/* clear reg 1 */
882	val = inb(esp_port + ESP_STATUS2);
883	if ((val & 0x70) < 0x20) {
884		printf("-old (%o)", val & 0x70);
885		return (0);
886	}
887
888	/*
889	 * Check for ability to emulate 16550:  bit 7 == 1
890	 */
891	if ((dips & 0x80) == 0) {
892		printf(" slave");
893		return (0);
894	}
895
896	/*
897	 * Okay, we seem to be a Hayes ESP card.  Whee.
898	 */
899	com->esp = TRUE;
900	com->esp_port = esp_port;
901	return (1);
902}
903#endif /* COM_ESP */
904
905int
906sioattach(dev, xrid, rclk)
907	device_t	dev;
908	int		xrid;
909	u_long		rclk;
910{
911	struct com_s	*com;
912#ifdef COM_ESP
913	Port_t		*espp;
914#endif
915	Port_t		iobase;
916	int		minorbase;
917	int		unit;
918	u_int		flags;
919	int		rid;
920	struct resource *port;
921	int		ret;
922	struct tty	*tp;
923
924	rid = xrid;
925	port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
926				  0, ~0, IO_COMSIZE, RF_ACTIVE);
927	if (!port)
928		return (ENXIO);
929
930	iobase = rman_get_start(port);
931	unit = device_get_unit(dev);
932	com = device_get_softc(dev);
933	flags = device_get_flags(dev);
934
935	if (unit >= sio_numunits)
936		sio_numunits = unit + 1;
937	/*
938	 * sioprobe() has initialized the device registers as follows:
939	 *	o cfcr = CFCR_8BITS.
940	 *	  It is most important that CFCR_DLAB is off, so that the
941	 *	  data port is not hidden when we enable interrupts.
942	 *	o ier = 0.
943	 *	  Interrupts are only enabled when the line is open.
944	 *	o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible
945	 *	  interrupt control register or the config specifies no irq.
946	 *	  Keeping MCR_DTR and MCR_RTS off might stop the external
947	 *	  device from sending before we are ready.
948	 */
949	bzero(com, sizeof *com);
950	com->unit = unit;
951	com->ioportres = port;
952	com->ioportrid = rid;
953	com->bst = rman_get_bustag(port);
954	com->bsh = rman_get_bushandle(port);
955	com->cfcr_image = CFCR_8BITS;
956	com->loses_outints = COM_LOSESOUTINTS(flags) != 0;
957	com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0;
958	com->tx_fifo_size = 1;
959	com->obufs[0].l_head = com->obuf1;
960	com->obufs[1].l_head = com->obuf2;
961
962	com->data_port = iobase + com_data;
963	com->int_ctl_port = iobase + com_ier;
964	com->int_id_port = iobase + com_iir;
965	com->modem_ctl_port = iobase + com_mcr;
966	com->mcr_image = inb(com->modem_ctl_port);
967	com->line_status_port = iobase + com_lsr;
968	com->modem_status_port = iobase + com_msr;
969
970	tp = com->tp = ttymalloc(NULL);
971	tp->t_oproc = comstart;
972	tp->t_param = comparam;
973	tp->t_stop = comstop;
974	tp->t_modem = commodem;
975	tp->t_break = combreak;
976	tp->t_sc = com;
977
978	if (rclk == 0)
979		rclk = DEFAULT_RCLK;
980	com->rclk = rclk;
981
982	/*
983	 * We don't use all the flags from <sys/ttydefaults.h> since they
984	 * are only relevant for logins.  It's important to have echo off
985	 * initially so that the line doesn't start blathering before the
986	 * echo flag can be turned off.
987	 */
988	tp->t_init_in.c_iflag = 0;
989	tp->t_init_in.c_oflag = 0;
990	tp->t_init_in.c_cflag = TTYDEF_CFLAG;
991	tp->t_init_in.c_lflag = 0;
992	if (unit == comconsole) {
993		tp->t_init_in.c_iflag = TTYDEF_IFLAG;
994		tp->t_init_in.c_oflag = TTYDEF_OFLAG;
995		tp->t_init_in.c_cflag = TTYDEF_CFLAG | CLOCAL;
996		tp->t_init_in.c_lflag = TTYDEF_LFLAG;
997		tp->t_lock_out.c_cflag = tp->t_lock_in.c_cflag = CLOCAL;
998		tp->t_lock_out.c_ispeed = tp->t_lock_out.c_ospeed =
999		tp->t_lock_in.c_ispeed = tp->t_lock_in.c_ospeed =
1000		tp->t_init_in.c_ispeed = tp->t_init_in.c_ospeed = comdefaultrate;
1001	} else
1002		tp->t_init_in.c_ispeed = tp->t_init_in.c_ospeed = TTYDEF_SPEED;
1003	if (siosetwater(com, tp->t_init_in.c_ispeed) != 0) {
1004		mtx_unlock_spin(&sio_lock);
1005		/*
1006		 * Leave i/o resources allocated if this is a `cn'-level
1007		 * console, so that other devices can't snarf them.
1008		 */
1009		if (iobase != siocniobase)
1010			bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
1011		return (ENOMEM);
1012	}
1013	mtx_unlock_spin(&sio_lock);
1014	termioschars(&tp->t_init_in);
1015	tp->t_init_out = tp->t_init_in;
1016
1017	/* attempt to determine UART type */
1018	printf("sio%d: type", unit);
1019
1020
1021	if (!COM_ISMULTIPORT(flags) &&
1022	    !COM_IIR_TXRDYBUG(flags) && !COM_NOSCR(flags)) {
1023		u_char	scr;
1024		u_char	scr1;
1025		u_char	scr2;
1026
1027		scr = sio_getreg(com, com_scr);
1028		sio_setreg(com, com_scr, 0xa5);
1029		scr1 = sio_getreg(com, com_scr);
1030		sio_setreg(com, com_scr, 0x5a);
1031		scr2 = sio_getreg(com, com_scr);
1032		sio_setreg(com, com_scr, scr);
1033		if (scr1 != 0xa5 || scr2 != 0x5a) {
1034			printf(" 8250 or not responding");
1035			goto determined_type;
1036		}
1037	}
1038	sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH);
1039	DELAY(100);
1040	switch (inb(com->int_id_port) & IIR_FIFO_MASK) {
1041	case FIFO_RX_LOW:
1042		printf(" 16450");
1043		break;
1044	case FIFO_RX_MEDL:
1045		printf(" 16450?");
1046		break;
1047	case FIFO_RX_MEDH:
1048		printf(" 16550?");
1049		break;
1050	case FIFO_RX_HIGH:
1051		if (COM_NOFIFO(flags)) {
1052			printf(" 16550A fifo disabled");
1053			break;
1054		}
1055		com->hasfifo = TRUE;
1056		if (COM_ST16650A(flags)) {
1057			printf(" ST16650A");
1058			com->st16650a = TRUE;
1059			com->tx_fifo_size = 32;
1060			break;
1061		}
1062		if (COM_TI16754(flags)) {
1063			printf(" TI16754");
1064			com->tx_fifo_size = 64;
1065			break;
1066		}
1067		printf(" 16550A");
1068#ifdef COM_ESP
1069		for (espp = likely_esp_ports; *espp != 0; espp++)
1070			if (espattach(com, *espp)) {
1071				com->tx_fifo_size = 1024;
1072				break;
1073			}
1074		if (com->esp)
1075			break;
1076#endif
1077		com->tx_fifo_size = COM_FIFOSIZE(flags);
1078		if (com->tx_fifo_size == 0)
1079			com->tx_fifo_size = 16;
1080		else
1081			printf(" lookalike with %u bytes FIFO",
1082			       com->tx_fifo_size);
1083		break;
1084	}
1085#ifdef COM_ESP
1086	if (com->esp) {
1087		/*
1088		 * Set 16550 compatibility mode.
1089		 * We don't use the ESP_MODE_SCALE bit to increase the
1090		 * fifo trigger levels because we can't handle large
1091		 * bursts of input.
1092		 * XXX flow control should be set in comparam(), not here.
1093		 */
1094		outb(com->esp_port + ESP_CMD1, ESP_SETMODE);
1095		outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO);
1096
1097		/* Set RTS/CTS flow control. */
1098		outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE);
1099		outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS);
1100		outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS);
1101
1102		/* Set flow-control levels. */
1103		outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW);
1104		outb(com->esp_port + ESP_CMD2, HIBYTE(768));
1105		outb(com->esp_port + ESP_CMD2, LOBYTE(768));
1106		outb(com->esp_port + ESP_CMD2, HIBYTE(512));
1107		outb(com->esp_port + ESP_CMD2, LOBYTE(512));
1108	}
1109#endif /* COM_ESP */
1110	sio_setreg(com, com_fifo, 0);
1111determined_type: ;
1112
1113#ifdef COM_MULTIPORT
1114	if (COM_ISMULTIPORT(flags)) {
1115		device_t masterdev;
1116
1117		com->multiport = TRUE;
1118		printf(" (multiport");
1119		if (unit == COM_MPMASTER(flags))
1120			printf(" master");
1121		printf(")");
1122		masterdev = devclass_get_device(sio_devclass,
1123		    COM_MPMASTER(flags));
1124		com->no_irq = (masterdev == NULL || bus_get_resource(masterdev,
1125		    SYS_RES_IRQ, 0, NULL, NULL) != 0);
1126	 }
1127#endif /* COM_MULTIPORT */
1128	if (unit == comconsole)
1129		printf(", console");
1130	if (COM_IIR_TXRDYBUG(flags))
1131		printf(" with a buggy IIR_TXRDY implementation");
1132	printf("\n");
1133
1134	if (sio_fast_ih == NULL) {
1135		swi_add(&tty_ithd, "sio", siopoll, NULL, SWI_TTY, 0,
1136		    &sio_fast_ih);
1137		swi_add(&clk_ithd, "sio", siopoll, NULL, SWI_CLOCK, 0,
1138		    &sio_slow_ih);
1139	}
1140	minorbase = UNIT_TO_MINOR(unit);
1141	com->devs[0] = make_dev(&sio_cdevsw, minorbase,
1142	    UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit);
1143	com->devs[1] = make_dev(&sioc_cdevsw, minorbase | CONTROL_INIT_STATE,
1144	    UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit);
1145	com->devs[2] = make_dev(&sioc_cdevsw, minorbase | CONTROL_LOCK_STATE,
1146	    UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit);
1147	com->devs[3] = make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK,
1148	    UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit);
1149	com->devs[4] = make_dev(&sioc_cdevsw,
1150	    minorbase | CALLOUT_MASK | CONTROL_INIT_STATE,
1151	    UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit);
1152	com->devs[5] = make_dev(&sioc_cdevsw,
1153	    minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE,
1154	    UID_UUCP, GID_DIALER, 0660, "cuala%r", unit);
1155	for (rid = 0; rid < 6; rid++)
1156		com->devs[rid]->si_drv1 = com;
1157	com->flags = flags;
1158	com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR;
1159
1160	if (COM_PPSCTS(flags))
1161		com->pps_bit = MSR_CTS;
1162	else
1163		com->pps_bit = MSR_DCD;
1164	pps_init(&com->pps);
1165
1166	rid = 0;
1167	com->irqres = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
1168	if (com->irqres) {
1169		ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres,
1170				     INTR_TYPE_TTY | INTR_FAST,
1171				     siointr, com, &com->cookie);
1172		if (ret) {
1173			ret = BUS_SETUP_INTR(device_get_parent(dev), dev,
1174					     com->irqres, INTR_TYPE_TTY,
1175					     siointr, com, &com->cookie);
1176			if (ret == 0)
1177				device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n");
1178		}
1179		if (ret)
1180			device_printf(dev, "could not activate interrupt\n");
1181#if defined(KDB) && (defined(BREAK_TO_DEBUGGER) || \
1182    defined(ALT_BREAK_TO_DEBUGGER))
1183		/*
1184		 * Enable interrupts for early break-to-debugger support
1185		 * on the console.
1186		 */
1187		if (ret == 0 && unit == comconsole)
1188			outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS |
1189			    IER_EMSC);
1190#endif
1191	}
1192
1193	return (0);
1194}
1195
1196static int
1197siocopen(dev, flag, mode, td)
1198	struct cdev *dev;
1199	int		flag;
1200	int		mode;
1201	struct thread	*td;
1202{
1203	struct com_s	*com;
1204
1205	com = dev->si_drv1;
1206	if (com == NULL)
1207		return (ENXIO);
1208	if (com->gone)
1209		return (ENXIO);
1210	return (0);
1211}
1212
1213static int
1214sioopen(dev, flag, mode, td)
1215	struct cdev *dev;
1216	int		flag;
1217	int		mode;
1218	struct thread	*td;
1219{
1220	struct com_s	*com;
1221	int		error;
1222	int		mynor;
1223	int		s;
1224	struct tty	*tp;
1225	int		unit;
1226
1227	mynor = minor(dev);
1228	unit = MINOR_TO_UNIT(mynor);
1229	com = dev->si_drv1;
1230	if (com == NULL)
1231		return (ENXIO);
1232	if (com->gone)
1233		return (ENXIO);
1234	tp = dev->si_tty = com->tp;
1235	s = spltty();
1236	/*
1237	 * We jump to this label after all non-interrupted sleeps to pick
1238	 * up any changes of the device state.
1239	 */
1240open_top:
1241	error = ttydtrwaitsleep(tp);
1242	if (error != 0)
1243		goto out;
1244	if (tp->t_state & TS_ISOPEN) {
1245		/*
1246		 * The device is open, so everything has been initialized.
1247		 * Handle conflicts.
1248		 */
1249		if (mynor & CALLOUT_MASK) {
1250			if (!com->active_out) {
1251				error = EBUSY;
1252				goto out;
1253			}
1254		} else {
1255			if (com->active_out) {
1256				if (flag & O_NONBLOCK) {
1257					error = EBUSY;
1258					goto out;
1259				}
1260				error =	tsleep(&com->active_out,
1261					       TTIPRI | PCATCH, "siobi", 0);
1262				if (com_addr(unit) == NULL)
1263					return (ENXIO);
1264				if (error != 0 || com->gone)
1265					goto out;
1266				goto open_top;
1267			}
1268		}
1269		if (tp->t_state & TS_XCLUDE &&
1270		    suser(td)) {
1271			error = EBUSY;
1272			goto out;
1273		}
1274	} else {
1275		/*
1276		 * The device isn't open, so there are no conflicts.
1277		 * Initialize it.  Initialization is done twice in many
1278		 * cases: to preempt sleeping callin opens if we are
1279		 * callout, and to complete a callin open after DCD rises.
1280		 */
1281		tp->t_dev = dev;
1282		tp->t_termios = mynor & CALLOUT_MASK
1283				? tp->t_init_out : tp->t_init_in;
1284		(void)commodem(tp, SER_DTR | SER_RTS, 0);
1285		com->poll = com->no_irq;
1286		com->poll_output = com->loses_outints;
1287		++com->wopeners;
1288		error = comparam(tp, &tp->t_termios);
1289		--com->wopeners;
1290		if (error != 0)
1291			goto out;
1292		/*
1293		 * XXX we should goto open_top if comparam() slept.
1294		 */
1295		if (com->hasfifo) {
1296			int i;
1297			/*
1298			 * (Re)enable and drain fifos.
1299			 *
1300			 * Certain SMC chips cause problems if the fifos
1301			 * are enabled while input is ready.  Turn off the
1302			 * fifo if necessary to clear the input.  We test
1303			 * the input ready bit after enabling the fifos
1304			 * since we've already enabled them in comparam()
1305			 * and to handle races between enabling and fresh
1306			 * input.
1307			 */
1308			for (i = 0; i < 500; i++) {
1309				sio_setreg(com, com_fifo,
1310					   FIFO_RCV_RST | FIFO_XMT_RST
1311					   | com->fifo_image);
1312				/*
1313				 * XXX the delays are for superstitious
1314				 * historical reasons.  It must be less than
1315				 * the character time at the maximum
1316				 * supported speed (87 usec at 115200 bps
1317				 * 8N1).  Otherwise we might loop endlessly
1318				 * if data is streaming in.  We used to use
1319				 * delays of 100.  That usually worked
1320				 * because DELAY(100) used to usually delay
1321				 * for about 85 usec instead of 100.
1322				 */
1323				DELAY(50);
1324				if (!(inb(com->line_status_port) & LSR_RXRDY))
1325					break;
1326				sio_setreg(com, com_fifo, 0);
1327				DELAY(50);
1328				(void) inb(com->data_port);
1329			}
1330			if (i == 500) {
1331				error = EIO;
1332				goto out;
1333			}
1334		}
1335
1336		mtx_lock_spin(&sio_lock);
1337		(void) inb(com->line_status_port);
1338		(void) inb(com->data_port);
1339		com->prev_modem_status = com->last_modem_status
1340		    = inb(com->modem_status_port);
1341		outb(com->int_ctl_port,
1342		     IER_ERXRDY | IER_ERLS | IER_EMSC
1343		     | (COM_IIR_TXRDYBUG(com->flags) ? 0 : IER_ETXRDY));
1344		mtx_unlock_spin(&sio_lock);
1345		/*
1346		 * Handle initial DCD.  Callout devices get a fake initial
1347		 * DCD (trapdoor DCD).  If we are callout, then any sleeping
1348		 * callin opens get woken up and resume sleeping on "siobi"
1349		 * instead of "siodcd".
1350		 */
1351		/*
1352		 * XXX `mynor & CALLOUT_MASK' should be
1353		 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where
1354		 * TRAPDOOR_CARRIER is the default initial state for callout
1355		 * devices and SOFT_CARRIER is like CLOCAL except it hides
1356		 * the true carrier.
1357		 */
1358		if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK)
1359			ttyld_modem(tp, 1);
1360	}
1361	/*
1362	 * Wait for DCD if necessary.
1363	 */
1364	if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK)
1365	    && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) {
1366		++com->wopeners;
1367		error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0);
1368		if (com_addr(unit) == NULL)
1369			return (ENXIO);
1370		--com->wopeners;
1371		if (error != 0 || com->gone)
1372			goto out;
1373		goto open_top;
1374	}
1375	error =	ttyld_open(tp, dev);
1376	ttyldoptim(tp);
1377	if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK)
1378		com->active_out = TRUE;
1379	siosettimeout();
1380out:
1381	splx(s);
1382	if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0)
1383		comhardclose(com);
1384	return (error);
1385}
1386
1387static int
1388siocclose(dev, flag, mode, td)
1389	struct cdev *dev;
1390	int		flag;
1391	int		mode;
1392	struct thread	*td;
1393{
1394
1395	return (0);
1396}
1397
1398static int
1399sioclose(dev, flag, mode, td)
1400	struct cdev *dev;
1401	int		flag;
1402	int		mode;
1403	struct thread	*td;
1404{
1405	struct com_s	*com;
1406	int		mynor;
1407	int		s;
1408	struct tty	*tp;
1409
1410	mynor = minor(dev);
1411	com = dev->si_drv1;
1412	if (com == NULL)
1413		return (ENODEV);
1414	tp = com->tp;
1415	s = spltty();
1416	ttyld_close(tp, flag);
1417	ttyldoptim(tp);
1418	comhardclose(com);
1419	tty_close(tp);
1420	siosettimeout();
1421	splx(s);
1422	if (com->gone) {
1423		printf("sio%d: gone\n", com->unit);
1424		s = spltty();
1425		if (com->ibuf != NULL)
1426			free(com->ibuf, M_DEVBUF);
1427		bzero(tp, sizeof *tp);
1428		splx(s);
1429	}
1430	return (0);
1431}
1432
1433static void
1434comhardclose(com)
1435	struct com_s	*com;
1436{
1437	int		s;
1438	struct tty	*tp;
1439
1440	s = spltty();
1441	com->poll = FALSE;
1442	com->poll_output = FALSE;
1443	com->do_timestamp = FALSE;
1444	com->pps.ppsparam.mode = 0;
1445	sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
1446	tp = com->tp;
1447
1448#if defined(KDB) && (defined(BREAK_TO_DEBUGGER) || \
1449    defined(ALT_BREAK_TO_DEBUGGER))
1450	/*
1451	 * Leave interrupts enabled and don't clear DTR if this is the
1452	 * console. This allows us to detect break-to-debugger events
1453	 * while the console device is closed.
1454	 */
1455	if (com->unit != comconsole)
1456#endif
1457	{
1458		sio_setreg(com, com_ier, 0);
1459		if (tp->t_cflag & HUPCL
1460		    /*
1461		     * XXX we will miss any carrier drop between here and the
1462		     * next open.  Perhaps we should watch DCD even when the
1463		     * port is closed; it is not sufficient to check it at
1464		     * the next open because it might go up and down while
1465		     * we're not watching.
1466		     */
1467		    || (!com->active_out
1468		        && !(com->prev_modem_status & MSR_DCD)
1469		        && !(tp->t_init_in.c_cflag & CLOCAL))
1470		    || !(tp->t_state & TS_ISOPEN)) {
1471			(void)commodem(tp, 0, SER_DTR);
1472			ttydtrwaitstart(tp);
1473		}
1474	}
1475	if (com->hasfifo) {
1476		/*
1477		 * Disable fifos so that they are off after controlled
1478		 * reboots.  Some BIOSes fail to detect 16550s when the
1479		 * fifos are enabled.
1480		 */
1481		sio_setreg(com, com_fifo, 0);
1482	}
1483	com->active_out = FALSE;
1484	wakeup(&com->active_out);
1485	wakeup(TSA_CARR_ON(tp));	/* restart any wopeners */
1486	splx(s);
1487}
1488
1489static int
1490siocrdwr(dev, uio, flag)
1491	struct cdev *dev;
1492	struct uio	*uio;
1493	int		flag;
1494{
1495
1496	return (ENODEV);
1497}
1498
1499static int
1500sioread(dev, uio, flag)
1501	struct cdev *dev;
1502	struct uio	*uio;
1503	int		flag;
1504{
1505	struct com_s	*com;
1506
1507	com = dev->si_drv1;
1508	if (com == NULL || com->gone)
1509		return (ENODEV);
1510	return (ttyld_read(com->tp, uio, flag));
1511}
1512
1513static int
1514siowrite(dev, uio, flag)
1515	struct cdev *dev;
1516	struct uio	*uio;
1517	int		flag;
1518{
1519	int		mynor;
1520	struct com_s	*com;
1521	int		unit;
1522
1523	mynor = minor(dev);
1524
1525	unit = MINOR_TO_UNIT(mynor);
1526	com = com_addr(unit);
1527	if (com == NULL || com->gone)
1528		return (ENODEV);
1529	/*
1530	 * (XXX) We disallow virtual consoles if the physical console is
1531	 * a serial port.  This is in case there is a display attached that
1532	 * is not the console.  In that situation we don't need/want the X
1533	 * server taking over the console.
1534	 */
1535	if (constty != NULL && unit == comconsole)
1536		constty = NULL;
1537	return (ttyld_write(com->tp, uio, flag));
1538}
1539
1540static void
1541siobusycheck(chan)
1542	void	*chan;
1543{
1544	struct com_s	*com;
1545	int		s;
1546
1547	com = (struct com_s *)chan;
1548
1549	/*
1550	 * Clear TS_BUSY if low-level output is complete.
1551	 * spl locking is sufficient because siointr1() does not set CS_BUSY.
1552	 * If siointr1() clears CS_BUSY after we look at it, then we'll get
1553	 * called again.  Reading the line status port outside of siointr1()
1554	 * is safe because CS_BUSY is clear so there are no output interrupts
1555	 * to lose.
1556	 */
1557	s = spltty();
1558	if (com->state & CS_BUSY)
1559		com->extra_state &= ~CSE_BUSYCHECK;	/* False alarm. */
1560	else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY))
1561	    == (LSR_TSRE | LSR_TXRDY)) {
1562		com->tp->t_state &= ~TS_BUSY;
1563		ttwwakeup(com->tp);
1564		com->extra_state &= ~CSE_BUSYCHECK;
1565	} else
1566		timeout(siobusycheck, com, hz / 100);
1567	splx(s);
1568}
1569
1570static u_int
1571siodivisor(rclk, speed)
1572	u_long	rclk;
1573	speed_t	speed;
1574{
1575	long	actual_speed;
1576	u_int	divisor;
1577	int	error;
1578
1579	if (speed == 0)
1580		return (0);
1581#if UINT_MAX > (ULONG_MAX - 1) / 8
1582	if (speed > (ULONG_MAX - 1) / 8)
1583		return (0);
1584#endif
1585	divisor = (rclk / (8UL * speed) + 1) / 2;
1586	if (divisor == 0 || divisor >= 65536)
1587		return (0);
1588	actual_speed = rclk / (16UL * divisor);
1589
1590	/* 10 times error in percent: */
1591	error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2;
1592
1593	/* 3.0% maximum error tolerance: */
1594	if (error < -30 || error > 30)
1595		return (0);
1596
1597	return (divisor);
1598}
1599
1600/*
1601 * Call this function with the sio_lock mutex held.  It will return with the
1602 * lock still held.
1603 */
1604static void
1605sioinput(com)
1606	struct com_s	*com;
1607{
1608	u_char		*buf;
1609	int		incc;
1610	u_char		line_status;
1611	int		recv_data;
1612	struct tty	*tp;
1613
1614	buf = com->ibuf;
1615	tp = com->tp;
1616	if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) {
1617		com_events -= (com->iptr - com->ibuf);
1618		com->iptr = com->ibuf;
1619		return;
1620	}
1621	if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
1622		/*
1623		 * Avoid the grotesquely inefficient lineswitch routine
1624		 * (ttyinput) in "raw" mode.  It usually takes about 450
1625		 * instructions (that's without canonical processing or echo!).
1626		 * slinput is reasonably fast (usually 40 instructions plus
1627		 * call overhead).
1628		 */
1629		do {
1630			/*
1631			 * This may look odd, but it is using save-and-enable
1632			 * semantics instead of the save-and-disable semantics
1633			 * that are used everywhere else.
1634			 */
1635			mtx_unlock_spin(&sio_lock);
1636			incc = com->iptr - buf;
1637			if (tp->t_rawq.c_cc + incc > tp->t_ihiwat
1638			    && (com->state & CS_RTS_IFLOW
1639				|| tp->t_iflag & IXOFF)
1640			    && !(tp->t_state & TS_TBLOCK))
1641				ttyblock(tp);
1642			com->delta_error_counts[CE_TTY_BUF_OVERFLOW]
1643				+= b_to_q((char *)buf, incc, &tp->t_rawq);
1644			buf += incc;
1645			tk_nin += incc;
1646			tk_rawcc += incc;
1647			tp->t_rawcc += incc;
1648			ttwakeup(tp);
1649			if (tp->t_state & TS_TTSTOP
1650			    && (tp->t_iflag & IXANY
1651				|| tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
1652				tp->t_state &= ~TS_TTSTOP;
1653				tp->t_lflag &= ~FLUSHO;
1654				comstart(tp);
1655			}
1656			mtx_lock_spin(&sio_lock);
1657		} while (buf < com->iptr);
1658	} else {
1659		do {
1660			/*
1661			 * This may look odd, but it is using save-and-enable
1662			 * semantics instead of the save-and-disable semantics
1663			 * that are used everywhere else.
1664			 */
1665			mtx_unlock_spin(&sio_lock);
1666			line_status = buf[com->ierroff];
1667			recv_data = *buf++;
1668			if (line_status
1669			    & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) {
1670				if (line_status & LSR_BI)
1671					recv_data |= TTY_BI;
1672				if (line_status & LSR_FE)
1673					recv_data |= TTY_FE;
1674				if (line_status & LSR_OE)
1675					recv_data |= TTY_OE;
1676				if (line_status & LSR_PE)
1677					recv_data |= TTY_PE;
1678			}
1679			ttyld_rint(tp, recv_data);
1680			mtx_lock_spin(&sio_lock);
1681		} while (buf < com->iptr);
1682	}
1683	com_events -= (com->iptr - com->ibuf);
1684	com->iptr = com->ibuf;
1685
1686	/*
1687	 * There is now room for another low-level buffer full of input,
1688	 * so enable RTS if it is now disabled and there is room in the
1689	 * high-level buffer.
1690	 */
1691	if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) &&
1692	    !(tp->t_state & TS_TBLOCK))
1693		outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
1694}
1695
1696static void
1697siointr(arg)
1698	void		*arg;
1699{
1700	struct com_s	*com;
1701
1702#ifndef COM_MULTIPORT
1703	com = (struct com_s *)arg;
1704
1705	mtx_lock_spin(&sio_lock);
1706	siointr1(com);
1707	mtx_unlock_spin(&sio_lock);
1708#else /* COM_MULTIPORT */
1709	bool_t		possibly_more_intrs;
1710	int		unit;
1711
1712	/*
1713	 * Loop until there is no activity on any port.  This is necessary
1714	 * to get an interrupt edge more than to avoid another interrupt.
1715	 * If the IRQ signal is just an OR of the IRQ signals from several
1716	 * devices, then the edge from one may be lost because another is
1717	 * on.
1718	 */
1719	mtx_lock_spin(&sio_lock);
1720	do {
1721		possibly_more_intrs = FALSE;
1722		for (unit = 0; unit < sio_numunits; ++unit) {
1723			com = com_addr(unit);
1724			/*
1725			 * XXX COM_LOCK();
1726			 * would it work here, or be counter-productive?
1727			 */
1728			if (com != NULL
1729			    && !com->gone
1730			    && (inb(com->int_id_port) & IIR_IMASK)
1731			       != IIR_NOPEND) {
1732				siointr1(com);
1733				possibly_more_intrs = TRUE;
1734			}
1735			/* XXX COM_UNLOCK(); */
1736		}
1737	} while (possibly_more_intrs);
1738	mtx_unlock_spin(&sio_lock);
1739#endif /* COM_MULTIPORT */
1740}
1741
1742static struct timespec siots[8];
1743static int siotso;
1744static int volatile siotsunit = -1;
1745
1746static int
1747sysctl_siots(SYSCTL_HANDLER_ARGS)
1748{
1749	char buf[128];
1750	long long delta;
1751	size_t len;
1752	int error, i, tso;
1753
1754	for (i = 1, tso = siotso; i < tso; i++) {
1755		delta = (long long)(siots[i].tv_sec - siots[i - 1].tv_sec) *
1756		    1000000000 +
1757		    (siots[i].tv_nsec - siots[i - 1].tv_nsec);
1758		len = sprintf(buf, "%lld\n", delta);
1759		if (delta >= 110000)
1760			len += sprintf(buf + len - 1, ": *** %ld.%09ld\n",
1761			    (long)siots[i].tv_sec, siots[i].tv_nsec) - 1;
1762		if (i == tso - 1)
1763			buf[len - 1] = '\0';
1764		error = SYSCTL_OUT(req, buf, len);
1765		if (error != 0)
1766			return (error);
1767		uio_yield();
1768	}
1769	return (0);
1770}
1771
1772SYSCTL_PROC(_machdep, OID_AUTO, siots, CTLTYPE_STRING | CTLFLAG_RD,
1773    0, 0, sysctl_siots, "A", "sio timestamps");
1774
1775static void
1776siointr1(com)
1777	struct com_s	*com;
1778{
1779	u_char	int_ctl;
1780	u_char	int_ctl_new;
1781	u_char	line_status;
1782	u_char	modem_status;
1783	u_char	*ioptr;
1784	u_char	recv_data;
1785
1786	if (COM_IIR_TXRDYBUG(com->flags)) {
1787		int_ctl = inb(com->int_ctl_port);
1788		int_ctl_new = int_ctl;
1789	} else {
1790		int_ctl = 0;
1791		int_ctl_new = 0;
1792	}
1793
1794	while (!com->gone) {
1795		if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) {
1796			modem_status = inb(com->modem_status_port);
1797		        if ((modem_status ^ com->last_modem_status) &
1798			    com->pps_bit) {
1799				pps_capture(&com->pps);
1800				pps_event(&com->pps,
1801				    (modem_status & com->pps_bit) ?
1802				    PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
1803			}
1804		}
1805		line_status = inb(com->line_status_port);
1806
1807		/* input event? (check first to help avoid overruns) */
1808		while (line_status & LSR_RCV_MASK) {
1809			/* break/unnattached error bits or real input? */
1810			if (!(line_status & LSR_RXRDY))
1811				recv_data = 0;
1812			else
1813				recv_data = inb(com->data_port);
1814#ifdef KDB
1815#ifdef ALT_BREAK_TO_DEBUGGER
1816			if (com->unit == comconsole &&
1817			    kdb_alt_break(recv_data, &com->alt_brk_state) != 0)
1818				kdb_enter("Break sequence on console");
1819#endif /* ALT_BREAK_TO_DEBUGGER */
1820#endif /* KDB */
1821			if (line_status & (LSR_BI | LSR_FE | LSR_PE)) {
1822				/*
1823				 * Don't store BI if IGNBRK or FE/PE if IGNPAR.
1824				 * Otherwise, push the work to a higher level
1825				 * (to handle PARMRK) if we're bypassing.
1826				 * Otherwise, convert BI/FE and PE+INPCK to 0.
1827				 *
1828				 * This makes bypassing work right in the
1829				 * usual "raw" case (IGNBRK set, and IGNPAR
1830				 * and INPCK clear).
1831				 *
1832				 * Note: BI together with FE/PE means just BI.
1833				 */
1834				if (line_status & LSR_BI) {
1835#if defined(KDB) && defined(BREAK_TO_DEBUGGER)
1836					if (com->unit == comconsole) {
1837						kdb_enter("Line break on console");
1838						goto cont;
1839					}
1840#endif
1841					if (com->tp == NULL
1842					    || com->tp->t_iflag & IGNBRK)
1843						goto cont;
1844				} else {
1845					if (com->tp == NULL
1846					    || com->tp->t_iflag & IGNPAR)
1847						goto cont;
1848				}
1849				if (com->tp->t_state & TS_CAN_BYPASS_L_RINT
1850				    && (line_status & (LSR_BI | LSR_FE)
1851					|| com->tp->t_iflag & INPCK))
1852					recv_data = 0;
1853			}
1854			++com->bytes_in;
1855			if (com->tp != NULL &&
1856			    com->tp->t_hotchar != 0 && recv_data == com->tp->t_hotchar)
1857				swi_sched(sio_fast_ih, 0);
1858			ioptr = com->iptr;
1859			if (ioptr >= com->ibufend)
1860				CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW);
1861			else {
1862				if (com->do_timestamp)
1863					microtime(&com->timestamp);
1864				++com_events;
1865				swi_sched(sio_slow_ih, SWI_DELAY);
1866#if 0 /* for testing input latency vs efficiency */
1867if (com->iptr - com->ibuf == 8)
1868	swi_sched(sio_fast_ih, 0);
1869#endif
1870				ioptr[0] = recv_data;
1871				ioptr[com->ierroff] = line_status;
1872				com->iptr = ++ioptr;
1873				if (ioptr == com->ihighwater
1874				    && com->state & CS_RTS_IFLOW)
1875					outb(com->modem_ctl_port,
1876					     com->mcr_image &= ~MCR_RTS);
1877				if (line_status & LSR_OE)
1878					CE_RECORD(com, CE_OVERRUN);
1879			}
1880cont:
1881			if (line_status & LSR_TXRDY
1882			    && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY))
1883				goto txrdy;
1884
1885			/*
1886			 * "& 0x7F" is to avoid the gcc-1.40 generating a slow
1887			 * jump from the top of the loop to here
1888			 */
1889			line_status = inb(com->line_status_port) & 0x7F;
1890		}
1891
1892		/* modem status change? (always check before doing output) */
1893		modem_status = inb(com->modem_status_port);
1894		if (modem_status != com->last_modem_status) {
1895			/*
1896			 * Schedule high level to handle DCD changes.  Note
1897			 * that we don't use the delta bits anywhere.  Some
1898			 * UARTs mess them up, and it's easy to remember the
1899			 * previous bits and calculate the delta.
1900			 */
1901			com->last_modem_status = modem_status;
1902			if (!(com->state & CS_CHECKMSR)) {
1903				com_events += LOTS_OF_EVENTS;
1904				com->state |= CS_CHECKMSR;
1905				swi_sched(sio_fast_ih, 0);
1906			}
1907
1908			/* handle CTS change immediately for crisp flow ctl */
1909			if (com->state & CS_CTS_OFLOW) {
1910				if (modem_status & MSR_CTS)
1911					com->state |= CS_ODEVREADY;
1912				else
1913					com->state &= ~CS_ODEVREADY;
1914			}
1915		}
1916
1917txrdy:
1918		/* output queued and everything ready? */
1919		if (line_status & LSR_TXRDY
1920		    && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
1921			ioptr = com->obufq.l_head;
1922			if (com->tx_fifo_size > 1 && com->unit != siotsunit) {
1923				u_int	ocount;
1924
1925				ocount = com->obufq.l_tail - ioptr;
1926				if (ocount > com->tx_fifo_size)
1927					ocount = com->tx_fifo_size;
1928				com->bytes_out += ocount;
1929				do
1930					outb(com->data_port, *ioptr++);
1931				while (--ocount != 0);
1932			} else {
1933				outb(com->data_port, *ioptr++);
1934				++com->bytes_out;
1935				if (com->unit == siotsunit
1936				    && siotso < sizeof siots / sizeof siots[0])
1937					nanouptime(&siots[siotso++]);
1938			}
1939			com->obufq.l_head = ioptr;
1940			if (COM_IIR_TXRDYBUG(com->flags))
1941				int_ctl_new = int_ctl | IER_ETXRDY;
1942			if (ioptr >= com->obufq.l_tail) {
1943				struct lbq	*qp;
1944
1945				qp = com->obufq.l_next;
1946				qp->l_queued = FALSE;
1947				qp = qp->l_next;
1948				if (qp != NULL) {
1949					com->obufq.l_head = qp->l_head;
1950					com->obufq.l_tail = qp->l_tail;
1951					com->obufq.l_next = qp;
1952				} else {
1953					/* output just completed */
1954					if (COM_IIR_TXRDYBUG(com->flags))
1955						int_ctl_new = int_ctl
1956							      & ~IER_ETXRDY;
1957					com->state &= ~CS_BUSY;
1958				}
1959				if (!(com->state & CS_ODONE)) {
1960					com_events += LOTS_OF_EVENTS;
1961					com->state |= CS_ODONE;
1962					/* handle at high level ASAP */
1963					swi_sched(sio_fast_ih, 0);
1964				}
1965			}
1966			if (COM_IIR_TXRDYBUG(com->flags)
1967			    && int_ctl != int_ctl_new)
1968				outb(com->int_ctl_port, int_ctl_new);
1969		}
1970
1971		/* finished? */
1972#ifndef COM_MULTIPORT
1973		if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND)
1974#endif /* COM_MULTIPORT */
1975			return;
1976	}
1977}
1978
1979static int
1980siocioctl(dev, cmd, data, flag, td)
1981	struct cdev *dev;
1982	u_long		cmd;
1983	caddr_t		data;
1984	int		flag;
1985	struct thread	*td;
1986{
1987	struct com_s	*com;
1988	struct tty	*tp;
1989	int		error;
1990	int		mynor;
1991	struct termios	*ct;
1992
1993	mynor = minor(dev);
1994	com = com_addr(MINOR_TO_UNIT(mynor));
1995	tp = com->tp;
1996	if (com == NULL || com->gone)
1997		return (ENODEV);
1998
1999	switch (mynor & CONTROL_MASK) {
2000	case CONTROL_INIT_STATE:
2001		ct = mynor & CALLOUT_MASK ? &tp->t_init_out : &tp->t_init_in;
2002		break;
2003	case CONTROL_LOCK_STATE:
2004		ct = mynor & CALLOUT_MASK ? &tp->t_lock_out : &tp->t_lock_in;
2005		break;
2006	default:
2007		return (ENODEV);	/* /dev/nodev */
2008	}
2009	switch (cmd) {
2010	case TIOCSETA:
2011		error = suser(td);
2012		if (error != 0)
2013			return (error);
2014		*ct = *(struct termios *)data;
2015		return (0);
2016	case TIOCGETA:
2017		*(struct termios *)data = *ct;
2018		return (0);
2019	case TIOCGETD:
2020		*(int *)data = TTYDISC;
2021		return (0);
2022	case TIOCGWINSZ:
2023		bzero(data, sizeof(struct winsize));
2024		return (0);
2025	default:
2026		return (ENOTTY);
2027	}
2028}
2029
2030static int
2031sioioctl(dev, cmd, data, flag, td)
2032	struct cdev *dev;
2033	u_long		cmd;
2034	caddr_t		data;
2035	int		flag;
2036	struct thread	*td;
2037{
2038	struct com_s	*com;
2039	int		error;
2040	int		mynor;
2041	int		s;
2042	struct tty	*tp;
2043#ifndef BURN_BRIDGES
2044#if defined(COMPAT_43)
2045	u_long		oldcmd;
2046	struct termios	term;
2047#endif
2048#endif
2049
2050	mynor = minor(dev);
2051	com = dev->si_drv1;
2052	if (com == NULL || com->gone)
2053		return (ENODEV);
2054	tp = com->tp;
2055#ifndef BURN_BRIDGES
2056#if defined(COMPAT_43)
2057	term = tp->t_termios;
2058	oldcmd = cmd;
2059	error = ttsetcompat(tp, &cmd, data, &term);
2060	if (error != 0)
2061		return (error);
2062	if (cmd != oldcmd)
2063		data = (caddr_t)&term;
2064#endif
2065#endif
2066	if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) {
2067		int	cc;
2068		struct termios *dt = (struct termios *)data;
2069		struct termios *lt = mynor & CALLOUT_MASK
2070				     ? &tp->t_lock_out : &tp->t_lock_in;
2071
2072		dt->c_iflag = (tp->t_iflag & lt->c_iflag)
2073			      | (dt->c_iflag & ~lt->c_iflag);
2074		dt->c_oflag = (tp->t_oflag & lt->c_oflag)
2075			      | (dt->c_oflag & ~lt->c_oflag);
2076		dt->c_cflag = (tp->t_cflag & lt->c_cflag)
2077			      | (dt->c_cflag & ~lt->c_cflag);
2078		dt->c_lflag = (tp->t_lflag & lt->c_lflag)
2079			      | (dt->c_lflag & ~lt->c_lflag);
2080		for (cc = 0; cc < NCCS; ++cc)
2081			if (lt->c_cc[cc] != 0)
2082				dt->c_cc[cc] = tp->t_cc[cc];
2083		if (lt->c_ispeed != 0)
2084			dt->c_ispeed = tp->t_ispeed;
2085		if (lt->c_ospeed != 0)
2086			dt->c_ospeed = tp->t_ospeed;
2087	}
2088	error = ttyioctl(dev, cmd, data, flag, td);
2089	ttyldoptim(tp);
2090	if (error != ENOTTY)
2091		return (error);
2092	s = spltty();
2093	switch (cmd) {
2094	case TIOCTIMESTAMP:
2095		com->do_timestamp = TRUE;
2096		*(struct timeval *)data = com->timestamp;
2097		break;
2098	default:
2099		splx(s);
2100		error = pps_ioctl(cmd, data, &com->pps);
2101		if (error == ENODEV)
2102			error = ENOTTY;
2103		return (error);
2104	}
2105	splx(s);
2106	return (0);
2107}
2108
2109/* software interrupt handler for SWI_TTY */
2110static void
2111siopoll(void *dummy)
2112{
2113	int		unit;
2114
2115	if (com_events == 0)
2116		return;
2117repeat:
2118	for (unit = 0; unit < sio_numunits; ++unit) {
2119		struct com_s	*com;
2120		int		incc;
2121		struct tty	*tp;
2122
2123		com = com_addr(unit);
2124		if (com == NULL)
2125			continue;
2126		tp = com->tp;
2127		if (tp == NULL || com->gone) {
2128			/*
2129			 * Discard any events related to never-opened or
2130			 * going-away devices.
2131			 */
2132			mtx_lock_spin(&sio_lock);
2133			incc = com->iptr - com->ibuf;
2134			com->iptr = com->ibuf;
2135			if (com->state & CS_CHECKMSR) {
2136				incc += LOTS_OF_EVENTS;
2137				com->state &= ~CS_CHECKMSR;
2138			}
2139			com_events -= incc;
2140			mtx_unlock_spin(&sio_lock);
2141			continue;
2142		}
2143		if (com->iptr != com->ibuf) {
2144			mtx_lock_spin(&sio_lock);
2145			sioinput(com);
2146			mtx_unlock_spin(&sio_lock);
2147		}
2148		if (com->state & CS_CHECKMSR) {
2149			u_char	delta_modem_status;
2150
2151			mtx_lock_spin(&sio_lock);
2152			delta_modem_status = com->last_modem_status
2153					     ^ com->prev_modem_status;
2154			com->prev_modem_status = com->last_modem_status;
2155			com_events -= LOTS_OF_EVENTS;
2156			com->state &= ~CS_CHECKMSR;
2157			mtx_unlock_spin(&sio_lock);
2158			if (delta_modem_status & MSR_DCD)
2159				ttyld_modem(tp,
2160				    com->prev_modem_status & MSR_DCD);
2161		}
2162		if (com->state & CS_ODONE) {
2163			mtx_lock_spin(&sio_lock);
2164			com_events -= LOTS_OF_EVENTS;
2165			com->state &= ~CS_ODONE;
2166			mtx_unlock_spin(&sio_lock);
2167			if (!(com->state & CS_BUSY)
2168			    && !(com->extra_state & CSE_BUSYCHECK)) {
2169				timeout(siobusycheck, com, hz / 100);
2170				com->extra_state |= CSE_BUSYCHECK;
2171			}
2172			ttyld_start(tp);
2173		}
2174		if (com_events == 0)
2175			break;
2176	}
2177	if (com_events >= LOTS_OF_EVENTS)
2178		goto repeat;
2179}
2180
2181static void
2182combreak(tp, sig)
2183	struct tty 	*tp;
2184	int		sig;
2185{
2186	struct com_s	*com;
2187
2188	com = tp->t_sc;
2189
2190	if (sig)
2191		sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK);
2192	else
2193		sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
2194}
2195
2196static int
2197comparam(tp, t)
2198	struct tty	*tp;
2199	struct termios	*t;
2200{
2201	u_int		cfcr;
2202	int		cflag;
2203	struct com_s	*com;
2204	u_int		divisor;
2205	u_char		dlbh;
2206	u_char		dlbl;
2207	u_char		efr_flowbits;
2208	int		s;
2209
2210	com = tp->t_sc;
2211	if (com == NULL)
2212		return (ENODEV);
2213
2214	/* check requested parameters */
2215	if (t->c_ispeed != (t->c_ospeed != 0 ? t->c_ospeed : tp->t_ospeed))
2216		return (EINVAL);
2217	divisor = siodivisor(com->rclk, t->c_ispeed);
2218	if (divisor == 0)
2219		return (EINVAL);
2220
2221	/* parameters are OK, convert them to the com struct and the device */
2222	s = spltty();
2223	if (t->c_ospeed == 0)
2224		(void)commodem(tp, 0, SER_DTR);	/* hang up line */
2225	else
2226		(void)commodem(tp, SER_DTR, 0);
2227	cflag = t->c_cflag;
2228	switch (cflag & CSIZE) {
2229	case CS5:
2230		cfcr = CFCR_5BITS;
2231		break;
2232	case CS6:
2233		cfcr = CFCR_6BITS;
2234		break;
2235	case CS7:
2236		cfcr = CFCR_7BITS;
2237		break;
2238	default:
2239		cfcr = CFCR_8BITS;
2240		break;
2241	}
2242	if (cflag & PARENB) {
2243		cfcr |= CFCR_PENAB;
2244		if (!(cflag & PARODD))
2245			cfcr |= CFCR_PEVEN;
2246	}
2247	if (cflag & CSTOPB)
2248		cfcr |= CFCR_STOPB;
2249
2250	if (com->hasfifo) {
2251		/*
2252		 * Use a fifo trigger level low enough so that the input
2253		 * latency from the fifo is less than about 16 msec and
2254		 * the total latency is less than about 30 msec.  These
2255		 * latencies are reasonable for humans.  Serial comms
2256		 * protocols shouldn't expect anything better since modem
2257		 * latencies are larger.
2258		 *
2259		 * The fifo trigger level cannot be set at RX_HIGH for high
2260		 * speed connections without further work on reducing
2261		 * interrupt disablement times in other parts of the system,
2262		 * without producing silo overflow errors.
2263		 */
2264		com->fifo_image = com->unit == siotsunit ? 0
2265				  : t->c_ispeed <= 4800
2266				  ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH;
2267#ifdef COM_ESP
2268		/*
2269		 * The Hayes ESP card needs the fifo DMA mode bit set
2270		 * in compatibility mode.  If not, it will interrupt
2271		 * for each character received.
2272		 */
2273		if (com->esp)
2274			com->fifo_image |= FIFO_DMA_MODE;
2275#endif
2276		sio_setreg(com, com_fifo, com->fifo_image);
2277	}
2278
2279	/*
2280	 * This returns with interrupts disabled so that we can complete
2281	 * the speed change atomically.  Keeping interrupts disabled is
2282	 * especially important while com_data is hidden.
2283	 */
2284	(void) siosetwater(com, t->c_ispeed);
2285
2286	sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB);
2287	/*
2288	 * Only set the divisor registers if they would change, since on
2289	 * some 16550 incompatibles (UMC8669F), setting them while input
2290	 * is arriving loses sync until data stops arriving.
2291	 */
2292	dlbl = divisor & 0xFF;
2293	if (sio_getreg(com, com_dlbl) != dlbl)
2294		sio_setreg(com, com_dlbl, dlbl);
2295	dlbh = divisor >> 8;
2296	if (sio_getreg(com, com_dlbh) != dlbh)
2297		sio_setreg(com, com_dlbh, dlbh);
2298
2299	efr_flowbits = 0;
2300
2301	if (cflag & CRTS_IFLOW) {
2302		com->state |= CS_RTS_IFLOW;
2303		efr_flowbits |= EFR_AUTORTS;
2304		/*
2305		 * If CS_RTS_IFLOW just changed from off to on, the change
2306		 * needs to be propagated to MCR_RTS.  This isn't urgent,
2307		 * so do it later by calling comstart() instead of repeating
2308		 * a lot of code from comstart() here.
2309		 */
2310	} else if (com->state & CS_RTS_IFLOW) {
2311		com->state &= ~CS_RTS_IFLOW;
2312		/*
2313		 * CS_RTS_IFLOW just changed from on to off.  Force MCR_RTS
2314		 * on here, since comstart() won't do it later.
2315		 */
2316		outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2317	}
2318
2319	/*
2320	 * Set up state to handle output flow control.
2321	 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
2322	 * Now has 10+ msec latency, while CTS flow has 50- usec latency.
2323	 */
2324	com->state |= CS_ODEVREADY;
2325	com->state &= ~CS_CTS_OFLOW;
2326	if (cflag & CCTS_OFLOW) {
2327		com->state |= CS_CTS_OFLOW;
2328		efr_flowbits |= EFR_AUTOCTS;
2329		if (!(com->last_modem_status & MSR_CTS))
2330			com->state &= ~CS_ODEVREADY;
2331	}
2332
2333	if (com->st16650a) {
2334		sio_setreg(com, com_lcr, LCR_EFR_ENABLE);
2335		sio_setreg(com, com_efr,
2336			   (sio_getreg(com, com_efr)
2337			    & ~(EFR_AUTOCTS | EFR_AUTORTS)) | efr_flowbits);
2338	}
2339	sio_setreg(com, com_cfcr, com->cfcr_image = cfcr);
2340
2341	/* XXX shouldn't call functions while intrs are disabled. */
2342	ttyldoptim(tp);
2343
2344	mtx_unlock_spin(&sio_lock);
2345	splx(s);
2346	comstart(tp);
2347	if (com->ibufold != NULL) {
2348		free(com->ibufold, M_DEVBUF);
2349		com->ibufold = NULL;
2350	}
2351	return (0);
2352}
2353
2354/*
2355 * This function must be called with the sio_lock mutex released and will
2356 * return with it obtained.
2357 */
2358static int
2359siosetwater(com, speed)
2360	struct com_s	*com;
2361	speed_t		speed;
2362{
2363	int		cp4ticks;
2364	u_char		*ibuf;
2365	int		ibufsize;
2366	struct tty	*tp;
2367
2368	/*
2369	 * Make the buffer size large enough to handle a softtty interrupt
2370	 * latency of about 2 ticks without loss of throughput or data
2371	 * (about 3 ticks if input flow control is not used or not honoured,
2372	 * but a bit less for CS5-CS7 modes).
2373	 */
2374	cp4ticks = speed / 10 / hz * 4;
2375	for (ibufsize = 128; ibufsize < cp4ticks;)
2376		ibufsize <<= 1;
2377	if (ibufsize == com->ibufsize) {
2378		mtx_lock_spin(&sio_lock);
2379		return (0);
2380	}
2381
2382	/*
2383	 * Allocate input buffer.  The extra factor of 2 in the size is
2384	 * to allow for an error byte for each input byte.
2385	 */
2386	ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT);
2387	if (ibuf == NULL) {
2388		mtx_lock_spin(&sio_lock);
2389		return (ENOMEM);
2390	}
2391
2392	/* Initialize non-critical variables. */
2393	com->ibufold = com->ibuf;
2394	com->ibufsize = ibufsize;
2395	tp = com->tp;
2396	if (tp != NULL) {
2397		tp->t_ififosize = 2 * ibufsize;
2398		tp->t_ispeedwat = (speed_t)-1;
2399		tp->t_ospeedwat = (speed_t)-1;
2400	}
2401
2402	/*
2403	 * Read current input buffer, if any.  Continue with interrupts
2404	 * disabled.
2405	 */
2406	mtx_lock_spin(&sio_lock);
2407	if (com->iptr != com->ibuf)
2408		sioinput(com);
2409
2410	/*-
2411	 * Initialize critical variables, including input buffer watermarks.
2412	 * The external device is asked to stop sending when the buffer
2413	 * exactly reaches high water, or when the high level requests it.
2414	 * The high level is notified immediately (rather than at a later
2415	 * clock tick) when this watermark is reached.
2416	 * The buffer size is chosen so the watermark should almost never
2417	 * be reached.
2418	 * The low watermark is invisibly 0 since the buffer is always
2419	 * emptied all at once.
2420	 */
2421	com->iptr = com->ibuf = ibuf;
2422	com->ibufend = ibuf + ibufsize;
2423	com->ierroff = ibufsize;
2424	com->ihighwater = ibuf + 3 * ibufsize / 4;
2425	return (0);
2426}
2427
2428static void
2429comstart(tp)
2430	struct tty	*tp;
2431{
2432	struct com_s	*com;
2433	int		s;
2434
2435	com = tp->t_sc;
2436	if (com == NULL)
2437		return;
2438	s = spltty();
2439	mtx_lock_spin(&sio_lock);
2440	if (tp->t_state & TS_TTSTOP)
2441		com->state &= ~CS_TTGO;
2442	else
2443		com->state |= CS_TTGO;
2444	if (tp->t_state & TS_TBLOCK) {
2445		if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW)
2446			outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
2447	} else {
2448		if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater
2449		    && com->state & CS_RTS_IFLOW)
2450			outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2451	}
2452	mtx_unlock_spin(&sio_lock);
2453	if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
2454		ttwwakeup(tp);
2455		splx(s);
2456		return;
2457	}
2458	if (tp->t_outq.c_cc != 0) {
2459		struct lbq	*qp;
2460		struct lbq	*next;
2461
2462		if (!com->obufs[0].l_queued) {
2463			com->obufs[0].l_tail
2464			    = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1,
2465						  sizeof com->obuf1);
2466			com->obufs[0].l_next = NULL;
2467			com->obufs[0].l_queued = TRUE;
2468			mtx_lock_spin(&sio_lock);
2469			if (com->state & CS_BUSY) {
2470				qp = com->obufq.l_next;
2471				while ((next = qp->l_next) != NULL)
2472					qp = next;
2473				qp->l_next = &com->obufs[0];
2474			} else {
2475				com->obufq.l_head = com->obufs[0].l_head;
2476				com->obufq.l_tail = com->obufs[0].l_tail;
2477				com->obufq.l_next = &com->obufs[0];
2478				com->state |= CS_BUSY;
2479			}
2480			mtx_unlock_spin(&sio_lock);
2481		}
2482		if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) {
2483			com->obufs[1].l_tail
2484			    = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2,
2485						  sizeof com->obuf2);
2486			com->obufs[1].l_next = NULL;
2487			com->obufs[1].l_queued = TRUE;
2488			mtx_lock_spin(&sio_lock);
2489			if (com->state & CS_BUSY) {
2490				qp = com->obufq.l_next;
2491				while ((next = qp->l_next) != NULL)
2492					qp = next;
2493				qp->l_next = &com->obufs[1];
2494			} else {
2495				com->obufq.l_head = com->obufs[1].l_head;
2496				com->obufq.l_tail = com->obufs[1].l_tail;
2497				com->obufq.l_next = &com->obufs[1];
2498				com->state |= CS_BUSY;
2499			}
2500			mtx_unlock_spin(&sio_lock);
2501		}
2502		tp->t_state |= TS_BUSY;
2503	}
2504	mtx_lock_spin(&sio_lock);
2505	if (com->state >= (CS_BUSY | CS_TTGO))
2506		siointr1(com);	/* fake interrupt to start output */
2507	mtx_unlock_spin(&sio_lock);
2508	ttwwakeup(tp);
2509	splx(s);
2510}
2511
2512static void
2513comstop(tp, rw)
2514	struct tty	*tp;
2515	int		rw;
2516{
2517	struct com_s	*com;
2518
2519	com = tp->t_sc;
2520	if (com == NULL || com->gone)
2521		return;
2522	mtx_lock_spin(&sio_lock);
2523	if (rw & FWRITE) {
2524		if (com->hasfifo)
2525#ifdef COM_ESP
2526		    /* XXX avoid h/w bug. */
2527		    if (!com->esp)
2528#endif
2529			sio_setreg(com, com_fifo,
2530				   FIFO_XMT_RST | com->fifo_image);
2531		com->obufs[0].l_queued = FALSE;
2532		com->obufs[1].l_queued = FALSE;
2533		if (com->state & CS_ODONE)
2534			com_events -= LOTS_OF_EVENTS;
2535		com->state &= ~(CS_ODONE | CS_BUSY);
2536		com->tp->t_state &= ~TS_BUSY;
2537	}
2538	if (rw & FREAD) {
2539		if (com->hasfifo)
2540#ifdef COM_ESP
2541		    /* XXX avoid h/w bug. */
2542		    if (!com->esp)
2543#endif
2544			sio_setreg(com, com_fifo,
2545				   FIFO_RCV_RST | com->fifo_image);
2546		com_events -= (com->iptr - com->ibuf);
2547		com->iptr = com->ibuf;
2548	}
2549	mtx_unlock_spin(&sio_lock);
2550	comstart(tp);
2551}
2552
2553static int
2554commodem(tp, sigon, sigoff)
2555	struct tty 	*tp;
2556	int		sigon, sigoff;
2557{
2558	struct com_s	*com;
2559	int	bitand, bitor, msr;
2560
2561	com = tp->t_sc;
2562	if (com->gone)
2563		return(0);
2564	if (sigon != 0 || sigoff != 0) {
2565		bitand = bitor = 0;
2566		if (sigoff & SER_DTR)
2567			bitand |= MCR_DTR;
2568		if (sigoff & SER_RTS)
2569			bitand |= MCR_RTS;
2570		if (sigon & SER_DTR)
2571			bitor |= MCR_DTR;
2572		if (sigon & SER_RTS)
2573			bitor |= MCR_RTS;
2574		bitand = ~bitand;
2575		mtx_lock_spin(&sio_lock);
2576		com->mcr_image &= bitand;
2577		com->mcr_image |= bitor;
2578		outb(com->modem_ctl_port, com->mcr_image);
2579		mtx_unlock_spin(&sio_lock);
2580		return (0);
2581	} else {
2582		bitor = 0;
2583		if (com->mcr_image & MCR_DTR)
2584			bitor |= SER_DTR;
2585		if (com->mcr_image & MCR_RTS)
2586			bitor |= SER_RTS;
2587		msr = com->prev_modem_status;
2588		if (msr & MSR_CTS)
2589			bitor |= SER_CTS;
2590		if (msr & MSR_DCD)
2591			bitor |= SER_DCD;
2592		if (msr & MSR_DSR)
2593			bitor |= SER_DSR;
2594		if (msr & MSR_DSR)
2595			bitor |= SER_DSR;
2596		if (msr & (MSR_RI | MSR_TERI))
2597			bitor |= SER_RI;
2598		return (bitor);
2599	}
2600}
2601
2602static void
2603siosettimeout()
2604{
2605	struct com_s	*com;
2606	bool_t		someopen;
2607	int		unit;
2608
2609	/*
2610	 * Set our timeout period to 1 second if no polled devices are open.
2611	 * Otherwise set it to max(1/200, 1/hz).
2612	 * Enable timeouts iff some device is open.
2613	 */
2614	untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2615	sio_timeout = hz;
2616	someopen = FALSE;
2617	for (unit = 0; unit < sio_numunits; ++unit) {
2618		com = com_addr(unit);
2619		if (com != NULL && com->tp != NULL
2620		    && com->tp->t_state & TS_ISOPEN && !com->gone) {
2621			someopen = TRUE;
2622			if (com->poll || com->poll_output) {
2623				sio_timeout = hz > 200 ? hz / 200 : 1;
2624				break;
2625			}
2626		}
2627	}
2628	if (someopen) {
2629		sio_timeouts_until_log = hz / sio_timeout;
2630		sio_timeout_handle = timeout(comwakeup, (void *)NULL,
2631					     sio_timeout);
2632	} else {
2633		/* Flush error messages, if any. */
2634		sio_timeouts_until_log = 1;
2635		comwakeup((void *)NULL);
2636		untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2637	}
2638}
2639
2640static void
2641comwakeup(chan)
2642	void	*chan;
2643{
2644	struct com_s	*com;
2645	int		unit;
2646
2647	sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout);
2648
2649	/*
2650	 * Recover from lost output interrupts.
2651	 * Poll any lines that don't use interrupts.
2652	 */
2653	for (unit = 0; unit < sio_numunits; ++unit) {
2654		com = com_addr(unit);
2655		if (com != NULL && !com->gone
2656		    && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) {
2657			mtx_lock_spin(&sio_lock);
2658			siointr1(com);
2659			mtx_unlock_spin(&sio_lock);
2660		}
2661	}
2662
2663	/*
2664	 * Check for and log errors, but not too often.
2665	 */
2666	if (--sio_timeouts_until_log > 0)
2667		return;
2668	sio_timeouts_until_log = hz / sio_timeout;
2669	for (unit = 0; unit < sio_numunits; ++unit) {
2670		int	errnum;
2671
2672		com = com_addr(unit);
2673		if (com == NULL)
2674			continue;
2675		if (com->gone)
2676			continue;
2677		for (errnum = 0; errnum < CE_NTYPES; ++errnum) {
2678			u_int	delta;
2679			u_long	total;
2680
2681			mtx_lock_spin(&sio_lock);
2682			delta = com->delta_error_counts[errnum];
2683			com->delta_error_counts[errnum] = 0;
2684			mtx_unlock_spin(&sio_lock);
2685			if (delta == 0)
2686				continue;
2687			total = com->error_counts[errnum] += delta;
2688			log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n",
2689			    unit, delta, error_desc[errnum],
2690			    delta == 1 ? "" : "s", total);
2691		}
2692	}
2693}
2694
2695/*
2696 * Following are all routines needed for SIO to act as console
2697 */
2698struct siocnstate {
2699	u_char	dlbl;
2700	u_char	dlbh;
2701	u_char	ier;
2702	u_char	cfcr;
2703	u_char	mcr;
2704};
2705
2706/*
2707 * This is a function in order to not replicate "ttyd%d" more
2708 * places than absolutely necessary.
2709 */
2710static void
2711siocnset(struct consdev *cd, int unit)
2712{
2713
2714	cd->cn_unit = unit;
2715	sprintf(cd->cn_name, "ttyd%d", unit);
2716}
2717
2718static speed_t siocngetspeed(Port_t, u_long rclk);
2719static void siocnclose(struct siocnstate *sp, Port_t iobase);
2720static void siocnopen(struct siocnstate *sp, Port_t iobase, int speed);
2721static void siocntxwait(Port_t iobase);
2722
2723static cn_probe_t siocnprobe;
2724static cn_init_t siocninit;
2725static cn_term_t siocnterm;
2726static cn_checkc_t siocncheckc;
2727static cn_getc_t siocngetc;
2728static cn_putc_t siocnputc;
2729
2730CONS_DRIVER(sio, siocnprobe, siocninit, siocnterm, siocngetc, siocncheckc,
2731	    siocnputc, NULL);
2732
2733static void
2734siocntxwait(iobase)
2735	Port_t	iobase;
2736{
2737	int	timo;
2738
2739	/*
2740	 * Wait for any pending transmission to finish.  Required to avoid
2741	 * the UART lockup bug when the speed is changed, and for normal
2742	 * transmits.
2743	 */
2744	timo = 100000;
2745	while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY))
2746	       != (LSR_TSRE | LSR_TXRDY) && --timo != 0)
2747		;
2748}
2749
2750/*
2751 * Read the serial port specified and try to figure out what speed
2752 * it's currently running at.  We're assuming the serial port has
2753 * been initialized and is basicly idle.  This routine is only intended
2754 * to be run at system startup.
2755 *
2756 * If the value read from the serial port doesn't make sense, return 0.
2757 */
2758
2759static speed_t
2760siocngetspeed(iobase, rclk)
2761	Port_t	iobase;
2762	u_long	rclk;
2763{
2764	u_int	divisor;
2765	u_char	dlbh;
2766	u_char	dlbl;
2767	u_char  cfcr;
2768
2769	cfcr = inb(iobase + com_cfcr);
2770	outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2771
2772	dlbl = inb(iobase + com_dlbl);
2773	dlbh = inb(iobase + com_dlbh);
2774
2775	outb(iobase + com_cfcr, cfcr);
2776
2777	divisor = dlbh << 8 | dlbl;
2778
2779	/* XXX there should be more sanity checking. */
2780	if (divisor == 0)
2781		return (CONSPEED);
2782	return (rclk / (16UL * divisor));
2783}
2784
2785static void
2786siocnopen(sp, iobase, speed)
2787	struct siocnstate	*sp;
2788	Port_t			iobase;
2789	int			speed;
2790{
2791	u_int	divisor;
2792	u_char	dlbh;
2793	u_char	dlbl;
2794
2795	/*
2796	 * Save all the device control registers except the fifo register
2797	 * and set our default ones (cs8 -parenb speed=comdefaultrate).
2798	 * We can't save the fifo register since it is read-only.
2799	 */
2800	sp->ier = inb(iobase + com_ier);
2801	outb(iobase + com_ier, 0);	/* spltty() doesn't stop siointr() */
2802	siocntxwait(iobase);
2803	sp->cfcr = inb(iobase + com_cfcr);
2804	outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2805	sp->dlbl = inb(iobase + com_dlbl);
2806	sp->dlbh = inb(iobase + com_dlbh);
2807	/*
2808	 * Only set the divisor registers if they would change, since on
2809	 * some 16550 incompatibles (Startech), setting them clears the
2810	 * data input register.  This also reduces the effects of the
2811	 * UMC8669F bug.
2812	 */
2813	divisor = siodivisor(comdefaultrclk, speed);
2814	dlbl = divisor & 0xFF;
2815	if (sp->dlbl != dlbl)
2816		outb(iobase + com_dlbl, dlbl);
2817	dlbh = divisor >> 8;
2818	if (sp->dlbh != dlbh)
2819		outb(iobase + com_dlbh, dlbh);
2820	outb(iobase + com_cfcr, CFCR_8BITS);
2821	sp->mcr = inb(iobase + com_mcr);
2822	/*
2823	 * We don't want interrupts, but must be careful not to "disable"
2824	 * them by clearing the MCR_IENABLE bit, since that might cause
2825	 * an interrupt by floating the IRQ line.
2826	 */
2827	outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS);
2828}
2829
2830static void
2831siocnclose(sp, iobase)
2832	struct siocnstate	*sp;
2833	Port_t			iobase;
2834{
2835	/*
2836	 * Restore the device control registers.
2837	 */
2838	siocntxwait(iobase);
2839	outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2840	if (sp->dlbl != inb(iobase + com_dlbl))
2841		outb(iobase + com_dlbl, sp->dlbl);
2842	if (sp->dlbh != inb(iobase + com_dlbh))
2843		outb(iobase + com_dlbh, sp->dlbh);
2844	outb(iobase + com_cfcr, sp->cfcr);
2845	/*
2846	 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them.
2847	 */
2848	outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS);
2849	outb(iobase + com_ier, sp->ier);
2850}
2851
2852static void
2853siocnprobe(cp)
2854	struct consdev	*cp;
2855{
2856	speed_t			boot_speed;
2857	u_char			cfcr;
2858	u_int			divisor;
2859	int			s, unit;
2860	struct siocnstate	sp;
2861
2862	/*
2863	 * Find our first enabled console, if any.  If it is a high-level
2864	 * console device, then initialize it and return successfully.
2865	 * If it is a low-level console device, then initialize it and
2866	 * return unsuccessfully.  It must be initialized in both cases
2867	 * for early use by console drivers and debuggers.  Initializing
2868	 * the hardware is not necessary in all cases, since the i/o
2869	 * routines initialize it on the fly, but it is necessary if
2870	 * input might arrive while the hardware is switched back to an
2871	 * uninitialized state.  We can't handle multiple console devices
2872	 * yet because our low-level routines don't take a device arg.
2873	 * We trust the user to set the console flags properly so that we
2874	 * don't need to probe.
2875	 */
2876	cp->cn_pri = CN_DEAD;
2877
2878	for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */
2879		int flags;
2880
2881		if (resource_disabled("sio", unit))
2882			continue;
2883		if (resource_int_value("sio", unit, "flags", &flags))
2884			continue;
2885		if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) {
2886			int port;
2887			Port_t iobase;
2888
2889			if (resource_int_value("sio", unit, "port", &port))
2890				continue;
2891			iobase = port;
2892			s = spltty();
2893			if (boothowto & RB_SERIAL) {
2894				boot_speed =
2895				    siocngetspeed(iobase, comdefaultrclk);
2896				if (boot_speed)
2897					comdefaultrate = boot_speed;
2898			}
2899
2900			/*
2901			 * Initialize the divisor latch.  We can't rely on
2902			 * siocnopen() to do this the first time, since it
2903			 * avoids writing to the latch if the latch appears
2904			 * to have the correct value.  Also, if we didn't
2905			 * just read the speed from the hardware, then we
2906			 * need to set the speed in hardware so that
2907			 * switching it later is null.
2908			 */
2909			cfcr = inb(iobase + com_cfcr);
2910			outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2911			divisor = siodivisor(comdefaultrclk, comdefaultrate);
2912			outb(iobase + com_dlbl, divisor & 0xff);
2913			outb(iobase + com_dlbh, divisor >> 8);
2914			outb(iobase + com_cfcr, cfcr);
2915
2916			siocnopen(&sp, iobase, comdefaultrate);
2917
2918			splx(s);
2919			if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) {
2920				siocnset(cp, unit);
2921				cp->cn_pri = COM_FORCECONSOLE(flags)
2922					     || boothowto & RB_SERIAL
2923					     ? CN_REMOTE : CN_NORMAL;
2924				siocniobase = iobase;
2925				siocnunit = unit;
2926			}
2927#ifdef GDB
2928			if (COM_DEBUGGER(flags))
2929				siogdbiobase = iobase;
2930#endif
2931		}
2932	}
2933}
2934
2935static void
2936siocninit(cp)
2937	struct consdev	*cp;
2938{
2939	comconsole = cp->cn_unit;
2940}
2941
2942static void
2943siocnterm(cp)
2944	struct consdev	*cp;
2945{
2946	comconsole = -1;
2947}
2948
2949static int
2950siocncheckc(struct consdev *cd)
2951{
2952	int	c;
2953	Port_t	iobase;
2954	int	s;
2955	struct siocnstate	sp;
2956	speed_t	speed;
2957
2958	if (cd != NULL && cd->cn_unit == siocnunit) {
2959		iobase = siocniobase;
2960		speed = comdefaultrate;
2961	} else {
2962#ifdef GDB
2963		iobase = siogdbiobase;
2964		speed = gdbdefaultrate;
2965#else
2966		return (-1);
2967#endif
2968	}
2969	s = spltty();
2970	siocnopen(&sp, iobase, speed);
2971	if (inb(iobase + com_lsr) & LSR_RXRDY)
2972		c = inb(iobase + com_data);
2973	else
2974		c = -1;
2975	siocnclose(&sp, iobase);
2976	splx(s);
2977	return (c);
2978}
2979
2980static int
2981siocngetc(struct consdev *cd)
2982{
2983	int	c;
2984	Port_t	iobase;
2985	int	s;
2986	struct siocnstate	sp;
2987	speed_t	speed;
2988
2989	if (cd != NULL && cd->cn_unit == siocnunit) {
2990		iobase = siocniobase;
2991		speed = comdefaultrate;
2992	} else {
2993#ifdef GDB
2994		iobase = siogdbiobase;
2995		speed = gdbdefaultrate;
2996#else
2997		return (-1);
2998#endif
2999	}
3000	s = spltty();
3001	siocnopen(&sp, iobase, speed);
3002	while (!(inb(iobase + com_lsr) & LSR_RXRDY))
3003		;
3004	c = inb(iobase + com_data);
3005	siocnclose(&sp, iobase);
3006	splx(s);
3007	return (c);
3008}
3009
3010static void
3011siocnputc(struct consdev *cd, int c)
3012{
3013	int	need_unlock;
3014	int	s;
3015	struct siocnstate	sp;
3016	Port_t	iobase;
3017	speed_t	speed;
3018
3019	if (cd != NULL && cd->cn_unit == siocnunit) {
3020		iobase = siocniobase;
3021		speed = comdefaultrate;
3022	} else {
3023#ifdef GDB
3024		iobase = siogdbiobase;
3025		speed = gdbdefaultrate;
3026#else
3027		return;
3028#endif
3029	}
3030	s = spltty();
3031	need_unlock = 0;
3032	if (sio_inited == 2 && !mtx_owned(&sio_lock)) {
3033		mtx_lock_spin(&sio_lock);
3034		need_unlock = 1;
3035	}
3036	siocnopen(&sp, iobase, speed);
3037	siocntxwait(iobase);
3038	outb(iobase + com_data, c);
3039	siocnclose(&sp, iobase);
3040	if (need_unlock)
3041		mtx_unlock_spin(&sio_lock);
3042	splx(s);
3043}
3044
3045/*
3046 * Remote gdb(1) support.
3047 */
3048
3049#if defined(GDB)
3050
3051#include <gdb/gdb.h>
3052
3053static gdb_probe_f siogdbprobe;
3054static gdb_init_f siogdbinit;
3055static gdb_term_f siogdbterm;
3056static gdb_getc_f siogdbgetc;
3057static gdb_checkc_f siogdbcheckc;
3058static gdb_putc_f siogdbputc;
3059
3060GDB_DBGPORT(sio, siogdbprobe, siogdbinit, siogdbterm, siogdbcheckc,
3061    siogdbgetc, siogdbputc);
3062
3063static int
3064siogdbprobe(void)
3065{
3066	return ((siogdbiobase != 0) ? 0 : -1);
3067}
3068
3069static void
3070siogdbinit(void)
3071{
3072}
3073
3074static void
3075siogdbterm(void)
3076{
3077}
3078
3079static void
3080siogdbputc(int c)
3081{
3082	siocnputc(NULL, c);
3083}
3084
3085static int
3086siogdbcheckc(void)
3087{
3088	return (siocncheckc(NULL));
3089}
3090
3091static int
3092siogdbgetc(void)
3093{
3094	return (siocngetc(NULL));
3095}
3096
3097#endif
3098